From e2c89ec0f54758c8271e4967fc53bab3b7be9360 Mon Sep 17 00:00:00 2001 From: guozhanxin Date: Mon, 4 Jun 2018 14:54:07 +0800 Subject: [PATCH] =?UTF-8?q?[components][cputime]to=20be=20able=20trace=20b?= =?UTF-8?q?efore=20use=20DWT.|=E4=BD=BF=E7=94=A8=20DWT=20=E4=B9=8B?= =?UTF-8?q?=E5=89=8D=E5=BF=85=E9=A1=BB=E5=85=88=E4=BD=BF=E8=83=BD=E8=B7=9F?= =?UTF-8?q?=E8=B8=AA=E7=B3=BB=E7=BB=9F.?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- components/drivers/cputime/cputime_cortexm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/components/drivers/cputime/cputime_cortexm.c b/components/drivers/cputime/cputime_cortexm.c index f576df785f..99dc8b013e 100644 --- a/components/drivers/cputime/cputime_cortexm.c +++ b/components/drivers/cputime/cputime_cortexm.c @@ -54,6 +54,9 @@ int cortexm_cputime_init(void) /* check support bit */ if ((DWT->CTRL & (1UL << DWT_CTRL_NOCYCCNT_Pos)) == 0) { + /* enable trace*/ + CoreDebug->DEMCR |= (1UL << CoreDebug_DEMCR_TRCENA_Pos); + /* whether cycle counter not enabled */ if ((DWT->CTRL & (1UL << DWT_CTRL_CYCCNTENA_Pos)) == 0) {