[bsp/at32] 1.add support for AT-START-F407 board, 2.add eth and rtc driver
This commit is contained in:
sheltonyu
parent
130550d5a6
commit
e2086dcd3b
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@ -27,6 +27,9 @@ if GetDepend(['BSP_USING_HWTIMER']):
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if GetDepend(['BSP_USING_SPI']):
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if GetDepend(['BSP_USING_SPI']):
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src += ['drv_spi.c']
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src += ['drv_spi.c']
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if GetDepend(['BSP_USING_ETH', 'RT_USING_LWIP']):
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src += ['drv_eth.c']
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if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
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if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
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if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3') or GetDepend('BSP_USING_I2C4'):
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if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3') or GetDepend('BSP_USING_I2C4'):
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src += ['drv_soft_i2c.c']
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src += ['drv_soft_i2c.c']
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@ -37,7 +40,7 @@ if GetDepend(['BSP_USING_ADC']):
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if GetDepend('BSP_USING_SRAM'):
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if GetDepend('BSP_USING_SRAM'):
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src += ['drv_sram.c']
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src += ['drv_sram.c']
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if GetDepend('BSP_USING_ONCHIP_RTC'):
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if GetDepend('BSP_USING_RTC'):
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src += ['drv_rtc.c']
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src += ['drv_rtc.c']
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if GetDepend(['BSP_USING_WDT']):
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if GetDepend(['BSP_USING_WDT']):
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@ -0,0 +1,723 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-05-19 Joe first version
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*/
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#include "at32f4xx_eth.h"
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#include "board.h"
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#include <netif/ethernetif.h>
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#include "lwipopts.h"
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#include "drv_eth.h"
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#include <drv_log.h>
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/* EMAC Interface */
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#define PHY_ADDRESS 0x00 /* Relative to AT32F407-EVAL Board */
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//#define MII_MODE /* MII mode for AT32F407-EVAL Board (MB784) (check jumpers setting) */
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#define RMII_MODE /* RMII mode for AT32F407-EVAL Board (MB784) (check jumpers setting) */
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//#define CRYSTAL_ON_PHY
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#define MII_RX_REMAP 1
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/* debug option */
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//#define ETH_RX_DUMP
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//#define ETH_TX_DUMP
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//#define DRV_DEBUG
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#define LOG_TAG "drv.emac"
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#define ETH_RXBUFNB 4
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#define ETH_TXBUFNB 2
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extern ETH_DMADESCTypeDef *DMATxDescToSet;
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extern ETH_DMADESCTypeDef *DMARxDescToGet;
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extern ETH_DMADESCTypeDef *DMAPTPTxDescToSet;
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extern ETH_DMADESCTypeDef *DMAPTPRxDescToGet;
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static ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB];
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static rt_uint8_t Rx_Buff[ETH_RXBUFNB][ETH_MAX_PACKET_SIZE], Tx_Buff[ETH_TXBUFNB][ETH_MAX_PACKET_SIZE];
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#define MAX_ADDR_LEN 6
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/* Gloable variables ---------------------------------------------------------*/
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void static Reset_Phy(void);
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void NVIC_Configuration(void);
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void GPIO_Configuration(void);
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struct rt_at32_eth
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{
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/* inherit from ethernet device */
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struct eth_device parent;
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#ifndef PHY_USING_INTERRUPT_MODE
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rt_timer_t poll_link_timer;
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#endif
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/* interface address info, hw address */
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rt_uint8_t dev_addr[MAX_ADDR_LEN];
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/* ETH_Speed */
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uint32_t ETH_Speed;
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/* ETH_Duplex_Mode */
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uint32_t ETH_Mode;
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};
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static ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB]; /* Ethernet Rx & Tx DMA Descriptors */
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static uint8_t Rx_Buff[ETH_RXBUFNB][ETH_MAX_PACKET_SIZE], Tx_Buff[ETH_TXBUFNB][ETH_MAX_PACKET_SIZE]; /* Ethernet buffers */
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//static ETH_HandleTypeDef EthHandle;
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static struct rt_at32_eth at32_eth_device;
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static struct rt_semaphore tx_wait;
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static rt_bool_t tx_is_waiting = RT_FALSE;
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#if defined(ETH_RX_DUMP) || defined(ETH_TX_DUMP)
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#define __is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ')
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static void dump_hex(const rt_uint8_t *ptr, rt_size_t buflen)
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{
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unsigned char *buf = (unsigned char *)ptr;
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int i, j;
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for (i = 0; i < buflen; i += 16)
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{
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rt_kprintf("%08X: ", i);
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for (j = 0; j < 16; j++)
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if (i + j < buflen)
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rt_kprintf("%02X ", buf[i + j]);
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else
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rt_kprintf(" ");
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rt_kprintf(" ");
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for (j = 0; j < 16; j++)
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if (i + j < buflen)
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rt_kprintf("%c", __is_print(buf[i + j]) ? buf[i + j] : '.');
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rt_kprintf("\n");
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}
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}
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#endif
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/**
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* @brief reset the phy
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* @param None
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* @retval None
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*/
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void static Reset_Phy(void)
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{
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GPIO_InitType GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8;
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GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT_PP;
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GPIO_Init(GPIOC, &GPIO_InitStructure);
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GPIO_ResetBits(GPIOC, GPIO_Pins_8);
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rt_thread_mdelay(2);
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GPIO_SetBits(GPIOC, GPIO_Pins_8);
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rt_thread_mdelay(2000);
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}
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/**
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* @brief Configure NVIC for ISR
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* @param None
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* @retval None
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*/
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void NVIC_Configuration(void)
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{
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NVIC_InitType NVIC_InitStructure;
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/* Set the Vector Table base location at 0x08000000 */
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NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
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/* 2 bit for pre-emption priority, 2 bits for subpriority */
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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/* Enable the Ethernet global Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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/**
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* @brief Configure GPIO for ethernet
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* @param None
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* @retval None
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*/
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void GPIO_Configuration(void)
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{
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GPIO_InitType GPIO_InitStructure;
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#if MII_RX_REMAP
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GPIO_PinsRemapConfig(GPIO_Remap_ETH, ENABLE);
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#endif
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RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC |
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RCC_APB2PERIPH_GPIOD | RCC_APB2PERIPH_GPIOE | RCC_APB2PERIPH_AFIO, ENABLE);
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/* ETHERNET pins configuration */
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/* AF Output Push Pull:
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ETH_MII_MDIO / ETH_RMII_MDIO: PA2
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ETH_MII_MDC / ETH_RMII_MDC: PC1
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*/
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/* Configure PA2 as alternate function push-pull MDIO*/
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_2;
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GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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/*PC1-->MDC*/
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_1;
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GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOC, &GPIO_InitStructure);
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/*MII Mode GPIO configuration*/
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#ifdef MII_MODE
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/**********************MII Tx Pin Define****************************/
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/*
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ETH_MII_TX0-->PB12 AF-PP
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ETH_MII_TX1-->PB13 AF-PP
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ETH_MII_TX2-->PC2 AF-PP
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ETH_MII_TX3-->PB8 AF-PP
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ETH_MII_TX_EN-->PB11 AF-PP
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ETH_MII_TX_CLK-->PC3
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*/
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_11 | GPIO_Pins_12 | GPIO_Pins_13;
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GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_2 | GPIO_Pins_3;
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GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOC, &GPIO_InitStructure);
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/**********************MII Rx Pin Define****************************/
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#if MII_RX_REMAP /*IO PIN remaped*/
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/*
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ETH_MII_RX_DV-->PD8
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ETH_MII_RXD0-->PD9
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ETH_MII_RXD1-->PD10
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ETH_MII_RXD2-->PD11
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ETH_MII_RXD3-->PD12
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ETH_MII_RXCLK-->PA1
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ETH_MII_CRS-->PA0
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ETH_MII_COL-->PA3
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ETH_MII_RX_ER-->PB10
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*/
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10 | GPIO_Pins_11 | GPIO_Pins_12;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_3;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_10;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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#else
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/*
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ETH_MII_RX_DV-->PA7
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ETH_MII_RXD0-->PC4
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ETH_MII_RXD1-->PC5
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ETH_MII_RXD2-->PB0
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ETH_MII_RXD3-->PB1
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ETH_MII_RXCLK-->PA1
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ETH_MII_CRS-->PA0
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ETH_MII_COL-->PA3
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ETH_MII_RX_ER-->PB10
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*/
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_3 | GPIO_Pins_7;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOC, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_10;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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#endif //End MII RX REMAP
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#endif //End MII mode
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#ifdef RMII_MODE
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/**********************RMII Tx Pin Define****************************/
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/*
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ETH_RMII_TX0-->PB12 AF-PP
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ETH_RMII_TX1-->PB13 AF-PP
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ETH_RMII_TX_EN-->PB11 AF-PP
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*/
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_11 | GPIO_Pins_12 | GPIO_Pins_13;
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GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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/**********************RMII Rx Pin Define****************************/
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#if MII_RX_REMAP /*IO PIN remaped*/
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/*
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ETH_RMII_RX_DV-->PD8
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ETH_RMII_RXD0-->PD9
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ETH_RMII_RXD1-->PD10
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ETH_RMII_REF_CLK-->PA1
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*/
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_1;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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#else
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/*
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ETH_RMII_RX_DV-->PA7
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ETH_RMII_RXD0-->PC4
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ETH_RMII_RXD1-->PC5
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ETH_RMII_REF_CLK-->PA1
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*/
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_1 | GPIO_Pins_7;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOC, &GPIO_InitStructure);
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#endif //End RMII RX REMAP
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#endif //End RMII mode
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/* ADC Channel4 config --------------------------------------------------------*/
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/* Configure PA4(ADC Channel4) as analog input -------------------------*/
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#ifdef ADC_NECESSARY
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_ANALOG;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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#endif
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/* MCO pin configuration------------------------------------------------- */
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/* Configure MCO (PA8) as alternate function push-pull */
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#ifndef CRYSTAL_ON_PHY
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GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8;
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GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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#endif
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}
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/* EMAC initialization function */
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static rt_err_t rt_at32_eth_init(rt_device_t dev)
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{
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ETH_InitType ETH_InitStructure;
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RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_ETHMAC | RCC_AHBPERIPH_ETHMACTX |
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RCC_AHBPERIPH_ETHMACRX, ENABLE);
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/* MII/RMII Media interface selection ------------------------------------------*/
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#ifdef MII_MODE /* Mode MII with AT32F407-EVAL */
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GPIO_ETH_MediaInterfaceConfig(GPIO_ETH_MediaInterface_MII);
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||||||
|
/* Get 25MHz from system clock 200MHz on PA8 pin (MCO) */
|
||||||
|
#ifndef CRYSTAL_ON_PHY
|
||||||
|
RCC_CLKOUTConfig(RCC_CLKOUT_SYSCLK, RCC_MCOPRE_8);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#elif defined RMII_MODE /* Mode RMII with AT32F407-EVAL */
|
||||||
|
GPIO_ETH_MediaInterfaceConfig(GPIO_ETH_MediaInterface_RMII);
|
||||||
|
#ifndef CRYSTAL_ON_PHY
|
||||||
|
RCC_CLKOUTConfig(RCC_CLKOUT_SYSCLK, RCC_MCOPRE_8); /*25M to RMII Mode*/
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*Reset phy*/
|
||||||
|
Reset_Phy();
|
||||||
|
/* Reset ETHERNET on AHB Bus */
|
||||||
|
ETH_DeInit();
|
||||||
|
|
||||||
|
/* Software reset */
|
||||||
|
ETH_SoftwareReset();
|
||||||
|
|
||||||
|
/* Wait for software reset */
|
||||||
|
while (ETH_GetSoftwareResetStatus() == SET);
|
||||||
|
|
||||||
|
/* ETHERNET Configuration ------------------------------------------------------*/
|
||||||
|
/* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
|
||||||
|
ETH_StructInit(Ð_InitStructure);
|
||||||
|
|
||||||
|
/* Fill ETH_InitStructure parametrs */
|
||||||
|
/*------------------------ MAC -----------------------------------*/
|
||||||
|
ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable;//ETH_AutoNegotiation_Enable ;
|
||||||
|
ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
|
||||||
|
ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Enable;
|
||||||
|
ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
|
||||||
|
ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
|
||||||
|
ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
|
||||||
|
ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
|
||||||
|
ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;//ETH_MulticastFramesFilter_Perfect;
|
||||||
|
ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
|
||||||
|
#ifdef CHECKSUM_BY_HARDWARE
|
||||||
|
ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*------------------------ DMA -----------------------------------*/
|
||||||
|
|
||||||
|
/* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
|
||||||
|
the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
|
||||||
|
if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
|
||||||
|
ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;//ETH_DropTCPIPChecksumErrorFrame_Enable;
|
||||||
|
ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
|
||||||
|
ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
|
||||||
|
|
||||||
|
ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
|
||||||
|
ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
|
||||||
|
ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
|
||||||
|
ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
|
||||||
|
ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
|
||||||
|
ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
|
||||||
|
ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
|
||||||
|
ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
|
||||||
|
|
||||||
|
/* Configure Ethernet, check error */
|
||||||
|
if(ETH_Init(Ð_InitStructure, PHY_ADDRESS) == ((uint32_t)0)) {
|
||||||
|
return RT_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Enable DMA Receive interrupt (need to enable in this case Normal interrupt) */
|
||||||
|
ETH_DMAITConfig(ETH_DMA_INT_NIS | ETH_DMA_INT_R, ENABLE);
|
||||||
|
|
||||||
|
/* Initialize Tx Descriptors list: Chain Mode */
|
||||||
|
ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
|
||||||
|
/* Initialize Rx Descriptors list: Chain Mode */
|
||||||
|
ETH_DMARxDescChainInit(DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
|
||||||
|
|
||||||
|
/* MAC address configuration */
|
||||||
|
ETH_MACAddressConfig(ETH_MAC_Address0, (u8*)&at32_eth_device.dev_addr[0]);
|
||||||
|
|
||||||
|
/* Enable ETH transmition and recetion */
|
||||||
|
ETH_Start();
|
||||||
|
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t rt_at32_eth_open(rt_device_t dev, rt_uint16_t oflag)
|
||||||
|
{
|
||||||
|
LOG_D("emac open");
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t rt_at32_eth_close(rt_device_t dev)
|
||||||
|
{
|
||||||
|
LOG_D("emac close");
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_size_t rt_at32_eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
|
||||||
|
{
|
||||||
|
LOG_D("emac read");
|
||||||
|
rt_set_errno(-RT_ENOSYS);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_size_t rt_at32_eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
|
||||||
|
{
|
||||||
|
LOG_D("emac write");
|
||||||
|
rt_set_errno(-RT_ENOSYS);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t rt_at32_eth_control(rt_device_t dev, int cmd, void *args)
|
||||||
|
{
|
||||||
|
switch (cmd)
|
||||||
|
{
|
||||||
|
case NIOCTL_GADDR:
|
||||||
|
/* get mac address */
|
||||||
|
if (args) rt_memcpy(args, at32_eth_device.dev_addr, 6);
|
||||||
|
else return -RT_ERROR;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default :
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* ethernet device interface */
|
||||||
|
/* transmit data*/
|
||||||
|
rt_err_t rt_at32_eth_tx(rt_device_t dev, struct pbuf *p)
|
||||||
|
{
|
||||||
|
struct pbuf* q;
|
||||||
|
rt_uint32_t offset;
|
||||||
|
|
||||||
|
/* Check if the descriptor is owned by the ETHERNET DMA (when set) or CPU (when reset) */
|
||||||
|
while ((DMATxDescToSet->Status & ETH_DMATxDesc_OWN) != (uint32_t)RESET)
|
||||||
|
{
|
||||||
|
rt_err_t result;
|
||||||
|
rt_uint32_t level;
|
||||||
|
|
||||||
|
level = rt_hw_interrupt_disable();
|
||||||
|
tx_is_waiting = RT_TRUE;
|
||||||
|
rt_hw_interrupt_enable(level);
|
||||||
|
|
||||||
|
/* it's own bit set, wait it */
|
||||||
|
result = rt_sem_take(&tx_wait, RT_WAITING_FOREVER);
|
||||||
|
if (result == RT_EOK) break;
|
||||||
|
if (result == -RT_ERROR) return -RT_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
offset = 0;
|
||||||
|
for (q = p; q != NULL; q = q->next)
|
||||||
|
{
|
||||||
|
uint8_t *to;
|
||||||
|
|
||||||
|
/* Copy the frame to be sent into memory pointed by the current ETHERNET DMA Tx descriptor */
|
||||||
|
to = (uint8_t*)((DMATxDescToSet->Buffer1Addr) + offset);
|
||||||
|
memcpy(to, q->payload, q->len);
|
||||||
|
offset += q->len;
|
||||||
|
}
|
||||||
|
#ifdef ETH_TX_DUMP
|
||||||
|
{
|
||||||
|
rt_uint32_t i;
|
||||||
|
rt_uint8_t *ptr = (rt_uint8_t*)(DMATxDescToSet->Buffer1Addr);
|
||||||
|
|
||||||
|
AT32_ETH_PRINTF("tx_dump, len:%d\r\n", p->tot_len);
|
||||||
|
for(i=0; i<p->tot_len; i++)
|
||||||
|
{
|
||||||
|
AT32_ETH_PRINTF("%02x ",*ptr);
|
||||||
|
ptr++;
|
||||||
|
|
||||||
|
if(((i+1)%8) == 0)
|
||||||
|
{
|
||||||
|
AT32_ETH_PRINTF(" ");
|
||||||
|
}
|
||||||
|
if(((i+1)%16) == 0)
|
||||||
|
{
|
||||||
|
AT32_ETH_PRINTF("\r\n");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
AT32_ETH_PRINTF("\r\ndump done!\r\n");
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Setting the Frame Length: bits[12:0] */
|
||||||
|
DMATxDescToSet->ControlBufferSize = (p->tot_len & ETH_DMATxDesc_TBS1);
|
||||||
|
/* Setting the last segment and first segment bits (in this case a frame is transmitted in one descriptor) */
|
||||||
|
DMATxDescToSet->Status |= ETH_DMATxDesc_LS | ETH_DMATxDesc_FS;
|
||||||
|
/* Enable TX Completion Interrupt */
|
||||||
|
DMATxDescToSet->Status |= ETH_DMATxDesc_IC;
|
||||||
|
#ifdef CHECKSUM_BY_HARDWARE
|
||||||
|
DMATxDescToSet->Status |= ETH_DMATxDesc_ChecksumTCPUDPICMPFull;
|
||||||
|
/* clean ICMP checksum STM32F need */
|
||||||
|
{
|
||||||
|
struct eth_hdr *ethhdr = (struct eth_hdr *)(DMATxDescToSet->Buffer1Addr);
|
||||||
|
/* is IP ? */
|
||||||
|
if( ethhdr->type == htons(ETHTYPE_IP) )
|
||||||
|
{
|
||||||
|
struct ip_hdr *iphdr = (struct ip_hdr *)(DMATxDescToSet->Buffer1Addr + SIZEOF_ETH_HDR);
|
||||||
|
/* is ICMP ? */
|
||||||
|
if( IPH_PROTO(iphdr) == IP_PROTO_ICMP )
|
||||||
|
{
|
||||||
|
struct icmp_echo_hdr *iecho = (struct icmp_echo_hdr *)(DMATxDescToSet->Buffer1Addr + SIZEOF_ETH_HDR + sizeof(struct ip_hdr) );
|
||||||
|
iecho->chksum = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
/* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */
|
||||||
|
DMATxDescToSet->Status |= ETH_DMATxDesc_OWN;
|
||||||
|
/* When Tx Buffer unavailable flag is set: clear it and resume transmission */
|
||||||
|
if ((ETH->DMASTS & ETH_DMA_FLAG_TBU) != (uint32_t)RESET)
|
||||||
|
{
|
||||||
|
/* Clear TBUS ETHERNET DMA flag */
|
||||||
|
ETH->DMASTS = ETH_DMA_FLAG_TBU;
|
||||||
|
/* Transmit Poll Demand to resume DMA transmission*/
|
||||||
|
ETH->DMATPD = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Update the ETHERNET DMA global Tx descriptor with next Tx decriptor */
|
||||||
|
/* Chained Mode */
|
||||||
|
/* Selects the next DMA Tx descriptor list for next buffer to send */
|
||||||
|
DMATxDescToSet = (ETH_DMADESCTypeDef*) (DMATxDescToSet->Buffer2NextDescAddr);
|
||||||
|
|
||||||
|
/* Return SUCCESS */
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* receive data*/
|
||||||
|
struct pbuf *rt_at32_eth_rx(rt_device_t dev)
|
||||||
|
{
|
||||||
|
struct pbuf* p;
|
||||||
|
rt_uint32_t offset = 0, framelength = 0;
|
||||||
|
|
||||||
|
/* init p pointer */
|
||||||
|
p = RT_NULL;
|
||||||
|
|
||||||
|
/* Check if the descriptor is owned by the ETHERNET DMA (when set) or CPU (when reset) */
|
||||||
|
if(((DMARxDescToGet->Status & ETH_DMARxDesc_OWN) != (uint32_t)RESET))
|
||||||
|
return p;
|
||||||
|
|
||||||
|
if (((DMARxDescToGet->Status & ETH_DMARxDesc_ES) == (uint32_t)RESET) &&
|
||||||
|
((DMARxDescToGet->Status & ETH_DMARxDesc_LS) != (uint32_t)RESET) &&
|
||||||
|
((DMARxDescToGet->Status & ETH_DMARxDesc_FS) != (uint32_t)RESET))
|
||||||
|
{
|
||||||
|
/* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */
|
||||||
|
framelength = ((DMARxDescToGet->Status & ETH_DMARxDesc_FL) >> 16) - 4;
|
||||||
|
|
||||||
|
/* allocate buffer */
|
||||||
|
p = pbuf_alloc(PBUF_LINK, framelength, PBUF_RAM);
|
||||||
|
if (p != RT_NULL)
|
||||||
|
{
|
||||||
|
struct pbuf* q;
|
||||||
|
|
||||||
|
for (q = p; q != RT_NULL; q= q->next)
|
||||||
|
{
|
||||||
|
/* Copy the received frame into buffer from memory pointed by the current ETHERNET DMA Rx descriptor */
|
||||||
|
memcpy(q->payload, (uint8_t *)((DMARxDescToGet->Buffer1Addr) + offset), q->len);
|
||||||
|
offset += q->len;
|
||||||
|
}
|
||||||
|
#ifdef ETH_RX_DUMP
|
||||||
|
{
|
||||||
|
rt_uint32_t i;
|
||||||
|
rt_uint8_t *ptr = (rt_uint8_t*)(DMARxDescToGet->Buffer1Addr);
|
||||||
|
|
||||||
|
AT32_ETH_PRINTF("rx_dump, len:%d\r\n", p->tot_len);
|
||||||
|
for(i=0; i<p->tot_len; i++)
|
||||||
|
{
|
||||||
|
AT32_ETH_PRINTF("%02x ", *ptr);
|
||||||
|
ptr++;
|
||||||
|
|
||||||
|
if(((i+1)%8) == 0)
|
||||||
|
{
|
||||||
|
AT32_ETH_PRINTF(" ");
|
||||||
|
}
|
||||||
|
if(((i+1)%16) == 0)
|
||||||
|
{
|
||||||
|
AT32_ETH_PRINTF("\r\n");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
AT32_ETH_PRINTF("\r\ndump done!\r\n");
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set Own bit of the Rx descriptor Status: gives the buffer back to ETHERNET DMA */
|
||||||
|
DMARxDescToGet->Status = ETH_DMARxDesc_OWN;
|
||||||
|
|
||||||
|
/* When Rx Buffer unavailable flag is set: clear it and resume reception */
|
||||||
|
if ((ETH->DMASTS & ETH_DMA_FLAG_RBU) != (uint32_t)RESET)
|
||||||
|
{
|
||||||
|
/* Clear RBUS ETHERNET DMA flag */
|
||||||
|
ETH->DMASTS = ETH_DMA_FLAG_RBU;
|
||||||
|
/* Resume DMA reception */
|
||||||
|
ETH->DMARPD = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Update the ETHERNET DMA global Rx descriptor with next Rx decriptor */
|
||||||
|
/* Chained Mode */
|
||||||
|
if((DMARxDescToGet->ControlBufferSize & ETH_DMARxDesc_RCH) != (uint32_t)RESET)
|
||||||
|
{
|
||||||
|
/* Selects the next DMA Rx descriptor list for next buffer to read */
|
||||||
|
DMARxDescToGet = (ETH_DMADESCTypeDef*) (DMARxDescToGet->Buffer2NextDescAddr);
|
||||||
|
}
|
||||||
|
else /* Ring Mode */
|
||||||
|
{
|
||||||
|
if((DMARxDescToGet->ControlBufferSize & ETH_DMARxDesc_RER) != (uint32_t)RESET)
|
||||||
|
{
|
||||||
|
/* Selects the first DMA Rx descriptor for next buffer to read: last Rx descriptor was used */
|
||||||
|
DMARxDescToGet = (ETH_DMADESCTypeDef*) (ETH->DMARDLADDR);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Selects the next DMA Rx descriptor list for next buffer to read */
|
||||||
|
DMARxDescToGet = (ETH_DMADESCTypeDef*) ((uint32_t)DMARxDescToGet + 0x10 + ((ETH->DMABM & 0x0000007C) >> 2));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return p;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* interrupt service routine */
|
||||||
|
void ETH_IRQHandler(void)
|
||||||
|
{
|
||||||
|
rt_uint32_t status;
|
||||||
|
|
||||||
|
status = ETH->DMASTS;
|
||||||
|
|
||||||
|
/* Clear received IT */
|
||||||
|
if ((status & ETH_DMA_INT_NIS) != (u32)RESET)
|
||||||
|
ETH->DMASTS = (u32)ETH_DMA_INT_NIS;
|
||||||
|
if ((status & ETH_DMA_INT_AIS) != (u32)RESET)
|
||||||
|
ETH->DMASTS = (u32)ETH_DMA_INT_AIS;
|
||||||
|
if ((status & ETH_DMA_INT_RO) != (u32)RESET)
|
||||||
|
ETH->DMASTS = (u32)ETH_DMA_INT_RO;
|
||||||
|
if ((status & ETH_DMA_INT_RBU) != (u32)RESET)
|
||||||
|
ETH->DMASTS = (u32)ETH_DMA_INT_RBU;
|
||||||
|
|
||||||
|
if (ETH_GetDMAITStatus(ETH_DMA_INT_R) == SET) /* packet receiption */
|
||||||
|
{
|
||||||
|
/* a frame has been received */
|
||||||
|
eth_device_ready(&(at32_eth_device.parent));
|
||||||
|
|
||||||
|
ETH_DMAClearITPendingBit(ETH_DMA_INT_R);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (ETH_GetDMAITStatus(ETH_DMA_INT_T) == SET) /* packet transmission */
|
||||||
|
{
|
||||||
|
if (tx_is_waiting == RT_TRUE)
|
||||||
|
{
|
||||||
|
tx_is_waiting = RT_FALSE;
|
||||||
|
rt_sem_release(&tx_wait);
|
||||||
|
}
|
||||||
|
|
||||||
|
ETH_DMAClearITPendingBit(ETH_DMA_INT_T);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
enum {
|
||||||
|
PHY_LINK = (1 << 0),
|
||||||
|
PHY_100M = (1 << 1),
|
||||||
|
PHY_FULL_DUPLEX = (1 << 2),
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Register the EMAC device */
|
||||||
|
static int rt_hw_at32_eth_init(void)
|
||||||
|
{
|
||||||
|
rt_err_t state = RT_EOK;
|
||||||
|
|
||||||
|
Reset_Phy();
|
||||||
|
|
||||||
|
GPIO_Configuration();
|
||||||
|
NVIC_Configuration();
|
||||||
|
|
||||||
|
at32_eth_device.dev_addr[0] = 0x00;
|
||||||
|
at32_eth_device.dev_addr[1] = 0x80;
|
||||||
|
at32_eth_device.dev_addr[2] = 0xE1;
|
||||||
|
at32_eth_device.dev_addr[3] = 0x94;
|
||||||
|
at32_eth_device.dev_addr[4] = 0x87;
|
||||||
|
at32_eth_device.dev_addr[5] = 0x55;
|
||||||
|
|
||||||
|
at32_eth_device.parent.parent.init = rt_at32_eth_init;
|
||||||
|
at32_eth_device.parent.parent.open = rt_at32_eth_open;
|
||||||
|
at32_eth_device.parent.parent.close = rt_at32_eth_close;
|
||||||
|
at32_eth_device.parent.parent.read = rt_at32_eth_read;
|
||||||
|
at32_eth_device.parent.parent.write = rt_at32_eth_write;
|
||||||
|
at32_eth_device.parent.parent.control = rt_at32_eth_control;
|
||||||
|
at32_eth_device.parent.parent.user_data = RT_NULL;
|
||||||
|
|
||||||
|
at32_eth_device.parent.eth_rx = rt_at32_eth_rx;
|
||||||
|
at32_eth_device.parent.eth_tx = rt_at32_eth_tx;
|
||||||
|
|
||||||
|
/* register eth device */
|
||||||
|
state = eth_device_init(&(at32_eth_device.parent), "e0");
|
||||||
|
if (RT_EOK == state)
|
||||||
|
{
|
||||||
|
LOG_D("emac device init success");
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
LOG_E("emac device init faild: %d", state);
|
||||||
|
state = -RT_ERROR;
|
||||||
|
}
|
||||||
|
/* start phy monitor */
|
||||||
|
return state;
|
||||||
|
}
|
||||||
|
|
||||||
|
INIT_DEVICE_EXPORT(rt_hw_at32_eth_init);
|
||||||
|
|
@ -0,0 +1,92 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-05-19 Joe first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __DRV_ETH_H__
|
||||||
|
#define __DRV_ETH_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include <rthw.h>
|
||||||
|
#include <rtdevice.h>
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
|
/* The PHY basic control register */
|
||||||
|
#define PHY_BASIC_CONTROL_REG 0x00U
|
||||||
|
#define PHY_RESET_MASK (1<<15)
|
||||||
|
#define PHY_AUTO_NEGOTIATION_MASK (1<<12)
|
||||||
|
|
||||||
|
/* The PHY basic status register */
|
||||||
|
#define PHY_BASIC_STATUS_REG 0x01U
|
||||||
|
#define PHY_LINKED_STATUS_MASK (1<<2)
|
||||||
|
#define PHY_AUTONEGO_COMPLETE_MASK (1<<5)
|
||||||
|
|
||||||
|
/* The PHY ID one register */
|
||||||
|
#define PHY_ID1_REG 0x02U
|
||||||
|
|
||||||
|
/* The PHY ID two register */
|
||||||
|
#define PHY_ID2_REG 0x03U
|
||||||
|
|
||||||
|
/* The PHY auto-negotiate advertise register */
|
||||||
|
#define PHY_AUTONEG_ADVERTISE_REG 0x04U
|
||||||
|
|
||||||
|
#ifdef PHY_USING_LAN8720A
|
||||||
|
/* The PHY interrupt source flag register. */
|
||||||
|
#define PHY_INTERRUPT_FLAG_REG 0x1DU
|
||||||
|
/* The PHY interrupt mask register. */
|
||||||
|
#define PHY_INTERRUPT_MASK_REG 0x1EU
|
||||||
|
#define PHY_LINK_DOWN_MASK (1<<4)
|
||||||
|
#define PHY_AUTO_NEGO_COMPLETE_MASK (1<<6)
|
||||||
|
|
||||||
|
/* The PHY status register. */
|
||||||
|
#define PHY_Status_REG 0x1FU
|
||||||
|
#define PHY_10M_MASK (1<<2)
|
||||||
|
#define PHY_100M_MASK (1<<3)
|
||||||
|
#define PHY_FULL_DUPLEX_MASK (1<<4)
|
||||||
|
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
|
||||||
|
#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK)
|
||||||
|
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
|
||||||
|
#endif /* PHY_USING_LAN8720A */
|
||||||
|
|
||||||
|
#ifdef PHY_USING_DM9161CEP
|
||||||
|
#define PHY_Status_REG 0x11U
|
||||||
|
#define PHY_10M_MASK ((1<<12) || (1<<13))
|
||||||
|
#define PHY_100M_MASK ((1<<14) || (1<<15))
|
||||||
|
#define PHY_FULL_DUPLEX_MASK ((1<<15) || (1<<13))
|
||||||
|
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
|
||||||
|
#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK)
|
||||||
|
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
|
||||||
|
/* The PHY interrupt source flag register. */
|
||||||
|
#define PHY_INTERRUPT_FLAG_REG 0x15U
|
||||||
|
/* The PHY interrupt mask register. */
|
||||||
|
#define PHY_INTERRUPT_MASK_REG 0x15U
|
||||||
|
#define PHY_LINK_CHANGE_FLAG (1<<2)
|
||||||
|
#define PHY_LINK_CHANGE_MASK (1<<9)
|
||||||
|
#define PHY_INT_MASK 0
|
||||||
|
|
||||||
|
#endif /* PHY_USING_DM9161CEP */
|
||||||
|
|
||||||
|
#ifdef PHY_USING_DP83848C
|
||||||
|
#define PHY_Status_REG 0x10U
|
||||||
|
#define PHY_10M_MASK (1<<1)
|
||||||
|
#define PHY_FULL_DUPLEX_MASK (1<<2)
|
||||||
|
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
|
||||||
|
#define PHY_Status_SPEED_100M(sr) (!PHY_Status_SPEED_10M(sr))
|
||||||
|
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
|
||||||
|
/* The PHY interrupt source flag register. */
|
||||||
|
#define PHY_INTERRUPT_FLAG_REG 0x12U
|
||||||
|
#define PHY_LINK_CHANGE_FLAG (1<<13)
|
||||||
|
/* The PHY interrupt control register. */
|
||||||
|
#define PHY_INTERRUPT_CTRL_REG 0x11U
|
||||||
|
#define PHY_INTERRUPT_EN ((1<<0)|(1<<1))
|
||||||
|
/* The PHY interrupt mask register. */
|
||||||
|
#define PHY_INTERRUPT_MASK_REG 0x12U
|
||||||
|
#define PHY_INT_MASK (1<<5)
|
||||||
|
#endif /* PHY_USING_DP83848C */
|
||||||
|
|
||||||
|
#endif /* __DRV_ETH_H__ */
|
||||||
|
|
@ -0,0 +1,246 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-05-19 shelton first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "board.h"
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#ifdef BSP_USING_RTC
|
||||||
|
|
||||||
|
#ifndef BKP_DR1
|
||||||
|
#define BKP_DR1 RT_NULL
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//#define DRV_DEBUG
|
||||||
|
#define LOG_TAG "drv.rtc"
|
||||||
|
#include <drv_log.h>
|
||||||
|
|
||||||
|
#define BKUP_REG_DATA 0xA5A5
|
||||||
|
|
||||||
|
static struct rt_device rtc;
|
||||||
|
|
||||||
|
static time_t get_rtc_timestamp(void)
|
||||||
|
{
|
||||||
|
#ifdef SOC_SERIES_AT32F415
|
||||||
|
struct tm tm_new;
|
||||||
|
ERTC_TimeType ERTC_TimeStruct;
|
||||||
|
ERTC_DateType ERTC_DateStruct;
|
||||||
|
|
||||||
|
ERTC_GetTimeValue(ERTC_Format_BIN, &ERTC_TimeStruct);
|
||||||
|
ERTC_GetDateValue(ERTC_Format_BIN, &ERTC_DateStruct);
|
||||||
|
tm_new.tm_sec = ERTC_TimeStruct.ERTC_Seconds;
|
||||||
|
tm_new.tm_min = ERTC_TimeStruct.ERTC_Minutes;
|
||||||
|
tm_new.tm_hour = ERTC_TimeStruct.ERTC_Hours;
|
||||||
|
tm_new.tm_mday = ERTC_DateStruct.ERTC_Date;
|
||||||
|
tm_new.tm_mon = ERTC_DateStruct.ERTC_Month - 1;
|
||||||
|
tm_new.tm_year = ERTC_DateStruct.ERTC_Year + 100;
|
||||||
|
|
||||||
|
LOG_D("get rtc time.");
|
||||||
|
return mktime(&tm_new);
|
||||||
|
#else
|
||||||
|
return RTC_GetCounter();
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t set_rtc_time_stamp(time_t time_stamp)
|
||||||
|
{
|
||||||
|
#ifdef SOC_SERIES_AT32F415
|
||||||
|
ERTC_TimeType ERTC_TimeStructure;
|
||||||
|
ERTC_DateType ERTC_DateStructure;
|
||||||
|
|
||||||
|
struct tm *p_tm;
|
||||||
|
|
||||||
|
p_tm = localtime(&time_stamp);
|
||||||
|
if (p_tm->tm_year < 100)
|
||||||
|
{
|
||||||
|
return -RT_ERROR;
|
||||||
|
}
|
||||||
|
ERTC_TimeStructure.ERTC_Seconds = p_tm->tm_sec ;
|
||||||
|
ERTC_TimeStructure.ERTC_Minutes = p_tm->tm_min ;
|
||||||
|
ERTC_TimeStructure.ERTC_Hours = p_tm->tm_hour;
|
||||||
|
ERTC_DateStructure.ERTC_Date = p_tm->tm_mday;
|
||||||
|
ERTC_DateStructure.ERTC_Month = p_tm->tm_mon + 1 ;
|
||||||
|
ERTC_DateStructure.ERTC_Year = p_tm->tm_year - 100;
|
||||||
|
ERTC_DateStructure.ERTC_WeekDay = p_tm->tm_wday + 1;
|
||||||
|
|
||||||
|
if (ERTC_SetTimeValue(ERTC_Format_BIN, &ERTC_TimeStructure) != SUCCESS)
|
||||||
|
{
|
||||||
|
return -RT_ERROR;
|
||||||
|
}
|
||||||
|
if (ERTC_SetDateValue(ERTC_Format_BIN, &ERTC_DateStructure) != SUCCESS)
|
||||||
|
{
|
||||||
|
return -RT_ERROR;
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
/* Set the RTC counter value */
|
||||||
|
RTC_SetCounter(time_stamp);
|
||||||
|
/* Wait until last write operation on RTC registers has finished */
|
||||||
|
RTC_WaitForLastTask();
|
||||||
|
#endif /* SOC_SERIES_AT32F415 */
|
||||||
|
LOG_D("set rtc time.");
|
||||||
|
#ifdef SOC_SERIES_AT32F415
|
||||||
|
ERTC_WriteBackupRegister(ERTC_BKP_DT0, BKUP_REG_DATA);
|
||||||
|
#else
|
||||||
|
BKP_WriteBackupReg(BKP_DT1, BKUP_REG_DATA);
|
||||||
|
#endif
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void rt_rtc_init(void)
|
||||||
|
{
|
||||||
|
#if defined (SOC_SERIES_AT32F415)
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_PWR, ENABLE);
|
||||||
|
#else
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_PWR | RCC_APB1PERIPH_BKP, ENABLE);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_RTC_USING_LSI
|
||||||
|
RCC_LSICmd(ENABLE);
|
||||||
|
while(RCC_GetFlagStatus(RCC_FLAG_LSISTBL) == RESET);
|
||||||
|
#else
|
||||||
|
PWR_BackupAccessCtrl(ENABLE);
|
||||||
|
RCC_LSEConfig(RCC_LSE_ENABLE);
|
||||||
|
while(RCC_GetFlagStatus(RCC_FLAG_LSESTBL) == RESET);
|
||||||
|
#endif /* BSP_RTC_USING_LSI */
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t rt_rtc_config(struct rt_device *dev)
|
||||||
|
{
|
||||||
|
#if defined (SOC_SERIES_AT32F415)
|
||||||
|
ERTC_InitType ERTC_InitStructure;
|
||||||
|
#endif
|
||||||
|
/* Allow access to BKP Domain */
|
||||||
|
PWR_BackupAccessCtrl(ENABLE);
|
||||||
|
|
||||||
|
#ifdef SOC_SERIES_AT32F415
|
||||||
|
#ifdef BSP_RTC_USING_LSI
|
||||||
|
RCC_ERTCCLKConfig(RCC_ERTCCLKSelection_LSI);
|
||||||
|
RCC_ERTCCLKCmd(ENABLE);
|
||||||
|
#else
|
||||||
|
RCC_ERTCCLKConfig(RCC_ERTCCLKSelection_LSE);
|
||||||
|
RCC_ERTCCLKCmd(ENABLE);
|
||||||
|
#endif /* BSP_RTC_USING_LSI */
|
||||||
|
/* Wait for ERTC APB registers synchronisation */
|
||||||
|
ERTC_WaitForSynchro();
|
||||||
|
#else
|
||||||
|
#ifdef BSP_RTC_USING_LSI
|
||||||
|
RCC_RTCCLKConfig(RCC_RTCCLKSelection_LSI);
|
||||||
|
RCC_RTCCLKCmd(ENABLE);
|
||||||
|
#else
|
||||||
|
RCC_RTCCLKConfig(RCC_RTCCLKSelection_LSE);
|
||||||
|
RCC_RTCCLKCmd(ENABLE);
|
||||||
|
#endif /* BSP_RTC_USING_LSI */
|
||||||
|
/* Wait for RTC registers synchronization */
|
||||||
|
RTC_WaitForSynchro();
|
||||||
|
/* Wait until last write operation on RTC registers has finished */
|
||||||
|
RTC_WaitForLastTask();
|
||||||
|
#endif /* SOC_SERIES_AT32F415 */
|
||||||
|
|
||||||
|
#ifdef SOC_SERIES_AT32F415
|
||||||
|
if (ERTC_ReadBackupRegister(BKP_DT1)!= BKUP_REG_DATA)
|
||||||
|
#else
|
||||||
|
if (BKP_ReadBackupReg(BKP_DT1) != BKUP_REG_DATA)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
LOG_I("RTC hasn't been configured, please use <date> command to config.");
|
||||||
|
#ifdef SOC_SERIES_AT32F415
|
||||||
|
/* Configure the ERTC data register and ERTC prescaler */
|
||||||
|
ERTC_InitStructure.ERTC_AsynchPrediv = 0x7F;
|
||||||
|
ERTC_InitStructure.ERTC_SynchPrediv = 0xFF;
|
||||||
|
ERTC_InitStructure.ERTC_HourFormat = ERTC_HourFormat_24;
|
||||||
|
ERTC_Init(&ERTC_InitStructure);
|
||||||
|
#else
|
||||||
|
/* Set RTC prescaler: set RTC period to 1sec */
|
||||||
|
RTC_SetDIV(32767);
|
||||||
|
/* Wait until last write operation on RTC registers has finished */
|
||||||
|
RTC_WaitForLastTask();
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
|
||||||
|
{
|
||||||
|
rt_err_t result = RT_EOK;
|
||||||
|
RT_ASSERT(dev != RT_NULL);
|
||||||
|
switch (cmd)
|
||||||
|
{
|
||||||
|
case RT_DEVICE_CTRL_RTC_GET_TIME:
|
||||||
|
*(rt_uint32_t *)args = get_rtc_timestamp();
|
||||||
|
LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case RT_DEVICE_CTRL_RTC_SET_TIME:
|
||||||
|
if (set_rtc_time_stamp(*(rt_uint32_t *)args))
|
||||||
|
{
|
||||||
|
result = -RT_ERROR;
|
||||||
|
}
|
||||||
|
LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
return result;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef RT_USING_DEVICE_OPS
|
||||||
|
const static struct rt_device_ops rtc_ops =
|
||||||
|
{
|
||||||
|
RT_NULL,
|
||||||
|
RT_NULL,
|
||||||
|
RT_NULL,
|
||||||
|
RT_NULL,
|
||||||
|
RT_NULL,
|
||||||
|
rt_rtc_control
|
||||||
|
};
|
||||||
|
#endif
|
||||||
|
|
||||||
|
static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint32_t flag)
|
||||||
|
{
|
||||||
|
RT_ASSERT(device != RT_NULL);
|
||||||
|
|
||||||
|
rt_rtc_init();
|
||||||
|
if (rt_rtc_config(device) != RT_EOK)
|
||||||
|
{
|
||||||
|
return -RT_ERROR;
|
||||||
|
}
|
||||||
|
#ifdef RT_USING_DEVICE_OPS
|
||||||
|
device->ops = &rtc_ops;
|
||||||
|
#else
|
||||||
|
device->init = RT_NULL;
|
||||||
|
device->open = RT_NULL;
|
||||||
|
device->close = RT_NULL;
|
||||||
|
device->read = RT_NULL;
|
||||||
|
device->write = RT_NULL;
|
||||||
|
device->control = rt_rtc_control;
|
||||||
|
#endif
|
||||||
|
device->type = RT_Device_Class_RTC;
|
||||||
|
device->rx_indicate = RT_NULL;
|
||||||
|
device->tx_complete = RT_NULL;
|
||||||
|
device->user_data = RT_NULL;
|
||||||
|
|
||||||
|
/* register a character device */
|
||||||
|
return rt_device_register(device, name, flag);
|
||||||
|
}
|
||||||
|
|
||||||
|
int rt_hw_rtc_init(void)
|
||||||
|
{
|
||||||
|
rt_err_t result;
|
||||||
|
result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
|
||||||
|
if (result != RT_EOK)
|
||||||
|
{
|
||||||
|
LOG_E("rtc register err code: %d", result);
|
||||||
|
return result;
|
||||||
|
}
|
||||||
|
LOG_D("rtc init success");
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
INIT_DEVICE_EXPORT(rt_hw_rtc_init);
|
||||||
|
|
||||||
|
#endif /* BSP_USING_RTC */
|
||||||
|
|
@ -47,6 +47,7 @@ AT32F403A-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
|
||||||
| HWTIMER | 支持 | TMR3/4/5 |
|
| HWTIMER | 支持 | TMR3/4/5 |
|
||||||
| SDIO | 支持 | SDIO1 |
|
| SDIO | 支持 | SDIO1 |
|
||||||
| WDT | 支持 | |
|
| WDT | 支持 | |
|
||||||
|
| RTC | 支持 | |
|
||||||
|
|
||||||
### IO在板级支持包中的映射情况
|
### IO在板级支持包中的映射情况
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -24,6 +24,24 @@ menu "On-chip Peripheral Drivers"
|
||||||
select RT_USING_PIN
|
select RT_USING_PIN
|
||||||
default y
|
default y
|
||||||
|
|
||||||
|
menuconfig BSP_USING_RTC
|
||||||
|
bool "Enable RTC"
|
||||||
|
select RT_USING_RTC
|
||||||
|
select RT_USING_LIBC
|
||||||
|
default n
|
||||||
|
if BSP_USING_RTC
|
||||||
|
choice
|
||||||
|
prompt "Select clock source"
|
||||||
|
default BSP_RTC_USING_LSE
|
||||||
|
|
||||||
|
config BSP_RTC_USING_LSE
|
||||||
|
bool "RTC USING LSE"
|
||||||
|
|
||||||
|
config BSP_RTC_USING_LSI
|
||||||
|
bool "RTC USING LSI"
|
||||||
|
endchoice
|
||||||
|
endif
|
||||||
|
|
||||||
menuconfig BSP_USING_UART
|
menuconfig BSP_USING_UART
|
||||||
bool "Enable UART"
|
bool "Enable UART"
|
||||||
default y
|
default y
|
||||||
|
|
|
||||||
|
|
@ -23,7 +23,7 @@
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
#include "at32_msp.h"
|
#include "at32_msp.h"
|
||||||
|
|
||||||
#ifdef BSP_USING_SERIAL
|
#ifdef BSP_USING_UART
|
||||||
void at32_msp_usart_init(void *Instance)
|
void at32_msp_usart_init(void *Instance)
|
||||||
{
|
{
|
||||||
GPIO_InitType GPIO_InitStruct;
|
GPIO_InitType GPIO_InitStruct;
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,486 @@
|
||||||
|
#
|
||||||
|
# Automatically generated file; DO NOT EDIT.
|
||||||
|
# RT-Thread Configuration
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# RT-Thread Kernel
|
||||||
|
#
|
||||||
|
CONFIG_RT_NAME_MAX=8
|
||||||
|
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
|
||||||
|
# CONFIG_RT_USING_SMP is not set
|
||||||
|
CONFIG_RT_ALIGN_SIZE=4
|
||||||
|
# CONFIG_RT_THREAD_PRIORITY_8 is not set
|
||||||
|
CONFIG_RT_THREAD_PRIORITY_32=y
|
||||||
|
# CONFIG_RT_THREAD_PRIORITY_256 is not set
|
||||||
|
CONFIG_RT_THREAD_PRIORITY_MAX=32
|
||||||
|
CONFIG_RT_TICK_PER_SECOND=1000
|
||||||
|
CONFIG_RT_USING_OVERFLOW_CHECK=y
|
||||||
|
CONFIG_RT_USING_HOOK=y
|
||||||
|
CONFIG_RT_USING_IDLE_HOOK=y
|
||||||
|
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
|
||||||
|
CONFIG_IDLE_THREAD_STACK_SIZE=256
|
||||||
|
CONFIG_RT_USING_TIMER_SOFT=y
|
||||||
|
CONFIG_RT_TIMER_THREAD_PRIO=4
|
||||||
|
CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
|
||||||
|
CONFIG_RT_DEBUG=y
|
||||||
|
CONFIG_RT_DEBUG_COLOR=y
|
||||||
|
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Inter-Thread communication
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_SEMAPHORE=y
|
||||||
|
CONFIG_RT_USING_MUTEX=y
|
||||||
|
CONFIG_RT_USING_EVENT=y
|
||||||
|
CONFIG_RT_USING_MAILBOX=y
|
||||||
|
CONFIG_RT_USING_MESSAGEQUEUE=y
|
||||||
|
# CONFIG_RT_USING_SIGNALS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Memory Management
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_MEMPOOL=y
|
||||||
|
CONFIG_RT_USING_MEMHEAP=y
|
||||||
|
# CONFIG_RT_USING_NOHEAP is not set
|
||||||
|
CONFIG_RT_USING_SMALL_MEM=y
|
||||||
|
# CONFIG_RT_USING_SLAB is not set
|
||||||
|
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
|
||||||
|
# CONFIG_RT_USING_MEMTRACE is not set
|
||||||
|
CONFIG_RT_USING_HEAP=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Kernel Device Object
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_DEVICE=y
|
||||||
|
# CONFIG_RT_USING_DEVICE_OPS is not set
|
||||||
|
# CONFIG_RT_USING_INTERRUPT_INFO is not set
|
||||||
|
CONFIG_RT_USING_CONSOLE=y
|
||||||
|
CONFIG_RT_CONSOLEBUF_SIZE=128
|
||||||
|
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
|
||||||
|
CONFIG_RT_VER_NUM=0x40003
|
||||||
|
CONFIG_ARCH_ARM=y
|
||||||
|
CONFIG_RT_USING_CPU_FFS=y
|
||||||
|
CONFIG_ARCH_ARM_CORTEX_M=y
|
||||||
|
CONFIG_ARCH_ARM_CORTEX_M4=y
|
||||||
|
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# RT-Thread Components
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_COMPONENTS_INIT=y
|
||||||
|
CONFIG_RT_USING_USER_MAIN=y
|
||||||
|
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
|
||||||
|
CONFIG_RT_MAIN_THREAD_PRIORITY=10
|
||||||
|
|
||||||
|
#
|
||||||
|
# C++ features
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_CPLUSPLUS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Command shell
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_FINSH=y
|
||||||
|
CONFIG_FINSH_THREAD_NAME="tshell"
|
||||||
|
CONFIG_FINSH_USING_HISTORY=y
|
||||||
|
CONFIG_FINSH_HISTORY_LINES=5
|
||||||
|
CONFIG_FINSH_USING_SYMTAB=y
|
||||||
|
CONFIG_FINSH_USING_DESCRIPTION=y
|
||||||
|
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
|
||||||
|
CONFIG_FINSH_THREAD_PRIORITY=20
|
||||||
|
CONFIG_FINSH_THREAD_STACK_SIZE=4096
|
||||||
|
CONFIG_FINSH_CMD_SIZE=80
|
||||||
|
# CONFIG_FINSH_USING_AUTH is not set
|
||||||
|
CONFIG_FINSH_USING_MSH=y
|
||||||
|
CONFIG_FINSH_USING_MSH_DEFAULT=y
|
||||||
|
CONFIG_FINSH_USING_MSH_ONLY=y
|
||||||
|
CONFIG_FINSH_ARG_MAX=10
|
||||||
|
|
||||||
|
#
|
||||||
|
# Device virtual file system
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_DFS=y
|
||||||
|
CONFIG_DFS_USING_WORKDIR=y
|
||||||
|
CONFIG_DFS_FILESYSTEMS_MAX=2
|
||||||
|
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
|
||||||
|
CONFIG_DFS_FD_MAX=16
|
||||||
|
# CONFIG_RT_USING_DFS_MNTTABLE is not set
|
||||||
|
CONFIG_RT_USING_DFS_ELMFAT=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# elm-chan's FatFs, Generic FAT Filesystem Module
|
||||||
|
#
|
||||||
|
CONFIG_RT_DFS_ELM_CODE_PAGE=437
|
||||||
|
CONFIG_RT_DFS_ELM_WORD_ACCESS=y
|
||||||
|
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
|
||||||
|
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
|
||||||
|
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
|
||||||
|
CONFIG_RT_DFS_ELM_USE_LFN_3=y
|
||||||
|
CONFIG_RT_DFS_ELM_USE_LFN=3
|
||||||
|
CONFIG_RT_DFS_ELM_MAX_LFN=255
|
||||||
|
CONFIG_RT_DFS_ELM_DRIVES=2
|
||||||
|
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
|
||||||
|
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
|
||||||
|
CONFIG_RT_DFS_ELM_REENTRANT=y
|
||||||
|
CONFIG_RT_USING_DFS_DEVFS=y
|
||||||
|
# CONFIG_RT_USING_DFS_ROMFS is not set
|
||||||
|
# CONFIG_RT_USING_DFS_RAMFS is not set
|
||||||
|
# CONFIG_RT_USING_DFS_UFFS is not set
|
||||||
|
# CONFIG_RT_USING_DFS_JFFS2 is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Device Drivers
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_DEVICE_IPC=y
|
||||||
|
CONFIG_RT_PIPE_BUFSZ=512
|
||||||
|
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
|
||||||
|
CONFIG_RT_USING_SERIAL=y
|
||||||
|
# CONFIG_RT_SERIAL_USING_DMA is not set
|
||||||
|
CONFIG_RT_SERIAL_RB_BUFSZ=64
|
||||||
|
# CONFIG_RT_USING_CAN is not set
|
||||||
|
CONFIG_RT_USING_HWTIMER=y
|
||||||
|
# CONFIG_RT_USING_CPUTIME is not set
|
||||||
|
CONFIG_RT_USING_I2C=y
|
||||||
|
# CONFIG_RT_I2C_DEBUG is not set
|
||||||
|
CONFIG_RT_USING_I2C_BITOPS=y
|
||||||
|
# CONFIG_RT_I2C_BITOPS_DEBUG is not set
|
||||||
|
CONFIG_RT_USING_PIN=y
|
||||||
|
CONFIG_RT_USING_ADC=y
|
||||||
|
CONFIG_RT_USING_PWM=y
|
||||||
|
# CONFIG_RT_USING_MTD_NOR is not set
|
||||||
|
# CONFIG_RT_USING_MTD_NAND is not set
|
||||||
|
# CONFIG_RT_USING_PM is not set
|
||||||
|
CONFIG_RT_USING_RTC=y
|
||||||
|
# CONFIG_RT_USING_ALARM is not set
|
||||||
|
# CONFIG_RT_USING_SOFT_RTC is not set
|
||||||
|
CONFIG_RT_USING_SDIO=y
|
||||||
|
CONFIG_RT_SDIO_STACK_SIZE=512
|
||||||
|
CONFIG_RT_SDIO_THREAD_PRIORITY=15
|
||||||
|
CONFIG_RT_MMCSD_STACK_SIZE=1024
|
||||||
|
CONFIG_RT_MMCSD_THREAD_PREORITY=22
|
||||||
|
CONFIG_RT_MMCSD_MAX_PARTITION=16
|
||||||
|
# CONFIG_RT_SDIO_DEBUG is not set
|
||||||
|
CONFIG_RT_USING_SPI=y
|
||||||
|
# CONFIG_RT_USING_QSPI is not set
|
||||||
|
# CONFIG_RT_USING_SPI_MSD is not set
|
||||||
|
# CONFIG_RT_USING_SFUD is not set
|
||||||
|
# CONFIG_RT_USING_ENC28J60 is not set
|
||||||
|
# CONFIG_RT_USING_SPI_WIFI is not set
|
||||||
|
# CONFIG_RT_USING_WDT is not set
|
||||||
|
# CONFIG_RT_USING_AUDIO is not set
|
||||||
|
# CONFIG_RT_USING_SENSOR is not set
|
||||||
|
# CONFIG_RT_USING_TOUCH is not set
|
||||||
|
# CONFIG_RT_USING_HWCRYPTO is not set
|
||||||
|
# CONFIG_RT_USING_PULSE_ENCODER is not set
|
||||||
|
# CONFIG_RT_USING_INPUT_CAPTURE is not set
|
||||||
|
# CONFIG_RT_USING_WIFI is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Using USB
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_USB_HOST is not set
|
||||||
|
# CONFIG_RT_USING_USB_DEVICE is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# POSIX layer and C standard library
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_LIBC=y
|
||||||
|
# CONFIG_RT_USING_PTHREADS is not set
|
||||||
|
CONFIG_RT_USING_POSIX=y
|
||||||
|
# CONFIG_RT_USING_POSIX_MMAP is not set
|
||||||
|
# CONFIG_RT_USING_POSIX_TERMIOS is not set
|
||||||
|
# CONFIG_RT_USING_POSIX_AIO is not set
|
||||||
|
# CONFIG_RT_USING_MODULE is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Network
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Socket abstraction layer
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_SAL is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Network interface device
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_NETDEV is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# light weight TCP/IP stack
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_LWIP is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# AT commands
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_AT is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# VBUS(Virtual Software BUS)
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_VBUS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Utilities
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_RYM is not set
|
||||||
|
# CONFIG_RT_USING_ULOG is not set
|
||||||
|
# CONFIG_RT_USING_UTEST is not set
|
||||||
|
# CONFIG_RT_USING_LWP is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# RT-Thread online packages
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# IoT - internet of things
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_PAHOMQTT is not set
|
||||||
|
# CONFIG_PKG_USING_WEBCLIENT is not set
|
||||||
|
# CONFIG_PKG_USING_WEBNET is not set
|
||||||
|
# CONFIG_PKG_USING_MONGOOSE is not set
|
||||||
|
# CONFIG_PKG_USING_MYMQTT is not set
|
||||||
|
# CONFIG_PKG_USING_KAWAII_MQTT is not set
|
||||||
|
# CONFIG_PKG_USING_WEBTERMINAL is not set
|
||||||
|
# CONFIG_PKG_USING_CJSON is not set
|
||||||
|
# CONFIG_PKG_USING_JSMN is not set
|
||||||
|
# CONFIG_PKG_USING_LIBMODBUS is not set
|
||||||
|
# CONFIG_PKG_USING_FREEMODBUS is not set
|
||||||
|
# CONFIG_PKG_USING_LJSON is not set
|
||||||
|
# CONFIG_PKG_USING_EZXML is not set
|
||||||
|
# CONFIG_PKG_USING_NANOPB is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Wi-Fi
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Marvell WiFi
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_WLANMARVELL is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Wiced WiFi
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_WLAN_WICED is not set
|
||||||
|
# CONFIG_PKG_USING_RW007 is not set
|
||||||
|
# CONFIG_PKG_USING_COAP is not set
|
||||||
|
# CONFIG_PKG_USING_NOPOLL is not set
|
||||||
|
# CONFIG_PKG_USING_NETUTILS is not set
|
||||||
|
# CONFIG_PKG_USING_PPP_DEVICE is not set
|
||||||
|
# CONFIG_PKG_USING_AT_DEVICE is not set
|
||||||
|
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
|
||||||
|
# CONFIG_PKG_USING_WIZNET is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# IoT Cloud
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_ONENET is not set
|
||||||
|
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
|
||||||
|
# CONFIG_PKG_USING_ALI_IOTKIT is not set
|
||||||
|
# CONFIG_PKG_USING_AZURE is not set
|
||||||
|
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
|
||||||
|
# CONFIG_PKG_USING_JIOT-C-SDK is not set
|
||||||
|
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
|
||||||
|
# CONFIG_PKG_USING_JOYLINK is not set
|
||||||
|
# CONFIG_PKG_USING_NIMBLE is not set
|
||||||
|
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
|
||||||
|
# CONFIG_PKG_USING_IPMSG is not set
|
||||||
|
# CONFIG_PKG_USING_LSSDP is not set
|
||||||
|
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
|
||||||
|
# CONFIG_PKG_USING_LIBRWS is not set
|
||||||
|
# CONFIG_PKG_USING_TCPSERVER is not set
|
||||||
|
# CONFIG_PKG_USING_PROTOBUF_C is not set
|
||||||
|
# CONFIG_PKG_USING_ONNX_PARSER is not set
|
||||||
|
# CONFIG_PKG_USING_ONNX_BACKEND is not set
|
||||||
|
# CONFIG_PKG_USING_DLT645 is not set
|
||||||
|
# CONFIG_PKG_USING_QXWZ is not set
|
||||||
|
# CONFIG_PKG_USING_SMTP_CLIENT is not set
|
||||||
|
# CONFIG_PKG_USING_ABUP_FOTA is not set
|
||||||
|
# CONFIG_PKG_USING_LIBCURL2RTT is not set
|
||||||
|
# CONFIG_PKG_USING_CAPNP is not set
|
||||||
|
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
|
||||||
|
# CONFIG_PKG_USING_AGILE_TELNET is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# security packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_MBEDTLS is not set
|
||||||
|
# CONFIG_PKG_USING_libsodium is not set
|
||||||
|
# CONFIG_PKG_USING_TINYCRYPT is not set
|
||||||
|
# CONFIG_PKG_USING_TFM is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# language packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_LUA is not set
|
||||||
|
# CONFIG_PKG_USING_JERRYSCRIPT is not set
|
||||||
|
# CONFIG_PKG_USING_MICROPYTHON is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# multimedia packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_OPENMV is not set
|
||||||
|
# CONFIG_PKG_USING_MUPDF is not set
|
||||||
|
# CONFIG_PKG_USING_STEMWIN is not set
|
||||||
|
# CONFIG_PKG_USING_WAVPLAYER is not set
|
||||||
|
# CONFIG_PKG_USING_TJPGD is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# tools packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_CMBACKTRACE is not set
|
||||||
|
# CONFIG_PKG_USING_EASYFLASH is not set
|
||||||
|
# CONFIG_PKG_USING_EASYLOGGER is not set
|
||||||
|
# CONFIG_PKG_USING_SYSTEMVIEW is not set
|
||||||
|
# CONFIG_PKG_USING_RDB is not set
|
||||||
|
# CONFIG_PKG_USING_QRCODE is not set
|
||||||
|
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
|
||||||
|
# CONFIG_PKG_USING_ADBD is not set
|
||||||
|
# CONFIG_PKG_USING_COREMARK is not set
|
||||||
|
# CONFIG_PKG_USING_DHRYSTONE is not set
|
||||||
|
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
|
||||||
|
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
|
||||||
|
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
|
||||||
|
# CONFIG_PKG_USING_BS8116A is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# system packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_GUIENGINE is not set
|
||||||
|
# CONFIG_PKG_USING_PERSIMMON is not set
|
||||||
|
# CONFIG_PKG_USING_CAIRO is not set
|
||||||
|
# CONFIG_PKG_USING_PIXMAN is not set
|
||||||
|
# CONFIG_PKG_USING_LWEXT4 is not set
|
||||||
|
# CONFIG_PKG_USING_PARTITION is not set
|
||||||
|
# CONFIG_PKG_USING_FAL is not set
|
||||||
|
# CONFIG_PKG_USING_SQLITE is not set
|
||||||
|
# CONFIG_PKG_USING_RTI is not set
|
||||||
|
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
|
||||||
|
# CONFIG_PKG_USING_CMSIS is not set
|
||||||
|
# CONFIG_PKG_USING_DFS_YAFFS is not set
|
||||||
|
# CONFIG_PKG_USING_LITTLEFS is not set
|
||||||
|
# CONFIG_PKG_USING_THREAD_POOL is not set
|
||||||
|
# CONFIG_PKG_USING_ROBOTS is not set
|
||||||
|
# CONFIG_PKG_USING_EV is not set
|
||||||
|
# CONFIG_PKG_USING_SYSWATCH is not set
|
||||||
|
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
|
||||||
|
# CONFIG_PKG_USING_PLCCORE is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# peripheral libraries and drivers
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
|
||||||
|
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
|
||||||
|
# CONFIG_PKG_USING_SHT2X is not set
|
||||||
|
# CONFIG_PKG_USING_SHT3X is not set
|
||||||
|
# CONFIG_PKG_USING_STM32_SDIO is not set
|
||||||
|
# CONFIG_PKG_USING_ICM20608 is not set
|
||||||
|
# CONFIG_PKG_USING_U8G2 is not set
|
||||||
|
# CONFIG_PKG_USING_BUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_PCF8574 is not set
|
||||||
|
# CONFIG_PKG_USING_SX12XX is not set
|
||||||
|
# CONFIG_PKG_USING_SIGNAL_LED is not set
|
||||||
|
# CONFIG_PKG_USING_LEDBLINK is not set
|
||||||
|
# CONFIG_PKG_USING_LITTLED is not set
|
||||||
|
# CONFIG_PKG_USING_LKDGUI is not set
|
||||||
|
# CONFIG_PKG_USING_WM_LIBRARIES is not set
|
||||||
|
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
|
||||||
|
# CONFIG_PKG_USING_INFRARED is not set
|
||||||
|
# CONFIG_PKG_USING_ROSSERIAL is not set
|
||||||
|
# CONFIG_PKG_USING_AGILE_BUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_AGILE_LED is not set
|
||||||
|
# CONFIG_PKG_USING_AT24CXX is not set
|
||||||
|
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
|
||||||
|
# CONFIG_PKG_USING_AD7746 is not set
|
||||||
|
# CONFIG_PKG_USING_PCA9685 is not set
|
||||||
|
# CONFIG_PKG_USING_I2C_TOOLS is not set
|
||||||
|
# CONFIG_PKG_USING_NRF24L01 is not set
|
||||||
|
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
|
||||||
|
# CONFIG_PKG_USING_MAX17048 is not set
|
||||||
|
# CONFIG_PKG_USING_RPLIDAR is not set
|
||||||
|
# CONFIG_PKG_USING_AS608 is not set
|
||||||
|
# CONFIG_PKG_USING_RC522 is not set
|
||||||
|
# CONFIG_PKG_USING_EMBARC_BSP is not set
|
||||||
|
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
|
||||||
|
# CONFIG_PKG_USING_MAX7219 is not set
|
||||||
|
# CONFIG_PKG_USING_BEEP is not set
|
||||||
|
# CONFIG_PKG_USING_EASYBLINK is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# miscellaneous packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_LIBCSV is not set
|
||||||
|
# CONFIG_PKG_USING_OPTPARSE is not set
|
||||||
|
# CONFIG_PKG_USING_FASTLZ is not set
|
||||||
|
# CONFIG_PKG_USING_MINILZO is not set
|
||||||
|
# CONFIG_PKG_USING_QUICKLZ is not set
|
||||||
|
# CONFIG_PKG_USING_MULTIBUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_CANFESTIVAL is not set
|
||||||
|
# CONFIG_PKG_USING_ZLIB is not set
|
||||||
|
# CONFIG_PKG_USING_DSTR is not set
|
||||||
|
# CONFIG_PKG_USING_TINYFRAME is not set
|
||||||
|
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
|
||||||
|
# CONFIG_PKG_USING_DIGITALCTRL is not set
|
||||||
|
# CONFIG_PKG_USING_UPACKER is not set
|
||||||
|
# CONFIG_PKG_USING_UPARAM is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# samples: kernel and components samples
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_HELLO is not set
|
||||||
|
# CONFIG_PKG_USING_VI is not set
|
||||||
|
# CONFIG_PKG_USING_NNOM is not set
|
||||||
|
# CONFIG_PKG_USING_LIBANN is not set
|
||||||
|
# CONFIG_PKG_USING_ELAPACK is not set
|
||||||
|
# CONFIG_PKG_USING_ARMv7M_DWT is not set
|
||||||
|
# CONFIG_PKG_USING_VT100 is not set
|
||||||
|
# CONFIG_PKG_USING_ULAPACK is not set
|
||||||
|
# CONFIG_PKG_USING_UKAL is not set
|
||||||
|
CONFIG_SOC_FAMILY_AT32=y
|
||||||
|
CONFIG_SOC_SERIES_AT32F407=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Hardware Drivers Config
|
||||||
|
#
|
||||||
|
CONFIG_SOC_AT32F407VGT7=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Onboard Peripheral Drivers
|
||||||
|
#
|
||||||
|
CONFIG_BSP_USING_SERIAL=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# On-chip Peripheral Drivers
|
||||||
|
#
|
||||||
|
CONFIG_BSP_USING_GPIO=y
|
||||||
|
# CONFIG_BSP_USING_ETH is not set
|
||||||
|
# CONFIG_BSP_USING_RTC is not set
|
||||||
|
# CONFIG_BSP_RTC_USING_LSE is not set
|
||||||
|
# CONFIG_BSP_RTC_USING_LSI is not set
|
||||||
|
CONFIG_BSP_USING_UART=y
|
||||||
|
CONFIG_BSP_USING_UART1=y
|
||||||
|
CONFIG_BSP_USING_UART2=y
|
||||||
|
CONFIG_BSP_USING_UART3=y
|
||||||
|
# CONFIG_BSP_USING_PWM is not set
|
||||||
|
# CONFIG_BSP_USING_HWTIMER is not set
|
||||||
|
# CONFIG_BSP_USING_SPI is not set
|
||||||
|
# CONFIG_BSP_USING_I2C1 is not set
|
||||||
|
# CONFIG_BSP_USING_ADC is not set
|
||||||
|
# CONFIG_BSP_USING_SDIO is not set
|
||||||
|
|
@ -0,0 +1,39 @@
|
||||||
|
[BREAKPOINTS]
|
||||||
|
ForceImpTypeAny = 0
|
||||||
|
ShowInfoWin = 1
|
||||||
|
EnableFlashBP = 2
|
||||||
|
BPDuringExecution = 0
|
||||||
|
[CFI]
|
||||||
|
CFISize = 0x00
|
||||||
|
CFIAddr = 0x00
|
||||||
|
[CPU]
|
||||||
|
MonModeVTableAddr = 0xFFFFFFFF
|
||||||
|
MonModeDebug = 0
|
||||||
|
MaxNumAPs = 0
|
||||||
|
LowPowerHandlingMode = 0
|
||||||
|
OverrideMemMap = 0
|
||||||
|
AllowSimulation = 1
|
||||||
|
ScriptFile=""
|
||||||
|
[FLASH]
|
||||||
|
CacheExcludeSize = 0x00
|
||||||
|
CacheExcludeAddr = 0x00
|
||||||
|
MinNumBytesFlashDL = 0
|
||||||
|
SkipProgOnCRCMatch = 1
|
||||||
|
VerifyDownload = 1
|
||||||
|
AllowCaching = 1
|
||||||
|
EnableFlashDL = 2
|
||||||
|
Override = 1
|
||||||
|
Device="Cortex-M4"
|
||||||
|
[GENERAL]
|
||||||
|
WorkRAMSize = 0x00
|
||||||
|
WorkRAMAddr = 0x00
|
||||||
|
RAMUsageLimit = 0x00
|
||||||
|
[SWO]
|
||||||
|
SWOLogFile=""
|
||||||
|
[MEM]
|
||||||
|
RdOverrideOrMask = 0x00
|
||||||
|
RdOverrideAndMask = 0xFFFFFFFF
|
||||||
|
RdOverrideAddr = 0xFFFFFFFF
|
||||||
|
WrOverrideOrMask = 0x00
|
||||||
|
WrOverrideAndMask = 0xFFFFFFFF
|
||||||
|
WrOverrideAddr = 0xFFFFFFFF
|
||||||
|
|
@ -0,0 +1,22 @@
|
||||||
|
mainmenu "RT-Thread Configuration"
|
||||||
|
|
||||||
|
config BSP_DIR
|
||||||
|
string
|
||||||
|
option env="BSP_ROOT"
|
||||||
|
default "."
|
||||||
|
|
||||||
|
config RTT_DIR
|
||||||
|
string
|
||||||
|
option env="RTT_ROOT"
|
||||||
|
default "../../.."
|
||||||
|
|
||||||
|
config PKGS_DIR
|
||||||
|
string
|
||||||
|
option env="PKGS_ROOT"
|
||||||
|
default "packages"
|
||||||
|
|
||||||
|
source "$RTT_DIR/Kconfig"
|
||||||
|
source "$PKGS_DIR/Kconfig"
|
||||||
|
source "../libraries/Kconfig"
|
||||||
|
source "board/Kconfig"
|
||||||
|
|
||||||
|
|
@ -0,0 +1,142 @@
|
||||||
|
# AT32F407 AT-START 开发板 BSP 说明
|
||||||
|
|
||||||
|
## 简介
|
||||||
|
|
||||||
|
AT32F407 AT-START是雅特力推出的一款AT32F407系列的评估板，其搭载的MCU主要资源参数如下：
|
||||||
|
|
||||||
|
| 硬件 | 描述 |
|
||||||
|
| --------- | ------------- |
|
||||||
|
| 芯片型号 | AT32F407VGT7 |
|
||||||
|
| CPU | ARM Cortex M4 |
|
||||||
|
| 主频 | 240M |
|
||||||
|
| 片内SRAM | 96K可扩展224K |
|
||||||
|
| 片内FLASH | 1024K |
|
||||||
|
|
||||||
|
## 编译说明
|
||||||
|
|
||||||
|
AT32F407-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以下是具体版本信息：
|
||||||
|
|
||||||
|
| IDE/编译器 | 已测试版本 |
|
||||||
|
| ---------- | ---------------------------- |
|
||||||
|
| MDK4 | MDK4.74 |
|
||||||
|
| MDK5 | MDK523 |
|
||||||
|
| IAR | IAR8.20 |
|
||||||
|
| GCC | GCC 5.4.1 20160919 (release) |
|
||||||
|
|
||||||
|
## 板载资源
|
||||||
|
|
||||||
|
- MCU：AT32F407VGT7，主频 240MHz，1024KB FLASH ，96KB可扩展到224KB RAM
|
||||||
|
- 常用外设
|
||||||
|
- LED：3个，（红色PD13、白色PD14、绿色PD15）
|
||||||
|
- 按键：1个，KEY_USER（兼具唤醒功能，PA0)
|
||||||
|
- 常用接口：插针串口J8
|
||||||
|
- 调试接口，JLINK、板载的 AT-LINK SWD 下载
|
||||||
|
|
||||||
|
## 外设支持
|
||||||
|
|
||||||
|
本 BSP 目前对外设驱动的支持情况如下：
|
||||||
|
|
||||||
|
| 驱动 | 支持情况 | 备注 |
|
||||||
|
| --------- | -------- | :------------------------: |
|
||||||
|
| UART | 支持 | USART1/2/3 |
|
||||||
|
| GPIO | 支持 | PA0...PF7 |
|
||||||
|
| IIC | 支持 | GPIO模拟I2C |
|
||||||
|
| SPI | 支持 | SPI1/2 |
|
||||||
|
| ADC | 支持 | ADC1/2 |
|
||||||
|
| PWM | 支持 | TMR1/2 |
|
||||||
|
| HWTIMER | 支持 | TMR3/4/5 |
|
||||||
|
| SDIO | 支持 | SDIO1 |
|
||||||
|
| WDT | 支持 | |
|
||||||
|
| RTC | 支持 | |
|
||||||
|
| ETH | 支持 | |
|
||||||
|
|
||||||
|
### IO在板级支持包中的映射情况
|
||||||
|
|
||||||
|
| IO号 | 板级包中的定义 |
|
||||||
|
| ---- | -------------- |
|
||||||
|
| PD13 | LED2 |
|
||||||
|
| PD14 | LED3 |
|
||||||
|
| PD15 | LED4 |
|
||||||
|
| PA9 | USART1_TX |
|
||||||
|
| PA10 | USART1_RX |
|
||||||
|
| PA2 | USART2_TX |
|
||||||
|
| PA3 | USART2_RX |
|
||||||
|
| PB10 | USART3_TX |
|
||||||
|
| PB11 | USART3_RX |
|
||||||
|
| PA4 | SPI1_NSS |
|
||||||
|
| PA5 | SPI1_SCK |
|
||||||
|
| PA6 | SPI1_MISO |
|
||||||
|
| PA7 | SPI1_MOSI |
|
||||||
|
| PB12 | SPI2_NSS |
|
||||||
|
| PB13 | SPI2_SCK |
|
||||||
|
| PB14 | SPI2_MISO |
|
||||||
|
| PB15 | SPI2_MOSI |
|
||||||
|
| PB6 | I2C1_SCL |
|
||||||
|
| PB7 | I2C1_SDA |
|
||||||
|
| PC8 | SDIO1_D0 |
|
||||||
|
| PC9 | SDIO1_D1 |
|
||||||
|
| PC10 | SDIO1_D2 |
|
||||||
|
| PC11 | SDIO1_D3 |
|
||||||
|
| PC12 | SDIO1_CK |
|
||||||
|
| PD2 | SDIO1_CMD |
|
||||||
|
| PA8 | PWM_TMR1_CH1 |
|
||||||
|
| PA11 | PWM_TMR1_CH4 |
|
||||||
|
| PA0 | PWM_TMR2_CH1 |
|
||||||
|
| PA1 | PWM_TMR2_CH2 |
|
||||||
|
| PC0 | ADC1/2_IN10 |
|
||||||
|
| PC1 | ADC1/2_IN11 |
|
||||||
|
| PC2 | ADC1/2_IN12 |
|
||||||
|
| PC3 | ADC1/2_IN13 |
|
||||||
|
| PC4 | ADC1/2_IN14 |
|
||||||
|
| PC5 | ADC1/2_IN15 |
|
||||||
|
| PB11 | ETH_RMII_TX_EN |
|
||||||
|
| PB12 | ETH_RMII_TX0 |
|
||||||
|
| PB13 | ETH_RMII_TX1 |
|
||||||
|
| PD8 | ETH_RMII_RX_DV |
|
||||||
|
| PD9 | ETH_RMII_RXD0 |
|
||||||
|
| PD10 | ETH_RMII_RXD1 |
|
||||||
|
| PA1 | ETH_RMII_REF_CLK |
|
||||||
|
|
||||||
|
## 使用说明
|
||||||
|
|
||||||
|
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
|
||||||
|
|
||||||
|
### 快速上手
|
||||||
|
|
||||||
|
本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
|
||||||
|
|
||||||
|
#### 硬件连接
|
||||||
|
|
||||||
|
使用数据线连接开发板到 PC，打开电源开关。
|
||||||
|
|
||||||
|
#### 编译下载
|
||||||
|
|
||||||
|
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
|
||||||
|
|
||||||
|
> 工程默认配置使用 JLink 下载程序，在通过 JLink 连接开发板的基础上，点击下载按钮即可下载程序到开发板
|
||||||
|
|
||||||
|
#### 运行结果
|
||||||
|
|
||||||
|
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，LED2/3/4 会周期性闪烁。
|
||||||
|
|
||||||
|
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，在串口上可以看到 RT-Thread 的输出信息:
|
||||||
|
|
||||||
|
```bash
|
||||||
|
\ | /
|
||||||
|
- RT - Thread Operating System
|
||||||
|
/ | \ 4.0.3 build Mar 9 2020
|
||||||
|
2006 - 2020 Copyright by rt-thread team
|
||||||
|
msh />
|
||||||
|
```
|
||||||
|
|
||||||
|
## 注意事项
|
||||||
|
|
||||||
|
AT32F407使用Ethernet且PHY时钟由MCO输出提供时，主频最好采用200Mhz。
|
||||||
|
|
||||||
|
可在雅特力官方网站进行所需资料下载，如Keil_v5/Keil_v4/IAR等pack安装包和AT-START开发板原理图等（www.arterytek.com）
|
||||||
|
|
||||||
|
## 联系人信息
|
||||||
|
|
||||||
|
维护人:
|
||||||
|
|
||||||
|
- [sheltonyu](https://github.com/sheltonyu)
|
||||||
|
|
@ -0,0 +1,15 @@
|
||||||
|
# for module compiling
|
||||||
|
import os
|
||||||
|
Import('RTT_ROOT')
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
cwd = GetCurrentDir()
|
||||||
|
objs = []
|
||||||
|
list = os.listdir(cwd)
|
||||||
|
|
||||||
|
for d in list:
|
||||||
|
path = os.path.join(cwd, d)
|
||||||
|
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||||
|
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||||
|
|
||||||
|
Return('objs')
|
||||||
|
|
@ -0,0 +1,59 @@
|
||||||
|
import os
|
||||||
|
import sys
|
||||||
|
import rtconfig
|
||||||
|
|
||||||
|
if os.getenv('RTT_ROOT'):
|
||||||
|
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||||
|
else:
|
||||||
|
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||||
|
|
||||||
|
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||||
|
try:
|
||||||
|
from building import *
|
||||||
|
except:
|
||||||
|
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||||
|
print(RTT_ROOT)
|
||||||
|
exit(-1)
|
||||||
|
|
||||||
|
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||||
|
|
||||||
|
DefaultEnvironment(tools=[])
|
||||||
|
env = Environment(tools = ['mingw'],
|
||||||
|
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||||
|
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||||
|
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||||
|
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||||
|
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||||
|
|
||||||
|
if rtconfig.PLATFORM == 'iar':
|
||||||
|
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||||
|
env.Replace(ARFLAGS = [''])
|
||||||
|
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
|
||||||
|
|
||||||
|
Export('RTT_ROOT')
|
||||||
|
Export('rtconfig')
|
||||||
|
|
||||||
|
SDK_ROOT = os.path.abspath('./')
|
||||||
|
|
||||||
|
if os.path.exists(SDK_ROOT + '/Libraries'):
|
||||||
|
libraries_path_prefix = SDK_ROOT + '/Libraries'
|
||||||
|
else:
|
||||||
|
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/Libraries'
|
||||||
|
|
||||||
|
SDK_LIB = libraries_path_prefix
|
||||||
|
Export('SDK_LIB')
|
||||||
|
|
||||||
|
# prepare building environment
|
||||||
|
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||||
|
|
||||||
|
at32_library = 'AT32_Std_Driver'
|
||||||
|
rtconfig.BSP_LIBRARY_TYPE = at32_library
|
||||||
|
|
||||||
|
# include libraries
|
||||||
|
objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
|
||||||
|
|
||||||
|
# common include drivers
|
||||||
|
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))
|
||||||
|
|
||||||
|
# make a building
|
||||||
|
DoBuilding(TARGET, objs)
|
||||||
|
|
@ -0,0 +1,17 @@
|
||||||
|
# RT-Thread building script for component
|
||||||
|
Import('RTT_ROOT')
|
||||||
|
Import('rtconfig')
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
cwd = GetCurrentDir()
|
||||||
|
|
||||||
|
# add the general drivers.
|
||||||
|
src = Split("""
|
||||||
|
main.c
|
||||||
|
""")
|
||||||
|
|
||||||
|
CPPPATH = [cwd, str(Dir('#'))]
|
||||||
|
|
||||||
|
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||||
|
|
||||||
|
Return('group')
|
||||||
|
|
@ -0,0 +1,48 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-01-08 shelton first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include <rtdevice.h>
|
||||||
|
#include "board.h"
|
||||||
|
#include "drv_gpio.h"
|
||||||
|
|
||||||
|
/* defined the LED2 pin: PD13 */
|
||||||
|
#define LED2_PIN GET_PIN(D, 13)
|
||||||
|
/* defined the LED3 pin: PD14 */
|
||||||
|
#define LED3_PIN GET_PIN(D, 14)
|
||||||
|
/* defined the LED4 pin: PD15 */
|
||||||
|
#define LED4_PIN GET_PIN(D, 15)
|
||||||
|
|
||||||
|
int main(void)
|
||||||
|
{
|
||||||
|
uint32_t Speed = 200;
|
||||||
|
/* set LED2 pin mode to output */
|
||||||
|
rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
|
||||||
|
/* set LED3 pin mode to output */
|
||||||
|
rt_pin_mode(LED3_PIN, PIN_MODE_OUTPUT);
|
||||||
|
/* set LED4 pin mode to output */
|
||||||
|
rt_pin_mode(LED4_PIN, PIN_MODE_OUTPUT);
|
||||||
|
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
rt_pin_write(LED2_PIN, PIN_LOW);
|
||||||
|
rt_thread_mdelay(Speed);
|
||||||
|
rt_pin_write(LED3_PIN, PIN_LOW);
|
||||||
|
rt_thread_mdelay(Speed);
|
||||||
|
rt_pin_write(LED4_PIN, PIN_LOW);
|
||||||
|
rt_thread_mdelay(Speed);
|
||||||
|
rt_pin_write(LED2_PIN, PIN_HIGH);
|
||||||
|
rt_thread_mdelay(Speed);
|
||||||
|
rt_pin_write(LED3_PIN, PIN_HIGH);
|
||||||
|
rt_thread_mdelay(Speed);
|
||||||
|
rt_pin_write(LED4_PIN, PIN_HIGH);
|
||||||
|
rt_thread_mdelay(Speed);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,171 @@
|
||||||
|
menu "Hardware Drivers Config"
|
||||||
|
|
||||||
|
config SOC_AT32F407VGT7
|
||||||
|
bool
|
||||||
|
select SOC_SERIES_AT32F407
|
||||||
|
select RT_USING_COMPONENTS_INIT
|
||||||
|
select RT_USING_USER_MAIN
|
||||||
|
default y
|
||||||
|
|
||||||
|
menu "Onboard Peripheral Drivers"
|
||||||
|
|
||||||
|
config BSP_USING_SERIAL
|
||||||
|
bool "Enable USART (uart1)"
|
||||||
|
select BSP_USING_UART
|
||||||
|
select BSP_USING_UART1
|
||||||
|
default y
|
||||||
|
|
||||||
|
endmenu
|
||||||
|
|
||||||
|
menu "On-chip Peripheral Drivers"
|
||||||
|
|
||||||
|
config BSP_USING_GPIO
|
||||||
|
bool "Enable GPIO"
|
||||||
|
select RT_USING_PIN
|
||||||
|
default y
|
||||||
|
|
||||||
|
config BSP_USING_ETH
|
||||||
|
bool "Enable Ethernet"
|
||||||
|
default n
|
||||||
|
select RT_USING_LWIP
|
||||||
|
select PHY_USING_LAN8720A
|
||||||
|
|
||||||
|
menuconfig BSP_USING_RTC
|
||||||
|
bool "Enable RTC"
|
||||||
|
select RT_USING_RTC
|
||||||
|
select RT_USING_LIBC
|
||||||
|
default n
|
||||||
|
if BSP_USING_RTC
|
||||||
|
choice
|
||||||
|
prompt "Select clock source"
|
||||||
|
default BSP_RTC_USING_LSE
|
||||||
|
|
||||||
|
config BSP_RTC_USING_LSE
|
||||||
|
bool "RTC USING LSE"
|
||||||
|
|
||||||
|
config BSP_RTC_USING_LSI
|
||||||
|
bool "RTC USING LSI"
|
||||||
|
endchoice
|
||||||
|
endif
|
||||||
|
|
||||||
|
menuconfig BSP_USING_UART
|
||||||
|
bool "Enable UART"
|
||||||
|
default y
|
||||||
|
select RT_USING_SERIAL
|
||||||
|
if BSP_USING_UART
|
||||||
|
config BSP_USING_UART1
|
||||||
|
bool "Enable UART1"
|
||||||
|
default y
|
||||||
|
|
||||||
|
config BSP_USING_UART2
|
||||||
|
bool "Enable UART2"
|
||||||
|
default n
|
||||||
|
|
||||||
|
config BSP_USING_UART3
|
||||||
|
bool "Enable UART3"
|
||||||
|
default n
|
||||||
|
endif
|
||||||
|
|
||||||
|
menuconfig BSP_USING_PWM
|
||||||
|
bool "Enable PWM"
|
||||||
|
default n
|
||||||
|
select RT_USING_PWM
|
||||||
|
if BSP_USING_PWM
|
||||||
|
menuconfig BSP_USING_TMR1
|
||||||
|
bool "Enable timer1 output PWM"
|
||||||
|
default n
|
||||||
|
if BSP_USING_TMR1
|
||||||
|
config BSP_USING_TMR1_CH1
|
||||||
|
bool "Enable TMR1 channel1 PWM"
|
||||||
|
default n
|
||||||
|
|
||||||
|
config BSP_USING_TMR1_CH4
|
||||||
|
bool "Enable TMR1 channel4 PWM"
|
||||||
|
default n
|
||||||
|
endif
|
||||||
|
menuconfig BSP_USING_TMR2
|
||||||
|
bool "Enable timer2 output PWM"
|
||||||
|
default n
|
||||||
|
if BSP_USING_TMR2
|
||||||
|
config BSP_USING_TMR2_CH1
|
||||||
|
bool "Enable TMR2 channel1 PWM"
|
||||||
|
default n
|
||||||
|
|
||||||
|
config BSP_USING_TMR2_CH2
|
||||||
|
bool "Enable TMR2 channel2 PWM"
|
||||||
|
default n
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
|
||||||
|
menuconfig BSP_USING_HWTIMER
|
||||||
|
bool "Enable HWTIMER"
|
||||||
|
default n
|
||||||
|
select RT_USING_HWTIMER
|
||||||
|
if BSP_USING_HWTIMER
|
||||||
|
config BSP_USING_HWTMR3
|
||||||
|
bool "Enable hardware timer3"
|
||||||
|
default n
|
||||||
|
config BSP_USING_HWTMR4
|
||||||
|
bool "Enable hardware timer4"
|
||||||
|
default n
|
||||||
|
config BSP_USING_HWTMR5
|
||||||
|
bool "Enable hardware timer5"
|
||||||
|
default n
|
||||||
|
endif
|
||||||
|
|
||||||
|
menuconfig BSP_USING_SPI
|
||||||
|
bool "Enable SPI BUS"
|
||||||
|
default n
|
||||||
|
select RT_USING_SPI
|
||||||
|
if BSP_USING_SPI
|
||||||
|
config BSP_USING_SPI1
|
||||||
|
bool "Enable SPI1 BUS"
|
||||||
|
default n
|
||||||
|
|
||||||
|
config BSP_USING_SPI2
|
||||||
|
bool "Enable SPI2 BUS"
|
||||||
|
default n
|
||||||
|
endif
|
||||||
|
|
||||||
|
menuconfig BSP_USING_I2C1
|
||||||
|
bool "Enable I2C1 BUS (software simulation)"
|
||||||
|
default n
|
||||||
|
select RT_USING_I2C
|
||||||
|
select RT_USING_I2C_BITOPS
|
||||||
|
select RT_USING_PIN
|
||||||
|
if BSP_USING_I2C1
|
||||||
|
config BSP_I2C1_SCL_PIN
|
||||||
|
int "i2c1 scl pin number"
|
||||||
|
range 0 63
|
||||||
|
default 22
|
||||||
|
config BSP_I2C1_SDA_PIN
|
||||||
|
int "I2C1 sda pin number"
|
||||||
|
range 0 63
|
||||||
|
default 23
|
||||||
|
endif
|
||||||
|
|
||||||
|
menuconfig BSP_USING_ADC
|
||||||
|
bool "Enable ADC"
|
||||||
|
default n
|
||||||
|
select RT_USING_ADC
|
||||||
|
if BSP_USING_ADC
|
||||||
|
config BSP_USING_ADC1
|
||||||
|
bool "Enable ADC1"
|
||||||
|
default n
|
||||||
|
config BSP_USING_ADC2
|
||||||
|
bool "Enable ADC2"
|
||||||
|
default n
|
||||||
|
endif
|
||||||
|
|
||||||
|
menuconfig BSP_USING_SDIO
|
||||||
|
bool "Enable SDIO"
|
||||||
|
default n
|
||||||
|
select RT_USING_SDIO
|
||||||
|
if BSP_USING_SDIO
|
||||||
|
config BSP_USING_SDIO1
|
||||||
|
bool "Enable SDIO1"
|
||||||
|
default n
|
||||||
|
endif
|
||||||
|
endmenu
|
||||||
|
|
||||||
|
endmenu
|
||||||
|
|
@ -0,0 +1,30 @@
|
||||||
|
import os
|
||||||
|
import rtconfig
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
Import('SDK_LIB')
|
||||||
|
|
||||||
|
cwd = GetCurrentDir()
|
||||||
|
|
||||||
|
# add general drivers
|
||||||
|
src = Split('''
|
||||||
|
board.c
|
||||||
|
msp/at32_msp.c
|
||||||
|
msp/system_at32f4xx.c
|
||||||
|
''')
|
||||||
|
|
||||||
|
path = [cwd]
|
||||||
|
path += [cwd + '/msp']
|
||||||
|
|
||||||
|
startup_path_prefix = SDK_LIB
|
||||||
|
|
||||||
|
if rtconfig.CROSS_TOOL == 'gcc':
|
||||||
|
src += [startup_path_prefix + '/AT32_Std_Driver/CMSIS/AT32/AT32F4xx/src/gcc/startup_at32f407vgt7.s']
|
||||||
|
elif rtconfig.CROSS_TOOL == 'keil':
|
||||||
|
src += [startup_path_prefix + '/AT32_Std_Driver/CMSIS/AT32/AT32F4xx/src/mdk/startup_at32f407vgt7.s']
|
||||||
|
elif rtconfig.CROSS_TOOL == 'iar':
|
||||||
|
src += [startup_path_prefix + '/AT32_Std_Driver/CMSIS/AT32/AT32F4xx/src/iar/startup_at32f407vgt7.s']
|
||||||
|
|
||||||
|
CPPDEFINES = ['AT32F407VGT7']
|
||||||
|
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||||
|
Return('group')
|
||||||
|
|
@ -0,0 +1,89 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-11-06 balanceTWK first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <rthw.h>
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#include <at32f4xx.h>
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SRAM
|
||||||
|
#include "drv_sram.h"
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief This function is executed in case of error occurrence.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void Error_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN Error_Handler */
|
||||||
|
/* User can add his own implementation to report the HAL error return state */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
/* USER CODE END Error_Handler */
|
||||||
|
}
|
||||||
|
|
||||||
|
/** System Clock Configuration
|
||||||
|
*/
|
||||||
|
void SystemClock_Config(void)
|
||||||
|
{
|
||||||
|
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||||
|
NVIC_SetPriority(SysTick_IRQn, 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* This is the timer interrupt service routine.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
void SysTick_Handler(void)
|
||||||
|
{
|
||||||
|
/* enter interrupt */
|
||||||
|
rt_interrupt_enter();
|
||||||
|
|
||||||
|
rt_tick_increase();
|
||||||
|
|
||||||
|
/* leave interrupt */
|
||||||
|
rt_interrupt_leave();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* This function will initial AT32 board.
|
||||||
|
*/
|
||||||
|
void rt_hw_board_init()
|
||||||
|
{
|
||||||
|
/* NVIC Configuration */
|
||||||
|
#define NVIC_VTOR_MASK 0x3FFFFF80
|
||||||
|
#ifdef VECT_TAB_RAM
|
||||||
|
/* Set the Vector Table base location at 0x10000000 */
|
||||||
|
SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK);
|
||||||
|
#else /* VECT_TAB_FLASH */
|
||||||
|
/* Set the Vector Table base location at 0x08000000 */
|
||||||
|
SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
SystemClock_Config();
|
||||||
|
|
||||||
|
#ifdef RT_USING_COMPONENTS_INIT
|
||||||
|
rt_components_board_init();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef RT_USING_CONSOLE
|
||||||
|
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SRAM
|
||||||
|
rt_system_heap_init((void *)EXT_SRAM_BEGIN, (void *)EXT_SRAM_END);
|
||||||
|
#else
|
||||||
|
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,42 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-01-15 shelton first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __BOARD_H__
|
||||||
|
#define __BOARD_H__
|
||||||
|
|
||||||
|
#include <at32f4xx.h>
|
||||||
|
#include "at32_msp.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Internal SRAM memory size[Kbytes] <96>, Default: 96*/
|
||||||
|
#define AT32_SRAM_SIZE 96
|
||||||
|
#define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
|
||||||
|
|
||||||
|
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||||
|
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||||
|
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||||
|
#elif __ICCARM__
|
||||||
|
#pragma section="CSTACK"
|
||||||
|
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||||
|
#else
|
||||||
|
extern int __bss_end;
|
||||||
|
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define HEAP_END AT32_SRAM_END
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __BOARD_H__ */
|
||||||
|
|
@ -0,0 +1,28 @@
|
||||||
|
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||||
|
/*-Editor annotation file-*/
|
||||||
|
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||||
|
/*-Specials-*/
|
||||||
|
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||||
|
/*-Memory Regions-*/
|
||||||
|
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||||
|
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
|
||||||
|
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||||
|
define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
|
||||||
|
/*-Sizes-*/
|
||||||
|
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||||
|
define symbol __ICFEDIT_size_heap__ = 0x0000;
|
||||||
|
/**** End of ICF editor section. ###ICF###*/
|
||||||
|
|
||||||
|
define memory mem with size = 4G;
|
||||||
|
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||||
|
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||||
|
|
||||||
|
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||||
|
|
||||||
|
initialize by copy { readwrite };
|
||||||
|
do not initialize { section .noinit };
|
||||||
|
|
||||||
|
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||||
|
|
||||||
|
place in ROM_region { readonly };
|
||||||
|
place in RAM_region { readwrite, last block CSTACK};
|
||||||
|
|
@ -0,0 +1,156 @@
|
||||||
|
/*
|
||||||
|
* linker script for AT32 with GNU ld
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */
|
||||||
|
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 96k /* 96K sram */
|
||||||
|
}
|
||||||
|
ENTRY(Reset_Handler)
|
||||||
|
_system_stack_size = 0x200;
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_stext = .;
|
||||||
|
KEEP(*(.isr_vector)) /* Startup code */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.text) /* remaining code */
|
||||||
|
*(.text.*) /* remaining code */
|
||||||
|
*(.rodata) /* read-only data (constants) */
|
||||||
|
*(.rodata*)
|
||||||
|
*(.glue_7)
|
||||||
|
*(.glue_7t)
|
||||||
|
*(.gnu.linkonce.t*)
|
||||||
|
|
||||||
|
/* section information for finsh shell */
|
||||||
|
. = ALIGN(4);
|
||||||
|
__fsymtab_start = .;
|
||||||
|
KEEP(*(FSymTab))
|
||||||
|
__fsymtab_end = .;
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
__vsymtab_start = .;
|
||||||
|
KEEP(*(VSymTab))
|
||||||
|
__vsymtab_end = .;
|
||||||
|
|
||||||
|
/* section information for initial. */
|
||||||
|
. = ALIGN(4);
|
||||||
|
__rt_init_start = .;
|
||||||
|
KEEP(*(SORT(.rti_fn*)))
|
||||||
|
__rt_init_end = .;
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
|
||||||
|
PROVIDE(__ctors_start__ = .);
|
||||||
|
KEEP (*(SORT(.init_array.*)))
|
||||||
|
KEEP (*(.init_array))
|
||||||
|
PROVIDE(__ctors_end__ = .);
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
|
||||||
|
_etext = .;
|
||||||
|
} > ROM = 0
|
||||||
|
|
||||||
|
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||||
|
__exidx_start = .;
|
||||||
|
.ARM.exidx :
|
||||||
|
{
|
||||||
|
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||||
|
|
||||||
|
/* This is used by the startup in order to initialize the .data secion */
|
||||||
|
_sidata = .;
|
||||||
|
} > ROM
|
||||||
|
__exidx_end = .;
|
||||||
|
|
||||||
|
/* .data section which is used for initialized data */
|
||||||
|
|
||||||
|
.data : AT (_sidata)
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* This is used by the startup in order to initialize the .data secion */
|
||||||
|
_sdata = . ;
|
||||||
|
|
||||||
|
*(.data)
|
||||||
|
*(.data.*)
|
||||||
|
*(.gnu.linkonce.d*)
|
||||||
|
|
||||||
|
PROVIDE(__dtors_start__ = .);
|
||||||
|
KEEP(*(SORT(.dtors.*)))
|
||||||
|
KEEP(*(.dtors))
|
||||||
|
PROVIDE(__dtors_end__ = .);
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* This is used by the startup in order to initialize the .data secion */
|
||||||
|
_edata = . ;
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
.stack :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sstack = .;
|
||||||
|
. = . + _system_stack_size;
|
||||||
|
. = ALIGN(4);
|
||||||
|
_estack = .;
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
__bss_start = .;
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* This is used by the startup in order to initialize the .bss secion */
|
||||||
|
_sbss = .;
|
||||||
|
|
||||||
|
*(.bss)
|
||||||
|
*(.bss.*)
|
||||||
|
*(COMMON)
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* This is used by the startup in order to initialize the .bss secion */
|
||||||
|
_ebss = . ;
|
||||||
|
|
||||||
|
*(.bss.init)
|
||||||
|
} > RAM
|
||||||
|
__bss_end = .;
|
||||||
|
|
||||||
|
_end = .;
|
||||||
|
|
||||||
|
/* Stabs debugging sections. */
|
||||||
|
.stab 0 : { *(.stab) }
|
||||||
|
.stabstr 0 : { *(.stabstr) }
|
||||||
|
.stab.excl 0 : { *(.stab.excl) }
|
||||||
|
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||||
|
.stab.index 0 : { *(.stab.index) }
|
||||||
|
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||||
|
.comment 0 : { *(.comment) }
|
||||||
|
/* DWARF debug sections.
|
||||||
|
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||||
|
* of the section so we begin them at 0. */
|
||||||
|
/* DWARF 1 */
|
||||||
|
.debug 0 : { *(.debug) }
|
||||||
|
.line 0 : { *(.line) }
|
||||||
|
/* GNU DWARF 1 extensions */
|
||||||
|
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||||
|
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||||
|
/* DWARF 1.1 and DWARF 2 */
|
||||||
|
.debug_aranges 0 : { *(.debug_aranges) }
|
||||||
|
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||||
|
/* DWARF 2 */
|
||||||
|
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||||
|
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||||
|
.debug_line 0 : { *(.debug_line) }
|
||||||
|
.debug_frame 0 : { *(.debug_frame) }
|
||||||
|
.debug_str 0 : { *(.debug_str) }
|
||||||
|
.debug_loc 0 : { *(.debug_loc) }
|
||||||
|
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||||
|
/* SGI/MIPS DWARF 2 extensions */
|
||||||
|
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||||
|
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||||
|
.debug_typenames 0 : { *(.debug_typenames) }
|
||||||
|
.debug_varnames 0 : { *(.debug_varnames) }
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,15 @@
|
||||||
|
; *************************************************************
|
||||||
|
; *** Scatter-Loading Description File generated by uVision ***
|
||||||
|
; *************************************************************
|
||||||
|
|
||||||
|
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
|
||||||
|
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
|
||||||
|
*.o (RESET, +First)
|
||||||
|
*(InRoot$$Sections)
|
||||||
|
.ANY (+RO)
|
||||||
|
}
|
||||||
|
RW_IRAM1 0x20000000 0x00018000 { ; RW data
|
||||||
|
.ANY (+RW +ZI)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -0,0 +1,258 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file at32_msp.c
|
||||||
|
* @author Artery Technology
|
||||||
|
* @version V1.0.0
|
||||||
|
* @date 2020-01-10
|
||||||
|
* @brief Msp source file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <at32f4xx.h>
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include "at32_msp.h"
|
||||||
|
|
||||||
|
#ifdef BSP_USING_UART
|
||||||
|
void at32_msp_usart_init(void *Instance)
|
||||||
|
{
|
||||||
|
GPIO_InitType GPIO_InitStruct;
|
||||||
|
USART_Type *USARTx = (USART_Type *)Instance;
|
||||||
|
|
||||||
|
GPIO_StructInit(&GPIO_InitStruct);
|
||||||
|
GPIO_InitStruct.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||||
|
#ifdef BSP_USING_UART1
|
||||||
|
if(USART1 == USARTx)
|
||||||
|
{
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_USART1, ENABLE);
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_9;
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_10;
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#ifdef BSP_USING_UART2
|
||||||
|
if(USART2 == USARTx)
|
||||||
|
{
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_USART2, ENABLE);
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_2;
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_3;
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#ifdef BSP_USING_UART3
|
||||||
|
if(USART3 == USARTx)
|
||||||
|
{
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_USART3, ENABLE);
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOB, ENABLE);
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_10;
|
||||||
|
GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_11;
|
||||||
|
GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
/* Add others */
|
||||||
|
}
|
||||||
|
#endif /* BSP_USING_SERIAL */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SPI
|
||||||
|
void at32_msp_spi_init(void *Instance)
|
||||||
|
{
|
||||||
|
GPIO_InitType GPIO_InitStruct;
|
||||||
|
SPI_Type *SPIx = (SPI_Type *)Instance;
|
||||||
|
|
||||||
|
GPIO_StructInit(&GPIO_InitStruct);
|
||||||
|
GPIO_InitStruct.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||||
|
#ifdef BSP_USING_SPI1
|
||||||
|
if(SPI1 == SPIx)
|
||||||
|
{
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_SPI1, ENABLE);
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
||||||
|
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT_PP;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_4;
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_5 | GPIO_Pins_7;
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_6;
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#ifdef BSP_USING_SPI2
|
||||||
|
if(SPI2 == SPIx)
|
||||||
|
{
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_SPI2, ENABLE);
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOB, ENABLE);
|
||||||
|
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT_PP;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_12;
|
||||||
|
GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_13 | GPIO_Pins_15;
|
||||||
|
GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_14;
|
||||||
|
GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
/* Add others */
|
||||||
|
}
|
||||||
|
#endif /* BSP_USING_SPI */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SDIO
|
||||||
|
void at32_msp_sdio_init(void *Instance)
|
||||||
|
{
|
||||||
|
GPIO_InitType GPIO_InitStructure;
|
||||||
|
SDIO_Type *SDIOx = (SDIO_Type *)Instance;
|
||||||
|
|
||||||
|
GPIO_StructInit(&GPIO_InitStructure);
|
||||||
|
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||||
|
|
||||||
|
if(SDIO1 == SDIOx)
|
||||||
|
{
|
||||||
|
/* if used dma ... */
|
||||||
|
RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_DMA2, ENABLE);
|
||||||
|
|
||||||
|
RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_SDIO1, ENABLE);
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOC | RCC_APB2PERIPH_GPIOD, ENABLE);
|
||||||
|
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10 | GPIO_Pins_11 | GPIO_Pins_12;
|
||||||
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||||
|
|
||||||
|
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_2;
|
||||||
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_Init(GPIOD, &GPIO_InitStructure);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* BSP_USING_SDIO */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_PWM
|
||||||
|
void at32_msp_tmr_init(void *Instance)
|
||||||
|
{
|
||||||
|
GPIO_InitType GPIO_InitStructure;
|
||||||
|
TMR_Type *TMRx = (TMR_Type *)Instance;
|
||||||
|
|
||||||
|
if(TMRx == TMR1)
|
||||||
|
{
|
||||||
|
/* TMR1 clock enable */
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_TMR1, ENABLE);
|
||||||
|
/* GPIOA clock enable */
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
||||||
|
|
||||||
|
/* GPIOA Configuration:TMR1 Channel1 and Channel4 as alternate function push-pull */
|
||||||
|
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_11;
|
||||||
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||||
|
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||||
|
}
|
||||||
|
|
||||||
|
if(TMRx == TMR2)
|
||||||
|
{
|
||||||
|
/* TMR2 clock enable */
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR2, ENABLE);
|
||||||
|
/* GPIOA clock enable */
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
||||||
|
|
||||||
|
/* GPIOA Configuration:TMR2 Channel1 and Channel2 as alternate function push-pull */
|
||||||
|
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1;
|
||||||
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
|
||||||
|
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||||
|
}
|
||||||
|
/* Add others */
|
||||||
|
}
|
||||||
|
#endif /* BSP_USING_PWM */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC
|
||||||
|
void at32_msp_adc_init(void *Instance)
|
||||||
|
{
|
||||||
|
GPIO_InitType GPIO_InitStruct;
|
||||||
|
ADC_Type *ADCx = (ADC_Type *)Instance;
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC1
|
||||||
|
if(ADCx == ADC1)
|
||||||
|
{
|
||||||
|
/* ADC1 & GPIO clock enable */
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC1 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
|
||||||
|
|
||||||
|
/* Configure ADC Channel as analog input */
|
||||||
|
GPIO_StructInit(&GPIO_InitStruct);
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
|
||||||
|
GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC2
|
||||||
|
if(ADCx == ADC2)
|
||||||
|
{
|
||||||
|
/* ADC2 & GPIO clock enable */
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC2 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
|
||||||
|
|
||||||
|
/* Configure ADC Channel as analog input */
|
||||||
|
GPIO_StructInit(&GPIO_InitStruct);
|
||||||
|
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
|
||||||
|
GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif /* BSP_USING_ADC */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_HWTIMER
|
||||||
|
void at32_msp_hwtmr_init(void *Instance)
|
||||||
|
{
|
||||||
|
TMR_Type *TMRx = (TMR_Type *)Instance;
|
||||||
|
|
||||||
|
#ifdef BSP_USING_HWTMR3
|
||||||
|
if(TMRx == TMR3)
|
||||||
|
{
|
||||||
|
/* TMR3 clock enable */
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_HWTMR4
|
||||||
|
if(TMRx == TMR4)
|
||||||
|
{
|
||||||
|
/* TMR4 clock enable */
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR4, ENABLE);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_HWTMR5
|
||||||
|
if(TMRx == TMR5)
|
||||||
|
{
|
||||||
|
/* TMR5 clock enable */
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR5, ENABLE);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,33 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file at32_msp.h
|
||||||
|
* @author Artery Technology
|
||||||
|
* @version V1.0.0
|
||||||
|
* @date 2020-01-10
|
||||||
|
* @brief Msp header file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __AT32_MSP_H__
|
||||||
|
#define __AT32_MSP_H__
|
||||||
|
|
||||||
|
void at32_msp_usart_init(void *Instance);
|
||||||
|
void at32_msp_spi_init(void *Instance);
|
||||||
|
void at32_msp_tmr_init(void *Instance);
|
||||||
|
void at32_msp_i2c_init(void *Instance);
|
||||||
|
void at32_msp_sdio_init(void *Instance);
|
||||||
|
void at32_msp_adc_init(void *Instance);
|
||||||
|
void at32_msp_hwtmr_init(void *Instance);
|
||||||
|
|
||||||
|
#endif /* __AT32_MSP_H__ */
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,10 @@
|
||||||
|
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||||
|
|
||||||
|
<workspace>
|
||||||
|
<project>
|
||||||
|
<path>$WS_DIR$\project.ewp</path>
|
||||||
|
</project>
|
||||||
|
<batchBuild/>
|
||||||
|
</workspace>
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -0,0 +1,162 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.0</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Extensions>
|
||||||
|
<cExt>*.c</cExt>
|
||||||
|
<aExt>*.s*; *.src; *.a*</aExt>
|
||||||
|
<oExt>*.obj</oExt>
|
||||||
|
<lExt>*.lib</lExt>
|
||||||
|
<tExt>*.txt; *.h; *.inc</tExt>
|
||||||
|
<pExt>*.plm</pExt>
|
||||||
|
<CppX>*.cpp</CppX>
|
||||||
|
</Extensions>
|
||||||
|
|
||||||
|
<DaveTm>
|
||||||
|
<dwLowDateTime>0</dwLowDateTime>
|
||||||
|
<dwHighDateTime>0</dwHighDateTime>
|
||||||
|
</DaveTm>
|
||||||
|
|
||||||
|
<Target>
|
||||||
|
<TargetName>rt-thread</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<CLKADS>8000000</CLKADS>
|
||||||
|
<OPTTT>
|
||||||
|
<gFlags>1</gFlags>
|
||||||
|
<BeepAtEnd>1</BeepAtEnd>
|
||||||
|
<RunSim>1</RunSim>
|
||||||
|
<RunTarget>0</RunTarget>
|
||||||
|
</OPTTT>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<FlashByte>65535</FlashByte>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
</OPTHX>
|
||||||
|
<OPTLEX>
|
||||||
|
<PageWidth>79</PageWidth>
|
||||||
|
<PageLength>66</PageLength>
|
||||||
|
<TabStop>8</TabStop>
|
||||||
|
<ListingPath>.\build\keil\List\</ListingPath>
|
||||||
|
</OPTLEX>
|
||||||
|
<ListingPage>
|
||||||
|
<CreateCListing>1</CreateCListing>
|
||||||
|
<CreateAListing>1</CreateAListing>
|
||||||
|
<CreateLListing>1</CreateLListing>
|
||||||
|
<CreateIListing>0</CreateIListing>
|
||||||
|
<AsmCond>1</AsmCond>
|
||||||
|
<AsmSymb>1</AsmSymb>
|
||||||
|
<AsmXref>0</AsmXref>
|
||||||
|
<CCond>1</CCond>
|
||||||
|
<CCode>0</CCode>
|
||||||
|
<CListInc>0</CListInc>
|
||||||
|
<CSymb>0</CSymb>
|
||||||
|
<LinkerCodeListing>0</LinkerCodeListing>
|
||||||
|
</ListingPage>
|
||||||
|
<OPTXL>
|
||||||
|
<LMap>1</LMap>
|
||||||
|
<LComments>1</LComments>
|
||||||
|
<LGenerateSymbols>1</LGenerateSymbols>
|
||||||
|
<LLibSym>1</LLibSym>
|
||||||
|
<LLines>1</LLines>
|
||||||
|
<LLocSym>1</LLocSym>
|
||||||
|
<LPubSym>1</LPubSym>
|
||||||
|
<LXref>0</LXref>
|
||||||
|
<LExpSel>0</LExpSel>
|
||||||
|
</OPTXL>
|
||||||
|
<OPTFL>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
|
</OPTFL>
|
||||||
|
<CpuCode>0</CpuCode>
|
||||||
|
<DebugOpt>
|
||||||
|
<uSim>0</uSim>
|
||||||
|
<uTrg>1</uTrg>
|
||||||
|
<sLdApp>1</sLdApp>
|
||||||
|
<sGomain>1</sGomain>
|
||||||
|
<sRbreak>1</sRbreak>
|
||||||
|
<sRwatch>1</sRwatch>
|
||||||
|
<sRmem>1</sRmem>
|
||||||
|
<sRfunc>1</sRfunc>
|
||||||
|
<sRbox>1</sRbox>
|
||||||
|
<tLdApp>1</tLdApp>
|
||||||
|
<tGomain>1</tGomain>
|
||||||
|
<tRbreak>1</tRbreak>
|
||||||
|
<tRwatch>1</tRwatch>
|
||||||
|
<tRmem>1</tRmem>
|
||||||
|
<tRfunc>0</tRfunc>
|
||||||
|
<tRbox>1</tRbox>
|
||||||
|
<tRtrace>0</tRtrace>
|
||||||
|
<sRSysVw>1</sRSysVw>
|
||||||
|
<tRSysVw>1</tRSysVw>
|
||||||
|
<tPdscDbg>0</tPdscDbg>
|
||||||
|
<sRunDeb>0</sRunDeb>
|
||||||
|
<sLrtime>0</sLrtime>
|
||||||
|
<nTsel>6</nTsel>
|
||||||
|
<sDll></sDll>
|
||||||
|
<sDllPa></sDllPa>
|
||||||
|
<sDlgDll></sDlgDll>
|
||||||
|
<sDlgPa></sDlgPa>
|
||||||
|
<sIfile></sIfile>
|
||||||
|
<tDll></tDll>
|
||||||
|
<tDllPa></tDllPa>
|
||||||
|
<tDlgDll></tDlgDll>
|
||||||
|
<tDlgPa></tDlgPa>
|
||||||
|
<tIfile></tIfile>
|
||||||
|
<pMon>Segger\JL2CM3.dll</pMon>
|
||||||
|
</DebugOpt>
|
||||||
|
<TargetDriverDllRegistry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>JL2CM3</Key>
|
||||||
|
<Name>-U4294967295 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>UL2CM3</Key>
|
||||||
|
<Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FN1 -FC800 -FD20000000 -FF0AT32F407_1024 -FL0100000 -FS08000000</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
</TargetDriverDllRegistry>
|
||||||
|
<Breakpoint/>
|
||||||
|
<Tracepoint>
|
||||||
|
<THDelay>0</THDelay>
|
||||||
|
</Tracepoint>
|
||||||
|
<DebugFlag>
|
||||||
|
<trace>0</trace>
|
||||||
|
<periodic>0</periodic>
|
||||||
|
<aLwin>0</aLwin>
|
||||||
|
<aCover>0</aCover>
|
||||||
|
<aSer1>0</aSer1>
|
||||||
|
<aSer2>0</aSer2>
|
||||||
|
<aPa>0</aPa>
|
||||||
|
<viewmode>0</viewmode>
|
||||||
|
<vrSel>0</vrSel>
|
||||||
|
<aSym>0</aSym>
|
||||||
|
<aTbox>0</aTbox>
|
||||||
|
<AscS1>0</AscS1>
|
||||||
|
<AscS2>0</AscS2>
|
||||||
|
<AscS3>0</AscS3>
|
||||||
|
<aSer3>0</aSer3>
|
||||||
|
<eProf>0</eProf>
|
||||||
|
<aLa>0</aLa>
|
||||||
|
<aPa1>0</aPa1>
|
||||||
|
<AscS4>0</AscS4>
|
||||||
|
<aSer4>0</aSer4>
|
||||||
|
<StkLoc>0</StkLoc>
|
||||||
|
<TrcWin>0</TrcWin>
|
||||||
|
<newCpu>1</newCpu>
|
||||||
|
<uProt>0</uProt>
|
||||||
|
</DebugFlag>
|
||||||
|
<LintExecutable></LintExecutable>
|
||||||
|
<LintConfigFile></LintConfigFile>
|
||||||
|
</TargetOption>
|
||||||
|
</Target>
|
||||||
|
|
||||||
|
</ProjectOpt>
|
||||||
|
|
@ -0,0 +1,185 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.0</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Extensions>
|
||||||
|
<cExt>*.c</cExt>
|
||||||
|
<aExt>*.s*; *.src; *.a*</aExt>
|
||||||
|
<oExt>*.obj; *.o</oExt>
|
||||||
|
<lExt>*.lib</lExt>
|
||||||
|
<tExt>*.txt; *.h; *.inc</tExt>
|
||||||
|
<pExt>*.plm</pExt>
|
||||||
|
<CppX>*.cpp</CppX>
|
||||||
|
<nMigrate>0</nMigrate>
|
||||||
|
</Extensions>
|
||||||
|
|
||||||
|
<DaveTm>
|
||||||
|
<dwLowDateTime>0</dwLowDateTime>
|
||||||
|
<dwHighDateTime>0</dwHighDateTime>
|
||||||
|
</DaveTm>
|
||||||
|
|
||||||
|
<Target>
|
||||||
|
<TargetName>rt-thread</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<CLKADS>12000000</CLKADS>
|
||||||
|
<OPTTT>
|
||||||
|
<gFlags>1</gFlags>
|
||||||
|
<BeepAtEnd>1</BeepAtEnd>
|
||||||
|
<RunSim>0</RunSim>
|
||||||
|
<RunTarget>1</RunTarget>
|
||||||
|
<RunAbUc>0</RunAbUc>
|
||||||
|
</OPTTT>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<FlashByte>65535</FlashByte>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
</OPTHX>
|
||||||
|
<OPTLEX>
|
||||||
|
<PageWidth>79</PageWidth>
|
||||||
|
<PageLength>66</PageLength>
|
||||||
|
<TabStop>8</TabStop>
|
||||||
|
<ListingPath>.\build\keil\List\</ListingPath>
|
||||||
|
</OPTLEX>
|
||||||
|
<ListingPage>
|
||||||
|
<CreateCListing>1</CreateCListing>
|
||||||
|
<CreateAListing>1</CreateAListing>
|
||||||
|
<CreateLListing>1</CreateLListing>
|
||||||
|
<CreateIListing>0</CreateIListing>
|
||||||
|
<AsmCond>1</AsmCond>
|
||||||
|
<AsmSymb>1</AsmSymb>
|
||||||
|
<AsmXref>0</AsmXref>
|
||||||
|
<CCond>1</CCond>
|
||||||
|
<CCode>0</CCode>
|
||||||
|
<CListInc>0</CListInc>
|
||||||
|
<CSymb>0</CSymb>
|
||||||
|
<LinkerCodeListing>0</LinkerCodeListing>
|
||||||
|
</ListingPage>
|
||||||
|
<OPTXL>
|
||||||
|
<LMap>1</LMap>
|
||||||
|
<LComments>1</LComments>
|
||||||
|
<LGenerateSymbols>1</LGenerateSymbols>
|
||||||
|
<LLibSym>1</LLibSym>
|
||||||
|
<LLines>1</LLines>
|
||||||
|
<LLocSym>1</LLocSym>
|
||||||
|
<LPubSym>1</LPubSym>
|
||||||
|
<LXref>0</LXref>
|
||||||
|
<LExpSel>0</LExpSel>
|
||||||
|
</OPTXL>
|
||||||
|
<OPTFL>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
|
</OPTFL>
|
||||||
|
<CpuCode>255</CpuCode>
|
||||||
|
<DebugOpt>
|
||||||
|
<uSim>0</uSim>
|
||||||
|
<uTrg>1</uTrg>
|
||||||
|
<sLdApp>1</sLdApp>
|
||||||
|
<sGomain>1</sGomain>
|
||||||
|
<sRbreak>1</sRbreak>
|
||||||
|
<sRwatch>1</sRwatch>
|
||||||
|
<sRmem>1</sRmem>
|
||||||
|
<sRfunc>1</sRfunc>
|
||||||
|
<sRbox>1</sRbox>
|
||||||
|
<tLdApp>1</tLdApp>
|
||||||
|
<tGomain>1</tGomain>
|
||||||
|
<tRbreak>1</tRbreak>
|
||||||
|
<tRwatch>1</tRwatch>
|
||||||
|
<tRmem>1</tRmem>
|
||||||
|
<tRfunc>0</tRfunc>
|
||||||
|
<tRbox>1</tRbox>
|
||||||
|
<tRtrace>1</tRtrace>
|
||||||
|
<sRSysVw>1</sRSysVw>
|
||||||
|
<tRSysVw>1</tRSysVw>
|
||||||
|
<sRunDeb>0</sRunDeb>
|
||||||
|
<sLrtime>0</sLrtime>
|
||||||
|
<bEvRecOn>1</bEvRecOn>
|
||||||
|
<bSchkAxf>0</bSchkAxf>
|
||||||
|
<bTchkAxf>0</bTchkAxf>
|
||||||
|
<nTsel>6</nTsel>
|
||||||
|
<sDll></sDll>
|
||||||
|
<sDllPa></sDllPa>
|
||||||
|
<sDlgDll></sDlgDll>
|
||||||
|
<sDlgPa></sDlgPa>
|
||||||
|
<sIfile></sIfile>
|
||||||
|
<tDll></tDll>
|
||||||
|
<tDllPa></tDllPa>
|
||||||
|
<tDlgDll></tDlgDll>
|
||||||
|
<tDlgPa></tDlgPa>
|
||||||
|
<tIfile></tIfile>
|
||||||
|
<pMon>Segger\JL2CM3.dll</pMon>
|
||||||
|
</DebugOpt>
|
||||||
|
<TargetDriverDllRegistry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>UL2CM3</Key>
|
||||||
|
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0AT32F407_1024 -FL0100000 -FS08000000 -FP0($$Device:AT32F407VGT7$Flash\AT32F407_1024.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>JL2CM3</Key>
|
||||||
|
<Name>-U4294967295 -O14 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight JTAG-DP") -D00(3BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06414041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000 -FP0($$Device:AT32F407VGT7$Flash\AT32F407_1024.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
</TargetDriverDllRegistry>
|
||||||
|
<Breakpoint/>
|
||||||
|
<Tracepoint>
|
||||||
|
<THDelay>0</THDelay>
|
||||||
|
</Tracepoint>
|
||||||
|
<DebugFlag>
|
||||||
|
<trace>0</trace>
|
||||||
|
<periodic>0</periodic>
|
||||||
|
<aLwin>0</aLwin>
|
||||||
|
<aCover>0</aCover>
|
||||||
|
<aSer1>0</aSer1>
|
||||||
|
<aSer2>0</aSer2>
|
||||||
|
<aPa>0</aPa>
|
||||||
|
<viewmode>0</viewmode>
|
||||||
|
<vrSel>0</vrSel>
|
||||||
|
<aSym>0</aSym>
|
||||||
|
<aTbox>0</aTbox>
|
||||||
|
<AscS1>0</AscS1>
|
||||||
|
<AscS2>0</AscS2>
|
||||||
|
<AscS3>0</AscS3>
|
||||||
|
<aSer3>0</aSer3>
|
||||||
|
<eProf>0</eProf>
|
||||||
|
<aLa>0</aLa>
|
||||||
|
<aPa1>0</aPa1>
|
||||||
|
<AscS4>0</AscS4>
|
||||||
|
<aSer4>0</aSer4>
|
||||||
|
<StkLoc>0</StkLoc>
|
||||||
|
<TrcWin>0</TrcWin>
|
||||||
|
<newCpu>0</newCpu>
|
||||||
|
<uProt>0</uProt>
|
||||||
|
</DebugFlag>
|
||||||
|
<LintExecutable></LintExecutable>
|
||||||
|
<LintConfigFile></LintConfigFile>
|
||||||
|
<bLintAuto>0</bLintAuto>
|
||||||
|
<bAutoGenD>0</bAutoGenD>
|
||||||
|
<LntExFlags>0</LntExFlags>
|
||||||
|
<pMisraName></pMisraName>
|
||||||
|
<pszMrule></pszMrule>
|
||||||
|
<pSingCmds></pSingCmds>
|
||||||
|
<pMultCmds></pMultCmds>
|
||||||
|
<pMisraNamep></pMisraNamep>
|
||||||
|
<pszMrulep></pszMrulep>
|
||||||
|
<pSingCmdsp></pSingCmdsp>
|
||||||
|
<pMultCmdsp></pMultCmdsp>
|
||||||
|
</TargetOption>
|
||||||
|
</Target>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>Source Group 1</GroupName>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
</ProjectOpt>
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,206 @@
|
||||||
|
#ifndef RT_CONFIG_H__
|
||||||
|
#define RT_CONFIG_H__
|
||||||
|
|
||||||
|
/* Automatically generated file; DO NOT EDIT. */
|
||||||
|
/* RT-Thread Configuration */
|
||||||
|
|
||||||
|
/* RT-Thread Kernel */
|
||||||
|
|
||||||
|
#define RT_NAME_MAX 8
|
||||||
|
#define RT_ALIGN_SIZE 4
|
||||||
|
#define RT_THREAD_PRIORITY_32
|
||||||
|
#define RT_THREAD_PRIORITY_MAX 32
|
||||||
|
#define RT_TICK_PER_SECOND 1000
|
||||||
|
#define RT_USING_OVERFLOW_CHECK
|
||||||
|
#define RT_USING_HOOK
|
||||||
|
#define RT_USING_IDLE_HOOK
|
||||||
|
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||||
|
#define IDLE_THREAD_STACK_SIZE 256
|
||||||
|
#define RT_USING_TIMER_SOFT
|
||||||
|
#define RT_TIMER_THREAD_PRIO 4
|
||||||
|
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||||
|
#define RT_DEBUG
|
||||||
|
#define RT_DEBUG_COLOR
|
||||||
|
|
||||||
|
/* Inter-Thread communication */
|
||||||
|
|
||||||
|
#define RT_USING_SEMAPHORE
|
||||||
|
#define RT_USING_MUTEX
|
||||||
|
#define RT_USING_EVENT
|
||||||
|
#define RT_USING_MAILBOX
|
||||||
|
#define RT_USING_MESSAGEQUEUE
|
||||||
|
|
||||||
|
/* Memory Management */
|
||||||
|
|
||||||
|
#define RT_USING_MEMPOOL
|
||||||
|
#define RT_USING_MEMHEAP
|
||||||
|
#define RT_USING_SMALL_MEM
|
||||||
|
#define RT_USING_HEAP
|
||||||
|
|
||||||
|
/* Kernel Device Object */
|
||||||
|
|
||||||
|
#define RT_USING_DEVICE
|
||||||
|
#define RT_USING_CONSOLE
|
||||||
|
#define RT_CONSOLEBUF_SIZE 128
|
||||||
|
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||||
|
#define RT_VER_NUM 0x40003
|
||||||
|
#define ARCH_ARM
|
||||||
|
#define RT_USING_CPU_FFS
|
||||||
|
#define ARCH_ARM_CORTEX_M
|
||||||
|
#define ARCH_ARM_CORTEX_M4
|
||||||
|
|
||||||
|
/* RT-Thread Components */
|
||||||
|
|
||||||
|
#define RT_USING_COMPONENTS_INIT
|
||||||
|
#define RT_USING_USER_MAIN
|
||||||
|
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||||
|
#define RT_MAIN_THREAD_PRIORITY 10
|
||||||
|
|
||||||
|
/* C++ features */
|
||||||
|
|
||||||
|
|
||||||
|
/* Command shell */
|
||||||
|
|
||||||
|
#define RT_USING_FINSH
|
||||||
|
#define FINSH_THREAD_NAME "tshell"
|
||||||
|
#define FINSH_USING_HISTORY
|
||||||
|
#define FINSH_HISTORY_LINES 5
|
||||||
|
#define FINSH_USING_SYMTAB
|
||||||
|
#define FINSH_USING_DESCRIPTION
|
||||||
|
#define FINSH_THREAD_PRIORITY 20
|
||||||
|
#define FINSH_THREAD_STACK_SIZE 4096
|
||||||
|
#define FINSH_CMD_SIZE 80
|
||||||
|
#define FINSH_USING_MSH
|
||||||
|
#define FINSH_USING_MSH_DEFAULT
|
||||||
|
#define FINSH_USING_MSH_ONLY
|
||||||
|
#define FINSH_ARG_MAX 10
|
||||||
|
|
||||||
|
/* Device virtual file system */
|
||||||
|
|
||||||
|
#define RT_USING_DFS
|
||||||
|
#define DFS_USING_WORKDIR
|
||||||
|
#define DFS_FILESYSTEMS_MAX 2
|
||||||
|
#define DFS_FILESYSTEM_TYPES_MAX 2
|
||||||
|
#define DFS_FD_MAX 16
|
||||||
|
#define RT_USING_DFS_ELMFAT
|
||||||
|
|
||||||
|
/* elm-chan's FatFs, Generic FAT Filesystem Module */
|
||||||
|
|
||||||
|
#define RT_DFS_ELM_CODE_PAGE 437
|
||||||
|
#define RT_DFS_ELM_WORD_ACCESS
|
||||||
|
#define RT_DFS_ELM_USE_LFN_3
|
||||||
|
#define RT_DFS_ELM_USE_LFN 3
|
||||||
|
#define RT_DFS_ELM_MAX_LFN 255
|
||||||
|
#define RT_DFS_ELM_DRIVES 2
|
||||||
|
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
|
||||||
|
#define RT_DFS_ELM_REENTRANT
|
||||||
|
#define RT_USING_DFS_DEVFS
|
||||||
|
|
||||||
|
/* Device Drivers */
|
||||||
|
|
||||||
|
#define RT_USING_DEVICE_IPC
|
||||||
|
#define RT_PIPE_BUFSZ 512
|
||||||
|
#define RT_USING_SERIAL
|
||||||
|
#define RT_SERIAL_RB_BUFSZ 64
|
||||||
|
#define RT_USING_HWTIMER
|
||||||
|
#define RT_USING_I2C
|
||||||
|
#define RT_USING_I2C_BITOPS
|
||||||
|
#define RT_USING_PIN
|
||||||
|
#define RT_USING_ADC
|
||||||
|
#define RT_USING_PWM
|
||||||
|
#define RT_USING_RTC
|
||||||
|
#define RT_USING_SDIO
|
||||||
|
#define RT_SDIO_STACK_SIZE 512
|
||||||
|
#define RT_SDIO_THREAD_PRIORITY 15
|
||||||
|
#define RT_MMCSD_STACK_SIZE 1024
|
||||||
|
#define RT_MMCSD_THREAD_PREORITY 22
|
||||||
|
#define RT_MMCSD_MAX_PARTITION 16
|
||||||
|
#define RT_USING_SPI
|
||||||
|
|
||||||
|
/* Using USB */
|
||||||
|
|
||||||
|
|
||||||
|
/* POSIX layer and C standard library */
|
||||||
|
|
||||||
|
#define RT_USING_LIBC
|
||||||
|
#define RT_USING_POSIX
|
||||||
|
|
||||||
|
/* Network */
|
||||||
|
|
||||||
|
/* Socket abstraction layer */
|
||||||
|
|
||||||
|
|
||||||
|
/* Network interface device */
|
||||||
|
|
||||||
|
|
||||||
|
/* light weight TCP/IP stack */
|
||||||
|
|
||||||
|
|
||||||
|
/* AT commands */
|
||||||
|
|
||||||
|
|
||||||
|
/* VBUS(Virtual Software BUS) */
|
||||||
|
|
||||||
|
|
||||||
|
/* Utilities */
|
||||||
|
|
||||||
|
|
||||||
|
/* RT-Thread online packages */
|
||||||
|
|
||||||
|
/* IoT - internet of things */
|
||||||
|
|
||||||
|
|
||||||
|
/* Wi-Fi */
|
||||||
|
|
||||||
|
/* Marvell WiFi */
|
||||||
|
|
||||||
|
|
||||||
|
/* Wiced WiFi */
|
||||||
|
|
||||||
|
|
||||||
|
/* IoT Cloud */
|
||||||
|
|
||||||
|
|
||||||
|
/* security packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* language packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* multimedia packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* tools packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* system packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* peripheral libraries and drivers */
|
||||||
|
|
||||||
|
|
||||||
|
/* miscellaneous packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* samples: kernel and components samples */
|
||||||
|
|
||||||
|
#define SOC_FAMILY_AT32
|
||||||
|
#define SOC_SERIES_AT32F407
|
||||||
|
|
||||||
|
/* Hardware Drivers Config */
|
||||||
|
|
||||||
|
#define SOC_AT32F407VGT7
|
||||||
|
|
||||||
|
/* Onboard Peripheral Drivers */
|
||||||
|
|
||||||
|
#define BSP_USING_SERIAL
|
||||||
|
|
||||||
|
/* On-chip Peripheral Drivers */
|
||||||
|
|
||||||
|
#define BSP_USING_GPIO
|
||||||
|
#define BSP_USING_UART
|
||||||
|
#define BSP_USING_UART1
|
||||||
|
#define BSP_USING_UART2
|
||||||
|
#define BSP_USING_UART3
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,143 @@
|
||||||
|
import os
|
||||||
|
|
||||||
|
# toolchains options
|
||||||
|
ARCH='arm'
|
||||||
|
CPU='cortex-m4'
|
||||||
|
CROSS_TOOL='gcc'
|
||||||
|
|
||||||
|
# bsp lib config
|
||||||
|
BSP_LIBRARY_TYPE = None
|
||||||
|
|
||||||
|
if os.getenv('RTT_CC'):
|
||||||
|
CROSS_TOOL = os.getenv('RTT_CC')
|
||||||
|
if os.getenv('RTT_ROOT'):
|
||||||
|
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||||
|
|
||||||
|
# cross_tool provides the cross compiler
|
||||||
|
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||||
|
if CROSS_TOOL == 'gcc':
|
||||||
|
PLATFORM = 'gcc'
|
||||||
|
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||||
|
elif CROSS_TOOL == 'keil':
|
||||||
|
PLATFORM = 'armcc'
|
||||||
|
EXEC_PATH = r'C:/Keil_v5'
|
||||||
|
elif CROSS_TOOL == 'iar':
|
||||||
|
PLATFORM = 'iar'
|
||||||
|
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
|
||||||
|
|
||||||
|
if os.getenv('RTT_EXEC_PATH'):
|
||||||
|
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||||
|
|
||||||
|
BUILD = 'debug'
|
||||||
|
|
||||||
|
if PLATFORM == 'gcc':
|
||||||
|
# toolchains
|
||||||
|
PREFIX = 'arm-none-eabi-'
|
||||||
|
CC = PREFIX + 'gcc'
|
||||||
|
AS = PREFIX + 'gcc'
|
||||||
|
AR = PREFIX + 'ar'
|
||||||
|
CXX = PREFIX + 'g++'
|
||||||
|
LINK = PREFIX + 'gcc'
|
||||||
|
TARGET_EXT = 'elf'
|
||||||
|
SIZE = PREFIX + 'size'
|
||||||
|
OBJDUMP = PREFIX + 'objdump'
|
||||||
|
OBJCPY = PREFIX + 'objcopy'
|
||||||
|
|
||||||
|
DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||||
|
CFLAGS = DEVICE + ' -Dgcc'
|
||||||
|
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||||
|
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||||
|
|
||||||
|
CPATH = ''
|
||||||
|
LPATH = ''
|
||||||
|
|
||||||
|
if BUILD == 'debug':
|
||||||
|
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||||
|
AFLAGS += ' -gdwarf-2'
|
||||||
|
else:
|
||||||
|
CFLAGS += ' -O2'
|
||||||
|
|
||||||
|
CXXFLAGS = CFLAGS
|
||||||
|
|
||||||
|
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||||
|
|
||||||
|
elif PLATFORM == 'armcc':
|
||||||
|
# toolchains
|
||||||
|
CC = 'armcc'
|
||||||
|
CXX = 'armcc'
|
||||||
|
AS = 'armasm'
|
||||||
|
AR = 'armar'
|
||||||
|
LINK = 'armlink'
|
||||||
|
TARGET_EXT = 'axf'
|
||||||
|
|
||||||
|
DEVICE = ' --cpu Cortex-M4.fp '
|
||||||
|
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||||
|
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||||
|
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||||
|
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||||
|
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||||
|
|
||||||
|
CFLAGS += ' -D__MICROLIB '
|
||||||
|
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||||
|
LFLAGS += ' --library_type=microlib '
|
||||||
|
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||||
|
|
||||||
|
if BUILD == 'debug':
|
||||||
|
CFLAGS += ' -g -O0'
|
||||||
|
AFLAGS += ' -g'
|
||||||
|
else:
|
||||||
|
CFLAGS += ' -O2'
|
||||||
|
|
||||||
|
CXXFLAGS = CFLAGS
|
||||||
|
CFLAGS += ' -std=c99'
|
||||||
|
|
||||||
|
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||||
|
|
||||||
|
elif PLATFORM == 'iar':
|
||||||
|
# toolchains
|
||||||
|
CC = 'iccarm'
|
||||||
|
CXX = 'iccarm'
|
||||||
|
AS = 'iasmarm'
|
||||||
|
AR = 'iarchive'
|
||||||
|
LINK = 'ilinkarm'
|
||||||
|
TARGET_EXT = 'out'
|
||||||
|
|
||||||
|
DEVICE = '-Dewarm'
|
||||||
|
|
||||||
|
CFLAGS = DEVICE
|
||||||
|
CFLAGS += ' --diag_suppress Pa050'
|
||||||
|
CFLAGS += ' --no_cse'
|
||||||
|
CFLAGS += ' --no_unroll'
|
||||||
|
CFLAGS += ' --no_inline'
|
||||||
|
CFLAGS += ' --no_code_motion'
|
||||||
|
CFLAGS += ' --no_tbaa'
|
||||||
|
CFLAGS += ' --no_clustering'
|
||||||
|
CFLAGS += ' --no_scheduling'
|
||||||
|
CFLAGS += ' --endian=little'
|
||||||
|
CFLAGS += ' --cpu=Cortex-M4'
|
||||||
|
CFLAGS += ' -e'
|
||||||
|
CFLAGS += ' --fpu=VFPv4_sp'
|
||||||
|
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||||
|
CFLAGS += ' --silent'
|
||||||
|
|
||||||
|
AFLAGS = DEVICE
|
||||||
|
AFLAGS += ' -s+'
|
||||||
|
AFLAGS += ' -w+'
|
||||||
|
AFLAGS += ' -r'
|
||||||
|
AFLAGS += ' --cpu Cortex-M4'
|
||||||
|
AFLAGS += ' --fpu VFPv4_sp'
|
||||||
|
AFLAGS += ' -S'
|
||||||
|
|
||||||
|
if BUILD == 'debug':
|
||||||
|
CFLAGS += ' --debug'
|
||||||
|
CFLAGS += ' -On'
|
||||||
|
else:
|
||||||
|
CFLAGS += ' -Oh'
|
||||||
|
|
||||||
|
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||||
|
LFLAGS += ' --entry __iar_program_start'
|
||||||
|
|
||||||
|
CXXFLAGS = CFLAGS
|
||||||
|
|
||||||
|
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||||
|
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,10 @@
|
||||||
|
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||||
|
|
||||||
|
<workspace>
|
||||||
|
<project>
|
||||||
|
<path>$WS_DIR$\template.ewp</path>
|
||||||
|
</project>
|
||||||
|
<batchBuild/>
|
||||||
|
</workspace>
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -0,0 +1,162 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.0</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Extensions>
|
||||||
|
<cExt>*.c</cExt>
|
||||||
|
<aExt>*.s*; *.src; *.a*</aExt>
|
||||||
|
<oExt>*.obj</oExt>
|
||||||
|
<lExt>*.lib</lExt>
|
||||||
|
<tExt>*.txt; *.h; *.inc</tExt>
|
||||||
|
<pExt>*.plm</pExt>
|
||||||
|
<CppX>*.cpp</CppX>
|
||||||
|
</Extensions>
|
||||||
|
|
||||||
|
<DaveTm>
|
||||||
|
<dwLowDateTime>0</dwLowDateTime>
|
||||||
|
<dwHighDateTime>0</dwHighDateTime>
|
||||||
|
</DaveTm>
|
||||||
|
|
||||||
|
<Target>
|
||||||
|
<TargetName>rt-thread</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<CLKADS>8000000</CLKADS>
|
||||||
|
<OPTTT>
|
||||||
|
<gFlags>1</gFlags>
|
||||||
|
<BeepAtEnd>1</BeepAtEnd>
|
||||||
|
<RunSim>1</RunSim>
|
||||||
|
<RunTarget>0</RunTarget>
|
||||||
|
</OPTTT>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<FlashByte>65535</FlashByte>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
</OPTHX>
|
||||||
|
<OPTLEX>
|
||||||
|
<PageWidth>79</PageWidth>
|
||||||
|
<PageLength>66</PageLength>
|
||||||
|
<TabStop>8</TabStop>
|
||||||
|
<ListingPath>.\build\keil\List\</ListingPath>
|
||||||
|
</OPTLEX>
|
||||||
|
<ListingPage>
|
||||||
|
<CreateCListing>1</CreateCListing>
|
||||||
|
<CreateAListing>1</CreateAListing>
|
||||||
|
<CreateLListing>1</CreateLListing>
|
||||||
|
<CreateIListing>0</CreateIListing>
|
||||||
|
<AsmCond>1</AsmCond>
|
||||||
|
<AsmSymb>1</AsmSymb>
|
||||||
|
<AsmXref>0</AsmXref>
|
||||||
|
<CCond>1</CCond>
|
||||||
|
<CCode>0</CCode>
|
||||||
|
<CListInc>0</CListInc>
|
||||||
|
<CSymb>0</CSymb>
|
||||||
|
<LinkerCodeListing>0</LinkerCodeListing>
|
||||||
|
</ListingPage>
|
||||||
|
<OPTXL>
|
||||||
|
<LMap>1</LMap>
|
||||||
|
<LComments>1</LComments>
|
||||||
|
<LGenerateSymbols>1</LGenerateSymbols>
|
||||||
|
<LLibSym>1</LLibSym>
|
||||||
|
<LLines>1</LLines>
|
||||||
|
<LLocSym>1</LLocSym>
|
||||||
|
<LPubSym>1</LPubSym>
|
||||||
|
<LXref>0</LXref>
|
||||||
|
<LExpSel>0</LExpSel>
|
||||||
|
</OPTXL>
|
||||||
|
<OPTFL>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
|
</OPTFL>
|
||||||
|
<CpuCode>0</CpuCode>
|
||||||
|
<DebugOpt>
|
||||||
|
<uSim>0</uSim>
|
||||||
|
<uTrg>1</uTrg>
|
||||||
|
<sLdApp>1</sLdApp>
|
||||||
|
<sGomain>1</sGomain>
|
||||||
|
<sRbreak>1</sRbreak>
|
||||||
|
<sRwatch>1</sRwatch>
|
||||||
|
<sRmem>1</sRmem>
|
||||||
|
<sRfunc>1</sRfunc>
|
||||||
|
<sRbox>1</sRbox>
|
||||||
|
<tLdApp>1</tLdApp>
|
||||||
|
<tGomain>1</tGomain>
|
||||||
|
<tRbreak>1</tRbreak>
|
||||||
|
<tRwatch>1</tRwatch>
|
||||||
|
<tRmem>1</tRmem>
|
||||||
|
<tRfunc>0</tRfunc>
|
||||||
|
<tRbox>1</tRbox>
|
||||||
|
<tRtrace>0</tRtrace>
|
||||||
|
<sRSysVw>1</sRSysVw>
|
||||||
|
<tRSysVw>1</tRSysVw>
|
||||||
|
<tPdscDbg>0</tPdscDbg>
|
||||||
|
<sRunDeb>0</sRunDeb>
|
||||||
|
<sLrtime>0</sLrtime>
|
||||||
|
<nTsel>6</nTsel>
|
||||||
|
<sDll></sDll>
|
||||||
|
<sDllPa></sDllPa>
|
||||||
|
<sDlgDll></sDlgDll>
|
||||||
|
<sDlgPa></sDlgPa>
|
||||||
|
<sIfile></sIfile>
|
||||||
|
<tDll></tDll>
|
||||||
|
<tDllPa></tDllPa>
|
||||||
|
<tDlgDll></tDlgDll>
|
||||||
|
<tDlgPa></tDlgPa>
|
||||||
|
<tIfile></tIfile>
|
||||||
|
<pMon>Segger\JL2CM3.dll</pMon>
|
||||||
|
</DebugOpt>
|
||||||
|
<TargetDriverDllRegistry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>JL2CM3</Key>
|
||||||
|
<Name>-U4294967295 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>UL2CM3</Key>
|
||||||
|
<Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FN1 -FC800 -FD20000000 -FF0AT32F407_1024 -FL0100000 -FS08000000</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
</TargetDriverDllRegistry>
|
||||||
|
<Breakpoint/>
|
||||||
|
<Tracepoint>
|
||||||
|
<THDelay>0</THDelay>
|
||||||
|
</Tracepoint>
|
||||||
|
<DebugFlag>
|
||||||
|
<trace>0</trace>
|
||||||
|
<periodic>0</periodic>
|
||||||
|
<aLwin>0</aLwin>
|
||||||
|
<aCover>0</aCover>
|
||||||
|
<aSer1>0</aSer1>
|
||||||
|
<aSer2>0</aSer2>
|
||||||
|
<aPa>0</aPa>
|
||||||
|
<viewmode>0</viewmode>
|
||||||
|
<vrSel>0</vrSel>
|
||||||
|
<aSym>0</aSym>
|
||||||
|
<aTbox>0</aTbox>
|
||||||
|
<AscS1>0</AscS1>
|
||||||
|
<AscS2>0</AscS2>
|
||||||
|
<AscS3>0</AscS3>
|
||||||
|
<aSer3>0</aSer3>
|
||||||
|
<eProf>0</eProf>
|
||||||
|
<aLa>0</aLa>
|
||||||
|
<aPa1>0</aPa1>
|
||||||
|
<AscS4>0</AscS4>
|
||||||
|
<aSer4>0</aSer4>
|
||||||
|
<StkLoc>0</StkLoc>
|
||||||
|
<TrcWin>0</TrcWin>
|
||||||
|
<newCpu>1</newCpu>
|
||||||
|
<uProt>0</uProt>
|
||||||
|
</DebugFlag>
|
||||||
|
<LintExecutable></LintExecutable>
|
||||||
|
<LintConfigFile></LintConfigFile>
|
||||||
|
</TargetOption>
|
||||||
|
</Target>
|
||||||
|
|
||||||
|
</ProjectOpt>
|
||||||
|
|
@ -0,0 +1,185 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.0</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Extensions>
|
||||||
|
<cExt>*.c</cExt>
|
||||||
|
<aExt>*.s*; *.src; *.a*</aExt>
|
||||||
|
<oExt>*.obj; *.o</oExt>
|
||||||
|
<lExt>*.lib</lExt>
|
||||||
|
<tExt>*.txt; *.h; *.inc</tExt>
|
||||||
|
<pExt>*.plm</pExt>
|
||||||
|
<CppX>*.cpp</CppX>
|
||||||
|
<nMigrate>0</nMigrate>
|
||||||
|
</Extensions>
|
||||||
|
|
||||||
|
<DaveTm>
|
||||||
|
<dwLowDateTime>0</dwLowDateTime>
|
||||||
|
<dwHighDateTime>0</dwHighDateTime>
|
||||||
|
</DaveTm>
|
||||||
|
|
||||||
|
<Target>
|
||||||
|
<TargetName>rt-thread</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<CLKADS>12000000</CLKADS>
|
||||||
|
<OPTTT>
|
||||||
|
<gFlags>1</gFlags>
|
||||||
|
<BeepAtEnd>1</BeepAtEnd>
|
||||||
|
<RunSim>0</RunSim>
|
||||||
|
<RunTarget>1</RunTarget>
|
||||||
|
<RunAbUc>0</RunAbUc>
|
||||||
|
</OPTTT>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<FlashByte>65535</FlashByte>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
</OPTHX>
|
||||||
|
<OPTLEX>
|
||||||
|
<PageWidth>79</PageWidth>
|
||||||
|
<PageLength>66</PageLength>
|
||||||
|
<TabStop>8</TabStop>
|
||||||
|
<ListingPath>.\build\keil\List\</ListingPath>
|
||||||
|
</OPTLEX>
|
||||||
|
<ListingPage>
|
||||||
|
<CreateCListing>1</CreateCListing>
|
||||||
|
<CreateAListing>1</CreateAListing>
|
||||||
|
<CreateLListing>1</CreateLListing>
|
||||||
|
<CreateIListing>0</CreateIListing>
|
||||||
|
<AsmCond>1</AsmCond>
|
||||||
|
<AsmSymb>1</AsmSymb>
|
||||||
|
<AsmXref>0</AsmXref>
|
||||||
|
<CCond>1</CCond>
|
||||||
|
<CCode>0</CCode>
|
||||||
|
<CListInc>0</CListInc>
|
||||||
|
<CSymb>0</CSymb>
|
||||||
|
<LinkerCodeListing>0</LinkerCodeListing>
|
||||||
|
</ListingPage>
|
||||||
|
<OPTXL>
|
||||||
|
<LMap>1</LMap>
|
||||||
|
<LComments>1</LComments>
|
||||||
|
<LGenerateSymbols>1</LGenerateSymbols>
|
||||||
|
<LLibSym>1</LLibSym>
|
||||||
|
<LLines>1</LLines>
|
||||||
|
<LLocSym>1</LLocSym>
|
||||||
|
<LPubSym>1</LPubSym>
|
||||||
|
<LXref>0</LXref>
|
||||||
|
<LExpSel>0</LExpSel>
|
||||||
|
</OPTXL>
|
||||||
|
<OPTFL>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
|
</OPTFL>
|
||||||
|
<CpuCode>255</CpuCode>
|
||||||
|
<DebugOpt>
|
||||||
|
<uSim>0</uSim>
|
||||||
|
<uTrg>1</uTrg>
|
||||||
|
<sLdApp>1</sLdApp>
|
||||||
|
<sGomain>1</sGomain>
|
||||||
|
<sRbreak>1</sRbreak>
|
||||||
|
<sRwatch>1</sRwatch>
|
||||||
|
<sRmem>1</sRmem>
|
||||||
|
<sRfunc>1</sRfunc>
|
||||||
|
<sRbox>1</sRbox>
|
||||||
|
<tLdApp>1</tLdApp>
|
||||||
|
<tGomain>1</tGomain>
|
||||||
|
<tRbreak>1</tRbreak>
|
||||||
|
<tRwatch>1</tRwatch>
|
||||||
|
<tRmem>1</tRmem>
|
||||||
|
<tRfunc>0</tRfunc>
|
||||||
|
<tRbox>1</tRbox>
|
||||||
|
<tRtrace>1</tRtrace>
|
||||||
|
<sRSysVw>1</sRSysVw>
|
||||||
|
<tRSysVw>1</tRSysVw>
|
||||||
|
<sRunDeb>0</sRunDeb>
|
||||||
|
<sLrtime>0</sLrtime>
|
||||||
|
<bEvRecOn>1</bEvRecOn>
|
||||||
|
<bSchkAxf>0</bSchkAxf>
|
||||||
|
<bTchkAxf>0</bTchkAxf>
|
||||||
|
<nTsel>6</nTsel>
|
||||||
|
<sDll></sDll>
|
||||||
|
<sDllPa></sDllPa>
|
||||||
|
<sDlgDll></sDlgDll>
|
||||||
|
<sDlgPa></sDlgPa>
|
||||||
|
<sIfile></sIfile>
|
||||||
|
<tDll></tDll>
|
||||||
|
<tDllPa></tDllPa>
|
||||||
|
<tDlgDll></tDlgDll>
|
||||||
|
<tDlgPa></tDlgPa>
|
||||||
|
<tIfile></tIfile>
|
||||||
|
<pMon>Segger\JL2CM3.dll</pMon>
|
||||||
|
</DebugOpt>
|
||||||
|
<TargetDriverDllRegistry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>UL2CM3</Key>
|
||||||
|
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0AT32F407_1024 -FL0100000 -FS08000000 -FP0($$Device:AT32F407VGT7$Flash\AT32F407_1024.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>JL2CM3</Key>
|
||||||
|
<Name>-U4294967295 -O14 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight JTAG-DP") -D00(3BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06414041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000 -FP0($$Device:AT32F407VGT7$Flash\AT32F407_1024.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
</TargetDriverDllRegistry>
|
||||||
|
<Breakpoint/>
|
||||||
|
<Tracepoint>
|
||||||
|
<THDelay>0</THDelay>
|
||||||
|
</Tracepoint>
|
||||||
|
<DebugFlag>
|
||||||
|
<trace>0</trace>
|
||||||
|
<periodic>0</periodic>
|
||||||
|
<aLwin>0</aLwin>
|
||||||
|
<aCover>0</aCover>
|
||||||
|
<aSer1>0</aSer1>
|
||||||
|
<aSer2>0</aSer2>
|
||||||
|
<aPa>0</aPa>
|
||||||
|
<viewmode>0</viewmode>
|
||||||
|
<vrSel>0</vrSel>
|
||||||
|
<aSym>0</aSym>
|
||||||
|
<aTbox>0</aTbox>
|
||||||
|
<AscS1>0</AscS1>
|
||||||
|
<AscS2>0</AscS2>
|
||||||
|
<AscS3>0</AscS3>
|
||||||
|
<aSer3>0</aSer3>
|
||||||
|
<eProf>0</eProf>
|
||||||
|
<aLa>0</aLa>
|
||||||
|
<aPa1>0</aPa1>
|
||||||
|
<AscS4>0</AscS4>
|
||||||
|
<aSer4>0</aSer4>
|
||||||
|
<StkLoc>0</StkLoc>
|
||||||
|
<TrcWin>0</TrcWin>
|
||||||
|
<newCpu>0</newCpu>
|
||||||
|
<uProt>0</uProt>
|
||||||
|
</DebugFlag>
|
||||||
|
<LintExecutable></LintExecutable>
|
||||||
|
<LintConfigFile></LintConfigFile>
|
||||||
|
<bLintAuto>0</bLintAuto>
|
||||||
|
<bAutoGenD>0</bAutoGenD>
|
||||||
|
<LntExFlags>0</LntExFlags>
|
||||||
|
<pMisraName></pMisraName>
|
||||||
|
<pszMrule></pszMrule>
|
||||||
|
<pSingCmds></pSingCmds>
|
||||||
|
<pMultCmds></pMultCmds>
|
||||||
|
<pMisraNamep></pMisraNamep>
|
||||||
|
<pszMrulep></pszMrulep>
|
||||||
|
<pSingCmdsp></pSingCmdsp>
|
||||||
|
<pMultCmdsp></pMultCmdsp>
|
||||||
|
</TargetOption>
|
||||||
|
</Target>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>Source Group 1</GroupName>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
</ProjectOpt>
|
||||||
|
|
@ -0,0 +1,407 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.1</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Targets>
|
||||||
|
<Target>
|
||||||
|
<TargetName>rt-thread</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<TargetCommonOption>
|
||||||
|
<Device>AT32F407VGT7</Device>
|
||||||
|
<Vendor>ArteryTek</Vendor>
|
||||||
|
<Cpu>IRAM(0x20000000-0x20037FFF) IROM(0x08000000-0x080FFFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
|
||||||
|
<FlashUtilSpec></FlashUtilSpec>
|
||||||
|
<StartupFile>"Startup\ArteryTek\AT32F4xx\startup_at32f407vgt7.s" ("AT32F403A Startup Code")</StartupFile>
|
||||||
|
<FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000)</FlashDriverDll>
|
||||||
|
<DeviceId>0</DeviceId>
|
||||||
|
<RegisterFile>at32f4xx.h</RegisterFile>
|
||||||
|
<MemoryEnv></MemoryEnv>
|
||||||
|
<Cmp></Cmp>
|
||||||
|
<Asm></Asm>
|
||||||
|
<Linker></Linker>
|
||||||
|
<OHString></OHString>
|
||||||
|
<InfinionOptionDll></InfinionOptionDll>
|
||||||
|
<SLE66CMisc></SLE66CMisc>
|
||||||
|
<SLE66AMisc></SLE66AMisc>
|
||||||
|
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||||
|
<SFDFile>SFD\ArteryTek\AT32F407\AT32F407xx.SFR</SFDFile>
|
||||||
|
<bCustSvd>0</bCustSvd>
|
||||||
|
<UseEnv>0</UseEnv>
|
||||||
|
<BinPath></BinPath>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
<LibPath></LibPath>
|
||||||
|
<RegisterFilePath>ArteryTek\AT32F4xx\</RegisterFilePath>
|
||||||
|
<DBRegisterFilePath>ArteryTek\AT32F4xx\</DBRegisterFilePath>
|
||||||
|
<TargetStatus>
|
||||||
|
<Error>0</Error>
|
||||||
|
<ExitCodeStop>0</ExitCodeStop>
|
||||||
|
<ButtonStop>0</ButtonStop>
|
||||||
|
<NotGenerated>0</NotGenerated>
|
||||||
|
<InvalidFlash>1</InvalidFlash>
|
||||||
|
</TargetStatus>
|
||||||
|
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
|
||||||
|
<OutputName>rt-thread</OutputName>
|
||||||
|
<CreateExecutable>1</CreateExecutable>
|
||||||
|
<CreateLib>0</CreateLib>
|
||||||
|
<CreateHexFile>0</CreateHexFile>
|
||||||
|
<DebugInformation>1</DebugInformation>
|
||||||
|
<BrowseInformation>0</BrowseInformation>
|
||||||
|
<ListingPath>.\build\keil\List\</ListingPath>
|
||||||
|
<HexFormatSelection>1</HexFormatSelection>
|
||||||
|
<Merge32K>0</Merge32K>
|
||||||
|
<CreateBatchFile>0</CreateBatchFile>
|
||||||
|
<BeforeCompile>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopU1X>0</nStopU1X>
|
||||||
|
<nStopU2X>0</nStopU2X>
|
||||||
|
</BeforeCompile>
|
||||||
|
<BeforeMake>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
</BeforeMake>
|
||||||
|
<AfterMake>
|
||||||
|
<RunUserProg1>1</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
</AfterMake>
|
||||||
|
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||||
|
<SVCSIdString></SVCSIdString>
|
||||||
|
</TargetCommonOption>
|
||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>0</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
<ComprImg>1</ComprImg>
|
||||||
|
</CommonProperty>
|
||||||
|
<DllOption>
|
||||||
|
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||||
|
<SimDllArguments> -REMAP</SimDllArguments>
|
||||||
|
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||||
|
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||||
|
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments></TargetDllArguments>
|
||||||
|
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||||
|
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||||
|
</DllOption>
|
||||||
|
<DebugOption>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
<Oh166RecLen>16</Oh166RecLen>
|
||||||
|
</OPTHX>
|
||||||
|
<Simulator>
|
||||||
|
<UseSimulator>0</UseSimulator>
|
||||||
|
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||||
|
<RunToMain>1</RunToMain>
|
||||||
|
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||||
|
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||||
|
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||||
|
<RestoreFunctions>1</RestoreFunctions>
|
||||||
|
<RestoreToolbox>1</RestoreToolbox>
|
||||||
|
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||||
|
<RestoreSysVw>1</RestoreSysVw>
|
||||||
|
</Simulator>
|
||||||
|
<Target>
|
||||||
|
<UseTarget>1</UseTarget>
|
||||||
|
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||||
|
<RunToMain>1</RunToMain>
|
||||||
|
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||||
|
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||||
|
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||||
|
<RestoreFunctions>0</RestoreFunctions>
|
||||||
|
<RestoreToolbox>1</RestoreToolbox>
|
||||||
|
<RestoreTracepoints>0</RestoreTracepoints>
|
||||||
|
<RestoreSysVw>1</RestoreSysVw>
|
||||||
|
<UsePdscDebugDescription>0</UsePdscDebugDescription>
|
||||||
|
</Target>
|
||||||
|
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||||
|
<TargetSelection>6</TargetSelection>
|
||||||
|
<SimDlls>
|
||||||
|
<CpuDll></CpuDll>
|
||||||
|
<CpuDllArguments></CpuDllArguments>
|
||||||
|
<PeripheralDll></PeripheralDll>
|
||||||
|
<PeripheralDllArguments></PeripheralDllArguments>
|
||||||
|
<InitializationFile></InitializationFile>
|
||||||
|
</SimDlls>
|
||||||
|
<TargetDlls>
|
||||||
|
<CpuDll></CpuDll>
|
||||||
|
<CpuDllArguments></CpuDllArguments>
|
||||||
|
<PeripheralDll></PeripheralDll>
|
||||||
|
<PeripheralDllArguments></PeripheralDllArguments>
|
||||||
|
<InitializationFile></InitializationFile>
|
||||||
|
<Driver>Segger\JL2CM3.dll</Driver>
|
||||||
|
</TargetDlls>
|
||||||
|
</DebugOption>
|
||||||
|
<Utilities>
|
||||||
|
<Flash1>
|
||||||
|
<UseTargetDll>1</UseTargetDll>
|
||||||
|
<UseExternalTool>0</UseExternalTool>
|
||||||
|
<RunIndependent>0</RunIndependent>
|
||||||
|
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||||
|
<Capability>1</Capability>
|
||||||
|
<DriverSelection>4096</DriverSelection>
|
||||||
|
</Flash1>
|
||||||
|
<bUseTDR>1</bUseTDR>
|
||||||
|
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||||
|
<Flash3></Flash3>
|
||||||
|
<Flash4></Flash4>
|
||||||
|
<pFcarmOut></pFcarmOut>
|
||||||
|
<pFcarmGrp></pFcarmGrp>
|
||||||
|
<pFcArmRoot></pFcArmRoot>
|
||||||
|
<FcArmLst>0</FcArmLst>
|
||||||
|
</Utilities>
|
||||||
|
<TargetArmAds>
|
||||||
|
<ArmAdsMisc>
|
||||||
|
<GenerateListings>0</GenerateListings>
|
||||||
|
<asHll>1</asHll>
|
||||||
|
<asAsm>1</asAsm>
|
||||||
|
<asMacX>1</asMacX>
|
||||||
|
<asSyms>1</asSyms>
|
||||||
|
<asFals>1</asFals>
|
||||||
|
<asDbgD>1</asDbgD>
|
||||||
|
<asForm>1</asForm>
|
||||||
|
<ldLst>0</ldLst>
|
||||||
|
<ldmm>1</ldmm>
|
||||||
|
<ldXref>1</ldXref>
|
||||||
|
<BigEnd>0</BigEnd>
|
||||||
|
<AdsALst>1</AdsALst>
|
||||||
|
<AdsACrf>1</AdsACrf>
|
||||||
|
<AdsANop>0</AdsANop>
|
||||||
|
<AdsANot>0</AdsANot>
|
||||||
|
<AdsLLst>1</AdsLLst>
|
||||||
|
<AdsLmap>1</AdsLmap>
|
||||||
|
<AdsLcgr>1</AdsLcgr>
|
||||||
|
<AdsLsym>1</AdsLsym>
|
||||||
|
<AdsLszi>1</AdsLszi>
|
||||||
|
<AdsLtoi>1</AdsLtoi>
|
||||||
|
<AdsLsun>1</AdsLsun>
|
||||||
|
<AdsLven>1</AdsLven>
|
||||||
|
<AdsLsxf>1</AdsLsxf>
|
||||||
|
<RvctClst>0</RvctClst>
|
||||||
|
<GenPPlst>0</GenPPlst>
|
||||||
|
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||||
|
<RvctDeviceName></RvctDeviceName>
|
||||||
|
<mOS>0</mOS>
|
||||||
|
<uocRom>0</uocRom>
|
||||||
|
<uocRam>0</uocRam>
|
||||||
|
<hadIROM>1</hadIROM>
|
||||||
|
<hadIRAM>1</hadIRAM>
|
||||||
|
<hadXRAM>0</hadXRAM>
|
||||||
|
<uocXRam>0</uocXRam>
|
||||||
|
<RvdsVP>2</RvdsVP>
|
||||||
|
<hadIRAM2>0</hadIRAM2>
|
||||||
|
<hadIROM2>0</hadIROM2>
|
||||||
|
<StupSel>8</StupSel>
|
||||||
|
<useUlib>0</useUlib>
|
||||||
|
<EndSel>0</EndSel>
|
||||||
|
<uLtcg>0</uLtcg>
|
||||||
|
<RoSelD>3</RoSelD>
|
||||||
|
<RwSelD>3</RwSelD>
|
||||||
|
<CodeSel>0</CodeSel>
|
||||||
|
<OptFeed>0</OptFeed>
|
||||||
|
<NoZi1>0</NoZi1>
|
||||||
|
<NoZi2>0</NoZi2>
|
||||||
|
<NoZi3>0</NoZi3>
|
||||||
|
<NoZi4>0</NoZi4>
|
||||||
|
<NoZi5>0</NoZi5>
|
||||||
|
<Ro1Chk>0</Ro1Chk>
|
||||||
|
<Ro2Chk>0</Ro2Chk>
|
||||||
|
<Ro3Chk>0</Ro3Chk>
|
||||||
|
<Ir1Chk>1</Ir1Chk>
|
||||||
|
<Ir2Chk>0</Ir2Chk>
|
||||||
|
<Ra1Chk>0</Ra1Chk>
|
||||||
|
<Ra2Chk>0</Ra2Chk>
|
||||||
|
<Ra3Chk>0</Ra3Chk>
|
||||||
|
<Im1Chk>1</Im1Chk>
|
||||||
|
<Im2Chk>0</Im2Chk>
|
||||||
|
<OnChipMemories>
|
||||||
|
<Ocm1>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm1>
|
||||||
|
<Ocm2>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm2>
|
||||||
|
<Ocm3>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm3>
|
||||||
|
<Ocm4>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm4>
|
||||||
|
<Ocm5>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm5>
|
||||||
|
<Ocm6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm6>
|
||||||
|
<IRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x38000</Size>
|
||||||
|
</IRAM>
|
||||||
|
<IROM>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x100000</Size>
|
||||||
|
</IROM>
|
||||||
|
<XRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</XRAM>
|
||||||
|
<OCR_RVCT1>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT1>
|
||||||
|
<OCR_RVCT2>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT2>
|
||||||
|
<OCR_RVCT3>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT3>
|
||||||
|
<OCR_RVCT4>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x100000</Size>
|
||||||
|
</OCR_RVCT4>
|
||||||
|
<OCR_RVCT5>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT5>
|
||||||
|
<OCR_RVCT6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT6>
|
||||||
|
<OCR_RVCT7>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT7>
|
||||||
|
<OCR_RVCT8>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT8>
|
||||||
|
<OCR_RVCT9>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x38000</Size>
|
||||||
|
</OCR_RVCT9>
|
||||||
|
<OCR_RVCT10>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT10>
|
||||||
|
</OnChipMemories>
|
||||||
|
<RvctStartVector></RvctStartVector>
|
||||||
|
</ArmAdsMisc>
|
||||||
|
<Cads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Optim>1</Optim>
|
||||||
|
<oTime>0</oTime>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<OneElfS>1</OneElfS>
|
||||||
|
<Strict>0</Strict>
|
||||||
|
<EnumInt>0</EnumInt>
|
||||||
|
<PlainCh>0</PlainCh>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<wLevel>0</wLevel>
|
||||||
|
<uThumb>0</uThumb>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<uC99>1</uC99>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Cads>
|
||||||
|
<Aads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<thumb>0</thumb>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<SwStkChk>0</SwStkChk>
|
||||||
|
<NoWarn>0</NoWarn>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Aads>
|
||||||
|
<LDads>
|
||||||
|
<umfTarg>0</umfTarg>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<noStLib>0</noStLib>
|
||||||
|
<RepFail>1</RepFail>
|
||||||
|
<useFile>0</useFile>
|
||||||
|
<TextAddressRange>0x08000000</TextAddressRange>
|
||||||
|
<DataAddressRange>0x20000000</DataAddressRange>
|
||||||
|
<pXoBase></pXoBase>
|
||||||
|
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||||
|
<IncludeLibs></IncludeLibs>
|
||||||
|
<IncludeLibsPath></IncludeLibsPath>
|
||||||
|
<Misc></Misc>
|
||||||
|
<LinkerInputFile></LinkerInputFile>
|
||||||
|
<DisabledWarnings></DisabledWarnings>
|
||||||
|
</LDads>
|
||||||
|
</TargetArmAds>
|
||||||
|
</TargetOption>
|
||||||
|
</Target>
|
||||||
|
</Targets>
|
||||||
|
|
||||||
|
</Project>
|
||||||
|
|
@ -0,0 +1,394 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>2.1</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Targets>
|
||||||
|
<Target>
|
||||||
|
<TargetName>rt-thread</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||||
|
<uAC6>0</uAC6>
|
||||||
|
<TargetOption>
|
||||||
|
<TargetCommonOption>
|
||||||
|
<Device>AT32F407VGT7</Device>
|
||||||
|
<Vendor>ArteryTek</Vendor>
|
||||||
|
<PackID>Keil.AT32F4xx_DFP.1.3.1</PackID>
|
||||||
|
<Cpu>IRAM(0x20000000,0x38000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
|
||||||
|
<FlashUtilSpec></FlashUtilSpec>
|
||||||
|
<StartupFile></StartupFile>
|
||||||
|
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000 -FP0($$Device:AT32F407VGT7$Flash\AT32F407_1024.FLM))</FlashDriverDll>
|
||||||
|
<DeviceId>0</DeviceId>
|
||||||
|
<RegisterFile>$$Device:AT32F407VGT7$Device\Include\at32f4xx.h</RegisterFile>
|
||||||
|
<MemoryEnv></MemoryEnv>
|
||||||
|
<Cmp></Cmp>
|
||||||
|
<Asm></Asm>
|
||||||
|
<Linker></Linker>
|
||||||
|
<OHString></OHString>
|
||||||
|
<InfinionOptionDll></InfinionOptionDll>
|
||||||
|
<SLE66CMisc></SLE66CMisc>
|
||||||
|
<SLE66AMisc></SLE66AMisc>
|
||||||
|
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||||
|
<SFDFile>$$Device:AT32F407VGT7$SVD\AT32F407xx.svd</SFDFile>
|
||||||
|
<bCustSvd>0</bCustSvd>
|
||||||
|
<UseEnv>0</UseEnv>
|
||||||
|
<BinPath></BinPath>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
<LibPath></LibPath>
|
||||||
|
<RegisterFilePath></RegisterFilePath>
|
||||||
|
<DBRegisterFilePath></DBRegisterFilePath>
|
||||||
|
<TargetStatus>
|
||||||
|
<Error>0</Error>
|
||||||
|
<ExitCodeStop>0</ExitCodeStop>
|
||||||
|
<ButtonStop>0</ButtonStop>
|
||||||
|
<NotGenerated>0</NotGenerated>
|
||||||
|
<InvalidFlash>1</InvalidFlash>
|
||||||
|
</TargetStatus>
|
||||||
|
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
|
||||||
|
<OutputName>rt-thread</OutputName>
|
||||||
|
<CreateExecutable>1</CreateExecutable>
|
||||||
|
<CreateLib>0</CreateLib>
|
||||||
|
<CreateHexFile>0</CreateHexFile>
|
||||||
|
<DebugInformation>1</DebugInformation>
|
||||||
|
<BrowseInformation>0</BrowseInformation>
|
||||||
|
<ListingPath>.\build\keil\List\</ListingPath>
|
||||||
|
<HexFormatSelection>1</HexFormatSelection>
|
||||||
|
<Merge32K>0</Merge32K>
|
||||||
|
<CreateBatchFile>0</CreateBatchFile>
|
||||||
|
<BeforeCompile>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopU1X>0</nStopU1X>
|
||||||
|
<nStopU2X>0</nStopU2X>
|
||||||
|
</BeforeCompile>
|
||||||
|
<BeforeMake>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopB1X>0</nStopB1X>
|
||||||
|
<nStopB2X>0</nStopB2X>
|
||||||
|
</BeforeMake>
|
||||||
|
<AfterMake>
|
||||||
|
<RunUserProg1>1</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopA1X>0</nStopA1X>
|
||||||
|
<nStopA2X>0</nStopA2X>
|
||||||
|
</AfterMake>
|
||||||
|
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||||
|
<SVCSIdString></SVCSIdString>
|
||||||
|
</TargetCommonOption>
|
||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>0</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
<ComprImg>1</ComprImg>
|
||||||
|
</CommonProperty>
|
||||||
|
<DllOption>
|
||||||
|
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||||
|
<SimDllArguments> -REMAP</SimDllArguments>
|
||||||
|
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||||
|
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||||
|
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments></TargetDllArguments>
|
||||||
|
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||||
|
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||||
|
</DllOption>
|
||||||
|
<DebugOption>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
<Oh166RecLen>16</Oh166RecLen>
|
||||||
|
</OPTHX>
|
||||||
|
</DebugOption>
|
||||||
|
<Utilities>
|
||||||
|
<Flash1>
|
||||||
|
<UseTargetDll>1</UseTargetDll>
|
||||||
|
<UseExternalTool>0</UseExternalTool>
|
||||||
|
<RunIndependent>0</RunIndependent>
|
||||||
|
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||||
|
<Capability>1</Capability>
|
||||||
|
<DriverSelection>4096</DriverSelection>
|
||||||
|
</Flash1>
|
||||||
|
<bUseTDR>1</bUseTDR>
|
||||||
|
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||||
|
<Flash3></Flash3>
|
||||||
|
<Flash4></Flash4>
|
||||||
|
<pFcarmOut></pFcarmOut>
|
||||||
|
<pFcarmGrp></pFcarmGrp>
|
||||||
|
<pFcArmRoot></pFcArmRoot>
|
||||||
|
<FcArmLst>0</FcArmLst>
|
||||||
|
</Utilities>
|
||||||
|
<TargetArmAds>
|
||||||
|
<ArmAdsMisc>
|
||||||
|
<GenerateListings>0</GenerateListings>
|
||||||
|
<asHll>1</asHll>
|
||||||
|
<asAsm>1</asAsm>
|
||||||
|
<asMacX>1</asMacX>
|
||||||
|
<asSyms>1</asSyms>
|
||||||
|
<asFals>1</asFals>
|
||||||
|
<asDbgD>1</asDbgD>
|
||||||
|
<asForm>1</asForm>
|
||||||
|
<ldLst>0</ldLst>
|
||||||
|
<ldmm>1</ldmm>
|
||||||
|
<ldXref>1</ldXref>
|
||||||
|
<BigEnd>0</BigEnd>
|
||||||
|
<AdsALst>1</AdsALst>
|
||||||
|
<AdsACrf>1</AdsACrf>
|
||||||
|
<AdsANop>0</AdsANop>
|
||||||
|
<AdsANot>0</AdsANot>
|
||||||
|
<AdsLLst>1</AdsLLst>
|
||||||
|
<AdsLmap>1</AdsLmap>
|
||||||
|
<AdsLcgr>1</AdsLcgr>
|
||||||
|
<AdsLsym>1</AdsLsym>
|
||||||
|
<AdsLszi>1</AdsLszi>
|
||||||
|
<AdsLtoi>1</AdsLtoi>
|
||||||
|
<AdsLsun>1</AdsLsun>
|
||||||
|
<AdsLven>1</AdsLven>
|
||||||
|
<AdsLsxf>1</AdsLsxf>
|
||||||
|
<RvctClst>0</RvctClst>
|
||||||
|
<GenPPlst>0</GenPPlst>
|
||||||
|
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||||
|
<RvctDeviceName></RvctDeviceName>
|
||||||
|
<mOS>0</mOS>
|
||||||
|
<uocRom>0</uocRom>
|
||||||
|
<uocRam>0</uocRam>
|
||||||
|
<hadIROM>1</hadIROM>
|
||||||
|
<hadIRAM>1</hadIRAM>
|
||||||
|
<hadXRAM>0</hadXRAM>
|
||||||
|
<uocXRam>0</uocXRam>
|
||||||
|
<RvdsVP>2</RvdsVP>
|
||||||
|
<RvdsMve>0</RvdsMve>
|
||||||
|
<hadIRAM2>0</hadIRAM2>
|
||||||
|
<hadIROM2>0</hadIROM2>
|
||||||
|
<StupSel>8</StupSel>
|
||||||
|
<useUlib>0</useUlib>
|
||||||
|
<EndSel>0</EndSel>
|
||||||
|
<uLtcg>0</uLtcg>
|
||||||
|
<nSecure>0</nSecure>
|
||||||
|
<RoSelD>3</RoSelD>
|
||||||
|
<RwSelD>3</RwSelD>
|
||||||
|
<CodeSel>0</CodeSel>
|
||||||
|
<OptFeed>0</OptFeed>
|
||||||
|
<NoZi1>0</NoZi1>
|
||||||
|
<NoZi2>0</NoZi2>
|
||||||
|
<NoZi3>0</NoZi3>
|
||||||
|
<NoZi4>0</NoZi4>
|
||||||
|
<NoZi5>0</NoZi5>
|
||||||
|
<Ro1Chk>0</Ro1Chk>
|
||||||
|
<Ro2Chk>0</Ro2Chk>
|
||||||
|
<Ro3Chk>0</Ro3Chk>
|
||||||
|
<Ir1Chk>1</Ir1Chk>
|
||||||
|
<Ir2Chk>0</Ir2Chk>
|
||||||
|
<Ra1Chk>0</Ra1Chk>
|
||||||
|
<Ra2Chk>0</Ra2Chk>
|
||||||
|
<Ra3Chk>0</Ra3Chk>
|
||||||
|
<Im1Chk>1</Im1Chk>
|
||||||
|
<Im2Chk>0</Im2Chk>
|
||||||
|
<OnChipMemories>
|
||||||
|
<Ocm1>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm1>
|
||||||
|
<Ocm2>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm2>
|
||||||
|
<Ocm3>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm3>
|
||||||
|
<Ocm4>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm4>
|
||||||
|
<Ocm5>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm5>
|
||||||
|
<Ocm6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm6>
|
||||||
|
<IRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x38000</Size>
|
||||||
|
</IRAM>
|
||||||
|
<IROM>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x100000</Size>
|
||||||
|
</IROM>
|
||||||
|
<XRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</XRAM>
|
||||||
|
<OCR_RVCT1>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT1>
|
||||||
|
<OCR_RVCT2>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT2>
|
||||||
|
<OCR_RVCT3>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT3>
|
||||||
|
<OCR_RVCT4>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x100000</Size>
|
||||||
|
</OCR_RVCT4>
|
||||||
|
<OCR_RVCT5>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT5>
|
||||||
|
<OCR_RVCT6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT6>
|
||||||
|
<OCR_RVCT7>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT7>
|
||||||
|
<OCR_RVCT8>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT8>
|
||||||
|
<OCR_RVCT9>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x38000</Size>
|
||||||
|
</OCR_RVCT9>
|
||||||
|
<OCR_RVCT10>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT10>
|
||||||
|
</OnChipMemories>
|
||||||
|
<RvctStartVector></RvctStartVector>
|
||||||
|
</ArmAdsMisc>
|
||||||
|
<Cads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Optim>1</Optim>
|
||||||
|
<oTime>0</oTime>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<OneElfS>1</OneElfS>
|
||||||
|
<Strict>0</Strict>
|
||||||
|
<EnumInt>0</EnumInt>
|
||||||
|
<PlainCh>0</PlainCh>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<wLevel>2</wLevel>
|
||||||
|
<uThumb>0</uThumb>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<uC99>1</uC99>
|
||||||
|
<uGnu>0</uGnu>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<v6Lang>1</v6Lang>
|
||||||
|
<v6LangP>1</v6LangP>
|
||||||
|
<vShortEn>1</vShortEn>
|
||||||
|
<vShortWch>1</vShortWch>
|
||||||
|
<v6Lto>0</v6Lto>
|
||||||
|
<v6WtE>0</v6WtE>
|
||||||
|
<v6Rtti>0</v6Rtti>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Cads>
|
||||||
|
<Aads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<thumb>0</thumb>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<SwStkChk>0</SwStkChk>
|
||||||
|
<NoWarn>0</NoWarn>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<uClangAs>0</uClangAs>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Aads>
|
||||||
|
<LDads>
|
||||||
|
<umfTarg>0</umfTarg>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<noStLib>0</noStLib>
|
||||||
|
<RepFail>1</RepFail>
|
||||||
|
<useFile>0</useFile>
|
||||||
|
<TextAddressRange>0x08000000</TextAddressRange>
|
||||||
|
<DataAddressRange>0x20000000</DataAddressRange>
|
||||||
|
<pXoBase></pXoBase>
|
||||||
|
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||||
|
<IncludeLibs></IncludeLibs>
|
||||||
|
<IncludeLibsPath></IncludeLibsPath>
|
||||||
|
<Misc></Misc>
|
||||||
|
<LinkerInputFile></LinkerInputFile>
|
||||||
|
<DisabledWarnings></DisabledWarnings>
|
||||||
|
</LDads>
|
||||||
|
</TargetArmAds>
|
||||||
|
</TargetOption>
|
||||||
|
<Groups>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Source Group 1</GroupName>
|
||||||
|
</Group>
|
||||||
|
</Groups>
|
||||||
|
</Target>
|
||||||
|
</Targets>
|
||||||
|
|
||||||
|
<RTE>
|
||||||
|
<apis/>
|
||||||
|
<components/>
|
||||||
|
<files/>
|
||||||
|
</RTE>
|
||||||
|
|
||||||
|
</Project>
|
||||||
Loading…
Reference in New Issue