Merge branch 'master' of https://github.com/RT-Thread/rt-thread
This commit is contained in:
Bernard Xiong
commit
dedc22379a
@ -37,7 +37,7 @@
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#define LSR_RXFE 0x80
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/**
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* @addtogroup LPC11xx
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* @addtogroup LPC176x
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*/
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/*@{*/
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@ -54,12 +54,12 @@ struct rt_uart_lpc
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/* buffer for reception */
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rt_uint8_t read_index, save_index;
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rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
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}uart_device;
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} uart_device;
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void UART0_IRQHandler(void)
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{
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rt_ubase_t level, iir;
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struct rt_uart_lpc* uart = &uart_device;
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struct rt_uart_lpc *uart = &uart_device;
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/* read IIR and clear it */
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iir = LPC_UART->IIR;
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@ -79,7 +79,7 @@ void UART0_IRQHandler(void)
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rt_hw_interrupt_enable(level);
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/* invoke callback */
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if(uart->parent.rx_indicate != RT_NULL)
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if (uart->parent.rx_indicate != RT_NULL)
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{
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rt_size_t length;
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if (uart->read_index > uart->save_index)
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@ -90,11 +90,15 @@ void UART0_IRQHandler(void)
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uart->parent.rx_indicate(&uart->parent, length);
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}
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}
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else if (iir == IIR_RLS)
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{
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iir = LPC_UART->LSR; //oe pe fe oe read for clear interrupt
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}
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return;
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}
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static rt_err_t rt_uart_init (rt_device_t dev)
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static rt_err_t rt_uart_init(rt_device_t dev)
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{
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rt_uint32_t Fdiv;
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rt_uint32_t pclkdiv, pclk;
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@ -108,31 +112,31 @@ static rt_err_t rt_uart_init (rt_device_t dev)
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all the peripherals is 1/4 of the SystemFrequency. */
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/* Bit 6~7 is for UART0 */
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pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03;
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switch ( pclkdiv )
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switch (pclkdiv)
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{
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case 0x00:
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default:
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pclk = SystemCoreClock/4;
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pclk = SystemCoreClock / 4;
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break;
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case 0x01:
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pclk = SystemCoreClock;
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break;
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case 0x02:
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pclk = SystemCoreClock/2;
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pclk = SystemCoreClock / 2;
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break;
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case 0x03:
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pclk = SystemCoreClock/8;
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pclk = SystemCoreClock / 8;
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break;
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}
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LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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Fdiv = ( pclk / 16 ) / UART_BAUDRATE; /*baud rate */
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Fdiv = (pclk / 16) / UART_BAUDRATE; /*baud rate */
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LPC_UART0->DLM = Fdiv / 256;
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LPC_UART0->DLL = Fdiv % 256;
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LPC_UART0->LCR = 0x03; /* DLAB = 0 */
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LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
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}
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else if ((LPC_UART1_TypeDef*)LPC_UART == LPC_UART1)
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else if ((LPC_UART1_TypeDef *)LPC_UART == LPC_UART1)
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{
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LPC_PINCON->PINSEL4 &= ~0x0000000F;
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LPC_PINCON->PINSEL4 |= 0x0000000A; /* Enable RxD1 P2.1, TxD1 P2.0 */
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@ -141,25 +145,25 @@ static rt_err_t rt_uart_init (rt_device_t dev)
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all the peripherals is 1/4 of the SystemFrequency. */
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/* Bit 8,9 are for UART1 */
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pclkdiv = (LPC_SC->PCLKSEL0 >> 8) & 0x03;
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switch ( pclkdiv )
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switch (pclkdiv)
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{
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case 0x00:
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default:
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pclk = SystemCoreClock/4;
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pclk = SystemCoreClock / 4;
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break;
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case 0x01:
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pclk = SystemCoreClock;
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break;
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case 0x02:
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pclk = SystemCoreClock/2;
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pclk = SystemCoreClock / 2;
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break;
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case 0x03:
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pclk = SystemCoreClock/8;
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pclk = SystemCoreClock / 8;
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break;
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}
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LPC_UART1->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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Fdiv = ( pclk / 16 ) / UART_BAUDRATE ; /*baud rate */
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Fdiv = (pclk / 16) / UART_BAUDRATE ; /*baud rate */
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LPC_UART1->DLM = Fdiv / 256;
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LPC_UART1->DLL = Fdiv % 256;
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LPC_UART1->LCR = 0x03; /* DLAB = 0 */
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@ -167,8 +171,8 @@ static rt_err_t rt_uart_init (rt_device_t dev)
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}
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/* Ensure a clean start, no data in either TX or RX FIFO. */
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while (( LPC_UART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
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while ( LPC_UART->LSR & LSR_RDR )
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while ((LPC_UART->LSR & (LSR_THRE | LSR_TEMT)) != (LSR_THRE | LSR_TEMT));
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while (LPC_UART->LSR & LSR_RDR)
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{
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Fdiv = LPC_UART->RBR; /* Dump data from RX FIFO */
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}
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@ -201,14 +205,14 @@ static rt_err_t rt_uart_close(rt_device_t dev)
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return RT_EOK;
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}
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static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
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{
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rt_uint8_t* ptr;
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struct rt_uart_lpc *uart = (struct rt_uart_lpc*)dev;
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rt_uint8_t *ptr;
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struct rt_uart_lpc *uart = (struct rt_uart_lpc *)dev;
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RT_ASSERT(uart != RT_NULL);
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/* point to buffer */
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ptr = (rt_uint8_t*) buffer;
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ptr = (rt_uint8_t *) buffer;
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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while (size)
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@ -248,10 +252,10 @@ static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_si
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return 0;
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}
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static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
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{
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char *ptr;
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ptr = (char*)buffer;
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ptr = (char *)buffer;
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if (dev->flag & RT_DEVICE_FLAG_STREAM)
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{
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@ -261,13 +265,13 @@ static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer
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if (*ptr == '\n')
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{
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/* THRE status, contain valid data */
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while ( !(LPC_UART->LSR & LSR_THRE) );
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while (!(LPC_UART->LSR & LSR_THRE));
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/* write data */
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LPC_UART->THR = '\r';
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}
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/* THRE status, contain valid data */
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while ( !(LPC_UART->LSR & LSR_THRE) );
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while (!(LPC_UART->LSR & LSR_THRE));
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/* write data */
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LPC_UART->THR = *ptr;
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@ -277,10 +281,10 @@ static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer
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}
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else
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{
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while ( size != 0 )
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while (size != 0)
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{
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/* THRE status, contain valid data */
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while ( !(LPC_UART->LSR & LSR_THRE) );
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while (!(LPC_UART->LSR & LSR_THRE));
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/* write data */
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LPC_UART->THR = *ptr;
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@ -295,7 +299,7 @@ static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer
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void rt_hw_uart_init(void)
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{
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struct rt_uart_lpc* uart;
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struct rt_uart_lpc *uart;
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/* get uart device */
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uart = &uart_device;
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@ -282,6 +282,37 @@ int cmd_ifconfig(int argc, char **argv)
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}
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FINSH_FUNCTION_EXPORT_ALIAS(cmd_ifconfig, __cmd_ifconfig, list the information of network interfaces);
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#ifdef RT_LWIP_DNS
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#include <lwip/api.h>
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#include <lwip/dns.h>
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int cmd_dns(int argc, char **argv)
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{
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extern void set_dns(char* dns_server);
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if (argc == 1)
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{
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int index;
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struct ip_addr ip_addr;
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for(index=0; index<DNS_MAX_SERVERS; index++)
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{
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ip_addr = dns_getserver(index);
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rt_kprintf("dns server #%d: %s\n", index, ipaddr_ntoa(&(ip_addr)));
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}
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}
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else if (argc == 2)
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{
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rt_kprintf("dns : %s\n", argv[1]);
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set_dns(argv[1]);
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}
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else
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{
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rt_kprintf("bad parameter! e.g: dns 114.114.114.114\n");
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}
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return 0;
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}
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FINSH_FUNCTION_EXPORT_ALIAS(cmd_dns, __cmd_dns, list the information of dns);
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#endif
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#ifdef RT_LWIP_TCP
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int cmd_netstat(int argc, char **argv)
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{
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