update bsp lpc2478.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1853 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wuyangyong
parent
f1b07348c2
commit
dd47ccd6ca
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@ -1,11 +1,14 @@
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import rtconfig
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# for module compiling
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import os
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Import('RTT_ROOT')
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from building import *
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src_bsp = ['application.c', 'startup.c', 'board.c']
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cwd = str(Dir('#'))
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objs = []
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list = os.listdir(cwd)
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src = File(src_bsp)
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CPPPATH = [RTT_ROOT + '/bsp/lpc2478']
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group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('group')
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Return('objs')
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@ -6,7 +6,7 @@ RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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from building import *
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TARGET = 'rtthread-lpc.' + rtconfig.TARGET_EXT
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TARGET = 'rtthread-lpc24xx.' + rtconfig.TARGET_EXT
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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@ -19,7 +19,7 @@ Export('RTT_ROOT')
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Export('rtconfig')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT)
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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# build program
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env.Program(TARGET, objs)
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@ -0,0 +1,11 @@
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Import('RTT_ROOT')
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Import('rtconfig')
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from building import *
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cwd = os.path.join(str(Dir('#')), 'applications')
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src = Glob('*.c')
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CPPPATH = [cwd, str(Dir('#'))]
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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@ -0,0 +1,22 @@
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import copy
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Import('RTT_ROOT')
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Import('rtconfig')
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c')
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# remove no need file.
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if GetDepend('RT_USING_LWIP') == False:
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src_need_remove = ['dm9000.c'] # need remove file list.
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SrcRemove(src, src_need_remove)
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if GetDepend('RT_USING_DFS') == False:
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src_need_remove = ['sd.c'] # need remove file list.
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SrcRemove(src, src_need_remove)
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CPPPATH = [cwd]
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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@ -15,6 +15,10 @@
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#ifndef __BOARD_H__
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#define __BOARD_H__
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/* RT_USING_UART */
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#define RT_USING_UART1
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#define RT_USING_UART2
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#define RT_UART_RX_BUFFER_SIZE 64
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void rt_hw_board_init(void);
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void rt_hw_led_set(rt_uint32_t led);
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void rt_hw_led_flash(void);
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@ -0,0 +1,389 @@
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/*
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* File : serial.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://openlab.rt-thread.com/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2006-08-23 Bernard first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "LPC24xx.h"
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#include "board.h"
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/* serial hardware register */
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#define REG8(d) (*((volatile unsigned char *)(d)))
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#define REG32(d) (*((volatile unsigned long *)(d)))
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#define UART_RBR(base) REG8(base + 0x00)
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#define UART_THR(base) REG8(base + 0x00)
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#define UART_IER(base) REG32(base + 0x04)
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#define UART_IIR(base) REG32(base + 0x08)
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#define UART_FCR(base) REG8(base + 0x08)
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#define UART_LCR(base) REG8(base + 0x0C)
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#define UART_MCR(base) REG8(base + 0x10)
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#define UART_LSR(base) REG8(base + 0x14)
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#define UART_MSR(base) REG8(base + 0x18)
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#define UART_SCR(base) REG8(base + 0x1C)
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#define UART_DLL(base) REG8(base + 0x00)
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#define UART_DLM(base) REG8(base + 0x04)
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#define UART_ACR(base) REG32(base + 0x20)
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#define UART_FDR(base) REG32(base + 0x28)
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#define UART_TER(base) REG8(base + 0x30)
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/* LPC serial device */
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struct rt_lpcserial
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{
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/* inherit from device */
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struct rt_device parent;
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rt_uint32_t hw_base;
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rt_uint32_t irqno;
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rt_uint32_t baudrate;
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/* reception field */
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rt_uint16_t save_index, read_index;
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rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
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};
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#ifdef RT_USING_UART1
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struct rt_lpcserial serial1;
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#endif
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#ifdef RT_USING_UART2
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struct rt_lpcserial serial2;
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#endif
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void rt_hw_serial_init(void);
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#define U0PINS 0x00000005
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void rt_hw_uart_isr(struct rt_lpcserial* lpc_serial)
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{
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UNUSED rt_uint32_t iir;
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RT_ASSERT(lpc_serial != RT_NULL)
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if (UART_LSR(lpc_serial->hw_base) & 0x01)
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{
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rt_base_t level;
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while (UART_LSR(lpc_serial->hw_base) & 0x01)
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{
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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/* read character */
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lpc_serial->rx_buffer[lpc_serial->save_index] =
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UART_RBR(lpc_serial->hw_base);
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lpc_serial->save_index ++;
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if (lpc_serial->save_index >= RT_UART_RX_BUFFER_SIZE)
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lpc_serial->save_index = 0;
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/* if the next position is read index, discard this 'read char' */
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if (lpc_serial->save_index == lpc_serial->read_index)
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{
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lpc_serial->read_index ++;
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if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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lpc_serial->read_index = 0;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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}
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/* invoke callback */
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if(lpc_serial->parent.rx_indicate != RT_NULL)
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{
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lpc_serial->parent.rx_indicate(&lpc_serial->parent, 1);
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}
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}
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/* clear interrupt source */
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iir = UART_IIR(lpc_serial->hw_base);
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/* acknowledge Interrupt */
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VICVectAddr = 0;
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}
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#ifdef RT_USING_UART1
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void rt_hw_uart_isr_1(int irqno)
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{
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/* get lpc serial device */
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rt_hw_uart_isr(&serial1);
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}
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#endif
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#ifdef RT_USING_UART2
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void rt_hw_uart_isr_2(int irqno)
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{
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/* get lpc serial device */
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rt_hw_uart_isr(&serial2);
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}
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#endif
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/**
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* @addtogroup LPC214x
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*/
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/*@{*/
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static rt_err_t rt_serial_init (rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
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{
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struct rt_lpcserial* lpc_serial;
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lpc_serial = (struct rt_lpcserial*) dev;
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RT_ASSERT(lpc_serial != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* init UART rx interrupt */
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UART_IER(lpc_serial->hw_base) = 0x01;
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/* install ISR */
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if (lpc_serial->irqno == UART0_INT)
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{
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#ifdef RT_USING_UART1
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rt_hw_interrupt_install(lpc_serial->irqno, rt_hw_uart_isr_1, RT_NULL);
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#endif
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}
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else
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{
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#ifdef RT_USING_UART2
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rt_hw_interrupt_install(lpc_serial->irqno, rt_hw_uart_isr_2, RT_NULL);
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#endif
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}
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rt_hw_interrupt_umask(lpc_serial->irqno);
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}
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return RT_EOK;
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}
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static rt_err_t rt_serial_close(rt_device_t dev)
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{
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struct rt_lpcserial* lpc_serial;
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lpc_serial = (struct rt_lpcserial*) dev;
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RT_ASSERT(lpc_serial != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* disable UART rx interrupt */
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UART_IER(lpc_serial->hw_base) = 0x00;
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}
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return RT_EOK;
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}
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static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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return RT_EOK;
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}
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static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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rt_uint8_t* ptr;
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struct rt_lpcserial *lpc_serial = (struct rt_lpcserial*)dev;
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RT_ASSERT(lpc_serial != RT_NULL);
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/* point to buffer */
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ptr = (rt_uint8_t*) buffer;
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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while (size)
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{
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/* interrupt receive */
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rt_base_t level;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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if (lpc_serial->read_index != lpc_serial->save_index)
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{
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*ptr = lpc_serial->rx_buffer[lpc_serial->read_index];
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lpc_serial->read_index ++;
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if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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lpc_serial->read_index = 0;
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}
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else
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{
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/* no data in rx buffer */
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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break;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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ptr ++; size --;
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}
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return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
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}
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else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
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{
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/* not support right now */
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RT_ASSERT(0);
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}
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/* polling mode */
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while (size && (UART_LSR(lpc_serial->hw_base) & 0x01))
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{
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/* Read Character */
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*ptr = UART_RBR(lpc_serial->hw_base);
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ptr ++;
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size --;
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}
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return (rt_size_t)ptr - (rt_size_t)buffer;
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}
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static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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{
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struct rt_lpcserial* lpc_serial;
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char *ptr;
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lpc_serial = (struct rt_lpcserial*) dev;
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if (dev->flag & RT_DEVICE_FLAG_INT_TX)
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{
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/* not support */
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RT_ASSERT(0);
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}
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else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
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{
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/* not support */
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RT_ASSERT(0);
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}
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/* polling write */
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ptr = (char *)buffer;
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if (dev->flag & RT_DEVICE_FLAG_STREAM)
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{
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/* stream mode */
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while (size)
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{
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if (*ptr == '\n')
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{
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while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
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UART_THR(lpc_serial->hw_base) = '\r';
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}
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while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
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UART_THR(lpc_serial->hw_base) = *ptr;
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ptr ++;
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size --;
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}
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}
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else
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{
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while (size)
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{
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while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
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UART_THR(lpc_serial->hw_base) = *ptr;
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ptr ++;
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size --;
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}
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}
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return (rt_size_t) ptr - (rt_size_t) buffer;
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}
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void rt_hw_serial_init(void)
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{
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struct rt_lpcserial* lpc_serial;
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#ifdef RT_USING_UART1
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lpc_serial = &serial1;
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lpc_serial->parent.type = RT_Device_Class_Char;
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lpc_serial->hw_base = 0xE000C000;
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lpc_serial->baudrate = 115200;
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lpc_serial->irqno = UART0_INT;
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rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
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lpc_serial->read_index = lpc_serial->save_index = 0;
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/* Enable UART0 RxD and TxD pins */
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PINSEL0 |= 0x50;
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/* 8 bits, no Parity, 1 Stop bit */
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UART_LCR(lpc_serial->hw_base) = 0x83;
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/* Setup Baudrate */
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UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
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UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
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/* DLAB = 0 */
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UART_LCR(lpc_serial->hw_base) = 0x03;
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lpc_serial->parent.type = RT_Device_Class_Char;
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lpc_serial->parent.init = rt_serial_init;
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lpc_serial->parent.open = rt_serial_open;
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lpc_serial->parent.close = rt_serial_close;
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lpc_serial->parent.read = rt_serial_read;
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lpc_serial->parent.write = rt_serial_write;
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lpc_serial->parent.control = rt_serial_control;
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lpc_serial->parent.user_data = RT_NULL;
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rt_device_register(&lpc_serial->parent,
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"uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM);
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#endif
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#ifdef RT_USING_UART2
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lpc_serial = &serial2;
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lpc_serial->parent.type = RT_Device_Class_Char;
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lpc_serial->hw_base = 0xE0010000;
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lpc_serial->baudrate = 115200;
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lpc_serial->irqno = UART1_INT;
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rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
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lpc_serial->read_index = lpc_serial->save_index = 0;
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/* Enable UART1 RxD and TxD pins */
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PINSEL0 |= 0x05 << 16;
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/* 8 bits, no Parity, 1 Stop bit */
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UART_LCR(lpc_serial->hw_base) = 0x83;
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/* Setup Baudrate */
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UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
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UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
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/* DLAB = 0 */
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UART_LCR(lpc_serial->hw_base) = 0x03;
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lpc_serial->parent.type = RT_Device_Class_Char;
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lpc_serial->parent.init = rt_serial_init;
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lpc_serial->parent.open = rt_serial_open;
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lpc_serial->parent.close = rt_serial_close;
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lpc_serial->parent.read = rt_serial_read;
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lpc_serial->parent.write = rt_serial_write;
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lpc_serial->parent.control = rt_serial_control;
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lpc_serial->parent.user_data = RT_NULL;
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rt_device_register(&lpc_serial->parent,
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"uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
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#endif
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}
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/*@}*/
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|
|
@ -3,52 +3,50 @@
|
|||
|
||||
Target (RT-Thread LPC2478), 0x0004 // Tools: 'ARM-ADS'
|
||||
|
||||
Group (Startup)
|
||||
Group (Applications)
|
||||
Group (Drivers)
|
||||
Group (Kernel)
|
||||
Group (LPC24XX)
|
||||
Group (finsh)
|
||||
|
||||
File 1,1,<.\application.c><application.c>
|
||||
File 1,1,<.\startup.c><startup.c>
|
||||
File 1,1,<.\board.c><board.c>
|
||||
File 2,1,<..\..\src\clock.c><clock.c>
|
||||
File 2,1,<..\..\src\device.c><device.c>
|
||||
File 2,1,<..\..\src\idle.c><idle.c>
|
||||
File 2,1,<..\..\src\ipc.c><ipc.c>
|
||||
File 2,1,<..\..\src\irq.c><irq.c>
|
||||
File 2,1,<..\..\src\kservice.c><kservice.c>
|
||||
File 2,1,<..\..\src\mem.c><mem.c>
|
||||
File 2,1,<..\..\src\mempool.c><mempool.c>
|
||||
File 2,1,<..\..\src\module.c><module.c>
|
||||
File 2,1,<..\..\src\object.c><object.c>
|
||||
File 2,1,<..\..\src\rtm.c><rtm.c>
|
||||
File 2,1,<..\..\src\scheduler.c><scheduler.c>
|
||||
File 2,1,<..\..\src\slab.c><slab.c>
|
||||
File 2,1,<..\..\src\thread.c><thread.c>
|
||||
File 2,1,<..\..\src\timer.c><timer.c>
|
||||
File 3,1,<..\..\libcpu\arm\lpc24xx\cpu.c><cpu.c>
|
||||
File 3,1,<..\..\libcpu\arm\lpc24xx\interrupt.c><interrupt.c>
|
||||
File 3,1,<..\..\libcpu\arm\lpc24xx\serial.c><serial.c>
|
||||
File 3,1,<..\..\libcpu\arm\lpc24xx\stack.c><stack.c>
|
||||
File 3,1,<..\..\libcpu\arm\lpc24xx\trap.c><trap.c>
|
||||
File 3,2,<..\..\libcpu\arm\lpc24xx\context_rvds.S><context_rvds.S>
|
||||
File 3,2,<..\..\libcpu\arm\lpc24xx\start_rvds.S><start_rvds.S>
|
||||
File 3,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
|
||||
File 3,1,<..\..\libcpu\arm\common\div0.c><div0.c>
|
||||
File 3,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
|
||||
File 4,1,<..\..\components\finsh\cmd.c><cmd.c>
|
||||
File 4,1,<..\..\components\finsh\finsh_compiler.c><finsh_compiler.c>
|
||||
File 4,1,<..\..\components\finsh\finsh_error.c><finsh_error.c>
|
||||
File 4,1,<..\..\components\finsh\finsh_heap.c><finsh_heap.c>
|
||||
File 4,1,<..\..\components\finsh\finsh_init.c><finsh_init.c>
|
||||
File 4,1,<..\..\components\finsh\finsh_node.c><finsh_node.c>
|
||||
File 4,1,<..\..\components\finsh\finsh_ops.c><finsh_ops.c>
|
||||
File 4,1,<..\..\components\finsh\finsh_parser.c><finsh_parser.c>
|
||||
File 4,1,<..\..\components\finsh\finsh_token.c><finsh_token.c>
|
||||
File 4,1,<..\..\components\finsh\finsh_var.c><finsh_var.c>
|
||||
File 4,1,<..\..\components\finsh\finsh_vm.c><finsh_vm.c>
|
||||
File 4,1,<..\..\components\finsh\shell.c><shell.c>
|
||||
File 4,1,<..\..\components\finsh\symbol.c><symbol.c>
|
||||
File 1,1,<applications\application.c><application.c>
|
||||
File 1,1,<applications\startup.c><startup.c>
|
||||
File 2,1,<drivers\board.c><board.c>
|
||||
File 2,1,<drivers\serial.c><serial.c>
|
||||
File 3,1,<..\..\src\device.c><device.c>
|
||||
File 3,1,<..\..\src\thread.c><thread.c>
|
||||
File 3,1,<..\..\src\scheduler.c><scheduler.c>
|
||||
File 3,1,<..\..\src\timer.c><timer.c>
|
||||
File 3,1,<..\..\src\irq.c><irq.c>
|
||||
File 3,1,<..\..\src\kservice.c><kservice.c>
|
||||
File 3,1,<..\..\src\clock.c><clock.c>
|
||||
File 3,1,<..\..\src\object.c><object.c>
|
||||
File 3,1,<..\..\src\mempool.c><mempool.c>
|
||||
File 3,1,<..\..\src\ipc.c><ipc.c>
|
||||
File 3,1,<..\..\src\idle.c><idle.c>
|
||||
File 3,1,<..\..\src\mem.c><mem.c>
|
||||
File 4,1,<..\..\libcpu\arm\lpc24xx\cpu.c><cpu.c>
|
||||
File 4,1,<..\..\libcpu\arm\lpc24xx\interrupt.c><interrupt.c>
|
||||
File 4,1,<..\..\libcpu\arm\lpc24xx\stack.c><stack.c>
|
||||
File 4,1,<..\..\libcpu\arm\lpc24xx\trap.c><trap.c>
|
||||
File 4,2,<..\..\libcpu\arm\lpc24xx\context_rvds.S><context_rvds.S>
|
||||
File 4,2,<..\..\libcpu\arm\lpc24xx\start_rvds.S><start_rvds.S>
|
||||
File 4,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
|
||||
File 4,1,<..\..\libcpu\arm\common\div0.c><div0.c>
|
||||
File 4,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
|
||||
File 5,1,<..\..\components\finsh\cmd.c><cmd.c>
|
||||
File 5,1,<..\..\components\finsh\finsh_compiler.c><finsh_compiler.c>
|
||||
File 5,1,<..\..\components\finsh\finsh_error.c><finsh_error.c>
|
||||
File 5,1,<..\..\components\finsh\finsh_heap.c><finsh_heap.c>
|
||||
File 5,1,<..\..\components\finsh\finsh_init.c><finsh_init.c>
|
||||
File 5,1,<..\..\components\finsh\finsh_node.c><finsh_node.c>
|
||||
File 5,1,<..\..\components\finsh\finsh_ops.c><finsh_ops.c>
|
||||
File 5,1,<..\..\components\finsh\finsh_parser.c><finsh_parser.c>
|
||||
File 5,1,<..\..\components\finsh\finsh_token.c><finsh_token.c>
|
||||
File 5,1,<..\..\components\finsh\finsh_var.c><finsh_var.c>
|
||||
File 5,1,<..\..\components\finsh\finsh_vm.c><finsh_vm.c>
|
||||
File 5,1,<..\..\components\finsh\shell.c><shell.c>
|
||||
File 5,1,<..\..\components\finsh\symbol.c><symbol.c>
|
||||
|
||||
|
||||
Options 1,0,0 // Target 'RT-Thread LPC2478'
|
||||
|
|
@ -109,7 +107,7 @@ Options 1,0,0 // Target 'RT-Thread LPC2478'
|
|||
ADSCMISC ()
|
||||
ADSCDEFN ()
|
||||
ADSCUDEF ()
|
||||
ADSCINCD (..\..\include;..\..\libcpu\arm\common;..\..\components\finsh;..\..\libcpu\arm\lpc24xx;.)
|
||||
ADSCINCD (..\..\include;drivers;.;applications;..\..\libcpu\arm\common;..\..\components\finsh;..\..\libcpu\arm\lpc24xx)
|
||||
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
ADSAMISC ()
|
||||
ADSADEFN ()
|
||||
|
|
@ -130,11 +128,11 @@ Options 1,0,0 // Target 'RT-Thread LPC2478'
|
|||
ADSLDSC ()
|
||||
ADSLDIB ()
|
||||
ADSLDIC ()
|
||||
ADSLDMC ( --keep __fsym_* --keep __vsym_*)
|
||||
ADSLDMC ( --keep __fsym_* --keep __vsym_* )
|
||||
ADSLDIF ()
|
||||
ADSLDDW ()
|
||||
OPTDL (SARM.DLL)(-cLPC24xx)(DARMP.DLL)(-pLPC2478)(SARM.DLL)()(TARMP.DLL)(-pLPC2478)
|
||||
OPTDBG 48125,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
|
||||
OPTDBG 48126,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
|
||||
FLASH1 { 9,0,0,0,1,0,0,0,0,16,0,0,0,0,0,0,0,0,0,0 }
|
||||
FLASH2 (BIN\UL2ARM.DLL)
|
||||
FLASH3 ("LPC210x_ISP.EXE" ("#H" ^X $D COM1: 38400 1))
|
||||
|
|
|
|||
|
|
@ -63,8 +63,6 @@
|
|||
/* SECTION: Device System */
|
||||
/* Using Device System*/
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_UART1
|
||||
#define RT_UART_RX_BUFFER_SIZE 64
|
||||
|
||||
/* SECTION: Console options */
|
||||
#define RT_USING_CONSOLE
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='lpc24xx'
|
||||
CROSS_TOOL='gcc'
|
||||
CROSS_TOOL='keil'
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
|
|
@ -9,12 +9,16 @@ if CROSS_TOOL == 'gcc':
|
|||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'E:/Keil'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
EXEC_PATH = 'E:/Program Files/IAR Systems/Embedded Workbench 6.0/arm/bin'
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
|
|
@ -23,8 +27,8 @@ if PLATFORM == 'gcc':
|
|||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=arm7tdmi'
|
||||
CFLAGS = DEVICE
|
||||
DEVICE = ' -mcpu=arm7tdmi-s'
|
||||
CFLAGS = DEVICE + ' -DRT_USING_MINILIBC'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-lpc2478.map,-cref,-u,Reset_Handler -T lpc2478_rom.lds'
|
||||
|
||||
|
|
@ -42,6 +46,7 @@ if PLATFORM == 'gcc':
|
|||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
|
|
|
|||
Loading…
Reference in New Issue