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修正了bsp/hc32f4a0的scons构建脚本里的语法错误

This commit is contained in:
QPLover 2021-09-21 16:33:41 +08:00
parent 13b0b60b14
commit dd33001682
2 changed files with 6 additions and 6 deletions
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8
bsp/hc32f4a0/SConstruct
View File

@ -2,13 +2,13 @@ import os
import sys import sys
import rtconfig import rtconfig
print "############sconstruct##############" print("############sconstruct##############")
if os.getenv('RTT_ROOT'): if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT') RTT_ROOT = os.getenv('RTT_ROOT')
else: else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..') RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
print "RTT_ROOT: " + RTT_ROOT print("RTT_ROOT: " + RTT_ROOT)
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try: try:
@ -37,8 +37,8 @@ Export('RTT_ROOT')
Export('rtconfig') Export('rtconfig')
# prepare building environment # prepare building environment
print "######################env:" print("######################env:")
print env print(env)
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# make a building # make a building

4
bsp/hc32f4a0/rtconfig.py
View File

@ -5,12 +5,12 @@ ARCH='arm'
CPU='cortex-m4' CPU='cortex-m4'
CROSS_TOOL='iar' CROSS_TOOL='iar'
print "############rtconfig##############" print("############rtconfig##############")
if os.getenv('RTT_CC'): if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC') CROSS_TOOL = os.getenv('RTT_CC')
print "CROSS_TOOL: " + CROSS_TOOL print("CROSS_TOOL: " + CROSS_TOOL)
# cross_tool provides the cross compiler # cross_tool provides the cross compiler
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR # EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR