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[libcpu]: fixed #1196 FPU FPCA issue.

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This commit is contained in:
aozima 2018-01-31 18:54:11 +08:00
parent 7d967f282b
commit dd1041bb7f
6 changed files with 24 additions and 24 deletions
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8
libcpu/arm/cortex-m4/context_gcc.S
View File

@ -145,16 +145,16 @@ switch_to_thread:
MSR psp, r1 /* update stack pointer */ MSR psp, r1 /* update stack pointer */
pendsv_exit:
/* restore interrupt */
MSR PRIMASK, r2
#if defined (__VFP_FP__) && !defined(__SOFTFP__) #if defined (__VFP_FP__) && !defined(__SOFTFP__)
ORR lr, lr, #0x10 /* lr |= (1 << 4), clean FPCA. */ ORR lr, lr, #0x10 /* lr |= (1 << 4), clean FPCA. */
CMP r3, #0 /* if(flag_r3 != 0) */ CMP r3, #0 /* if(flag_r3 != 0) */
BICNE lr, lr, #0x10 /* lr &= ~(1 << 4), set FPCA. */ BICNE lr, lr, #0x10 /* lr &= ~(1 << 4), set FPCA. */
#endif #endif
pendsv_exit:
/* restore interrupt */
MSR PRIMASK, r2
ORR lr, lr, #0x04 ORR lr, lr, #0x04
BX lr BX lr

8
libcpu/arm/cortex-m4/context_iar.S
View File

@ -149,10 +149,6 @@ skip_pop_fpu
MSR psp, r1 ; update stack pointer MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
#if defined ( __ARMVFP__ ) #if defined ( __ARMVFP__ )
ORR lr, lr, #0x10 ; lr |= (1 << 4), clean FPCA. ORR lr, lr, #0x10 ; lr |= (1 << 4), clean FPCA.
CBZ r3, return_without_fpu ; if(flag_r3 != 0) CBZ r3, return_without_fpu ; if(flag_r3 != 0)
@ -160,6 +156,10 @@ pendsv_exit
return_without_fpu return_without_fpu
#endif #endif
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04 ORR lr, lr, #0x04
BX lr BX lr

8
libcpu/arm/cortex-m4/context_rvds.S
View File

@ -147,16 +147,16 @@ switch_to_thread
MSR psp, r1 ; update stack pointer MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
IF {FPU} != "SoftVFP" IF {FPU} != "SoftVFP"
ORR lr, lr, #0x10 ; lr |= (1 << 4), clean FPCA. ORR lr, lr, #0x10 ; lr |= (1 << 4), clean FPCA.
CMP r3, #0 ; if(flag_r3 != 0) CMP r3, #0 ; if(flag_r3 != 0)
BICNE lr, lr, #0x10 ; lr &= ~(1 << 4), set FPCA. BICNE lr, lr, #0x10 ; lr &= ~(1 << 4), set FPCA.
ENDIF ENDIF
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04 ORR lr, lr, #0x04
BX lr BX lr
ENDP ENDP

8
libcpu/arm/cortex-m7/context_gcc.S
View File

@ -145,16 +145,16 @@ switch_to_thread:
MSR psp, r1 /* update stack pointer */ MSR psp, r1 /* update stack pointer */
pendsv_exit:
/* restore interrupt */
MSR PRIMASK, r2
#if defined (__VFP_FP__) && !defined(__SOFTFP__) #if defined (__VFP_FP__) && !defined(__SOFTFP__)
ORR lr, lr, #0x10 /* lr |= (1 << 4), clean FPCA. */ ORR lr, lr, #0x10 /* lr |= (1 << 4), clean FPCA. */
CMP r3, #0 /* if(flag_r3 != 0) */ CMP r3, #0 /* if(flag_r3 != 0) */
BICNE lr, lr, #0x10 /* lr &= ~(1 << 4), set FPCA. */ BICNE lr, lr, #0x10 /* lr &= ~(1 << 4), set FPCA. */
#endif #endif
pendsv_exit:
/* restore interrupt */
MSR PRIMASK, r2
ORR lr, lr, #0x04 ORR lr, lr, #0x04
BX lr BX lr

8
libcpu/arm/cortex-m7/context_iar.S
View File

@ -149,10 +149,6 @@ skip_pop_fpu
MSR psp, r1 ; update stack pointer MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
#if defined ( __ARMVFP__ ) #if defined ( __ARMVFP__ )
ORR lr, lr, #0x10 ; lr |= (1 << 4), clean FPCA. ORR lr, lr, #0x10 ; lr |= (1 << 4), clean FPCA.
CBZ r3, return_without_fpu ; if(flag_r3 != 0) CBZ r3, return_without_fpu ; if(flag_r3 != 0)
@ -160,6 +156,10 @@ pendsv_exit
return_without_fpu return_without_fpu
#endif #endif
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04 ORR lr, lr, #0x04
BX lr BX lr

8
libcpu/arm/cortex-m7/context_rvds.S
View File

@ -147,16 +147,16 @@ switch_to_thread
MSR psp, r1 ; update stack pointer MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
IF {FPU} != "SoftVFP" IF {FPU} != "SoftVFP"
ORR lr, lr, #0x10 ; lr |= (1 << 4), clean FPCA. ORR lr, lr, #0x10 ; lr |= (1 << 4), clean FPCA.
CMP r3, #0 ; if(flag_r3 != 0) CMP r3, #0 ; if(flag_r3 != 0)
BICNE lr, lr, #0x10 ; lr &= ~(1 << 4), set FPCA. BICNE lr, lr, #0x10 ; lr &= ~(1 << 4), set FPCA.
ENDIF ENDIF
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04 ORR lr, lr, #0x04
BX lr BX lr
ENDP ENDP