add plic_driver.c for global interrupt
change interrupt num to 53 change stack size to 512 before system starup add uart drivers open msh remain bug: uart just interrupt ones
This commit is contained in:
zhangjun
parent
20f1a641d5
commit
d9c0bdc70e
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@ -15,7 +15,7 @@ static void led_thread_entry(void* parameter)
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unsigned int count=0;
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rt_hw_led_init();
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while (1)
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while (0)
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{
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/* led1 on */
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#ifndef RT_USING_FINSH
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@ -57,8 +57,11 @@ void rt_application_init()
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}
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init_thread = rt_thread_create("init",
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rt_init_thread_entry, RT_NULL,
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2048, 8, 20);
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rt_init_thread_entry,
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RT_NULL,
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512,
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8,
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20);
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if (init_thread != RT_NULL)
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rt_thread_startup(init_thread);
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return;
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@ -51,7 +51,6 @@ void rt_hw_board_init(void)
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rt_components_board_init();
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#endif
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/* HW_ICOLL_CTRL_SET(BM_ICOLL_CTRL_IRQ_FINAL_ENABLE);*/
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return;
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}
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@ -17,6 +17,7 @@ static void usart_init(int buard)
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static void usart_handler(int vector, void *param)
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{
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rt_hw_serial_isr((struct rt_serial_device*)param, RT_SERIAL_EVENT_RX_IND);
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UART0_REG(UART_REG_IP) = 0;
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return;
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}
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static rt_err_t usart_configure(struct rt_serial_device *serial,
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@ -26,6 +27,8 @@ static rt_err_t usart_configure(struct rt_serial_device *serial,
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GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
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UART0_REG(UART_REG_DIV) = get_cpu_freq() / 115200 - 1;
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UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
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UART0_REG(UART_REG_RXCTRL) |= UART_RXEN;
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UART0_REG(UART_REG_IE) = UART_IP_RXWM;
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return RT_EOK;
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}
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static rt_err_t usart_control(struct rt_serial_device *serial,
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@ -48,8 +51,11 @@ static int usart_putc(struct rt_serial_device *serial, char c)
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}
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static int usart_getc(struct rt_serial_device *serial)
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{
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rt_uint8_t val = (rt_uint8_t) UART0_REG(UART_REG_RXFIFO);
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return val;
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rt_int32_t val = UART0_REG(UART_REG_RXFIFO);
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if (val > 0)
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return (rt_uint8_t)val;
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else
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return -1;
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}
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static struct rt_uart_ops ops = {
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usart_configure,
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@ -69,7 +75,17 @@ static struct rt_serial_device serial = {
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};
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void rt_hw_uart_init(void)
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{
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rt_hw_serial_register(&serial, "dusart", RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_RDWR
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rt_hw_serial_register(
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&serial,
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"dusart",
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RT_DEVICE_FLAG_STREAM
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| RT_DEVICE_FLAG_RDWR
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| RT_DEVICE_FLAG_INT_RX, RT_NULL);
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rt_hw_interrupt_install(
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INT_UART0_BASE,
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usart_handler,
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(void*)&(serial.parent),
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"uart interrupt");
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rt_hw_interrupt_unmask(INT_UART0_BASE);
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return;
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}
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@ -1,7 +1,8 @@
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#include <rthw.h>
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#include "plic_driver.h"
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#include "platform.h"
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#define MAX_HANDLERS (128)
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#define MAX_HANDLERS PLIC_NUM_INTERRUPTS
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extern rt_uint32_t rt_interrupt_nest;
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/* exception and interrupt handler table */
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@ -10,12 +11,14 @@ struct rt_irq_desc irq_desc[MAX_HANDLERS];
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rt_uint32_t rt_interrupt_from_thread;
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rt_uint32_t rt_interrupt_to_thread;
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rt_uint32_t rt_thread_switch_interrupt_flag;
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plic_instance_t g_plic;
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/**
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* This function will mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_mask(int irq)
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{
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PLIC_disable_interrupt(&g_plic, irq);
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return;
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}
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@ -25,6 +28,8 @@ void rt_hw_interrupt_mask(int irq)
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*/
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void rt_hw_interrupt_unmask(int irq)
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{
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PLIC_enable_interrupt(&g_plic, irq);
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PLIC_set_priority(&g_plic, irq, 1);
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return;
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}
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rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector, void *param)
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@ -40,7 +45,11 @@ void rt_hw_interrupt_init(void)
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"la t0, trap_entry\n"
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"csrw mtvec, t0"
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);
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/* enable interrupt*/
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/* enable global interrupt*/
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PLIC_init(&g_plic,
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PLIC_CTRL_ADDR,
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PLIC_NUM_INTERRUPTS,
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PLIC_NUM_PRIORITIES);
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/* init exceptions table */
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for(idx=0; idx < MAX_HANDLERS; idx++)
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@ -62,11 +71,12 @@ void rt_hw_interrupt_init(void)
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rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq)
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{
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//volatile rt_uint32_t irqstat;
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rt_uint32_t id;
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return 0;
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rt_uint32_t id = PLIC_claim_interrupt(&g_plic);
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return id;
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}
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void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
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{
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PLIC_complete_interrupt(&g_plic, id);
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return;
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}
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/**
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@ -0,0 +1,127 @@
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// See LICENSE for license details.
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#include "sifive/devices/plic.h"
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#include "plic_driver.h"
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#include "platform.h"
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#include "encoding.h"
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#include <string.h>
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// Note that there are no assertions or bounds checking on these
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// parameter values.
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void volatile_memzero(uint8_t * base, unsigned int size)
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{
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volatile uint8_t * ptr;
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for (ptr = base; ptr < (base + size); ptr++){
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*ptr = 0;
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}
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}
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void PLIC_init (
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plic_instance_t * this_plic,
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uintptr_t base_addr,
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uint32_t num_sources,
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uint32_t num_priorities
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)
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{
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this_plic->base_addr = base_addr;
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this_plic->num_sources = num_sources;
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this_plic->num_priorities = num_priorities;
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// Disable all interrupts (don't assume that these registers are reset).
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unsigned long hart_id = read_csr(mhartid);
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volatile_memzero((uint8_t*) (this_plic->base_addr +
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PLIC_ENABLE_OFFSET +
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(hart_id << PLIC_ENABLE_SHIFT_PER_TARGET)),
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(num_sources + 8) / 8);
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// Set all priorities to 0 (equal priority -- don't assume that these are reset).
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volatile_memzero ((uint8_t *)(this_plic->base_addr +
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PLIC_PRIORITY_OFFSET),
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(num_sources + 1) << PLIC_PRIORITY_SHIFT_PER_SOURCE);
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// Set the threshold to 0.
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volatile plic_threshold* threshold = (plic_threshold*)
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(this_plic->base_addr +
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PLIC_THRESHOLD_OFFSET +
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(hart_id << PLIC_THRESHOLD_SHIFT_PER_TARGET));
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*threshold = 0;
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}
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void PLIC_set_threshold (plic_instance_t * this_plic,
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plic_threshold threshold){
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unsigned long hart_id = read_csr(mhartid);
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volatile plic_threshold* threshold_ptr = (plic_threshold*) (this_plic->base_addr +
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PLIC_THRESHOLD_OFFSET +
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(hart_id << PLIC_THRESHOLD_SHIFT_PER_TARGET));
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*threshold_ptr = threshold;
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}
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void PLIC_enable_interrupt (plic_instance_t * this_plic, plic_source source){
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unsigned long hart_id = read_csr(mhartid);
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volatile uint8_t * current_ptr = (volatile uint8_t *)(this_plic->base_addr +
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PLIC_ENABLE_OFFSET +
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(hart_id << PLIC_ENABLE_SHIFT_PER_TARGET) +
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(source >> 3));
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uint8_t current = *current_ptr;
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current = current | ( 1 << (source & 0x7));
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*current_ptr = current;
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}
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void PLIC_disable_interrupt (plic_instance_t * this_plic, plic_source source){
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unsigned long hart_id = read_csr(mhartid);
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volatile uint8_t * current_ptr = (volatile uint8_t *) (this_plic->base_addr +
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PLIC_ENABLE_OFFSET +
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(hart_id << PLIC_ENABLE_SHIFT_PER_TARGET) +
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(source >> 3));
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uint8_t current = *current_ptr;
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current = current & ~(( 1 << (source & 0x7)));
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*current_ptr = current;
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}
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void PLIC_set_priority (plic_instance_t * this_plic, plic_source source, plic_priority priority){
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if (this_plic->num_priorities > 0) {
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volatile plic_priority * priority_ptr = (volatile plic_priority *)
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(this_plic->base_addr +
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PLIC_PRIORITY_OFFSET +
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(source << PLIC_PRIORITY_SHIFT_PER_SOURCE));
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*priority_ptr = priority;
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}
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}
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plic_source PLIC_claim_interrupt(plic_instance_t * this_plic){
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unsigned long hart_id = read_csr(mhartid);
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volatile plic_source * claim_addr = (volatile plic_source * )
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(this_plic->base_addr +
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PLIC_CLAIM_OFFSET +
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(hart_id << PLIC_CLAIM_SHIFT_PER_TARGET));
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return *claim_addr;
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}
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void PLIC_complete_interrupt(plic_instance_t * this_plic, plic_source source){
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unsigned long hart_id = read_csr(mhartid);
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volatile plic_source * claim_addr = (volatile plic_source *) (this_plic->base_addr +
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PLIC_CLAIM_OFFSET +
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(hart_id << PLIC_CLAIM_SHIFT_PER_TARGET));
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*claim_addr = source;
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}
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@ -0,0 +1,47 @@
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// See LICENSE file for licence details
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#ifndef PLIC_DRIVER_H
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#define PLIC_DRIVER_H
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#include "platform.h"
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typedef struct __plic_instance_t
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{
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uintptr_t base_addr;
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uint32_t num_sources;
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uint32_t num_priorities;
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} plic_instance_t;
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typedef uint32_t plic_source;
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typedef uint32_t plic_priority;
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typedef uint32_t plic_threshold;
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void PLIC_init (
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plic_instance_t * this_plic,
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uintptr_t base_addr,
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uint32_t num_sources,
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uint32_t num_priorities
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);
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void PLIC_set_threshold (plic_instance_t * this_plic,
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plic_threshold threshold);
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void PLIC_enable_interrupt (plic_instance_t * this_plic,
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plic_source source);
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void PLIC_disable_interrupt (plic_instance_t * this_plic,
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plic_source source);
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void PLIC_set_priority (plic_instance_t * this_plic,
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plic_source source,
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plic_priority priority);
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plic_source PLIC_claim_interrupt(plic_instance_t * this_plic);
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void PLIC_complete_interrupt(plic_instance_t * this_plic,
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plic_source source);
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#endif
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@ -17,10 +17,10 @@
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/* SECTION: RT_DEBUG */
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/* Thread Debug */
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#define RT_DEBUG
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#define RT_DEBUG_TIMER 1
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#define RT_DEBUG_TIMER 0
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/*#define RT_DEBUG_IRQ 1*/
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#define RT_DEBUG_SCHEDULER 1
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#define RT_DEBUG_THREAD 1
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#define RT_DEBUG_SCHEDULER 0
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#define RT_DEBUG_THREAD 0
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#define RT_USING_OVERFLOW_CHECK
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@ -32,8 +32,8 @@
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/* Using Software Timer */
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#define RT_USING_TIMER_SOFT
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#define RT_TIMER_THREAD_PRIO 8
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#define RT_TIMER_THREAD_STACK_SIZE 1024
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#define RT_TIMER_TICK_PER_SECOND 10
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#define RT_TIMER_THREAD_STACK_SIZE 512
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#define RT_TIMER_TICK_PER_SECOND 50
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/* SECTION: IPC */
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/* Using Semaphore */
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@ -88,7 +88,7 @@
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/* SECTION: finsh, a C-Express shell */
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/* Using FinSH as Shell*/
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/*#define RT_USING_FINSH*/
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#define RT_USING_FINSH
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/* Using symbol table */
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#define FINSH_USING_SYMTAB
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#define FINSH_USING_DESCRIPTION
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@ -18,7 +18,7 @@ PHDRS
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SECTIONS
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{
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__stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
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__stack_size = DEFINED(__stack_size) ? __stack_size : 512;
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. = 0x20400000;
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. = ALIGN(4);
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