[bsp][ab32vg1] Add env config to choose whether use internal clock
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011564e1eb
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d8e906e6c8
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@ -167,11 +167,16 @@ menu "On-chip Peripheral Drivers"
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default n
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default n
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endif
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endif
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config BSP_USING_ONCHIP_RTC
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menuconfig BSP_USING_ONCHIP_RTC
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bool "Enable RTC"
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bool "Enable RTC"
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select RT_USING_RTC
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select RT_USING_RTC
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select RT_USING_LIBC
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select RT_USING_LIBC
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default n
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default n
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if BSP_USING_ONCHIP_RTC
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config RTC_USING_INTERNAL_CLK
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bool "Using internal clock RTC"
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default y
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endif
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menuconfig BSP_USING_ADC
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menuconfig BSP_USING_ADC
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bool "Enable ADC"
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bool "Enable ADC"
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@ -96,18 +96,33 @@ uint8_t irtc_sfr_read(uint32_t cmd)
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IRTC_EXIT_CRITICAL();
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IRTC_EXIT_CRITICAL();
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}
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}
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static void _init_rtc_clock(void)
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{
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uint8_t rtccon0;
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uint8_t rtccon2;
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rtccon0 = irtc_sfr_read(RTCCON0_CMD);
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rtccon2 = irtc_sfr_read(RTCCON2_CMD);
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#ifdef RTC_USING_INTERNAL_CLK
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rtccon0 &= ~RTC_CON0_XOSC32K_ENABLE;
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rtccon0 |= RTC_CON0_INTERNAL_32K;
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rtccon2 | RTC_CON2_32K_SELECT;
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#else
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rtccon0 |= RTC_CON0_XOSC32K_ENABLE;
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rtccon0 &= ~RTC_CON0_INTERNAL_32K;
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rtccon2 & ~RTC_CON2_32K_SELECT;
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#endif
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irtc_sfr_write(RTCCON0_CMD, rtccon0);
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irtc_sfr_write(RTCCON2_CMD, rtccon2);
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}
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void hal_rtc_init(void)
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void hal_rtc_init(void)
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{
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{
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time_t sec = 0;
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time_t sec = 0;
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struct tm tm_new = {0};
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struct tm tm_new = {0};
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uint8_t temp;
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uint8_t temp = irtc_sfr_read(RTCCON0_CMD);
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_init_rtc_clock();
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temp &= ~RTC_CON0_XOSC32K_ENABLE;
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temp |= RTC_CON0_EXTERNAL_32K;
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irtc_sfr_write(RTCCON0_CMD, temp);
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temp = irtc_sfr_read(RTCCON2_CMD);
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irtc_sfr_write(RTCCON2_CMD, temp | RTC_CON2_32K_SELECT);
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temp = irtc_sfr_read(RTCCON0_CMD);
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temp = irtc_sfr_read(RTCCON0_CMD);
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if (temp & RTC_CON0_PWRUP_FIRST) {
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if (temp & RTC_CON0_PWRUP_FIRST) {
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temp &= ~RTC_CON0_PWRUP_FIRST;
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temp &= ~RTC_CON0_PWRUP_FIRST;
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@ -119,7 +134,6 @@ void hal_rtc_init(void)
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irtc_time_write(RTCCNT_CMD, sec);
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irtc_time_write(RTCCNT_CMD, sec);
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}
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}
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}
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}
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/************** HAL End *******************/
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/************** HAL End *******************/
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@ -34,7 +34,7 @@ enum
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// RTCCON0
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// RTCCON0
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#define RTC_CON0_PWRUP_FIRST (0x01u << 7) /*!< RTC first power up flag */
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#define RTC_CON0_PWRUP_FIRST (0x01u << 7) /*!< RTC first power up flag */
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#define RTC_CON0_EXTERNAL_32K (0x01u << 6) /*!< External 32K select */
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#define RTC_CON0_INTERNAL_32K (0x01u << 6) /*!< Internal 32K select */
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#define RTC_CON0_VDD_ENABLE (0x01u << 5) /*!< RTC VDD12 enable */
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#define RTC_CON0_VDD_ENABLE (0x01u << 5) /*!< RTC VDD12 enable */
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#define RTC_CON0_BG_ENABLE (0x01u << 4) /*!< BG enable */
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#define RTC_CON0_BG_ENABLE (0x01u << 4) /*!< BG enable */
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#define RTC_CON0_LVD_OUTPUT_ENABLE (0x01u << 3) /*!< LVD output enable */
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#define RTC_CON0_LVD_OUTPUT_ENABLE (0x01u << 3) /*!< LVD output enable */
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