[bsp/stm32][board.h]support AC6 for stm32 bsp.
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@ -28,7 +28,7 @@ extern "C" {
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#define STM32_SRAM_SIZE 32
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -27,7 +27,7 @@ extern "C" {
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#define STM32_SRAM_SIZE 20
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -28,7 +28,7 @@ extern "C" {
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#define STM32_SRAM_SIZE 64
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -29,7 +29,7 @@ extern "C" {
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#define STM32_SRAM_SIZE 64
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -23,7 +23,7 @@
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#define STM32_SRAM_SIZE 20
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -28,7 +28,7 @@ extern "C" {
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#define STM32_FLASH_SIZE (512 * 1024)
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#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -28,7 +28,7 @@ extern "C" {
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#define STM32_SRAM_SIZE 64
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -28,7 +28,7 @@ extern "C" {
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#define STM32_SRAM_SIZE 20
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -28,7 +28,7 @@ extern "C" {
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#define STM32_SRAM_SIZE 64
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -27,7 +27,7 @@ extern "C" {
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#define STM32_FLASH_SIZE (1024 * 1024)
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#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -28,7 +28,7 @@ extern "C" {
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#define STM32_SRAM_SIZE 36
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -28,7 +28,7 @@ extern "C" {
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#define STM32_SRAM_SIZE 8
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -39,7 +39,7 @@ extern "C" {
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#define STM32_FLASH_SIZE (1024 * 1024)
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#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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