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update uart and spi driver

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This commit is contained in:
tanek liang 2017-08-30 10:42:14 +08:00
parent b7cf7c5fc0
commit d766ababec
5 changed files with 247 additions and 241 deletions
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9
bsp/gd32450z-eval/drivers/drv_spi.c
View File

@ -17,6 +17,14 @@
#include <board.h> #include <board.h>
#include <finsh.h> #include <finsh.h>
#ifdef RT_USING_SPI
#if !defined(RT_USING_SPI0) && !defined(RT_USING_SPI1) && \
!defined(RT_USING_SPI2) && !defined(RT_USING_SPI3) && \
!defined(RT_USING_SPI4) && !defined(RT_USING_SPI5)
#error "Please define at least one SPIx"
#endif
//#define DEBUG //#define DEBUG
#define ARR_LEN(__N) (sizeof(__N) / sizeof(__N[0])) #define ARR_LEN(__N) (sizeof(__N) / sizeof(__N[0]))
@ -345,3 +353,4 @@ rt_err_t stm32_spi_bus_register(uint32_t spi_periph,
p_spi_bus->hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4; p_spi_bus->hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4;
#endif #endif
} }
#endif

231
bsp/gd32450z-eval/drivers/drv_usart.c
View File

@ -26,7 +26,7 @@
!defined(RT_USING_USART2) && !defined(RT_USING_UART3) && \ !defined(RT_USING_USART2) && !defined(RT_USING_UART3) && \
!defined(RT_USING_UART4) && !defined(RT_USING_USART5) && \ !defined(RT_USING_UART4) && !defined(RT_USING_USART5) && \
!defined(RT_USING_UART6) && !defined(RT_USING_UART7) !defined(RT_USING_UART6) && !defined(RT_USING_UART7)
#error "Please define " #error "Please define at least one UARTx"
#endif #endif
@ -57,18 +57,6 @@ static void uart_isr(struct rt_serial_device *serial);
#if defined(RT_USING_USART0) #if defined(RT_USING_USART0)
struct rt_serial_device serial0; struct rt_serial_device serial0;
/* UART1 device driver structure */
const struct gd32_uart usart0 =
{
USART0, // uart peripheral index
USART0_IRQn, // uart iqrn
RCU_USART0, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
GPIOA, GPIO_AF_7, GPIO_PIN_9, // tx port, tx alternate, tx pin
GPIOA, GPIO_AF_7, GPIO_PIN_10, // rx port, rx alternate, rx pin
&serial0,
"uart0",
};
void USART0_IRQHandler(void) void USART0_IRQHandler(void)
{ {
/* enter interrupt */ /* enter interrupt */
@ -84,17 +72,6 @@ void USART0_IRQHandler(void)
#if defined(RT_USING_USART1) #if defined(RT_USING_USART1)
struct rt_serial_device serial1; struct rt_serial_device serial1;
/* UART1 device driver structure */
const struct gd32_uart usart1 =
{
USART1, // uart peripheral index
USART1_IRQn, // uart iqrn
RCU_USART1, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
GPIOA, GPIO_AF_7, GPIO_PIN_2, // tx port, tx alternate, tx pin
GPIOA, GPIO_AF_7, GPIO_PIN_3, // rx port, rx alternate, rx pin
&serial1,
"uart1",
};
void USART1_IRQHandler(void) void USART1_IRQHandler(void)
{ {
@ -111,17 +88,6 @@ void USART1_IRQHandler(void)
#if defined(RT_USING_USART2) #if defined(RT_USING_USART2)
struct rt_serial_device serial2; struct rt_serial_device serial2;
/* UART2 device driver structure */
const struct gd32_uart usart2 =
{
USART2, // uart peripheral index
USART2_IRQn, // uart iqrn
RCU_USART2, RCU_GPIOB, RCU_GPIOB, // periph clock, tx gpio clock, rt gpio clock
GPIOB, GPIO_AF_7, GPIO_PIN_10, // tx port, tx alternate, tx pin
GPIOB, GPIO_AF_7, GPIO_PIN_11, // rx port, rx alternate, rx pin
&serial2,
"uart2",
};
void USART2_IRQHandler(void) void USART2_IRQHandler(void)
{ {
@ -138,17 +104,6 @@ void USART2_IRQHandler(void)
#if defined(RT_USING_UART3) #if defined(RT_USING_UART3)
struct rt_serial_device serial3; struct rt_serial_device serial3;
/* UART3 device driver structure */
const struct gd32_uart uart3 =
{
UART3, // uart peripheral index
UART3_IRQn, // uart iqrn
RCU_UART3, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
GPIOC, GPIO_AF_8, GPIO_PIN_10, // tx port, tx alternate, tx pin
GPIOC, GPIO_AF_8, GPIO_PIN_11, // rx port, rx alternate, rx pin
&serial3,
"uart3",
};
void UART3_IRQHandler(void) void UART3_IRQHandler(void)
{ {
@ -165,17 +120,6 @@ void UART3_IRQHandler(void)
#if defined(RT_USING_UART4) #if defined(RT_USING_UART4)
struct rt_serial_device serial4; struct rt_serial_device serial4;
/* UART4 device driver structure */
const struct gd32_uart uart4 =
{
UART4, // uart peripheral index
UART4_IRQn, // uart iqrn
RCU_UART4, RCU_GPIOC, RCU_GPIOD, // periph clock, tx gpio clock, rt gpio clock
GPIOC, GPIO_AF_8, GPIO_PIN_12, // tx port, tx alternate, tx pin
GPIOD, GPIO_AF_8, GPIO_PIN_2, // rx port, rx alternate, rx pin
&serial4,
"uart4",
};
void UART4_IRQHandler(void) void UART4_IRQHandler(void)
{ {
@ -191,17 +135,6 @@ void UART4_IRQHandler(void)
#if defined(RT_USING_USART5) #if defined(RT_USING_USART5)
struct rt_serial_device serial5; struct rt_serial_device serial5;
/* UART5 device driver structure */
const struct gd32_uart usart5 =
{
USART5, // uart peripheral index
USART5_IRQn, // uart iqrn
RCU_USART5, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
GPIOC, GPIO_AF_8, GPIO_PIN_6, // tx port, tx alternate, tx pin
GPIOC, GPIO_AF_8, GPIO_PIN_7, // rx port, rx alternate, rx pin
&serial5,
"uart5",
};
void USART5_IRQHandler(void) void USART5_IRQHandler(void)
{ {
@ -218,17 +151,6 @@ void USART5_IRQHandler(void)
#if defined(RT_USING_UART6) #if defined(RT_USING_UART6)
struct rt_serial_device serial6; struct rt_serial_device serial6;
/* UART6 device driver structure */
const struct gd32_uart uart6 =
{
UART6, // uart peripheral index
UART6_IRQn, // uart iqrn
RCU_UART6, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
GPIOE, GPIO_AF_8, GPIO_PIN_7, // tx port, tx alternate, tx pin
GPIOE, GPIO_AF_8, GPIO_PIN_8, // rx port, rx alternate, rx pin
&serial6,
"uart6",
};
void UART6_IRQHandler(void) void UART6_IRQHandler(void)
{ {
@ -245,17 +167,6 @@ void UART6_IRQHandler(void)
#if defined(RT_USING_UART7) #if defined(RT_USING_UART7)
struct rt_serial_device serial7; struct rt_serial_device serial7;
/* UART7 device driver structure */
const struct gd32_uart uart7 =
{
UART7, // uart peripheral index
UART7_IRQn, // uart iqrn
RCU_UART7, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
GPIOE, GPIO_AF_8, GPIO_PIN_0, // tx port, tx alternate, tx pin
GPIOE, GPIO_AF_8, GPIO_PIN_1, // rx port, rx alternate, rx pin
&serial7,
"uart7",
};
void UART7_IRQHandler(void) void UART7_IRQHandler(void)
{ {
@ -270,6 +181,104 @@ void UART7_IRQHandler(void)
#endif /* RT_USING_UART7 */ #endif /* RT_USING_UART7 */
static const struct gd32_uart uarts[] = {
#ifdef RT_USING_USART0
{
USART0, // uart peripheral index
USART0_IRQn, // uart iqrn
RCU_USART0, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
GPIOA, GPIO_AF_7, GPIO_PIN_9, // tx port, tx alternate, tx pin
GPIOA, GPIO_AF_7, GPIO_PIN_10, // rx port, rx alternate, rx pin
&serial0,
"uart0",
},
#endif
#ifdef RT_USING_USART1
{
USART1, // uart peripheral index
USART1_IRQn, // uart iqrn
RCU_USART1, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
GPIOA, GPIO_AF_7, GPIO_PIN_2, // tx port, tx alternate, tx pin
GPIOA, GPIO_AF_7, GPIO_PIN_3, // rx port, rx alternate, rx pin
&serial1,
"uart1",
},
#endif
#ifdef RT_USING_USART2
{
USART2, // uart peripheral index
USART2_IRQn, // uart iqrn
RCU_USART2, RCU_GPIOB, RCU_GPIOB, // periph clock, tx gpio clock, rt gpio clock
GPIOB, GPIO_AF_7, GPIO_PIN_10, // tx port, tx alternate, tx pin
GPIOB, GPIO_AF_7, GPIO_PIN_11, // rx port, rx alternate, rx pin
&serial2,
"uart2",
},
#endif
#ifdef RT_USING_UART3
{
UART3, // uart peripheral index
UART3_IRQn, // uart iqrn
RCU_UART3, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
GPIOC, GPIO_AF_8, GPIO_PIN_10, // tx port, tx alternate, tx pin
GPIOC, GPIO_AF_8, GPIO_PIN_11, // rx port, rx alternate, rx pin
&serial3,
"uart3",
},
#endif
#ifdef RT_USING_UART4
{
UART4, // uart peripheral index
UART4_IRQn, // uart iqrn
RCU_UART4, RCU_GPIOC, RCU_GPIOD, // periph clock, tx gpio clock, rt gpio clock
GPIOC, GPIO_AF_8, GPIO_PIN_12, // tx port, tx alternate, tx pin
GPIOD, GPIO_AF_8, GPIO_PIN_2, // rx port, rx alternate, rx pin
&serial4,
"uart4",
},
#endif
#ifdef RT_USING_USART5
{
USART5, // uart peripheral index
USART5_IRQn, // uart iqrn
RCU_USART5, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
GPIOC, GPIO_AF_8, GPIO_PIN_6, // tx port, tx alternate, tx pin
GPIOC, GPIO_AF_8, GPIO_PIN_7, // rx port, rx alternate, rx pin
&serial5,
"uart5",
},
#endif
#ifdef RT_USING_UART6
{
UART6, // uart peripheral index
UART6_IRQn, // uart iqrn
RCU_UART6, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
GPIOE, GPIO_AF_8, GPIO_PIN_7, // tx port, tx alternate, tx pin
GPIOE, GPIO_AF_8, GPIO_PIN_8, // rx port, rx alternate, rx pin
&serial6,
"uart6",
},
#endif
#ifdef RT_USING_UART7
{
UART7, // uart peripheral index
UART7_IRQn, // uart iqrn
RCU_UART7, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
GPIOE, GPIO_AF_8, GPIO_PIN_0, // tx port, tx alternate, tx pin
GPIOE, GPIO_AF_8, GPIO_PIN_1, // rx port, rx alternate, rx pin
&serial7,
"uart7",
},
#endif
};
/** /**
* @brief UART MSP Initialization * @brief UART MSP Initialization
@ -446,50 +455,18 @@ int gd32_hw_usart_init(void)
{ {
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
int i; int i;
static const struct gd32_uart * uarts[] = {
#ifdef RT_USING_USART0
&usart0,
#endif
#ifdef RT_USING_USART1
&usart1,
#endif
#ifdef RT_USING_USART2
&usart2,
#endif
#ifdef RT_USING_UART3
&uart3,
#endif
#ifdef RT_USING_UART4
&uart4,
#endif
#ifdef RT_USING_USART5
&usart5,
#endif
#ifdef RT_USING_UART6
&uart6,
#endif
#ifdef RT_USING_UART7
&uart7,
#endif
};
for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++) for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
{ {
uarts[i]->serial->ops = &gd32_uart_ops; uarts[i].serial->ops = &gd32_uart_ops;
uarts[i]->serial->config = config; uarts[i].serial->config = config;
/* register UART1 device */ /* register UART1 device */
rt_hw_serial_register(uarts[i]->serial, rt_hw_serial_register(uarts[i].serial,
uarts[i]->device_name, uarts[i].device_name,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
(void *)uarts[i]); (void *)&uarts[i]);
} }
return 0; return 0;

15
bsp/gd32450z-eval/gd32_rom.sct Normal file
View File

@ -0,0 +1,15 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00300000 { ; load region size_region
ER_IROM1 0x08000000 0x00300000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
}

17
bsp/gd32450z-eval/project.ewp
View File

@ -198,7 +198,7 @@
</option> </option>
<option> <option>
<name>DSPExtension</name> <name>DSPExtension</name>
<state>0</state> <state>1</state>
</option> </option>
</data> </data>
</settings> </settings>
@ -2515,19 +2515,4 @@
<name>$PROJ_DIR$\..\..\components\net\lwip-1.4.1\src\core\udp.c</name> <name>$PROJ_DIR$\..\..\components\net\lwip-1.4.1\src\core\udp.c</name>
</file> </file>
</group> </group>
<group>
<name>trace</name>
<file>
<name>$PROJ_DIR$\..\..\components\trace\SystemView_Src_V240\SEGGER\SEGGER_RTT.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\trace\SystemView_Src_V240\SEGGER\SEGGER_SYSVIEW.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_Config_RTThread.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_RTThread.c</name>
</file>
</group>
</project> </project>

216
bsp/gd32450z-eval/project.uvprojx
View File

@ -319,7 +319,7 @@
<PlainCh>0</PlainCh> <PlainCh>0</PlainCh>
<Ropi>0</Ropi> <Ropi>0</Ropi>
<Rwpi>0</Rwpi> <Rwpi>0</Rwpi>
<wLevel>2</wLevel> <wLevel>0</wLevel>
<uThumb>0</uThumb> <uThumb>0</uThumb>
<uSurpInc>0</uSurpInc> <uSurpInc>0</uSurpInc>
<uC99>1</uC99> <uC99>1</uC99>
@ -333,9 +333,9 @@
<v6Rtti>0</v6Rtti> <v6Rtti>0</v6Rtti>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define>GD32F4XX, USE_STDPERIPH_DRIVER</Define> <Define>GD32F4XX, RT_USING_ARM_LIBC, USE_STDPERIPH_DRIVER</Define>
<Undefine></Undefine> <Undefine></Undefine>
<IncludePath>applications;.;drivers;Libraries\CMSIS\GD\GD32F4xx\Include;Libraries\CMSIS;Libraries\GD32F4xx_standard_peripheral\Include;..\..\include;..\..\libcpu\arm\cortex-m4;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\spi;..\..\components\drivers\include;..\..\components\drivers\spi\sfud\inc;..\..\components\drivers\include;..\..\components\finsh;..\..\components\net\lwip-1.4.1\src;..\..\components\net\lwip-1.4.1\src\include;..\..\components\net\lwip-1.4.1\src\include\ipv4;..\..\components\net\lwip-1.4.1\src\arch\include;..\..\components\net\lwip-1.4.1\src\include\netif;..\..\components\trace;..\..\components\trace\SystemView_Src_V240\Config;..\..\components\trace;..\..\components\trace\SystemView_Src_V240\SEGGER</IncludePath> <IncludePath>applications;.;drivers;Libraries\CMSIS\GD\GD32F4xx\Include;Libraries\CMSIS;Libraries\GD32F4xx_standard_peripheral\Include;..\..\..\git\rt-thread\include;..\..\..\git\rt-thread\libcpu\arm\cortex-m4;..\..\..\git\rt-thread\libcpu\arm\common;..\..\..\git\rt-thread\components\dfs\include;..\..\..\git\rt-thread\components\dfs\filesystems\devfs;..\..\..\git\rt-thread\components\dfs\filesystems\elmfat;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\spi;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\spi\sfud\inc;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\finsh;..\..\..\git\rt-thread\components\libc\armlibc;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include\ipv4;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\arch\include;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include\netif;..\..\..\git\rt-thread\components\trace;..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config;..\..\..\git\rt-thread\components\trace;..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER</IncludePath>
</VariousControls> </VariousControls>
</Cads> </Cads>
<Aads> <Aads>
@ -622,77 +622,77 @@
<File> <File>
<FileName>clock.c</FileName> <FileName>clock.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\clock.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\clock.c</FilePath>
</File> </File>
<File> <File>
<FileName>components.c</FileName> <FileName>components.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\components.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\components.c</FilePath>
</File> </File>
<File> <File>
<FileName>device.c</FileName> <FileName>device.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\device.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\device.c</FilePath>
</File> </File>
<File> <File>
<FileName>idle.c</FileName> <FileName>idle.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\idle.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\idle.c</FilePath>
</File> </File>
<File> <File>
<FileName>ipc.c</FileName> <FileName>ipc.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\ipc.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\ipc.c</FilePath>
</File> </File>
<File> <File>
<FileName>irq.c</FileName> <FileName>irq.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\irq.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\irq.c</FilePath>
</File> </File>
<File> <File>
<FileName>kservice.c</FileName> <FileName>kservice.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\kservice.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\kservice.c</FilePath>
</File> </File>
<File> <File>
<FileName>mem.c</FileName> <FileName>mem.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\mem.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\mem.c</FilePath>
</File> </File>
<File> <File>
<FileName>memheap.c</FileName> <FileName>memheap.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\memheap.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\memheap.c</FilePath>
</File> </File>
<File> <File>
<FileName>mempool.c</FileName> <FileName>mempool.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\mempool.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\mempool.c</FilePath>
</File> </File>
<File> <File>
<FileName>module.c</FileName> <FileName>module.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\module.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\module.c</FilePath>
</File> </File>
<File> <File>
<FileName>object.c</FileName> <FileName>object.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\object.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\object.c</FilePath>
</File> </File>
<File> <File>
<FileName>scheduler.c</FileName> <FileName>scheduler.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\scheduler.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\scheduler.c</FilePath>
</File> </File>
<File> <File>
<FileName>thread.c</FileName> <FileName>thread.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\thread.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\thread.c</FilePath>
</File> </File>
<File> <File>
<FileName>timer.c</FileName> <FileName>timer.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\src\timer.c</FilePath> <FilePath>..\..\..\git\rt-thread\src\timer.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
@ -702,27 +702,27 @@
<File> <File>
<FileName>cpuport.c</FileName> <FileName>cpuport.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath> <FilePath>..\..\..\git\rt-thread\libcpu\arm\cortex-m4\cpuport.c</FilePath>
</File> </File>
<File> <File>
<FileName>context_rvds.S</FileName> <FileName>context_rvds.S</FileName>
<FileType>2</FileType> <FileType>2</FileType>
<FilePath>..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath> <FilePath>..\..\..\git\rt-thread\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
</File> </File>
<File> <File>
<FileName>backtrace.c</FileName> <FileName>backtrace.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath> <FilePath>..\..\..\git\rt-thread\libcpu\arm\common\backtrace.c</FilePath>
</File> </File>
<File> <File>
<FileName>div0.c</FileName> <FileName>div0.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\div0.c</FilePath> <FilePath>..\..\..\git\rt-thread\libcpu\arm\common\div0.c</FilePath>
</File> </File>
<File> <File>
<FileName>showmem.c</FileName> <FileName>showmem.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\libcpu\arm\common\showmem.c</FilePath> <FilePath>..\..\..\git\rt-thread\libcpu\arm\common\showmem.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
@ -732,42 +732,42 @@
<File> <File>
<FileName>dfs.c</FileName> <FileName>dfs.c</FileName>
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<FilePath>..\..\components\net\lwip-1.4.1\src\netif\ethernetif.c</FilePath> <FilePath>..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\netif\ethernetif.c</FilePath>
</File> </File>
<File> <File>
<FileName>slipif.c</FileName> <FileName>slipif.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\components\net\lwip-1.4.1\src\netif\slipif.c</FilePath> <FilePath>..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\netif\slipif.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
@ -1107,22 +1127,22 @@
<File> <File>
<FileName>SEGGER_SYSVIEW_Config_RTThread.c</FileName> <FileName>SEGGER_SYSVIEW_Config_RTThread.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_Config_RTThread.c</FilePath> <FilePath>..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_Config_RTThread.c</FilePath>
</File> </File>
<File> <File>
<FileName>SEGGER_SYSVIEW_RTThread.c</FileName> <FileName>SEGGER_SYSVIEW_RTThread.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_RTThread.c</FilePath> <FilePath>..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_RTThread.c</FilePath>
</File> </File>
<File> <File>
<FileName>SEGGER_RTT.c</FileName> <FileName>SEGGER_RTT.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\components\trace\SystemView_Src_V240\SEGGER\SEGGER_RTT.c</FilePath> <FilePath>..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER\SEGGER_RTT.c</FilePath>
</File> </File>
<File> <File>
<FileName>SEGGER_SYSVIEW.c</FileName> <FileName>SEGGER_SYSVIEW.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\..\components\trace\SystemView_Src_V240\SEGGER\SEGGER_SYSVIEW.c</FilePath> <FilePath>..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER\SEGGER_SYSVIEW.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>