From d01b2ca84b8a6f7950cc63d27ba5093b0624c6aa Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Mon, 19 Jan 2015 06:18:16 +0000 Subject: [PATCH 01/14] [DeviceDrivers] Add pin io driver framework --- components/drivers/include/drivers/pin.h | 79 +++++++++++++++ components/drivers/misc/SConscript | 14 +++ components/drivers/misc/pin.c | 118 +++++++++++++++++++++++ 3 files changed, 211 insertions(+) create mode 100644 components/drivers/include/drivers/pin.h create mode 100644 components/drivers/misc/SConscript create mode 100644 components/drivers/misc/pin.c diff --git a/components/drivers/include/drivers/pin.h b/components/drivers/include/drivers/pin.h new file mode 100644 index 0000000000..7e1fd4e825 --- /dev/null +++ b/components/drivers/include/drivers/pin.h @@ -0,0 +1,79 @@ +/* + * File : pin.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2015, RT-Thread Development Team + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Change Logs: + * Date Author Notes + * 2015-01-20 Bernard the first version + */ + +#ifndef PIN_H__ +#define PIN_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* pin device and operations for RT-Thread */ +struct rt_device_pin +{ + struct rt_device parent; + const struct rt_pin_ops *ops; +}; + +#define PIN_LOW 0x00 +#define PIN_HIGH 0x01 + +#define PIN_MODE_OUTPUT 0x00 +#define PIN_MODE_INPUT 0x01 +#define PIN_MODE_INPUT_PULLUP 0x02 + +struct rt_device_pin_mode +{ + rt_uint16_t pin; + rt_uint16_t mode; +}; +struct rt_device_pin_status +{ + rt_uint16_t pin; + rt_uint16_t status; +}; + +struct rt_pin_ops +{ + void (*pin_mode) (struct rt_device* device, rt_base_t pin, rt_base_t mode); + void (*pin_write)(struct rt_device* device, rt_base_t pin, rt_base_t value); + int (*pin_read) (struct rt_device* device, rt_base_t pin); + + /* TODO: add GPIO interrupt */ +}; + +int rt_device_pin_register(const char* name, const struct rt_pin_ops* ops, void* user_data); + +void rt_pin_mode(rt_base_t pin, rt_base_t mode); +void rt_pin_write(rt_base_t pin, rt_base_t value); +int rt_pin_read (rt_base_t pin); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/components/drivers/misc/SConscript b/components/drivers/misc/SConscript new file mode 100644 index 0000000000..7f269d4ee9 --- /dev/null +++ b/components/drivers/misc/SConscript @@ -0,0 +1,14 @@ +from building import * + +cwd = GetCurrentDir() +src = [] +CPPPATH = [cwd + '/../include'] +group = [] + +if GetDepend(['RT_USING_PIN']): + src = src + ['pin.c'] + +if len(src): + group = DefineGroup('DeviceDrivers', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/components/drivers/misc/pin.c b/components/drivers/misc/pin.c new file mode 100644 index 0000000000..ef244ccdc7 --- /dev/null +++ b/components/drivers/misc/pin.c @@ -0,0 +1,118 @@ +/* + * File : pin.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2015, RT-Thread Development Team + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Change Logs: + * Date Author Notes + * 2015-01-20 Bernard the first version + */ + +#include + +#ifdef RT_USING_FINSH +#include +#endif + +static struct rt_device_pin _hw_pin; +static rt_size_t _pin_read (rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size) +{ + struct rt_device_pin_status* status; + struct rt_device_pin* pin = (struct rt_device_pin*)dev; + + /* check parameters */ + RT_ASSERT(pin != RT_NULL); + + status = (struct rt_device_pin_status*) buffer; + if (status == RT_NULL || size != sizeof(*status)) return 0; + + status->status = pin->ops->pin_read(dev, status->pin); + return size; +} + +static rt_size_t _pin_write (rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size) +{ + struct rt_device_pin_status* status; + struct rt_device_pin* pin = (struct rt_device_pin*)dev; + + /* check parameters */ + RT_ASSERT(pin != RT_NULL); + + status = (struct rt_device_pin_status*) buffer; + if (status == RT_NULL || size != sizeof(*status)) return 0; + + pin->ops->pin_write(dev, (rt_base_t)status->pin, (rt_base_t)status->status); + + return size; +} + +static rt_err_t _pin_control(rt_device_t dev, rt_uint8_t cmd, void *args) +{ + struct rt_device_pin_mode* mode; + struct rt_device_pin* pin = (struct rt_device_pin*)dev; + + /* check parameters */ + RT_ASSERT(pin != RT_NULL); + + mode = (struct rt_device_pin_mode*) args; + if (mode == RT_NULL) return -RT_ERROR; + + pin->ops->pin_mode(dev, (rt_base_t)mode->pin, (rt_base_t)mode->mode); + + return 0; +} + +int rt_device_pin_register(const char* name, const struct rt_pin_ops* ops, void* user_data) +{ + _hw_pin.parent.type = RT_Device_Class_Miscellaneous; + _hw_pin.parent.rx_indicate = RT_NULL; + _hw_pin.parent.tx_complete = RT_NULL; + + _hw_pin.parent.init = RT_NULL; + _hw_pin.parent.open = RT_NULL; + _hw_pin.parent.close = RT_NULL; + _hw_pin.parent.read = _pin_read; + _hw_pin.parent.write = _pin_write; + _hw_pin.parent.control = _pin_control; + + _hw_pin.ops = ops; + _hw_pin.parent.user_data = user_data; + + /* register a character device */ + rt_device_register(&_hw_pin.parent, "pin", RT_DEVICE_FLAG_RDWR); + + return 0; +} + +/* RT-Thread Hardware PIN APIs */ +void rt_pin_mode(rt_base_t pin, rt_base_t mode) +{ + _hw_pin.ops->pin_mode(&_hw_pin.parent, pin, mode); +} +FINSH_FUNCTION_EXPORT_ALIAS(rt_pin_mode, pinMode, set hardware pin mode); + +void rt_pin_write(rt_base_t pin, rt_base_t value) +{ + _hw_pin.ops->pin_write(&_hw_pin.parent, pin, value); +} +FINSH_FUNCTION_EXPORT_ALIAS(rt_pin_write, pinWrite, write value to hardware pin); + +int rt_pin_read (rt_base_t pin) +{ + return _hw_pin.ops->pin_read(&_hw_pin.parent, pin); +} +FINSH_FUNCTION_EXPORT_ALIAS(rt_pin_read, pinRead, read status from hardware pin); From 765ac35e13c22580c393d270f73fcb7ce4404545 Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Mon, 19 Jan 2015 08:54:18 +0000 Subject: [PATCH 02/14] add AStyle shell script file --- tools/as.sh | 3 +++ 1 file changed, 3 insertions(+) create mode 100755 tools/as.sh diff --git a/tools/as.sh b/tools/as.sh new file mode 100755 index 0000000000..d4f30f418c --- /dev/null +++ b/tools/as.sh @@ -0,0 +1,3 @@ +#!/bin/sh + +astyle --style=allman --indent=spaces=4 --pad-oper --pad-header --unpad-paren --suffix=none --align-pointer=name --lineend=linux --convert-tabs --verbose $1 From 1bb425e839fc78fe18accd1e9ec65ff9a7631812 Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Mon, 19 Jan 2015 08:56:43 +0000 Subject: [PATCH 03/14] [DeviceDrivers] code cleanup for hardware pin --- components/drivers/include/drivers/pin.h | 10 ++--- components/drivers/misc/pin.c | 50 ++++++++++++------------ 2 files changed, 30 insertions(+), 30 deletions(-) diff --git a/components/drivers/include/drivers/pin.h b/components/drivers/include/drivers/pin.h index 7e1fd4e825..704114cf99 100644 --- a/components/drivers/include/drivers/pin.h +++ b/components/drivers/include/drivers/pin.h @@ -59,18 +59,18 @@ struct rt_device_pin_status struct rt_pin_ops { - void (*pin_mode) (struct rt_device* device, rt_base_t pin, rt_base_t mode); - void (*pin_write)(struct rt_device* device, rt_base_t pin, rt_base_t value); - int (*pin_read) (struct rt_device* device, rt_base_t pin); + void (*pin_mode)(struct rt_device *device, rt_base_t pin, rt_base_t mode); + void (*pin_write)(struct rt_device *device, rt_base_t pin, rt_base_t value); + int (*pin_read)(struct rt_device *device, rt_base_t pin); /* TODO: add GPIO interrupt */ }; -int rt_device_pin_register(const char* name, const struct rt_pin_ops* ops, void* user_data); +int rt_device_pin_register(const char *name, const struct rt_pin_ops *ops, void *user_data); void rt_pin_mode(rt_base_t pin, rt_base_t mode); void rt_pin_write(rt_base_t pin, rt_base_t value); -int rt_pin_read (rt_base_t pin); +int rt_pin_read(rt_base_t pin); #ifdef __cplusplus } diff --git a/components/drivers/misc/pin.c b/components/drivers/misc/pin.c index ef244ccdc7..d83c3d2f03 100644 --- a/components/drivers/misc/pin.c +++ b/components/drivers/misc/pin.c @@ -29,30 +29,30 @@ #endif static struct rt_device_pin _hw_pin; -static rt_size_t _pin_read (rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size) +static rt_size_t _pin_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size) { - struct rt_device_pin_status* status; - struct rt_device_pin* pin = (struct rt_device_pin*)dev; + struct rt_device_pin_status *status; + struct rt_device_pin *pin = (struct rt_device_pin *)dev; /* check parameters */ RT_ASSERT(pin != RT_NULL); - status = (struct rt_device_pin_status*) buffer; + status = (struct rt_device_pin_status *) buffer; if (status == RT_NULL || size != sizeof(*status)) return 0; status->status = pin->ops->pin_read(dev, status->pin); return size; } -static rt_size_t _pin_write (rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size) +static rt_size_t _pin_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size) { - struct rt_device_pin_status* status; - struct rt_device_pin* pin = (struct rt_device_pin*)dev; + struct rt_device_pin_status *status; + struct rt_device_pin *pin = (struct rt_device_pin *)dev; /* check parameters */ RT_ASSERT(pin != RT_NULL); - status = (struct rt_device_pin_status*) buffer; + status = (struct rt_device_pin_status *) buffer; if (status == RT_NULL || size != sizeof(*status)) return 0; pin->ops->pin_write(dev, (rt_base_t)status->pin, (rt_base_t)status->status); @@ -62,13 +62,13 @@ static rt_size_t _pin_write (rt_device_t dev, rt_off_t pos, const void *buffer, static rt_err_t _pin_control(rt_device_t dev, rt_uint8_t cmd, void *args) { - struct rt_device_pin_mode* mode; - struct rt_device_pin* pin = (struct rt_device_pin*)dev; + struct rt_device_pin_mode *mode; + struct rt_device_pin *pin = (struct rt_device_pin *)dev; /* check parameters */ RT_ASSERT(pin != RT_NULL); - mode = (struct rt_device_pin_mode*) args; + mode = (struct rt_device_pin_mode *) args; if (mode == RT_NULL) return -RT_ERROR; pin->ops->pin_mode(dev, (rt_base_t)mode->pin, (rt_base_t)mode->mode); @@ -76,24 +76,24 @@ static rt_err_t _pin_control(rt_device_t dev, rt_uint8_t cmd, void *args) return 0; } -int rt_device_pin_register(const char* name, const struct rt_pin_ops* ops, void* user_data) +int rt_device_pin_register(const char *name, const struct rt_pin_ops *ops, void *user_data) { - _hw_pin.parent.type = RT_Device_Class_Miscellaneous; - _hw_pin.parent.rx_indicate = RT_NULL; - _hw_pin.parent.tx_complete = RT_NULL; + _hw_pin.parent.type = RT_Device_Class_Miscellaneous; + _hw_pin.parent.rx_indicate = RT_NULL; + _hw_pin.parent.tx_complete = RT_NULL; - _hw_pin.parent.init = RT_NULL; - _hw_pin.parent.open = RT_NULL; - _hw_pin.parent.close = RT_NULL; - _hw_pin.parent.read = _pin_read; - _hw_pin.parent.write = _pin_write; - _hw_pin.parent.control = _pin_control; + _hw_pin.parent.init = RT_NULL; + _hw_pin.parent.open = RT_NULL; + _hw_pin.parent.close = RT_NULL; + _hw_pin.parent.read = _pin_read; + _hw_pin.parent.write = _pin_write; + _hw_pin.parent.control = _pin_control; _hw_pin.ops = ops; - _hw_pin.parent.user_data = user_data; + _hw_pin.parent.user_data = user_data; - /* register a character device */ - rt_device_register(&_hw_pin.parent, "pin", RT_DEVICE_FLAG_RDWR); + /* register a character device */ + rt_device_register(&_hw_pin.parent, "pin", RT_DEVICE_FLAG_RDWR); return 0; } @@ -111,7 +111,7 @@ void rt_pin_write(rt_base_t pin, rt_base_t value) } FINSH_FUNCTION_EXPORT_ALIAS(rt_pin_write, pinWrite, write value to hardware pin); -int rt_pin_read (rt_base_t pin) +int rt_pin_read(rt_base_t pin) { return _hw_pin.ops->pin_read(&_hw_pin.parent, pin); } From 6acf4a4528287935de1e2cb51c4b476ee82d19db Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Tue, 20 Jan 2015 07:23:59 +0000 Subject: [PATCH 04/14] [BSP] Update UART and GPIO driver with framework in STM32F4 --- bsp/stm32f40x/drivers/board.c | 4 + bsp/stm32f40x/drivers/board.h | 10 - bsp/stm32f40x/drivers/serial.c | 418 ------------------- bsp/stm32f40x/drivers/serial.h | 70 ---- bsp/stm32f40x/drivers/stm32f4xx_it.c | 104 ----- bsp/stm32f40x/drivers/usart.c | 580 +++++++++++++-------------- bsp/stm32f40x/drivers/usart.h | 5 +- bsp/stm32f40x/rtconfig.h | 34 +- 8 files changed, 312 insertions(+), 913 deletions(-) delete mode 100644 bsp/stm32f40x/drivers/serial.c delete mode 100644 bsp/stm32f40x/drivers/serial.h diff --git a/bsp/stm32f40x/drivers/board.c b/bsp/stm32f40x/drivers/board.c index 0414916a5a..8f2c5b4e1d 100644 --- a/bsp/stm32f40x/drivers/board.c +++ b/bsp/stm32f40x/drivers/board.c @@ -17,6 +17,8 @@ #include "stm32f4xx.h" #include "board.h" +#include "usart.h" +#include "gpio.h" /** * @addtogroup STM32 @@ -92,6 +94,8 @@ void rt_hw_board_init() SysTick_Configuration(); rt_hw_usart_init(); + stm32_hw_pin_init(); + #ifdef RT_USING_CONSOLE rt_console_set_device(CONSOLE_DEVICE); #endif diff --git a/bsp/stm32f40x/drivers/board.h b/bsp/stm32f40x/drivers/board.h index b3a1cb4a08..97b506c146 100644 --- a/bsp/stm32f40x/drivers/board.h +++ b/bsp/stm32f40x/drivers/board.h @@ -40,11 +40,6 @@ #define STM32_SRAM_SIZE 128 #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) -//#define RT_USING_UART1 -#define RT_USING_UART2 -//#define RT_USING_UART3 -//#define RT_USING_UART6 - // Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3 // Default: 1 #define STM32_CONSOLE_USART 2 @@ -63,11 +58,6 @@ void rt_hw_board_init(void); #define FINSH_DEVICE_NAME CONSOLE_DEVICE -void rt_hw_usart_init(void); - -/* SD Card init function */ -void rt_hw_msd_init(void); - #endif // <<< Use Configuration Wizard in Context Menu >>> diff --git a/bsp/stm32f40x/drivers/serial.c b/bsp/stm32f40x/drivers/serial.c deleted file mode 100644 index 2ec3f8ec2d..0000000000 --- a/bsp/stm32f40x/drivers/serial.c +++ /dev/null @@ -1,418 +0,0 @@ -/* - * File : serial.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-02-05 Bernard first version - * 2009-10-25 Bernard fix rt_serial_read bug when there is no data - * in the buffer. - * 2010-03-29 Bernard cleanup code. - */ - -#include "serial.h" -#include -#include - -static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, - rt_uint32_t address, rt_uint32_t size); - -/** - * @addtogroup STM32 - */ -/*@{*/ - -/* RT-Thread Device Interface */ -static rt_err_t rt_serial_init (rt_device_t dev) -{ - struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data; - - if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) - { - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - rt_memset(uart->int_rx->rx_buffer, 0, - sizeof(uart->int_rx->rx_buffer)); - uart->int_rx->read_index = 0; - uart->int_rx->save_index = 0; - } - - if (dev->flag & RT_DEVICE_FLAG_DMA_TX) - { - RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL); - uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL; - - /* init data node memory pool */ - rt_mp_init(&(uart->dma_tx->data_node_mp), "dn", - uart->dma_tx->data_node_mem_pool, - sizeof(uart->dma_tx->data_node_mem_pool), - sizeof(struct stm32_serial_data_node)); - } - - /* Enable USART */ - USART_Cmd(uart->uart_device, ENABLE); - - dev->flag |= RT_DEVICE_FLAG_ACTIVATED; - } - - return RT_EOK; -} - -static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) -{ - return RT_EOK; -} - -static rt_err_t rt_serial_close(rt_device_t dev) -{ - return RT_EOK; -} - -static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) -{ - rt_uint8_t* ptr; - rt_err_t err_code; - struct stm32_serial_device* uart; - - ptr = buffer; - err_code = RT_EOK; - uart = (struct stm32_serial_device*)dev->user_data; - - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - /* interrupt mode Rx */ - while (size) - { - rt_base_t level; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - if (uart->int_rx->read_index != uart->int_rx->save_index) - { - /* read a character */ - *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index]; - size--; - - /* move to next position */ - uart->int_rx->read_index ++; - if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->read_index = 0; - } - else - { - /* set error code */ - err_code = -RT_EEMPTY; - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - break; - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - } - else - { - /* polling mode */ - while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) - { - while (uart->uart_device->SR & USART_FLAG_RXNE) - { - *ptr = uart->uart_device->DR & 0xff; - ptr ++; - } - } - } - - /* set error code */ - rt_set_errno(err_code); - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; -} - -static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, - rt_uint32_t address, rt_uint32_t size) -{ - RT_ASSERT(dma_channel != RT_NULL); - - /* disable DMA */ - DMA_Cmd(dma_channel, DISABLE); - - /* set buffer address */ - dma_channel->M0AR = address; - /* set size */ - dma_channel->NDTR = size; - - /* enable DMA */ - DMA_Cmd(dma_channel, ENABLE); -} - -static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) -{ - rt_uint8_t* ptr; - rt_err_t err_code; - struct stm32_serial_device* uart; - - err_code = RT_EOK; - ptr = (rt_uint8_t*)buffer; - uart = (struct stm32_serial_device*)dev->user_data; - - if (dev->flag & RT_DEVICE_FLAG_INT_TX) - { - /* interrupt mode Tx, does not support */ - RT_ASSERT(0); - } - else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) - { - /* DMA mode Tx */ - - /* allocate a data node */ - struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*) - rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER); - if (data_node == RT_NULL) - { - /* set error code */ - err_code = -RT_ENOMEM; - } - else - { - rt_uint32_t level; - - /* fill data node */ - data_node->data_ptr = ptr; - data_node->data_size = size; - - /* insert to data link */ - data_node->next = RT_NULL; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - data_node->prev = uart->dma_tx->list_tail; - if (uart->dma_tx->list_tail != RT_NULL) - uart->dma_tx->list_tail->next = data_node; - uart->dma_tx->list_tail = data_node; - - if (uart->dma_tx->list_head == RT_NULL) - { - /* start DMA to transmit data */ - uart->dma_tx->list_head = data_node; - - /* Enable DMA Channel */ - rt_serial_enable_dma(uart->dma_tx->dma_channel, - (rt_uint32_t)uart->dma_tx->list_head->data_ptr, - uart->dma_tx->list_head->data_size); - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - } - else - { - /* polling mode */ - if (dev->flag & RT_DEVICE_FLAG_STREAM) - { - /* stream mode */ - while (size) - { - if (*ptr == '\n') - { - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = '\r'; - } - - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = (*ptr & 0x1FF); - - ++ptr; --size; - } - } - else - { - /* write data directly */ - while (size) - { - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = (*ptr & 0x1FF); - - ++ptr; --size; - } - } - } - - /* set error code */ - rt_set_errno(err_code); - - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; -} - -static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args) -{ - struct stm32_serial_device* uart; - - RT_ASSERT(dev != RT_NULL); - - uart = (struct stm32_serial_device*)dev->user_data; - switch (cmd) - { - case RT_DEVICE_CTRL_SUSPEND: - /* suspend device */ - dev->flag |= RT_DEVICE_FLAG_SUSPENDED; - USART_Cmd(uart->uart_device, DISABLE); - break; - - case RT_DEVICE_CTRL_RESUME: - /* resume device */ - dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; - USART_Cmd(uart->uart_device, ENABLE); - break; - } - - return RT_EOK; -} - -/* - * serial register for STM32 - * support STM32F103VB and STM32F103ZE - */ -rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial) -{ - RT_ASSERT(device != RT_NULL); - - if ((flag & RT_DEVICE_FLAG_DMA_RX) || - (flag & RT_DEVICE_FLAG_INT_TX)) - { - RT_ASSERT(0); - } - - device->type = RT_Device_Class_Char; - device->rx_indicate = RT_NULL; - device->tx_complete = RT_NULL; - device->init = rt_serial_init; - device->open = rt_serial_open; - device->close = rt_serial_close; - device->read = rt_serial_read; - device->write = rt_serial_write; - device->control = rt_serial_control; - device->user_data = serial; - - /* register a character device */ - return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); -} - -/* ISR for serial interrupt */ -void rt_hw_serial_isr(rt_device_t device) -{ - struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; - - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) - { - /* interrupt mode receive */ - RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX); - - /* save on rx buffer */ - while (uart->uart_device->SR & USART_FLAG_RXNE) - { - rt_base_t level; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - /* save character */ - uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff; - uart->int_rx->save_index ++; - if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->save_index = 0; - - /* if the next position is read index, discard this 'read char' */ - if (uart->int_rx->save_index == uart->int_rx->read_index) - { - uart->int_rx->read_index ++; - if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->read_index = 0; - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); - - /* invoke callback */ - if (device->rx_indicate != RT_NULL) - { - rt_size_t rx_length; - - /* get rx length */ - rx_length = uart->int_rx->read_index > uart->int_rx->save_index ? - UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index : - uart->int_rx->save_index - uart->int_rx->read_index; - - device->rx_indicate(device, rx_length); - } - } - - if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) - { - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); - } -} - -/* - * ISR for DMA mode Tx - */ -void rt_hw_serial_dma_tx_isr(rt_device_t device) -{ - rt_uint32_t level; - struct stm32_serial_data_node* data_node; - struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; - - /* DMA mode receive */ - RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX); - - /* get the first data node */ - data_node = uart->dma_tx->list_head; - RT_ASSERT(data_node != RT_NULL); - - /* invoke call to notify tx complete */ - if (device->tx_complete != RT_NULL) - device->tx_complete(device, data_node->data_ptr); - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - /* remove list head */ - uart->dma_tx->list_head = data_node->next; - if (uart->dma_tx->list_head == RT_NULL) /* data link empty */ - uart->dma_tx->list_tail = RT_NULL; - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - - /* release data node memory */ - rt_mp_free(data_node); - - if (uart->dma_tx->list_head != RT_NULL) - { - /* transmit next data node */ - rt_serial_enable_dma(uart->dma_tx->dma_channel, - (rt_uint32_t)uart->dma_tx->list_head->data_ptr, - uart->dma_tx->list_head->data_size); - } - else - { - /* no data to be transmitted, disable DMA */ - DMA_Cmd(uart->dma_tx->dma_channel, DISABLE); - } -} - -/*@}*/ diff --git a/bsp/stm32f40x/drivers/serial.h b/bsp/stm32f40x/drivers/serial.h deleted file mode 100644 index 62c24a729e..0000000000 --- a/bsp/stm32f40x/drivers/serial.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * File : serial.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009 - 2010, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard first version - * 2010-03-29 Bernard remove interrupt tx and DMA rx mode. - */ -#ifndef __RT_HW_SERIAL_H__ -#define __RT_HW_SERIAL_H__ - -#include -#include - -/* STM32F40x library definitions */ -#include - -#define UART_RX_BUFFER_SIZE 64 -#define UART_TX_DMA_NODE_SIZE 4 - -/* data node for Tx Mode */ -struct stm32_serial_data_node -{ - rt_uint8_t *data_ptr; - rt_size_t data_size; - struct stm32_serial_data_node *next, *prev; -}; -struct stm32_serial_dma_tx -{ - /* DMA Channel */ - DMA_Stream_TypeDef* dma_channel; - - /* data list head and tail */ - struct stm32_serial_data_node *list_head, *list_tail; - - /* data node memory pool */ - struct rt_mempool data_node_mp; - rt_uint8_t data_node_mem_pool[UART_TX_DMA_NODE_SIZE * - (sizeof(struct stm32_serial_data_node) + sizeof(void*))]; -}; - -struct stm32_serial_int_rx -{ - rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE]; - rt_uint32_t read_index, save_index; -}; - -struct stm32_serial_device -{ - USART_TypeDef* uart_device; - - /* rx structure */ - struct stm32_serial_int_rx* int_rx; - - /* tx structure */ - struct stm32_serial_dma_tx* dma_tx; -}; - -rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial); - -void rt_hw_serial_isr(rt_device_t device); -void rt_hw_serial_dma_tx_isr(rt_device_t device); - -#endif diff --git a/bsp/stm32f40x/drivers/stm32f4xx_it.c b/bsp/stm32f40x/drivers/stm32f4xx_it.c index 6c4ea2226a..c2dd528276 100644 --- a/bsp/stm32f40x/drivers/stm32f4xx_it.c +++ b/bsp/stm32f40x/drivers/stm32f4xx_it.c @@ -54,16 +54,6 @@ void NMI_Handler(void) { } -/** - * @brief This function handles Hard Fault exception. - * @param None - * @retval None - */ -//void HardFault_Handler(void) -//{ -// // definition in libcpu/arm/cortex-m4/context_*.S -//} - /** * @brief This function handles Memory Manage exception. * @param None @@ -112,100 +102,6 @@ void SVC_Handler(void) { } -/** - * @brief This function handles Debug Monitor exception. - * @param None - * @retval None - */ -//void DebugMon_Handler(void) -//{ - // defined in gdb/libcpu/cortexm/gdb_gcc.S -//} - -/** - * @brief This function handles PendSVC exception. - * @param None - * @retval None - */ -//void PendSV_Handler(void) -//{ -// // defined in libcpu/arm/cortex-m4/context_*.S -//} - -/** - * @brief This function handles SysTick Handler. - * @param None - * @retval None - */ -//void SysTick_Handler(void) -//{ -// // defined in boarc.c -//} - -/******************************************************************************/ -/* STM32F4xx Peripherals Interrupt Handlers */ -/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ -/* available peripheral interrupt handler's name please refer to the startup */ -/* file (startup_stm32f4xx.s). */ -/******************************************************************************/ - -/** - * @brief This function handles PPP interrupt request. - * @param None - * @retval None - */ -/*void PPP_IRQHandler(void) -{ -}*/ - -void USART1_IRQHandler(void) -{ -#ifdef RT_USING_UART1 - extern struct rt_device uart1_device; - extern void rt_hw_serial_isr(struct rt_device *device); - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_hw_serial_isr(&uart1_device); - - /* leave interrupt */ - rt_interrupt_leave(); -#endif -} - -void USART2_IRQHandler(void) -{ -#ifdef RT_USING_UART2 - extern struct rt_device uart2_device; - extern void rt_hw_serial_isr(struct rt_device *device); - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_hw_serial_isr(&uart2_device); - - /* leave interrupt */ - rt_interrupt_leave(); -#endif -} - -void USART3_IRQHandler(void) -{ -#ifdef RT_USING_UART3 - extern struct rt_device uart3_device; - extern void rt_hw_serial_isr(struct rt_device *device); - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_hw_serial_isr(&uart3_device); - - /* leave interrupt */ - rt_interrupt_leave(); -#endif -} - /** * @} */ diff --git a/bsp/stm32f40x/drivers/usart.c b/bsp/stm32f40x/drivers/usart.c index d352081d2b..294b8af0fe 100644 --- a/bsp/stm32f40x/drivers/usart.c +++ b/bsp/stm32f40x/drivers/usart.c @@ -12,148 +12,273 @@ * 2009-01-05 Bernard the first version * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode * 2012-02-08 aozima update for F4. + * 2012-07-28 aozima update for ART board. */ #include "stm32f4xx.h" #include "usart.h" #include "board.h" -#include -/* - * Use UART1 as console output and finsh input - * interrupt Rx and poll Tx (stream mode) - * - * Use UART2 with interrupt Rx and poll Tx - * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2 - * - * USART DMA setting on STM32 - * USART1 Tx --> DMA Channel 4 - * USART1 Rx --> DMA Channel 5 - * USART2 Tx --> DMA Channel 7 - * USART2 Rx --> DMA Channel 6 - * USART3 Tx --> DMA Channel 2 - * USART3 Rx --> DMA Channel 3 - */ +#include -#ifdef RT_USING_UART1 -struct stm32_serial_int_rx uart1_int_rx; -struct stm32_serial_device uart1 = -{ - USART1, - &uart1_int_rx, - RT_NULL -}; -struct rt_device uart1_device; -#endif +/* UART GPIO define. */ +#define UART1_GPIO_TX GPIO_Pin_6 +#define UART1_TX_PIN_SOURCE GPIO_PinSource6 +#define UART1_GPIO_RX GPIO_Pin_7 +#define UART1_RX_PIN_SOURCE GPIO_PinSource7 +#define UART1_GPIO GPIOB +#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB +#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 +#define UART1_TX_DMA DMA1_Channel4 +#define UART1_RX_DMA DMA1_Channel5 -#ifdef RT_USING_UART2 -struct stm32_serial_int_rx uart2_int_rx; -struct stm32_serial_device uart2 = -{ - USART2, - &uart2_int_rx, - RT_NULL -}; -struct rt_device uart2_device; -#endif - -#ifdef RT_USING_UART3 -struct stm32_serial_int_rx uart3_int_rx; -struct stm32_serial_dma_tx uart3_dma_tx; -struct stm32_serial_device uart3 = -{ - USART3, - &uart3_int_rx, - &uart3_dma_tx -}; -struct rt_device uart3_device; -#endif - -#ifdef RT_USING_UART6 -struct stm32_serial_int_rx uart6_int_rx; -struct stm32_serial_device uart6 = -{ - USART6, - &uart6_int_rx, - RT_NULL -}; -struct rt_device uart6_device; -#endif - -//#define USART1_DR_Base 0x40013804 -//#define USART2_DR_Base 0x40004404 -//#define USART3_DR_Base 0x40004804 - -/* USART1_REMAP = 0 */ -#define UART1_GPIO_TX GPIO_Pin_9 -#define UART1_TX_PIN_SOURCE GPIO_PinSource9 -#define UART1_GPIO_RX GPIO_Pin_10 -#define UART1_RX_PIN_SOURCE GPIO_PinSource10 -#define UART1_GPIO GPIOA -#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOA -#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 -#define UART1_TX_DMA DMA1_Channel4 -#define UART1_RX_DMA DMA1_Channel5 - -#define UART2_GPIO_TX GPIO_Pin_2 +#define UART2_GPIO_TX GPIO_Pin_2 #define UART2_TX_PIN_SOURCE GPIO_PinSource2 -#define UART2_GPIO_RX GPIO_Pin_3 +#define UART2_GPIO_RX GPIO_Pin_3 #define UART2_RX_PIN_SOURCE GPIO_PinSource3 -#define UART2_GPIO GPIOA +#define UART2_GPIO GPIOA #define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA -#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 +#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 +#define UART2_TX_DMA DMA1_Channel4 +#define UART2_RX_DMA DMA1_Channel5 -/* USART3_REMAP[1:0] = 00 */ -#define UART3_GPIO_TX GPIO_Pin_10 -#define UART3_TX_PIN_SOURCE GPIO_PinSource10 -#define UART3_GPIO_RX GPIO_Pin_11 -#define UART3_RX_PIN_SOURCE GPIO_PinSource11 -#define UART3_GPIO GPIOB -#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOB +#define UART3_GPIO_TX GPIO_Pin_8 +#define UART3_TX_PIN_SOURCE GPIO_PinSource8 +#define UART3_GPIO_RX GPIO_Pin_9 +#define UART3_RX_PIN_SOURCE GPIO_PinSource9 +#define UART3_GPIO GPIOD +#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD #define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 #define UART3_TX_DMA DMA1_Stream1 #define UART3_RX_DMA DMA1_Stream3 -#define UART6_GPIO_TX GPIO_Pin_6 -#define UART6_TX_PIN_SOURCE GPIO_PinSource6 -#define UART6_GPIO_RX GPIO_Pin_7 -#define UART6_RX_PIN_SOURCE GPIO_PinSource7 -#define UART6_GPIO GPIOC -#define UART6_GPIO_RCC RCC_AHB1Periph_GPIOC -#define RCC_APBPeriph_UART6 RCC_APB2Periph_USART6 +/* STM32 uart driver */ +struct stm32_uart +{ + USART_TypeDef* uart_device; + IRQn_Type irq; +}; + +static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg) +{ + struct stm32_uart* uart; + USART_InitTypeDef USART_InitStructure; + + RT_ASSERT(serial != RT_NULL); + RT_ASSERT(cfg != RT_NULL); + + uart = (struct stm32_uart *)serial->parent.user_data; + + if (cfg->baud_rate == BAUD_RATE_9600) + USART_InitStructure.USART_BaudRate = 9600; + else if (cfg->baud_rate == BAUD_RATE_115200) + USART_InitStructure.USART_BaudRate = 115200; + + if (cfg->data_bits == DATA_BITS_8) + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + + if (cfg->stop_bits == STOP_BITS_1) + USART_InitStructure.USART_StopBits = USART_StopBits_1; + else if (cfg->stop_bits == STOP_BITS_2) + USART_InitStructure.USART_StopBits = USART_StopBits_2; + + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(uart->uart_device, &USART_InitStructure); + + /* Enable USART */ + USART_Cmd(uart->uart_device, ENABLE); + /* enable interrupt */ + USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE); + + return RT_EOK; +} + +static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg) +{ + struct stm32_uart* uart; + + RT_ASSERT(serial != RT_NULL); + uart = (struct stm32_uart *)serial->parent.user_data; + + switch (cmd) + { + case RT_DEVICE_CTRL_CLR_INT: + /* disable rx irq */ + UART_DISABLE_IRQ(uart->irq); + break; + case RT_DEVICE_CTRL_SET_INT: + /* enable rx irq */ + UART_ENABLE_IRQ(uart->irq); + break; + } + + return RT_EOK; +} + +static int stm32_putc(struct rt_serial_device *serial, char c) +{ + struct stm32_uart* uart; + + RT_ASSERT(serial != RT_NULL); + uart = (struct stm32_uart *)serial->parent.user_data; + + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = c; + + return 1; +} + +static int stm32_getc(struct rt_serial_device *serial) +{ + int ch; + struct stm32_uart* uart; + + RT_ASSERT(serial != RT_NULL); + uart = (struct stm32_uart *)serial->parent.user_data; + + ch = -1; + if (uart->uart_device->SR & USART_FLAG_RXNE) + { + ch = uart->uart_device->DR & 0xff; + } + + return ch; +} + +static const struct rt_uart_ops stm32_uart_ops = +{ + stm32_configure, + stm32_control, + stm32_putc, + stm32_getc, +}; + +#if defined(RT_USING_UART1) +/* UART1 device driver structure */ +struct stm32_uart uart1 = +{ + USART1, + USART1_IRQn, +}; +struct rt_serial_device serial1; + +void USART1_IRQHandler(void) +{ + struct stm32_uart* uart; + + uart = &uart1; + + /* enter interrupt */ + rt_interrupt_enter(); + if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + { + rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND); + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); + } + if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) + { + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); + } + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_USING_UART1 */ + +#if defined(RT_USING_UART2) +/* UART2 device driver structure */ +struct stm32_uart uart2 = +{ + USART2, + USART2_IRQn, +}; +struct rt_serial_device serial2; + +void USART2_IRQHandler(void) +{ + struct stm32_uart* uart; + + uart = &uart2; + + /* enter interrupt */ + rt_interrupt_enter(); + if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + { + rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND); + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); + } + if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) + { + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); + } + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_USING_UART2 */ + +#if defined(RT_USING_UART3) +/* UART3 device driver structure */ +struct stm32_uart uart3 = +{ + USART3, + USART3_IRQn, +}; +struct rt_serial_device serial3; + +void USART3_IRQHandler(void) +{ + struct stm32_uart* uart; + + uart = &uart3; + + /* enter interrupt */ + rt_interrupt_enter(); + if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + { + rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND); + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); + } + if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) + { + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); + } + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_USING_UART3 */ static void RCC_Configuration(void) { #ifdef RT_USING_UART1 - /* Enable USART2 GPIO clocks */ + /* Enable UART1 GPIO clocks */ RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE); - /* Enable USART2 clock */ + /* Enable UART1 clock */ RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE); -#endif +#endif /* RT_USING_UART1 */ #ifdef RT_USING_UART2 - /* Enable USART2 GPIO clocks */ + /* Enable UART2 GPIO clocks */ RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE); - /* Enable USART2 clock */ + /* Enable UART2 clock */ RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE); -#endif +#endif /* RT_USING_UART1 */ #ifdef RT_USING_UART3 - /* Enable USART3 GPIO clocks */ + /* Enable UART3 GPIO clocks */ RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE); - /* Enable USART3 clock */ + /* Enable UART3 clock */ RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE); - - /* DMA clock enable */ - RCC_APB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); -#endif - -#ifdef RT_USING_UART6 - /* Enable USART6 GPIO clocks */ - RCC_AHB1PeriphClockCmd(UART6_GPIO_RCC, ENABLE); - /* Enable USART6 clock */ - RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART6, ENABLE); -#endif +#endif /* RT_USING_UART3 */ } static void GPIO_Configuration(void) @@ -173,17 +298,17 @@ static void GPIO_Configuration(void) /* Connect alternate function */ GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1); GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PIN_SOURCE, GPIO_AF_USART1); -#endif +#endif /* RT_USING_UART1 */ #ifdef RT_USING_UART2 /* Configure USART2 Rx/tx PIN */ - GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX | UART2_GPIO_RX; + GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX | UART2_GPIO_TX; GPIO_Init(UART2_GPIO, &GPIO_InitStructure); /* Connect alternate function */ GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2); GPIO_PinAFConfig(UART2_GPIO, UART2_RX_PIN_SOURCE, GPIO_AF_USART2); -#endif +#endif /* RT_USING_UART2 */ #ifdef RT_USING_UART3 /* Configure USART3 Rx/tx PIN */ @@ -193,217 +318,74 @@ static void GPIO_Configuration(void) /* Connect alternate function */ GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3); GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3); -#endif - -#ifdef RT_USING_UART6 - /* Configure USART6 Rx/tx PIN */ - GPIO_InitStructure.GPIO_Pin = UART6_GPIO_TX | UART6_GPIO_RX; - GPIO_Init(UART6_GPIO, &GPIO_InitStructure); - - /* Connect alternate function */ - GPIO_PinAFConfig(UART6_GPIO, UART6_TX_PIN_SOURCE, GPIO_AF_USART6); - GPIO_PinAFConfig(UART6_GPIO, UART6_RX_PIN_SOURCE, GPIO_AF_USART6); -#endif +#endif /* RT_USING_UART3 */ } -static void NVIC_Configuration(void) +static void NVIC_Configuration(struct stm32_uart* uart) { NVIC_InitTypeDef NVIC_InitStructure; -#ifdef RT_USING_UART1 /* Enable the USART1 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; + NVIC_InitStructure.NVIC_IRQChannel = uart->irq; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); -#endif - -#ifdef RT_USING_UART2 - /* Enable the USART2 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -#endif - -#ifdef RT_USING_UART3 - /* Enable the USART3 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - /* Enable the DMA1 Channel2 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream1_IRQn; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -#endif - -#ifdef RT_USING_UART6 - /* Enable the USART6 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART6_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -#endif } -static void DMA_Configuration(void) +int stm32_hw_usart_init(void) { -#if defined (RT_USING_UART3) - DMA_InitTypeDef DMA_InitStructure; - -// /* Configure DMA Stream */ -// DMA_InitStructure.DMA_Channel = DMA_CHANNEL; -// DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SRC_Const_Buffer; -// DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)DST_Buffer; -// DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToMemory; -// DMA_InitStructure.DMA_BufferSize = (uint32_t)BUFFER_SIZE; -// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable; -// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; -// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; -// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; -// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; -// DMA_InitStructure.DMA_Priority = DMA_Priority_High; -// DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; -// DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; -// DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; -// DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; -// DMA_Init(DMA_STREAM, &DMA_InitStructure); - - /* Configure DMA Stream */ - DMA_InitStructure.DMA_Channel = DMA_Channel_0; - DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&USART3->DR); - DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0; - DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; - DMA_InitStructure.DMA_BufferSize = (uint32_t)0; - DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; - DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; - DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - DMA_InitStructure.DMA_Priority = DMA_Priority_High; - DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; - DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; - DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; - DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; - - DMA_DeInit(UART3_TX_DMA); - DMA_Init(UART3_TX_DMA, &DMA_InitStructure); - -// /* fill init structure */ -// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; -// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; -// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; -// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; -// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; -// DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; -// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; -// -// /* DMA1 Channel5 (triggered by USART3 Tx event) Config */ -// DMA_DeInit(UART3_TX_DMA); -// DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base; -// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; -// DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0; -// DMA_InitStructure.DMA_BufferSize = 0; -// DMA_Init(UART3_TX_DMA, &DMA_InitStructure); - DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE); -// DMA_ClearFlag(DMA1_FLAG_TC5); -#endif -} - -volatile USART_TypeDef * uart2_debug = USART2; -/* - * Init all related hardware in here - * rt_hw_serial_init() will register all supported USART device - */ -void rt_hw_usart_init() -{ - USART_InitTypeDef USART_InitStructure; + struct stm32_uart* uart; + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; RCC_Configuration(); - GPIO_Configuration(); - NVIC_Configuration(); - - DMA_Configuration(); - - /* uart init */ #ifdef RT_USING_UART1 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART1, &USART_InitStructure); + uart = &uart1; - /* register uart1 */ - rt_hw_serial_register(&uart1_device, "uart1", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, - &uart1); + serial1.ops = &stm32_uart_ops; + serial1.config = config; - /* enable interrupt */ - USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); -#endif + NVIC_Configuration(&uart1); + + /* register UART1 device */ + rt_hw_serial_register(&serial1, + "uart1", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); +#endif /* RT_USING_UART1 */ #ifdef RT_USING_UART2 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART2, &USART_InitStructure); + uart = &uart2; - /* register uart2 */ - rt_hw_serial_register(&uart2_device, "uart2", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, - &uart2); + serial2.ops = &stm32_uart_ops; + serial2.config = config; - /* Enable USART2 DMA Rx request */ - USART_ITConfig(USART2, USART_IT_RXNE, ENABLE); -#endif + NVIC_Configuration(&uart2); + + /* register UART1 device */ + rt_hw_serial_register(&serial2, + "uart2", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); +#endif /* RT_USING_UART2 */ #ifdef RT_USING_UART3 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART3, &USART_InitStructure); + uart = &uart3; -// uart3_dma_tx.dma_channel= UART3_TX_DMA; + serial3.ops = &stm32_uart_ops; + serial3.config = config; - /* register uart3 */ - rt_hw_serial_register(&uart3_device, "uart3", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX, - &uart3); + NVIC_Configuration(&uart3); - /* Enable USART3 DMA Tx request */ - USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE); + /* register UART3 device */ + rt_hw_serial_register(&serial3, + "uart3", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); +#endif /* RT_USING_UART3 */ - /* enable interrupt */ - USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); -#endif - -#ifdef RT_USING_UART6 - USART_InitStructure.USART_BaudRate = 9600; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART6, &USART_InitStructure); - - /* register uart6 */ - rt_hw_serial_register(&uart6_device, "uart6", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, - &uart6); -#endif + return 0; } +INIT_BOARD_EXPORT(stm32_hw_usart_init); diff --git a/bsp/stm32f40x/drivers/usart.h b/bsp/stm32f40x/drivers/usart.h index 48925df880..3faf85fcde 100644 --- a/bsp/stm32f40x/drivers/usart.h +++ b/bsp/stm32f40x/drivers/usart.h @@ -18,6 +18,9 @@ #include #include -void rt_hw_usart_init(void); +#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n)) +#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n)) + +int stm32_hw_usart_init(void); #endif diff --git a/bsp/stm32f40x/rtconfig.h b/bsp/stm32f40x/rtconfig.h index 9c347969b2..88dfd0b616 100644 --- a/bsp/stm32f40x/rtconfig.h +++ b/bsp/stm32f40x/rtconfig.h @@ -2,14 +2,11 @@ #ifndef __RTTHREAD_CFG_H__ #define __RTTHREAD_CFG_H__ -/* RT_GDB_STUB */ -//#define RT_USING_GDB - /* RT_NAME_MAX*/ #define RT_NAME_MAX 8 /* RT_ALIGN_SIZE*/ -#define RT_ALIGN_SIZE 8 +#define RT_ALIGN_SIZE 4 /* PRIORITY_MAX */ #define RT_THREAD_PRIORITY_MAX 32 @@ -20,7 +17,6 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG - #define RT_USING_OVERFLOW_CHECK /* Using Hook */ @@ -62,6 +58,16 @@ /* SECTION: Device System */ /* Using Device System */ #define RT_USING_DEVICE +#define RT_USING_DEVICE_IPC +/* Using serial framework */ +#define RT_USING_SERIAL + +#define RT_USING_UART1 +#define RT_USING_UART2 +#define RT_USING_UART3 + +/* Using GPIO pin framework */ +#define RT_USING_PIN /* SECTION: Console options */ #define RT_USING_CONSOLE @@ -75,7 +81,14 @@ #define FINSH_USING_DESCRIPTION /* SECTION: device filesystem */ +/* Using Device file system */ /* #define RT_USING_DFS */ +/* the max number of mounted filesystem */ +#define DFS_FILESYSTEMS_MAX 2 +/* the max number of opened files */ +#define DFS_FD_MAX 4 + +/* Using ELM FATFS */ //#define RT_USING_DFS_ELMFAT #define RT_DFS_ELM_WORD_ACCESS /* Reentrancy (thread safe) of the FatFs module. */ @@ -87,12 +100,8 @@ /* Maximum sector size to be handled. */ #define RT_DFS_ELM_MAX_SECTOR_SIZE 512 -#define RT_USING_DFS_ROMFS - -/* the max number of mounted filesystem */ -#define DFS_FILESYSTEMS_MAX 2 -/* the max number of opened files */ -#define DFS_FD_MAX 4 +/* Using ROM file system */ +// #define RT_USING_DFS_ROMFS /* SECTION: lwip, a lighwight TCP/IP protocol stack */ /* #define RT_USING_LWIP */ @@ -151,4 +160,7 @@ #define CHECKSUM_GEN_IP 0 #define CHECKSUM_GEN_UDP 0 +/* RT_GDB_STUB */ +//#define RT_USING_GDB + #endif From 73d5acecba80316e717f8ecdc43526575dcfbe0c Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Tue, 20 Jan 2015 07:24:49 +0000 Subject: [PATCH 05/14] [DeviceDrivers] Add pin.h in the rtdevice.h --- components/drivers/include/rtdevice.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/components/drivers/include/rtdevice.h b/components/drivers/include/rtdevice.h index dc9761032e..bb01da2d12 100644 --- a/components/drivers/include/rtdevice.h +++ b/components/drivers/include/rtdevice.h @@ -358,5 +358,9 @@ rt_inline void rt_work_init(struct rt_work* work, void (*work_func)(struct rt_wo #include "drivers/watchdog.h" #endif +#ifdef RT_USING_PIN +#include "drivers/pin.h" +#endif + #endif /* __RT_DEVICE_H__ */ From 2b7600bdf3ed3a00e191e873f21f59419860d981 Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Tue, 20 Jan 2015 15:52:39 +0800 Subject: [PATCH 06/14] [BSP] update MDK project file for STM32F4 --- bsp/stm32f40x/SConstruct | 7 +- bsp/stm32f40x/project.uvproj | 378 ++++++++++++++++++++--------------- bsp/stm32f40x/rtconfig.py | 10 +- 3 files changed, 226 insertions(+), 169 deletions(-) diff --git a/bsp/stm32f40x/SConstruct b/bsp/stm32f40x/SConstruct index a58e07aa4b..99c2876aab 100644 --- a/bsp/stm32f40x/SConstruct +++ b/bsp/stm32f40x/SConstruct @@ -8,7 +8,12 @@ else: RTT_ROOT = os.path.normpath(os.getcwd() + '/../..') sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] -from building import * +try: + from building import * +except: + print 'Cannot found RT-Thread root directory, please check RTT_ROOT' + print RTT_ROOT + exit(-1) TARGET = 'rtthread-stm32f4xx.' + rtconfig.TARGET_EXT diff --git a/bsp/stm32f40x/project.uvproj b/bsp/stm32f40x/project.uvproj index a2734d98af..85c434a0e9 100644 --- a/bsp/stm32f40x/project.uvproj +++ b/bsp/stm32f40x/project.uvproj @@ -343,7 +343,7 @@ USE_STDPERIPH_DRIVER - .;..\..\components\finsh;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m4;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;Libraries\CMSIS\Include;Libraries\CMSIS\ST\STM32F4xx\Include;Libraries\STM32F4xx_StdPeriph_Driver\inc;applications;drivers + applications;.;Libraries/STM32F4xx_StdPeriph_Driver/inc;Libraries/CMSIS/ST/STM32F4xx/Include;Libraries/CMSIS/Include;drivers;../../include;../../libcpu/arm/cortex-m4;../../libcpu/arm/common;../../components/finsh;../../components/drivers/include;../../components/drivers/include;../../components/drivers/include @@ -386,45 +386,14 @@ application.c 1 - applications\application.c + applications/application.c startup.c 1 - applications\startup.c - - - - - Drivers - - - board.c - 1 - drivers\board.c - - - - - serial.c - 1 - drivers\serial.c - - - - - stm32f4xx_it.c - 1 - drivers\stm32f4xx_it.c - - - - - usart.c - 1 - drivers\usart.c + applications/startup.c @@ -434,231 +403,255 @@ system_stm32f4xx.c 1 - Libraries\CMSIS\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c + Libraries/CMSIS/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c misc.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\misc.c + Libraries/STM32F4xx_StdPeriph_Driver/src/misc.c stm32f4xx_adc.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_adc.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_adc.c stm32f4xx_can.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_can.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_can.c stm32f4xx_crc.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_crc.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_crc.c stm32f4xx_cryp.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_cryp.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp.c stm32f4xx_cryp_aes.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_cryp_aes.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_aes.c stm32f4xx_cryp_des.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_cryp_des.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_des.c stm32f4xx_cryp_tdes.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_cryp_tdes.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_tdes.c stm32f4xx_dac.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_dac.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dac.c stm32f4xx_dbgmcu.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_dbgmcu.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dbgmcu.c stm32f4xx_dcmi.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_dcmi.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dcmi.c stm32f4xx_dma.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_dma.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dma.c stm32f4xx_exti.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_exti.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_exti.c stm32f4xx_flash.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_flash.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash.c stm32f4xx_fsmc.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_fsmc.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_fsmc.c stm32f4xx_gpio.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_gpio.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_gpio.c stm32f4xx_hash.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_hash.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash.c stm32f4xx_hash_md5.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_hash_md5.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_md5.c stm32f4xx_hash_sha1.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_hash_sha1.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_sha1.c stm32f4xx_i2c.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_i2c.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_i2c.c stm32f4xx_iwdg.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_iwdg.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_iwdg.c stm32f4xx_pwr.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_pwr.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_pwr.c stm32f4xx_rcc.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_rcc.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rcc.c stm32f4xx_rng.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_rng.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rng.c stm32f4xx_rtc.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_rtc.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rtc.c stm32f4xx_sdio.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_sdio.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_sdio.c stm32f4xx_spi.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_spi.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_spi.c stm32f4xx_syscfg.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_syscfg.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_syscfg.c stm32f4xx_tim.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_tim.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_tim.c stm32f4xx_usart.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_usart.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_usart.c stm32f4xx_wwdg.c 1 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_wwdg.c + Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_wwdg.c startup_stm32f4xx.s 2 - Libraries\CMSIS\ST\STM32F4xx\Source\Templates\arm\startup_stm32f4xx.s + Libraries/CMSIS/ST/STM32F4xx/Source/Templates/arm/startup_stm32f4xx.s + + + + + Drivers + + + board.c + 1 + drivers/board.c + + + + + stm32f4xx_it.c + 1 + drivers/stm32f4xx_it.c + + + + + usart.c + 1 + drivers/usart.c @@ -668,84 +661,84 @@ clock.c 1 - ..\..\src\clock.c + ../../src/clock.c device.c 1 - ..\..\src\device.c + ../../src/device.c idle.c 1 - ..\..\src\idle.c + ../../src/idle.c ipc.c 1 - ..\..\src\ipc.c + ../../src/ipc.c irq.c 1 - ..\..\src\irq.c + ../../src/irq.c kservice.c 1 - ..\..\src\kservice.c + ../../src/kservice.c mem.c 1 - ..\..\src\mem.c + ../../src/mem.c mempool.c 1 - ..\..\src\mempool.c + ../../src/mempool.c object.c 1 - ..\..\src\object.c + ../../src/object.c scheduler.c 1 - ..\..\src\scheduler.c + ../../src/scheduler.c thread.c 1 - ..\..\src\thread.c + ../../src/thread.c timer.c 1 - ..\..\src\timer.c + ../../src/timer.c @@ -755,129 +748,188 @@ cpuport.c 1 - ..\..\libcpu\arm\cortex-m4\cpuport.c + ../../libcpu/arm/cortex-m4/cpuport.c context_rvds.S 2 - ..\..\libcpu\arm\cortex-m4\context_rvds.S + ../../libcpu/arm/cortex-m4/context_rvds.S backtrace.c 1 - ..\..\libcpu\arm\common\backtrace.c + ../../libcpu/arm/common/backtrace.c div0.c 1 - ..\..\libcpu\arm\common\div0.c + ../../libcpu/arm/common/div0.c showmem.c 1 - ..\..\libcpu\arm\common\showmem.c + ../../libcpu/arm/common/showmem.c finsh - - - cmd.c - 1 - ..\..\components\finsh\cmd.c - - - - - finsh_compiler.c - 1 - ..\..\components\finsh\finsh_compiler.c - - - - - finsh_error.c - 1 - ..\..\components\finsh\finsh_error.c - - - - - finsh_heap.c - 1 - ..\..\components\finsh\finsh_heap.c - - - - - finsh_init.c - 1 - ..\..\components\finsh\finsh_init.c - - - - - finsh_node.c - 1 - ..\..\components\finsh\finsh_node.c - - - - - finsh_ops.c - 1 - ..\..\components\finsh\finsh_ops.c - - - - - finsh_parser.c - 1 - ..\..\components\finsh\finsh_parser.c - - - - - finsh_token.c - 1 - ..\..\components\finsh\finsh_token.c - - - - - finsh_var.c - 1 - ..\..\components\finsh\finsh_var.c - - - - - finsh_vm.c - 1 - ..\..\components\finsh\finsh_vm.c - - shell.c 1 - ..\..\components\finsh\shell.c + ../../components/finsh/shell.c symbol.c 1 - ..\..\components\finsh\symbol.c + ../../components/finsh/symbol.c + + + + + cmd.c + 1 + ../../components/finsh/cmd.c + + + + + finsh_compiler.c + 1 + ../../components/finsh/finsh_compiler.c + + + + + finsh_error.c + 1 + ../../components/finsh/finsh_error.c + + + + + finsh_heap.c + 1 + ../../components/finsh/finsh_heap.c + + + + + finsh_init.c + 1 + ../../components/finsh/finsh_init.c + + + + + finsh_node.c + 1 + ../../components/finsh/finsh_node.c + + + + + finsh_ops.c + 1 + ../../components/finsh/finsh_ops.c + + + + + finsh_parser.c + 1 + ../../components/finsh/finsh_parser.c + + + + + finsh_var.c + 1 + ../../components/finsh/finsh_var.c + + + + + finsh_vm.c + 1 + ../../components/finsh/finsh_vm.c + + + + + finsh_token.c + 1 + ../../components/finsh/finsh_token.c + + + + + DeviceDrivers + + + serial.c + 1 + ../../components/drivers/serial/serial.c + + + + + pin.c + 1 + ../../components/drivers/misc/pin.c + + + + + completion.c + 1 + ../../components/drivers/src/completion.c + + + + + dataqueue.c + 1 + ../../components/drivers/src/dataqueue.c + + + + + pipe.c + 1 + ../../components/drivers/src/pipe.c + + + + + portal.c + 1 + ../../components/drivers/src/portal.c + + + + + ringbuffer.c + 1 + ../../components/drivers/src/ringbuffer.c + + + + + workqueue.c + 1 + ../../components/drivers/src/workqueue.c diff --git a/bsp/stm32f40x/rtconfig.py b/bsp/stm32f40x/rtconfig.py index d22162626d..d1f081370e 100644 --- a/bsp/stm32f40x/rtconfig.py +++ b/bsp/stm32f40x/rtconfig.py @@ -6,16 +6,16 @@ CPU='cortex-m4' CROSS_TOOL='keil' if os.getenv('RTT_CC'): - CROSS_TOOL = os.getenv('RTT_CC') + CROSS_TOOL = os.getenv('RTT_CC') # cross_tool provides the cross compiler # EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR if CROSS_TOOL == 'gcc': - PLATFORM = 'gcc' - EXEC_PATH = r'E:/Program Files/CodeSourcery/Sourcery G++ Lite/bin' + PLATFORM = 'gcc' + EXEC_PATH = r'E:/Program Files/CodeSourcery/Sourcery G++ Lite/bin' elif CROSS_TOOL == 'keil': - PLATFORM = 'armcc' - EXEC_PATH = r'C:/Keil' + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil' elif CROSS_TOOL == 'iar': print '================ERROR============================' print 'Not support iar yet!' From 9261c37e0eefb193f0cce95b209ac66fbcb0dddc Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Tue, 20 Jan 2015 07:55:52 +0000 Subject: [PATCH 07/14] [BSP] Add GPIO driver for STM32F4 --- bsp/stm32f40x/drivers/gpio.c | 213 +++++++++++++++++++++++++++++++++++ bsp/stm32f40x/drivers/gpio.h | 19 ++++ 2 files changed, 232 insertions(+) create mode 100644 bsp/stm32f40x/drivers/gpio.c create mode 100644 bsp/stm32f40x/drivers/gpio.h diff --git a/bsp/stm32f40x/drivers/gpio.c b/bsp/stm32f40x/drivers/gpio.c new file mode 100644 index 0000000000..ff52e53fdf --- /dev/null +++ b/bsp/stm32f40x/drivers/gpio.c @@ -0,0 +1,213 @@ +/* + * File : gpio.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2015, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2015-01-05 Bernard the first version + */ + +#include +#include +#include + +#ifdef RT_USING_PIN + +/* STM32 GPIO driver */ +struct pin_index +{ + int index; + uint32_t rcc; + GPIO_TypeDef *gpio; + uint32_t pin; +}; + +static const struct pin_index pins[] = +{ + { 0, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_7}, + { 1, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_6}, + { 2, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_8}, + { 3, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_11}, + { 4, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_14}, + { 5, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_13}, + { 6, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_11}, + { 7, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_9}, + + { 8, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_12}, + { 9, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_13}, + {10, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_14}, + {11, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_15}, + {12, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_6}, + {13, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_5}, + + {14, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_8}, + {15, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_9}, + {16, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_5}, + {17, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_6}, + {18, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_6}, + {19, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_7}, + {20, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_9}, + {21, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_8}, + + {22, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_12}, + {23, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_2}, + {24, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_1}, + {25, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_0}, + {26, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_9}, + {27, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_13}, + {28, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_15}, + {29, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_12}, + {30, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_10}, + {31, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_8}, + {32, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_7}, + {33, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_4}, + {34, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_3}, + {35, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_2}, + {36, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_1}, + {37, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_0}, + {38, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_11}, + {39, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_10}, + {40, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_7}, + {41, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_3}, + {42, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_4}, + {43, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_8}, + {44, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_15}, + {45, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_14}, + {46, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_11}, + {47, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_5}, + {48, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_10}, + {49, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_15}, + {50, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_4}, + {51, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_7}, + {52, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_3}, + {53, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_4}, +}; + +#define ITEM_NUM(items) sizeof(items)/sizeof(items[0]) +const struct pin_index * get_pin(uint8_t pin) +{ + const struct pin_index* index; + + if(pin < ITEM_NUM(pins)) + { + index = &pins[pin]; + } + else + { + index = RT_NULL; + } + + return index; +}; + +void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) +{ + const struct pin_index *index; + + index = get_pin(pin); + if(index == RT_NULL) + { + return; + } + + if(value == PIN_LOW) + { + GPIO_ResetBits(index->gpio, index->pin); + } + else + { + GPIO_SetBits(index->gpio, index->pin); + } +} + +int stm32_pin_read(rt_device_t dev, rt_base_t pin) +{ + int value; + const struct pin_index *index; + + value = PIN_LOW; + + index = get_pin(pin); + if(index == RT_NULL) + { + return value; + } + + if(GPIO_ReadInputDataBit(index->gpio, index->pin) == Bit_RESET) + { + value = PIN_LOW; + } + else + { + value = PIN_HIGH; + } + + return value; +} + +void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) +{ + const struct pin_index *index; + GPIO_InitTypeDef GPIO_InitStructure; + + index = get_pin(pin); + if(index == RT_NULL) + { + return; + } + + /* GPIO Periph clock enable */ + RCC_AHB1PeriphClockCmd(index->rcc, ENABLE); + + /* Configure GPIO_InitStructure */ + GPIO_InitStructure.GPIO_Pin = index->pin; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + + if(mode == PIN_MODE_OUTPUT) + { + /* output setting */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + } + else if(mode == PIN_MODE_INPUT) + { + /* input setting: not pull. */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + } + else if(mode == PIN_MODE_INPUT_PULLUP) + { + /* input setting: pull up. */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + } + else + { + /* input setting:default. */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN; + } + GPIO_Init(index->gpio, &GPIO_InitStructure); +} + +const static struct rt_pin_ops _stm32_pin_ops = +{ + stm32_pin_mode, + stm32_pin_write, + stm32_pin_read, +}; + +int stm32_hw_pin_init(void) +{ + rt_device_pin_register("pin", &_stm32_pin_ops, RT_NULL); + return 0; +} +INIT_BOARD_EXPORT(stm32_hw_pin_init); + +#endif diff --git a/bsp/stm32f40x/drivers/gpio.h b/bsp/stm32f40x/drivers/gpio.h new file mode 100644 index 0000000000..a4947b100d --- /dev/null +++ b/bsp/stm32f40x/drivers/gpio.h @@ -0,0 +1,19 @@ +/* + * File : gpio.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2015, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2015-01-05 Bernard the first version + */ +#ifndef GPIO_H__ +#define GPIO_H__ + +int stm32_hw_pin_init(void); + +#endif From bff1bb3d7b0359d2e6ddeb0354e8a01d3e6175c6 Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Tue, 20 Jan 2015 15:58:37 +0800 Subject: [PATCH 08/14] [BSP] update MDK project file for STM32F4 --- bsp/stm32f40x/project.uvopt | 1206 ---------------------------------- bsp/stm32f40x/project.uvproj | 7 + 2 files changed, 7 insertions(+), 1206 deletions(-) delete mode 100644 bsp/stm32f40x/project.uvopt diff --git a/bsp/stm32f40x/project.uvopt b/bsp/stm32f40x/project.uvopt deleted file mode 100644 index 9661193e93..0000000000 --- a/bsp/stm32f40x/project.uvopt +++ /dev/null @@ -1,1206 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
- - - *.c - *.s*; *.src; *.a* - *.obj - *.lib - *.txt; *.h; *.inc - *.plm - *.cpp - - - - 0 - 0 - - - - rt-thread - 0x4 - ARM-ADS - - 25000000 - - 1 - 1 - 1 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 79 - 66 - 8 - .\build\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 1 - 0 - 1 - - 0 - - SARMCM3.DLL - -MPU - DCM.DLL - -pCM4 - SARMCM3.DLL - -MPU - TCM.DLL - -pCM4 - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 0 - 0 - 8 - - - - - - - - - - - STLink\ST-LINKIII-KEIL.dll - - - - 0 - DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) - - - 0 - ARMDBGFLAGS - - - - 0 - ST-LINKIII-KEIL - -S - - - - - 0 - 1 - f_var1 - - - 1 - 1 - f_var2 - - - 2 - 1 - f_var3 - - - 3 - 1 - f_var4 - - - - - 0 - 2 - f_var2 - - - - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - Applications - 0 - 0 - 0 - - 1 - 1 - 1 - 0 - 0 - 32 - 0 - 82 - 96 - 0 - applications\application.c - application.c - - - 1 - 2 - 1 - 0 - 0 - 0 - 0 - 107 - 114 - 0 - applications\startup.c - startup.c - - - - - Drivers - 0 - 0 - 0 - - 2 - 3 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - drivers\board.c - board.c - - - 2 - 4 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - drivers\serial.c - serial.c - - - 2 - 5 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - drivers\stm32f4xx_it.c - stm32f4xx_it.c - - - 2 - 6 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - drivers\usart.c - usart.c - - - - - STM32_StdPeriph - 0 - 0 - 0 - - 3 - 7 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\CMSIS\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c - system_stm32f4xx.c - - - 3 - 8 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\misc.c - misc.c - - - 3 - 9 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_adc.c - stm32f4xx_adc.c - - - 3 - 10 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_can.c - stm32f4xx_can.c - - - 3 - 11 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_crc.c - stm32f4xx_crc.c - - - 3 - 12 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_cryp.c - stm32f4xx_cryp.c - - - 3 - 13 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_cryp_aes.c - stm32f4xx_cryp_aes.c - - - 3 - 14 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_cryp_des.c - stm32f4xx_cryp_des.c - - - 3 - 15 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_cryp_tdes.c - stm32f4xx_cryp_tdes.c - - - 3 - 16 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_dac.c - stm32f4xx_dac.c - - - 3 - 17 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_dbgmcu.c - stm32f4xx_dbgmcu.c - - - 3 - 18 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_dcmi.c - stm32f4xx_dcmi.c - - - 3 - 19 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_dma.c - stm32f4xx_dma.c - - - 3 - 20 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_exti.c - stm32f4xx_exti.c - - - 3 - 21 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_flash.c - stm32f4xx_flash.c - - - 3 - 22 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_fsmc.c - stm32f4xx_fsmc.c - - - 3 - 23 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_gpio.c - stm32f4xx_gpio.c - - - 3 - 24 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_hash.c - stm32f4xx_hash.c - - - 3 - 25 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_hash_md5.c - stm32f4xx_hash_md5.c - - - 3 - 26 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_hash_sha1.c - stm32f4xx_hash_sha1.c - - - 3 - 27 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_i2c.c - stm32f4xx_i2c.c - - - 3 - 28 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_iwdg.c - stm32f4xx_iwdg.c - - - 3 - 29 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_pwr.c - stm32f4xx_pwr.c - - - 3 - 30 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_rcc.c - stm32f4xx_rcc.c - - - 3 - 31 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_rng.c - stm32f4xx_rng.c - - - 3 - 32 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_rtc.c - stm32f4xx_rtc.c - - - 3 - 33 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_sdio.c - stm32f4xx_sdio.c - - - 3 - 34 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_spi.c - stm32f4xx_spi.c - - - 3 - 35 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_syscfg.c - stm32f4xx_syscfg.c - - - 3 - 36 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_tim.c - stm32f4xx_tim.c - - - 3 - 37 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_usart.c - stm32f4xx_usart.c - - - 3 - 38 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_wwdg.c - stm32f4xx_wwdg.c - - - 3 - 39 - 2 - 0 - 0 - 0 - 0 - 173 - 173 - 0 - Libraries\CMSIS\ST\STM32F4xx\Source\Templates\arm\startup_stm32f4xx.s - startup_stm32f4xx.s - - - - - Kernel - 0 - 0 - 0 - - 4 - 40 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\clock.c - clock.c - - - 4 - 41 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\device.c - device.c - - - 4 - 42 - 1 - 0 - 0 - 0 - 0 - 149 - 156 - 0 - ..\..\src\idle.c - idle.c - - - 4 - 43 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\ipc.c - ipc.c - - - 4 - 44 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\irq.c - irq.c - - - 4 - 45 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\kservice.c - kservice.c - - - 4 - 46 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\mem.c - mem.c - - - 4 - 47 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\mempool.c - mempool.c - - - 4 - 48 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\object.c - object.c - - - 4 - 49 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\scheduler.c - scheduler.c - - - 4 - 50 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\thread.c - thread.c - - - 4 - 51 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\timer.c - timer.c - - - - - CORTEX-M4 - 0 - 0 - 0 - - 5 - 52 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\cortex-m4\cpuport.c - cpuport.c - - - 5 - 53 - 2 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\cortex-m4\context_rvds.S - context_rvds.S - - - 5 - 54 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\common\backtrace.c - backtrace.c - - - 5 - 55 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\common\div0.c - div0.c - - - 5 - 56 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\common\showmem.c - showmem.c - - - - - finsh - 0 - 0 - 0 - - 6 - 57 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\cmd.c - cmd.c - - - 6 - 58 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\finsh_compiler.c - finsh_compiler.c - - - 6 - 59 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\finsh_error.c - finsh_error.c - - - 6 - 60 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\finsh_heap.c - finsh_heap.c - - - 6 - 61 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\finsh_init.c - finsh_init.c - - - 6 - 62 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\finsh_node.c - finsh_node.c - - - 6 - 63 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\finsh_ops.c - finsh_ops.c - - - 6 - 64 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\finsh_parser.c - finsh_parser.c - - - 6 - 65 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\finsh_token.c - finsh_token.c - - - 6 - 66 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\finsh_var.c - finsh_var.c - - - 6 - 67 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\finsh_vm.c - finsh_vm.c - - - 6 - 68 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\shell.c - shell.c - - - 6 - 69 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\components\finsh\symbol.c - symbol.c - - - - diff --git a/bsp/stm32f40x/project.uvproj b/bsp/stm32f40x/project.uvproj index 85c434a0e9..da6c71a151 100644 --- a/bsp/stm32f40x/project.uvproj +++ b/bsp/stm32f40x/project.uvproj @@ -640,6 +640,13 @@ drivers/board.c + + + gpio.c + 1 + drivers/gpio.c + + stm32f4xx_it.c From 756f2c67ab86f41309671546fb54e1ac7434aa77 Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Tue, 20 Jan 2015 16:02:33 +0800 Subject: [PATCH 09/14] [BSP] rename the rt_hw_usart_init to stm32_hw_usart_init --- bsp/stm32f40x/drivers/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/stm32f40x/drivers/board.c b/bsp/stm32f40x/drivers/board.c index 8f2c5b4e1d..ba46e903ea 100644 --- a/bsp/stm32f40x/drivers/board.c +++ b/bsp/stm32f40x/drivers/board.c @@ -93,7 +93,7 @@ void rt_hw_board_init() /* Configure the SysTick */ SysTick_Configuration(); - rt_hw_usart_init(); + stm32_hw_usart_init(); stm32_hw_pin_init(); #ifdef RT_USING_CONSOLE From 86358d08302559d4787e314e3384ad8f3ce5f927 Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Wed, 21 Jan 2015 12:36:34 +0800 Subject: [PATCH 10/14] [BSP] code cleanup for usart and gpio driver in STM32F4 --- bsp/stm32f40x/drivers/gpio.c | 26 +++++++++--------- bsp/stm32f40x/drivers/usart.c | 50 +++++++++++++++++------------------ 2 files changed, 38 insertions(+), 38 deletions(-) diff --git a/bsp/stm32f40x/drivers/gpio.c b/bsp/stm32f40x/drivers/gpio.c index ff52e53fdf..88819f73b5 100644 --- a/bsp/stm32f40x/drivers/gpio.c +++ b/bsp/stm32f40x/drivers/gpio.c @@ -88,12 +88,12 @@ static const struct pin_index pins[] = {53, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_4}, }; -#define ITEM_NUM(items) sizeof(items)/sizeof(items[0]) -const struct pin_index * get_pin(uint8_t pin) +#define ITEM_NUM(items) sizeof(items)/sizeof(items[0]) +const struct pin_index *get_pin(uint8_t pin) { - const struct pin_index* index; + const struct pin_index *index; - if(pin < ITEM_NUM(pins)) + if (pin < ITEM_NUM(pins)) { index = &pins[pin]; } @@ -110,12 +110,12 @@ void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) const struct pin_index *index; index = get_pin(pin); - if(index == RT_NULL) + if (index == RT_NULL) { return; } - if(value == PIN_LOW) + if (value == PIN_LOW) { GPIO_ResetBits(index->gpio, index->pin); } @@ -133,12 +133,12 @@ int stm32_pin_read(rt_device_t dev, rt_base_t pin) value = PIN_LOW; index = get_pin(pin); - if(index == RT_NULL) + if (index == RT_NULL) { return value; } - if(GPIO_ReadInputDataBit(index->gpio, index->pin) == Bit_RESET) + if (GPIO_ReadInputDataBit(index->gpio, index->pin) == Bit_RESET) { value = PIN_LOW; } @@ -156,7 +156,7 @@ void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) GPIO_InitTypeDef GPIO_InitStructure; index = get_pin(pin); - if(index == RT_NULL) + if (index == RT_NULL) { return; } @@ -169,19 +169,19 @@ void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; - if(mode == PIN_MODE_OUTPUT) + if (mode == PIN_MODE_OUTPUT) { /* output setting */ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; } - else if(mode == PIN_MODE_INPUT) + else if (mode == PIN_MODE_INPUT) { /* input setting: not pull. */ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; } - else if(mode == PIN_MODE_INPUT_PULLUP) + else if (mode == PIN_MODE_INPUT_PULLUP) { /* input setting: pull up. */ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; @@ -196,7 +196,7 @@ void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) GPIO_Init(index->gpio, &GPIO_InitStructure); } -const static struct rt_pin_ops _stm32_pin_ops = +const static struct rt_pin_ops _stm32_pin_ops = { stm32_pin_mode, stm32_pin_write, diff --git a/bsp/stm32f40x/drivers/usart.c b/bsp/stm32f40x/drivers/usart.c index 294b8af0fe..24e834a789 100644 --- a/bsp/stm32f40x/drivers/usart.c +++ b/bsp/stm32f40x/drivers/usart.c @@ -22,25 +22,25 @@ #include /* UART GPIO define. */ -#define UART1_GPIO_TX GPIO_Pin_6 +#define UART1_GPIO_TX GPIO_Pin_6 #define UART1_TX_PIN_SOURCE GPIO_PinSource6 -#define UART1_GPIO_RX GPIO_Pin_7 +#define UART1_GPIO_RX GPIO_Pin_7 #define UART1_RX_PIN_SOURCE GPIO_PinSource7 -#define UART1_GPIO GPIOB +#define UART1_GPIO GPIOB #define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB -#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 -#define UART1_TX_DMA DMA1_Channel4 -#define UART1_RX_DMA DMA1_Channel5 +#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 +#define UART1_TX_DMA DMA1_Channel4 +#define UART1_RX_DMA DMA1_Channel5 -#define UART2_GPIO_TX GPIO_Pin_2 +#define UART2_GPIO_TX GPIO_Pin_2 #define UART2_TX_PIN_SOURCE GPIO_PinSource2 -#define UART2_GPIO_RX GPIO_Pin_3 +#define UART2_GPIO_RX GPIO_Pin_3 #define UART2_RX_PIN_SOURCE GPIO_PinSource3 -#define UART2_GPIO GPIOA +#define UART2_GPIO GPIOA #define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA -#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 -#define UART2_TX_DMA DMA1_Channel4 -#define UART2_RX_DMA DMA1_Channel5 +#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 +#define UART2_TX_DMA DMA1_Channel4 +#define UART2_RX_DMA DMA1_Channel5 #define UART3_GPIO_TX GPIO_Pin_8 #define UART3_TX_PIN_SOURCE GPIO_PinSource8 @@ -55,13 +55,13 @@ /* STM32 uart driver */ struct stm32_uart { - USART_TypeDef* uart_device; + USART_TypeDef *uart_device; IRQn_Type irq; }; static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { - struct stm32_uart* uart; + struct stm32_uart *uart; USART_InitTypeDef USART_InitStructure; RT_ASSERT(serial != RT_NULL); @@ -97,7 +97,7 @@ static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_c static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg) { - struct stm32_uart* uart; + struct stm32_uart *uart; RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; @@ -119,7 +119,7 @@ static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *ar static int stm32_putc(struct rt_serial_device *serial, char c) { - struct stm32_uart* uart; + struct stm32_uart *uart; RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; @@ -133,7 +133,7 @@ static int stm32_putc(struct rt_serial_device *serial, char c) static int stm32_getc(struct rt_serial_device *serial) { int ch; - struct stm32_uart* uart; + struct stm32_uart *uart; RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; @@ -166,13 +166,13 @@ struct rt_serial_device serial1; void USART1_IRQHandler(void) { - struct stm32_uart* uart; + struct stm32_uart *uart; uart = &uart1; /* enter interrupt */ rt_interrupt_enter(); - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) { rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND); /* clear interrupt */ @@ -200,13 +200,13 @@ struct rt_serial_device serial2; void USART2_IRQHandler(void) { - struct stm32_uart* uart; + struct stm32_uart *uart; uart = &uart2; /* enter interrupt */ rt_interrupt_enter(); - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) { rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND); /* clear interrupt */ @@ -234,13 +234,13 @@ struct rt_serial_device serial3; void USART3_IRQHandler(void) { - struct stm32_uart* uart; + struct stm32_uart *uart; uart = &uart3; /* enter interrupt */ rt_interrupt_enter(); - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) { rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND); /* clear interrupt */ @@ -321,7 +321,7 @@ static void GPIO_Configuration(void) #endif /* RT_USING_UART3 */ } -static void NVIC_Configuration(struct stm32_uart* uart) +static void NVIC_Configuration(struct stm32_uart *uart) { NVIC_InitTypeDef NVIC_InitStructure; @@ -335,7 +335,7 @@ static void NVIC_Configuration(struct stm32_uart* uart) int stm32_hw_usart_init(void) { - struct stm32_uart* uart; + struct stm32_uart *uart; struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; RCC_Configuration(); From c1f47af9f14f9e5fa346a4ed8c52fd0c83e1b0fd Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Wed, 21 Jan 2015 14:17:36 +0800 Subject: [PATCH 11/14] [BSP] remove RT_USING_VMM in default and let it run in QEMU. --- bsp/realview-a8/SConstruct | 8 +++++-- bsp/realview-a8/applications/application.c | 26 +++++----------------- bsp/realview-a8/drivers/board.c | 8 +++---- bsp/realview-a8/drivers/serial.c | 8 +++---- bsp/realview-a8/rtconfig.h | 6 ++--- bsp/realview-a8/rtconfig.py | 7 +----- 6 files changed, 24 insertions(+), 39 deletions(-) diff --git a/bsp/realview-a8/SConstruct b/bsp/realview-a8/SConstruct index e67d72291f..6d57bc4025 100644 --- a/bsp/realview-a8/SConstruct +++ b/bsp/realview-a8/SConstruct @@ -31,8 +31,12 @@ if GetDepend('RT_USING_VMM'): ldfile = rtconfig.LINK_SCRIPT)) != 0: print 'failed to generate linker script %s' % rtconfig.LINK_SCRIPT sys.exit(255) -# if the linker script changed, relink the target -Depends(TARGET, rtconfig.LINK_SCRIPT) + # if the linker script changed, relink the target + Depends(TARGET, rtconfig.LINK_SCRIPT) +else: + # we should use none-vmm link script + link_flags = str(env['LINKFLAGS']) + env['LINKFLAGS'] = link_flags.replace('_vmm.lds', '.lds') # make a building DoBuilding(TARGET, objs) diff --git a/bsp/realview-a8/applications/application.c b/bsp/realview-a8/applications/application.c index e65878bce5..1b7cb790a3 100644 --- a/bsp/realview-a8/applications/application.c +++ b/bsp/realview-a8/applications/application.c @@ -15,32 +15,18 @@ #include #include -#include - -void *test_task(void *parameter) +void init_thread(void* parameter) { - int count = 0; - - while (1) - { - rt_thread_delay(RT_TICK_PER_SECOND); - rt_kprintf("count = %d\n", count ++); - } - - return RT_NULL; + rt_components_init(); } int rt_application_init() { - // pthread_t tid; + rt_thread_t tid; - /* do component initialization */ - rt_components_init(); -#ifdef RT_USING_NEWLIB - libc_system_init(RT_CONSOLE_DEVICE_NAME); -#endif - - // pthread_create(&tid, RT_NULL, test_task, RT_NULL); + tid = rt_thread_create("init", init_thread, RT_NULL, + 1024, RT_THREAD_PRIORITY_MAX/3, 10); + if (tid != RT_NULL) rt_thread_startup(tid); return 0; } diff --git a/bsp/realview-a8/drivers/board.c b/bsp/realview-a8/drivers/board.c index 8312a4e85f..fd64075456 100644 --- a/bsp/realview-a8/drivers/board.c +++ b/bsp/realview-a8/drivers/board.c @@ -38,11 +38,11 @@ #define SYS_CTRL __REG32(REALVIEW_SCTL_BASE) #ifdef RT_USING_VMM - #include - static rt_uint32_t timer_hw_base = 0; - #define TIMER_HW_BASE (timer_hw_base) +#include +static rt_uint32_t timer_hw_base = 0; +#define TIMER_HW_BASE (timer_hw_base) #else - #define TIMER_HW_BASE REALVIEW_TIMER2_3_BASE +#define TIMER_HW_BASE REALVIEW_TIMER2_3_BASE #endif void rt_hw_timer_ack(void) diff --git a/bsp/realview-a8/drivers/serial.c b/bsp/realview-a8/drivers/serial.c index 011d10fb99..7df953a282 100644 --- a/bsp/realview-a8/drivers/serial.c +++ b/bsp/realview-a8/drivers/serial.c @@ -32,7 +32,7 @@ #include "serial.h" #ifdef RT_USING_VMM - #include +#include #endif struct hw_uart_device @@ -165,8 +165,8 @@ int rt_hw_uart_init(void) config.parity = PARITY_NONE; config.stop_bits = STOP_BITS_1; config.invert = NRZ_NORMAL; - config.bufsz = RT_SERIAL_RB_BUFSZ; - + config.bufsz = RT_SERIAL_RB_BUFSZ; + #ifdef RT_USING_UART0 uart = &_uart0_device; #ifdef RT_USING_VMM @@ -194,7 +194,7 @@ int rt_hw_uart_init(void) /* register UART1 device */ rt_hw_serial_register(&_serial1, "uart1", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); /* enable Rx and Tx of UART */ UART_CR(uart->hw_base) = (1 << 0) | (1 << 8) | (1 << 9); #endif diff --git a/bsp/realview-a8/rtconfig.h b/bsp/realview-a8/rtconfig.h index b32ae454ce..9ef916998e 100644 --- a/bsp/realview-a8/rtconfig.h +++ b/bsp/realview-a8/rtconfig.h @@ -107,8 +107,8 @@ // //
-// -#define RT_USING_NEWLIB +// +#define RT_USING_LIBC // #define RT_USING_PTHREADS //
@@ -147,7 +147,7 @@ #define RT_USING_LOGTRACE //
-#define RT_USING_VMM +// #define RT_USING_VMM //
#endif diff --git a/bsp/realview-a8/rtconfig.py b/bsp/realview-a8/rtconfig.py index 85f36831b3..f921c68217 100644 --- a/bsp/realview-a8/rtconfig.py +++ b/bsp/realview-a8/rtconfig.py @@ -21,8 +21,6 @@ if os.getenv('RTT_EXEC_PATH'): EXEC_PATH = os.getenv('RTT_EXEC_PATH') BUILD = 'debug' -VMM = True -#VMM = False if PLATFORM == 'gcc': # toolchains @@ -40,10 +38,7 @@ if PLATFORM == 'gcc': DEVICE = ' -march=armv7-a -mtune=cortex-a8 -mfpu=vfpv3-d16 -ftree-vectorize -ffast-math -mfloat-abi=softfp' CFLAGS = DEVICE + ' -Wall' AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__' - if VMM: - LINK_SCRIPT = 'realview_vmm.lds' - else: - LINK_SCRIPT = 'realview.lds' + LINK_SCRIPT = 'realview_vmm.lds' LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=realview.map,-cref,-u,system_vectors'+\ ' -T %s' % LINK_SCRIPT From b83b1ee53dd053487a38472bd946a8d66fe3f472 Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Wed, 21 Jan 2015 14:19:01 +0800 Subject: [PATCH 12/14] [Kernel] Change the copyright date information --- src/kservice.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/kservice.c b/src/kservice.c index fef284e8af..b5dc92b091 100644 --- a/src/kservice.c +++ b/src/kservice.c @@ -513,7 +513,7 @@ void rt_show_version(void) rt_kprintf("- RT - Thread Operating System\n"); rt_kprintf(" / | \\ %d.%d.%d build %s\n", RT_VERSION, RT_SUBVERSION, RT_REVISION, __DATE__); - rt_kprintf(" 2006 - 2013 Copyright by rt-thread team\n"); + rt_kprintf(" 2006 - 2015 Copyright by rt-thread team\n"); } RTM_EXPORT(rt_show_version); From 950c3a4298e57f25ef1ca6b044f67010936db1e8 Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Fri, 23 Jan 2015 14:34:09 +0800 Subject: [PATCH 13/14] [Tools] Add copyright information for scons script files --- tools/building.py | 24 ++++++++++++++++++++++++ tools/codeblocks.py | 24 ++++++++++++++++++++++++ tools/cscope.py | 24 ++++++++++++++++++++++++ tools/iar.py | 24 ++++++++++++++++++++++++ tools/keil.py | 24 ++++++++++++++++++++++++ tools/sconsui.py | 24 ++++++++++++++++++++++++ tools/ua.py | 24 ++++++++++++++++++++++++ tools/utils.py | 24 ++++++++++++++++++++++++ tools/vs.py | 24 ++++++++++++++++++++++++ tools/vs2012.py | 24 ++++++++++++++++++++++++ tools/win32spawn.py | 24 ++++++++++++++++++++++++ tools/wizard.py | 24 ++++++++++++++++++++++++ 12 files changed, 288 insertions(+) diff --git a/tools/building.py b/tools/building.py index f12452ed7d..cafad2047a 100644 --- a/tools/building.py +++ b/tools/building.py @@ -1,3 +1,27 @@ +# +# File : building.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import os import sys import string diff --git a/tools/codeblocks.py b/tools/codeblocks.py index 78f9629cbb..cb07956e73 100644 --- a/tools/codeblocks.py +++ b/tools/codeblocks.py @@ -1,3 +1,27 @@ +# +# File : codeblocks.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import os import sys import string diff --git a/tools/cscope.py b/tools/cscope.py index 18568b4c35..daeda52f9d 100644 --- a/tools/cscope.py +++ b/tools/cscope.py @@ -1,3 +1,27 @@ +# +# File : cscope.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import os def _get_src(project): diff --git a/tools/iar.py b/tools/iar.py index 40b8408971..fda3fd8768 100644 --- a/tools/iar.py +++ b/tools/iar.py @@ -1,3 +1,27 @@ +# +# File : iar.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import os import sys import string diff --git a/tools/keil.py b/tools/keil.py index 8f8b926804..9d6b14b81a 100644 --- a/tools/keil.py +++ b/tools/keil.py @@ -1,3 +1,27 @@ +# +# File : keil.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import os import sys import string diff --git a/tools/sconsui.py b/tools/sconsui.py index eddccb49f4..3542c36278 100644 --- a/tools/sconsui.py +++ b/tools/sconsui.py @@ -1,6 +1,30 @@ #! /usr/bin/env python #coding=utf-8 +# +# File : sconsui.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import sys py2 = py30 = py31 = False diff --git a/tools/ua.py b/tools/ua.py index 19384c5eba..31d2641031 100644 --- a/tools/ua.py +++ b/tools/ua.py @@ -1,3 +1,27 @@ +# +# File : ua.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import os import sys from utils import _make_path_relative diff --git a/tools/utils.py b/tools/utils.py index d1b0944939..0fa8cc742e 100644 --- a/tools/utils.py +++ b/tools/utils.py @@ -1,3 +1,27 @@ +# +# File : utils.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import sys import os diff --git a/tools/vs.py b/tools/vs.py index 1dce0ddaa7..bd1c7a4b24 100644 --- a/tools/vs.py +++ b/tools/vs.py @@ -1,3 +1,27 @@ +# +# File : vs.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import os import sys import string diff --git a/tools/vs2012.py b/tools/vs2012.py index 3e751e940e..14da3dcace 100644 --- a/tools/vs2012.py +++ b/tools/vs2012.py @@ -1,3 +1,27 @@ +# +# File : vs2012.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import os import sys import string diff --git a/tools/win32spawn.py b/tools/win32spawn.py index 8adc64306b..9b878bf69f 100644 --- a/tools/win32spawn.py +++ b/tools/win32spawn.py @@ -1,3 +1,27 @@ +# +# File : win32spawn.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + import os import threading import Queue diff --git a/tools/wizard.py b/tools/wizard.py index 4b2186fadb..41e90775d8 100755 --- a/tools/wizard.py +++ b/tools/wizard.py @@ -1,6 +1,30 @@ #! /usr/bin/env python #coding=utf-8 +# +# File : wizard.py +# This file is part of RT-Thread RTOS +# COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Change Logs: +# Date Author Notes +# 2015-01-20 Bernard Add copyright information +# + """ wizard.py - a script to generate SConscript in RT-Thread RTOS. From 71930b0995370c05fc10dd58042d7ccaf1cc6f50 Mon Sep 17 00:00:00 2001 From: bernard Date: Sun, 25 Jan 2015 16:41:05 +0800 Subject: [PATCH 14/14] [BSP] Fix the interrupt issue in USART driver of STM32F4. --- bsp/stm32f40x/drivers/usart.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/bsp/stm32f40x/drivers/usart.c b/bsp/stm32f40x/drivers/usart.c index 24e834a789..2b21748ac2 100644 --- a/bsp/stm32f40x/drivers/usart.c +++ b/bsp/stm32f40x/drivers/usart.c @@ -89,8 +89,6 @@ static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_c /* Enable USART */ USART_Cmd(uart->uart_device, ENABLE); - /* enable interrupt */ - USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE); return RT_EOK; } @@ -107,10 +105,14 @@ static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *ar case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */ UART_DISABLE_IRQ(uart->irq); + /* disable interrupt */ + USART_ITConfig(uart->uart_device, USART_IT_RXNE, DISABLE); break; case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */ UART_ENABLE_IRQ(uart->irq); + /* enable interrupt */ + USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE); break; }