diff --git a/.github/workflows/action.yml b/.github/workflows/action.yml index ab48262224..2a5697964a 100644 --- a/.github/workflows/action.yml +++ b/.github/workflows/action.yml @@ -123,7 +123,6 @@ jobs: - {RTT_BSP: "swm320", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "swm320-lq100", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "beaglebone", RTT_TOOL_CHAIN: "sourcery-arm"} - - {RTT_BSP: "zynq7000", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "zynqmp-r5-axu4ev", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "frdm-k64f", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "fh8620", RTT_TOOL_CHAIN: "sourcery-arm"} diff --git a/Jenkinsfile b/Jenkinsfile index a106793bbb..0e4192003b 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -107,7 +107,6 @@ pipeline { ['stm32f20x', 'sourcery-arm'], ['swm320-lq100', 'sourcery-arm'], ['beaglebone', 'sourcery-arm'], - ['zynq7000', 'sourcery-arm'], ['frdm-k64f', 'sourcery-arm'], ['fh8620', 'sourcery-arm'], ['xplorer4330/M4', 'sourcery-arm'], diff --git a/bsp/allwinner_tina/applications/main.c b/bsp/allwinner_tina/applications/main.c index 7aaf1f8db3..e974c71ec2 100644 --- a/bsp/allwinner_tina/applications/main.c +++ b/bsp/allwinner_tina/applications/main.c @@ -1,21 +1,7 @@ /* - * File : main.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/board.c b/bsp/allwinner_tina/drivers/board.c index e3b54b3536..c9be412067 100644 --- a/bsp/allwinner_tina/drivers/board.c +++ b/bsp/allwinner_tina/drivers/board.c @@ -1,21 +1,7 @@ /* - * File : board.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/board.h b/bsp/allwinner_tina/drivers/board.h index 11c6a9a15f..7b05b21c66 100644 --- a/bsp/allwinner_tina/drivers/board.h +++ b/bsp/allwinner_tina/drivers/board.h @@ -1,21 +1,7 @@ /* - * File : board.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/drv_clock.c b/bsp/allwinner_tina/drivers/drv_clock.c index b55cd6af4c..9fec431f4b 100644 --- a/bsp/allwinner_tina/drivers/drv_clock.c +++ b/bsp/allwinner_tina/drivers/drv_clock.c @@ -1,21 +1,7 @@ /* - * File : drv_clock.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -541,7 +527,7 @@ rt_err_t mmc_set_clk(enum mmc_clk_id clk_id, int hz) *mmc_clk &= ~(0x1 << 31); return RT_EOK; } - + if (hz <= 24000000) { pll = (0x0 << 24); @@ -593,7 +579,7 @@ rt_err_t mmc_set_clk(enum mmc_clk_id clk_id, int hz) oclk_dly = 1; sclk_dly = 4; } - + *mmc_clk = (0x1 << 31) | pll | (sclk_dly << 20) | \ (n << 16) | (oclk_dly << 8) | (div - 1); diff --git a/bsp/allwinner_tina/drivers/drv_clock.h b/bsp/allwinner_tina/drivers/drv_clock.h index c1cb87af0a..1623791672 100644 --- a/bsp/allwinner_tina/drivers/drv_clock.h +++ b/bsp/allwinner_tina/drivers/drv_clock.h @@ -1,21 +1,7 @@ /* - * File : drv_clock.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -252,4 +238,4 @@ rt_err_t dram_gate_clk_enable(enum dram_gate dram_gate); rt_err_t dram_gate_clk_disable(enum dram_gate dram_gate); rt_err_t mmc_set_clk(enum mmc_clk_id clk_id, int hz); -#endif \ No newline at end of file +#endif diff --git a/bsp/allwinner_tina/drivers/drv_gpio.c b/bsp/allwinner_tina/drivers/drv_gpio.c index 999ab473a0..099ea7621d 100644 --- a/bsp/allwinner_tina/drivers/drv_gpio.c +++ b/bsp/allwinner_tina/drivers/drv_gpio.c @@ -1,21 +1,7 @@ /* - * File : drv_gpio.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/drv_gpio.h b/bsp/allwinner_tina/drivers/drv_gpio.h index 35d368f1c8..74dd5a9be0 100644 --- a/bsp/allwinner_tina/drivers/drv_gpio.h +++ b/bsp/allwinner_tina/drivers/drv_gpio.h @@ -1,21 +1,7 @@ /* - * File : drv_gpio.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -241,4 +227,4 @@ void gpio_set_debounce(enum gpio_port port, rt_uint8_t prescaler); void gpio_set_irq_callback(enum gpio_port port, enum gpio_pin pin, void (*irq_cb)(void *), void *irq_arg); int rt_hw_gpio_init(void); -#endif /* __DRV_GPIO_H__ */ \ No newline at end of file +#endif /* __DRV_GPIO_H__ */ diff --git a/bsp/allwinner_tina/drivers/drv_sdio.c b/bsp/allwinner_tina/drivers/drv_sdio.c index 11b5a63d02..f19cd60d5c 100644 --- a/bsp/allwinner_tina/drivers/drv_sdio.c +++ b/bsp/allwinner_tina/drivers/drv_sdio.c @@ -1,21 +1,7 @@ /* - * File : drv_sdio.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -34,10 +20,10 @@ #define DBG_TAG "MMC" -// #define DBG_LVL DBG_LOG -// #define DBG_LVL DBG_INFO +// #define DBG_LVL DBG_LOG +// #define DBG_LVL DBG_INFO #define DBG_LVL DBG_WARNING -// #define DBG_LVL DBG_ERROR +// #define DBG_LVL DBG_ERROR #include #ifdef RT_USING_SDIO @@ -47,12 +33,12 @@ struct mmc_xfe_des { rt_uint32_t size; /* block size */ - rt_uint32_t num; /* block num */ - rt_uint8_t *buff; /* buff addr */ - rt_uint32_t flag; /* write or read or stream */ -#define MMC_DATA_WRITE (1 << 0) -#define MMC_DATA_READ (1 << 1) -#define MMC_DATA_STREAM (1 << 2) + rt_uint32_t num; /* block num */ + rt_uint8_t *buff; /* buff addr */ + rt_uint32_t flag; /* write or read or stream */ +#define MMC_DATA_WRITE (1 << 0) +#define MMC_DATA_READ (1 << 1) +#define MMC_DATA_STREAM (1 << 2) }; struct mmc_flag @@ -71,7 +57,7 @@ struct sdio_drv tina_mmc_t mmc_des; rt_uint8_t *mmc_buf; rt_uint8_t usedma; - + }; #ifdef CONFIG_MMC_USE_DMA @@ -136,7 +122,7 @@ static int mmc_update_clk(tina_mmc_t mmc) mmc->risr_reg = mmc->risr_reg; return RT_EOK; } - + static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe) { ALIGN(32) static struct mmc_des_v4p1 pdes[128]; // mast ALIGN(32) @@ -145,7 +131,7 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe) unsigned length = xfe->size * xfe->num; unsigned buff_frag_num = length >> SDXC_DES_NUM_SHIFT; unsigned remain = length & (SDXC_DES_BUFFER_MAX_LEN - 1); - + if (remain) { buff_frag_num ++; @@ -156,7 +142,7 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe) } memset(pdes, 0, sizeof(pdes)); mmu_clean_dcache((rt_uint32_t)(xfe->buff), length); - for (i = 0, des_idx = 0; i < buff_frag_num; i++, des_idx++) + for (i = 0, des_idx = 0; i < buff_frag_num; i++, des_idx++) { // memset((void*)&pdes[des_idx], 0, sizeof(struct mmc_v4p1)); pdes[des_idx].des_chain = 1; @@ -182,8 +168,8 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe) pdes[des_idx].last_des = 1; pdes[des_idx].end_of_ring = 1; pdes[des_idx].buf_addr_ptr2 = 0; - } - else + } + else { pdes[des_idx].buf_addr_ptr2 = (unsigned long)&pdes[des_idx+1]; } @@ -217,7 +203,7 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe) mmc->dmac_reg = (1 << 1) | (1 << 7); /* idma on */ rval = mmc->idie_reg & (~3); if (xfe->flag == MMC_DATA_WRITE) - rval |= (1 << 0); + rval |= (1 << 0); else rval |= (1 << 1); mmc->idie_reg = rval; @@ -236,7 +222,7 @@ static rt_err_t mmc_trans_data_by_cpu(tina_mmc_t mmc, struct mmc_xfe_des *xfe) if (xfe->flag == MMC_DATA_WRITE) { - for (i = 0; i < (byte_cnt >> 2); i++) + for (i = 0; i < (byte_cnt >> 2); i++) { while(--timeout && (mmc->star_reg & (1 << 3))); @@ -251,7 +237,7 @@ static rt_err_t mmc_trans_data_by_cpu(tina_mmc_t mmc, struct mmc_xfe_des *xfe) } else { - for (i = 0; i < (byte_cnt >> 2); i++) + for (i = 0; i < (byte_cnt >> 2); i++) { while(--timeout && (mmc->star_reg & (1 << 2))); @@ -290,7 +276,7 @@ static rt_err_t mmc_config_clock(tina_mmc_t mmc, int clk) { mmc_set_clk(SDMMC1, clk); } - + /* Re-enable card clock */ rval = mmc->ckcr_reg; rval |= (0x1 << 16); //(3 << 16); @@ -383,7 +369,7 @@ static int mmc_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd) cmdval |= (1 << 7); if ((resp_type(cmd) != RESP_R3) && (resp_type(cmd) != RESP_R4)) cmdval |= (1 << 8); - + if (data) { cmdval |= (1 << 9) | (1 << 13); @@ -606,7 +592,7 @@ static void sdio_request_send(struct rt_mmcsd_host *host, struct rt_mmcsd_req *r memset(&sdio->flag, 0, sizeof(struct mmc_flag)); mmc_send_cmd(host, req->cmd); - + return; } diff --git a/bsp/allwinner_tina/drivers/drv_sdio.h b/bsp/allwinner_tina/drivers/drv_sdio.h index 742d5362e1..ef7a7c4108 100644 --- a/bsp/allwinner_tina/drivers/drv_sdio.h +++ b/bsp/allwinner_tina/drivers/drv_sdio.h @@ -1,21 +1,7 @@ /* - * File : drv_sdio.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -133,8 +119,8 @@ REG[31] : Load cmd #define SDXC_UPDATE_CLOCK_CMD BIT(21) #define SDXC_LOAD_CMD BIT(31) -/* - SD status reg +/* + SD status reg REG[0] : FIFO_RX_LEVEL REG[1] : FIFO_TX_LEVEL REG[2] : FIFO_EMPTY @@ -143,7 +129,7 @@ REG[4-7] : FSM_STA REG[8] : CARD_PRESENT REG[9] : CARD_BUSY REG[10] : FSM_BUSY -REG[11-16]: RESP_IDX +REG[11-16]: RESP_IDX REG[17-21]: FIFO_LEVEL REG[31] : DMA_REQ */ diff --git a/bsp/allwinner_tina/drivers/drv_uart.c b/bsp/allwinner_tina/drivers/drv_uart.c index ede0eee4e4..a2889c598f 100644 --- a/bsp/allwinner_tina/drivers/drv_uart.c +++ b/bsp/allwinner_tina/drivers/drv_uart.c @@ -1,21 +1,7 @@ /* - * File : drv_uart.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -324,4 +310,4 @@ void uart_irq_handler(int irqno, void *param) } -#endif \ No newline at end of file +#endif diff --git a/bsp/allwinner_tina/drivers/drv_uart.h b/bsp/allwinner_tina/drivers/drv_uart.h index 25cb271c6e..d7c923d373 100644 --- a/bsp/allwinner_tina/drivers/drv_uart.h +++ b/bsp/allwinner_tina/drivers/drv_uart.h @@ -1,21 +1,7 @@ /* - * File : drv_uart.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/spi/drv_spi.c b/bsp/allwinner_tina/drivers/spi/drv_spi.c index d57cc15d7c..cd1f2aa383 100644 --- a/bsp/allwinner_tina/drivers/spi/drv_spi.c +++ b/bsp/allwinner_tina/drivers/spi/drv_spi.c @@ -1,21 +1,7 @@ /* - * File : drv_spi.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/spi/drv_spi.h b/bsp/allwinner_tina/drivers/spi/drv_spi.h index e9b9981542..1384663774 100644 --- a/bsp/allwinner_tina/drivers/spi/drv_spi.h +++ b/bsp/allwinner_tina/drivers/spi/drv_spi.h @@ -1,21 +1,7 @@ /* - * File : drv_spi.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c b/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c index 7aecc5411d..5e4edc9c6b 100644 --- a/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c +++ b/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c @@ -1,21 +1,7 @@ /* - * File : drv_spi_flash.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -65,4 +51,4 @@ INIT_PREV_EXPORT(rt_hw_spi_flash_with_sfud_init); #endif -#endif \ No newline at end of file +#endif diff --git a/bsp/allwinner_tina/libcpu/cpu.c b/bsp/allwinner_tina/libcpu/cpu.c index 23953dea42..19baa4d9fe 100644 --- a/bsp/allwinner_tina/libcpu/cpu.c +++ b/bsp/allwinner_tina/libcpu/cpu.c @@ -1,21 +1,7 @@ /* - * File : cpu.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/cpuport.c b/bsp/allwinner_tina/libcpu/cpuport.c index 5def9905f8..94f2baf415 100644 --- a/bsp/allwinner_tina/libcpu/cpuport.c +++ b/bsp/allwinner_tina/libcpu/cpuport.c @@ -1,21 +1,7 @@ /* - * File : cpuport.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/interrupt.c b/bsp/allwinner_tina/libcpu/interrupt.c index ccf19b0114..7c4e5cda1b 100644 --- a/bsp/allwinner_tina/libcpu/interrupt.c +++ b/bsp/allwinner_tina/libcpu/interrupt.c @@ -1,21 +1,7 @@ /* - * File : interrupt.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017-2021, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/interrupt.h b/bsp/allwinner_tina/libcpu/interrupt.h index 2790d05ec5..bdc0d33c39 100644 --- a/bsp/allwinner_tina/libcpu/interrupt.h +++ b/bsp/allwinner_tina/libcpu/interrupt.h @@ -1,21 +1,7 @@ /* - * File : interrupt.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017-2021, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/mmu.c b/bsp/allwinner_tina/libcpu/mmu.c index 177668a23b..a30f613ca9 100644 --- a/bsp/allwinner_tina/libcpu/mmu.c +++ b/bsp/allwinner_tina/libcpu/mmu.c @@ -1,21 +1,7 @@ /* - * File : mmu.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/mmu.h b/bsp/allwinner_tina/libcpu/mmu.h index b73f59c288..63853e6d34 100644 --- a/bsp/allwinner_tina/libcpu/mmu.h +++ b/bsp/allwinner_tina/libcpu/mmu.h @@ -1,21 +1,7 @@ /* - * File : mmu.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/rt_low_level_init.c b/bsp/allwinner_tina/libcpu/rt_low_level_init.c index 807b9b203d..eb576979c4 100644 --- a/bsp/allwinner_tina/libcpu/rt_low_level_init.c +++ b/bsp/allwinner_tina/libcpu/rt_low_level_init.c @@ -1,21 +1,7 @@ /* - * File : rt_low_level_init.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/stack.c b/bsp/allwinner_tina/libcpu/stack.c index 8f4c218ee1..69e50a9b47 100644 --- a/bsp/allwinner_tina/libcpu/stack.c +++ b/bsp/allwinner_tina/libcpu/stack.c @@ -1,21 +1,7 @@ /* - * File : stack.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/allwinner_tina/libcpu/trap.c b/bsp/allwinner_tina/libcpu/trap.c index 84bb3e7f8a..daf3501c68 100644 --- a/bsp/allwinner_tina/libcpu/trap.c +++ b/bsp/allwinner_tina/libcpu/trap.c @@ -1,21 +1,7 @@ /* - * File : trap.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/applications/main.c b/bsp/apollo2/applications/main.c index b058fc7711..4761cae664 100644 --- a/bsp/apollo2/applications/main.c +++ b/bsp/apollo2/applications/main.c @@ -1,21 +1,7 @@ /* - * File : main.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/adc.c b/bsp/apollo2/board/adc.c index a0044bcc37..26b926a209 100644 --- a/bsp/apollo2/board/adc.c +++ b/bsp/apollo2/board/adc.c @@ -1,21 +1,7 @@ /* - * File : adc.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -32,15 +18,15 @@ struct rt_messagequeue adcbat_mq; #define BATTERY_GPIO 35 /* Battery */ -#define BATTERY_ADC_PIN AM_HAL_PIN_35_ADCSE7 -#define BATTERY_ADC_CHANNEL AM_HAL_ADC_SLOT_CHSEL_SE7 /* BATTERY ADC采集通道 */ -#define BATTERY_ADC_CHANNELNUM 7 /* BATTERY ADC采集通道号 */ +#define BATTERY_ADC_PIN AM_HAL_PIN_35_ADCSE7 +#define BATTERY_ADC_CHANNEL AM_HAL_ADC_SLOT_CHSEL_SE7 /* BATTERY ADC閲囬泦閫氶亾 */ +#define BATTERY_ADC_CHANNELNUM 7 /* BATTERY ADC閲囬泦閫氶亾鍙 */ -#define ADC_CTIMER_NUM 3 /* ADC使用定时器 */ +#define ADC_CTIMER_NUM 3 /* ADC浣跨敤瀹氭椂鍣 */ #define ADC_CTIMER_COUNT (2048/512 - 1) -#define ADC_CHANNEL_NUM 1 /* ADC采集通道个数 */ -#define ADC_SAMPLE_NUM 8 /* ADC采样个数 */ +#define ADC_CHANNEL_NUM 1 /* ADC閲囬泦閫氶亾涓暟 */ +#define ADC_SAMPLE_NUM 8 /* ADC閲囨牱涓暟 */ rt_uint8_t bat_adc_cnt = 0; static rt_uint8_t am_adcbat_buffer_pool[256]; @@ -52,7 +38,7 @@ rt_uint8_t am_adc_data_get(rt_uint8_t channel, rt_int16_t *buff, rt_uint16_t siz if (channel == BATTERY_ADC_CHANNELNUM) { - /* wait adc message forever */ + /* wait adc message forever */ rt_mq_recv(&adcbat_mq, adc_bufftemp, 32, RT_WAITING_FOREVER); } diff --git a/bsp/apollo2/board/adc.h b/bsp/apollo2/board/adc.h index 4e4396bae3..552b704ab8 100644 --- a/bsp/apollo2/board/adc.h +++ b/bsp/apollo2/board/adc.h @@ -1,21 +1,7 @@ /* - * File : adc.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/board.c b/bsp/apollo2/board/board.c index 23bc332af4..907455a998 100644 --- a/bsp/apollo2/board/board.c +++ b/bsp/apollo2/board/board.c @@ -1,21 +1,7 @@ /* - * File : board.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/board.h b/bsp/apollo2/board/board.h index 67dfdd5e39..ef21bdb05f 100644 --- a/bsp/apollo2/board/board.h +++ b/bsp/apollo2/board/board.h @@ -1,21 +1,7 @@ /* - * File : board.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/flash.c b/bsp/apollo2/board/flash.c index ae224e85a1..2d28920daf 100644 --- a/bsp/apollo2/board/flash.c +++ b/bsp/apollo2/board/flash.c @@ -1,21 +1,7 @@ /* - * File : flash.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -77,7 +63,7 @@ static rt_err_t rt_flash_control(rt_device_t dev, int cmd, void *args) ui32CurrentPage = AM_HAL_FLASH_ADDR2PAGE(erase->addrstart); ui32CurrentBlock = AM_HAL_FLASH_ADDR2INST(erase->addrstart); - am_hal_flash_page_erase(AM_HAL_FLASH_PROGRAM_KEY, ui32CurrentBlock, ui32CurrentPage); //单扇区擦除命令 + am_hal_flash_page_erase(AM_HAL_FLASH_PROGRAM_KEY, ui32CurrentBlock, ui32CurrentPage); //鍗曟墖鍖烘摝闄ゅ懡浠 erase->addrstart += 8192; } } diff --git a/bsp/apollo2/board/flash.h b/bsp/apollo2/board/flash.h index c9c8f9492c..b628983ce3 100644 --- a/bsp/apollo2/board/flash.h +++ b/bsp/apollo2/board/flash.h @@ -1,21 +1,7 @@ /* - * File : flash.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/gpio.c b/bsp/apollo2/board/gpio.c index c985e0f2a7..edfaef1431 100644 --- a/bsp/apollo2/board/gpio.c +++ b/bsp/apollo2/board/gpio.c @@ -1,21 +1,7 @@ /* - * File : gpio.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -70,7 +56,7 @@ void am_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) else if (value == PIN_HIGH) { am_hal_gpio_out_bit_set(pin); - } + } } int am_pin_read(rt_device_t dev, rt_base_t pin) diff --git a/bsp/apollo2/board/gpio.h b/bsp/apollo2/board/gpio.h index 1ea3c42013..495fde6f6e 100644 --- a/bsp/apollo2/board/gpio.h +++ b/bsp/apollo2/board/gpio.h @@ -1,27 +1,13 @@ /* - * File : gpio.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2017-09-16 Haley the first version */ - + #ifndef __GPIO_H #define __GPIO_H diff --git a/bsp/apollo2/board/i2c.c b/bsp/apollo2/board/i2c.c index 6d1bcdc0c0..0a1311d7e6 100644 --- a/bsp/apollo2/board/i2c.c +++ b/bsp/apollo2/board/i2c.c @@ -1,21 +1,7 @@ /* - * File :_i2c.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -133,7 +119,7 @@ static const struct rt_i2c_bus_device_ops am_i2c_ops = }; #ifdef RT_USING_I2C0 -static struct am_i2c_bus am_i2c_bus_0 = +static struct am_i2c_bus am_i2c_bus_0 = { {0}, AM_I2C0_IOM_INST @@ -141,7 +127,7 @@ static struct am_i2c_bus am_i2c_bus_0 = #endif #ifdef RT_USING_I2C1 -static struct am_i2c_bus am_i2c_bus_1 = +static struct am_i2c_bus am_i2c_bus_1 = { {1}, AM_I2C1_IOM_INST @@ -149,7 +135,7 @@ static struct am_i2c_bus am_i2c_bus_1 = #endif #ifdef RT_USING_I2C2 -static struct am_i2c_bus am_i2c_bus_2 = +static struct am_i2c_bus am_i2c_bus_2 = { {2}, AM_I2C2_IOM_INST @@ -157,7 +143,7 @@ static struct am_i2c_bus am_i2c_bus_2 = #endif #ifdef RT_USING_I2C3 -static struct am_i2c_bus am_i2c_bus_3 = +static struct am_i2c_bus am_i2c_bus_3 = { {3}, AM_I2C3_IOM_INST @@ -165,7 +151,7 @@ static struct am_i2c_bus am_i2c_bus_3 = #endif #ifdef RT_USING_I2C4 -static struct am_i2c_bus am_i2c_bus_4 = +static struct am_i2c_bus am_i2c_bus_4 = { {4}, AM_I2C4_IOM_INST diff --git a/bsp/apollo2/board/i2c.h b/bsp/apollo2/board/i2c.h index 004d5eb3c1..b0a24b51cd 100644 --- a/bsp/apollo2/board/i2c.h +++ b/bsp/apollo2/board/i2c.h @@ -1,21 +1,7 @@ /* - * File : i2c.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/led.c b/bsp/apollo2/board/led.c index d8eb2fb753..5364667679 100644 --- a/bsp/apollo2/board/led.c +++ b/bsp/apollo2/board/led.c @@ -1,21 +1,7 @@ /* - * File :_led.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/led.h b/bsp/apollo2/board/led.h index c6f6bd8728..76832e32b9 100644 --- a/bsp/apollo2/board/led.h +++ b/bsp/apollo2/board/led.h @@ -1,21 +1,7 @@ /* - * File : led.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/pdm.c b/bsp/apollo2/board/pdm.c index 3eb46f7411..f1b719c6d1 100644 --- a/bsp/apollo2/board/pdm.c +++ b/bsp/apollo2/board/pdm.c @@ -1,21 +1,7 @@ /* - * File :_pdm.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -66,7 +52,7 @@ rt_uint8_t am_pdm_data_get(rt_uint8_t *buff, rt_uint16_t size) { rt_uint8_t pdm_rbufftemp[340]; - /* wait pdm message forever */ + /* wait pdm message forever */ rt_mq_recv(&pdm_mq, pdm_rbufftemp, 340, RT_WAITING_FOREVER); /* copy the data */ diff --git a/bsp/apollo2/board/pdm.h b/bsp/apollo2/board/pdm.h index 43ed075da8..2975c8aad1 100644 --- a/bsp/apollo2/board/pdm.h +++ b/bsp/apollo2/board/pdm.h @@ -1,21 +1,7 @@ /* - * File : pdm.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/pwm.c b/bsp/apollo2/board/pwm.c index 7591291eac..8b23a8c290 100644 --- a/bsp/apollo2/board/pwm.c +++ b/bsp/apollo2/board/pwm.c @@ -1,21 +1,7 @@ /* - * File :_pwm.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/pwm.h b/bsp/apollo2/board/pwm.h index 53a6571264..973848c6f6 100644 --- a/bsp/apollo2/board/pwm.h +++ b/bsp/apollo2/board/pwm.h @@ -1,21 +1,7 @@ /* - * File : pwm.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/rtc.c b/bsp/apollo2/board/rtc.c index dbae7cf3c1..5c8fbb13fe 100644 --- a/bsp/apollo2/board/rtc.c +++ b/bsp/apollo2/board/rtc.c @@ -1,21 +1,7 @@ /* - * File :_rtc.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -116,7 +102,7 @@ int rt_hw_rtc_init(void) /* Select LFRC for RTC clock source */ am_hal_rtc_osc_select(AM_HAL_RTC_OSC_LFRC); #endif - + #if RTC_CLK_SRC == XT /* Enable the XT for the RTC */ am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_XT); @@ -129,12 +115,12 @@ int rt_hw_rtc_init(void) am_hal_rtc_osc_enable(); /* register rtc device */ - rtc.type = RT_Device_Class_RTC; - rtc.init = RT_NULL; - rtc.open = rt_rtc_open; - rtc.close = RT_NULL; - rtc.read = rt_rtc_read; - rtc.write = RT_NULL; + rtc.type = RT_Device_Class_RTC; + rtc.init = RT_NULL; + rtc.open = rt_rtc_open; + rtc.close = RT_NULL; + rtc.read = rt_rtc_read; + rtc.write = RT_NULL; rtc.control = rt_rtc_control; /* no private */ diff --git a/bsp/apollo2/board/rtc.h b/bsp/apollo2/board/rtc.h index 83087bc47e..a4a7fbd5e7 100644 --- a/bsp/apollo2/board/rtc.h +++ b/bsp/apollo2/board/rtc.h @@ -1,27 +1,13 @@ /* - * File : rtc.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2017-09-14 Haley the first version */ - + #ifndef __RTC_H #define __RTC_H diff --git a/bsp/apollo2/board/smbus.c b/bsp/apollo2/board/smbus.c index ae41f9fac6..7437b68ffa 100644 --- a/bsp/apollo2/board/smbus.c +++ b/bsp/apollo2/board/smbus.c @@ -1,21 +1,7 @@ /* - * File : smbus.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -42,8 +28,8 @@ #define mSDA_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_SDA, AM_HAL_GPIO_OUTPUT) /* Set SDA as Output */ #define mSCL_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_SCL, AM_HAL_GPIO_OUTPUT) /* Set SCL as Output */ -#define ACK 0 -#define NACK 1 +#define ACK 0 +#define NACK 1 /* SCL keep time */ static void keep_delay(void) @@ -60,7 +46,7 @@ static void few_delay(void) } static rt_uint8_t am_smbus_send_bit(rt_uint8_t send_bit) -{ +{ mSDA_OUT(); few_delay(); @@ -128,7 +114,7 @@ static void am_smbus_stop_bit(void) static rt_uint8_t am_smbus_tx_byte(rt_uint8_t tx_byte) { - int i; + int i; rt_uint8_t ack_bit; rt_uint8_t bit_out; @@ -176,7 +162,7 @@ rt_uint8_t am_smbus_tx_then_tx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_u int i; am_smbus_start_bit(); /* Start condition */ - + if(am_smbus_tx_byte(SlaveAddress)) /* Send SlaveAddress and write */ return 1; diff --git a/bsp/apollo2/board/smbus.h b/bsp/apollo2/board/smbus.h index 6f518b8f9e..62f8afc1b9 100644 --- a/bsp/apollo2/board/smbus.h +++ b/bsp/apollo2/board/smbus.h @@ -1,21 +1,7 @@ /* - * File : smbus.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/apollo2/board/spi.c b/bsp/apollo2/board/spi.c index 783f359af0..f59610975f 100644 --- a/bsp/apollo2/board/spi.c +++ b/bsp/apollo2/board/spi.c @@ -1,21 +1,7 @@ /* - * File : spi.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -180,7 +166,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes am_hal_gpio_out_bit_clear(am_spi_cs->chip_select); } - // 读数据 + // 璇绘暟鎹 if (recv_ptr != RT_NULL) { while (u32BytesRemaining) @@ -213,7 +199,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes } } - // 写数据 + // 鍐欐暟鎹 else { while (u32BytesRemaining) @@ -225,7 +211,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes u32TransferSize = 64; am_hal_iom_spi_write(am_spi_bus->u32Module, am_spi_cs->chip_select, (uint32_t *)send_ptr, u32TransferSize, AM_HAL_IOM_RAW); - + } else { @@ -257,7 +243,7 @@ static const struct rt_spi_ops am_spi_ops = }; #ifdef RT_USING_SPI0 -static struct am_spi_bus am_spi_bus_0 = +static struct am_spi_bus am_spi_bus_0 = { {0}, AM_SPI0_IOM_INST diff --git a/bsp/apollo2/board/spi.h b/bsp/apollo2/board/spi.h index d88bb587e9..4c23f54621 100644 --- a/bsp/apollo2/board/spi.h +++ b/bsp/apollo2/board/spi.h @@ -1,21 +1,7 @@ /* - * File : spi.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -27,7 +13,7 @@ #include -/* 片选信号结构声明 */ +/* 鐗囬変俊鍙风粨鏋勫０鏄 */ struct am_spi_cs { rt_uint32_t chip_select; diff --git a/bsp/apollo2/board/uart.c b/bsp/apollo2/board/uart.c index fc3884bf2d..ec97599b80 100644 --- a/bsp/apollo2/board/uart.c +++ b/bsp/apollo2/board/uart.c @@ -1,21 +1,7 @@ /* - * File : uart.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -164,11 +150,11 @@ static rt_err_t am_configure(struct rt_serial_device *serial, struct serial_conf else if (cfg->stop_bits == STOP_BITS_2) uart_cfg.bTwoStopBits = true; - if (cfg->parity == PARITY_NONE) + if (cfg->parity == PARITY_NONE) uart_cfg.ui32Parity = AM_HAL_UART_PARITY_NONE; - else if (cfg->parity == PARITY_ODD) + else if (cfg->parity == PARITY_ODD) uart_cfg.ui32Parity = AM_HAL_UART_PARITY_ODD; - else if (cfg->parity == PARITY_EVEN) + else if (cfg->parity == PARITY_EVEN) uart_cfg.ui32Parity = AM_HAL_UART_PARITY_EVEN; uart_cfg.ui32FlowCtrl = AM_HAL_UART_FLOW_CTRL_NONE; diff --git a/bsp/apollo2/board/uart.h b/bsp/apollo2/board/uart.h index 8e92068d5d..d858d68b21 100644 --- a/bsp/apollo2/board/uart.h +++ b/bsp/apollo2/board/uart.h @@ -1,21 +1,7 @@ /* - * File : uart.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/at32/Libraries/rt_drivers/drv_adc.c b/bsp/at32/Libraries/rt_drivers/drv_adc.c index 02e7b602af..25760e512b 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_adc.c +++ b/bsp/at32/Libraries/rt_drivers/drv_adc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -17,7 +17,7 @@ #include struct at32_adc -{ +{ struct rt_adc_device at32_adc_device; ADC_Type *ADC_Handler; char *name; @@ -109,9 +109,9 @@ static rt_err_t at32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chann ADC_InitType ADC_InitStructure; RT_ASSERT(device != RT_NULL); at32_adc_handler = device->parent.user_data; - + at32_msp_adc_init(at32_adc_handler); - + /* ADCx configuration ------------------------------------------------------*/ ADC_StructInit(&ADC_InitStructure); ADC_InitStructure.ADC_Mode = ADC_Mode_Independent; @@ -121,14 +121,14 @@ static rt_err_t at32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chann ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NumOfChannel = 1; ADC_Init(at32_adc_handler, &ADC_InitStructure); - - /* ADCx regular channels configuration */ - ADC_RegularChannelConfig(at32_adc_handler, at32_adc_get_channel(channel), 1, ADC_SampleTime_28_5); - + + /* ADCx regular channels configuration */ + ADC_RegularChannelConfig(at32_adc_handler, at32_adc_get_channel(channel), 1, ADC_SampleTime_28_5); + /* Enable ADCx */ ADC_Ctrl(at32_adc_handler, ENABLE); - - /* Enable ADCx reset calibration register */ + + /* Enable ADCx reset calibration register */ ADC_RstCalibration(at32_adc_handler); /* Check the end of ADCx reset calibration register */ while(ADC_GetResetCalibrationStatus(at32_adc_handler)); @@ -161,7 +161,7 @@ static rt_err_t at32_get_adc_value(struct rt_adc_device *device, rt_uint32_t cha at32_adc_handler = device->parent.user_data; - /* Start ADCx Software Conversion */ + /* Start ADCx Software Conversion */ ADC_SoftwareStartConvCtrl(at32_adc_handler, ENABLE); /* Wait for the ADC to convert */ diff --git a/bsp/at32/Libraries/rt_drivers/drv_adc.h b/bsp/at32/Libraries/rt_drivers/drv_adc.h index d113d1338a..0991b0fe80 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_adc.h +++ b/bsp/at32/Libraries/rt_drivers/drv_adc.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -19,32 +19,32 @@ extern "C" { #endif #if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2) || defined(BSP_USING_ADC3) - + #ifndef ADC1_CONFIG #define ADC1_CONFIG \ { \ .ADC_Handler = ADC1, \ .name = "adc1", \ - } + } #endif /* ADC1_CONFIG */ - + #ifndef ADC2_CONFIG #define ADC2_CONFIG \ { \ .ADC_Handler = ADC2, \ .name = "adc2", \ - } + } #endif /* ADC2_CONFIG */ - + #ifndef ADC3_CONFIG #define ADC3_CONFIG \ { \ .ADC_Handler = ADC3, \ .name = "adc3", \ - } -#endif /* ADC3_CONFIG */ - -#endif + } +#endif /* ADC3_CONFIG */ + +#endif #ifdef __cplusplus diff --git a/bsp/at32/Libraries/rt_drivers/drv_can.c b/bsp/at32/Libraries/rt_drivers/drv_can.c index 43f5a287e3..47a4bb3667 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_can.c +++ b/bsp/at32/Libraries/rt_drivers/drv_can.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -311,8 +311,8 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg) { can_instance->CanConfig.FilterConfig.CAN_FilterNumber = filter_cfg->items[i].hdr & (0x1fU); can_instance->CanConfig.FilterConfig.CAN_FilterIdHigh = (filter_cfg->items[i].id >> 13) & 0xFFFF; - can_instance->CanConfig.FilterConfig.CAN_FilterIdLow = ((filter_cfg->items[i].id << 3) | - (filter_cfg->items[i].ide << 2) | + can_instance->CanConfig.FilterConfig.CAN_FilterIdLow = ((filter_cfg->items[i].id << 3) | + (filter_cfg->items[i].ide << 2) | (filter_cfg->items[i].rtr << 1)) & 0xFFFF; can_instance->CanConfig.FilterConfig.CAN_FilterMskIdHigh = (filter_cfg->items[i].mask >> 16) & 0xFFFF; can_instance->CanConfig.FilterConfig.CAN_FilterMskIdLow = filter_cfg->items[i].mask & 0xFFFF; @@ -499,7 +499,7 @@ static int _can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t fifo) else pmsg->ide = RxMessage.ExtId; pmsg->rtr = RxMessage.RTR; - + return RT_EOK; } diff --git a/bsp/at32/Libraries/rt_drivers/drv_can.h b/bsp/at32/Libraries/rt_drivers/drv_can.h index d89bacda26..19afb93040 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_can.h +++ b/bsp/at32/Libraries/rt_drivers/drv_can.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -22,7 +22,7 @@ extern "C" { #define CAN_TX_MAILBOX0 (0x00000001U) /*!< Tx Mailbox 0 */ #define CAN_TX_MAILBOX1 (0x00000002U) /*!< Tx Mailbox 1 */ #define CAN_TX_MAILBOX2 (0x00000004U) /*!< Tx Mailbox 2 */ - + struct at32_baud_rate_tab { rt_uint32_t baud_rate; diff --git a/bsp/at32/Libraries/rt_drivers/drv_eth.c b/bsp/at32/Libraries/rt_drivers/drv_eth.c index 3a14d9b918..e44429e0ea 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_eth.c +++ b/bsp/at32/Libraries/rt_drivers/drv_eth.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -28,8 +28,8 @@ //#define DRV_DEBUG #define LOG_TAG "drv.emac" -#define ETH_RXBUFNB 4 -#define ETH_TXBUFNB 2 +#define ETH_RXBUFNB 4 +#define ETH_TXBUFNB 2 #define LINK_THREAD_STACK_SIZE 256 #define LINK_THREAD_PREORITY 21 @@ -131,14 +131,14 @@ void NVIC_Configuration(void) NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); /* 2 bit for pre-emption priority, 2 bits for subpriority */ - NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); /* Enable the Ethernet global Interrupt */ NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + NVIC_Init(&NVIC_InitStructure); } /** @@ -173,7 +173,7 @@ void GPIO_Configuration(void) GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOC, &GPIO_InitStructure); - /*MII Mode GPIO configuration*/ + /*MII Mode GPIO configuration*/ #ifdef MII_MODE /**********************MII Tx Pin Define****************************/ /* @@ -193,7 +193,7 @@ void GPIO_Configuration(void) GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOC, &GPIO_InitStructure); - /**********************MII Rx Pin Define****************************/ + /**********************MII Rx Pin Define****************************/ #if MII_RX_REMAP /*IO PIN remaped*/ /* ETH_MII_RX_DV-->PD8 @@ -208,7 +208,7 @@ void GPIO_Configuration(void) */ GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10 | GPIO_Pins_11 | GPIO_Pins_12; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(GPIOD, &GPIO_InitStructure); + GPIO_Init(GPIOD, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_3; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; @@ -233,11 +233,11 @@ void GPIO_Configuration(void) GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(GPIOA, &GPIO_InitStructure); - GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5; + GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(GPIOC, &GPIO_InitStructure); - GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_10; + GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_10; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(GPIOB, &GPIO_InitStructure); @@ -255,8 +255,8 @@ void GPIO_Configuration(void) GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOB, &GPIO_InitStructure); - - /**********************RMII Rx Pin Define****************************/ + + /**********************RMII Rx Pin Define****************************/ #if MII_RX_REMAP /*IO PIN remaped*/ /* ETH_RMII_RX_DV-->PD8 @@ -266,7 +266,7 @@ void GPIO_Configuration(void) */ GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(GPIOD, &GPIO_InitStructure); + GPIO_Init(GPIOD, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pins = GPIO_Pins_1; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; @@ -282,7 +282,7 @@ void GPIO_Configuration(void) GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(GPIOA, &GPIO_InitStructure); - GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5; + GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(GPIOC, &GPIO_InitStructure); @@ -314,7 +314,7 @@ static rt_err_t rt_at32_eth_init(rt_device_t dev) RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_ETHMAC | RCC_AHBPERIPH_ETHMACTX | RCC_AHBPERIPH_ETHMACRX, ENABLE); - + /* MII/RMII Media interface selection ------------------------------------------*/ #ifdef MII_MODE /* Mode MII with AT32F407-EVAL */ GPIO_ETH_MediaInterfaceConfig(GPIO_ETH_MediaInterface_MII); @@ -361,31 +361,31 @@ static rt_err_t rt_at32_eth_init(rt_device_t dev) ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable; #endif - /*------------------------ DMA -----------------------------------*/ + /*------------------------ DMA -----------------------------------*/ - /* When we use the Checksum offload feature, we need to enable the Store and Forward mode: - the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum, + /* When we use the Checksum offload feature, we need to enable the Store and Forward mode: + the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum, if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */ - ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;//ETH_DropTCPIPChecksumErrorFrame_Enable; - ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable; - ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable; + ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;//ETH_DropTCPIPChecksumErrorFrame_Enable; + ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable; + ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable; - ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable; - ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable; - ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable; - ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable; - ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable; - ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat; - ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat; + ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable; + ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable; + ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable; + ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable; + ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable; + ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat; + ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat; ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1; /* Configure Ethernet, check error */ if(ETH_Init(Ð_InitStructure, PHY_ADDRESS) == ((uint32_t)0)) { return RT_ERROR; - } + } /* Enable DMA Receive interrupt (need to enable in this case Normal interrupt) */ - ETH_DMAITConfig(ETH_DMA_INT_NIS | ETH_DMA_INT_R, ENABLE); + ETH_DMAITConfig(ETH_DMA_INT_NIS | ETH_DMA_INT_R, ENABLE); /* Initialize Tx Descriptors list: Chain Mode */ ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB); @@ -396,7 +396,7 @@ static rt_err_t rt_at32_eth_init(rt_device_t dev) ETH_MACAddressConfig(ETH_MAC_Address0, (u8*)&at32_eth_device.dev_addr[0]); /* Enable ETH transmition and recetion */ - ETH_Start(); + ETH_Start(); return RT_EOK; } @@ -581,7 +581,7 @@ struct pbuf *rt_at32_eth_rx(rt_device_t dev) { rt_uint32_t i; rt_uint8_t *ptr = (rt_uint8_t*)(DMARxDescToGet->Buffer1Addr); - + AT32_ETH_PRINTF("rx_dump, len:%d\r\n", p->tot_len); for(i=0; itot_len; i++) { diff --git a/bsp/at32/Libraries/rt_drivers/drv_eth.h b/bsp/at32/Libraries/rt_drivers/drv_eth.h index 398b4bdc0c..d5a5a05cc5 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_eth.h +++ b/bsp/at32/Libraries/rt_drivers/drv_eth.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/Libraries/rt_drivers/drv_flash.c b/bsp/at32/Libraries/rt_drivers/drv_flash.c index 8104f9b612..a1b381beaa 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_flash.c +++ b/bsp/at32/Libraries/rt_drivers/drv_flash.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -160,14 +160,14 @@ int at32_flash_erase(rt_uint32_t addr, size_t size) addr += FLASH_PAGE_SIZE; } - FLASH_Lock(); - -__exit: + FLASH_Lock(); + +__exit: if(result != RT_EOK) { return result; } - + return size; } @@ -177,7 +177,7 @@ static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size); static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size); static int fal_flash_erase(long offset, size_t size); -const struct fal_flash_dev at32_onchip_flash = +const struct fal_flash_dev at32_onchip_flash = { "onchip_flash", AT32_FLASH_START_ADRESS, diff --git a/bsp/at32/Libraries/rt_drivers/drv_flash.h b/bsp/at32/Libraries/rt_drivers/drv_flash.h index 9392ff4303..7ec0a18632 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_flash.h +++ b/bsp/at32/Libraries/rt_drivers/drv_flash.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/Libraries/rt_drivers/drv_gpio.c b/bsp/at32/Libraries/rt_drivers/drv_gpio.c index d6fd0594dc..bc9f6b87bb 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_gpio.c +++ b/bsp/at32/Libraries/rt_drivers/drv_gpio.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -13,7 +13,7 @@ #ifdef RT_USING_PIN -static const struct pin_index pins[] = +static const struct pin_index pins[] = { #if defined(GPIOA) __AT32_PIN(0 , A, 0 ), @@ -414,7 +414,7 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin, /* Configure GPIO_InitStructure */ GPIO_StructInit(&GPIO_InitStruct); EXTI_StructInit(&EXTI_InitStruct); - GPIO_InitStruct.GPIO_Pins = irqmap->pinbit; + GPIO_InitStruct.GPIO_Pins = irqmap->pinbit; GPIO_InitStruct.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz; EXTI_InitStruct.EXTI_Line = irqmap->pinbit; EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt; @@ -462,24 +462,24 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin, if (( irqmap->pinbit>=GPIO_Pins_5 )&&( irqmap->pinbit<=GPIO_Pins_9 )) { if(!(pin_irq_enable_mask&(GPIO_Pins_5|GPIO_Pins_6|GPIO_Pins_7|GPIO_Pins_8|GPIO_Pins_9))) - { + { NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno; } } else if (( irqmap->pinbit>=GPIO_Pins_10 )&&( irqmap->pinbit<=GPIO_Pins_15 )) { if(!(pin_irq_enable_mask&(GPIO_Pins_10|GPIO_Pins_11|GPIO_Pins_12|GPIO_Pins_13|GPIO_Pins_14|GPIO_Pins_15))) - { + { NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno; } } else { NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno; - } + } NVIC_Init(&NVIC_InitStruct); - rt_hw_interrupt_enable(level); + rt_hw_interrupt_enable(level); } else { diff --git a/bsp/at32/Libraries/rt_drivers/drv_gpio.h b/bsp/at32/Libraries/rt_drivers/drv_gpio.h index 63870611f5..a8f5b7474e 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_gpio.h +++ b/bsp/at32/Libraries/rt_drivers/drv_gpio.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/Libraries/rt_drivers/drv_hwtimer.c b/bsp/at32/Libraries/rt_drivers/drv_hwtimer.c index 97788d22c9..dede483e54 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_hwtimer.c +++ b/bsp/at32/Libraries/rt_drivers/drv_hwtimer.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2020-03-16 Leo first version */ - + #include #include "drv_hwtimer.h" @@ -20,35 +20,35 @@ enum { #ifdef BSP_USING_HWTMR1 TMR1_INDEX, -#endif - +#endif + #ifdef BSP_USING_HWTMR2 TMR2_INDEX, -#endif - +#endif + #ifdef BSP_USING_HWTMR3 TMR3_INDEX, -#endif +#endif #ifdef BSP_USING_HWTMR4 TMR4_INDEX, -#endif +#endif #ifdef BSP_USING_HWTMR5 TMR5_INDEX, -#endif +#endif #ifdef BSP_USING_HWTMR6 TMR6_INDEX, -#endif +#endif #ifdef BSP_USING_HWTMR7 TMR7_INDEX, -#endif +#endif #ifdef BSP_USING_HW_TMR8 TMR8_INDEX, -#endif +#endif #ifdef BSP_USING_HWTMR9 TMR9_INDEX, @@ -56,11 +56,11 @@ enum #ifdef BSP_USING_HWTMR10 TMR10_INDEX, -#endif +#endif #ifdef BSP_USING_HWTMR11 TMR11_INDEX, -#endif +#endif #ifdef BSP_USING_HWTMR12 TMR12_INDEX, @@ -68,11 +68,11 @@ enum #ifdef BSP_USING_HWTMR13 TMR13_INDEX, -#endif +#endif #ifdef BSP_USING_HWTMR14 TMR14_INDEX, -#endif +#endif #ifdef BSP_USING_HWTMR15 TMR15_INDEX, @@ -91,48 +91,48 @@ static struct at32_hwtimer at32_hwtimer_obj[] = { #ifdef BSP_USING_HWTMR1 TMR1_CONFIG, -#endif +#endif #ifdef BSP_USING_HWTMR2 TMR2_CONFIG, #endif - + #ifdef BSP_USING_HWTMR3 TMR3_CONFIG, #endif - + #ifdef BSP_USING_HWTMR4 TMR4_CONFIG, #endif #ifdef BSP_USING_HWTMR5 TMR5_CONFIG, -#endif +#endif #ifdef BSP_USING_HWTMR6 TMR6_CONFIG, #endif - + #ifdef BSP_USING_HWTMR7 TMR7_CONFIG, #endif - + #ifdef BSP_USING_HWTMR8 TMR8_CONFIG, #endif #ifdef BSP_USING_HWTMR9 TMR9_CONFIG, -#endif +#endif #ifdef BSP_USING_HWTMR10 TMR10_CONFIG, #endif - + #ifdef BSP_USING_HWTMR11 TMR11_CONFIG, #endif - + #ifdef BSP_USING_HWTMR12 TMR12_CONFIG, #endif @@ -164,20 +164,20 @@ static void at32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) { tim = (TMR_Type *)timer->parent.user_data; tim_device = (struct at32_hwtimer *)timer; - + /* timer clock enable */ at32_msp_hwtmr_init(tim); - + /* timer init */ RCC_GetClocksFreq(&RCC_ClockStruct); /* Set timer clock is 1Mhz */ prescaler_value = (uint32_t)(RCC_ClockStruct.SYSCLK_Freq / 10000) - 1; - + TMR_TMReBaseStructure.TMR_Period = 10000 - 1; TMR_TMReBaseStructure.TMR_DIV = prescaler_value; TMR_TMReBaseStructure.TMR_ClockDivision = TMR_CKD_DIV1; TMR_TMReBaseStructure.TMR_RepetitionCounter = 0; - + if (timer->info->cntmode == HWTIMER_CNTMODE_UP) { TMR_TMReBaseStructure.TMR_CounterMode = TMR_CounterDIR_Up; @@ -186,21 +186,21 @@ static void at32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) { TMR_TMReBaseStructure.TMR_CounterMode = TMR_CounterDIR_Down; } - + TMR_TimeBaseInit(tim, &TMR_TMReBaseStructure); - + /* Enable the TMRx global Interrupt */ NVIC_InitStructure.NVIC_IRQChannel = tim_device->tim_irqn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); - + TMR_INTConfig(tim, TMR_INT_Overflow ,ENABLE); TMR_ClearITPendingBit(tim, TMR_INT_Overflow); - + LOG_D("%s init success", tim_device->name); - } + } } static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) @@ -211,7 +211,7 @@ static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_ RT_ASSERT(timer != RT_NULL); tim = (TMR_Type *)timer->parent.user_data; - + /* set tim cnt */ TMR_SetCounter(tim, 0); /* set tim arr */ @@ -225,10 +225,10 @@ static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_ { TMR_SelectOnePulseMode(tim, TMR_OPMode_Repetitive); } - + /* start timer */ TMR_Cmd(tim, ENABLE); - + return result; } @@ -239,7 +239,7 @@ static void at32_timer_stop(rt_hwtimer_t *timer) RT_ASSERT(timer != RT_NULL); tim = (TMR_Type *)timer->parent.user_data; - + /* stop timer */ TMR_Cmd(tim, ENABLE); /* set tim cnt */ @@ -253,7 +253,7 @@ static rt_uint32_t at32_timer_counter_get(rt_hwtimer_t *timer) RT_ASSERT(timer != RT_NULL); tim = (TMR_Type *)timer->parent.user_data; - + return tim->CNT; } @@ -267,22 +267,22 @@ static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) RT_ASSERT(arg != RT_NULL); tim = (TMR_Type *)timer->parent.user_data; - + switch(cmd) { case HWTIMER_CTRL_FREQ_SET: { rt_uint32_t freq; rt_uint16_t val; - + /* set timer frequence */ freq = *((rt_uint32_t *)arg); - + /* time init */ RCC_GetClocksFreq(&RCC_ClockStruct); - + val = RCC_ClockStruct.SYSCLK_Freq / freq; - + TMR_DIVConfig(tim, val - 1, TMR_DIVReloadMode_Immediate); } break; @@ -292,7 +292,7 @@ static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) } break; } - + return result; } @@ -311,13 +311,13 @@ void TMR2_GLOBAL_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - + if(TMR_GetINTStatus(TMR2, TMR_INT_Overflow) == SET) { - + rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR2_INDEX].time_device); TMR_ClearITPendingBit(TMR2, TMR_INT_Overflow); - + } /* leave interrupt */ rt_interrupt_leave(); @@ -329,13 +329,13 @@ void TMR3_GLOBAL_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - + if(TMR_GetINTStatus(TMR3, TMR_INT_Overflow) == SET) { - + rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR3_INDEX].time_device); TMR_ClearITPendingBit(TMR3, TMR_INT_Overflow); - + } /* leave interrupt */ rt_interrupt_leave(); @@ -347,13 +347,13 @@ void TMR4_GLOBAL_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - + if(TMR_GetINTStatus(TMR4, TMR_INT_Overflow) == SET) { - + rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR4_INDEX].time_device); TMR_ClearITPendingBit(TMR4, TMR_INT_Overflow); - + } /* leave interrupt */ rt_interrupt_leave(); @@ -365,13 +365,13 @@ void TMR5_GLOBAL_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - + if(TMR_GetINTStatus(TMR5, TMR_INT_Overflow) == SET) { - + rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR5_INDEX].time_device); TMR_ClearITPendingBit(TMR5, TMR_INT_Overflow); - + } /* leave interrupt */ rt_interrupt_leave(); diff --git a/bsp/at32/Libraries/rt_drivers/drv_hwtimer.h b/bsp/at32/Libraries/rt_drivers/drv_hwtimer.h index 9ae4981e3f..9acfb8d468 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_hwtimer.h +++ b/bsp/at32/Libraries/rt_drivers/drv_hwtimer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -26,7 +26,7 @@ extern "C" { .maxcnt = 0xFFFF, \ .cntmode = HWTIMER_CNTMODE_UP, \ } -#endif /* TIM_DEV_INFO_CONFIG */ +#endif /* TIM_DEV_INFO_CONFIG */ #ifdef BSP_USING_HWTMR2 #ifndef TMR2_CONFIG @@ -36,9 +36,9 @@ extern "C" { .tim_irqn = TMR2_GLOBAL_IRQn, \ .name = "timer2", \ } -#endif /* TMR2_CONFIG */ -#endif /* BSP_USING_HWTMR2 */ - +#endif /* TMR2_CONFIG */ +#endif /* BSP_USING_HWTMR2 */ + #ifdef BSP_USING_HWTMR3 #ifndef TMR3_CONFIG #define TMR3_CONFIG \ @@ -47,8 +47,8 @@ extern "C" { .tim_irqn = TMR3_GLOBAL_IRQn, \ .name = "timer3", \ } -#endif /* TMR3_CONFIG */ -#endif /* BSP_USING_HWTMR3 */ +#endif /* TMR3_CONFIG */ +#endif /* BSP_USING_HWTMR3 */ #ifdef BSP_USING_HWTMR4 #ifndef TMR4_CONFIG @@ -58,9 +58,9 @@ extern "C" { .tim_irqn = TMR4_GLOBAL_IRQn, \ .name = "timer4", \ } -#endif /* TMR4_CONFIG */ +#endif /* TMR4_CONFIG */ #endif /* BSP_USING_HWTMR4 */ - + #ifdef BSP_USING_HWTMR5 #ifndef TMR5_CONFIG #define TMR5_CONFIG \ @@ -69,9 +69,9 @@ extern "C" { .tim_irqn = TMR5_GLOBAL_IRQn, \ .name = "timer5", \ } -#endif /* TMR5_CONFIG */ -#endif /* BSP_USING_HWTMR5 */ - +#endif /* TMR5_CONFIG */ +#endif /* BSP_USING_HWTMR5 */ + #ifdef __cplusplus } #endif diff --git a/bsp/at32/Libraries/rt_drivers/drv_log.h b/bsp/at32/Libraries/rt_drivers/drv_log.h index a813acb0cb..d91f70d37c 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_log.h +++ b/bsp/at32/Libraries/rt_drivers/drv_log.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/Libraries/rt_drivers/drv_pwm.c b/bsp/at32/Libraries/rt_drivers/drv_pwm.c index 78b1b2d7a9..9a188681ed 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_pwm.c +++ b/bsp/at32/Libraries/rt_drivers/drv_pwm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -37,52 +37,52 @@ struct at32_pwm char *name; }; -static struct at32_pwm at32_pwm_obj[] = +static struct at32_pwm at32_pwm_obj[] = { #ifdef BSP_USING_TMR1_CH1 PWM1_CONFIG, #endif - + #ifdef BSP_USING_TMR1_CH2 PWM2_CONFIG, #endif - + #ifdef BSP_USING_TMR1_CH3 PWM3_CONFIG, #endif - + #ifdef BSP_USING_TMR1_CH4 PWM4_CONFIG, #endif - + #ifdef BSP_USING_TMR2_CH1 PWM5_CONFIG, #endif - + #ifdef BSP_USING_TMR2_CH2 PWM6_CONFIG, #endif - + #ifdef BSP_USING_TMR2_CH3 PWM7_CONFIG, #endif - + #ifdef BSP_USING_TMR2_CH4 PWM8_CONFIG, #endif - + #ifdef BSP_USING_TMR3_CH1 PWM9_CONFIG, #endif - + #ifdef BSP_USING_TMR3_CH2 PWM10_CONFIG, #endif - + #ifdef BSP_USING_TMR3_CH3 PWM11_CONFIG, #endif - + #ifdef BSP_USING_TMR3_CH4 PWM12_CONFIG, #endif @@ -97,7 +97,7 @@ static struct rt_pwm_ops drv_ops = static rt_err_t drv_pwm_enable(TMR_Type* TMRx, struct rt_pwm_configuration *configuration, rt_bool_t enable) { /* Get the value of channel */ - rt_uint32_t channel = configuration->channel; + rt_uint32_t channel = configuration->channel; if (!enable) { @@ -137,7 +137,7 @@ static rt_err_t drv_pwm_enable(TMR_Type* TMRx, struct rt_pwm_configuration *conf TMR_CCxCmd(TMRx, TMR_Channel_1, TMR_CCx_Enable); } } - + /* TMRx enable counter */ TMR_Cmd(TMRx, ENABLE); @@ -173,7 +173,7 @@ static rt_err_t drv_pwm_get(TMR_Type* TMRx, struct rt_pwm_configuration *configu configuration->pulse = (cc3 + 1) * (div + 1) * 1000UL / tim_clock; if(channel == 4) configuration->pulse = (cc4 + 1) * (div + 1) * 1000UL / tim_clock; - + return RT_EOK; } @@ -185,15 +185,15 @@ static rt_err_t drv_pwm_set(TMR_Type* TMRx, struct rt_pwm_configuration *configu rt_uint64_t psc; /* Get the channel number */ rt_uint32_t channel = configuration->channel; - + /* Init timer pin and enable clock */ at32_msp_tmr_init(TMRx); - + /* Convert nanosecond to frequency and duty cycle. */ period = (unsigned long long)configuration->period ; psc = period / MAX_PERIOD + 1; period = period / psc; - + /* TMRe base configuration */ TMR_TimeBaseStructInit(&TMR_TMReBaseStructure); TMR_TMReBaseStructure.TMR_Period = period; @@ -204,14 +204,14 @@ static rt_err_t drv_pwm_set(TMR_Type* TMRx, struct rt_pwm_configuration *configu TMR_TimeBaseInit(TMRx, &TMR_TMReBaseStructure); pulse = (unsigned long long)configuration->pulse; - + /* PWM1 Mode configuration: Channel1 */ TMR_OCStructInit(&TMR_OCInitStructure); TMR_OCInitStructure.TMR_OCMode = TMR_OCMode_PWM1; TMR_OCInitStructure.TMR_OutputState = TMR_OutputState_Enable; TMR_OCInitStructure.TMR_Pulse = pulse; TMR_OCInitStructure.TMR_OCPolarity = TMR_OCPolarity_High; - + if(channel == 1) { TMR_OC1Init(TMRx, &TMR_OCInitStructure); @@ -232,7 +232,7 @@ static rt_err_t drv_pwm_set(TMR_Type* TMRx, struct rt_pwm_configuration *configu TMR_OC4Init(TMRx, &TMR_OCInitStructure); TMR_OC4PreloadConfig(TMRx, TMR_OCPreload_Enable); } - + TMR_ARPreloadConfig(TMRx, ENABLE); #if defined (SOC_SERIES_AT32F415) @@ -271,7 +271,7 @@ static int rt_hw_pwm_init(void) { int i = 0; int result = RT_EOK; - + for(i = 0; i < sizeof(at32_pwm_obj) / sizeof(at32_pwm_obj[0]); i++) { if(rt_device_pwm_register(&at32_pwm_obj[i].pwm_device, at32_pwm_obj[i].name, &drv_ops, at32_pwm_obj[i].tim_handle) == RT_EOK) @@ -280,9 +280,9 @@ static int rt_hw_pwm_init(void) } else { - LOG_D("%s register failed", at32_pwm_obj[i].name); - result = -RT_ERROR; - } + LOG_D("%s register failed", at32_pwm_obj[i].name); + result = -RT_ERROR; + } } return result; diff --git a/bsp/at32/Libraries/rt_drivers/drv_pwm.h b/bsp/at32/Libraries/rt_drivers/drv_pwm.h index 6cdcfc6415..720a810f79 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_pwm.h +++ b/bsp/at32/Libraries/rt_drivers/drv_pwm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -28,7 +28,7 @@ extern "C" { } #endif /* PWM1_CONFIG */ #endif /* BSP_USING_TMR1_CH1 */ - + #ifdef BSP_USING_TMR1_CH2 #ifndef PWM2_CONFIG #define PWM2_CONFIG \ @@ -72,7 +72,7 @@ extern "C" { } #endif /* PWM5_CONFIG */ #endif /* BSP_USING_TMR2_CH1 */ - + #ifdef BSP_USING_TMR2_CH2 #ifndef PWM6_CONFIG #define PWM6_CONFIG \ @@ -82,8 +82,8 @@ extern "C" { .channel = 2 \ } #endif /* PWM6_CONFIG */ -#endif /* BSP_USING_TMR2_CH2 */ - +#endif /* BSP_USING_TMR2_CH2 */ + #ifdef BSP_USING_TMR2_CH3 #ifndef PWM7_CONFIG #define PWM7_CONFIG \ @@ -93,7 +93,7 @@ extern "C" { .channel = 3 \ } #endif /* PWM7_CONFIG */ -#endif /* BSP_USING_TMR2_CH3 */ +#endif /* BSP_USING_TMR2_CH3 */ #ifdef BSP_USING_TMR2_CH4 #ifndef PWM8_CONFIG @@ -115,7 +115,7 @@ extern "C" { .channel = 1 \ } #endif /* PWM9_CONFIG */ -#endif /* BSP_USING_TMR3_CH1 */ +#endif /* BSP_USING_TMR3_CH1 */ #ifdef BSP_USING_TMR3_CH2 #ifndef PWM10_CONFIG @@ -149,7 +149,7 @@ extern "C" { } #endif /* PWM12_CONFIG */ #endif /* BSP_USING_TMR3_CH4 */ - + #ifdef __cplusplus } #endif diff --git a/bsp/at32/Libraries/rt_drivers/drv_rtc.c b/bsp/at32/Libraries/rt_drivers/drv_rtc.c index bd4d89a9ed..d943123e88 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_rtc.c +++ b/bsp/at32/Libraries/rt_drivers/drv_rtc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -79,10 +79,10 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp) return -RT_ERROR; } #else - /* Set the RTC counter value */ - RTC_SetCounter(time_stamp); - /* Wait until last write operation on RTC registers has finished */ - RTC_WaitForLastTask(); + /* Set the RTC counter value */ + RTC_SetCounter(time_stamp); + /* Wait until last write operation on RTC registers has finished */ + RTC_WaitForLastTask(); #endif /* SOC_SERIES_AT32F415 */ LOG_D("set rtc time."); #ifdef SOC_SERIES_AT32F415 @@ -117,7 +117,7 @@ static rt_err_t rt_rtc_config(struct rt_device *dev) ERTC_InitType ERTC_InitStructure; #endif /* Allow access to BKP Domain */ - PWR_BackupAccessCtrl(ENABLE); + PWR_BackupAccessCtrl(ENABLE); #ifdef SOC_SERIES_AT32F415 #ifdef BSP_RTC_USING_LSI @@ -148,7 +148,7 @@ static rt_err_t rt_rtc_config(struct rt_device *dev) #else if (BKP_ReadBackupReg(BKP_DT1) != BKUP_REG_DATA) #endif - { + { LOG_I("RTC hasn't been configured, please use command to config."); #ifdef SOC_SERIES_AT32F415 /* Configure the ERTC data register and ERTC prescaler */ diff --git a/bsp/at32/Libraries/rt_drivers/drv_sdio.c b/bsp/at32/Libraries/rt_drivers/drv_sdio.c index eb721033b5..9bbfa910c2 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_sdio.c +++ b/bsp/at32/Libraries/rt_drivers/drv_sdio.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/Libraries/rt_drivers/drv_sdio.h b/bsp/at32/Libraries/rt_drivers/drv_sdio.h index cd0f05b9fb..de993881c9 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_sdio.h +++ b/bsp/at32/Libraries/rt_drivers/drv_sdio.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.c b/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.c index 266209c245..3112da34f8 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.c +++ b/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -205,10 +205,10 @@ int rt_hw_i2c_init(void) result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); at32_i2c_bus_unlock(&soft_i2c_config[i]); - + LOG_D("software simulation %s init done, pin scl: %d, pin sda %d", - soft_i2c_config[i].bus_name, - soft_i2c_config[i].scl, + soft_i2c_config[i].bus_name, + soft_i2c_config[i].scl, soft_i2c_config[i].sda); } diff --git a/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.h b/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.h index 2743259ef6..193c8cd4aa 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.h +++ b/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -37,7 +37,7 @@ struct at32_i2c .bus_name = "i2c1", \ } #endif - + #ifdef BSP_USING_I2C2 #define i2c_bus_CONFIG \ { \ @@ -46,7 +46,7 @@ struct at32_i2c .bus_name = "i2c2", \ } #endif - + #ifdef BSP_USING_I2C3 #define I2C3_BUS_CONFIG \ { \ @@ -55,7 +55,7 @@ struct at32_i2c .bus_name = "i2c3", \ } #endif - + #ifdef BSP_USING_I2C4 #define I2C4_BUS_CONFIG \ { \ diff --git a/bsp/at32/Libraries/rt_drivers/drv_spi.c b/bsp/at32/Libraries/rt_drivers/drv_spi.c index c7821d4053..161845702f 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_spi.c +++ b/bsp/at32/Libraries/rt_drivers/drv_spi.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2020-01-09 shelton first version */ - + #include #include "drv_spi.h" @@ -24,7 +24,7 @@ #ifdef DEBUG #define DEBUG_PRINTF(...) rt_kprintf(__VA_ARGS__) #else -#define DEBUG_PRINTF(...) +#define DEBUG_PRINTF(...) #endif /* private rt-thread spi ops function */ @@ -81,13 +81,13 @@ rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration) { - struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus; + struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus; struct at32_spi *spi_instance = (struct at32_spi *)spi_bus->parent.user_data; - + SPI_InitType SPI_InitStruct; - RT_ASSERT(device != RT_NULL); - RT_ASSERT(configuration != RT_NULL); + RT_ASSERT(device != RT_NULL); + RT_ASSERT(configuration != RT_NULL); at32_msp_spi_init(spi_instance->config->spix); @@ -162,7 +162,7 @@ static rt_err_t configure(struct rt_spi_device* device, SPI_InitStruct.SPI_MCLKP = SPI_MCLKP_256; } } /* baudrate */ - + switch(configuration->mode & RT_SPI_MODE_3) { case RT_SPI_MODE_0: @@ -172,11 +172,11 @@ static rt_err_t configure(struct rt_spi_device* device, case RT_SPI_MODE_1: SPI_InitStruct.SPI_CPHA = SPI_CPHA_2EDGE; SPI_InitStruct.SPI_CPOL = SPI_CPOL_LOW; - break; + break; case RT_SPI_MODE_2: SPI_InitStruct.SPI_CPHA = SPI_CPHA_1EDGE; SPI_InitStruct.SPI_CPOL = SPI_CPOL_HIGH; - break; + break; case RT_SPI_MODE_3: SPI_InitStruct.SPI_CPHA = SPI_CPHA_2EDGE; SPI_InitStruct.SPI_CPOL = SPI_CPOL_HIGH; @@ -200,7 +200,7 @@ static rt_err_t configure(struct rt_spi_device* device, /* init SPI */ SPI_Init(spi_instance->config->spix, &SPI_InitStruct); /* Enable SPI_MASTER */ - SPI_Enable(spi_instance->config->spix, ENABLE); + SPI_Enable(spi_instance->config->spix, ENABLE); SPI_CRCEN(spi_instance->config->spix, DISABLE); return RT_EOK; @@ -213,9 +213,9 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes struct rt_spi_configuration * config = &device->config; struct at32_spi_cs * at32_spi_cs = device->parent.user_data; - RT_ASSERT(device != NULL); - RT_ASSERT(message != NULL); - + RT_ASSERT(device != NULL); + RT_ASSERT(message != NULL); + /* take CS */ if(message->cs_take) { @@ -229,7 +229,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes const rt_uint8_t * send_ptr = message->send_buf; rt_uint8_t * recv_ptr = message->recv_buf; rt_uint32_t size = message->length; - + DEBUG_PRINTF("spi poll transfer start: %d\n", size); while(size--) @@ -240,12 +240,12 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes { data = *send_ptr++; } - + // Todo: replace register read/write by at32 lib //Wait until the transmit buffer is empty while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_TE)); // Send the byte - SPI_I2S_TxData(spi_instance->config->spix, data); + SPI_I2S_TxData(spi_instance->config->spix, data); //Wait until a data is received while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_RNE)); @@ -277,7 +277,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes //Wait until the transmit buffer is empty while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_TE)); // Send the byte - SPI_I2S_TxData(spi_instance->config->spix, data); + SPI_I2S_TxData(spi_instance->config->spix, data); //Wait until a data is received while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_RNE)); @@ -295,7 +295,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes /* release CS */ if(message->cs_release) { - GPIO_SetBits(at32_spi_cs->GPIOx, at32_spi_cs->GPIO_Pin); + GPIO_SetBits(at32_spi_cs->GPIOx, at32_spi_cs->GPIO_Pin); DEBUG_PRINTF("spi release cs\n"); } @@ -306,7 +306,7 @@ static struct at32_spi_config configs[] = { #ifdef BSP_USING_SPI1 {SPI1, "spi1"}, #endif - + #ifdef BSP_USING_SPI2 {SPI2, "spi2"}, #endif diff --git a/bsp/at32/Libraries/rt_drivers/drv_spi.h b/bsp/at32/Libraries/rt_drivers/drv_spi.h index d3134b00f0..cd90c9b2b0 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_spi.h +++ b/bsp/at32/Libraries/rt_drivers/drv_spi.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/Libraries/rt_drivers/drv_sram.c b/bsp/at32/Libraries/rt_drivers/drv_sram.c index e601b0e1a5..d77b900728 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_sram.c +++ b/bsp/at32/Libraries/rt_drivers/drv_sram.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -38,7 +38,7 @@ static int rt_hw_sram_Init(void) /* Init XMC pin */ at32_msp_xmc_init(XMC); - + /*-- FSMC Configuration ------------------------------------------------------*/ p.XMC_AdrOpTime = 0x04; p.XMC_AdrHoldTime = 0x04; @@ -53,7 +53,7 @@ static int rt_hw_sram_Init(void) XMC_NORSRAMInitStructure.XMC_Dev = XMC_Dev_SRAM; XMC_NORSRAMInitStructure.XMC_BusType = XMC_BusType_16b; XMC_NORSRAMInitStructure.XMC_EnableBurstMode = XMC_BurstMode_Disable; - XMC_NORSRAMInitStructure.XMC_EnableAsynWait = XMC_AsynWait_Disable; + XMC_NORSRAMInitStructure.XMC_EnableAsynWait = XMC_AsynWait_Disable; XMC_NORSRAMInitStructure.XMC_WaitSignalLv = XMC_WaitSignalLv_Low; XMC_NORSRAMInitStructure.XMC_EnableBurstModeSplit = XMC_BurstModeSplit_Disable; XMC_NORSRAMInitStructure.XMC_WaitSignalConfig = XMC_WaitSignalConfig_BeforeWaitState; @@ -63,9 +63,9 @@ static int rt_hw_sram_Init(void) XMC_NORSRAMInitStructure.XMC_WriteBurstSyn = XMC_WriteBurstSyn_Disable; XMC_NORSRAMInitStructure.XMC_RWTimingStruct = &p; XMC_NORSRAMInitStructure.XMC_WTimingStruct = &p; - - XMC_NORSRAMInit(&XMC_NORSRAMInitStructure); - + + XMC_NORSRAMInit(&XMC_NORSRAMInitStructure); + /*!< Enable FSMC Bank1_SRAM Bank */ XMC_NORSRAMCmd(XMC_Bank1_NORSRAM3, ENABLE); @@ -73,7 +73,7 @@ static int rt_hw_sram_Init(void) /* If RT_USING_MEMHEAP_AS_HEAP is enabled, SRAM is initialized to the heap */ rt_memheap_init(&system_heap, "sram", (void *)EXT_SRAM_BEGIN, SRAM_LENGTH); #endif - + return result; } INIT_BOARD_EXPORT(rt_hw_sram_Init); @@ -81,11 +81,11 @@ INIT_BOARD_EXPORT(rt_hw_sram_Init); #ifdef DRV_DEBUG #ifdef FINSH_USING_MSH /** - * @brief Writes a Half-word buffer to the FSMC SRAM memory. - * @param pBuffer : pointer to buffer. - * @param WriteAddr : SRAM memory internal address from which the data will be + * @brief Writes a Half-word buffer to the FSMC SRAM memory. + * @param pBuffer : pointer to buffer. + * @param WriteAddr : SRAM memory internal address from which the data will be * written. - * @param NumHalfwordToWrite : number of half-words to write. + * @param NumHalfwordToWrite : number of half-words to write. * @retval None */ static void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite) @@ -94,15 +94,15 @@ static void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t Num { /*!< Transfer data to the memory */ *(uint16_t *) (EXT_SRAM_BEGIN + WriteAddr) = *pBuffer++; - - /*!< Increment the address*/ + + /*!< Increment the address*/ WriteAddr += 2; - } + } } /** * @brief Reads a block of data from the FSMC SRAM memory. - * @param pBuffer : pointer to the buffer that receives the data read from the + * @param pBuffer : pointer to the buffer that receives the data read from the * SRAM memory. * @param ReadAddr : SRAM memory internal address to read from. * @param NumHalfwordToRead : number of half-words to read. @@ -115,9 +115,9 @@ static void SRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHa /*!< Read a half-word from the memory */ *pBuffer++ = *(__IO uint16_t*) (EXT_SRAM_BEGIN + ReadAddr); - /*!< Increment the address*/ + /*!< Increment the address*/ ReadAddr += 2; - } + } } /** @@ -146,9 +146,9 @@ int sram_test(void) /* Read data from XMC SRAM memory */ - SRAM_ReadBuffer(RT_RxBuffer, RT_WRITE_READ_ADDR, RT_BUFFER_SIZE); + SRAM_ReadBuffer(RT_RxBuffer, RT_WRITE_READ_ADDR, RT_BUFFER_SIZE); - /* Read back SRAM memory and check content correctness */ + /* Read back SRAM memory and check content correctness */ for (Index = 0x00; (Index < RT_BUFFER_SIZE) && (WriteReadStatus == 0); Index++) { if (RT_RxBuffer[Index] != RT_TxBuffer[Index]) @@ -156,7 +156,7 @@ int sram_test(void) WriteReadStatus = Index + 1; } } - + if(WriteReadStatus == 0) { LOG_D("SRAM test success!"); @@ -165,7 +165,7 @@ int sram_test(void) { LOG_E("SRAM test failed!"); } - + return RT_EOK; } MSH_CMD_EXPORT(sram_test, sram test) diff --git a/bsp/at32/Libraries/rt_drivers/drv_sram.h b/bsp/at32/Libraries/rt_drivers/drv_sram.h index 05b07e4155..0f83c429d8 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_sram.h +++ b/bsp/at32/Libraries/rt_drivers/drv_sram.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/Libraries/rt_drivers/drv_usart.c b/bsp/at32/Libraries/rt_drivers/drv_usart.c index 226d9afeda..04838bf2ac 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_usart.c +++ b/bsp/at32/Libraries/rt_drivers/drv_usart.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2020, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -15,7 +15,7 @@ #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && \ !defined(BSP_USING_UART3) #error "Please define at least one BSP_USING_UARTx" - /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ + /* this driver can be disabled at menuconfig 鈫 RT-Thread Components 鈫 Device Drivers */ #endif struct at32_usart { diff --git a/bsp/at32/Libraries/rt_drivers/drv_usart.h b/bsp/at32/Libraries/rt_drivers/drv_usart.h index 1002a6fd51..fc493d42da 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_usart.h +++ b/bsp/at32/Libraries/rt_drivers/drv_usart.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/Libraries/rt_drivers/drv_wdt.c b/bsp/at32/Libraries/rt_drivers/drv_wdt.c index 8ab3de703d..0b304ad1ff 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_wdt.c +++ b/bsp/at32/Libraries/rt_drivers/drv_wdt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/at32f403a-start/applications/main.c b/bsp/at32/at32f403a-start/applications/main.c index cb63824e27..0234d32b04 100644 --- a/bsp/at32/at32f403a-start/applications/main.c +++ b/bsp/at32/at32f403a-start/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/at32f403a-start/board/board.c b/bsp/at32/at32f403a-start/board/board.c index 4ce5bb3909..27b672b4da 100644 --- a/bsp/at32/at32f403a-start/board/board.c +++ b/bsp/at32/at32f403a-start/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 balanceTWK first version */ - + #include #include #include diff --git a/bsp/at32/at32f403a-start/board/board.h b/bsp/at32/at32f403a-start/board/board.h index 976863d3eb..1f2a4f3f3c 100644 --- a/bsp/at32/at32f403a-start/board/board.h +++ b/bsp/at32/at32f403a-start/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/at32f403a-start/board/msp/at32_msp.c b/bsp/at32/at32f403a-start/board/msp/at32_msp.c index 1392b0e0cf..5d159850cc 100644 --- a/bsp/at32/at32f403a-start/board/msp/at32_msp.c +++ b/bsp/at32/at32f403a-start/board/msp/at32_msp.c @@ -195,34 +195,34 @@ void at32_msp_adc_init(void *Instance) GPIO_InitType GPIO_InitStruct; ADC_Type *ADCx = (ADC_Type *)Instance; -#ifdef BSP_USING_ADC1 +#ifdef BSP_USING_ADC1 if(ADCx == ADC1) - { + { /* ADC1 & GPIO clock enable */ RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC1 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE); - - /* Configure ADC Channel as analog input */ + + /* Configure ADC Channel as analog input */ GPIO_StructInit(&GPIO_InitStruct); GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG; GPIO_Init(GPIOC, &GPIO_InitStruct); - + } #endif -#ifdef BSP_USING_ADC2 +#ifdef BSP_USING_ADC2 if(ADCx == ADC2) { /* ADC2 & GPIO clock enable */ RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC2 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE); - - /* Configure ADC Channel as analog input */ + + /* Configure ADC Channel as analog input */ GPIO_StructInit(&GPIO_InitStruct); GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG; GPIO_Init(GPIOC, &GPIO_InitStruct); } -#endif +#endif } #endif /* BSP_USING_ADC */ @@ -237,7 +237,7 @@ void at32_msp_hwtmr_init(void *Instance) /* TMR3 clock enable */ RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE); } -#endif +#endif #ifdef BSP_USING_HWTMR4 if(TMRx == TMR4) diff --git a/bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c b/bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c index ce151e2d4a..edd9b8d1d6 100644 --- a/bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c +++ b/bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c @@ -17,7 +17,7 @@ * *

© COPYRIGHT 2018 ArteryTek

****************************************************************************** - */ + */ /** @addtogroup CMSIS * @{ @@ -68,23 +68,23 @@ Clock (MHz) PLL from HSE or HSI - SYSCLK HCLK PCLK2 PCLK1 - 24 24 24 24 - 36 36 36 36 - 48 48 48 24 - 56 56 56 28 - 72 72 72 36 - 96 96 48 48 - 108 108 54 54 - 120 120 60 60 - 144 144 72 72 - 150 150 75 75 - 168 168 84 84 - 176 176 88 88 - 192 192 96 96 - 200 200 100 100 - 224 224 112 112 - 240 240 120 120 + SYSCLK HCLK PCLK2 PCLK1 + 24 24 24 24 + 36 36 36 36 + 48 48 48 24 + 56 56 56 28 + 72 72 72 36 + 96 96 48 48 + 108 108 54 54 + 120 120 60 60 + 144 144 72 72 + 150 150 75 75 + 168 168 84 84 + 176 176 88 88 + 192 192 96 96 + 200 200 100 100 + 224 224 112 112 + 240 240 120 120 */ #if defined (AT32F403xx) || defined (AT32F413xx) || \ @@ -143,7 +143,7 @@ /*!< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. */ /* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. This value must be a multiple of 0x200. */ @@ -573,7 +573,7 @@ static void SetSysClock(void) /** * @brief Setup the external memory controller. * Called in startup_at32f4xx_xx.s/.c before jump to main. - * This function configures the external SRAM mounted + * This function configures the external SRAM mounted * (AT32 High density devices). This SRAM will be used as program * data memory (including heap and stack). * @param None @@ -654,7 +654,7 @@ static void SetSysClockToHSE(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -674,7 +674,7 @@ static void SetSysClockToHSE(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -725,7 +725,7 @@ static void SetSysClockTo24M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -745,7 +745,7 @@ static void SetSysClockTo24M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -811,7 +811,7 @@ static void SetSysClockTo36M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -831,7 +831,7 @@ static void SetSysClockTo36M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -897,7 +897,7 @@ static void SetSysClockTo48M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -917,7 +917,7 @@ static void SetSysClockTo48M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -984,7 +984,7 @@ static void SetSysClockTo56M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1004,7 +1004,7 @@ static void SetSysClockTo56M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1071,7 +1071,7 @@ static void SetSysClockTo72M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1091,7 +1091,7 @@ static void SetSysClockTo72M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1158,7 +1158,7 @@ static void SetSysClockTo96M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1178,7 +1178,7 @@ static void SetSysClockTo96M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1249,7 +1249,7 @@ static void SetSysClockTo108M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1269,7 +1269,7 @@ static void SetSysClockTo108M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1341,7 +1341,7 @@ static void SetSysClockTo120M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1361,7 +1361,7 @@ static void SetSysClockTo120M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1440,7 +1440,7 @@ static void SetSysClockTo144M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1460,7 +1460,7 @@ static void SetSysClockTo144M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1475,7 +1475,7 @@ static void SetSysClockTo144M(void) /* PLL configuration: PLLCLK = HSE * 18 = 144 MHz */ RCC->CFG &= RCC_CFG_PLLCFG_MASK; - + #if defined (AT32F415xx) RCC->CFG |= (uint32_t)(RCC_CFG_PLLRC_HSE | RCC_CFG_PLLMULT18); #else @@ -1539,7 +1539,7 @@ static void SetSysClockTo150M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1559,7 +1559,7 @@ static void SetSysClockTo150M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1634,7 +1634,7 @@ static void SetSysClockTo168M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1720,7 +1720,7 @@ static void SetSysClockTo176M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1806,7 +1806,7 @@ static void SetSysClockTo192M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1892,7 +1892,7 @@ static void SetSysClockTo200M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1978,7 +1978,7 @@ static void SetSysClockTo224M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -2064,7 +2064,7 @@ static void SetSysClockTo240M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -2168,7 +2168,7 @@ static void SetSysClockTo24MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2248,7 +2248,7 @@ static void SetSysClockTo36MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2328,7 +2328,7 @@ static void SetSysClockTo48MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2408,7 +2408,7 @@ static void SetSysClockTo56MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2488,7 +2488,7 @@ static void SetSysClockTo72MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2568,7 +2568,7 @@ static void SetSysClockTo96MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2653,7 +2653,7 @@ static void SetSysClockTo108MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2738,7 +2738,7 @@ static void SetSysClockTo120MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2830,7 +2830,7 @@ static void SetSysClockTo144MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2922,7 +2922,7 @@ static void SetSysClockTo150MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -3454,4 +3454,4 @@ static void SetSysClockTo240MHSI(void) * @} */ -/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/ +/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/ diff --git a/bsp/at32/at32f407-start/applications/main.c b/bsp/at32/at32f407-start/applications/main.c index cb63824e27..0234d32b04 100644 --- a/bsp/at32/at32f407-start/applications/main.c +++ b/bsp/at32/at32f407-start/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/at32f407-start/board/board.c b/bsp/at32/at32f407-start/board/board.c index 4ce5bb3909..27b672b4da 100644 --- a/bsp/at32/at32f407-start/board/board.c +++ b/bsp/at32/at32f407-start/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 balanceTWK first version */ - + #include #include #include diff --git a/bsp/at32/at32f407-start/board/board.h b/bsp/at32/at32f407-start/board/board.h index 976863d3eb..1f2a4f3f3c 100644 --- a/bsp/at32/at32f407-start/board/board.h +++ b/bsp/at32/at32f407-start/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/at32/at32f407-start/board/msp/at32_msp.c b/bsp/at32/at32f407-start/board/msp/at32_msp.c index 1392b0e0cf..5d159850cc 100644 --- a/bsp/at32/at32f407-start/board/msp/at32_msp.c +++ b/bsp/at32/at32f407-start/board/msp/at32_msp.c @@ -195,34 +195,34 @@ void at32_msp_adc_init(void *Instance) GPIO_InitType GPIO_InitStruct; ADC_Type *ADCx = (ADC_Type *)Instance; -#ifdef BSP_USING_ADC1 +#ifdef BSP_USING_ADC1 if(ADCx == ADC1) - { + { /* ADC1 & GPIO clock enable */ RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC1 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE); - - /* Configure ADC Channel as analog input */ + + /* Configure ADC Channel as analog input */ GPIO_StructInit(&GPIO_InitStruct); GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG; GPIO_Init(GPIOC, &GPIO_InitStruct); - + } #endif -#ifdef BSP_USING_ADC2 +#ifdef BSP_USING_ADC2 if(ADCx == ADC2) { /* ADC2 & GPIO clock enable */ RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC2 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE); - - /* Configure ADC Channel as analog input */ + + /* Configure ADC Channel as analog input */ GPIO_StructInit(&GPIO_InitStruct); GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG; GPIO_Init(GPIOC, &GPIO_InitStruct); } -#endif +#endif } #endif /* BSP_USING_ADC */ @@ -237,7 +237,7 @@ void at32_msp_hwtmr_init(void *Instance) /* TMR3 clock enable */ RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE); } -#endif +#endif #ifdef BSP_USING_HWTMR4 if(TMRx == TMR4) diff --git a/bsp/at32/at32f407-start/board/msp/system_at32f4xx.c b/bsp/at32/at32f407-start/board/msp/system_at32f4xx.c index efda1bc90b..3205197d67 100644 --- a/bsp/at32/at32f407-start/board/msp/system_at32f4xx.c +++ b/bsp/at32/at32f407-start/board/msp/system_at32f4xx.c @@ -17,7 +17,7 @@ * *

© COPYRIGHT 2018 ArteryTek

****************************************************************************** - */ + */ /** @addtogroup CMSIS * @{ @@ -68,23 +68,23 @@ Clock (MHz) PLL from HSE or HSI - SYSCLK HCLK PCLK2 PCLK1 - 24 24 24 24 - 36 36 36 36 - 48 48 48 24 - 56 56 56 28 - 72 72 72 36 - 96 96 48 48 - 108 108 54 54 - 120 120 60 60 - 144 144 72 72 - 150 150 75 75 - 168 168 84 84 - 176 176 88 88 - 192 192 96 96 - 200 200 100 100 - 224 224 112 112 - 240 240 120 120 + SYSCLK HCLK PCLK2 PCLK1 + 24 24 24 24 + 36 36 36 36 + 48 48 48 24 + 56 56 56 28 + 72 72 72 36 + 96 96 48 48 + 108 108 54 54 + 120 120 60 60 + 144 144 72 72 + 150 150 75 75 + 168 168 84 84 + 176 176 88 88 + 192 192 96 96 + 200 200 100 100 + 224 224 112 112 + 240 240 120 120 */ #if defined (AT32F403xx) || defined (AT32F413xx) || \ @@ -143,7 +143,7 @@ /*!< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. */ /* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. This value must be a multiple of 0x200. */ @@ -573,7 +573,7 @@ static void SetSysClock(void) /** * @brief Setup the external memory controller. * Called in startup_at32f4xx_xx.s/.c before jump to main. - * This function configures the external SRAM mounted + * This function configures the external SRAM mounted * (AT32 High density devices). This SRAM will be used as program * data memory (including heap and stack). * @param None @@ -654,7 +654,7 @@ static void SetSysClockToHSE(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -674,7 +674,7 @@ static void SetSysClockToHSE(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -725,7 +725,7 @@ static void SetSysClockTo24M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -745,7 +745,7 @@ static void SetSysClockTo24M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -811,7 +811,7 @@ static void SetSysClockTo36M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -831,7 +831,7 @@ static void SetSysClockTo36M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -897,7 +897,7 @@ static void SetSysClockTo48M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -917,7 +917,7 @@ static void SetSysClockTo48M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -984,7 +984,7 @@ static void SetSysClockTo56M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1004,7 +1004,7 @@ static void SetSysClockTo56M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1071,7 +1071,7 @@ static void SetSysClockTo72M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1091,7 +1091,7 @@ static void SetSysClockTo72M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1158,7 +1158,7 @@ static void SetSysClockTo96M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1178,7 +1178,7 @@ static void SetSysClockTo96M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1249,7 +1249,7 @@ static void SetSysClockTo108M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1269,7 +1269,7 @@ static void SetSysClockTo108M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1341,7 +1341,7 @@ static void SetSysClockTo120M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1361,7 +1361,7 @@ static void SetSysClockTo120M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1440,7 +1440,7 @@ static void SetSysClockTo144M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1460,7 +1460,7 @@ static void SetSysClockTo144M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1475,7 +1475,7 @@ static void SetSysClockTo144M(void) /* PLL configuration: PLLCLK = HSE * 18 = 144 MHz */ RCC->CFG &= RCC_CFG_PLLCFG_MASK; - + #if defined (AT32F415xx) RCC->CFG |= (uint32_t)(RCC_CFG_PLLRC_HSE | RCC_CFG_PLLMULT18); #else @@ -1539,7 +1539,7 @@ static void SetSysClockTo150M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1559,7 +1559,7 @@ static void SetSysClockTo150M(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -1634,7 +1634,7 @@ static void SetSysClockTo168M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1720,7 +1720,7 @@ static void SetSysClockTo176M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1806,7 +1806,7 @@ static void SetSysClockTo192M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1892,7 +1892,7 @@ static void SetSysClockTo200M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -1978,7 +1978,7 @@ static void SetSysClockTo224M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -2064,7 +2064,7 @@ static void SetSysClockTo240M(void) StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); -#ifdef AT32F403xx +#ifdef AT32F403xx WaitHseStbl(HSE_STABLE_DELAY); #endif if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET) @@ -2168,7 +2168,7 @@ static void SetSysClockTo24MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2248,7 +2248,7 @@ static void SetSysClockTo36MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2328,7 +2328,7 @@ static void SetSysClockTo48MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2408,7 +2408,7 @@ static void SetSysClockTo56MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2488,7 +2488,7 @@ static void SetSysClockTo72MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2568,7 +2568,7 @@ static void SetSysClockTo96MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2653,7 +2653,7 @@ static void SetSysClockTo108MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2738,7 +2738,7 @@ static void SetSysClockTo120MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2830,7 +2830,7 @@ static void SetSysClockTo144MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -2922,7 +2922,7 @@ static void SetSysClockTo150MHSI(void) /* Flash 1 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4; #endif /* HCLK = SYSCLK */ RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1; @@ -3454,4 +3454,4 @@ static void SetSysClockTo240MHSI(void) * @} */ -/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/ +/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/ diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig b/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig index decdf156d7..2bdce74a2d 100644 --- a/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig +++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig @@ -176,6 +176,10 @@ menu "On-chip Peripheral Drivers" config RTC_USING_INTERNAL_CLK bool "Using internal clock RTC" default y + config RTC_USING_1S_INT + bool "Using 1 second interrupt" + depends on RT_USING_ALARM + default n endif menuconfig BSP_USING_ADC diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c b/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c index 4f462e9040..4749ba51ef 100644 --- a/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c +++ b/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c @@ -7,6 +7,7 @@ * Date Author Notes * 2021-01-28 greedyhao first version * 2021-03-19 iysheng modify just set time first power up + * 2021-03-26 iysheng add alarm and 1s interrupt support */ #include "board.h" @@ -134,15 +135,22 @@ void hal_rtc_init(void) irtc_time_write(RTCCNT_CMD, sec); } +#ifdef RT_USING_ALARM + RTCCON |= RTC_CON_ALM_INTERRUPT; +#ifdef RTC_USING_1S_INT + RTCCON |= RTC_CON_1S_INTERRUPT; +#endif +#endif } /************** HAL End *******************/ -static time_t get_rtc_timestamp(void) +static time_t get_rtc_time_stamp(void) { time_t sec = 0; sec = irtc_time_read(RTCCNT_CMD); LOG_D("get rtc time."); + return sec; } @@ -153,6 +161,22 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp) return RT_EOK; } +static rt_err_t set_rtc_alarm_stamp(time_t alarm_stamp) +{ + irtc_time_write(RTCALM_CMD, alarm_stamp); + + return RT_EOK; +} + +static time_t get_rtc_alarm_stamp(void) +{ + time_t sec = 0; + + sec = irtc_time_read(RTCALM_CMD); + + return sec; +} + static void rt_rtc_init(void) { hal_rtc_init(); @@ -165,8 +189,8 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) switch (cmd) { case RT_DEVICE_CTRL_RTC_GET_TIME: - *(rt_uint32_t *)args = get_rtc_timestamp(); - LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args); + *(rt_uint32_t *)args = get_rtc_time_stamp(); + LOG_D("RTC: get rtc_time %x", *(rt_uint32_t *)args); break; case RT_DEVICE_CTRL_RTC_SET_TIME: @@ -174,7 +198,18 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args) { result = -RT_ERROR; } - LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args); + LOG_D("RTC: set rtc_time %x", *(rt_uint32_t *)args); + break; + case RT_DEVICE_CTRL_RTC_SET_ALARM: + if (set_rtc_alarm_stamp(*(rt_uint32_t *)args)) + { + result = -RT_ERROR; + } + LOG_D("RTC: set alarm_stamp %x", *(rt_uint32_t *)args); + break; + case RT_DEVICE_CTRL_RTC_GET_ALARM: + *(rt_uint32_t *)args = get_rtc_alarm_stamp(); + LOG_D("RTC: get alarm_stamp %x", *(rt_uint32_t *)args); break; } @@ -217,15 +252,41 @@ static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint return rt_device_register(device, name, flag); } +#ifdef RT_USING_ALARM +static void rtc_isr(int vector, void *param) +{ + rt_interrupt_enter(); + + if (RTCCON & RTC_CON_ALM_PEND) + { + RTCCPND |= RTC_CPND_ALM; + } + +#ifdef RTC_USING_1S_INT + if (RTCCON & RTC_CON_1S_PEND) + { + RTCCPND |= RTC_CPND_1S; + } +#endif + + rt_interrupt_leave(); +} +#endif + int rt_hw_rtc_init(void) { rt_err_t result; + result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR); if (result != RT_EOK) { LOG_E("rtc register err code: %d", result); return result; } + +#ifdef RT_USING_ALARM + rt_hw_interrupt_install(IRQ_RTC_VECTOR, rtc_isr, RT_NULL, "rtc_isr"); +#endif LOG_D("rtc init success"); return RT_EOK; } diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rtc.h b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rtc.h index 483f3e3f42..6961d8da90 100644 --- a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rtc.h +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rtc.h @@ -32,6 +32,10 @@ enum #define RTC_CON_BAUD_SELECT (0x3u << 1) /*!< Increase clock selection */ #define RTC_CON_CHIP_SELECT (0x1u << 0) /*!< RTC chip select */ +// RTCCPND +#define RTC_CPND_1S (0x1u << 18) /*!< Clear RTC 1S pending */ +#define RTC_CPND_ALM (0x1u << 17) /*!< Clear RTC alarm pendind */ + // RTCCON0 #define RTC_CON0_PWRUP_FIRST (0x01u << 7) /*!< RTC first power up flag */ #define RTC_CON0_INTERNAL_32K (0x01u << 6) /*!< Internal 32K select */ diff --git a/bsp/efm32/EFM32GG_DK3750/dvk.h b/bsp/efm32/EFM32GG_DK3750/dvk.h index 41af36b264..870c8b4121 100644 --- a/bsp/efm32/EFM32GG_DK3750/dvk.h +++ b/bsp/efm32/EFM32GG_DK3750/dvk.h @@ -164,7 +164,7 @@ int DVK_BRD3600A_usbVBUSGetOCFlagState(void); /* For "backward compatibility" with DVK */ /** DVK_enablePeripheral() backward compatibility */ -#define DVK_enablePeripheral(X) DVK_peripheralAccess(X, true) +#define DVK_enablePeripheral(X) DVK_peripheralAccess(X, true) /** DVK_disablePeripheral() backward compatibility */ #define DVK_disablePeripheral(X) DVK_peripheralAccess(X, false) @@ -193,7 +193,7 @@ __STATIC_INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr) /**************************************************************************//** * @brief Read data from 16-bit board control register * @param addr Register to read - * @return Value of board controller register + * @return Value of board controller register *****************************************************************************/ __STATIC_INLINE uint16_t DVK_readRegister(volatile uint16_t *addr) { diff --git a/bsp/efm32/EFM32GG_DK3750/trace.c b/bsp/efm32/EFM32GG_DK3750/trace.c index 5450de0270..2d5ffd71a5 100644 --- a/bsp/efm32/EFM32GG_DK3750/trace.c +++ b/bsp/efm32/EFM32GG_DK3750/trace.c @@ -125,7 +125,7 @@ void TRACE_SWOSetup(void) /**************************************************************************//** * @brief Profiler configuration for EFM32GG990F11024/EFM32GG-DK3750 * @return true if energyAware Profiler/SWO is enabled, false if not - * @note If first word of the user page is zero, this will not + * @note If first word of the user page is zero, this will not * enable SWO profiler output *****************************************************************************/ bool TRACE_ProfilerSetup(void) @@ -141,7 +141,7 @@ bool TRACE_ProfilerSetup(void) { TRACE_SWOSetup(); return true; - } + } } /** @} (end group BSP) */ diff --git a/bsp/efm32/EFM32GG_DK3750/trace.h b/bsp/efm32/EFM32GG_DK3750/trace.h index c45e35846c..0a812381ef 100644 --- a/bsp/efm32/EFM32GG_DK3750/trace.h +++ b/bsp/efm32/EFM32GG_DK3750/trace.h @@ -58,7 +58,7 @@ bool TRACE_ProfilerSetup(void); * for TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run, * no example project will enable SWO trace. * @param[in] enable - * @note Add "em_msc.c" to build to use this function. + * @note Add "em_msc.c" to build to use this function. *****************************************************************************/ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable) { @@ -69,7 +69,7 @@ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable) data = *userpage; if(enable) { - if(data == 0xFFFFFFFF) + if(data == 0xFFFFFFFF) { return; } diff --git a/bsp/efm32/EFM32_Gxxx_DK/dvk.c b/bsp/efm32/EFM32_Gxxx_DK/dvk.c index 38569358e5..b1489c6c79 100644 --- a/bsp/efm32/EFM32_Gxxx_DK/dvk.c +++ b/bsp/efm32/EFM32_Gxxx_DK/dvk.c @@ -52,7 +52,7 @@ bool DVK_init(void) #endif #ifdef DVK_SPI_CONTROL ret = DVK_SPI_init(); -#endif +#endif if ( ret == false ) { /* Board is configured in wrong mode, please restart KIT! */ diff --git a/bsp/efm32/EFM32_Gxxx_DK/dvk_bcregisters.h b/bsp/efm32/EFM32_Gxxx_DK/dvk_bcregisters.h index 813d22e545..70b427d7ff 100644 --- a/bsp/efm32/EFM32_Gxxx_DK/dvk_bcregisters.h +++ b/bsp/efm32/EFM32_Gxxx_DK/dvk_bcregisters.h @@ -73,7 +73,7 @@ #define BC_HW_VERSION ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x14)) /**< HW version */ #define BC_FW_BUILDNO ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x15)) /**< FW build number */ #define BC_FW_VERSION ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x16)) /**< FW version */ -#define BC_SCRATCH_COMMON ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x17)) /**< Scratch common */ +#define BC_SCRATCH_COMMON ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x17)) /**< Scratch common */ #define BC_SCRATCH_EFM0 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x18)) /**< Scratch EFM0 */ #define BC_SCRATCH_EFM1 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x19)) /**< Scratch EFM1 */ #define BC_SCRATCH_EFM2 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1A)) /**< Scratch EFM2 */ diff --git a/bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.c b/bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.c index 72855106fc..a309df8204 100644 --- a/bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.c +++ b/bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.c @@ -155,7 +155,7 @@ uint16_t DVK_getPushButtons(void) /* Check state */ aemState = DVK_readRegister(BC_AEMSTATE); /* Read pushbutton status */ - if ( aemState == BC_AEMSTATE_EFM ) + if ( aemState == BC_AEMSTATE_EFM ) { pb = (~(DVK_readRegister(BC_PUSHBUTTON))) & 0x000f; } @@ -174,7 +174,7 @@ uint16_t DVK_getJoystick(void) /* Check state */ aemState = DVK_readRegister(BC_AEMSTATE); /* Read pushbutton status */ - if ( aemState == BC_AEMSTATE_EFM ) + if ( aemState == BC_AEMSTATE_EFM ) { joyStick = (~(DVK_readRegister(BC_JOYSTICK))) & 0x001f; } diff --git a/bsp/efm32/EFM32_Gxxx_DK/dvk_ebi.c b/bsp/efm32/EFM32_Gxxx_DK/dvk_ebi.c index 02f6c0b303..0fed351767 100644 --- a/bsp/efm32/EFM32_Gxxx_DK/dvk_ebi.c +++ b/bsp/efm32/EFM32_Gxxx_DK/dvk_ebi.c @@ -163,7 +163,7 @@ bool DVK_EBI_init(void) * be configured for EBI access */ ebiMagic = DVK_EBI_readRegister(BC_MAGIC); while ((ebiMagic != BC_MAGIC_VALUE) && retry) - { + { DVK_EBI_disable(); /* Enable SPI interface */ DVK_SPI_init(); @@ -172,13 +172,13 @@ bool DVK_EBI_init(void) DVK_SPI_writeRegister(BC_CFG, BC_CFG_EBI); /* Disable SPI */ DVK_SPI_disable(); - + /* Now setup EBI again */ DVK_EBI_configure(); /* Wait until ready */ ebiMagic = DVK_EBI_readRegister(BC_MAGIC); if (ebiMagic == BC_MAGIC_VALUE) break; - + retry--; } if ( ! retry ) return false; diff --git a/bsp/efm32/EFM32_Gxxx_DK/dvk_spi.c b/bsp/efm32/EFM32_Gxxx_DK/dvk_spi.c index 358b62bc9a..d4c536e21b 100644 --- a/bsp/efm32/EFM32_Gxxx_DK/dvk_spi.c +++ b/bsp/efm32/EFM32_Gxxx_DK/dvk_spi.c @@ -106,7 +106,7 @@ static void spiInit(void) /* Configure SPI bus connect pins, DOUT set to 0, disable EBI */ GPIO_PinModeSet(PORT_SPIBUS_CONNECT, PIN_SPIBUS_CONNECT, gpioModePushPull, 0); GPIO_PinModeSet(PORT_EBIBUS_CONNECT, PIN_EBIBUS_CONNECT, gpioModePushPull, 1); - + /* Configure SPI pins */ GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModePushPull, 0); GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModePushPull, 0); @@ -164,11 +164,11 @@ static uint16_t spiAccess(uint8_t spiaddr, uint8_t rw, uint16_t spidata) /* Just ignore data read back */ USART_Rx(USART_USED); - /* SPI data LSB */ + /* SPI data LSB */ USART_Tx(USART_USED, spidata & 0xFF); tmp = (uint16_t)USART_Rx(USART_USED); - /* SPI data MSB */ + /* SPI data MSB */ USART_Tx(USART_USED, spidata >> 8); tmp |= (uint16_t)USART_Rx(USART_USED) << 8; @@ -213,7 +213,7 @@ bool DVK_SPI_init(void) if(spiMagic != BC_MAGIC_VALUE) { return false; - } + } else { return true; diff --git a/bsp/efm32/EFM32_Gxxx_DK/trace.c b/bsp/efm32/EFM32_Gxxx_DK/trace.c index 0ef4438a29..ef1617cc1f 100644 --- a/bsp/efm32/EFM32_Gxxx_DK/trace.c +++ b/bsp/efm32/EFM32_Gxxx_DK/trace.c @@ -89,7 +89,7 @@ void TRACE_SWOSetup(void) /**************************************************************************//** * @brief Profiler configuration * @return true if energyAware Profiler/SWO is enabled, false if not - * @note If first word of the user page is zero, this will not + * @note If first word of the user page is zero, this will not * enable SWO profiler output, see trace.h *****************************************************************************/ bool TRACE_ProfilerSetup(void) @@ -105,7 +105,7 @@ bool TRACE_ProfilerSetup(void) { TRACE_SWOSetup(); return true; - } + } } /** @} (end group BSP) */ diff --git a/bsp/efm32/EFM32_Gxxx_DK/trace.h b/bsp/efm32/EFM32_Gxxx_DK/trace.h index 311e7ed357..1abb391a6c 100644 --- a/bsp/efm32/EFM32_Gxxx_DK/trace.h +++ b/bsp/efm32/EFM32_Gxxx_DK/trace.h @@ -58,7 +58,7 @@ bool TRACE_ProfilerSetup(void); * in TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run, * no example project will enable SWO trace. * @param[in] enable - * @note Add "em_msc.c" to build to use this function. + * @note Add "em_msc.c" to build to use this function. *****************************************************************************/ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable) { @@ -69,7 +69,7 @@ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable) data = *userpage; if(enable) { - if(data == 0xFFFFFFFF) + if(data == 0xFFFFFFFF) { return; } @@ -81,7 +81,7 @@ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable) return; } } - + /* Initialize MSC */ MSC_Init(); diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvopt deleted file mode 100644 index 5514cddd39..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvopt +++ /dev/null @@ -1,4197 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
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- - arm_fir_init_q31.c - 1 - ..\FilteringFunctions\arm_fir_init_q31.c - - - arm_fir_interpolate_f32.c - 1 - ..\FilteringFunctions\arm_fir_interpolate_f32.c - - - arm_fir_interpolate_init_f32.c - 1 - ..\FilteringFunctions\arm_fir_interpolate_init_f32.c - - - arm_fir_interpolate_init_q15.c - 1 - ..\FilteringFunctions\arm_fir_interpolate_init_q15.c - - - arm_fir_interpolate_init_q31.c - 1 - ..\FilteringFunctions\arm_fir_interpolate_init_q31.c - - - arm_fir_interpolate_q15.c - 1 - ..\FilteringFunctions\arm_fir_interpolate_q15.c - - - arm_fir_interpolate_q31.c - 1 - ..\FilteringFunctions\arm_fir_interpolate_q31.c - - - arm_fir_lattice_f32.c - 1 - ..\FilteringFunctions\arm_fir_lattice_f32.c - - - arm_fir_lattice_init_f32.c - 1 - ..\FilteringFunctions\arm_fir_lattice_init_f32.c - - - arm_fir_lattice_init_q15.c - 1 - ..\FilteringFunctions\arm_fir_lattice_init_q15.c - - - arm_fir_lattice_init_q31.c - 1 - ..\FilteringFunctions\arm_fir_lattice_init_q31.c - - - arm_fir_lattice_q15.c - 1 - ..\FilteringFunctions\arm_fir_lattice_q15.c - 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1 - ..\FilteringFunctions\arm_iir_lattice_init_f32.c - - - arm_iir_lattice_init_q15.c - 1 - ..\FilteringFunctions\arm_iir_lattice_init_q15.c - - - arm_iir_lattice_init_q31.c - 1 - ..\FilteringFunctions\arm_iir_lattice_init_q31.c - - - arm_iir_lattice_q15.c - 1 - ..\FilteringFunctions\arm_iir_lattice_q15.c - - - arm_iir_lattice_q31.c - 1 - ..\FilteringFunctions\arm_iir_lattice_q31.c - - - arm_lms_f32.c - 1 - ..\FilteringFunctions\arm_lms_f32.c - - - arm_lms_init_f32.c - 1 - ..\FilteringFunctions\arm_lms_init_f32.c - - - arm_lms_init_q15.c - 1 - ..\FilteringFunctions\arm_lms_init_q15.c - - - arm_lms_init_q31.c - 1 - ..\FilteringFunctions\arm_lms_init_q31.c - - - arm_lms_norm_f32.c - 1 - ..\FilteringFunctions\arm_lms_norm_f32.c - - - arm_lms_norm_init_f32.c - 1 - ..\FilteringFunctions\arm_lms_norm_init_f32.c - - - arm_lms_norm_init_q15.c - 1 - ..\FilteringFunctions\arm_lms_norm_init_q15.c - - - arm_lms_norm_init_q31.c - 1 - ..\FilteringFunctions\arm_lms_norm_init_q31.c - - - arm_lms_norm_q15.c - 1 - ..\FilteringFunctions\arm_lms_norm_q15.c - - - arm_lms_norm_q31.c - 1 - ..\FilteringFunctions\arm_lms_norm_q31.c - - - arm_lms_q15.c - 1 - ..\FilteringFunctions\arm_lms_q15.c - - - arm_lms_q31.c - 1 - ..\FilteringFunctions\arm_lms_q31.c - - - - - MatrixFunctions - - - arm_mat_add_f32.c - 1 - ..\MatrixFunctions\arm_mat_add_f32.c - - - arm_mat_add_q15.c - 1 - ..\MatrixFunctions\arm_mat_add_q15.c - - - arm_mat_add_q31.c - 1 - ..\MatrixFunctions\arm_mat_add_q31.c - - - arm_mat_init_f32.c - 1 - ..\MatrixFunctions\arm_mat_init_f32.c - - - arm_mat_init_q15.c - 1 - ..\MatrixFunctions\arm_mat_init_q15.c - - - arm_mat_init_q31.c - 1 - ..\MatrixFunctions\arm_mat_init_q31.c - - - arm_mat_inverse_f32.c - 1 - ..\MatrixFunctions\arm_mat_inverse_f32.c - - - arm_mat_mult_f32.c - 1 - ..\MatrixFunctions\arm_mat_mult_f32.c - - - arm_mat_mult_fast_q15.c - 1 - ..\MatrixFunctions\arm_mat_mult_fast_q15.c - - - arm_mat_mult_fast_q31.c - 1 - ..\MatrixFunctions\arm_mat_mult_fast_q31.c - - - arm_mat_mult_q15.c - 1 - ..\MatrixFunctions\arm_mat_mult_q15.c - - - arm_mat_mult_q31.c - 1 - ..\MatrixFunctions\arm_mat_mult_q31.c - - - arm_mat_scale_f32.c - 1 - ..\MatrixFunctions\arm_mat_scale_f32.c - - - arm_mat_scale_q15.c - 1 - ..\MatrixFunctions\arm_mat_scale_q15.c - - - arm_mat_scale_q31.c - 1 - ..\MatrixFunctions\arm_mat_scale_q31.c - - - arm_mat_sub_f32.c - 1 - ..\MatrixFunctions\arm_mat_sub_f32.c - - - arm_mat_sub_q15.c - 1 - ..\MatrixFunctions\arm_mat_sub_q15.c - - - arm_mat_sub_q31.c - 1 - ..\MatrixFunctions\arm_mat_sub_q31.c - - - arm_mat_trans_f32.c - 1 - ..\MatrixFunctions\arm_mat_trans_f32.c - - - arm_mat_trans_q15.c - 1 - ..\MatrixFunctions\arm_mat_trans_q15.c - - - arm_mat_trans_q31.c - 1 - ..\MatrixFunctions\arm_mat_trans_q31.c - - - - - TransformFunctions - - - arm_bitreversal.c - 1 - ..\TransformFunctions\arm_bitreversal.c - - - arm_cfft_radix2_f32.c - 1 - ..\TransformFunctions\arm_cfft_radix2_f32.c - - - arm_cfft_radix2_init_f32.c - 1 - ..\TransformFunctions\arm_cfft_radix2_init_f32.c - - - arm_cfft_radix2_init_q15.c - 1 - ..\TransformFunctions\arm_cfft_radix2_init_q15.c - - - arm_cfft_radix2_init_q31.c - 1 - ..\TransformFunctions\arm_cfft_radix2_init_q31.c - - - arm_cfft_radix2_q15.c - 1 - ..\TransformFunctions\arm_cfft_radix2_q15.c - - - arm_cfft_radix2_q31.c - 1 - ..\TransformFunctions\arm_cfft_radix2_q31.c - - - arm_cfft_radix4_f32.c - 1 - ..\TransformFunctions\arm_cfft_radix4_f32.c - - - arm_cfft_radix4_init_f32.c - 1 - ..\TransformFunctions\arm_cfft_radix4_init_f32.c - - - arm_cfft_radix4_init_q15.c - 1 - ..\TransformFunctions\arm_cfft_radix4_init_q15.c - - - arm_cfft_radix4_init_q31.c - 1 - ..\TransformFunctions\arm_cfft_radix4_init_q31.c - - - arm_cfft_radix4_q15.c - 1 - ..\TransformFunctions\arm_cfft_radix4_q15.c - - - arm_cfft_radix4_q31.c - 1 - ..\TransformFunctions\arm_cfft_radix4_q31.c - - - arm_dct4_f32.c - 1 - ..\TransformFunctions\arm_dct4_f32.c - - - arm_dct4_init_f32.c - 1 - ..\TransformFunctions\arm_dct4_init_f32.c - - - arm_dct4_init_q15.c - 1 - ..\TransformFunctions\arm_dct4_init_q15.c - - - arm_dct4_init_q31.c - 1 - ..\TransformFunctions\arm_dct4_init_q31.c - - - arm_dct4_q15.c - 1 - ..\TransformFunctions\arm_dct4_q15.c - - - arm_dct4_q31.c - 1 - ..\TransformFunctions\arm_dct4_q31.c - - - arm_rfft_f32.c - 1 - ..\TransformFunctions\arm_rfft_f32.c - - - arm_rfft_init_f32.c - 1 - ..\TransformFunctions\arm_rfft_init_f32.c - - - arm_rfft_init_q15.c - 1 - ..\TransformFunctions\arm_rfft_init_q15.c - - - arm_rfft_init_q31.c - 1 - ..\TransformFunctions\arm_rfft_init_q31.c - - - arm_rfft_q15.c - 1 - ..\TransformFunctions\arm_rfft_q15.c - - - arm_rfft_q31.c - 1 - ..\TransformFunctions\arm_rfft_q31.c - - - - - ControllerFunctions - - - arm_pid_init_f32.c - 1 - ..\ControllerFunctions\arm_pid_init_f32.c - - - arm_pid_init_q15.c - 1 - ..\ControllerFunctions\arm_pid_init_q15.c - - - arm_pid_init_q31.c - 1 - ..\ControllerFunctions\arm_pid_init_q31.c - - - arm_pid_reset_f32.c - 1 - ..\ControllerFunctions\arm_pid_reset_f32.c - - - arm_pid_reset_q15.c - 1 - ..\ControllerFunctions\arm_pid_reset_q15.c - - - arm_pid_reset_q31.c - 1 - ..\ControllerFunctions\arm_pid_reset_q31.c - - - arm_sin_cos_f32.c - 1 - ..\ControllerFunctions\arm_sin_cos_f32.c - - - arm_sin_cos_q31.c - 1 - ..\ControllerFunctions\arm_sin_cos_q31.c - - - - - StatisticsFunctions - - - arm_max_f32.c - 1 - ..\StatisticsFunctions\arm_max_f32.c - - - arm_max_q7.c - 1 - ..\StatisticsFunctions\arm_max_q7.c - - - arm_max_q15.c - 1 - ..\StatisticsFunctions\arm_max_q15.c - - - arm_max_q31.c - 1 - ..\StatisticsFunctions\arm_max_q31.c - - - arm_mean_f32.c - 1 - ..\StatisticsFunctions\arm_mean_f32.c - - - arm_mean_q7.c - 1 - ..\StatisticsFunctions\arm_mean_q7.c - - - arm_mean_q15.c - 1 - ..\StatisticsFunctions\arm_mean_q15.c - - - arm_mean_q31.c - 1 - ..\StatisticsFunctions\arm_mean_q31.c - - - arm_min_f32.c - 1 - ..\StatisticsFunctions\arm_min_f32.c - - - arm_min_q7.c - 1 - ..\StatisticsFunctions\arm_min_q7.c - - - arm_min_q15.c - 1 - ..\StatisticsFunctions\arm_min_q15.c - - - arm_min_q31.c - 1 - ..\StatisticsFunctions\arm_min_q31.c - - - arm_power_f32.c - 1 - ..\StatisticsFunctions\arm_power_f32.c - - - arm_power_q7.c - 1 - ..\StatisticsFunctions\arm_power_q7.c - - - arm_power_q15.c - 1 - ..\StatisticsFunctions\arm_power_q15.c - - - arm_power_q31.c - 1 - ..\StatisticsFunctions\arm_power_q31.c - - - arm_rms_f32.c - 1 - ..\StatisticsFunctions\arm_rms_f32.c - - - arm_rms_q15.c - 1 - ..\StatisticsFunctions\arm_rms_q15.c - - - arm_rms_q31.c - 1 - ..\StatisticsFunctions\arm_rms_q31.c - - - arm_std_f32.c - 1 - ..\StatisticsFunctions\arm_std_f32.c - - - arm_std_q15.c - 1 - ..\StatisticsFunctions\arm_std_q15.c - - - arm_std_q31.c - 1 - ..\StatisticsFunctions\arm_std_q31.c - - - arm_var_f32.c - 1 - ..\StatisticsFunctions\arm_var_f32.c - - - arm_var_q15.c - 1 - ..\StatisticsFunctions\arm_var_q15.c - - - arm_var_q31.c - 1 - ..\StatisticsFunctions\arm_var_q31.c - - - - - SupportFunctions - - - arm_copy_f32.c - 1 - ..\SupportFunctions\arm_copy_f32.c - - - arm_copy_q7.c - 1 - ..\SupportFunctions\arm_copy_q7.c - - - arm_copy_q15.c - 1 - ..\SupportFunctions\arm_copy_q15.c - - - arm_copy_q31.c - 1 - ..\SupportFunctions\arm_copy_q31.c - - - arm_fill_f32.c - 1 - ..\SupportFunctions\arm_fill_f32.c - - - arm_fill_q7.c - 1 - ..\SupportFunctions\arm_fill_q7.c - - - arm_fill_q15.c - 1 - ..\SupportFunctions\arm_fill_q15.c - - - arm_fill_q31.c - 1 - ..\SupportFunctions\arm_fill_q31.c - - - arm_float_to_q7.c - 1 - ..\SupportFunctions\arm_float_to_q7.c - - - arm_float_to_q15.c - 1 - ..\SupportFunctions\arm_float_to_q15.c - - - arm_float_to_q31.c - 1 - ..\SupportFunctions\arm_float_to_q31.c - - - arm_q7_to_float.c - 1 - ..\SupportFunctions\arm_q7_to_float.c - - - arm_q7_to_q15.c - 1 - ..\SupportFunctions\arm_q7_to_q15.c - - - arm_q7_to_q31.c - 1 - ..\SupportFunctions\arm_q7_to_q31.c - - - arm_q15_to_float.c - 1 - ..\SupportFunctions\arm_q15_to_float.c - - - arm_q15_to_q7.c - 1 - ..\SupportFunctions\arm_q15_to_q7.c - - - arm_q15_to_q31.c - 1 - ..\SupportFunctions\arm_q15_to_q31.c - - - arm_q31_to_float.c - 1 - ..\SupportFunctions\arm_q31_to_float.c - - - arm_q31_to_q7.c - 1 - ..\SupportFunctions\arm_q31_to_q7.c - - - arm_q31_to_q15.c - 1 - ..\SupportFunctions\arm_q31_to_q15.c - - - - - CommonTables - - - arm_common_tables.c - 1 - ..\CommonTables\arm_common_tables.c - - - - - - - - diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexMx_math_Build.bat b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexMx_math_Build.bat deleted file mode 100644 index 69cf1aa0e8..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ARM/arm_cortexMx_math_Build.bat +++ /dev/null @@ -1,29 +0,0 @@ - -SET TMP=C:\Temp -SET TEMP=C:\Temp - -SET UVEXE=C:\Keil\UV4\UV4.EXE - -@echo Building DSP Library for Cortex-M0 Little Endian -%UVEXE% -rb arm_cortexM0x_math.uvproj -t"DSP_Lib CM0 LE" -o"DSP_Lib CM0 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M0 Big Endian -%UVEXE% -rb arm_cortexM0x_math.uvproj -t"DSP_Lib CM0 BE" -o"DSP_Lib CM0 BE.txt" -j0 - -@echo Building DSP Library for Cortex-M3 Little Endian -%UVEXE% -rb arm_cortexM3x_math.uvproj -t"DSP_Lib CM3 LE" -o"DSP_Lib CM3 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M3 Big Endian -%UVEXE% -rb arm_cortexM3x_math.uvproj -t"DSP_Lib CM3 BE" -o"DSP_Lib CM3 BE.txt" -j0 - -@echo Building DSP Library for Cortex-M4 Little Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE" -o"DSP_Lib CM4 LE.txt" -j0 - -@echo Building DSP Library for Cortex-M4 Big Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 BE" -o"DSP_Lib CM4 BE.txt" -j0 - -@echo Building DSP Library for Cortex-M4 with FPU Little Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE FPU" -o"DSP_Lib CM4 LE FPU.txt" -j0 - -@echo Building DSP Library for Cortex-M4 with FPU Big Endian -%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 BE FPU" -o"DSP_Lib CM4 BE FPU.txt" -j0 \ No newline at end of file diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c deleted file mode 100644 index 3c9d360c66..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c +++ /dev/null @@ -1,159 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_abs_f32.c -* -* Description: Vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" -#include - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicAbs Vector Absolute Value - * - * Computes the absolute value of a vector on an element-by-element basis. - * - * 
        
- *     pDst[n] = abs(pSrcA[n]),   0 <= n < blockSize.        
- *
- * - * The operation can be done in-place by setting the input and output pointers to the same buffer. - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - -/** - * @brief Floating-point vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_abs_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; /* temporary variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute and then store the results in the destination buffer. */ - /* read sample from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - - /* find absolute value */ - in1 = fabsf(in1); - - /* read sample from source */ - in4 = *(pSrc + 3); - - /* find absolute value */ - in2 = fabsf(in2); - - /* read sample from source */ - *pDst = in1; - - /* find absolute value */ - in3 = fabsf(in3); - - /* find absolute value */ - in4 = fabsf(in4); - - /* store result to destination */ - *(pDst + 1) = in2; - - /* store result to destination */ - *(pDst + 2) = in3; - - /* store result to destination */ - *(pDst + 3) = in4; - - - /* Update source pointer to process next sampels */ - pSrc += 4u; - - /* Update destination pointer to process next sampels */ - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute and then store the results in the destination buffer. */ - *pDst++ = fabsf(*pSrc++); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicAbs group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c deleted file mode 100644 index 6b6fdf4ef4..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c +++ /dev/null @@ -1,173 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_abs_q15.c -* -* Description: Q15 vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - -/** - * @brief Q15 vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. - */ - -void arm_abs_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t in1; /* Input value1 */ - q15_t in2; /* Input value2 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read two inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - - - /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */ - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = - __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)), - ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16); - -#else - - - *__SIMD32(pDst)++ = - __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)), - ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pSrc++; - in2 = *pSrc++; - - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = - __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)), - ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16); - -#else - - - *__SIMD32(pDst)++ = - __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)), - ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read the input */ - in1 = *pSrc++; - - /* Calculate absolute value of input and then store the result in the destination buffer. */ - *pDst++ = (in1 > 0) ? in1 : __QSUB16(0, in1); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t in; /* Temporary input variable */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read the input */ - in = *pSrc++; - - /* Calculate absolute value of input and then store the result in the destination buffer. */ - *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of BasicAbs group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c deleted file mode 100644 index 5c3d56f749..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_abs_q31.c -* -* Description: Q31 vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - - -/** - * @brief Q31 vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF. - */ - -void arm_abs_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q31_t in; /* Input value */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = (in1 > 0) ? in1 : __QSUB(0, in1); - *pDst++ = (in2 > 0) ? in2 : __QSUB(0, in2); - *pDst++ = (in3 > 0) ? in3 : __QSUB(0, in3); - *pDst++ = (in4 > 0) ? in4 : __QSUB(0, in4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */ - in = *pSrc++; - *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in); - - /* Decrement the loop counter */ - blkCnt--; - } - -} - -/** - * @} end of BasicAbs group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c deleted file mode 100644 index 0ae0a2f5b3..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c +++ /dev/null @@ -1,152 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_abs_q7.c -* -* Description: Q7 vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - -/** - * @brief Q7 vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - * - * \par Conditions for optimum performance - * Input and output buffers should be aligned by 32-bit - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F. - */ - -void arm_abs_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q7_t in; /* Input value1 */ - -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; /* temporary input variables */ - q31_t out1, out2, out3, out4; /* temporary output variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read inputs */ - in1 = (q31_t) * pSrc; - in2 = (q31_t) * (pSrc + 1); - in3 = (q31_t) * (pSrc + 2); - - /* find absolute value */ - out1 = (in1 > 0) ? in1 : __QSUB8(0, in1); - - /* read input */ - in4 = (q31_t) * (pSrc + 3); - - /* find absolute value */ - out2 = (in2 > 0) ? in2 : __QSUB8(0, in2); - - /* store result to destination */ - *pDst = (q7_t) out1; - - /* find absolute value */ - out3 = (in3 > 0) ? in3 : __QSUB8(0, in3); - - /* find absolute value */ - out4 = (in4 > 0) ? in4 : __QSUB8(0, in4); - - /* store result to destination */ - *(pDst + 1) = (q7_t) out2; - - /* store result to destination */ - *(pDst + 2) = (q7_t) out3; - - /* store result to destination */ - *(pDst + 3) = (q7_t) out4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; -#else - - /* Run the below code for Cortex-M0 */ - blkCnt = blockSize; - -#endif // #define ARM_MATH_CM0 - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read the input */ - in = *pSrc++; - - /* Store the Absolute result in the destination buffer */ - *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicAbs group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c deleted file mode 100644 index 29425373f2..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c +++ /dev/null @@ -1,145 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_add_f32.c -* -* Description: Floating-point vector addition. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicAdd Vector Addition - * - * Element-by-element addition of two vectors. - * - * 
        
- *     pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.        
- *
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - -/** - * @brief Floating-point vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_add_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */ - float32_t inB1, inB2, inB3, inB4; /* temporary input variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - - /* read four inputs from sourceA and four inputs from sourceB */ - inA1 = *pSrcA; - inB1 = *pSrcB; - inA2 = *(pSrcA + 1); - inB2 = *(pSrcB + 1); - inA3 = *(pSrcA + 2); - inB3 = *(pSrcB + 2); - inA4 = *(pSrcA + 3); - inB4 = *(pSrcB + 3); - - /* C = A + B */ - /* add and store result to destination */ - *pDst = inA1 + inB1; - *(pDst + 1) = inA2 + inB2; - *(pDst + 2) = inA3 + inB3; - *(pDst + 3) = inA4 + inB4; - - /* update pointers to process next samples */ - pSrcA += 4u; - pSrcB += 4u; - pDst += 4u; - - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (*pSrcA++) + (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c deleted file mode 100644 index 6de4a03368..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_add_q15.c -* -* Description: Q15 vector addition -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - -/** - * @brief Q15 vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_add_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inB1, inB2; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - inA1 = *__SIMD32(pSrcA)++; - inA2 = *__SIMD32(pSrcA)++; - inB1 = *__SIMD32(pSrcB)++; - inB2 = *__SIMD32(pSrcB)++; - - *__SIMD32(pDst)++ = __QADD16(inA1, inB1); - *__SIMD32(pDst)++ = __QADD16(inA2, inB2); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - -} - -/** - * @} end of BasicAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c deleted file mode 100644 index 576efe6c74..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_add_q31.c -* -* Description: Q31 vector addition. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - - -/** - * @brief Q31 vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_add_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; - q31_t inB1, inB2, inB3, inB4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - *pDst++ = __QADD(inA1, inB1); - *pDst++ = __QADD(inA2, inB2); - *pDst++ = __QADD(inA3, inB3); - *pDst++ = __QADD(inA4, inB4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = __QADD(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of BasicAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c deleted file mode 100644 index 6f75e1d42f..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_add_q7.c -* -* Description: Q7 vector addition. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - -/** - * @brief Q7 vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ - -void arm_add_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - -} - -/** - * @} end of BasicAdd group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c deleted file mode 100644 index 933b001703..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_f32.c -* -* Description: Floating-point dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup dot_prod Vector Dot Product - * - * Computes the dot product of two vectors. - * The vectors are multiplied element-by-element and then summed. - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of floating-point vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - */ - - -void arm_dot_prod_f32( - float32_t * pSrcA, - float32_t * pSrcB, - uint32_t blockSize, - float32_t * result) -{ - float32_t sum = 0.0f; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer */ - sum += (*pSrcA++) * (*pSrcB++); - sum += (*pSrcA++) * (*pSrcB++); - sum += (*pSrcA++) * (*pSrcB++); - sum += (*pSrcA++) * (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - sum += (*pSrcA++) * (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - /* Store the result back in the destination buffer */ - *result = sum; -} - -/** - * @} end of dot_prod group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c deleted file mode 100644 index 865e4c4331..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_q15.c -* -* Description: Q15 dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of Q15 vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these - * results are added to a 64-bit accumulator in 34.30 format. - * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator - * there is no risk of overflow. - * The return result is in 34.30 format. - */ - -void arm_dot_prod_q15( - q15_t * pSrcA, - q15_t * pSrcB, - uint32_t blockSize, - q63_t * result) -{ - q63_t sum = 0; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum); - sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the results in a temporary buffer. */ - sum = __SMLALD(*pSrcA++, *pSrcB++, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the results in a temporary buffer. */ - sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - /* Store the result in the destination buffer in 34.30 format */ - *result = sum; - -} - -/** - * @} end of dot_prod group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c deleted file mode 100644 index 1f98e41d6c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c +++ /dev/null @@ -1,138 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_q31.c -* -* Description: Q31 dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of Q31 vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these - * are truncated to 2.48 format by discarding the lower 14 bits. - * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. - * There are 15 guard bits in the accumulator and there is no risk of overflow as long as - * the length of the vectors is less than 2^16 elements. - * The return result is in 16.48 format. - */ - -void arm_dot_prod_q31( - q31_t * pSrcA, - q31_t * pSrcB, - uint32_t blockSize, - q63_t * result) -{ - q63_t sum = 0; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; - q31_t inB1, inB2, inB3, inB4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - sum += ((q63_t) inA1 * inB1) >> 14u; - sum += ((q63_t) inA2 * inB2) >> 14u; - sum += ((q63_t) inA3 * inB3) >> 14u; - sum += ((q63_t) inA4 * inB4) >> 14u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the result in the destination buffer in 16.48 format */ - *result = sum; -} - -/** - * @} end of dot_prod group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c deleted file mode 100644 index 9cf0bf4034..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c +++ /dev/null @@ -1,154 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_q7.c -* -* Description: Q7 dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of Q7 vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these - * results are added to an accumulator in 18.14 format. - * Nonsaturating additions are used and there is no danger of wrap around as long as - * the vectors are less than 2^18 elements long. - * The return result is in 18.14 format. - */ - -void arm_dot_prod_q7( - q7_t * pSrcA, - q7_t * pSrcB, - uint32_t blockSize, - q31_t * result) -{ - uint32_t blkCnt; /* loop counter */ - - q31_t sum = 0; /* Temporary variables to store output */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t input1, input2; /* Temporary variables to store input */ - q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */ - - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read 4 samples at a time from sourceA */ - input1 = *__SIMD32(pSrcA)++; - /* read 4 samples at a time from sourceB */ - input2 = *__SIMD32(pSrcB)++; - - /* extract two q7_t samples to q15_t samples */ - inA1 = __SXTB16(__ROR(input1, 8)); - /* extract reminaing two samples */ - inA2 = __SXTB16(input1); - /* extract two q7_t samples to q15_t samples */ - inB1 = __SXTB16(__ROR(input2, 8)); - /* extract reminaing two samples */ - inB2 = __SXTB16(input2); - - /* multiply and accumulate two samples at a time */ - sum = __SMLAD(inA1, inB1, sum); - sum = __SMLAD(inA2, inB2, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Dot product and then store the results in a temporary buffer. */ - sum = __SMLAD(*pSrcA++, *pSrcB++, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Dot product and then store the results in a temporary buffer. */ - sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - - /* Store the result in the destination buffer in 18.14 format */ - *result = sum; -} - -/** - * @} end of dot_prod group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c deleted file mode 100644 index 682931eacd..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c +++ /dev/null @@ -1,172 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mult_f32.c -* -* Description: Floating-point vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicMult Vector Multiplication - * - * Element-by-element multiplication of two vectors. - * - * 
        
- *     pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.        
- *
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicMult - * @{ - */ - -/** - * @brief Floating-point vector multiplication. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_mult_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ -#ifndef ARM_MATH_CM0 - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t inA1, inA2, inA3, inA4; /* temporary input variables */ - float32_t inB1, inB2, inB3, inB4; /* temporary input variables */ - float32_t out1, out2, out3, out4; /* temporary output variables */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the results in output buffer */ - /* read sample from sourceA */ - inA1 = *pSrcA; - /* read sample from sourceB */ - inB1 = *pSrcB; - /* read sample from sourceA */ - inA2 = *(pSrcA + 1); - /* read sample from sourceB */ - inB2 = *(pSrcB + 1); - - /* out = sourceA * sourceB */ - out1 = inA1 * inB1; - - /* read sample from sourceA */ - inA3 = *(pSrcA + 2); - /* read sample from sourceB */ - inB3 = *(pSrcB + 2); - - /* out = sourceA * sourceB */ - out2 = inA2 * inB2; - - /* read sample from sourceA */ - inA4 = *(pSrcA + 3); - - /* store result to destination buffer */ - *pDst = out1; - - /* read sample from sourceB */ - inB4 = *(pSrcB + 3); - - /* out = sourceA * sourceB */ - out3 = inA3 * inB3; - - /* store result to destination buffer */ - *(pDst + 1) = out2; - - /* out = sourceA * sourceB */ - out4 = inA4 * inB4; - /* store result to destination buffer */ - *(pDst + 2) = out3; - /* store result to destination buffer */ - *(pDst + 3) = out4; - - - /* update pointers to process next samples */ - pSrcA += 4u; - pSrcB += 4u; - pDst += 4u; - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the results in output buffer */ - *pDst++ = (*pSrcA++) * (*pSrcB++); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c deleted file mode 100644 index 00a522d97a..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c +++ /dev/null @@ -1,152 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mult_q15.c -* -* Description: Q15 vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicMult - * @{ - */ - - -/** - * @brief Q15 vector multiplication - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_mult_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inB1, inB2; /* temporary input variables */ - q15_t out1, out2, out3, out4; /* temporary output variables */ - q31_t mul1, mul2, mul3, mul4; /* temporary variables */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read two samples at a time from sourceA */ - inA1 = *__SIMD32(pSrcA)++; - /* read two samples at a time from sourceB */ - inB1 = *__SIMD32(pSrcB)++; - /* read two samples at a time from sourceA */ - inA2 = *__SIMD32(pSrcA)++; - /* read two samples at a time from sourceB */ - inB2 = *__SIMD32(pSrcB)++; - - /* multiply mul = sourceA * sourceB */ - mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); - mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1); - mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16)); - mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2); - - /* saturate result to 16 bit */ - out1 = (q15_t) __SSAT(mul1 >> 15, 16); - out2 = (q15_t) __SSAT(mul2 >> 15, 16); - out3 = (q15_t) __SSAT(mul3 >> 15, 16); - out4 = (q15_t) __SSAT(mul4 >> 15, 16); - - /* store the result */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); - *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); - *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); - -#endif // #ifndef ARM_MATH_BIG_ENDIAN - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the result in the destination buffer */ - *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c deleted file mode 100644 index 4697a80626..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mult_q31.c -* -* Description: Q31 vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicMult - * @{ - */ - -/** - * @brief Q31 vector multiplication. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_mult_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; /* temporary input variables */ - q31_t inB1, inB2, inB3, inB4; /* temporary input variables */ - q31_t out1, out2, out3, out4; /* temporary output variables */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and then store the results in the destination buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - out1 = ((q63_t) inA1 * inB1) >> 32; - out2 = ((q63_t) inA2 * inB2) >> 32; - out3 = ((q63_t) inA3 * inB3) >> 32; - out4 = ((q63_t) inA4 * inB4) >> 32; - - out1 = __SSAT(out1, 31); - out2 = __SSAT(out2, 31); - out3 = __SSAT(out3, 31); - out4 = __SSAT(out4, 31); - - *pDst++ = out1 << 1u; - *pDst++ = out2 << 1u; - *pDst++ = out3 << 1u; - *pDst++ = out4 << 1u; - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and then store the results in the destination buffer. */ - *pDst++ = - (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c deleted file mode 100644 index 1e65a77a9c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c +++ /dev/null @@ -1,128 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_mult_q7.c -* -* Description: Q7 vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 DP -* Initial version -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicMult - * @{ - */ - -/** - * @brief Q7 vector multiplication - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ - -void arm_mult_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q7_t out1, out2, out3, out4; /* Temporary variables to store the product */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the results in temporary variables */ - out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - - /* Store the results of 4 inputs in the destination buffer in single cycle by packing */ - *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the result in the destination buffer */ - *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c deleted file mode 100644 index b0f82896db..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c +++ /dev/null @@ -1,137 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_negate_f32.c -* -* Description: Negates floating-point vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup negate Vector Negate - * - * Negates the elements of a vector. - * - * 
        
- *     pDst[n] = -pSrc[n],   0 <= n < blockSize.        
- *
- */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - */ - -void arm_negate_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; /* temporary variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read inputs from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* negate the input */ - in1 = -in1; - in2 = -in2; - in3 = -in3; - in4 = -in4; - - /* store the result to destination */ - *pDst = in1; - *(pDst + 1) = in2; - *(pDst + 2) = in3; - *(pDst + 3) = in4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the results in the destination buffer. */ - *pDst++ = -*pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c deleted file mode 100644 index c47e03eeff..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c +++ /dev/null @@ -1,137 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_negate_q15.c -* -* Description: Negates Q15 vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * \par Conditions for optimum performance - * Input and output buffers should be aligned by 32-bit - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. - */ - -void arm_negate_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q15_t in; - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in1, in2; /* Temporary variables */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = -A */ - /* Read two inputs at a time */ - in1 = _SIMD32_OFFSET(pSrc); - in2 = _SIMD32_OFFSET(pSrc + 2); - - /* negate two samples at a time */ - in1 = __QSUB16(0, in1); - - /* negate two samples at a time */ - in2 = __QSUB16(0, in2); - - /* store the result to destination 2 samples at a time */ - _SIMD32_OFFSET(pDst) = in1; - /* store the result to destination 2 samples at a time */ - _SIMD32_OFFSET(pDst + 2) = in2; - - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the result in the destination buffer. */ - in = *pSrc++; - *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c deleted file mode 100644 index 362b54ecbc..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c +++ /dev/null @@ -1,124 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_negate_q31.c -* -* Description: Negates Q31 vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF. - */ - -void arm_negate_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t in; /* Temporary variable */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the results in the destination buffer. */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = __QSUB(0, in1); - *pDst++ = __QSUB(0, in2); - *pDst++ = __QSUB(0, in3); - *pDst++ = __QSUB(0, in4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the result in the destination buffer. */ - in = *pSrc++; - *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c deleted file mode 100644 index 64914d291e..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c +++ /dev/null @@ -1,120 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_negate_q7.c -* -* Description: Negates Q7 vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a Q7 vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F. - */ - -void arm_negate_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q7_t in; - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t input; /* Input values1-4 */ - q31_t zero = 0x00000000; - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = -A */ - /* Read four inputs */ - input = *__SIMD32(pSrc)++; - - /* Store the Negated results in the destination buffer in a single cycle by packing the results */ - *__SIMD32(pDst)++ = __QSUB8(zero, input); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the results in the destination buffer. */ \ - in = *pSrc++; - *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c deleted file mode 100644 index d7ca663bbd..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c +++ /dev/null @@ -1,158 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_offset_f32.c -* -* Description: Floating-point vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup offset Vector Offset - * - * Adds a constant offset to each element of a vector. - * - * 
        
- *     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.        
- *
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - */ - - -void arm_offset_f32( - float32_t * pSrc, - float32_t offset, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - /* read samples from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - - /* add offset to input */ - in1 = in1 + offset; - - /* read samples from source */ - in3 = *(pSrc + 2); - - /* add offset to input */ - in2 = in2 + offset; - - /* read samples from source */ - in4 = *(pSrc + 3); - - /* add offset to input */ - in3 = in3 + offset; - - /* store result to destination */ - *pDst = in1; - - /* add offset to input */ - in4 = in4 + offset; - - /* store result to destination */ - *(pDst + 1) = in2; - - /* store result to destination */ - *(pDst + 2) = in3; - - /* store result to destination */ - *(pDst + 3) = in4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (*pSrc++) + offset; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of offset group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c deleted file mode 100644 index 0a06f4c9c1..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c +++ /dev/null @@ -1,131 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_offset_q15.c -* -* Description: Q15 vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ - -void arm_offset_q15( - q15_t * pSrc, - q15_t offset, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t offset_packed; /* Offset packed to 32 bit */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Offset is packed to 32 bit in order to use SIMD32 for addition */ - offset_packed = __PKHBT(offset, offset, 16); - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer, 2 samples at a time. */ - *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed); - *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __QADD16(*pSrc++, offset); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of offset group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c deleted file mode 100644 index 4c2997ce6d..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_offset_q31.c -* -* Description: Q31 vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. - */ - -void arm_offset_q31( - q31_t * pSrc, - q31_t offset, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = __QADD(in1, offset); - *pDst++ = __QADD(in2, offset); - *pDst++ = __QADD(in3, offset); - *pDst++ = __QADD(in4, offset); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = __QADD(*pSrc++, offset); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of offset group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c deleted file mode 100644 index e54dba9dab..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_offset_q7.c -* -* Description: Q7 vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a Q7 vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] are saturated. - */ - -void arm_offset_q7( - q7_t * pSrc, - q7_t offset, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t offset_packed; /* Offset packed to 32 bit */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Offset is packed to 32 bit in order to use SIMD32 for addition */ - offset_packed = __PACKq7(offset, offset, offset, offset); - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */ - *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of offset group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c deleted file mode 100644 index 0baf3863fe..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c +++ /dev/null @@ -1,161 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_scale_f32.c -* -* Description: Multiplies a floating-point vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup scale Vector Scale - * - * Multiply a vector by a scalar value. For floating-point data, the algorithm used is: - * - * 
        
- *     pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.        
- *
- * - * In the fixed-point Q7, Q15, and Q31 functions, scale is represented by - * a fractional multiplication scaleFract and an arithmetic shift shift. - * The shift allows the gain of the scaling operation to exceed 1.0. - * The algorithm used with fixed-point data is: - * - * 
        
- *     pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.        
- *
- * - * The overall scale factor applied to the fixed-point data is - * 
        
- *     scale = scaleFract * 2^shift.        
- *
- */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a floating-point vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scale scale factor to be applied - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - */ - - -void arm_scale_f32( - float32_t * pSrc, - float32_t scale, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; /* temporary variabels */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the results in the destination buffer. */ - /* read input samples from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - - /* multiply with scaling factor */ - in1 = in1 * scale; - - /* read input sample from source */ - in3 = *(pSrc + 2); - - /* multiply with scaling factor */ - in2 = in2 * scale; - - /* read input sample from source */ - in4 = *(pSrc + 3); - - /* multiply with scaling factor */ - in3 = in3 * scale; - in4 = in4 * scale; - /* store the result to destination */ - *pDst = in1; - *(pDst + 1) = in2; - *(pDst + 2) = in3; - *(pDst + 3) = in4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (*pSrc++) * scale; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of scale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c deleted file mode 100644 index 9b35ffec66..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c +++ /dev/null @@ -1,157 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_scale_q15.c -* -* Description: Multiplies a Q15 vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a Q15 vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.15 format. - * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. - */ - - -void arm_scale_q15( - q15_t * pSrc, - q15_t scaleFract, - int8_t shift, - q15_t * pDst, - uint32_t blockSize) -{ - int8_t kShift = 15 - shift; /* shift to apply after scaling */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q15_t in1, in2, in3, in4; - q31_t inA1, inA2; /* Temporary variables */ - q31_t out1, out2, out3, out4; - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Reading 2 inputs from memory */ - inA1 = *__SIMD32(pSrc)++; - inA2 = *__SIMD32(pSrc)++; - - /* C = A * scale */ - /* Scale the inputs and then store the 2 results in the destination buffer - * in single cycle by packing the outputs */ - out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract); - out2 = (q31_t) ((q15_t) inA1 * scaleFract); - out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract); - out4 = (q31_t) ((q15_t) inA2 * scaleFract); - - /* apply shifting */ - out1 = out1 >> kShift; - out2 = out2 >> kShift; - out3 = out3 >> kShift; - out4 = out4 >> kShift; - - /* saturate the output */ - in1 = (q15_t) (__SSAT(out1, 16)); - in2 = (q15_t) (__SSAT(out2, 16)); - in3 = (q15_t) (__SSAT(out3, 16)); - in4 = (q15_t) (__SSAT(out4, 16)); - - /* store the result to destination */ - *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16); - *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of scale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c deleted file mode 100644 index cef8102450..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c +++ /dev/null @@ -1,221 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_scale_q31.c -* -* Description: Multiplies a Q31 vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a Q31 vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.31 format. - * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. - */ - -void arm_scale_q31( - q31_t * pSrc, - q31_t scaleFract, - int8_t shift, - q31_t * pDst, - uint32_t blockSize) -{ - int8_t kShift = shift + 1; /* Shift to apply after scaling */ - int8_t sign = (kShift & 0x80); - uint32_t blkCnt; /* loop counter */ - q31_t in, out; - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in1, in2, in3, in4; /* temporary input variables */ - q31_t out1, out2, out3, out4; /* temporary output variabels */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read four inputs from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* multiply input with scaler value */ - in1 = ((q63_t) in1 * scaleFract) >> 32; - in2 = ((q63_t) in2 * scaleFract) >> 32; - in3 = ((q63_t) in3 * scaleFract) >> 32; - in4 = ((q63_t) in4 * scaleFract) >> 32; - - /* apply shifting */ - out1 = in1 << kShift; - out2 = in2 << kShift; - - /* saturate the results. */ - if(in1 != (out1 >> kShift)) - out1 = 0x7FFFFFFF ^ (in1 >> 31); - - if(in2 != (out2 >> kShift)) - out2 = 0x7FFFFFFF ^ (in2 >> 31); - - out3 = in3 << kShift; - out4 = in4 << kShift; - - *pDst = out1; - *(pDst + 1) = out2; - - if(in3 != (out3 >> kShift)) - out3 = 0x7FFFFFFF ^ (in3 >> 31); - - if(in4 != (out4 >> kShift)) - out4 = 0x7FFFFFFF ^ (in4 >> 31); - - /* Store result destination */ - *(pDst + 2) = out3; - *(pDst + 3) = out4; - - /* Update pointers to process next sampels */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - } - else - { - kShift = -kShift; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read four inputs from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* multiply input with scaler value */ - in1 = ((q63_t) in1 * scaleFract) >> 32; - in2 = ((q63_t) in2 * scaleFract) >> 32; - in3 = ((q63_t) in3 * scaleFract) >> 32; - in4 = ((q63_t) in4 * scaleFract) >> 32; - - /* apply shifting */ - out1 = in1 >> kShift; - out2 = in2 >> kShift; - - out3 = in3 >> kShift; - out4 = in4 >> kShift; - - /* Store result destination */ - *pDst = out1; - *(pDst + 1) = out2; - - *(pDst + 2) = out3; - *(pDst + 3) = out4; - - /* Update pointers to process next sampels */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - } - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - - if(sign == 0) - { - out = in << kShift; - if(in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - } - else - { - out = in >> kShift; - } - - *pDst++ = out; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of scale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c deleted file mode 100644 index c899d91044..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c +++ /dev/null @@ -1,144 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_scale_q7.c -* -* Description: Multiplies a Q7 vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a Q7 vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.7 format. - * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format. - */ - -void arm_scale_q7( - q7_t * pSrc, - q7_t scaleFract, - int8_t shift, - q7_t * pDst, - uint32_t blockSize) -{ - int8_t kShift = 7 - shift; /* shift to apply after scaling */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Reading 4 inputs from memory */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - /* C = A * scale */ - /* Scale the inputs and then store the results in the temporary variables. */ - out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8)); - out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8)); - out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8)); - out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8)); - - /* Packing the individual outputs into 32bit and storing in - * destination buffer in single write */ - *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of scale group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c deleted file mode 100644 index b2ee2a5a41..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c +++ /dev/null @@ -1,243 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_shift_q15.c -* -* Description: Shifts the elements of a Q15 vector by a specified number of bits. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup shift - * @{ - */ - -/** - * @brief Shifts the elements of a Q15 vector a specified number of bits. - * @param[in] *pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_shift_q15( - q15_t * pSrc, - int8_t shiftBits, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - uint8_t sign; /* Sign of shiftBits */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t in1, in2; /* Temporary variables */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Read 2 inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - /* C = A << shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16), - __SSAT((in2 << shiftBits), 16), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16), - __SSAT((in1 << shiftBits), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pSrc++; - in2 = *pSrc++; - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16), - __SSAT((in2 << shiftBits), 16), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16), - __SSAT((in1 << shiftBits), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift and then store the results in the destination buffer. */ - *pDst++ = __SSAT((*pSrc++ << shiftBits), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Read 2 inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - - /* C = A >> shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits), - (in2 >> -shiftBits), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits), - (in1 >> -shiftBits), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pSrc++; - in2 = *pSrc++; - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits), - (in2 >> -shiftBits), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits), - (in1 >> -shiftBits), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift and then store the results in the destination buffer. */ - *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of shift group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c deleted file mode 100644 index 799035e80c..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c +++ /dev/null @@ -1,195 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_shift_q31.c -* -* Description: Shifts the elements of a Q31 vector by a specified number of bits. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ -/** - * @defgroup shift Vector Shift - * - * Shifts the elements of a fixed-point vector by a specified number of bits. - * There are separate functions for Q7, Q15, and Q31 data types. - * The underlying algorithm used is: - * - * 
        
- *     pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.        
- *
- * - * If shift is positive then the elements of the vector are shifted to the left. - * If shift is negative then the elements of the vector are shifted to the right. - */ - -/** - * @addtogroup shift - * @{ - */ - -/** - * @brief Shifts the elements of a Q31 vector a specified number of bits. - * @param[in] *pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_shift_q31( - q31_t * pSrc, - int8_t shiftBits, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ - -#ifndef ARM_MATH_CM0 - - q31_t in1, in2, in3, in4; /* Temporary input variables */ - q31_t out1, out2, out3, out4; /* Temporary output variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift the input and then store the results in the destination buffer. */ - in1 = *pSrc; - in2 = *(pSrc + 1); - out1 = in1 << shiftBits; - in3 = *(pSrc + 2); - out2 = in2 << shiftBits; - in4 = *(pSrc + 3); - if(in1 != (out1 >> shiftBits)) - out1 = 0x7FFFFFFF ^ (in1 >> 31); - - if(in2 != (out2 >> shiftBits)) - out2 = 0x7FFFFFFF ^ (in2 >> 31); - - *pDst = out1; - out3 = in3 << shiftBits; - *(pDst + 1) = out2; - out4 = in4 << shiftBits; - - if(in3 != (out3 >> shiftBits)) - out3 = 0x7FFFFFFF ^ (in3 >> 31); - - if(in4 != (out4 >> shiftBits)) - out4 = 0x7FFFFFFF ^ (in4 >> 31); - - *(pDst + 2) = out3; - *(pDst + 3) = out4; - - /* Update destination pointer to process next sampels */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the input and then store the results in the destination buffer. */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - *pDst = (in1 >> -shiftBits); - *(pDst + 1) = (in2 >> -shiftBits); - *(pDst + 2) = (in3 >> -shiftBits); - *(pDst + 3) = (in4 >> -shiftBits); - - - pSrc += 4u; - pDst += 4u; - - blkCnt--; - } - - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - - while(blkCnt > 0u) - { - /* C = A (>> or <<) shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) : - (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - - -} - -/** - * @} end of shift group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c deleted file mode 100644 index 687a333234..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c +++ /dev/null @@ -1,215 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_shift_q7.c -* -* Description: Processing function for the Q7 Shifting -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup shift - * @{ - */ - - -/** - * @brief Shifts the elements of a Q7 vector a specified number of bits. - * @param[in] *pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * \par Conditions for optimum performance - * Input and output buffers should be aligned by 32-bit - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated. - */ - -void arm_shift_q7( - q7_t * pSrc, - int8_t shiftBits, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - uint8_t sign; /* Sign of shiftBits */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q7_t in1; /* Input value1 */ - q7_t in2; /* Input value2 */ - q7_t in3; /* Input value3 */ - q7_t in4; /* Input value4 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Read 4 inputs */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ - *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8), - __SSAT((in2 << shiftBits), 8), - __SSAT((in3 << shiftBits), 8), - __SSAT((in4 << shiftBits), 8)); - /* Update source pointer to process next sampels */ - pSrc += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - shiftBits = -shiftBits; - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Read 4 inputs */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ - *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits), - (in3 >> shiftBits), (in4 >> shiftBits)); - - - pSrc += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - in1 = *pSrc++; - *pDst++ = (in1 >> shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#endif /* #ifndef ARM_MATH_CM0 */ -} - -/** - * @} end of shift group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c deleted file mode 100644 index 0fcd328693..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c +++ /dev/null @@ -1,145 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sub_f32.c -* -* Description: Floating-point vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicSub Vector Subtraction - * - * Element-by-element subtraction of two vectors. - * - * 
        
- *     pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.        
- *
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicSub - * @{ - */ - - -/** - * @brief Floating-point vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_sub_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t inA1, inA2, inA3, inA4; /* temporary variables */ - float32_t inB1, inB2, inB3, inB4; /* temporary variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer. */ - /* Read 4 input samples from sourceA and sourceB */ - inA1 = *pSrcA; - inB1 = *pSrcB; - inA2 = *(pSrcA + 1); - inB2 = *(pSrcB + 1); - inA3 = *(pSrcA + 2); - inB3 = *(pSrcB + 2); - inA4 = *(pSrcA + 3); - inB4 = *(pSrcB + 3); - - /* dst = srcA - srcB */ - /* subtract and store the result */ - *pDst = inA1 - inB1; - *(pDst + 1) = inA2 - inB2; - *(pDst + 2) = inA3 - inB3; - *(pDst + 3) = inA4 - inB4; - - - /* Update pointers to process next sampels */ - pSrcA += 4u; - pSrcB += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0 */ - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer. */ - *pDst++ = (*pSrcA++) - (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c deleted file mode 100644 index c372c12357..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sub_q15.c -* -* Description: Q15 vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicSub - * @{ - */ - -/** - * @brief Q15 vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_sub_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2; - q31_t inB1, inB2; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer two samples at a time. */ - inA1 = *__SIMD32(pSrcA)++; - inA2 = *__SIMD32(pSrcA)++; - inB1 = *__SIMD32(pSrcB)++; - inB2 = *__SIMD32(pSrcB)++; - - *__SIMD32(pDst)++ = __QSUB16(inA1, inB1); - *__SIMD32(pDst)++ = __QSUB16(inA2, inB2); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - -} - -/** - * @} end of BasicSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c deleted file mode 100644 index 829f25db0b..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sub_q31.c -* -* Description: Q31 vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicSub - * @{ - */ - -/** - * @brief Q31 vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_sub_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; - q31_t inB1, inB2, inB3, inB4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - *pDst++ = __QSUB(inA1, inB1); - *pDst++ = __QSUB(inA2, inB2); - *pDst++ = __QSUB(inA3, inB3); - *pDst++ = __QSUB(inA4, inB4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = __QSUB(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - -} - -/** - * @} end of BasicSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c deleted file mode 100644 index 0bbaf8f055..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c +++ /dev/null @@ -1,126 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_sub_q7.c -* -* Description: Q7 vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicSub - * @{ - */ - -/** - * @brief Q7 vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ - -void arm_sub_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0 - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer 4 samples at a time. */ - *__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0 */ - - -} - -/** - * @} end of BasicSub group - */ diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c deleted file mode 100644 index eeea42387f..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c +++ /dev/null @@ -1,4689 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_common_tables.c -* -* Description: This file has common tables like fft twiddle factors, Bitreverse, reciprocal etc which are used across different functions -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup CFFT_CIFFT Complex FFT Tables - * @{ - */ - -/** -* \par -* Pseudo code for Generation of Bit reversal Table is -* \par -* 
for(l=1;l <= N/4;l++)    
-* {    
-*   for(i=0;i> 1;    
-*  }
-* \par -* where N = 4096 logN2 = 12 -* \par -* N is the maximum FFT Size supported -*/ - -/* -* @brief Table for bit reversal process -*/ -const uint16_t armBitRevTable[1024] = { - 0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, - 0x80, 0x480, 0x280, 0x680, 0x180, 0x580, 0x380, - 0x780, 0x40, 0x440, 0x240, 0x640, 0x140, 0x540, - 0x340, 0x740, 0xc0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, - 0x5c0, 0x3c0, 0x7c0, 0x20, 0x420, 0x220, 0x620, - 0x120, 0x520, 0x320, 0x720, 0xa0, 0x4a0, 0x2a0, - 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x60, 0x460, - 0x260, 0x660, 0x160, 0x560, 0x360, 0x760, 0xe0, - 0x4e0, 0x2e0, 0x6e0, 0x1e0, 0x5e0, 0x3e0, 0x7e0, - 0x10, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310, - 0x710, 0x90, 0x490, 0x290, 0x690, 0x190, 0x590, - 0x390, 0x790, 0x50, 0x450, 0x250, 0x650, 0x150, - 0x550, 0x350, 0x750, 0xd0, 0x4d0, 0x2d0, 0x6d0, - 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x30, 0x430, 0x230, - 0x630, 0x130, 0x530, 0x330, 0x730, 0xb0, 0x4b0, - 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0, 0x7b0, 0x70, - 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, - 0xf0, 0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, - 0x7f0, 0x8, 0x408, 0x208, 0x608, 0x108, 0x508, - 0x308, 0x708, 0x88, 0x488, 0x288, 0x688, 0x188, - 0x588, 0x388, 0x788, 0x48, 0x448, 0x248, 0x648, - 0x148, 0x548, 0x348, 0x748, 0xc8, 0x4c8, 0x2c8, - 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x28, 0x428, - 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0xa8, - 0x4a8, 0x2a8, 0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, - 0x68, 0x468, 0x268, 0x668, 0x168, 0x568, 0x368, - 0x768, 0xe8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, - 0x3e8, 0x7e8, 0x18, 0x418, 0x218, 0x618, 0x118, - 0x518, 0x318, 0x718, 0x98, 0x498, 0x298, 0x698, - 0x198, 0x598, 0x398, 0x798, 0x58, 0x458, 0x258, - 0x658, 0x158, 0x558, 0x358, 0x758, 0xd8, 0x4d8, - 0x2d8, 0x6d8, 0x1d8, 0x5d8, 0x3d8, 0x7d8, 0x38, - 0x438, 0x238, 0x638, 0x138, 0x538, 0x338, 0x738, - 0xb8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, - 0x7b8, 0x78, 0x478, 0x278, 0x678, 0x178, 0x578, - 0x378, 0x778, 0xf8, 0x4f8, 0x2f8, 0x6f8, 0x1f8, - 0x5f8, 0x3f8, 0x7f8, 0x4, 0x404, 0x204, 0x604, - 0x104, 0x504, 0x304, 0x704, 0x84, 0x484, 0x284, - 0x684, 0x184, 0x584, 0x384, 0x784, 0x44, 0x444, - 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0xc4, - 0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, - 0x24, 0x424, 0x224, 0x624, 0x124, 0x524, 0x324, - 0x724, 0xa4, 0x4a4, 0x2a4, 0x6a4, 0x1a4, 0x5a4, - 0x3a4, 0x7a4, 0x64, 0x464, 0x264, 0x664, 0x164, - 0x564, 0x364, 0x764, 0xe4, 0x4e4, 0x2e4, 0x6e4, - 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x14, 0x414, 0x214, - 0x614, 0x114, 0x514, 0x314, 0x714, 0x94, 0x494, - 0x294, 0x694, 0x194, 0x594, 0x394, 0x794, 0x54, - 0x454, 0x254, 0x654, 0x154, 0x554, 0x354, 0x754, - 0xd4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4, - 0x7d4, 0x34, 0x434, 0x234, 0x634, 0x134, 0x534, - 0x334, 0x734, 0xb4, 0x4b4, 0x2b4, 0x6b4, 0x1b4, - 0x5b4, 0x3b4, 0x7b4, 0x74, 0x474, 0x274, 0x674, - 0x174, 0x574, 0x374, 0x774, 0xf4, 0x4f4, 0x2f4, - 0x6f4, 0x1f4, 0x5f4, 0x3f4, 0x7f4, 0xc, 0x40c, - 0x20c, 0x60c, 0x10c, 0x50c, 0x30c, 0x70c, 0x8c, - 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, - 0x4c, 0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, - 0x74c, 0xcc, 0x4cc, 0x2cc, 0x6cc, 0x1cc, 0x5cc, - 0x3cc, 0x7cc, 0x2c, 0x42c, 0x22c, 0x62c, 0x12c, - 0x52c, 0x32c, 0x72c, 0xac, 0x4ac, 0x2ac, 0x6ac, - 0x1ac, 0x5ac, 0x3ac, 0x7ac, 0x6c, 0x46c, 0x26c, - 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0xec, 0x4ec, - 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x1c, - 0x41c, 0x21c, 0x61c, 0x11c, 0x51c, 0x31c, 0x71c, - 0x9c, 0x49c, 0x29c, 0x69c, 0x19c, 0x59c, 0x39c, - 0x79c, 0x5c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, - 0x35c, 0x75c, 0xdc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, - 0x5dc, 0x3dc, 0x7dc, 0x3c, 0x43c, 0x23c, 0x63c, - 0x13c, 0x53c, 0x33c, 0x73c, 0xbc, 0x4bc, 0x2bc, - 0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x7c, 0x47c, - 0x27c, 0x67c, 0x17c, 0x57c, 0x37c, 0x77c, 0xfc, - 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc, 0x7fc, - 0x2, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, - 0x702, 0x82, 0x482, 0x282, 0x682, 0x182, 0x582, - 0x382, 0x782, 0x42, 0x442, 0x242, 0x642, 0x142, - 0x542, 0x342, 0x742, 0xc2, 0x4c2, 0x2c2, 0x6c2, - 0x1c2, 0x5c2, 0x3c2, 0x7c2, 0x22, 0x422, 0x222, - 0x622, 0x122, 0x522, 0x322, 0x722, 0xa2, 0x4a2, - 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x62, - 0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, - 0xe2, 0x4e2, 0x2e2, 0x6e2, 0x1e2, 0x5e2, 0x3e2, - 0x7e2, 0x12, 0x412, 0x212, 0x612, 0x112, 0x512, - 0x312, 0x712, 0x92, 0x492, 0x292, 0x692, 0x192, - 0x592, 0x392, 0x792, 0x52, 0x452, 0x252, 0x652, - 0x152, 0x552, 0x352, 0x752, 0xd2, 0x4d2, 0x2d2, - 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x32, 0x432, - 0x232, 0x632, 0x132, 0x532, 0x332, 0x732, 0xb2, - 0x4b2, 0x2b2, 0x6b2, 0x1b2, 0x5b2, 0x3b2, 0x7b2, - 0x72, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372, - 0x772, 0xf2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, - 0x3f2, 0x7f2, 0xa, 0x40a, 0x20a, 0x60a, 0x10a, - 0x50a, 0x30a, 0x70a, 0x8a, 0x48a, 0x28a, 0x68a, - 0x18a, 0x58a, 0x38a, 0x78a, 0x4a, 0x44a, 0x24a, - 0x64a, 0x14a, 0x54a, 0x34a, 0x74a, 0xca, 0x4ca, - 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca, 0x7ca, 0x2a, - 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, - 0xaa, 0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, - 0x7aa, 0x6a, 0x46a, 0x26a, 0x66a, 0x16a, 0x56a, - 0x36a, 0x76a, 0xea, 0x4ea, 0x2ea, 0x6ea, 0x1ea, - 0x5ea, 0x3ea, 0x7ea, 0x1a, 0x41a, 0x21a, 0x61a, - 0x11a, 0x51a, 0x31a, 0x71a, 0x9a, 0x49a, 0x29a, - 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a, 0x45a, - 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0xda, - 0x4da, 0x2da, 0x6da, 0x1da, 0x5da, 0x3da, 0x7da, - 0x3a, 0x43a, 0x23a, 0x63a, 0x13a, 0x53a, 0x33a, - 0x73a, 0xba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, - 0x3ba, 0x7ba, 0x7a, 0x47a, 0x27a, 0x67a, 0x17a, - 0x57a, 0x37a, 0x77a, 0xfa, 0x4fa, 0x2fa, 0x6fa, - 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x6, 0x406, 0x206, - 0x606, 0x106, 0x506, 0x306, 0x706, 0x86, 0x486, - 0x286, 0x686, 0x186, 0x586, 0x386, 0x786, 0x46, - 0x446, 0x246, 0x646, 0x146, 0x546, 0x346, 0x746, - 0xc6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, - 0x7c6, 0x26, 0x426, 0x226, 0x626, 0x126, 0x526, - 0x326, 0x726, 0xa6, 0x4a6, 0x2a6, 0x6a6, 0x1a6, - 0x5a6, 0x3a6, 0x7a6, 0x66, 0x466, 0x266, 0x666, - 0x166, 0x566, 0x366, 0x766, 0xe6, 0x4e6, 0x2e6, - 0x6e6, 0x1e6, 0x5e6, 0x3e6, 0x7e6, 0x16, 0x416, - 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x96, - 0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, - 0x56, 0x456, 0x256, 0x656, 0x156, 0x556, 0x356, - 0x756, 0xd6, 0x4d6, 0x2d6, 0x6d6, 0x1d6, 0x5d6, - 0x3d6, 0x7d6, 0x36, 0x436, 0x236, 0x636, 0x136, - 0x536, 0x336, 0x736, 0xb6, 0x4b6, 0x2b6, 0x6b6, - 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x76, 0x476, 0x276, - 0x676, 0x176, 0x576, 0x376, 0x776, 0xf6, 0x4f6, - 0x2f6, 0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0xe, - 0x40e, 0x20e, 0x60e, 0x10e, 0x50e, 0x30e, 0x70e, - 0x8e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e, - 0x78e, 0x4e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, - 0x34e, 0x74e, 0xce, 0x4ce, 0x2ce, 0x6ce, 0x1ce, - 0x5ce, 0x3ce, 0x7ce, 0x2e, 0x42e, 0x22e, 0x62e, - 0x12e, 0x52e, 0x32e, 0x72e, 0xae, 0x4ae, 0x2ae, - 0x6ae, 0x1ae, 0x5ae, 0x3ae, 0x7ae, 0x6e, 0x46e, - 0x26e, 0x66e, 0x16e, 0x56e, 0x36e, 0x76e, 0xee, - 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, - 0x1e, 0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, - 0x71e, 0x9e, 0x49e, 0x29e, 0x69e, 0x19e, 0x59e, - 0x39e, 0x79e, 0x5e, 0x45e, 0x25e, 0x65e, 0x15e, - 0x55e, 0x35e, 0x75e, 0xde, 0x4de, 0x2de, 0x6de, - 0x1de, 0x5de, 0x3de, 0x7de, 0x3e, 0x43e, 0x23e, - 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0xbe, 0x4be, - 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x7e, - 0x47e, 0x27e, 0x67e, 0x17e, 0x57e, 0x37e, 0x77e, - 0xfe, 0x4fe, 0x2fe, 0x6fe, 0x1fe, 0x5fe, 0x3fe, - 0x7fe, 0x1 -}; - - -/* -* @brief Floating-point Twiddle factors Table Generation -*/ - - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 4096 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float32_t twiddleCoef[6144] = { - 1.000000000000000000f, 0.000000000000000000f, 0.999998823451701880f, - 0.001533980186284766f, 0.999995293809576190f, 0.003067956762965976f, - 0.999989411081928400f, 0.004601926120448571f, 0.999981175282601110f, - 0.006135884649154475f, 0.999970586430974140f, 0.007669828739531097f, - 0.999957644551963900f, 0.009203754782059819f, 0.999942349676023910f, - 0.010737659167264491f, 0.999924701839144500f, 0.012271538285719925f, - 0.999904701082852900f, 0.013805388528060391f, 0.999882347454212560f, - 0.015339206284988100f, 0.999857641005823860f, 0.016872987947281710f, - 0.999830581795823400f, 0.018406729905804820f, 0.999801169887884260f, - 0.019940428551514441f, 0.999769405351215280f, 0.021474080275469508f, - 0.999735288260561680f, 0.023007681468839369f, 0.999698818696204250f, - 0.024541228522912288f, 0.999659996743959220f, 0.026074717829103901f, - 0.999618822495178640f, 0.027608145778965740f, 0.999575296046749220f, - 0.029141508764193722f, 0.999529417501093140f, 0.030674803176636626f, - 0.999481186966166950f, 0.032208025408304586f, 0.999430604555461730f, - 0.033741171851377580f, 0.999377670388002850f, 0.035274238898213947f, - 0.999322384588349540f, 0.036807222941358832f, 0.999264747286594420f, - 0.038340120373552694f, 0.999204758618363890f, 0.039872927587739811f, - 0.999142418724816910f, 0.041405640977076739f, 0.999077727752645360f, - 0.042938256934940820f, 0.999010685854073380f, 0.044470771854938668f, - 0.998941293186856870f, 0.046003182130914623f, 0.998869549914283560f, - 0.047535484156959303f, 0.998795456205172410f, 0.049067674327418015f, - 0.998719012233872940f, 0.050599749036899282f, 0.998640218180265270f, - 0.052131704680283324f, 0.998559074229759310f, 0.053663537652730520f, - 0.998475580573294770f, 0.055195244349689934f, 0.998389737407340160f, - 0.056726821166907748f, 0.998301544933892890f, 0.058258264500435752f, - 0.998211003360478190f, 0.059789570746639868f, 0.998118112900149180f, - 0.061320736302208578f, 0.998022873771486240f, 0.062851757564161406f, - 0.997925286198596000f, 0.064382630929857465f, 0.997825350411111640f, - 0.065913352797003805f, 0.997723066644191640f, 0.067443919563664051f, - 0.997618435138519550f, 0.068974327628266746f, 0.997511456140303450f, - 0.070504573389613856f, 0.997402129901275300f, 0.072034653246889332f, - 0.997290456678690210f, 0.073564563599667426f, 0.997176436735326190f, - 0.075094300847921305f, 0.997060070339482960f, 0.076623861392031492f, - 0.996941357764982160f, 0.078153241632794232f, 0.996820299291165670f, - 0.079682437971430126f, 0.996696895202896060f, 0.081211446809592441f, - 0.996571145790554840f, 0.082740264549375692f, 0.996443051350042630f, - 0.084268887593324071f, 0.996312612182778000f, 0.085797312344439894f, - 0.996179828595696980f, 0.087325535206192059f, 0.996044700901251970f, - 0.088853552582524600f, 0.995907229417411720f, 0.090381360877864983f, - 0.995767414467659820f, 0.091908956497132724f, 0.995625256380994310f, - 0.093436335845747787f, 0.995480755491926940f, 0.094963495329638992f, - 0.995333912140482280f, 0.096490431355252593f, 0.995184726672196930f, - 0.098017140329560604f, 0.995033199438118630f, 0.099543618660069319f, - 0.994879330794805620f, 0.101069862754827820f, 0.994723121104325700f, - 0.102595869022436280f, 0.994564570734255420f, 0.104121633872054590f, - 0.994403680057679100f, 0.105647153713410620f, 0.994240449453187900f, - 0.107172424956808840f, 0.994074879304879370f, 0.108697444013138720f, - 0.993906970002356060f, 0.110222207293883060f, 0.993736721940724600f, - 0.111746711211126590f, 0.993564135520595300f, 0.113270952177564350f, - 0.993389211148080650f, 0.114794926606510080f, 0.993211949234794500f, - 0.116318630911904750f, 0.993032350197851410f, 0.117842061508324980f, - 0.992850414459865100f, 0.119365214810991350f, 0.992666142448948020f, - 0.120888087235777080f, 0.992479534598709970f, 0.122410675199216200f, - 0.992290591348257370f, 0.123932975118512160f, 0.992099313142191800f, - 0.125454983411546230f, 0.991905700430609330f, 0.126976696496885870f, - 0.991709753669099530f, 0.128498110793793170f, 0.991511473318743900f, - 0.130019222722233350f, 0.991310859846115440f, 0.131540028702883120f, - 0.991107913723276890f, 0.133060525157139060f, 0.990902635427780010f, - 0.134580708507126170f, 0.990695025442664630f, 0.136100575175706200f, - 0.990485084256457090f, 0.137620121586486040f, 0.990272812363169110f, - 0.139139344163826200f, 0.990058210262297120f, 0.140658239332849210f, - 0.989841278458820530f, 0.142176803519448030f, 0.989622017463200890f, - 0.143695033150294470f, 0.989400427791380380f, 0.145212924652847460f, - 0.989176509964781010f, 0.146730474455361750f, 0.988950264510302990f, - 0.148247678986896030f, 0.988721691960323780f, 0.149764534677321510f, - 0.988490792852696590f, 0.151281037957330220f, 0.988257567730749460f, - 0.152797185258443440f, 0.988022017143283530f, 0.154312973013020100f, - 0.987784141644572180f, 0.155828397654265230f, 0.987543941794359230f, - 0.157343455616238250f, 0.987301418157858430f, 0.158858143333861450f, - 0.987056571305750970f, 0.160372457242928280f, 0.986809401814185530f, - 0.161886393780111830f, 0.986559910264775410f, 0.163399949382973230f, - 0.986308097244598670f, 0.164913120489969890f, 0.986053963346195440f, - 0.166425903540464100f, 0.985797509167567480f, 0.167938294974731170f, - 0.985538735312176060f, 0.169450291233967960f, 0.985277642388941220f, - 0.170961888760301220f, 0.985014231012239840f, 0.172473083996795950f, - 0.984748501801904210f, 0.173983873387463820f, 0.984480455383220930f, - 0.175494253377271430f, 0.984210092386929030f, 0.177004220412148750f, - 0.983937413449218920f, 0.178513770938997510f, 0.983662419211730250f, - 0.180022901405699510f, 0.983385110321551180f, 0.181531608261124970f, - 0.983105487431216290f, 0.183039887955140950f, 0.982823551198705240f, - 0.184547736938619620f, 0.982539302287441240f, 0.186055151663446630f, - 0.982252741366289370f, 0.187562128582529600f, 0.981963869109555240f, - 0.189068664149806190f, 0.981672686196983110f, 0.190574754820252740f, - 0.981379193313754560f, 0.192080397049892440f, 0.981083391150486710f, - 0.193585587295803610f, 0.980785280403230430f, 0.195090322016128250f, - 0.980484861773469380f, 0.196594597670080220f, 0.980182135968117430f, - 0.198098410717953560f, 0.979877103699517640f, 0.199601757621130970f, - 0.979569765685440520f, 0.201104634842091900f, 0.979260122649082020f, - 0.202607038844421130f, 0.978948175319062200f, 0.204108966092816870f, - 0.978633924429423210f, 0.205610413053099240f, 0.978317370719627650f, - 0.207111376192218560f, 0.977998514934557140f, 0.208611851978263490f, - 0.977677357824509930f, 0.210111836880469610f, 0.977353900145199960f, - 0.211611327369227550f, 0.977028142657754390f, 0.213110319916091360f, - 0.976700086128711840f, 0.214608810993786760f, 0.976369731330021140f, - 0.216106797076219520f, 0.976037079039039020f, 0.217604274638483640f, - 0.975702130038528570f, 0.219101240156869800f, 0.975364885116656980f, - 0.220597690108873510f, 0.975025345066994120f, 0.222093620973203510f, - 0.974683510688510670f, 0.223589029229789990f, 0.974339382785575860f, - 0.225083911359792830f, 0.973992962167955830f, 0.226578263845610000f, - 0.973644249650811980f, 0.228072083170885730f, 0.973293246054698250f, - 0.229565365820518870f, 0.972939952205560180f, 0.231058108280671110f, - 0.972584368934732210f, 0.232550307038775240f, 0.972226497078936270f, - 0.234041958583543430f, 0.971866337480279400f, 0.235533059404975490f, - 0.971503890986251780f, 0.237023605994367200f, 0.971139158449725090f, - 0.238513594844318420f, 0.970772140728950350f, 0.240003022448741500f, - 0.970402838687555500f, 0.241491885302869330f, 0.970031253194543970f, - 0.242980179903263870f, 0.969657385124292450f, 0.244467902747824150f, - 0.969281235356548530f, 0.245955050335794590f, 0.968902804776428870f, - 0.247441619167773270f, 0.968522094274417380f, 0.248927605745720150f, - 0.968139104746362440f, 0.250413006572965220f, 0.967753837093475510f, - 0.251897818154216970f, 0.967366292222328510f, 0.253382036995570160f, - 0.966976471044852070f, 0.254865659604514570f, 0.966584374478333120f, - 0.256348682489942910f, 0.966190003445412500f, 0.257831102162158990f, - 0.965793358874083680f, 0.259312915132886230f, 0.965394441697689400f, - 0.260794117915275510f, 0.964993252854920320f, 0.262274707023913590f, - 0.964589793289812760f, 0.263754678974831350f, 0.964184063951745830f, - 0.265234030285511790f, 0.963776065795439840f, 0.266712757474898370f, - 0.963365799780954050f, 0.268190857063403180f, 0.962953266873683880f, - 0.269668325572915090f, 0.962538468044359160f, 0.271145159526808010f, - 0.962121404269041580f, 0.272621355449948980f, 0.961702076529122540f, - 0.274096909868706380f, 0.961280485811320640f, 0.275571819310958140f, - 0.960856633107679660f, 0.277046080306099900f, 0.960430519415565790f, - 0.278519689385053060f, 0.960002145737665960f, 0.279992643080273220f, - 0.959571513081984520f, 0.281464937925757940f, 0.959138622461841890f, - 0.282936570457055390f, 0.958703474895871600f, 0.284407537211271880f, - 0.958266071408017670f, 0.285877834727080620f, 0.957826413027532910f, - 0.287347459544729510f, 0.957384500788975860f, 0.288816408206049480f, - 0.956940335732208820f, 0.290284677254462330f, 0.956493918902395100f, - 0.291752263234989260f, 0.956045251349996410f, 0.293219162694258630f, - 0.955594334130771110f, 0.294685372180514330f, 0.955141168305770780f, - 0.296150888243623790f, 0.954685754941338340f, 0.297615707435086200f, - 0.954228095109105670f, 0.299079826308040480f, 0.953768189885990330f, - 0.300543241417273450f, 0.953306040354193860f, 0.302005949319228080f, - 0.952841647601198720f, 0.303467946572011320f, 0.952375012719765880f, - 0.304929229735402370f, 0.951906136807932350f, 0.306389795370860920f, - 0.951435020969008340f, 0.307849640041534870f, 0.950961666311575080f, - 0.309308760312268730f, 0.950486073949481700f, 0.310767152749611470f, - 0.950008245001843000f, 0.312224813921824880f, 0.949528180593036670f, - 0.313681740398891520f, 0.949045881852700560f, 0.315137928752522440f, - 0.948561349915730270f, 0.316593375556165850f, 0.948074585922276230f, - 0.318048077385014950f, 0.947585591017741090f, 0.319502030816015690f, - 0.947094366352777220f, 0.320955232427875210f, 0.946600913083283530f, - 0.322407678801069850f, 0.946105232370403450f, 0.323859366517852850f, - 0.945607325380521280f, 0.325310292162262930f, 0.945107193285260610f, - 0.326760452320131730f, 0.944604837261480260f, 0.328209843579092500f, - 0.944100258491272660f, 0.329658462528587490f, 0.943593458161960390f, - 0.331106305759876430f, 0.943084437466093490f, 0.332553369866044220f, - 0.942573197601446870f, 0.333999651442009380f, 0.942059739771017310f, - 0.335445147084531600f, 0.941544065183020810f, 0.336889853392220050f, - 0.941026175050889260f, 0.338333766965541130f, 0.940506070593268300f, - 0.339776884406826850f, 0.939983753034014050f, 0.341219202320282360f, - 0.939459223602189920f, 0.342660717311994380f, 0.938932483532064600f, - 0.344101425989938810f, 0.938403534063108060f, 0.345541324963989090f, - 0.937872376439989890f, 0.346980410845923680f, 0.937339011912574960f, - 0.348418680249434560f, 0.936803441735921560f, 0.349856129790134920f, - 0.936265667170278260f, 0.351292756085567090f, 0.935725689481080370f, - 0.352728555755210730f, 0.935183509938947610f, 0.354163525420490340f, - 0.934639129819680780f, 0.355597661704783850f, 0.934092550404258980f, - 0.357030961233429980f, 0.933543772978836170f, 0.358463420633736540f, - 0.932992798834738960f, 0.359895036534988110f, 0.932439629268462360f, - 0.361325805568454280f, 0.931884265581668150f, 0.362755724367397230f, - 0.931326709081180430f, 0.364184789567079890f, 0.930766961078983710f, - 0.365612997804773850f, 0.930205022892219070f, 0.367040345719767180f, - 0.929640895843181330f, 0.368466829953372320f, 0.929074581259315860f, - 0.369892447148934100f, 0.928506080473215590f, 0.371317193951837540f, - 0.927935394822617890f, 0.372741067009515760f, 0.927362525650401110f, - 0.374164062971457930f, 0.926787474304581750f, 0.375586178489217220f, - 0.926210242138311380f, 0.377007410216418260f, 0.925630830509872720f, - 0.378427754808765560f, 0.925049240782677580f, 0.379847208924051160f, - 0.924465474325262600f, 0.381265769222162380f, 0.923879532511286740f, - 0.382683432365089780f, 0.923291416719527640f, 0.384100195016935040f, - 0.922701128333878630f, 0.385516053843918850f, 0.922108668743345180f, - 0.386931005514388580f, 0.921514039342042010f, 0.388345046698826250f, - 0.920917241529189520f, 0.389758174069856410f, 0.920318276709110590f, - 0.391170384302253870f, 0.919717146291227360f, 0.392581674072951470f, - 0.919113851690057770f, 0.393992040061048100f, 0.918508394325212250f, - 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-0.997402129901275300f, -0.070504573389614356f, -0.997511456140303450f, - -0.068974327628267079f, -0.997618435138519550f, -0.067443919563664231f, - -0.997723066644191640f, -0.065913352797003832f, -0.997825350411111640f, - -0.064382630929857312f, -0.997925286198596000f, -0.062851757564161989f, - -0.998022873771486130f, -0.061320736302208995f, -0.998118112900149180f, - -0.059789570746640132f, -0.998211003360478190f, -0.058258264500435857f, - -0.998301544933892780f, -0.056726821166907686f, -0.998389737407340160f, - -0.055195244349689712f, -0.998475580573294770f, -0.053663537652731026f, - -0.998559074229759310f, -0.052131704680283657f, -0.998640218180265160f, - -0.050599749036899455f, -0.998719012233872940f, -0.049067674327418029f, - -0.998795456205172410f, -0.047535484156959157f, -0.998869549914283560f, - -0.046003182130915206f, -0.998941293186856870f, -0.044470771854939084f, - -0.999010685854073270f, -0.042938256934941084f, -0.999077727752645360f, - -0.041405640977076837f, -0.999142418724816910f, -0.039872927587739748f, - -0.999204758618363890f, -0.038340120373552472f, -0.999264747286594420f, - -0.036807222941359331f, -0.999322384588349430f, -0.035274238898214294f, - -0.999377670388002850f, -0.033741171851377760f, -0.999430604555461730f, - -0.032208025408304600f, -0.999481186966166950f, -0.030674803176636484f, - -0.999529417501093140f, -0.029141508764194309f, -0.999575296046749220f, - -0.027608145778966163f, -0.999618822495178640f, -0.026074717829104161f, - -0.999659996743959220f, -0.024541228522912389f, -0.999698818696204250f, - -0.023007681468839310f, -0.999735288260561680f, -0.021474080275469286f, - -0.999769405351215280f, -0.019940428551514944f, -0.999801169887884260f, - -0.018406729905805164f, -0.999830581795823400f, -0.016872987947281894f, - -0.999857641005823860f, -0.015339206284988121f, -0.999882347454212560f, - -0.013805388528060250f, -0.999904701082852900f, -0.012271538285720512f, - -0.999924701839144500f, -0.010737659167264916f, -0.999942349676023910f, - -0.009203754782060083f, -0.999957644551963900f, -0.007669828739531199f, - -0.999970586430974140f, -0.006135884649154416f, -0.999981175282601110f, - -0.004601926120448350f, -0.999989411081928400f, -0.003067956762966483f, - -0.999995293809576190f, -0.001533980186285111f, -0.999998823451701880f, -}; - -/* -* @brief Q31 Twiddle factors Table -*/ - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 4096 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ - -const q31_t twiddleCoefQ31[6144] = { - 0x7fffffff, 0x0, 0x7ffff621, 0x3243f5, 0x7fffd886, 0x6487e3, 0x7fffa72c, - 0x96cbc1, - 0x7fff6216, 0xc90f88, 0x7fff0943, 0xfb5330, 0x7ffe9cb2, 0x12d96b1, - 0x7ffe1c65, 0x15fda03, - 0x7ffd885a, 0x1921d20, 0x7ffce093, 0x1c45ffe, 0x7ffc250f, 0x1f6a297, - 0x7ffb55ce, 0x228e4e2, - 0x7ffa72d1, 0x25b26d7, 0x7ff97c18, 0x28d6870, 0x7ff871a2, 0x2bfa9a4, - 0x7ff75370, 0x2f1ea6c, - 0x7ff62182, 0x3242abf, 0x7ff4dbd9, 0x3566a96, 0x7ff38274, 0x388a9ea, - 0x7ff21553, 0x3bae8b2, - 0x7ff09478, 0x3ed26e6, 0x7feeffe1, 0x41f6480, 0x7fed5791, 0x451a177, - 0x7feb9b85, 0x483ddc3, - 0x7fe9cbc0, 0x4b6195d, 0x7fe7e841, 0x4e8543e, 0x7fe5f108, 0x51a8e5c, - 0x7fe3e616, 0x54cc7b1, - 0x7fe1c76b, 0x57f0035, 0x7fdf9508, 0x5b137df, 0x7fdd4eec, 0x5e36ea9, - 0x7fdaf519, 0x615a48b, - 0x7fd8878e, 0x647d97c, 0x7fd6064c, 0x67a0d76, 0x7fd37153, 0x6ac406f, - 0x7fd0c8a3, 0x6de7262, - 0x7fce0c3e, 0x710a345, 0x7fcb3c23, 0x742d311, 0x7fc85854, 0x77501be, - 0x7fc560cf, 0x7a72f45, - 0x7fc25596, 0x7d95b9e, 0x7fbf36aa, 0x80b86c2, 0x7fbc040a, 0x83db0a7, - 0x7fb8bdb8, 0x86fd947, - 0x7fb563b3, 0x8a2009a, 0x7fb1f5fc, 0x8d42699, 0x7fae7495, 0x9064b3a, - 0x7faadf7c, 0x9386e78, - 0x7fa736b4, 0x96a9049, 0x7fa37a3c, 0x99cb0a7, 0x7f9faa15, 0x9cecf89, - 0x7f9bc640, 0xa00ece8, - 0x7f97cebd, 0xa3308bd, 0x7f93c38c, 0xa6522fe, 0x7f8fa4b0, 0xa973ba5, - 0x7f8b7227, 0xac952aa, - 0x7f872bf3, 0xafb6805, 0x7f82d214, 0xb2d7baf, 0x7f7e648c, 0xb5f8d9f, - 0x7f79e35a, 0xb919dcf, - 0x7f754e80, 0xbc3ac35, 0x7f70a5fe, 0xbf5b8cb, 0x7f6be9d4, 0xc27c389, - 0x7f671a05, 0xc59cc68, - 0x7f62368f, 0xc8bd35e, 0x7f5d3f75, 0xcbdd865, 0x7f5834b7, 0xcefdb76, - 0x7f531655, 0xd21dc87, - 0x7f4de451, 0xd53db92, 0x7f489eaa, 0xd85d88f, 0x7f434563, 0xdb7d376, - 0x7f3dd87c, 0xde9cc40, - 0x7f3857f6, 0xe1bc2e4, 0x7f32c3d1, 0xe4db75b, 0x7f2d1c0e, 0xe7fa99e, - 0x7f2760af, 0xeb199a4, - 0x7f2191b4, 0xee38766, 0x7f1baf1e, 0xf1572dc, 0x7f15b8ee, 0xf475bff, - 0x7f0faf25, 0xf7942c7, - 0x7f0991c4, 0xfab272b, 0x7f0360cb, 0xfdd0926, 0x7efd1c3c, 0x100ee8ad, - 0x7ef6c418, 0x1040c5bb, - 0x7ef05860, 0x1072a048, 0x7ee9d914, 0x10a4784b, 0x7ee34636, 0x10d64dbd, - 0x7edc9fc6, 0x11082096, - 0x7ed5e5c6, 0x1139f0cf, 0x7ecf1837, 0x116bbe60, 0x7ec8371a, 0x119d8941, - 0x7ec14270, 0x11cf516a, - 0x7eba3a39, 0x120116d5, 0x7eb31e78, 0x1232d979, 0x7eabef2c, 0x1264994e, - 0x7ea4ac58, 0x1296564d, - 0x7e9d55fc, 0x12c8106f, 0x7e95ec1a, 0x12f9c7aa, 0x7e8e6eb2, 0x132b7bf9, - 0x7e86ddc6, 0x135d2d53, - 0x7e7f3957, 0x138edbb1, 0x7e778166, 0x13c0870a, 0x7e6fb5f4, 0x13f22f58, - 0x7e67d703, 0x1423d492, - 0x7e5fe493, 0x145576b1, 0x7e57dea7, 0x148715ae, 0x7e4fc53e, 0x14b8b17f, - 0x7e47985b, 0x14ea4a1f, - 0x7e3f57ff, 0x151bdf86, 0x7e37042a, 0x154d71aa, 0x7e2e9cdf, 0x157f0086, - 0x7e26221f, 0x15b08c12, - 0x7e1d93ea, 0x15e21445, 0x7e14f242, 0x16139918, 0x7e0c3d29, 0x16451a83, - 0x7e0374a0, 0x1676987f, - 0x7dfa98a8, 0x16a81305, 0x7df1a942, 0x16d98a0c, 0x7de8a670, 0x170afd8d, - 0x7ddf9034, 0x173c6d80, - 0x7dd6668f, 0x176dd9de, 0x7dcd2981, 0x179f429f, 0x7dc3d90d, 0x17d0a7bc, - 0x7dba7534, 0x1802092c, - 0x7db0fdf8, 0x183366e9, 0x7da77359, 0x1864c0ea, 0x7d9dd55a, 0x18961728, - 0x7d9423fc, 0x18c7699b, - 0x7d8a5f40, 0x18f8b83c, 0x7d808728, 0x192a0304, 0x7d769bb5, 0x195b49ea, - 0x7d6c9ce9, 0x198c8ce7, - 0x7d628ac6, 0x19bdcbf3, 0x7d58654d, 0x19ef0707, 0x7d4e2c7f, 0x1a203e1b, - 0x7d43e05e, 0x1a517128, - 0x7d3980ec, 0x1a82a026, 0x7d2f0e2b, 0x1ab3cb0d, 0x7d24881b, 0x1ae4f1d6, - 0x7d19eebf, 0x1b161479, - 0x7d0f4218, 0x1b4732ef, 0x7d048228, 0x1b784d30, 0x7cf9aef0, 0x1ba96335, - 0x7ceec873, 0x1bda74f6, - 0x7ce3ceb2, 0x1c0b826a, 0x7cd8c1ae, 0x1c3c8b8c, 0x7ccda169, 0x1c6d9053, - 0x7cc26de5, 0x1c9e90b8, - 0x7cb72724, 0x1ccf8cb3, 0x7cabcd28, 0x1d00843d, 0x7ca05ff1, 0x1d31774d, - 0x7c94df83, 0x1d6265dd, - 0x7c894bde, 0x1d934fe5, 0x7c7da505, 0x1dc4355e, 0x7c71eaf9, 0x1df5163f, - 0x7c661dbc, 0x1e25f282, - 0x7c5a3d50, 0x1e56ca1e, 0x7c4e49b7, 0x1e879d0d, 0x7c4242f2, 0x1eb86b46, - 0x7c362904, 0x1ee934c3, - 0x7c29fbee, 0x1f19f97b, 0x7c1dbbb3, 0x1f4ab968, 0x7c116853, 0x1f7b7481, - 0x7c0501d2, 0x1fac2abf, - 0x7bf88830, 0x1fdcdc1b, 0x7bebfb70, 0x200d888d, 0x7bdf5b94, 0x203e300d, - 0x7bd2a89e, 0x206ed295, - 0x7bc5e290, 0x209f701c, 0x7bb9096b, 0x20d0089c, 0x7bac1d31, 0x21009c0c, - 0x7b9f1de6, 0x21312a65, - 0x7b920b89, 0x2161b3a0, 0x7b84e61f, 0x219237b5, 0x7b77ada8, 0x21c2b69c, - 0x7b6a6227, 0x21f3304f, - 0x7b5d039e, 0x2223a4c5, 0x7b4f920e, 0x225413f8, 0x7b420d7a, 0x22847de0, - 0x7b3475e5, 0x22b4e274, - 0x7b26cb4f, 0x22e541af, 0x7b190dbc, 0x23159b88, 0x7b0b3d2c, 0x2345eff8, - 0x7afd59a4, 0x23763ef7, - 0x7aef6323, 0x23a6887f, 0x7ae159ae, 0x23d6cc87, 0x7ad33d45, 0x24070b08, - 0x7ac50dec, 0x243743fa, - 0x7ab6cba4, 0x24677758, 0x7aa8766f, 0x2497a517, 0x7a9a0e50, 0x24c7cd33, - 0x7a8b9348, 0x24f7efa2, - 0x7a7d055b, 0x25280c5e, 0x7a6e648a, 0x2558235f, 0x7a5fb0d8, 0x2588349d, - 0x7a50ea47, 0x25b84012, - 0x7a4210d8, 0x25e845b6, 0x7a332490, 0x26184581, 0x7a24256f, 0x26483f6c, - 0x7a151378, 0x26783370, - 0x7a05eead, 0x26a82186, 0x79f6b711, 0x26d809a5, 0x79e76ca7, 0x2707ebc7, - 0x79d80f6f, 0x2737c7e3, - 0x79c89f6e, 0x27679df4, 0x79b91ca4, 0x27976df1, 0x79a98715, 0x27c737d3, - 0x7999dec4, 0x27f6fb92, - 0x798a23b1, 0x2826b928, 0x797a55e0, 0x2856708d, 0x796a7554, 0x288621b9, - 0x795a820e, 0x28b5cca5, - 0x794a7c12, 0x28e5714b, 0x793a6361, 0x29150fa1, 0x792a37fe, 0x2944a7a2, - 0x7919f9ec, 0x29743946, - 0x7909a92d, 0x29a3c485, 0x78f945c3, 0x29d34958, 0x78e8cfb2, 0x2a02c7b8, - 0x78d846fb, 0x2a323f9e, - 0x78c7aba2, 0x2a61b101, 0x78b6fda8, 0x2a911bdc, 0x78a63d11, 0x2ac08026, - 0x789569df, 0x2aefddd8, - 0x78848414, 0x2b1f34eb, 0x78738bb3, 0x2b4e8558, 0x786280bf, 0x2b7dcf17, - 0x7851633b, 0x2bad1221, - 0x78403329, 0x2bdc4e6f, 0x782ef08b, 0x2c0b83fa, 0x781d9b65, 0x2c3ab2b9, - 0x780c33b8, 0x2c69daa6, - 0x77fab989, 0x2c98fbba, 0x77e92cd9, 0x2cc815ee, 0x77d78daa, 0x2cf72939, - 0x77c5dc01, 0x2d263596, - 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0xb397c649, 0x994e783d, - 0xb3c0200c, 0x99307ee0, 0xb3e88592, 0x9912955f, 0xb410f6d3, 0x98f4bbbc, - 0xb43973ca, 0x98d6f1fe, - 0xb461fc70, 0x98b93828, 0xb48a90c0, 0x989b8e40, 0xb4b330b3, 0x987df449, - 0xb4dbdc42, 0x98606a49, - 0xb5049368, 0x9842f043, 0xb52d561e, 0x9825863d, 0xb556245e, 0x98082c3b, - 0xb57efe22, 0x97eae242, - 0xb5a7e362, 0x97cda855, 0xb5d0d41a, 0x97b07e7a, 0xb5f9d043, 0x979364b5, - 0xb622d7d6, 0x97765b0a, - 0xb64beacd, 0x9759617f, 0xb6750921, 0x973c7817, 0xb69e32cd, 0x971f9ed7, - 0xb6c767ca, 0x9702d5c3, - 0xb6f0a812, 0x96e61ce0, 0xb719f39e, 0x96c97432, 0xb7434a67, 0x96acdbbe, - 0xb76cac69, 0x96905388, - 0xb796199b, 0x9673db94, 0xb7bf91f8, 0x965773e7, 0xb7e9157a, 0x963b1c86, - 0xb812a41a, 0x961ed574, - 0xb83c3dd1, 0x96029eb6, 0xb865e299, 0x95e67850, 0xb88f926d, 0x95ca6247, - 0xb8b94d44, 0x95ae5c9f, - 0xb8e31319, 0x9592675c, 0xb90ce3e6, 0x95768283, 0xb936bfa4, 0x955aae17, - 0xb960a64c, 0x953eea1e, - 0xb98a97d8, 0x9523369c, 0xb9b49442, 0x95079394, 0xb9de9b83, 0x94ec010b, - 0xba08ad95, 0x94d07f05, - 0xba32ca71, 0x94b50d87, 0xba5cf210, 0x9499ac95, 0xba87246d, 0x947e5c33, - 0xbab16180, 0x94631c65, - 0xbadba943, 0x9447ed2f, 0xbb05fbb0, 0x942cce96, 0xbb3058c0, 0x9411c09e, - 0xbb5ac06d, 0x93f6c34a, - 0xbb8532b0, 0x93dbd6a0, 0xbbafaf82, 0x93c0faa3, 0xbbda36dd, 0x93a62f57, - 0xbc04c8ba, 0x938b74c1, - 0xbc2f6513, 0x9370cae4, 0xbc5a0be2, 0x935631c5, 0xbc84bd1f, 0x933ba968, - 0xbcaf78c4, 0x932131d1, - 0xbcda3ecb, 0x9306cb04, 0xbd050f2c, 0x92ec7505, 0xbd2fe9e2, 0x92d22fd9, - 0xbd5acee5, 0x92b7fb82, - 0xbd85be30, 0x929dd806, 0xbdb0b7bb, 0x9283c568, 0xbddbbb7f, 0x9269c3ac, - 0xbe06c977, 0x924fd2d7, - 0xbe31e19b, 0x9235f2ec, 0xbe5d03e6, 0x921c23ef, 0xbe88304f, 0x920265e4, - 0xbeb366d1, 0x91e8b8d0, - 0xbedea765, 0x91cf1cb6, 0xbf09f205, 0x91b5919a, 0xbf3546a8, 0x919c1781, - 0xbf60a54a, 0x9182ae6d, - 0xbf8c0de3, 0x91695663, 0xbfb7806c, 0x91500f67, 0xbfe2fcdf, 0x9136d97d, - 0xc00e8336, 0x911db4a9, - 0xc03a1368, 0x9104a0ee, 0xc065ad70, 0x90eb9e50, 0xc0915148, 0x90d2acd4, - 0xc0bcfee7, 0x90b9cc7d, - 0xc0e8b648, 0x90a0fd4e, 0xc1147764, 0x90883f4d, 0xc1404233, 0x906f927c, - 0xc16c16b0, 0x9056f6df, - 0xc197f4d4, 0x903e6c7b, 0xc1c3dc97, 0x9025f352, 0xc1efcdf3, 0x900d8b69, - 0xc21bc8e1, 0x8ff534c4, - 0xc247cd5a, 0x8fdcef66, 0xc273db58, 0x8fc4bb53, 0xc29ff2d4, 0x8fac988f, - 0xc2cc13c7, 0x8f94871d, - 0xc2f83e2a, 0x8f7c8701, 0xc32471f7, 0x8f649840, 0xc350af26, 0x8f4cbadb, - 0xc37cf5b0, 0x8f34eed8, - 0xc3a94590, 0x8f1d343a, 0xc3d59ebe, 0x8f058b04, 0xc4020133, 0x8eedf33b, - 0xc42e6ce8, 0x8ed66ce1, - 0xc45ae1d7, 0x8ebef7fb, 0xc4875ff9, 0x8ea7948c, 0xc4b3e746, 0x8e904298, - 0xc4e077b8, 0x8e790222, - 0xc50d1149, 0x8e61d32e, 0xc539b3f1, 0x8e4ab5bf, 0xc5665fa9, 0x8e33a9da, - 0xc593146a, 0x8e1caf80, - 0xc5bfd22e, 0x8e05c6b7, 0xc5ec98ee, 0x8deeef82, 0xc61968a2, 0x8dd829e4, - 0xc6464144, 0x8dc175e0, - 0xc67322ce, 0x8daad37b, 0xc6a00d37, 0x8d9442b8, 0xc6cd0079, 0x8d7dc399, - 0xc6f9fc8d, 0x8d675623, - 0xc727016d, 0x8d50fa59, 0xc7540f11, 0x8d3ab03f, 0xc7812572, 0x8d2477d8, - 0xc7ae4489, 0x8d0e5127, - 0xc7db6c50, 0x8cf83c30, 0xc8089cbf, 0x8ce238f6, 0xc835d5d0, 0x8ccc477d, - 0xc863177b, 0x8cb667c8, - 0xc89061ba, 0x8ca099da, 0xc8bdb485, 0x8c8addb7, 0xc8eb0fd6, 0x8c753362, - 0xc91873a5, 0x8c5f9ade, - 0xc945dfec, 0x8c4a142f, 0xc97354a4, 0x8c349f58, 0xc9a0d1c5, 0x8c1f3c5d, - 0xc9ce5748, 0x8c09eb40, - 0xc9fbe527, 0x8bf4ac05, 0xca297b5a, 0x8bdf7eb0, 0xca5719db, 0x8bca6343, - 0xca84c0a3, 0x8bb559c1, - 0xcab26fa9, 0x8ba0622f, 0xcae026e8, 0x8b8b7c8f, 0xcb0de658, 0x8b76a8e4, - 0xcb3badf3, 0x8b61e733, - 0xcb697db0, 0x8b4d377c, 0xcb97558a, 0x8b3899c6, 0xcbc53579, 0x8b240e11, - 0xcbf31d75, 0x8b0f9462, - 0xcc210d79, 0x8afb2cbb, 0xcc4f057c, 0x8ae6d720, 0xcc7d0578, 0x8ad29394, - 0xccab0d65, 0x8abe6219, - 0xccd91d3d, 0x8aaa42b4, 0xcd0734f9, 0x8a963567, 0xcd355491, 0x8a823a36, - 0xcd637bfe, 0x8a6e5123, - 0xcd91ab39, 0x8a5a7a31, 0xcdbfe23a, 0x8a46b564, 0xcdee20fc, 0x8a3302be, - 0xce1c6777, 0x8a1f6243, - 0xce4ab5a2, 0x8a0bd3f5, 0xce790b79, 0x89f857d8, 0xcea768f2, 0x89e4edef, - 0xced5ce08, 0x89d1963c, - 0xcf043ab3, 0x89be50c3, 0xcf32aeeb, 0x89ab1d87, 0xcf612aaa, 0x8997fc8a, - 0xcf8fade9, 0x8984edcf, - 0xcfbe389f, 0x8971f15a, 0xcfeccac7, 0x895f072e, 0xd01b6459, 0x894c2f4c, - 0xd04a054e, 0x893969b9, - 0xd078ad9e, 0x8926b677, 0xd0a75d42, 0x89141589, 0xd0d61434, 0x890186f2, - 0xd104d26b, 0x88ef0ab4, - 0xd13397e2, 0x88dca0d3, 0xd1626490, 0x88ca4951, 0xd191386e, 0x88b80432, - 0xd1c01375, 0x88a5d177, - 0xd1eef59e, 0x8893b125, 0xd21ddee2, 0x8881a33d, 0xd24ccf39, 0x886fa7c2, - 0xd27bc69c, 0x885dbeb8, - 0xd2aac504, 0x884be821, 0xd2d9ca6a, 0x883a23ff, 0xd308d6c7, 0x88287256, - 0xd337ea12, 0x8816d327, - 0xd3670446, 0x88054677, 0xd396255a, 0x87f3cc48, 0xd3c54d47, 0x87e2649b, - 0xd3f47c06, 0x87d10f75, - 0xd423b191, 0x87bfccd7, 0xd452eddf, 0x87ae9cc5, 0xd48230e9, 0x879d7f41, - 0xd4b17aa8, 0x878c744d, - 0xd4e0cb15, 0x877b7bec, 0xd5102228, 0x876a9621, 0xd53f7fda, 0x8759c2ef, - 0xd56ee424, 0x87490258, - 0xd59e4eff, 0x8738545e, 0xd5cdc062, 0x8727b905, 0xd5fd3848, 0x8717304e, - 0xd62cb6a8, 0x8706ba3d, - 0xd65c3b7b, 0x86f656d3, 0xd68bc6ba, 0x86e60614, 0xd6bb585e, 0x86d5c802, - 0xd6eaf05f, 0x86c59c9f, - 0xd71a8eb5, 0x86b583ee, 0xd74a335b, 0x86a57df2, 0xd779de47, 0x86958aac, - 0xd7a98f73, 0x8685aa20, - 0xd7d946d8, 0x8675dc4f, 0xd809046e, 0x8666213c, 0xd838c82d, 0x865678eb, - 0xd868920f, 0x8646e35c, - 0xd898620c, 0x86376092, 0xd8c8381d, 0x8627f091, 0xd8f81439, 0x86189359, - 0xd927f65b, 0x860948ef, - 0xd957de7a, 0x85fa1153, 0xd987cc90, 0x85eaec88, 0xd9b7c094, 0x85dbda91, - 0xd9e7ba7f, 0x85ccdb70, - 0xda17ba4a, 0x85bdef28, 0xda47bfee, 0x85af15b9, 0xda77cb63, 0x85a04f28, - 0xdaa7dca1, 0x85919b76, - 0xdad7f3a2, 0x8582faa5, 0xdb08105e, 0x85746cb8, 0xdb3832cd, 0x8565f1b0, - 0xdb685ae9, 0x85578991, - 0xdb9888a8, 0x8549345c, 0xdbc8bc06, 0x853af214, 0xdbf8f4f8, 0x852cc2bb, - 0xdc293379, 0x851ea652, - 0xdc597781, 0x85109cdd, 0xdc89c109, 0x8502a65c, 0xdcba1008, 0x84f4c2d4, - 0xdcea6478, 0x84e6f244, - 0xdd1abe51, 0x84d934b1, 0xdd4b1d8c, 0x84cb8a1b, 0xdd7b8220, 0x84bdf286, - 0xddabec08, 0x84b06df2, - 0xdddc5b3b, 0x84a2fc62, 0xde0ccfb1, 0x84959dd9, 0xde3d4964, 0x84885258, - 0xde6dc84b, 0x847b19e1, - 0xde9e4c60, 0x846df477, 0xdeced59b, 0x8460e21a, 0xdeff63f4, 0x8453e2cf, - 0xdf2ff764, 0x8446f695, - 0xdf608fe4, 0x843a1d70, 0xdf912d6b, 0x842d5762, 0xdfc1cff3, 0x8420a46c, - 0xdff27773, 0x84140490, - 0xe02323e5, 0x840777d0, 0xe053d541, 0x83fafe2e, 0xe0848b7f, 0x83ee97ad, - 0xe0b54698, 0x83e2444d, - 0xe0e60685, 0x83d60412, 0xe116cb3d, 0x83c9d6fc, 0xe14794ba, 0x83bdbd0e, - 0xe17862f3, 0x83b1b649, - 0xe1a935e2, 0x83a5c2b0, 0xe1da0d7e, 0x8399e244, 0xe20ae9c1, 0x838e1507, - 0xe23bcaa2, 0x83825afb, - 0xe26cb01b, 0x8376b422, 0xe29d9a23, 0x836b207d, 0xe2ce88b3, 0x835fa00f, - 0xe2ff7bc3, 0x835432d8, - 0xe330734d, 0x8348d8dc, 0xe3616f48, 0x833d921b, 0xe3926fad, 0x83325e97, - 0xe3c37474, 0x83273e52, - 0xe3f47d96, 0x831c314e, 0xe4258b0a, 0x8311378d, 0xe4569ccb, 0x83065110, - 0xe487b2d0, 0x82fb7dd8, - 0xe4b8cd11, 0x82f0bde8, 0xe4e9eb87, 0x82e61141, 0xe51b0e2a, 0x82db77e5, - 0xe54c34f3, 0x82d0f1d5, - 0xe57d5fda, 0x82c67f14, 0xe5ae8ed8, 0x82bc1fa2, 0xe5dfc1e5, 0x82b1d381, - 0xe610f8f9, 0x82a79ab3, - 0xe642340d, 0x829d753a, 0xe6737319, 0x82936317, 0xe6a4b616, 0x8289644b, - 0xe6d5fcfc, 0x827f78d8, - 0xe70747c4, 0x8275a0c0, 0xe7389665, 0x826bdc04, 0xe769e8d8, 0x82622aa6, - 0xe79b3f16, 0x82588ca7, - 0xe7cc9917, 0x824f0208, 0xe7fdf6d4, 0x82458acc, 0xe82f5844, 0x823c26f3, - 0xe860bd61, 0x8232d67f, - 0xe8922622, 0x82299971, 0xe8c39280, 0x82206fcc, 0xe8f50273, 0x82175990, - 0xe92675f4, 0x820e56be, - 0xe957ecfb, 0x82056758, 0xe9896781, 0x81fc8b60, 0xe9bae57d, 0x81f3c2d7, - 0xe9ec66e8, 0x81eb0dbe, - 0xea1debbb, 0x81e26c16, 0xea4f73ee, 0x81d9dde1, 0xea80ff7a, 0x81d16321, - 0xeab28e56, 0x81c8fbd6, - 0xeae4207a, 0x81c0a801, 0xeb15b5e1, 0x81b867a5, 0xeb474e81, 0x81b03ac2, - 0xeb78ea52, 0x81a82159, - 0xebaa894f, 0x81a01b6d, 0xebdc2b6e, 0x819828fd, 0xec0dd0a8, 0x81904a0c, - 0xec3f78f6, 0x81887e9a, - 0xec71244f, 0x8180c6a9, 0xeca2d2ad, 0x8179223a, 0xecd48407, 0x8171914e, - 0xed063856, 0x816a13e6, - 0xed37ef91, 0x8162aa04, 0xed69a9b3, 0x815b53a8, 0xed9b66b2, 0x815410d4, - 0xedcd2687, 0x814ce188, - 0xedfee92b, 0x8145c5c7, 0xee30ae96, 0x813ebd90, 0xee6276bf, 0x8137c8e6, - 0xee9441a0, 0x8130e7c9, - 0xeec60f31, 0x812a1a3a, 0xeef7df6a, 0x8123603a, 0xef29b243, 0x811cb9ca, - 0xef5b87b5, 0x811626ec, - 0xef8d5fb8, 0x810fa7a0, 0xefbf3a45, 0x81093be8, 0xeff11753, 0x8102e3c4, - 0xf022f6da, 0x80fc9f35, - 0xf054d8d5, 0x80f66e3c, 0xf086bd39, 0x80f050db, 0xf0b8a401, 0x80ea4712, - 0xf0ea8d24, 0x80e450e2, - 0xf11c789a, 0x80de6e4c, 0xf14e665c, 0x80d89f51, 0xf1805662, 0x80d2e3f2, - 0xf1b248a5, 0x80cd3c2f, - 0xf1e43d1c, 0x80c7a80a, 0xf21633c0, 0x80c22784, 0xf2482c8a, 0x80bcba9d, - 0xf27a2771, 0x80b76156, - 0xf2ac246e, 0x80b21baf, 0xf2de2379, 0x80ace9ab, 0xf310248a, 0x80a7cb49, - 0xf342279b, 0x80a2c08b, - 0xf3742ca2, 0x809dc971, 0xf3a63398, 0x8098e5fb, 0xf3d83c77, 0x8094162c, - 0xf40a4735, 0x808f5a02, - 0xf43c53cb, 0x808ab180, 0xf46e6231, 0x80861ca6, 0xf4a07261, 0x80819b74, - 0xf4d28451, 0x807d2dec, - 0xf50497fb, 0x8078d40d, 0xf536ad56, 0x80748dd9, 0xf568c45b, 0x80705b50, - 0xf59add02, 0x806c3c74, - 0xf5ccf743, 0x80683143, 0xf5ff1318, 0x806439c0, 0xf6313077, 0x806055eb, - 0xf6634f59, 0x805c85c4, - 0xf6956fb7, 0x8058c94c, 0xf6c79188, 0x80552084, 0xf6f9b4c6, 0x80518b6b, - 0xf72bd967, 0x804e0a04, - 0xf75dff66, 0x804a9c4d, 0xf79026b9, 0x80474248, 0xf7c24f59, 0x8043fbf6, - 0xf7f4793e, 0x8040c956, - 0xf826a462, 0x803daa6a, 0xf858d0bb, 0x803a9f31, 0xf88afe42, 0x8037a7ac, - 0xf8bd2cef, 0x8034c3dd, - 0xf8ef5cbb, 0x8031f3c2, 0xf9218d9e, 0x802f375d, 0xf953bf91, 0x802c8ead, - 0xf985f28a, 0x8029f9b4, - 0xf9b82684, 0x80277872, 0xf9ea5b75, 0x80250ae7, 0xfa1c9157, 0x8022b114, - 0xfa4ec821, 0x80206af8, - 0xfa80ffcb, 0x801e3895, 0xfab3384f, 0x801c19ea, 0xfae571a4, 0x801a0ef8, - 0xfb17abc2, 0x801817bf, - 0xfb49e6a3, 0x80163440, 0xfb7c223d, 0x8014647b, 0xfbae5e89, 0x8012a86f, - 0xfbe09b80, 0x8011001f, - 0xfc12d91a, 0x800f6b88, 0xfc45174e, 0x800deaad, 0xfc775616, 0x800c7d8c, - 0xfca9956a, 0x800b2427, - 0xfcdbd541, 0x8009de7e, 0xfd0e1594, 0x8008ac90, 0xfd40565c, 0x80078e5e, - 0xfd729790, 0x800683e8, - 0xfda4d929, 0x80058d2f, 0xfdd71b1e, 0x8004aa32, 0xfe095d69, 0x8003daf1, - 0xfe3ba002, 0x80031f6d, - 0xfe6de2e0, 0x800277a6, 0xfea025fd, 0x8001e39b, 0xfed2694f, 0x8001634e, - 0xff04acd0, 0x8000f6bd, - 0xff36f078, 0x80009dea, 0xff69343f, 0x800058d4, 0xff9b781d, 0x8000277a, - 0xffcdbc0b, 0x800009df, - -}; - - -/* -* @brief Q15 Twiddle factors Table -*/ - -/** -* \par -* Example code for Q15 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*	twiddleCoefQ15[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoefQ15[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 4096 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q15(Fixed point 1.15): -* round(twiddleCoefQ15(i) * pow(2, 15)) -* -*/ - -const q15_t ALIGN4 twiddleCoefQ15[6144] = { - - 0x7fff, 0x0, 0x7fff, 0x32, 0x7fff, 0x65, 0x7fff, 0x97, - 0x7fff, 0xc9, 0x7fff, 0xfb, 0x7fff, 0x12e, 0x7ffe, 0x160, - 0x7ffe, 0x192, 0x7ffd, 0x1c4, 0x7ffc, 0x1f7, 0x7ffb, 0x229, - 0x7ffa, 0x25b, 0x7ff9, 0x28d, 0x7ff8, 0x2c0, 0x7ff7, 0x2f2, - 0x7ff6, 0x324, 0x7ff5, 0x356, 0x7ff4, 0x389, 0x7ff2, 0x3bb, - 0x7ff1, 0x3ed, 0x7fef, 0x41f, 0x7fed, 0x452, 0x7fec, 0x484, - 0x7fea, 0x4b6, 0x7fe8, 0x4e8, 0x7fe6, 0x51b, 0x7fe4, 0x54d, - 0x7fe2, 0x57f, 0x7fe0, 0x5b1, 0x7fdd, 0x5e3, 0x7fdb, 0x616, - 0x7fd9, 0x648, 0x7fd6, 0x67a, 0x7fd3, 0x6ac, 0x7fd1, 0x6de, - 0x7fce, 0x711, 0x7fcb, 0x743, 0x7fc8, 0x775, 0x7fc5, 0x7a7, - 0x7fc2, 0x7d9, 0x7fbf, 0x80c, 0x7fbc, 0x83e, 0x7fb9, 0x870, - 0x7fb5, 0x8a2, 0x7fb2, 0x8d4, 0x7fae, 0x906, 0x7fab, 0x938, - 0x7fa7, 0x96b, 0x7fa3, 0x99d, 0x7fa0, 0x9cf, 0x7f9c, 0xa01, - 0x7f98, 0xa33, 0x7f94, 0xa65, 0x7f90, 0xa97, 0x7f8b, 0xac9, - 0x7f87, 0xafb, 0x7f83, 0xb2d, 0x7f7e, 0xb60, 0x7f7a, 0xb92, - 0x7f75, 0xbc4, 0x7f71, 0xbf6, 0x7f6c, 0xc28, 0x7f67, 0xc5a, - 0x7f62, 0xc8c, 0x7f5d, 0xcbe, 0x7f58, 0xcf0, 0x7f53, 0xd22, - 0x7f4e, 0xd54, 0x7f49, 0xd86, 0x7f43, 0xdb8, 0x7f3e, 0xdea, - 0x7f38, 0xe1c, 0x7f33, 0xe4e, 0x7f2d, 0xe80, 0x7f27, 0xeb2, - 0x7f22, 0xee4, 0x7f1c, 0xf15, 0x7f16, 0xf47, 0x7f10, 0xf79, - 0x7f0a, 0xfab, 0x7f03, 0xfdd, 0x7efd, 0x100f, 0x7ef7, 0x1041, - 0x7ef0, 0x1073, 0x7eea, 0x10a4, 0x7ee3, 0x10d6, 0x7edd, 0x1108, - 0x7ed6, 0x113a, 0x7ecf, 0x116c, 0x7ec8, 0x119e, 0x7ec1, 0x11cf, - 0x7eba, 0x1201, 0x7eb3, 0x1233, 0x7eac, 0x1265, 0x7ea5, 0x1296, - 0x7e9d, 0x12c8, 0x7e96, 0x12fa, 0x7e8e, 0x132b, 0x7e87, 0x135d, - 0x7e7f, 0x138f, 0x7e78, 0x13c1, 0x7e70, 0x13f2, 0x7e68, 0x1424, - 0x7e60, 0x1455, 0x7e58, 0x1487, 0x7e50, 0x14b9, 0x7e48, 0x14ea, - 0x7e3f, 0x151c, 0x7e37, 0x154d, 0x7e2f, 0x157f, 0x7e26, 0x15b1, - 0x7e1e, 0x15e2, 0x7e15, 0x1614, 0x7e0c, 0x1645, 0x7e03, 0x1677, - 0x7dfb, 0x16a8, 0x7df2, 0x16da, 0x7de9, 0x170b, 0x7de0, 0x173c, - 0x7dd6, 0x176e, 0x7dcd, 0x179f, 0x7dc4, 0x17d1, 0x7dba, 0x1802, - 0x7db1, 0x1833, 0x7da7, 0x1865, 0x7d9e, 0x1896, 0x7d94, 0x18c7, - 0x7d8a, 0x18f9, 0x7d81, 0x192a, 0x7d77, 0x195b, 0x7d6d, 0x198d, - 0x7d63, 0x19be, 0x7d58, 0x19ef, 0x7d4e, 0x1a20, 0x7d44, 0x1a51, - 0x7d3a, 0x1a83, 0x7d2f, 0x1ab4, 0x7d25, 0x1ae5, 0x7d1a, 0x1b16, - 0x7d0f, 0x1b47, 0x7d05, 0x1b78, 0x7cfa, 0x1ba9, 0x7cef, 0x1bda, - 0x7ce4, 0x1c0c, 0x7cd9, 0x1c3d, 0x7cce, 0x1c6e, 0x7cc2, 0x1c9f, - 0x7cb7, 0x1cd0, 0x7cac, 0x1d01, 0x7ca0, 0x1d31, 0x7c95, 0x1d62, - 0x7c89, 0x1d93, 0x7c7e, 0x1dc4, 0x7c72, 0x1df5, 0x7c66, 0x1e26, - 0x7c5a, 0x1e57, 0x7c4e, 0x1e88, 0x7c42, 0x1eb8, 0x7c36, 0x1ee9, - 0x7c2a, 0x1f1a, 0x7c1e, 0x1f4b, 0x7c11, 0x1f7b, 0x7c05, 0x1fac, - 0x7bf9, 0x1fdd, 0x7bec, 0x200e, 0x7bdf, 0x203e, 0x7bd3, 0x206f, - 0x7bc6, 0x209f, 0x7bb9, 0x20d0, 0x7bac, 0x2101, 0x7b9f, 0x2131, - 0x7b92, 0x2162, 0x7b85, 0x2192, 0x7b78, 0x21c3, 0x7b6a, 0x21f3, - 0x7b5d, 0x2224, 0x7b50, 0x2254, 0x7b42, 0x2284, 0x7b34, 0x22b5, - 0x7b27, 0x22e5, 0x7b19, 0x2316, 0x7b0b, 0x2346, 0x7afd, 0x2376, - 0x7aef, 0x23a7, 0x7ae1, 0x23d7, 0x7ad3, 0x2407, 0x7ac5, 0x2437, - 0x7ab7, 0x2467, 0x7aa8, 0x2498, 0x7a9a, 0x24c8, 0x7a8c, 0x24f8, - 0x7a7d, 0x2528, 0x7a6e, 0x2558, 0x7a60, 0x2588, 0x7a51, 0x25b8, - 0x7a42, 0x25e8, 0x7a33, 0x2618, 0x7a24, 0x2648, 0x7a15, 0x2678, - 0x7a06, 0x26a8, 0x79f7, 0x26d8, 0x79e7, 0x2708, 0x79d8, 0x2738, - 0x79c9, 0x2768, 0x79b9, 0x2797, 0x79aa, 0x27c7, 0x799a, 0x27f7, - 0x798a, 0x2827, 0x797a, 0x2856, 0x796a, 0x2886, 0x795b, 0x28b6, - 0x794a, 0x28e5, 0x793a, 0x2915, 0x792a, 0x2945, 0x791a, 0x2974, - 0x790a, 0x29a4, 0x78f9, 0x29d3, 0x78e9, 0x2a03, 0x78d8, 0x2a32, - 0x78c8, 0x2a62, 0x78b7, 0x2a91, 0x78a6, 0x2ac1, 0x7895, 0x2af0, - 0x7885, 0x2b1f, 0x7874, 0x2b4f, 0x7863, 0x2b7e, 0x7851, 0x2bad, - 0x7840, 0x2bdc, 0x782f, 0x2c0c, 0x781e, 0x2c3b, 0x780c, 0x2c6a, - 0x77fb, 0x2c99, 0x77e9, 0x2cc8, 0x77d8, 0x2cf7, 0x77c6, 0x2d26, - 0x77b4, 0x2d55, 0x77a2, 0x2d84, 0x7790, 0x2db3, 0x777e, 0x2de2, - 0x776c, 0x2e11, 0x775a, 0x2e40, 0x7748, 0x2e6f, 0x7736, 0x2e9e, - 0x7723, 0x2ecc, 0x7711, 0x2efb, 0x76fe, 0x2f2a, 0x76ec, 0x2f59, - 0x76d9, 0x2f87, 0x76c7, 0x2fb6, 0x76b4, 0x2fe5, 0x76a1, 0x3013, - 0x768e, 0x3042, 0x767b, 0x3070, 0x7668, 0x309f, 0x7655, 0x30cd, - 0x7642, 0x30fc, 0x762e, 0x312a, 0x761b, 0x3159, 0x7608, 0x3187, - 0x75f4, 0x31b5, 0x75e1, 0x31e4, 0x75cd, 0x3212, 0x75b9, 0x3240, - 0x75a6, 0x326e, 0x7592, 0x329d, 0x757e, 0x32cb, 0x756a, 0x32f9, - 0x7556, 0x3327, 0x7542, 0x3355, 0x752d, 0x3383, 0x7519, 0x33b1, - 0x7505, 0x33df, 0x74f0, 0x340d, 0x74dc, 0x343b, 0x74c7, 0x3469, - 0x74b3, 0x3497, 0x749e, 0x34c4, 0x7489, 0x34f2, 0x7475, 0x3520, - 0x7460, 0x354e, 0x744b, 0x357b, 0x7436, 0x35a9, 0x7421, 0x35d7, - 0x740b, 0x3604, 0x73f6, 0x3632, 0x73e1, 0x365f, 0x73cb, 0x368d, - 0x73b6, 0x36ba, 0x73a0, 0x36e8, 0x738b, 0x3715, 0x7375, 0x3742, - 0x735f, 0x3770, 0x734a, 0x379d, 0x7334, 0x37ca, 0x731e, 0x37f7, - 0x7308, 0x3825, 0x72f2, 0x3852, 0x72dc, 0x387f, 0x72c5, 0x38ac, - 0x72af, 0x38d9, 0x7299, 0x3906, 0x7282, 0x3933, 0x726c, 0x3960, - 0x7255, 0x398d, 0x723f, 0x39ba, 0x7228, 0x39e7, 0x7211, 0x3a13, - 0x71fa, 0x3a40, 0x71e3, 0x3a6d, 0x71cc, 0x3a9a, 0x71b5, 0x3ac6, - 0x719e, 0x3af3, 0x7187, 0x3b20, 0x7170, 0x3b4c, 0x7158, 0x3b79, - 0x7141, 0x3ba5, 0x712a, 0x3bd2, 0x7112, 0x3bfe, 0x70fa, 0x3c2a, - 0x70e3, 0x3c57, 0x70cb, 0x3c83, 0x70b3, 0x3caf, 0x709b, 0x3cdc, - 0x7083, 0x3d08, 0x706b, 0x3d34, 0x7053, 0x3d60, 0x703b, 0x3d8c, - 0x7023, 0x3db8, 0x700b, 0x3de4, 0x6ff2, 0x3e10, 0x6fda, 0x3e3c, - 0x6fc2, 0x3e68, 0x6fa9, 0x3e94, 0x6f90, 0x3ec0, 0x6f78, 0x3eec, - 0x6f5f, 0x3f17, 0x6f46, 0x3f43, 0x6f2d, 0x3f6f, 0x6f14, 0x3f9a, - 0x6efb, 0x3fc6, 0x6ee2, 0x3ff1, 0x6ec9, 0x401d, 0x6eb0, 0x4048, - 0x6e97, 0x4074, 0x6e7d, 0x409f, 0x6e64, 0x40cb, 0x6e4a, 0x40f6, - 0x6e31, 0x4121, 0x6e17, 0x414d, 0x6dfe, 0x4178, 0x6de4, 0x41a3, - 0x6dca, 0x41ce, 0x6db0, 0x41f9, 0x6d96, 0x4224, 0x6d7c, 0x424f, - 0x6d62, 0x427a, 0x6d48, 0x42a5, 0x6d2e, 0x42d0, 0x6d14, 0x42fb, - 0x6cf9, 0x4326, 0x6cdf, 0x4351, 0x6cc4, 0x437b, 0x6caa, 0x43a6, - 0x6c8f, 0x43d1, 0x6c75, 0x43fb, 0x6c5a, 0x4426, 0x6c3f, 0x4450, - 0x6c24, 0x447b, 0x6c09, 0x44a5, 0x6bee, 0x44d0, 0x6bd3, 0x44fa, - 0x6bb8, 0x4524, 0x6b9d, 0x454f, 0x6b82, 0x4579, 0x6b66, 0x45a3, - 0x6b4b, 0x45cd, 0x6b30, 0x45f7, 0x6b14, 0x4621, 0x6af8, 0x464b, - 0x6add, 0x4675, 0x6ac1, 0x469f, 0x6aa5, 0x46c9, 0x6a89, 0x46f3, - 0x6a6e, 0x471d, 0x6a52, 0x4747, 0x6a36, 0x4770, 0x6a1a, 0x479a, - 0x69fd, 0x47c4, 0x69e1, 0x47ed, 0x69c5, 0x4817, 0x69a9, 0x4840, - 0x698c, 0x486a, 0x6970, 0x4893, 0x6953, 0x48bd, 0x6937, 0x48e6, - 0x691a, 0x490f, 0x68fd, 0x4939, 0x68e0, 0x4962, 0x68c4, 0x498b, - 0x68a7, 0x49b4, 0x688a, 0x49dd, 0x686d, 0x4a06, 0x6850, 0x4a2f, - 0x6832, 0x4a58, 0x6815, 0x4a81, 0x67f8, 0x4aaa, 0x67da, 0x4ad3, - 0x67bd, 0x4afb, 0x67a0, 0x4b24, 0x6782, 0x4b4d, 0x6764, 0x4b75, - 0x6747, 0x4b9e, 0x6729, 0x4bc7, 0x670b, 0x4bef, 0x66ed, 0x4c17, - 0x66d0, 0x4c40, 0x66b2, 0x4c68, 0x6693, 0x4c91, 0x6675, 0x4cb9, - 0x6657, 0x4ce1, 0x6639, 0x4d09, 0x661b, 0x4d31, 0x65fc, 0x4d59, - 0x65de, 0x4d81, 0x65c0, 0x4da9, 0x65a1, 0x4dd1, 0x6582, 0x4df9, - 0x6564, 0x4e21, 0x6545, 0x4e49, 0x6526, 0x4e71, 0x6507, 0x4e98, - 0x64e9, 0x4ec0, 0x64ca, 0x4ee8, 0x64ab, 0x4f0f, 0x648b, 0x4f37, - 0x646c, 0x4f5e, 0x644d, 0x4f85, 0x642e, 0x4fad, 0x640f, 0x4fd4, - 0x63ef, 0x4ffb, 0x63d0, 0x5023, 0x63b0, 0x504a, 0x6391, 0x5071, - 0x6371, 0x5098, 0x6351, 0x50bf, 0x6332, 0x50e6, 0x6312, 0x510d, - 0x62f2, 0x5134, 0x62d2, 0x515b, 0x62b2, 0x5181, 0x6292, 0x51a8, - 0x6272, 0x51cf, 0x6252, 0x51f5, 0x6232, 0x521c, 0x6211, 0x5243, - 0x61f1, 0x5269, 0x61d1, 0x5290, 0x61b0, 0x52b6, 0x6190, 0x52dc, - 0x616f, 0x5303, 0x614e, 0x5329, 0x612e, 0x534f, 0x610d, 0x5375, - 0x60ec, 0x539b, 0x60cb, 0x53c1, 0x60aa, 0x53e7, 0x6089, 0x540d, - 0x6068, 0x5433, 0x6047, 0x5459, 0x6026, 0x547f, 0x6005, 0x54a4, - 0x5fe4, 0x54ca, 0x5fc2, 0x54f0, 0x5fa1, 0x5515, 0x5f80, 0x553b, - 0x5f5e, 0x5560, 0x5f3c, 0x5586, 0x5f1b, 0x55ab, 0x5ef9, 0x55d0, - 0x5ed7, 0x55f6, 0x5eb6, 0x561b, 0x5e94, 0x5640, 0x5e72, 0x5665, - 0x5e50, 0x568a, 0x5e2e, 0x56af, 0x5e0c, 0x56d4, 0x5dea, 0x56f9, - 0x5dc8, 0x571e, 0x5da5, 0x5743, 0x5d83, 0x5767, 0x5d61, 0x578c, - 0x5d3e, 0x57b1, 0x5d1c, 0x57d5, 0x5cf9, 0x57fa, 0x5cd7, 0x581e, - 0x5cb4, 0x5843, 0x5c91, 0x5867, 0x5c6f, 0x588c, 0x5c4c, 0x58b0, - 0x5c29, 0x58d4, 0x5c06, 0x58f8, 0x5be3, 0x591c, 0x5bc0, 0x5940, - 0x5b9d, 0x5964, 0x5b7a, 0x5988, 0x5b57, 0x59ac, 0x5b34, 0x59d0, - 0x5b10, 0x59f4, 0x5aed, 0x5a18, 0x5ac9, 0x5a3b, 0x5aa6, 0x5a5f, - 0x5a82, 0x5a82, 0x5a5f, 0x5aa6, 0x5a3b, 0x5ac9, 0x5a18, 0x5aed, - 0x59f4, 0x5b10, 0x59d0, 0x5b34, 0x59ac, 0x5b57, 0x5988, 0x5b7a, - 0x5964, 0x5b9d, 0x5940, 0x5bc0, 0x591c, 0x5be3, 0x58f8, 0x5c06, - 0x58d4, 0x5c29, 0x58b0, 0x5c4c, 0x588c, 0x5c6f, 0x5867, 0x5c91, - 0x5843, 0x5cb4, 0x581e, 0x5cd7, 0x57fa, 0x5cf9, 0x57d5, 0x5d1c, - 0x57b1, 0x5d3e, 0x578c, 0x5d61, 0x5767, 0x5d83, 0x5743, 0x5da5, - 0x571e, 0x5dc8, 0x56f9, 0x5dea, 0x56d4, 0x5e0c, 0x56af, 0x5e2e, - 0x568a, 0x5e50, 0x5665, 0x5e72, 0x5640, 0x5e94, 0x561b, 0x5eb6, - 0x55f6, 0x5ed7, 0x55d0, 0x5ef9, 0x55ab, 0x5f1b, 0x5586, 0x5f3c, - 0x5560, 0x5f5e, 0x553b, 0x5f80, 0x5515, 0x5fa1, 0x54f0, 0x5fc2, - 0x54ca, 0x5fe4, 0x54a4, 0x6005, 0x547f, 0x6026, 0x5459, 0x6047, - 0x5433, 0x6068, 0x540d, 0x6089, 0x53e7, 0x60aa, 0x53c1, 0x60cb, - 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0xd958, 0x85fa, 0xd988, 0x85eb, 0xd9b8, 0x85dc, 0xd9e8, 0x85cd, - 0xda18, 0x85be, 0xda48, 0x85af, 0xda78, 0x85a0, 0xdaa8, 0x8592, - 0xdad8, 0x8583, 0xdb08, 0x8574, 0xdb38, 0x8566, 0xdb68, 0x8558, - 0xdb99, 0x8549, 0xdbc9, 0x853b, 0xdbf9, 0x852d, 0xdc29, 0x851f, - 0xdc59, 0x8511, 0xdc8a, 0x8503, 0xdcba, 0x84f5, 0xdcea, 0x84e7, - 0xdd1b, 0x84d9, 0xdd4b, 0x84cc, 0xdd7c, 0x84be, 0xddac, 0x84b0, - 0xdddc, 0x84a3, 0xde0d, 0x8496, 0xde3d, 0x8488, 0xde6e, 0x847b, - 0xde9e, 0x846e, 0xdecf, 0x8461, 0xdeff, 0x8454, 0xdf30, 0x8447, - 0xdf61, 0x843a, 0xdf91, 0x842d, 0xdfc2, 0x8421, 0xdff2, 0x8414, - 0xe023, 0x8407, 0xe054, 0x83fb, 0xe085, 0x83ef, 0xe0b5, 0x83e2, - 0xe0e6, 0x83d6, 0xe117, 0x83ca, 0xe148, 0x83be, 0xe178, 0x83b2, - 0xe1a9, 0x83a6, 0xe1da, 0x839a, 0xe20b, 0x838e, 0xe23c, 0x8382, - 0xe26d, 0x8377, 0xe29e, 0x836b, 0xe2cf, 0x8360, 0xe2ff, 0x8354, - 0xe330, 0x8349, 0xe361, 0x833e, 0xe392, 0x8332, 0xe3c3, 0x8327, - 0xe3f4, 0x831c, 0xe426, 0x8311, 0xe457, 0x8306, 0xe488, 0x82fb, - 0xe4b9, 0x82f1, 0xe4ea, 0x82e6, 0xe51b, 0x82db, 0xe54c, 0x82d1, - 0xe57d, 0x82c6, 0xe5af, 0x82bc, 0xe5e0, 0x82b2, 0xe611, 0x82a8, - 0xe642, 0x829d, 0xe673, 0x8293, 0xe6a5, 0x8289, 0xe6d6, 0x827f, - 0xe707, 0x8276, 0xe739, 0x826c, 0xe76a, 0x8262, 0xe79b, 0x8259, - 0xe7cd, 0x824f, 0xe7fe, 0x8246, 0xe82f, 0x823c, 0xe861, 0x8233, - 0xe892, 0x822a, 0xe8c4, 0x8220, 0xe8f5, 0x8217, 0xe926, 0x820e, - 0xe958, 0x8205, 0xe989, 0x81fd, 0xe9bb, 0x81f4, 0xe9ec, 0x81eb, - 0xea1e, 0x81e2, 0xea4f, 0x81da, 0xea81, 0x81d1, 0xeab3, 0x81c9, - 0xeae4, 0x81c1, 0xeb16, 0x81b8, 0xeb47, 0x81b0, 0xeb79, 0x81a8, - 0xebab, 0x81a0, 0xebdc, 0x8198, 0xec0e, 0x8190, 0xec3f, 0x8188, - 0xec71, 0x8181, 0xeca3, 0x8179, 0xecd5, 0x8172, 0xed06, 0x816a, - 0xed38, 0x8163, 0xed6a, 0x815b, 0xed9b, 0x8154, 0xedcd, 0x814d, - 0xedff, 0x8146, 0xee31, 0x813f, 0xee62, 0x8138, 0xee94, 0x8131, - 0xeec6, 0x812a, 0xeef8, 0x8123, 0xef2a, 0x811d, 0xef5c, 0x8116, - 0xef8d, 0x8110, 0xefbf, 0x8109, 0xeff1, 0x8103, 0xf023, 0x80fd, - 0xf055, 0x80f6, 0xf087, 0x80f0, 0xf0b9, 0x80ea, 0xf0eb, 0x80e4, - 0xf11c, 0x80de, 0xf14e, 0x80d9, 0xf180, 0x80d3, 0xf1b2, 0x80cd, - 0xf1e4, 0x80c8, 0xf216, 0x80c2, 0xf248, 0x80bd, 0xf27a, 0x80b7, - 0xf2ac, 0x80b2, 0xf2de, 0x80ad, 0xf310, 0x80a8, 0xf342, 0x80a3, - 0xf374, 0x809e, 0xf3a6, 0x8099, 0xf3d8, 0x8094, 0xf40a, 0x808f, - 0xf43c, 0x808b, 0xf46e, 0x8086, 0xf4a0, 0x8082, 0xf4d3, 0x807d, - 0xf505, 0x8079, 0xf537, 0x8075, 0xf569, 0x8070, 0xf59b, 0x806c, - 0xf5cd, 0x8068, 0xf5ff, 0x8064, 0xf631, 0x8060, 0xf663, 0x805d, - 0xf695, 0x8059, 0xf6c8, 0x8055, 0xf6fa, 0x8052, 0xf72c, 0x804e, - 0xf75e, 0x804b, 0xf790, 0x8047, 0xf7c2, 0x8044, 0xf7f4, 0x8041, - 0xf827, 0x803e, 0xf859, 0x803b, 0xf88b, 0x8038, 0xf8bd, 0x8035, - 0xf8ef, 0x8032, 0xf922, 0x802f, 0xf954, 0x802d, 0xf986, 0x802a, - 0xf9b8, 0x8027, 0xf9ea, 0x8025, 0xfa1d, 0x8023, 0xfa4f, 0x8020, - 0xfa81, 0x801e, 0xfab3, 0x801c, 0xfae5, 0x801a, 0xfb18, 0x8018, - 0xfb4a, 0x8016, 0xfb7c, 0x8014, 0xfbae, 0x8013, 0xfbe1, 0x8011, - 0xfc13, 0x800f, 0xfc45, 0x800e, 0xfc77, 0x800c, 0xfcaa, 0x800b, - 0xfcdc, 0x800a, 0xfd0e, 0x8009, 0xfd40, 0x8008, 0xfd73, 0x8007, - 0xfda5, 0x8006, 0xfdd7, 0x8005, 0xfe09, 0x8004, 0xfe3c, 0x8003, - 0xfe6e, 0x8002, 0xfea0, 0x8002, 0xfed2, 0x8001, 0xff05, 0x8001, - 0xff37, 0x8001, 0xff69, 0x8000, 0xff9b, 0x8000, 0xffce, 0x8000, -}; - -/** - * @} end of CFFT_CIFFT group - */ - -/* -* @brief Q15 table for reciprocal -*/ -const q15_t ALIGN4 armRecipTableQ15[64] = { - 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0, - 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82, - 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484, - 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0, - 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E, - 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255, - 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6, - 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978, - 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8, - 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255, - 0x41CC, 0x4146, 0x40C2, 0x4040 -}; - -/* -* @brief Q31 table for reciprocal -*/ -const q31_t armRecipTableQ31[64] = { - 0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928, - 0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3, - 0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519, - 0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB, - 0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318, - 0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0, - 0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D, - 0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96, - 0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2, - 0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426, - 0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102 -}; diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c deleted file mode 100644 index cdaf4c84e1..0000000000 --- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c +++ /dev/null @@ -1,174 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. February 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_cmplx_conj_f32.c -* -* Description: Floating-point complex conjugate. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* ---------------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @ingroup groupCmplxMath - */ - -/** - * @defgroup cmplx_conj Complex Conjugate - * - * Conjugates the elements of a complex data vector. - * - * The pSrc points to the source data and - * pDst points to the where the result should be written. - * numSamples specifies the number of complex samples - * and the data in each array is stored in an interleaved fashion - * (real, imag, real, imag, ...). - * Each array has a total of 2*numSamples values. - * The underlying algorithm is used: - * - * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup cmplx_conj        
- * @{        
- */
-
-/**        
- * @brief  Floating-point complex conjugate.        
- * @param  *pSrc points to the input vector        
- * @param  *pDst points to the output vector        
- * @param  numSamples number of complex samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_conj_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inR1, inR2, inR3, inR4;
-  float32_t inI1, inI2, inI3, inI4;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* read real input samples */
-    inR1 = pSrc[0];
-    /* store real samples to destination */
-    pDst[0] = inR1;
-    inR2 = pSrc[2];
-    pDst[2] = inR2;
-    inR3 = pSrc[4];
-    pDst[4] = inR3;
-    inR4 = pSrc[6];
-    pDst[6] = inR4;
-
-    /* read imaginary input samples */
-    inI1 = pSrc[1];
-    inI2 = pSrc[3];
-
-    /* conjugate input */
-    inI1 = -inI1;
-
-    /* read imaginary input samples */
-    inI3 = pSrc[5];
-
-    /* conjugate input */
-    inI2 = -inI2;
-
-    /* read imaginary input samples */
-    inI4 = pSrc[7];
-
-    /* conjugate input */
-    inI3 = -inI3;
-
-    /* store imaginary samples to destination */
-    pDst[1] = inI1;
-    pDst[3] = inI2;
-
-    /* conjugate input */
-    inI4 = -inI4;
-
-    /* store imaginary samples to destination */
-    pDst[5] = inI3;
-
-    /* increment source pointer by 8 to process next sampels */
-    pSrc += 8u;
-
-    /* store imaginary sample to destination */
-    pDst[7] = inI4;
-
-    /* increment destination pointer by 8 to store next samples */
-    pDst += 8u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* realOut + j (imagOut) = realIn + j (-1) imagIn */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    *pDst++ = -*pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_conj group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
deleted file mode 100644
index 92905fdf49..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_conj_q15.c    
-*    
-* Description:	Q15 complex conjugate.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_conj    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex conjugate.    
- * @param  *pSrc points to the input vector    
- * @param  *pDst points to the output vector    
- * @param  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.    
- */
-
-void arm_cmplx_conj_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t zero = 0;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    in1 = __QASX(zero, in1);
-    in2 = __QASX(zero, in2);
-    in3 = __QASX(zero, in3);
-    in4 = __QASX(zero, in4);
-
-#else
-
-    in1 = __QSAX(zero, in1);
-    in2 = __QSAX(zero, in2);
-    in3 = __QSAX(zero, in3);
-    in4 = __QSAX(zero, in4);
-
-#endif //       #ifndef ARM_MATH_BIG_ENDIAN
-
-    in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16);
-    in2 = ((uint32_t) in2 >> 16) | ((uint32_t) in2 << 16);
-    in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16);
-    in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16);
-
-    *__SIMD32(pDst)++ = in1;
-    *__SIMD32(pDst)++ = in2;
-    *__SIMD32(pDst)++ = in3;
-    *__SIMD32(pDst)++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    *pDst++ = __SSAT(-*pSrc++, 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  q15_t in;
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of cmplx_conj group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
deleted file mode 100644
index 5f874aa690..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_conj_q31.c    
-*    
-* Description:	Q31 complex conjugate.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @addtogroup cmplx_conj        
- * @{        
- */
-
-/**        
- * @brief  Q31 complex conjugate.        
- * @param  *pSrc points to the input vector        
- * @param  *pDst points to the output vector        
- * @param  numSamples number of complex samples in each vector        
- * @return none.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.        
- */
-
-void arm_cmplx_conj_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in;                                      /* Input value */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inR1, inR2, inR3, inR4;                  /* Temporary real variables */
-  q31_t inI1, inI2, inI3, inI4;                  /* Temporary imaginary variables */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
-    /* read real input sample */
-    inR1 = pSrc[0];
-    /* store real input sample */
-    pDst[0] = inR1;
-
-    /* read imaginary input sample */
-    inI1 = pSrc[1];
-
-    /* read real input sample */
-    inR2 = pSrc[2];
-    /* store real input sample */
-    pDst[2] = inR2;
-
-    /* read imaginary input sample */
-    inI2 = pSrc[3];
-
-    /* negate imaginary input sample */
-    inI1 = __QSUB(0, inI1);
-
-    /* read real input sample */
-    inR3 = pSrc[4];
-    /* store real input sample */
-    pDst[4] = inR3;
-
-    /* read imaginary input sample */
-    inI3 = pSrc[5];
-
-    /* negate imaginary input sample */
-    inI2 = __QSUB(0, inI2);
-
-    /* read real input sample */
-    inR4 = pSrc[6];
-    /* store real input sample */
-    pDst[6] = inR4;
-
-    /* negate imaginary input sample */
-    inI3 = __QSUB(0, inI3);
-
-    /* store imaginary input sample */
-    inI4 = pSrc[7];
-
-    /* store imaginary input samples */
-    pDst[1] = inI1;
-
-    /* negate imaginary input sample */
-    inI4 = __QSUB(0, inI4);
-
-    /* store imaginary input samples */
-    pDst[3] = inI2;
-
-    /* increment source pointer by 8 to proecess next samples */
-    pSrc += 8u;
-
-    /* store imaginary input samples */
-    pDst[5] = inI3;
-    pDst[7] = inI4;
-
-    /* increment destination pointer by 8 to process next samples */
-    pDst += 8u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
-    *pDst++ = *pSrc++;
-    in = *pSrc++;
-    *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_conj group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
deleted file mode 100644
index 200b309aae..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_f32.c    
-*    
-* Description:	Floating-point complex dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @defgroup cmplx_dot_prod Complex Dot Product    
- *    
- * Computes the dot product of two complex vectors.    
- * The vectors are multiplied element-by-element and then summed.    
- *   
- * The pSrcA points to the first complex input vector and    
- * pSrcB points to the second complex input vector.    
- * numSamples specifies the number of complex samples    
- * and the data in each array is stored in an interleaved fashion    
- * (real, imag, real, imag, ...).    
- * Each array has a total of 2*numSamples values.    
- *    
- * The underlying algorithm is used:    
- * 
    
- * realResult=0;    
- * imagResult=0;    
- * for(n=0; n    
- *    
- * There are separate functions for floating-point, Q15, and Q31 data types.    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Floating-point complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- */
-
-void arm_cmplx_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t numSamples,
-  float32_t * realResult,
-  float32_t * imagResult)
-{
-  float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result storage */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += (*pSrcA++) * (*pSrcB++);
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += (*pSrcA++) * (*pSrcB++);
-
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Store the real and imaginary results in the destination buffers */
-  *realResult = real_sum;
-  *imagResult = imag_sum;
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
deleted file mode 100644
index db7fbae527..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
+++ /dev/null
@@ -1,144 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_q15.c    
-*    
-* Description:	Processing function for the Q15 Complex Dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.    
- * These are accumulated in a 64-bit accumulator with 34.30 precision.    
- * As a final step, the accumulators are converted to 8.24 format.    
- * The return results realResult and imagResult are in 8.24 format.    
- */
-
-void arm_cmplx_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t numSamples,
-  q31_t * realResult,
-  q31_t * imagResult)
-{
-  q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Store the real and imaginary results in 8.24 format  */
-  /* Convert real data in 34.30 to 8.24 by 6 right shifts */
-  *realResult = (q31_t) (real_sum) >> 6;
-  /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
-  *imagResult = (q31_t) (imag_sum) >> 6;
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
deleted file mode 100644
index 1acc49dc2c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_q31.c    
-*    
-* Description:	Q31 complex dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Q31 complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.    
- * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.    
- * Additions are nonsaturating and no overflow will occur as long as numSamples is less than 32768.    
- * The return results realResult and imagResult are in 16.48 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t numSamples,
-  q63_t * realResult,
-  q63_t * imagResult)
-{
-  q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    /* Convert real data in 2.62 to 16.48 by 14 right shifts */
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    /* Convert imag data in 2.62 to 16.48 by 14 right shifts */
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples  is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* outReal = realA[0]* realB[0] + realA[2]* realB[2] + realA[4]* realB[4] + .....+ realA[numSamples-2]* realB[numSamples-2] */
-    real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-    /* outImag = imagA[1]* imagB[1] + imagA[3]* imagB[3] + imagA[5]* imagB[5] + .....+ imagA[numSamples-1]* imagB[numSamples-1] */
-    imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Store the real and imaginary results in 16.48 format  */
-  *realResult = real_sum;
-  *imagResult = imag_sum;
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
deleted file mode 100644
index 043e002a84..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_f32.c    
-*    
-* Description:	Floating-point complex magnitude.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @defgroup cmplx_mag Complex Magnitude    
- *    
- * Computes the magnitude of the elements of a complex data vector.    
- *   
- * The pSrc points to the source data and    
- * pDst points to the where the result should be written.    
- * numSamples specifies the number of complex samples    
- * in the input array and the data is stored in an interleaved fashion    
- * (real, imag, real, imag, ...).    
- * The input array has a total of 2*numSamples values;    
- * the output array has a total of numSamples values.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * for(n=0; n    
- *    
- * There are separate functions for floating-point, Q15, and Q31 data types.    
- */
-
-/**    
- * @addtogroup cmplx_mag    
- * @{    
- */
-/**    
- * @brief Floating-point complex magnitude.    
- * @param[in]       *pSrc points to complex input buffer    
- * @param[out]      *pDst points to real output buffer    
- * @param[in]       numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- */
-
-
-void arm_cmplx_mag_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t realIn, imagIn;                      /* Temporary variables to hold input values */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* out = sqrt((real * real) + (imag * imag)) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of cmplx_mag group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
deleted file mode 100644
index 13b862b5a2..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_q15.c    
-*    
-* Description:	Q15 complex magnitude.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag    
- * @{    
- */
-
-
-/**    
- * @brief  Q15 complex magnitude    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.    
- */
-
-void arm_cmplx_mag_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t acc2, acc3;
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-    acc0 = __SMUAD(in1, in1);
-    acc1 = __SMUAD(in2, in2);
-    acc2 = __SMUAD(in3, in3);
-    acc3 = __SMUAD(in4, in4);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) ((acc0) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc1) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc2) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc3) >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    acc0 = __SMUAD(in1, in1);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t real, imag;                              /* Temporary variables to hold input values */
-
-  while(numSamples > 0u)
-  {
-    /* out = sqrt(real * real + imag * imag) */
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    acc0 = (real * real);
-    acc1 = (imag * imag);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of cmplx_mag group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
deleted file mode 100644
index bf1af75e6b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_q31.c    
-*    
-* Description:	Q31 complex magnitude    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @addtogroup cmplx_mag        
- * @{        
- */
-
-/**        
- * @brief  Q31 complex magnitude        
- * @param  *pSrc points to the complex input vector        
- * @param  *pDst points to the real output vector        
- * @param  numSamples number of complex samples in the input vector        
- * @return none.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.        
- * Input down scaling is not required.        
- */
-
-void arm_cmplx_mag_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t real, imag;                              /* Temporary variables to hold input values */
-  q31_t acc0, acc1;                              /* Accumulators */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t real1, real2, imag1, imag2;              /* Temporary variables to hold input values */
-  q31_t out1, out2, out3, out4;                  /* Accumulators */
-  q63_t mul1, mul2, mul3, mul4;                  /* Temporary variables */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* read complex input from source buffer */
-    real1 = pSrc[0];
-    imag1 = pSrc[1];
-    real2 = pSrc[2];
-    imag2 = pSrc[3];
-
-    /* calculate power of input values */
-    mul1 = (q63_t) real1 *real1;
-    mul2 = (q63_t) imag1 *imag1;
-    mul3 = (q63_t) real2 *real2;
-    mul4 = (q63_t) imag2 *imag2;
-
-    /* get the result to 3.29 format */
-    out1 = (q31_t) (mul1 >> 33);
-    out2 = (q31_t) (mul2 >> 33);
-    out3 = (q31_t) (mul3 >> 33);
-    out4 = (q31_t) (mul4 >> 33);
-
-    /* add real and imaginary accumulators */
-    out1 = out1 + out2;
-    out3 = out3 + out4;
-
-    /* read complex input from source buffer */
-    real1 = pSrc[4];
-    imag1 = pSrc[5];
-    real2 = pSrc[6];
-    imag2 = pSrc[7];
-
-    /* calculate square root */
-    arm_sqrt_q31(out1, &pDst[0]);
-
-    /* calculate power of input values */
-    mul1 = (q63_t) real1 *real1;
-
-    /* calculate square root */
-    arm_sqrt_q31(out3, &pDst[1]);
-
-    /* calculate power of input values */
-    mul2 = (q63_t) imag1 *imag1;
-    mul3 = (q63_t) real2 *real2;
-    mul4 = (q63_t) imag2 *imag2;
-
-    /* get the result to 3.29 format */
-    out1 = (q31_t) (mul1 >> 33);
-    out2 = (q31_t) (mul2 >> 33);
-    out3 = (q31_t) (mul3 >> 33);
-    out4 = (q31_t) (mul4 >> 33);
-
-    /* add real and imaginary accumulators */
-    out1 = out1 + out2;
-    out3 = out3 + out4;
-
-    /* calculate square root */
-    arm_sqrt_q31(out1, &pDst[2]);
-
-    /* increment destination by 8 to process next samples */
-    pSrc += 8u;
-
-    /* calculate square root */
-    arm_sqrt_q31(out3, &pDst[3]);
-
-    /* increment destination by 4 to process next samples */
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 2.30 format in the destination buffer. */
-    arm_sqrt_q31(acc0 + acc1, pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_mag group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
deleted file mode 100644
index c49d006a19..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_f32.c    
-*    
-* Description:	Floating-point complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup cmplx_mag_squared Complex Magnitude Squared        
- *        
- * Computes the magnitude squared of the elements of a complex data vector.        
- *       
- * The pSrc points to the source data and        
- * pDst points to the where the result should be written.        
- * numSamples specifies the number of complex samples        
- * in the input array and the data is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The input array has a total of 2*numSamples values;        
- * the output array has a total of numSamples values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup cmplx_mag_squared        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex magnitude squared        
- * @param[in]  *pSrc points to the complex input vector        
- * @param[out]  *pDst points to the real output vector        
- * @param[in]  numSamples number of complex samples in the input vector        
- * @return none.        
- */
-
-void arm_cmplx_mag_squared_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t real, imag;                          /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-  float32_t real1, real2, real3, real4;          /* Temporary variables to hold real values */
-  float32_t imag1, imag2, imag3, imag4;          /* Temporary variables to hold imaginary values */
-  float32_t mul1, mul2, mul3, mul4;              /* Temporary variables */
-  float32_t mul5, mul6, mul7, mul8;              /* Temporary variables */
-  float32_t out1, out2, out3, out4;              /* Temporary variables to hold output values */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    /* read real input sample from source buffer */
-    real1 = pSrc[0];
-    /* read imaginary input sample from source buffer */
-    imag1 = pSrc[1];
-
-    /* calculate power of real value */
-    mul1 = real1 * real1;
-
-    /* read real input sample from source buffer */
-    real2 = pSrc[2];
-
-    /* calculate power of imaginary value */
-    mul2 = imag1 * imag1;
-
-    /* read imaginary input sample from source buffer */
-    imag2 = pSrc[3];
-
-    /* calculate power of real value */
-    mul3 = real2 * real2;
-
-    /* read real input sample from source buffer */
-    real3 = pSrc[4];
-
-    /* calculate power of imaginary value */
-    mul4 = imag2 * imag2;
-
-    /* read imaginary input sample from source buffer */
-    imag3 = pSrc[5];
-
-    /* calculate power of real value */
-    mul5 = real3 * real3;
-    /* calculate power of imaginary value */
-    mul6 = imag3 * imag3;
-
-    /* read real input sample from source buffer */
-    real4 = pSrc[6];
-
-    /* accumulate real and imaginary powers */
-    out1 = mul1 + mul2;
-
-    /* read imaginary input sample from source buffer */
-    imag4 = pSrc[7];
-
-    /* accumulate real and imaginary powers */
-    out2 = mul3 + mul4;
-
-    /* calculate power of real value */
-    mul7 = real4 * real4;
-    /* calculate power of imaginary value */
-    mul8 = imag4 * imag4;
-
-    /* store output to destination */
-    pDst[0] = out1;
-
-    /* accumulate real and imaginary powers */
-    out3 = mul5 + mul6;
-
-    /* store output to destination */
-    pDst[1] = out2;
-
-    /* accumulate real and imaginary powers */
-    out4 = mul7 + mul8;
-
-    /* store output to destination */
-    pDst[2] = out3;
-
-    /* increment destination pointer by 8 to process next samples */
-    pSrc += 8u;
-
-    /* store output to destination */
-    pDst[3] = out4;
-
-    /* increment destination pointer by 4 to process next samples */
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    /* out = (real * real) + (imag * imag) */
-    /* store the result in the destination buffer. */
-    *pDst++ = (real * real) + (imag * imag);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_mag_squared group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
deleted file mode 100644
index 42694058ae..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_q15.c    
-*    
-* Description:	Q15 complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag_squared    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex magnitude squared    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.    
- */
-
-void arm_cmplx_mag_squared_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t acc2, acc3;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-    acc0 = __SMUAD(in1, in1);
-    acc1 = __SMUAD(in2, in2);
-    acc2 = __SMUAD(in3, in3);
-    acc3 = __SMUAD(in4, in4);
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-    *pDst++ = (q15_t) (acc1 >> 17);
-    *pDst++ = (q15_t) (acc2 >> 17);
-    *pDst++ = (q15_t) (acc3 >> 17);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    acc0 = __SMUAD(in1, in1);
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t real, imag;                              /* Temporary variables to store real and imaginary values */
-
-  while(numSamples > 0u)
-  {
-    /* out = ((real * real) + (imag * imag)) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (real * real);
-    acc1 = (imag * imag);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of cmplx_mag_squared group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
deleted file mode 100644
index 7670c88497..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_q31.c    
-*    
-* Description:	Q31 complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag_squared    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex magnitude squared    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_mag_squared_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t real, imag;                              /* Temporary variables to store real and imaginary values */
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* out = ((real * real) + (imag * imag)) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of cmplx_mag_squared group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
deleted file mode 100644
index 15109f231c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_f32.c    
-*    
-* Description:	Floating-point complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication        
- *        
- * Multiplies a complex vector by another complex vector and generates a complex result.        
- * The data in the complex arrays is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The parameter numSamples represents the number of complex        
- * samples processed.  The complex arrays have a total of 2*numSamples        
- * real values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup CmplxByCmplxMult        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex-by-complex multiplication        
- * @param[in]  *pSrcA points to the first input vector        
- * @param[in]  *pSrcB points to the second input vector        
- * @param[out]  *pDst  points to the output vector        
- * @param[in]  numSamples number of complex samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_mult_cmplx_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t a1, b1, c1, d1;                      /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t a2, b2, c2, d2;                      /* Temporary variables to store real and imaginary values */
-  float32_t acc1, acc2, acc3, acc4;
-
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a1 = *pSrcA;                /* A[2 * i] */
-    c1 = *pSrcB;                /* B[2 * i] */
-
-    b1 = *(pSrcA + 1);          /* A[2 * i + 1] */
-    acc1 = a1 * c1;             /* acc1 = A[2 * i] * B[2 * i] */
-
-    a2 = *(pSrcA + 2);          /* A[2 * i + 2] */
-    acc2 = (b1 * c1);           /* acc2 = A[2 * i + 1] * B[2 * i] */
-
-    d1 = *(pSrcB + 1);          /* B[2 * i + 1] */
-    c2 = *(pSrcB + 2);          /* B[2 * i + 2] */
-    acc1 -= b1 * d1;            /* acc1 =      A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
-
-    d2 = *(pSrcB + 3);          /* B[2 * i + 3] */
-    acc3 = a2 * c2;             /* acc3 =       A[2 * i + 2] * B[2 * i + 2] */
-
-    b2 = *(pSrcA + 3);          /* A[2 * i + 3] */
-    acc2 += (a1 * d1);          /* acc2 =      A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
-
-    a1 = *(pSrcA + 4);          /* A[2 * i + 4] */
-    acc4 = (a2 * d2);           /* acc4 =   A[2 * i + 2] * B[2 * i + 3] */
-
-    c1 = *(pSrcB + 4);          /* B[2 * i + 4] */
-    acc3 -= (b2 * d2);          /* acc3 =       A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */
-    *pDst = acc1;               /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
-
-    b1 = *(pSrcA + 5);          /* A[2 * i + 5] */
-    acc4 += b2 * c2;            /* acc4 =   A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */
-
-    *(pDst + 1) = acc2;         /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1]  */
-    acc1 = (a1 * c1);
-
-    d1 = *(pSrcB + 5);
-    acc2 = (b1 * c1);
-
-    *(pDst + 2) = acc3;
-    *(pDst + 3) = acc4;
-
-    a2 = *(pSrcA + 6);
-    acc1 -= (b1 * d1);
-
-    c2 = *(pSrcB + 6);
-    acc2 += (a1 * d1);
-
-    b2 = *(pSrcA + 7);
-    acc3 = (a2 * c2);
-
-    d2 = *(pSrcB + 7);
-    acc4 = (b2 * c2);
-
-    *(pDst + 4) = acc1;
-    pSrcA += 8u;
-
-    acc3 -= (b2 * d2);
-    acc4 += (a2 * d2);
-
-    *(pDst + 5) = acc2;
-    pSrcB += 8u;
-
-    *(pDst + 6) = acc3;
-    *(pDst + 7) = acc4;
-
-    pDst += 8u;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a1 = *pSrcA++;
-    b1 = *pSrcA++;
-    c1 = *pSrcB++;
-    d1 = *pSrcB++;
-
-    /* store the result in the destination buffer. */
-    *pDst++ = (a1 * c1) - (b1 * d1);
-    *pDst++ = (a1 * d1) + (b1 * c1);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of CmplxByCmplxMult group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
deleted file mode 100644
index 89412f5ba1..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
+++ /dev/null
@@ -1,185 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_q15.c    
-*    
-* Description:	Q15 complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByCmplxMult    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex-by-complex multiplication    
- * @param[in]  *pSrcA points to the first input vector    
- * @param[in]  *pSrcB points to the second input vector    
- * @param[out]  *pDst  points to the output vector    
- * @param[in]  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.    
- */
-
-void arm_cmplx_mult_cmplx_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q15_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of CmplxByCmplxMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
deleted file mode 100644
index 668cbfa610..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
+++ /dev/null
@@ -1,318 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_q31.c    
-*    
-* Description:	Q31 complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByCmplxMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex-by-complex multiplication    
- * @param[in]  *pSrcA points to the first input vector    
- * @param[in]  *pSrcB points to the second input vector    
- * @param[out]  *pDst  points to the output vector    
- * @param[in]  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_mult_cmplx_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t mul1, mul2, mul3, mul4;
-  q31_t out1, out2;
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 1u;
-
-  /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.     
-   ** a second loop below computes the remaining 1 sample. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.     
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x2u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of CmplxByCmplxMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
deleted file mode 100644
index bbd7cf6746..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_f32.c    
-*    
-* Description:	Floating-point complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup CmplxByRealMult Complex-by-Real Multiplication        
- *        
- * Multiplies a complex vector by a real vector and generates a complex result.        
- * The data in the complex arrays is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The parameter numSamples represents the number of complex        
- * samples processed.  The complex arrays have a total of 2*numSamples        
- * real values while the real array has a total of numSamples        
- * real values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup CmplxByRealMult        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex-by-real multiplication        
- * @param[in]  *pSrcCmplx points to the complex input vector        
- * @param[in]  *pSrcReal points to the real input vector        
- * @param[out]  *pCmplxDst points to the complex output vector        
- * @param[in]  numSamples number of samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_mult_real_f32(
-  float32_t * pSrcCmplx,
-  float32_t * pSrcReal,
-  float32_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* Temporary variables to hold input data */
-  float32_t inA5, inA6, inA7, inA8;              /* Temporary variables to hold input data */
-  float32_t inB1, inB2, inB3, inB4;              /* Temporary variables to hold input data */
-  float32_t out1, out2, out3, out4;              /* Temporary variables to hold output data */
-  float32_t out5, out6, out7, out8;              /* Temporary variables to hold output data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read input from complex input buffer */
-    inA1 = pSrcCmplx[0];
-    inA2 = pSrcCmplx[1];
-    /* read input from real input buffer */
-    inB1 = pSrcReal[0];
-
-    /* read input from complex input buffer */
-    inA3 = pSrcCmplx[2];
-
-    /* multiply complex buffer real input with real buffer input */
-    out1 = inA1 * inB1;
-
-    /* read input from complex input buffer */
-    inA4 = pSrcCmplx[3];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out2 = inA2 * inB1;
-
-    /* read input from real input buffer */
-    inB2 = pSrcReal[1];
-    /* read input from complex input buffer */
-    inA5 = pSrcCmplx[4];
-
-    /* multiply complex buffer real input with real buffer input */
-    out3 = inA3 * inB2;
-
-    /* read input from complex input buffer */
-    inA6 = pSrcCmplx[5];
-    /* read input from real input buffer */
-    inB3 = pSrcReal[2];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out4 = inA4 * inB2;
-
-    /* read input from complex input buffer */
-    inA7 = pSrcCmplx[6];
-
-    /* multiply complex buffer real input with real buffer input */
-    out5 = inA5 * inB3;
-
-    /* read input from complex input buffer */
-    inA8 = pSrcCmplx[7];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out6 = inA6 * inB3;
-
-    /* read input from real input buffer */
-    inB4 = pSrcReal[3];
-
-    /* store result to destination bufer */
-    pCmplxDst[0] = out1;
-
-    /* multiply complex buffer real input with real buffer input */
-    out7 = inA7 * inB4;
-
-    /* store result to destination bufer */
-    pCmplxDst[1] = out2;
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out8 = inA8 * inB4;
-
-    /* store result to destination bufer */
-    pCmplxDst[2] = out3;
-    pCmplxDst[3] = out4;
-    pCmplxDst[4] = out5;
-
-    /* incremnet complex input buffer by 8 to process next samples */
-    pSrcCmplx += 8u;
-
-    /* store result to destination bufer */
-    pCmplxDst[5] = out6;
-
-    /* increment real input buffer by 4 to process next samples */
-    pSrcReal += 4u;
-
-    /* store result to destination bufer */
-    pCmplxDst[6] = out7;
-    pCmplxDst[7] = out8;
-
-    /* increment destination buffer by 8 to process next sampels */
-    pCmplxDst += 8u;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ = (*pSrcCmplx++) * (in);
-    *pCmplxDst++ = (*pSrcCmplx++) * (in);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of CmplxByRealMult group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
deleted file mode 100644
index 2e56b0f3f6..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_q15.c    
-*    
-* Description:	Q15 complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByRealMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q15 complex-by-real multiplication    
- * @param[in]  *pSrcCmplx points to the complex input vector    
- * @param[in]  *pSrcReal points to the real input vector    
- * @param[out]  *pCmplxDst points to the complex output vector    
- * @param[in]  numSamples number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-void arm_cmplx_mult_real_q15(
-  q15_t * pSrcCmplx,
-  q15_t * pSrcReal,
-  q15_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  q15_t in;                                      /* Temporary variable to store input value */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t inA1, inA2;                              /* Temporary variables to hold input data */
-  q31_t inB1;                                    /* Temporary variables to hold input data */
-  q15_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-  q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables to hold intermediate data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read complex number both real and imaginary from complex input buffer */
-    inA1 = *__SIMD32(pSrcCmplx)++;
-    /* read two real values at a time from real input buffer */
-    inB1 = *__SIMD32(pSrcReal)++;
-    /* read complex number both real and imaginary from complex input buffer */
-    inA2 = *__SIMD32(pSrcCmplx)++;
-
-    /* multiply complex number with real numbers */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
-#else
-
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* saturate the result */
-    out1 = (q15_t) __SSAT(mul1 >> 15u, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15u, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15u, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15u, 16);
-
-    /* pack real and imaginary outputs and store them to destination */
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
-
-    inA1 = *__SIMD32(pSrcCmplx)++;
-    inB1 = *__SIMD32(pSrcReal)++;
-    inA2 = *__SIMD32(pSrcCmplx)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
-#else
-
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = (q15_t) __SSAT(mul1 >> 15u, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15u, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15u, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15u, 16);
-
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut = realA * realB.            */
-    /* imagOut = imagA * realB.                */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-
-    /* Decrement the numSamples loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of CmplxByRealMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
deleted file mode 100644
index 94483f62b0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_q31.c    
-*    
-* Description:	Q31 complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByRealMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex-by-real multiplication    
- * @param[in]  *pSrcCmplx points to the complex input vector    
- * @param[in]  *pSrcReal points to the real input vector    
- * @param[out]  *pCmplxDst points to the complex output vector    
- * @param[in]  numSamples number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- */
-
-void arm_cmplx_mult_real_q31(
-  q31_t * pSrcCmplx,
-  q31_t * pSrcReal,
-  q31_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  q31_t inA1;                                    /* Temporary variable to store input value */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t inA2, inA3, inA4;                        /* Temporary variables to hold input data */
-  q31_t inB1, inB2;                              /* Temporary variabels to hold input data */
-  q31_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-    inB2 = *pSrcReal++;
-    /* read imaginary input from complex input buffer */
-    inA3 = *pSrcCmplx++;
-    inA4 = *pSrcCmplx++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-    out3 = ((q63_t) inA3 * inB2) >> 32;
-    out4 = ((q63_t) inA4 * inB2) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-    out3 = out3 << 1;
-    out4 = out4 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-    *pCmplxDst++ = out3;
-    *pCmplxDst++ = out4;
-
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-    inB2 = *pSrcReal++;
-    /* read imaginary input from complex input buffer */
-    inA3 = *pSrcCmplx++;
-    inA4 = *pSrcCmplx++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-    out3 = ((q63_t) inA3 * inB2) >> 32;
-    out4 = ((q63_t) inA4 * inB2) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-    out3 = out3 << 1;
-    out4 = out4 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-    *pCmplxDst++ = out3;
-    *pCmplxDst++ = out4;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut = realA * realB.            */
-    /* imagReal = imagA * realB.               */
-    inA1 = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
-    *pCmplxDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
-
-    /* Decrement the numSamples loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of CmplxByRealMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c
deleted file mode 100644
index 9ae46d9ae8..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_f32.c    
-*    
-* Description:	Floating-point PID Control initialization function    
-*				   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the floating-point PID Control.   
- * @param[in,out] *S points to an instance of the PID structure.   
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state & 1 = reset the state.   
- * @return none.   
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_f32(
-  arm_pid_instance_f32 * S,
-  int32_t resetStateFlag)
-{
-
-  /* Derived coefficient A0 */
-  S->A0 = S->Kp + S->Ki + S->Kd;
-
-  /* Derived coefficient A1 */
-  S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
-
-  /* Derived coefficient A2 */
-  S->A2 = S->Kd;
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(float32_t));
-  }
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c
deleted file mode 100644
index a10b1e1cfe..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_q15.c    
-*    
-* Description:	Q15 PID Control initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @details    
- * @param[in,out] *S points to an instance of the Q15 PID structure.    
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.    
- * @return none.    
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_q15(
-  arm_pid_instance_q15 * S,
-  int32_t resetStateFlag)
-{
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Derived coefficient A0 */
-  S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
-
-  /* Derived coefficients and pack into A1 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-  S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
-
-#else
-
-  S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q15_t));
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t temp;                                    /*to store the sum */
-
-  /* Derived coefficient A0 */
-  temp = S->Kp + S->Ki + S->Kd;
-  S->A0 = (q15_t) __SSAT(temp, 16);
-
-  /* Derived coefficients and pack into A1 */
-  temp = -(S->Kd + S->Kd + S->Kp);
-  S->A1 = (q15_t) __SSAT(temp, 16);
-  S->A2 = S->Kd;
-
-
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q15_t));
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c
deleted file mode 100644
index 0afd13bb78..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_q31.c    
-*    
-* Description:	Q31 PID Control initialization function     
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q31 PID Control.   
- * @param[in,out] *S points to an instance of the Q31 PID structure.   
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.   
- * @return none.    
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_q31(
-  arm_pid_instance_q31 * S,
-  int32_t resetStateFlag)
-{
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Derived coefficient A0 */
-  S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
-
-  /* Derived coefficient A1 */
-  S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t temp;
-
-  /* Derived coefficient A0 */
-  temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
-  S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
-
-  /* Derived coefficient A1 */
-  temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
-  S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Derived coefficient A2 */
-  S->A2 = S->Kd;
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q31_t));
-  }
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c
deleted file mode 100644
index 739812e97f..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_f32.c    
-*    
-* Description:	Floating-point PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the floating-point PID Control.   
-* @param[in] *S	Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_f32(
-  arm_pid_instance_f32 * S)
-{
-
-  /* Clear the state buffer.  The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(float32_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c
deleted file mode 100644
index 588e2b8694..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_q15.c    
-*    
-* Description:	Q15 PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the Q15 PID Control.   
-* @param[in] *S		Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_q15(
-  arm_pid_instance_q15 * S)
-{
-  /* Reset state to zero, The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(q15_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c
deleted file mode 100644
index 4b63f410d0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_q31.c    
-*    
-* Description:	Q31 PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the Q31 PID Control.   
-* @param[in] *S	Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_q31(
-  arm_pid_instance_q31 * S)
-{
-
-  /* Clear the state buffer.  The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(q31_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c
deleted file mode 100644
index 8ee5f359dd..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c
+++ /dev/null
@@ -1,428 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_cos_f32.c    
-*    
-* Description:	Sine and Cosine calculation for floating-point values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupController    
- */
-
-/**    
- * @defgroup SinCos Sine Cosine   
- *    
- * Computes the trigonometric sine and cosine values using a combination of table lookup   
- * and linear interpolation.     
- * There are separate functions for Q31 and floating-point data types.   
- * The input to the floating-point version is in degrees while the   
- * fixed-point Q31 have a scaled input with the range   
- * [-1 0.9999] mapping to [-180 179] degrees.   
- *   
- * The implementation is based on table lookup using 360 values together with linear interpolation.   
- * The steps used are:   
- *  -# Calculation of the nearest integer table index.   
- *  -# Compute the fractional portion (fract) of the input.   
- *  -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.      
- *  -# Sine value is computed as  *psinVal = y0 + (fract * (y1 - y0)).    
- *  -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.      
- *  -# Cosine value is computed as  *pcosVal = y0 + (fract * (y1 - y0)).    
- */
-
- /**    
- * @addtogroup SinCos    
- * @{    
- */
-
-
-/**    
-* \par    
-* Cosine Table is generated from following loop    
-* 
for(i = 0; i < 360; i++)    
-* {    
-*    cosTable[i]= cos((i-180) * PI/180.0);    
-* } 
   
-*/
-
-static const float32_t cosTable[360] = {
-  -0.999847695156391270f, -0.999390827019095760f, -0.998629534754573830f,
-  -0.997564050259824200f, -0.996194698091745550f, -0.994521895368273290f,
-  -0.992546151641321980f, -0.990268068741570250f,
-  -0.987688340595137660f, -0.984807753012208020f, -0.981627183447663980f,
-  -0.978147600733805690f, -0.974370064785235250f, -0.970295726275996470f,
-  -0.965925826289068200f, -0.961261695938318670f,
-  -0.956304755963035440f, -0.951056516295153530f, -0.945518575599316740f,
-  -0.939692620785908320f, -0.933580426497201740f, -0.927183854566787310f,
-  -0.920504853452440150f, -0.913545457642600760f,
-  -0.906307787036649940f, -0.898794046299167040f, -0.891006524188367790f,
-  -0.882947592858926770f, -0.874619707139395740f, -0.866025403784438710f,
-  -0.857167300702112220f, -0.848048096156425960f,
-  -0.838670567945424160f, -0.829037572555041620f, -0.819152044288991580f,
-  -0.809016994374947340f, -0.798635510047292940f, -0.788010753606721900f,
-  -0.777145961456970680f, -0.766044443118977900f,
-  -0.754709580222772010f, -0.743144825477394130f, -0.731353701619170460f,
-  -0.719339800338651300f, -0.707106781186547460f, -0.694658370458997030f,
-  -0.681998360062498370f, -0.669130606358858240f,
-  -0.656059028990507500f, -0.642787609686539360f, -0.629320391049837280f,
-  -0.615661475325658290f, -0.601815023152048380f, -0.587785252292473030f,
-  -0.573576436351045830f, -0.559192903470746680f,
-  -0.544639035015027080f, -0.529919264233204790f, -0.515038074910054270f,
-  -0.499999999999999780f, -0.484809620246337000f, -0.469471562785890530f,
-  -0.453990499739546750f, -0.438371146789077510f,
-  -0.422618261740699330f, -0.406736643075800100f, -0.390731128489273600f,
-  -0.374606593415912070f, -0.358367949545300270f, -0.342020143325668710f,
-  -0.325568154457156420f, -0.309016994374947340f,
-  -0.292371704722736660f, -0.275637355816999050f, -0.258819045102520850f,
-  -0.241921895599667790f, -0.224951054343864810f, -0.207911690817759120f,
-  -0.190808995376544800f, -0.173648177666930300f,
-  -0.156434465040231040f, -0.139173100960065350f, -0.121869343405147370f,
-  -0.104528463267653330f, -0.087155742747658235f, -0.069756473744125330f,
-  -0.052335956242943620f, -0.034899496702500733f,
-  -0.017452406437283477f, 0.000000000000000061f, 0.017452406437283376f,
-  0.034899496702501080f, 0.052335956242943966f, 0.069756473744125455f,
-  0.087155742747658138f, 0.104528463267653460f,
-  0.121869343405147490f, 0.139173100960065690f, 0.156434465040230920f,
-  0.173648177666930410f, 0.190808995376544920f, 0.207911690817759450f,
-  0.224951054343864920f, 0.241921895599667900f,
-  0.258819045102520740f, 0.275637355816999160f, 0.292371704722736770f,
-  0.309016994374947450f, 0.325568154457156760f, 0.342020143325668820f,
-  0.358367949545300380f, 0.374606593415911960f,
-  0.390731128489273940f, 0.406736643075800210f, 0.422618261740699440f,
-  0.438371146789077460f, 0.453990499739546860f, 0.469471562785890860f,
-  0.484809620246337110f, 0.500000000000000110f,
-  0.515038074910054380f, 0.529919264233204900f, 0.544639035015027200f,
-  0.559192903470746790f, 0.573576436351046050f, 0.587785252292473140f,
-  0.601815023152048270f, 0.615661475325658290f,
-  0.629320391049837500f, 0.642787609686539360f, 0.656059028990507280f,
-  0.669130606358858240f, 0.681998360062498480f, 0.694658370458997370f,
-  0.707106781186547570f, 0.719339800338651190f,
-  0.731353701619170570f, 0.743144825477394240f, 0.754709580222772010f,
-  0.766044443118978010f, 0.777145961456970900f, 0.788010753606722010f,
-  0.798635510047292830f, 0.809016994374947450f,
-  0.819152044288991800f, 0.829037572555041620f, 0.838670567945424050f,
-  0.848048096156425960f, 0.857167300702112330f, 0.866025403784438710f,
-  0.874619707139395740f, 0.882947592858926990f,
-  0.891006524188367900f, 0.898794046299167040f, 0.906307787036649940f,
-  0.913545457642600870f, 0.920504853452440370f, 0.927183854566787420f,
-  0.933580426497201740f, 0.939692620785908430f,
-  0.945518575599316850f, 0.951056516295153530f, 0.956304755963035440f,
-  0.961261695938318890f, 0.965925826289068310f, 0.970295726275996470f,
-  0.974370064785235250f, 0.978147600733805690f,
-  0.981627183447663980f, 0.984807753012208020f, 0.987688340595137770f,
-  0.990268068741570360f, 0.992546151641321980f, 0.994521895368273290f,
-  0.996194698091745550f, 0.997564050259824200f,
-  0.998629534754573830f, 0.999390827019095760f, 0.999847695156391270f,
-  1.000000000000000000f, 0.999847695156391270f, 0.999390827019095760f,
-  0.998629534754573830f, 0.997564050259824200f,
-  0.996194698091745550f, 0.994521895368273290f, 0.992546151641321980f,
-  0.990268068741570360f, 0.987688340595137770f, 0.984807753012208020f,
-  0.981627183447663980f, 0.978147600733805690f,
-  0.974370064785235250f, 0.970295726275996470f, 0.965925826289068310f,
-  0.961261695938318890f, 0.956304755963035440f, 0.951056516295153530f,
-  0.945518575599316850f, 0.939692620785908430f,
-  0.933580426497201740f, 0.927183854566787420f, 0.920504853452440370f,
-  0.913545457642600870f, 0.906307787036649940f, 0.898794046299167040f,
-  0.891006524188367900f, 0.882947592858926990f,
-  0.874619707139395740f, 0.866025403784438710f, 0.857167300702112330f,
-  0.848048096156425960f, 0.838670567945424050f, 0.829037572555041620f,
-  0.819152044288991800f, 0.809016994374947450f,
-  0.798635510047292830f, 0.788010753606722010f, 0.777145961456970900f,
-  0.766044443118978010f, 0.754709580222772010f, 0.743144825477394240f,
-  0.731353701619170570f, 0.719339800338651190f,
-  0.707106781186547570f, 0.694658370458997370f, 0.681998360062498480f,
-  0.669130606358858240f, 0.656059028990507280f, 0.642787609686539360f,
-  0.629320391049837500f, 0.615661475325658290f,
-  0.601815023152048270f, 0.587785252292473140f, 0.573576436351046050f,
-  0.559192903470746790f, 0.544639035015027200f, 0.529919264233204900f,
-  0.515038074910054380f, 0.500000000000000110f,
-  0.484809620246337110f, 0.469471562785890860f, 0.453990499739546860f,
-  0.438371146789077460f, 0.422618261740699440f, 0.406736643075800210f,
-  0.390731128489273940f, 0.374606593415911960f,
-  0.358367949545300380f, 0.342020143325668820f, 0.325568154457156760f,
-  0.309016994374947450f, 0.292371704722736770f, 0.275637355816999160f,
-  0.258819045102520740f, 0.241921895599667900f,
-  0.224951054343864920f, 0.207911690817759450f, 0.190808995376544920f,
-  0.173648177666930410f, 0.156434465040230920f, 0.139173100960065690f,
-  0.121869343405147490f, 0.104528463267653460f,
-  0.087155742747658138f, 0.069756473744125455f, 0.052335956242943966f,
-  0.034899496702501080f, 0.017452406437283376f, 0.000000000000000061f,
-  -0.017452406437283477f, -0.034899496702500733f,
-  -0.052335956242943620f, -0.069756473744125330f, -0.087155742747658235f,
-  -0.104528463267653330f, -0.121869343405147370f, -0.139173100960065350f,
-  -0.156434465040231040f, -0.173648177666930300f,
-  -0.190808995376544800f, -0.207911690817759120f, -0.224951054343864810f,
-  -0.241921895599667790f, -0.258819045102520850f, -0.275637355816999050f,
-  -0.292371704722736660f, -0.309016994374947340f,
-  -0.325568154457156420f, -0.342020143325668710f, -0.358367949545300270f,
-  -0.374606593415912070f, -0.390731128489273600f, -0.406736643075800100f,
-  -0.422618261740699330f, -0.438371146789077510f,
-  -0.453990499739546750f, -0.469471562785890530f, -0.484809620246337000f,
-  -0.499999999999999780f, -0.515038074910054270f, -0.529919264233204790f,
-  -0.544639035015027080f, -0.559192903470746680f,
-  -0.573576436351045830f, -0.587785252292473030f, -0.601815023152048380f,
-  -0.615661475325658290f, -0.629320391049837280f, -0.642787609686539360f,
-  -0.656059028990507500f, -0.669130606358858240f,
-  -0.681998360062498370f, -0.694658370458997030f, -0.707106781186547460f,
-  -0.719339800338651300f, -0.731353701619170460f, -0.743144825477394130f,
-  -0.754709580222772010f, -0.766044443118977900f,
-  -0.777145961456970680f, -0.788010753606721900f, -0.798635510047292940f,
-  -0.809016994374947340f, -0.819152044288991580f, -0.829037572555041620f,
-  -0.838670567945424160f, -0.848048096156425960f,
-  -0.857167300702112220f, -0.866025403784438710f, -0.874619707139395740f,
-  -0.882947592858926770f, -0.891006524188367790f, -0.898794046299167040f,
-  -0.906307787036649940f, -0.913545457642600760f,
-  -0.920504853452440150f, -0.927183854566787310f, -0.933580426497201740f,
-  -0.939692620785908320f, -0.945518575599316740f, -0.951056516295153530f,
-  -0.956304755963035440f, -0.961261695938318670f,
-  -0.965925826289068200f, -0.970295726275996470f, -0.974370064785235250f,
-  -0.978147600733805690f, -0.981627183447663980f, -0.984807753012208020f,
-  -0.987688340595137660f, -0.990268068741570250f,
-  -0.992546151641321980f, -0.994521895368273290f, -0.996194698091745550f,
-  -0.997564050259824200f, -0.998629534754573830f, -0.999390827019095760f,
-  -0.999847695156391270f, -1.000000000000000000f
-};
-
-/**    
-* \par    
-* Sine Table is generated from following loop    
-* 
for(i = 0; i < 360; i++)    
-* {    
-*    sinTable[i]= sin((i-180) * PI/180.0);    
-* } 
    
-*/
-
-
-static const float32_t sinTable[360] = {
-  -0.017452406437283439f, -0.034899496702500699f, -0.052335956242943807f,
-  -0.069756473744125524f, -0.087155742747658638f, -0.104528463267653730f,
-  -0.121869343405147550f, -0.139173100960065740f,
-  -0.156434465040230980f, -0.173648177666930280f, -0.190808995376544970f,
-  -0.207911690817759310f, -0.224951054343864780f, -0.241921895599667730f,
-  -0.258819045102521020f, -0.275637355816999660f,
-  -0.292371704722737050f, -0.309016994374947510f, -0.325568154457156980f,
-  -0.342020143325668880f, -0.358367949545300210f, -0.374606593415912240f,
-  -0.390731128489274160f, -0.406736643075800430f,
-  -0.422618261740699500f, -0.438371146789077290f, -0.453990499739546860f,
-  -0.469471562785891080f, -0.484809620246337170f, -0.499999999999999940f,
-  -0.515038074910054380f, -0.529919264233204900f,
-  -0.544639035015026860f, -0.559192903470746900f, -0.573576436351046380f,
-  -0.587785252292473250f, -0.601815023152048160f, -0.615661475325658400f,
-  -0.629320391049837720f, -0.642787609686539470f,
-  -0.656059028990507280f, -0.669130606358858350f, -0.681998360062498590f,
-  -0.694658370458997140f, -0.707106781186547570f, -0.719339800338651410f,
-  -0.731353701619170570f, -0.743144825477394240f,
-  -0.754709580222771790f, -0.766044443118978010f, -0.777145961456971010f,
-  -0.788010753606722010f, -0.798635510047292720f, -0.809016994374947450f,
-  -0.819152044288992020f, -0.829037572555041740f,
-  -0.838670567945424050f, -0.848048096156426070f, -0.857167300702112330f,
-  -0.866025403784438710f, -0.874619707139395850f, -0.882947592858927100f,
-  -0.891006524188367900f, -0.898794046299166930f,
-  -0.906307787036650050f, -0.913545457642600980f, -0.920504853452440370f,
-  -0.927183854566787420f, -0.933580426497201740f, -0.939692620785908430f,
-  -0.945518575599316850f, -0.951056516295153640f,
-  -0.956304755963035550f, -0.961261695938318890f, -0.965925826289068310f,
-  -0.970295726275996470f, -0.974370064785235250f, -0.978147600733805690f,
-  -0.981627183447663980f, -0.984807753012208020f,
-  -0.987688340595137660f, -0.990268068741570360f, -0.992546151641322090f,
-  -0.994521895368273400f, -0.996194698091745550f, -0.997564050259824200f,
-  -0.998629534754573830f, -0.999390827019095760f,
-  -0.999847695156391270f, -1.000000000000000000f, -0.999847695156391270f,
-  -0.999390827019095760f, -0.998629534754573830f, -0.997564050259824200f,
-  -0.996194698091745550f, -0.994521895368273290f,
-  -0.992546151641321980f, -0.990268068741570250f, -0.987688340595137770f,
-  -0.984807753012208020f, -0.981627183447663980f, -0.978147600733805580f,
-  -0.974370064785235250f, -0.970295726275996470f,
-  -0.965925826289068310f, -0.961261695938318890f, -0.956304755963035440f,
-  -0.951056516295153530f, -0.945518575599316740f, -0.939692620785908320f,
-  -0.933580426497201740f, -0.927183854566787420f,
-  -0.920504853452440260f, -0.913545457642600870f, -0.906307787036649940f,
-  -0.898794046299167040f, -0.891006524188367790f, -0.882947592858926880f,
-  -0.874619707139395740f, -0.866025403784438600f,
-  -0.857167300702112220f, -0.848048096156426070f, -0.838670567945423940f,
-  -0.829037572555041740f, -0.819152044288991800f, -0.809016994374947450f,
-  -0.798635510047292830f, -0.788010753606722010f,
-  -0.777145961456970790f, -0.766044443118978010f, -0.754709580222772010f,
-  -0.743144825477394240f, -0.731353701619170460f, -0.719339800338651080f,
-  -0.707106781186547460f, -0.694658370458997250f,
-  -0.681998360062498480f, -0.669130606358858240f, -0.656059028990507160f,
-  -0.642787609686539250f, -0.629320391049837390f, -0.615661475325658180f,
-  -0.601815023152048270f, -0.587785252292473140f,
-  -0.573576436351046050f, -0.559192903470746900f, -0.544639035015027080f,
-  -0.529919264233204900f, -0.515038074910054160f, -0.499999999999999940f,
-  -0.484809620246337060f, -0.469471562785890810f,
-  -0.453990499739546750f, -0.438371146789077400f, -0.422618261740699440f,
-  -0.406736643075800150f, -0.390731128489273720f, -0.374606593415912010f,
-  -0.358367949545300270f, -0.342020143325668710f,
-  -0.325568154457156640f, -0.309016994374947400f, -0.292371704722736770f,
-  -0.275637355816999160f, -0.258819045102520740f, -0.241921895599667730f,
-  -0.224951054343865000f, -0.207911690817759310f,
-  -0.190808995376544800f, -0.173648177666930330f, -0.156434465040230870f,
-  -0.139173100960065440f, -0.121869343405147480f, -0.104528463267653460f,
-  -0.087155742747658166f, -0.069756473744125302f,
-  -0.052335956242943828f, -0.034899496702500969f, -0.017452406437283512f,
-  0.000000000000000000f, 0.017452406437283512f, 0.034899496702500969f,
-  0.052335956242943828f, 0.069756473744125302f,
-  0.087155742747658166f, 0.104528463267653460f, 0.121869343405147480f,
-  0.139173100960065440f, 0.156434465040230870f, 0.173648177666930330f,
-  0.190808995376544800f, 0.207911690817759310f,
-  0.224951054343865000f, 0.241921895599667730f, 0.258819045102520740f,
-  0.275637355816999160f, 0.292371704722736770f, 0.309016994374947400f,
-  0.325568154457156640f, 0.342020143325668710f,
-  0.358367949545300270f, 0.374606593415912010f, 0.390731128489273720f,
-  0.406736643075800150f, 0.422618261740699440f, 0.438371146789077400f,
-  0.453990499739546750f, 0.469471562785890810f,
-  0.484809620246337060f, 0.499999999999999940f, 0.515038074910054160f,
-  0.529919264233204900f, 0.544639035015027080f, 0.559192903470746900f,
-  0.573576436351046050f, 0.587785252292473140f,
-  0.601815023152048270f, 0.615661475325658180f, 0.629320391049837390f,
-  0.642787609686539250f, 0.656059028990507160f, 0.669130606358858240f,
-  0.681998360062498480f, 0.694658370458997250f,
-  0.707106781186547460f, 0.719339800338651080f, 0.731353701619170460f,
-  0.743144825477394240f, 0.754709580222772010f, 0.766044443118978010f,
-  0.777145961456970790f, 0.788010753606722010f,
-  0.798635510047292830f, 0.809016994374947450f, 0.819152044288991800f,
-  0.829037572555041740f, 0.838670567945423940f, 0.848048096156426070f,
-  0.857167300702112220f, 0.866025403784438600f,
-  0.874619707139395740f, 0.882947592858926880f, 0.891006524188367790f,
-  0.898794046299167040f, 0.906307787036649940f, 0.913545457642600870f,
-  0.920504853452440260f, 0.927183854566787420f,
-  0.933580426497201740f, 0.939692620785908320f, 0.945518575599316740f,
-  0.951056516295153530f, 0.956304755963035440f, 0.961261695938318890f,
-  0.965925826289068310f, 0.970295726275996470f,
-  0.974370064785235250f, 0.978147600733805580f, 0.981627183447663980f,
-  0.984807753012208020f, 0.987688340595137770f, 0.990268068741570250f,
-  0.992546151641321980f, 0.994521895368273290f,
-  0.996194698091745550f, 0.997564050259824200f, 0.998629534754573830f,
-  0.999390827019095760f, 0.999847695156391270f, 1.000000000000000000f,
-  0.999847695156391270f, 0.999390827019095760f,
-  0.998629534754573830f, 0.997564050259824200f, 0.996194698091745550f,
-  0.994521895368273400f, 0.992546151641322090f, 0.990268068741570360f,
-  0.987688340595137660f, 0.984807753012208020f,
-  0.981627183447663980f, 0.978147600733805690f, 0.974370064785235250f,
-  0.970295726275996470f, 0.965925826289068310f, 0.961261695938318890f,
-  0.956304755963035550f, 0.951056516295153640f,
-  0.945518575599316850f, 0.939692620785908430f, 0.933580426497201740f,
-  0.927183854566787420f, 0.920504853452440370f, 0.913545457642600980f,
-  0.906307787036650050f, 0.898794046299166930f,
-  0.891006524188367900f, 0.882947592858927100f, 0.874619707139395850f,
-  0.866025403784438710f, 0.857167300702112330f, 0.848048096156426070f,
-  0.838670567945424050f, 0.829037572555041740f,
-  0.819152044288992020f, 0.809016994374947450f, 0.798635510047292720f,
-  0.788010753606722010f, 0.777145961456971010f, 0.766044443118978010f,
-  0.754709580222771790f, 0.743144825477394240f,
-  0.731353701619170570f, 0.719339800338651410f, 0.707106781186547570f,
-  0.694658370458997140f, 0.681998360062498590f, 0.669130606358858350f,
-  0.656059028990507280f, 0.642787609686539470f,
-  0.629320391049837720f, 0.615661475325658400f, 0.601815023152048160f,
-  0.587785252292473250f, 0.573576436351046380f, 0.559192903470746900f,
-  0.544639035015026860f, 0.529919264233204900f,
-  0.515038074910054380f, 0.499999999999999940f, 0.484809620246337170f,
-  0.469471562785891080f, 0.453990499739546860f, 0.438371146789077290f,
-  0.422618261740699500f, 0.406736643075800430f,
-  0.390731128489274160f, 0.374606593415912240f, 0.358367949545300210f,
-  0.342020143325668880f, 0.325568154457156980f, 0.309016994374947510f,
-  0.292371704722737050f, 0.275637355816999660f,
-  0.258819045102521020f, 0.241921895599667730f, 0.224951054343864780f,
-  0.207911690817759310f, 0.190808995376544970f, 0.173648177666930280f,
-  0.156434465040230980f, 0.139173100960065740f,
-  0.121869343405147550f, 0.104528463267653730f, 0.087155742747658638f,
-  0.069756473744125524f, 0.052335956242943807f, 0.034899496702500699f,
-  0.017452406437283439f, 0.000000000000000122f
-};
-
-
-/**    
- * @brief  Floating-point sin_cos function.   
- * @param[in]  theta    input value in degrees    
- * @param[out] *pSinVal points to the processed sine output.    
- * @param[out] *pCosVal points to the processed cos output.    
- * @return none.   
- */
-
-
-void arm_sin_cos_f32(
-  float32_t theta,
-  float32_t * pSinVal,
-  float32_t * pCosVal)
-{
-  int32_t i;                                     /* Index for reading nearwst output values */
-  float32_t x1 = -179.0f;                        /* Initial input value */
-  float32_t y0, y1;                              /* nearest output values */
-  float32_t y2, y3;
-  float32_t fract;                               /* fractional part of input */
-
-  /* Calculation of fractional part */
-  if(theta > 0.0f)
-  {
-    fract = theta - (float32_t) ((int32_t) theta);
-  }
-  else
-  {
-    fract = (theta - (float32_t) ((int32_t) theta)) + 1.0f;
-  }
-
-  /* index calculation for reading nearest output values */
-  i = (uint32_t) (theta - x1);
-
-  /* Checking min and max index of table */
-  if(i < 0)
-  {
-    i = 0;
-  }
-  else if(i >= 359)
-  {
-    i = 358;
-  }
-
-  /* reading nearest sine output values */
-  y0 = sinTable[i];
-  y1 = sinTable[i + 1u];
-
-  /* reading nearest cosine output values */
-  y2 = cosTable[i];
-  y3 = cosTable[i + 1u];
-
-  y1 = y1 - y0;
-  y3 = y3 - y2;
-
-  y1 = fract * y1;
-  y3 = fract * y3;
-
-  /* Calculation of sine value */
-  *pSinVal = y0 + y1;
-
-  /* Calculation of cosine value */
-  *pCosVal = y2 + y3;
-
-}
-
-/**    
- * @} end of SinCos group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c
deleted file mode 100644
index e4c8373672..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c
+++ /dev/null
@@ -1,324 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_cos_q31.c    
-*    
-* Description:	Cosine & Sine calculation for Q31 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupController    
- */
-
- /**    
- * @addtogroup SinCos    
- * @{    
- */
-
-/**    
-* \par    
-* Sine Table is generated from following loop    
-* 
for(i = 0; i < 360; i++)    
-* {    
-*    sinTable[i]= sin((i-180) * PI/180.0);    
-* } 
   
-* Convert above coefficients to fixed point 1.31 format.    
-*/
-
-static const int32_t sinTableQ31[360] = {
-
-  0x0, 0xfdc41e9b, 0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2,
-  0xf06695da,
-  0xee2f9369, 0xebf9f498, 0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9,
-  0xe108b40d, 0xdedf047d,
-  0xdcb7ea46, 0xda939061, 0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0,
-  0xd00ce422, 0xcdfc85bb,
-  0xcbf00dbe, 0xc9e7a512, 0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224,
-  0xc0000000, 0xbe133b7c,
-  0xbc2b9b05, 0xba4944a2, 0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af,
-  0xb1320139, 0xaf726def,
-  0xadb922b7, 0xac0641fb, 0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666,
-  0xa3ecac65, 0xa263007d,
-  0xa0e0a15f, 0x9f65ad2d, 0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5,
-  0x98722192, 0x9726069c,
-  0x95e218c9, 0x94a6715d, 0x937328f5, 0x92485786, 0x9126145f, 0x900c7621,
-  0x8efb92c2, 0x8df37f8b,
-  0x8cf45113, 0x8bfe1b3f, 0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4,
-  0x87b826f7, 0x86f93f50,
-  0x8643c7b3, 0x8597ce46, 0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b,
-  0x82cc0f36, 0x825a0a5b,
-  0x81f1d1ce, 0x81936daf, 0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130,
-  0x804fd23a, 0x802ce84c,
-  0x8013f61d, 0x8004fda0, 0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c,
-  0x804fd23a, 0x807cb130,
-  0x80b381ac, 0x80f43f69, 0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b,
-  0x82cc0f36, 0x8347d77b,
-  0x83cd5982, 0x845c8ae3, 0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50,
-  0x87b826f7, 0x88806fc4,
-  0x89520a1a, 0x8a2ce59f, 0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b,
-  0x8efb92c2, 0x900c7621,
-  0x9126145f, 0x92485786, 0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c,
-  0x98722192, 0x99c64fc5,
-  0x9b2276b0, 0x9c867b2c, 0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d,
-  0xa3ecac65, 0xa57d8666,
-  0xa7156f3c, 0xa8b4471a, 0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def,
-  0xb1320139, 0xb2f7b9af,
-  0xb4c373ee, 0xb6950c1e, 0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c,
-  0xc0000000, 0xc1f1c224,
-  0xc3e85b18, 0xc5e3a3a9, 0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb,
-  0xd00ce422, 0xd220ffc0,
-  0xd438af17, 0xd653c860, 0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d,
-  0xe108b40d, 0xe334cdc9,
-  0xe5632654, 0xe7939223, 0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da,
-  0xf29ecfb2, 0xf4d814a4,
-  0xf7123849, 0xf94d0e2e, 0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632,
-  0x6b2f1d2,
-  0x8edc7b7, 0xb27eb5c, 0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68,
-  0x163a1a7e, 0x186c6ddd,
-  0x1a9cd9ac, 0x1ccb3237, 0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f,
-  0x278dde6e, 0x29ac37a0,
-  0x2bc750e9, 0x2ddf0040, 0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee,
-  0x381c8bb5, 0x3a1c5c57,
-  0x3c17a4e8, 0x3e0e3ddc, 0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e,
-  0x4793a210, 0x496af3e2,
-  0x4b3c8c12, 0x4d084651, 0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05,
-  0x55a6125c, 0x574bb8e6,
-  0x58ea90c4, 0x5a82799a, 0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3,
-  0x620dbe8b, 0x637984d4,
-  0x64dd8950, 0x6639b03b, 0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3,
-  0x6c8cd70b, 0x6db7a87a,
-  0x6ed9eba1, 0x6ff389df, 0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1,
-  0x74ef0ebc, 0x75d31a61,
-  0x76adf5e6, 0x777f903c, 0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba,
-  0x7b0a9f8d, 0x7ba3751d,
-  0x7c32a67e, 0x7cb82885, 0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251,
-  0x7ec11aa5, 0x7f0bc097,
-  0x7f4c7e54, 0x7f834ed0, 0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260,
-  0x7fffffff, 0x7ffb0260,
-  0x7fec09e3, 0x7fd317b4, 0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097,
-  0x7ec11aa5, 0x7e6c9251,
-  0x7e0e2e32, 0x7da5f5a5, 0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d,
-  0x7b0a9f8d, 0x7a6831ba,
-  0x79bc384d, 0x7906c0b0, 0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61,
-  0x74ef0ebc, 0x7401e4c1,
-  0x730baeed, 0x720c8075, 0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a,
-  0x6c8cd70b, 0x6b598ea3,
-  0x6a1de737, 0x68d9f964, 0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4,
-  0x620dbe8b, 0x609a52d3,
-  0x5f1f5ea1, 0x5d9cff83, 0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6,
-  0x55a6125c, 0x53f9be05,
-  0x5246dd49, 0x508d9211, 0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2,
-  0x4793a210, 0x45b6bb5e,
-  0x43d464fb, 0x41ecc484, 0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57,
-  0x381c8bb5, 0x36185aee,
-  0x340ff242, 0x32037a45, 0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0,
-  0x278dde6e, 0x256c6f9f,
-  0x234815ba, 0x2120fb83, 0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd,
-  0x163a1a7e, 0x14060b68,
-  0x11d06c97, 0xf996a26, 0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2,
-  0x4779632, 0x23be165,
-
-
-};
-
-/**    
-* \par    
-* Cosine Table is generated from following loop    
-* 
for(i = 0; i < 360; i++)    
-* {    
-*    cosTable[i]= cos((i-180) * PI/180.0);    
-* } 
   
-* \par    
-* Convert above coefficients to fixed point 1.31 format.    
-*/
-static const int32_t cosTableQ31[360] = {
-  0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c, 0x804fd23a, 0x807cb130,
-  0x80b381ac, 0x80f43f69,
-  0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b, 0x82cc0f36, 0x8347d77b,
-  0x83cd5982, 0x845c8ae3,
-  0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50, 0x87b826f7, 0x88806fc4,
-  0x89520a1a, 0x8a2ce59f,
-  0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b, 0x8efb92c2, 0x900c7621,
-  0x9126145f, 0x92485786,
-  0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c, 0x98722192, 0x99c64fc5,
-  0x9b2276b0, 0x9c867b2c,
-  0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d, 0xa3ecac65, 0xa57d8666,
-  0xa7156f3c, 0xa8b4471a,
-  0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def, 0xb1320139, 0xb2f7b9af,
-  0xb4c373ee, 0xb6950c1e,
-  0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c, 0xc0000000, 0xc1f1c224,
-  0xc3e85b18, 0xc5e3a3a9,
-  0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb, 0xd00ce422, 0xd220ffc0,
-  0xd438af17, 0xd653c860,
-  0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d, 0xe108b40d, 0xe334cdc9,
-  0xe5632654, 0xe7939223,
-  0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da, 0xf29ecfb2, 0xf4d814a4,
-  0xf7123849, 0xf94d0e2e,
-  0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632, 0x6b2f1d2, 0x8edc7b7,
-  0xb27eb5c,
-  0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68, 0x163a1a7e, 0x186c6ddd,
-  0x1a9cd9ac, 0x1ccb3237,
-  0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f, 0x278dde6e, 0x29ac37a0,
-  0x2bc750e9, 0x2ddf0040,
-  0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee, 0x381c8bb5, 0x3a1c5c57,
-  0x3c17a4e8, 0x3e0e3ddc,
-  0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e, 0x4793a210, 0x496af3e2,
-  0x4b3c8c12, 0x4d084651,
-  0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05, 0x55a6125c, 0x574bb8e6,
-  0x58ea90c4, 0x5a82799a,
-  0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3, 0x620dbe8b, 0x637984d4,
-  0x64dd8950, 0x6639b03b,
-  0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3, 0x6c8cd70b, 0x6db7a87a,
-  0x6ed9eba1, 0x6ff389df,
-  0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1, 0x74ef0ebc, 0x75d31a61,
-  0x76adf5e6, 0x777f903c,
-  0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba, 0x7b0a9f8d, 0x7ba3751d,
-  0x7c32a67e, 0x7cb82885,
-  0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251, 0x7ec11aa5, 0x7f0bc097,
-  0x7f4c7e54, 0x7f834ed0,
-  0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260, 0x7fffffff, 0x7ffb0260,
-  0x7fec09e3, 0x7fd317b4,
-  0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097, 0x7ec11aa5, 0x7e6c9251,
-  0x7e0e2e32, 0x7da5f5a5,
-  0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d, 0x7b0a9f8d, 0x7a6831ba,
-  0x79bc384d, 0x7906c0b0,
-  0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61, 0x74ef0ebc, 0x7401e4c1,
-  0x730baeed, 0x720c8075,
-  0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a, 0x6c8cd70b, 0x6b598ea3,
-  0x6a1de737, 0x68d9f964,
-  0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4, 0x620dbe8b, 0x609a52d3,
-  0x5f1f5ea1, 0x5d9cff83,
-  0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6, 0x55a6125c, 0x53f9be05,
-  0x5246dd49, 0x508d9211,
-  0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2, 0x4793a210, 0x45b6bb5e,
-  0x43d464fb, 0x41ecc484,
-  0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57, 0x381c8bb5, 0x36185aee,
-  0x340ff242, 0x32037a45,
-  0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0, 0x278dde6e, 0x256c6f9f,
-  0x234815ba, 0x2120fb83,
-  0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd, 0x163a1a7e, 0x14060b68,
-  0x11d06c97, 0xf996a26,
-  0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2, 0x4779632, 0x23be165, 0x0,
-  0xfdc41e9b,
-  0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2, 0xf06695da,
-  0xee2f9369, 0xebf9f498,
-  0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9, 0xe108b40d, 0xdedf047d,
-  0xdcb7ea46, 0xda939061,
-  0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0, 0xd00ce422, 0xcdfc85bb,
-  0xcbf00dbe, 0xc9e7a512,
-  0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224, 0xc0000000, 0xbe133b7c,
-  0xbc2b9b05, 0xba4944a2,
-  0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af, 0xb1320139, 0xaf726def,
-  0xadb922b7, 0xac0641fb,
-  0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666, 0xa3ecac65, 0xa263007d,
-  0xa0e0a15f, 0x9f65ad2d,
-  0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5, 0x98722192, 0x9726069c,
-  0x95e218c9, 0x94a6715d,
-  0x937328f5, 0x92485786, 0x9126145f, 0x900c7621, 0x8efb92c2, 0x8df37f8b,
-  0x8cf45113, 0x8bfe1b3f,
-  0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4, 0x87b826f7, 0x86f93f50,
-  0x8643c7b3, 0x8597ce46,
-  0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b, 0x82cc0f36, 0x825a0a5b,
-  0x81f1d1ce, 0x81936daf,
-  0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130, 0x804fd23a, 0x802ce84c,
-  0x8013f61d, 0x8004fda0,
-
-};
-
-
-/**    
- * @brief  Q31 sin_cos function.   
- * @param[in]  theta    scaled input value in degrees    
- * @param[out] *pSinVal points to the processed sine output.    
- * @param[out] *pCosVal points to the processed cosine output.    
- * @return none.   
- *    
- * The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].   
- *    
- */
-
-
-void arm_sin_cos_q31(
-  q31_t theta,
-  q31_t * pSinVal,
-  q31_t * pCosVal)
-{
-  q31_t x0;                                      /* Nearest input value */
-  q31_t y0, y1;                                  /* Nearest output values */
-  q31_t xSpacing = INPUT_SPACING;                /* Spaing between inputs */
-  int32_t i;                                     /* Index */
-  q31_t oneByXSpacing;                           /* 1/ xSpacing value */
-  q31_t out;                                     /* temporary variable */
-  uint32_t sign_bits;                            /* No.of sign bits */
-  uint32_t firstX = 0x80000000;                  /* First X value */
-
-  /* Calculation of index */
-  i = ((uint32_t) theta - firstX) / (uint32_t) xSpacing;
-
-  /* Checking min and max index of table */
-  if(i < 0)
-  {
-    i = 0;
-  }
-  else if(i >= 359)
-  {
-    i = 358;
-  }
-
-  /* Calculation of first nearest input value */
-  x0 = (q31_t) firstX + ((q31_t) i * xSpacing);
-
-  /* Reading nearest sine output values from table */
-  y0 = sinTableQ31[i];
-  y1 = sinTableQ31[i + 1u];
-
-  /* Calculation of 1/(x1-x0) */
-  /* (x1-x0) is xSpacing which is fixed value */
-  sign_bits = 8u;
-  oneByXSpacing = 0x5A000000;
-
-  /* Calculation of (theta - x0)/(x1-x0) */
-  out =
-    (((q31_t) (((q63_t) (theta - x0) * oneByXSpacing) >> 32)) << sign_bits);
-
-  /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */
-  *pSinVal = __QADD(y0, ((q31_t) (((q63_t) (y1 - y0) * out) >> 30)));
-
-  /* Reading nearest cosine output values from table */
-  y0 = cosTableQ31[i];
-  y1 = cosTableQ31[i + 1u];
-
-  /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */
-  *pCosVal = __QADD(y0, ((q31_t) (((q63_t) (y1 - y0) * out) >> 30)));
-
-}
-
-/**    
- * @} end of SinCos group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c
deleted file mode 100644
index b04aa02f54..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c
+++ /dev/null
@@ -1,280 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cos_f32.c    
-*    
-* Description:	Fast cosine calculation for floating-point values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-/**    
- * @ingroup groupFastMath    
- */
-
-/**    
- * @defgroup cos Cosine    
- *    
- * Computes the trigonometric cosine function using a combination of table lookup   
- * and cubic interpolation.  There are separate functions for   
- * Q15, Q31, and floating-point data types.   
- * The input to the floating-point version is in radians while the   
- * fixed-point Q15 and Q31 have a scaled input with the range   
- * [0 +0.9999] mapping to [0 2*pi), Where range excludes 2*pi.   
- *   
- * The implementation is based on table lookup using 256 values together with cubic interpolation.   
- * The steps used are:   
- *  -# Calculation of the nearest integer table index   
- *  -# Fetch the four table values a, b, c, and d     
- *  -# Compute the fractional portion (fract) of the table index.   
- *  -# Calculation of wa, wb, wc, wd    
- *  -# The final result equals a*wa + b*wb + c*wc + d*wd   
- *   
- * where   
- * 
    
- *    a=Table[index-1];    
- *    b=Table[index+0];    
- *    c=Table[index+1];    
- *    d=Table[index+2];    
- * 
   
- * and   
- * 
    
- *    wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;    
- *    wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;    
- *    wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;    
- *    wd=(1/6)*fract.^3 - (1/6)*fract;    
- * 
    
- */
-
- /**    
- * @addtogroup cos    
- * @{    
- */
-
-
-/**    
-* \par    
-* Example code for Generation of Cos Table:   
-* tableSize = 256;    
-* 
for(n = -1; n < (tableSize + 2); n++)    
-* {    
-*	cosTable[n+1]= cos(2*pi*n/tableSize);    
-* } 
    
-* where pi value is  3.14159265358979    
-*/
-
-static const float32_t cosTable[260] = {
-  0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f,
-  0.998795449733734130f, 0.997290432453155520f, 0.995184719562530520f,
-  0.992479562759399410f, 0.989176511764526370f,
-  0.985277652740478520f, 0.980785250663757320f, 0.975702106952667240f,
-  0.970031261444091800f, 0.963776051998138430f, 0.956940352916717530f,
-  0.949528157711029050f, 0.941544055938720700f,
-  0.932992815971374510f, 0.923879504203796390f, 0.914209783077239990f,
-  0.903989315032958980f, 0.893224298954010010f, 0.881921291351318360f,
-  0.870086967945098880f, 0.857728600502014160f,
-  0.844853579998016360f, 0.831469595432281490f, 0.817584812641143800f,
-  0.803207516670227050f, 0.788346409797668460f, 0.773010432720184330f,
-  0.757208824157714840f, 0.740951120853424070f,
-  0.724247097969055180f, 0.707106769084930420f, 0.689540565013885500f,
-  0.671558976173400880f, 0.653172850608825680f, 0.634393274784088130f,
-  0.615231573581695560f, 0.595699310302734380f,
-  0.575808167457580570f, 0.555570244789123540f, 0.534997642040252690f,
-  0.514102756977081300f, 0.492898195981979370f, 0.471396744251251220f,
-  0.449611335992813110f, 0.427555084228515630f,
-  0.405241310596466060f, 0.382683426141738890f, 0.359895050525665280f,
-  0.336889863014221190f, 0.313681751489639280f, 0.290284663438797000f,
-  0.266712754964828490f, 0.242980182170867920f,
-  0.219101235270500180f, 0.195090323686599730f, 0.170961886644363400f,
-  0.146730467677116390f, 0.122410677373409270f, 0.098017141222953796f,
-  0.073564566671848297f, 0.049067676067352295f,
-  0.024541229009628296f, 0.000000000000000061f, -0.024541229009628296f,
-  -0.049067676067352295f, -0.073564566671848297f, -0.098017141222953796f,
-  -0.122410677373409270f, -0.146730467677116390f,
-  -0.170961886644363400f, -0.195090323686599730f, -0.219101235270500180f,
-  -0.242980182170867920f, -0.266712754964828490f, -0.290284663438797000f,
-  -0.313681751489639280f, -0.336889863014221190f,
-  -0.359895050525665280f, -0.382683426141738890f, -0.405241310596466060f,
-  -0.427555084228515630f, -0.449611335992813110f, -0.471396744251251220f,
-  -0.492898195981979370f, -0.514102756977081300f,
-  -0.534997642040252690f, -0.555570244789123540f, -0.575808167457580570f,
-  -0.595699310302734380f, -0.615231573581695560f, -0.634393274784088130f,
-  -0.653172850608825680f, -0.671558976173400880f,
-  -0.689540565013885500f, -0.707106769084930420f, -0.724247097969055180f,
-  -0.740951120853424070f, -0.757208824157714840f, -0.773010432720184330f,
-  -0.788346409797668460f, -0.803207516670227050f,
-  -0.817584812641143800f, -0.831469595432281490f, -0.844853579998016360f,
-  -0.857728600502014160f, -0.870086967945098880f, -0.881921291351318360f,
-  -0.893224298954010010f, -0.903989315032958980f,
-  -0.914209783077239990f, -0.923879504203796390f, -0.932992815971374510f,
-  -0.941544055938720700f, -0.949528157711029050f, -0.956940352916717530f,
-  -0.963776051998138430f, -0.970031261444091800f,
-  -0.975702106952667240f, -0.980785250663757320f, -0.985277652740478520f,
-  -0.989176511764526370f, -0.992479562759399410f, -0.995184719562530520f,
-  -0.997290432453155520f, -0.998795449733734130f,
-  -0.999698817729949950f, -1.000000000000000000f, -0.999698817729949950f,
-  -0.998795449733734130f, -0.997290432453155520f, -0.995184719562530520f,
-  -0.992479562759399410f, -0.989176511764526370f,
-  -0.985277652740478520f, -0.980785250663757320f, -0.975702106952667240f,
-  -0.970031261444091800f, -0.963776051998138430f, -0.956940352916717530f,
-  -0.949528157711029050f, -0.941544055938720700f,
-  -0.932992815971374510f, -0.923879504203796390f, -0.914209783077239990f,
-  -0.903989315032958980f, -0.893224298954010010f, -0.881921291351318360f,
-  -0.870086967945098880f, -0.857728600502014160f,
-  -0.844853579998016360f, -0.831469595432281490f, -0.817584812641143800f,
-  -0.803207516670227050f, -0.788346409797668460f, -0.773010432720184330f,
-  -0.757208824157714840f, -0.740951120853424070f,
-  -0.724247097969055180f, -0.707106769084930420f, -0.689540565013885500f,
-  -0.671558976173400880f, -0.653172850608825680f, -0.634393274784088130f,
-  -0.615231573581695560f, -0.595699310302734380f,
-  -0.575808167457580570f, -0.555570244789123540f, -0.534997642040252690f,
-  -0.514102756977081300f, -0.492898195981979370f, -0.471396744251251220f,
-  -0.449611335992813110f, -0.427555084228515630f,
-  -0.405241310596466060f, -0.382683426141738890f, -0.359895050525665280f,
-  -0.336889863014221190f, -0.313681751489639280f, -0.290284663438797000f,
-  -0.266712754964828490f, -0.242980182170867920f,
-  -0.219101235270500180f, -0.195090323686599730f, -0.170961886644363400f,
-  -0.146730467677116390f, -0.122410677373409270f, -0.098017141222953796f,
-  -0.073564566671848297f, -0.049067676067352295f,
-  -0.024541229009628296f, -0.000000000000000184f, 0.024541229009628296f,
-  0.049067676067352295f, 0.073564566671848297f, 0.098017141222953796f,
-  0.122410677373409270f, 0.146730467677116390f,
-  0.170961886644363400f, 0.195090323686599730f, 0.219101235270500180f,
-  0.242980182170867920f, 0.266712754964828490f, 0.290284663438797000f,
-  0.313681751489639280f, 0.336889863014221190f,
-  0.359895050525665280f, 0.382683426141738890f, 0.405241310596466060f,
-  0.427555084228515630f, 0.449611335992813110f, 0.471396744251251220f,
-  0.492898195981979370f, 0.514102756977081300f,
-  0.534997642040252690f, 0.555570244789123540f, 0.575808167457580570f,
-  0.595699310302734380f, 0.615231573581695560f, 0.634393274784088130f,
-  0.653172850608825680f, 0.671558976173400880f,
-  0.689540565013885500f, 0.707106769084930420f, 0.724247097969055180f,
-  0.740951120853424070f, 0.757208824157714840f, 0.773010432720184330f,
-  0.788346409797668460f, 0.803207516670227050f,
-  0.817584812641143800f, 0.831469595432281490f, 0.844853579998016360f,
-  0.857728600502014160f, 0.870086967945098880f, 0.881921291351318360f,
-  0.893224298954010010f, 0.903989315032958980f,
-  0.914209783077239990f, 0.923879504203796390f, 0.932992815971374510f,
-  0.941544055938720700f, 0.949528157711029050f, 0.956940352916717530f,
-  0.963776051998138430f, 0.970031261444091800f,
-  0.975702106952667240f, 0.980785250663757320f, 0.985277652740478520f,
-  0.989176511764526370f, 0.992479562759399410f, 0.995184719562530520f,
-  0.997290432453155520f, 0.998795449733734130f,
-  0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f,
-  0.998795449733734130f
-};
-
-/**   
- * @brief  Fast approximation to the trigonometric cosine function for floating-point data.   
- * @param[in] x input value in radians.   
- * @return cos(x).   
- */
-
-
-float32_t arm_cos_f32(
-  float32_t x)
-{
-  float32_t cosVal, fract, in;
-  int32_t index;
-  uint32_t tableSize = (uint32_t) TABLE_SIZE;
-  float32_t wa, wb, wc, wd;
-  float32_t a, b, c, d;
-  float32_t *tablePtr;
-  int32_t n;
-  float32_t fractsq, fractby2, fractby6, fractby3, fractsqby2;
-  float32_t oneminusfractby2;
-  float32_t frby2xfrsq, frby6xfrsq;
-
-  /* input x is in radians */
-  /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
-  in = x * 0.159154943092f;
-
-  /* Calculation of floor value of input */
-  n = (int32_t) in;
-
-  /* Make negative values towards -infinity */
-  if(x < 0.0f)
-  {
-    n = n - 1;
-  }
-
-  /* Map input value to [0 1] */
-  in = in - (float32_t) n;
-
-  /* Calculation of index of the table */
-  index = (uint32_t) (tableSize * in);
-
-  /* fractional value calculation */
-  fract = ((float32_t) tableSize * in) - (float32_t) index;
-
-  /* Checking min and max index of table */
-  if(index < 0)
-  {
-    index = 0;
-  }
-  else if(index > 256)
-  {
-    index = 256;
-  }
-
-  /* Initialise table pointer */
-  tablePtr = (float32_t *) & cosTable[index];
-
-  /* Read four nearest values of input value from the cos table */
-  a = tablePtr[0];
-  b = tablePtr[1];
-  c = tablePtr[2];
-  d = tablePtr[3];
-
-  /* Cubic interpolation process */
-  fractsq = fract * fract;
-  fractby2 = fract * 0.5f;
-  fractby6 = fract * 0.166666667f;
-  fractby3 = fract * 0.3333333333333f;
-  fractsqby2 = fractsq * 0.5f;
-  frby2xfrsq = (fractby2) * fractsq;
-  frby6xfrsq = (fractby6) * fractsq;
-  oneminusfractby2 = 1.0f - fractby2;
-  wb = fractsqby2 - fractby3;
-  wc = (fractsqby2 + fract);
-  wa = wb - frby6xfrsq;
-  wb = frby2xfrsq - fractsq;
-  cosVal = wa * a;
-  wc = wc - frby2xfrsq;
-  wd = (frby6xfrsq) - fractby6;
-  wb = wb + oneminusfractby2;
-
-  /* Calculate cos value */
-  cosVal = (cosVal + (b * wb)) + ((c * wc) + (d * wd));
-
-  /* Return the output value */
-  return (cosVal);
-
-}
-
-/**    
- * @} end of cos group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c
deleted file mode 100644
index 12339fd75e..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cos_q15.c    
-*    
-* Description:	Fast cosine calculation for Q15 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
- /**    
- * @addtogroup cos    
- * @{    
- */
-
-/**   
-* \par    
-* Table Values are in Q15(1.15 Fixed point format) and generation is done in three steps    
-* \par    
-* First Generate cos values in floating point:    
-* tableSize = 256;     
-* 
for(n = -1; n < (tableSize + 1); n++)    
-* {    
-*	cosTable[n+1]= cos(2*pi*n/tableSize);    
-* }
   
-* where pi value is  3.14159265358979    
-* \par    
-* Secondly Convert Floating point to Q15(Fixed point):    
-*	(cosTable[i] * pow(2, 15))    
-* \par    
-* Finally Rounding to nearest integer is done    
-* 	cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);    
-*/
-
-static const q15_t cosTableQ15[259] = {
-  0x7ff6, 0x7fff, 0x7ff6, 0x7fd9, 0x7fa7, 0x7f62, 0x7f0a, 0x7e9d,
-  0x7e1e, 0x7d8a, 0x7ce4, 0x7c2a, 0x7b5d, 0x7a7d, 0x798a, 0x7885,
-  0x776c, 0x7642, 0x7505, 0x73b6, 0x7255, 0x70e3, 0x6f5f, 0x6dca,
-  0x6c24, 0x6a6e, 0x68a7, 0x66d0, 0x64e9, 0x62f2, 0x60ec, 0x5ed7,
-  0x5cb4, 0x5a82, 0x5843, 0x55f6, 0x539b, 0x5134, 0x4ec0, 0x4c40,
-  0x49b4, 0x471d, 0x447b, 0x41ce, 0x3f17, 0x3c57, 0x398d, 0x36ba,
-  0x33df, 0x30fc, 0x2e11, 0x2b1f, 0x2827, 0x2528, 0x2224, 0x1f1a,
-  0x1c0c, 0x18f9, 0x15e2, 0x12c8, 0xfab, 0xc8c, 0x96b, 0x648,
-  0x324, 0x0, 0xfcdc, 0xf9b8, 0xf695, 0xf374, 0xf055, 0xed38,
-  0xea1e, 0xe707, 0xe3f4, 0xe0e6, 0xdddc, 0xdad8, 0xd7d9, 0xd4e1,
-  0xd1ef, 0xcf04, 0xcc21, 0xc946, 0xc673, 0xc3a9, 0xc0e9, 0xbe32,
-  0xbb85, 0xb8e3, 0xb64c, 0xb3c0, 0xb140, 0xaecc, 0xac65, 0xaa0a,
-  0xa7bd, 0xa57e, 0xa34c, 0xa129, 0x9f14, 0x9d0e, 0x9b17, 0x9930,
-  0x9759, 0x9592, 0x93dc, 0x9236, 0x90a1, 0x8f1d, 0x8dab, 0x8c4a,
-  0x8afb, 0x89be, 0x8894, 0x877b, 0x8676, 0x8583, 0x84a3, 0x83d6,
-  0x831c, 0x8276, 0x81e2, 0x8163, 0x80f6, 0x809e, 0x8059, 0x8027,
-  0x800a, 0x8000, 0x800a, 0x8027, 0x8059, 0x809e, 0x80f6, 0x8163,
-  0x81e2, 0x8276, 0x831c, 0x83d6, 0x84a3, 0x8583, 0x8676, 0x877b,
-  0x8894, 0x89be, 0x8afb, 0x8c4a, 0x8dab, 0x8f1d, 0x90a1, 0x9236,
-  0x93dc, 0x9592, 0x9759, 0x9930, 0x9b17, 0x9d0e, 0x9f14, 0xa129,
-  0xa34c, 0xa57e, 0xa7bd, 0xaa0a, 0xac65, 0xaecc, 0xb140, 0xb3c0,
-  0xb64c, 0xb8e3, 0xbb85, 0xbe32, 0xc0e9, 0xc3a9, 0xc673, 0xc946,
-  0xcc21, 0xcf04, 0xd1ef, 0xd4e1, 0xd7d9, 0xdad8, 0xdddc, 0xe0e6,
-  0xe3f4, 0xe707, 0xea1e, 0xed38, 0xf055, 0xf374, 0xf695, 0xf9b8,
-  0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8,
-  0x15e2, 0x18f9, 0x1c0c, 0x1f1a, 0x2224, 0x2528, 0x2827, 0x2b1f,
-  0x2e11, 0x30fc, 0x33df, 0x36ba, 0x398d, 0x3c57, 0x3f17, 0x41ce,
-  0x447b, 0x471d, 0x49b4, 0x4c40, 0x4ec0, 0x5134, 0x539b, 0x55f6,
-  0x5843, 0x5a82, 0x5cb4, 0x5ed7, 0x60ec, 0x62f2, 0x64e9, 0x66d0,
-  0x68a7, 0x6a6e, 0x6c24, 0x6dca, 0x6f5f, 0x70e3, 0x7255, 0x73b6,
-  0x7505, 0x7642, 0x776c, 0x7885, 0x798a, 0x7a7d, 0x7b5d, 0x7c2a,
-  0x7ce4, 0x7d8a, 0x7e1e, 0x7e9d, 0x7f0a, 0x7f62, 0x7fa7, 0x7fd9,
-  0x7ff6, 0x7fff, 0x7ff6
-};
-
-
-/**   
- * @brief Fast approximation to the trigonometric cosine function for Q15 data.   
- * @param[in] x Scaled input value in radians.   
- * @return  cos(x).   
- *   
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi.   
- */
-
-q15_t arm_cos_q15(
-  q15_t x)
-{
-  q31_t cosVal;                                  /* Temporary variable for output */
-  q15_t *tablePtr;                               /* Pointer to table */
-  q15_t in, in2;                                 /* Temporary variables for input */
-  q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
-  q15_t a, b, c, d;                              /* Four nearest output values */
-  q15_t fract, fractCube, fractSquare;           /* Variables for fractional value */
-  q15_t oneBy6 = 0x1555;                         /* Fixed point value of 1/6 */
-  q15_t tableSpacing = TABLE_SPACING_Q15;        /* Table spacing */
-  int32_t index;                                 /* Index variable */
-
-  in = x;
-
-  /* Calculate the nearest index */
-  index = (int32_t) in / tableSpacing;
-
-  /* Calculate the nearest value of input */
-  in2 = (q15_t) index *tableSpacing;
-
-  /* Calculation of fractional value */
-  fract = (in - in2) << 8;
-
-  /* fractSquare = fract * fract */
-  fractSquare = (q15_t) ((fract * fract) >> 15);
-
-  /* fractCube = fract * fract * fract */
-  fractCube = (q15_t) ((fractSquare * fract) >> 15);
-
-  /* Checking min and max index of table */
-  if(index < 0)
-  {
-    index = 0;
-  }
-  else if(index > 256)
-  {
-    index = 256;
-  }
-
-  /* Initialise table pointer */
-  tablePtr = (q15_t *) & cosTableQ15[index];
-
-  /* Cubic interpolation process */
-  /* Calculation of wa */
-  /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAA)*fract; */
-  wa = (q31_t) oneBy6 *fractCube;
-  wa += (q31_t) 0x2AAA *fract;
-  wa = -(wa >> 15);
-  wa += (fractSquare >> 1u);
-
-  /* Read first nearest value of output from the cos table */
-  a = *tablePtr++;
-
-  /* cosVal = a * wa */
-  cosVal = a * wa;
-
-  /* Calculation of wb */
-  wb = (((fractCube >> 1u) - fractSquare) - (fract >> 1u)) + 0x7FFF;
-
-  /* Read second nearest value of output from the cos table */
-  b = *tablePtr++;
-
-  /*      cosVal += b*wb */
-  cosVal += b * wb;
-
-  /* Calculation of wc */
-  wc = -(q31_t) fractCube + fractSquare;
-  wc = (wc >> 1u) + fract;
-
-  /* Read third nearest value of output from the cos table */
-  c = *tablePtr++;
-
-  /* cosVal += c*wc */
-  cosVal += c * wc;
-
-  /* Calculation of wd */
-  /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
-  fractCube = fractCube - fract;
-  wd = ((q15_t) (((q31_t) oneBy6 * fractCube) >> 15));
-
-  /* Read fourth nearest value of output from the cos table */
-  d = *tablePtr++;
-
-  /* cosVal += d*wd; */
-  cosVal += d * wd;
-
-  /* Convert output value in 1.15(q15) format and saturate */
-  cosVal = __SSAT((cosVal >> 15), 16);
-
-  /* Return the output value in 1.15(q15) format */
-  return ((q15_t) cosVal);
-
-}
-
-/**    
- * @} end of cos group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c
deleted file mode 100644
index 10ecedb41a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c
+++ /dev/null
@@ -1,239 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cos_q31.c    
-*    
-* Description:	Fast cosine calculation for Q31 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
- /**    
- * @addtogroup cos    
- * @{    
- */
-
-/**    
- * \par    
- * Table Values are in Q31(1.31 Fixed point format) and generation is done in three steps    
- * First Generate cos values in floating point:    
- * tableSize = 256;      
- * 
for(n = -1; n < (tableSize + 1); n++)    
- * {    
- *	cosTable[n+1]= cos(2*pi*n/tableSize);    
- * } 
     
- * where pi value is  3.14159265358979    
- * \par    
- * Secondly Convert Floating point to Q31(Fixed point):    
- *	(cosTable[i] * pow(2, 31))    
- * \par    
- * Finally Rounding to nearest integer is done    
- * 	cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);    
- */
-
-
-static const q31_t cosTableQ31[259] = {
-  0x7ff62182, 0x7fffffff, 0x7ff62182, 0x7fd8878e, 0x7fa736b4, 0x7f62368f,
-  0x7f0991c4, 0x7e9d55fc,
-  0x7e1d93ea, 0x7d8a5f40, 0x7ce3ceb2, 0x7c29fbee, 0x7b5d039e, 0x7a7d055b,
-  0x798a23b1, 0x78848414,
-  0x776c4edb, 0x7641af3d, 0x7504d345, 0x73b5ebd1, 0x72552c85, 0x70e2cbc6,
-  0x6f5f02b2, 0x6dca0d14,
-  0x6c242960, 0x6a6d98a4, 0x68a69e81, 0x66cf8120, 0x64e88926, 0x62f201ac,
-  0x60ec3830, 0x5ed77c8a,
-  0x5cb420e0, 0x5a82799a, 0x5842dd54, 0x55f5a4d2, 0x539b2af0, 0x5133cc94,
-  0x4ebfe8a5, 0x4c3fdff4,
-  0x49b41533, 0x471cece7, 0x447acd50, 0x41ce1e65, 0x3f1749b8, 0x3c56ba70,
-  0x398cdd32, 0x36ba2014,
-  0x33def287, 0x30fbc54d, 0x2e110a62, 0x2b1f34eb, 0x2826b928, 0x25280c5e,
-  0x2223a4c5, 0x1f19f97b,
-  0x1c0b826a, 0x18f8b83c, 0x15e21445, 0x12c8106f, 0xfab272b, 0xc8bd35e,
-  0x96a9049, 0x647d97c,
-  0x3242abf, 0x0, 0xfcdbd541, 0xf9b82684, 0xf6956fb7, 0xf3742ca2, 0xf054d8d5,
-  0xed37ef91,
-  0xea1debbb, 0xe70747c4, 0xe3f47d96, 0xe0e60685, 0xdddc5b3b, 0xdad7f3a2,
-  0xd7d946d8, 0xd4e0cb15,
-  0xd1eef59e, 0xcf043ab3, 0xcc210d79, 0xc945dfec, 0xc67322ce, 0xc3a94590,
-  0xc0e8b648, 0xbe31e19b,
-  0xbb8532b0, 0xb8e31319, 0xb64beacd, 0xb3c0200c, 0xb140175b, 0xaecc336c,
-  0xac64d510, 0xaa0a5b2e,
-  0xa7bd22ac, 0xa57d8666, 0xa34bdf20, 0xa1288376, 0x9f13c7d0, 0x9d0dfe54,
-  0x9b1776da, 0x99307ee0,
-  0x9759617f, 0x9592675c, 0x93dbd6a0, 0x9235f2ec, 0x90a0fd4e, 0x8f1d343a,
-  0x8daad37b, 0x8c4a142f,
-  0x8afb2cbb, 0x89be50c3, 0x8893b125, 0x877b7bec, 0x8675dc4f, 0x8582faa5,
-  0x84a2fc62, 0x83d60412,
-  0x831c314e, 0x8275a0c0, 0x81e26c16, 0x8162aa04, 0x80f66e3c, 0x809dc971,
-  0x8058c94c, 0x80277872,
-  0x8009de7e, 0x80000000, 0x8009de7e, 0x80277872, 0x8058c94c, 0x809dc971,
-  0x80f66e3c, 0x8162aa04,
-  0x81e26c16, 0x8275a0c0, 0x831c314e, 0x83d60412, 0x84a2fc62, 0x8582faa5,
-  0x8675dc4f, 0x877b7bec,
-  0x8893b125, 0x89be50c3, 0x8afb2cbb, 0x8c4a142f, 0x8daad37b, 0x8f1d343a,
-  0x90a0fd4e, 0x9235f2ec,
-  0x93dbd6a0, 0x9592675c, 0x9759617f, 0x99307ee0, 0x9b1776da, 0x9d0dfe54,
-  0x9f13c7d0, 0xa1288376,
-  0xa34bdf20, 0xa57d8666, 0xa7bd22ac, 0xaa0a5b2e, 0xac64d510, 0xaecc336c,
-  0xb140175b, 0xb3c0200c,
-  0xb64beacd, 0xb8e31319, 0xbb8532b0, 0xbe31e19b, 0xc0e8b648, 0xc3a94590,
-  0xc67322ce, 0xc945dfec,
-  0xcc210d79, 0xcf043ab3, 0xd1eef59e, 0xd4e0cb15, 0xd7d946d8, 0xdad7f3a2,
-  0xdddc5b3b, 0xe0e60685,
-  0xe3f47d96, 0xe70747c4, 0xea1debbb, 0xed37ef91, 0xf054d8d5, 0xf3742ca2,
-  0xf6956fb7, 0xf9b82684,
-  0xfcdbd541, 0x0, 0x3242abf, 0x647d97c, 0x96a9049, 0xc8bd35e, 0xfab272b,
-  0x12c8106f,
-  0x15e21445, 0x18f8b83c, 0x1c0b826a, 0x1f19f97b, 0x2223a4c5, 0x25280c5e,
-  0x2826b928, 0x2b1f34eb,
-  0x2e110a62, 0x30fbc54d, 0x33def287, 0x36ba2014, 0x398cdd32, 0x3c56ba70,
-  0x3f1749b8, 0x41ce1e65,
-  0x447acd50, 0x471cece7, 0x49b41533, 0x4c3fdff4, 0x4ebfe8a5, 0x5133cc94,
-  0x539b2af0, 0x55f5a4d2,
-  0x5842dd54, 0x5a82799a, 0x5cb420e0, 0x5ed77c8a, 0x60ec3830, 0x62f201ac,
-  0x64e88926, 0x66cf8120,
-  0x68a69e81, 0x6a6d98a4, 0x6c242960, 0x6dca0d14, 0x6f5f02b2, 0x70e2cbc6,
-  0x72552c85, 0x73b5ebd1,
-  0x7504d345, 0x7641af3d, 0x776c4edb, 0x78848414, 0x798a23b1, 0x7a7d055b,
-  0x7b5d039e, 0x7c29fbee,
-  0x7ce3ceb2, 0x7d8a5f40, 0x7e1d93ea, 0x7e9d55fc, 0x7f0991c4, 0x7f62368f,
-  0x7fa736b4, 0x7fd8878e,
-  0x7ff62182, 0x7fffffff, 0x7ff62182
-};
-
-/**   
- * @brief Fast approximation to the trigonometric cosine function for Q31 data.   
- * @param[in] x Scaled input value in radians.   
- * @return  cos(x).   
- *   
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi.   
- */
-
-q31_t arm_cos_q31(
-  q31_t x)
-{
-  q31_t cosVal, in, in2;                         /* Temporary variables for input, output */
-  q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
-  q31_t a, b, c, d;                              /* Four nearest output values */
-  q31_t *tablePtr;                               /* Pointer to table */
-  q31_t fract, fractCube, fractSquare;           /* Temporary values for fractional values */
-  q31_t oneBy6 = 0x15555555;                     /* Fixed point value of 1/6 */
-  q31_t tableSpacing = TABLE_SPACING_Q31;        /* Table spacing */
-  q31_t temp;                                    /* Temporary variable for intermediate process */
-  int32_t index;                                 /* Index variable */
-
-  in = x;
-
-  /* Calculate the nearest index */
-  index = in / tableSpacing;
-
-  /* Calculate the nearest value of input */
-  in2 = ((q31_t) index) * tableSpacing;
-
-  /* Calculation of fractional value */
-  fract = (in - in2) << 8;
-
-  /* fractSquare = fract * fract */
-  fractSquare = ((q31_t) (((q63_t) fract * fract) >> 32));
-  fractSquare = fractSquare << 1;
-
-  /* fractCube = fract * fract * fract */
-  fractCube = ((q31_t) (((q63_t) fractSquare * fract) >> 32));
-  fractCube = fractCube << 1;
-
-  /* Checking min and max index of table */
-  if(index < 0)
-  {
-    index = 0;
-  }
-  else if(index > 256)
-  {
-    index = 256;
-  }
-
-  /* Initialise table pointer */
-  tablePtr = (q31_t *) & cosTableQ31[index];
-
-  /* Cubic interpolation process */
-  /* Calculation of wa */
-  /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAAAAAA)*fract; */
-  wa = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
-  temp = 0x2AAAAAAA;
-  wa = (q31_t) ((((q63_t) wa << 32) + ((q63_t) temp * fract)) >> 32);
-  wa = -(wa << 1u);
-  wa += (fractSquare >> 1u);
-
-  /* Read first nearest value of output from the cos table */
-  a = *tablePtr++;
-
-  /* cosVal = a*wa */
-  cosVal = ((q31_t) (((q63_t) a * wa) >> 32));
-
-  /* q31(1.31) Fixed point value of 1 */
-  temp = 0x7FFFFFFF;
-
-  /* Calculation of wb */
-  wb = ((fractCube >> 1u) - (fractSquare + (fract >> 1u))) + temp;
-  /* Read second nearest value of output from the cos table */
-  b = *tablePtr++;
-
-  /*      cosVal += b*wb */
-  cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) b * (wb))) >> 32);
-
-  /* Calculation of wc */
-  wc = -fractCube + fractSquare;
-  wc = (wc >> 1u) + fract;
-  /* Read third nearest values of output value from the cos table */
-  c = *tablePtr++;
-
-  /*      cosVal += c*wc */
-  cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) c * (wc))) >> 32);
-
-  /* Calculation of wd */
-  /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
-  fractCube = fractCube - fract;
-  wd = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
-  wd = (wd << 1u);
-
-  /* Read fourth nearest value of output from the cos table */
-  d = *tablePtr++;
-
-  /* cosVal += d*wd; */
-  cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) d * (wd))) >> 32);
-
-
-  /* convert cosVal in 2.30 format to 1.31 format */
-  return (__QADD(cosVal, cosVal));
-
-}
-
-/**    
- * @} end of cos group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c
deleted file mode 100644
index bbbdd6c6c9..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c
+++ /dev/null
@@ -1,281 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_f32.c    
-*    
-* Description:	Fast sine calculation for floating-point values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
-/**    
- * @defgroup sin Sine    
- *    
- * Computes the trigonometric sine function using a combination of table lookup   
- * and cubic interpolation.  There are separate functions for   
- * Q15, Q31, and floating-point data types.   
- * The input to the floating-point version is in radians while the   
- * fixed-point Q15 and Q31 have a scaled input with the range   
- * [0 +0.9999] mapping to [0 2*pi), Where range excludes 2*pi.   
- *   
- * The implementation is based on table lookup using 256 values together with cubic interpolation.   
- * The steps used are:   
- *  -# Calculation of the nearest integer table index   
- *  -# Fetch the four table values a, b, c, and d     
- *  -# Compute the fractional portion (fract) of the table index.   
- *  -# Calculation of wa, wb, wc, wd    
- *  -# The final result equals a*wa + b*wb + c*wc + d*wd   
- *   
- * where   
- * 
    
- *    a=Table[index-1];    
- *    b=Table[index+0];    
- *    c=Table[index+1];    
- *    d=Table[index+2];    
- * 
   
- * and   
- * 
    
- *    wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;    
- *    wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;    
- *    wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;    
- *    wd=(1/6)*fract.^3 - (1/6)*fract;    
- * 
    
- */
-
-/**    
- * @addtogroup sin    
- * @{    
- */
-
-
-/**   
- * \par    
- * Example code for Generation of Floating-point Sin Table:   
- * tableSize = 256;    
- * 
for(n = -1; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n+1]=sin(2*pi*n/tableSize);    
- * }
    
- * \par    
- * where pi value is  3.14159265358979    
- */
-
-static const float32_t sinTable[259] = {
-  -0.024541229009628296f, 0.000000000000000000f, 0.024541229009628296f,
-  0.049067676067352295f, 0.073564566671848297f, 0.098017141222953796f,
-  0.122410677373409270f, 0.146730467677116390f,
-  0.170961886644363400f, 0.195090323686599730f, 0.219101235270500180f,
-  0.242980182170867920f, 0.266712754964828490f, 0.290284663438797000f,
-  0.313681751489639280f, 0.336889863014221190f,
-  0.359895050525665280f, 0.382683426141738890f, 0.405241310596466060f,
-  0.427555084228515630f, 0.449611335992813110f, 0.471396744251251220f,
-  0.492898195981979370f, 0.514102756977081300f,
-  0.534997642040252690f, 0.555570244789123540f, 0.575808167457580570f,
-  0.595699310302734380f, 0.615231573581695560f, 0.634393274784088130f,
-  0.653172850608825680f, 0.671558976173400880f,
-  0.689540565013885500f, 0.707106769084930420f, 0.724247097969055180f,
-  0.740951120853424070f, 0.757208824157714840f, 0.773010432720184330f,
-  0.788346409797668460f, 0.803207516670227050f,
-  0.817584812641143800f, 0.831469595432281490f, 0.844853579998016360f,
-  0.857728600502014160f, 0.870086967945098880f, 0.881921291351318360f,
-  0.893224298954010010f, 0.903989315032958980f,
-  0.914209783077239990f, 0.923879504203796390f, 0.932992815971374510f,
-  0.941544055938720700f, 0.949528157711029050f, 0.956940352916717530f,
-  0.963776051998138430f, 0.970031261444091800f,
-  0.975702106952667240f, 0.980785250663757320f, 0.985277652740478520f,
-  0.989176511764526370f, 0.992479562759399410f, 0.995184719562530520f,
-  0.997290432453155520f, 0.998795449733734130f,
-  0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f,
-  0.998795449733734130f, 0.997290432453155520f, 0.995184719562530520f,
-  0.992479562759399410f, 0.989176511764526370f,
-  0.985277652740478520f, 0.980785250663757320f, 0.975702106952667240f,
-  0.970031261444091800f, 0.963776051998138430f, 0.956940352916717530f,
-  0.949528157711029050f, 0.941544055938720700f,
-  0.932992815971374510f, 0.923879504203796390f, 0.914209783077239990f,
-  0.903989315032958980f, 0.893224298954010010f, 0.881921291351318360f,
-  0.870086967945098880f, 0.857728600502014160f,
-  0.844853579998016360f, 0.831469595432281490f, 0.817584812641143800f,
-  0.803207516670227050f, 0.788346409797668460f, 0.773010432720184330f,
-  0.757208824157714840f, 0.740951120853424070f,
-  0.724247097969055180f, 0.707106769084930420f, 0.689540565013885500f,
-  0.671558976173400880f, 0.653172850608825680f, 0.634393274784088130f,
-  0.615231573581695560f, 0.595699310302734380f,
-  0.575808167457580570f, 0.555570244789123540f, 0.534997642040252690f,
-  0.514102756977081300f, 0.492898195981979370f, 0.471396744251251220f,
-  0.449611335992813110f, 0.427555084228515630f,
-  0.405241310596466060f, 0.382683426141738890f, 0.359895050525665280f,
-  0.336889863014221190f, 0.313681751489639280f, 0.290284663438797000f,
-  0.266712754964828490f, 0.242980182170867920f,
-  0.219101235270500180f, 0.195090323686599730f, 0.170961886644363400f,
-  0.146730467677116390f, 0.122410677373409270f, 0.098017141222953796f,
-  0.073564566671848297f, 0.049067676067352295f,
-  0.024541229009628296f, 0.000000000000000122f, -0.024541229009628296f,
-  -0.049067676067352295f, -0.073564566671848297f, -0.098017141222953796f,
-  -0.122410677373409270f, -0.146730467677116390f,
-  -0.170961886644363400f, -0.195090323686599730f, -0.219101235270500180f,
-  -0.242980182170867920f, -0.266712754964828490f, -0.290284663438797000f,
-  -0.313681751489639280f, -0.336889863014221190f,
-  -0.359895050525665280f, -0.382683426141738890f, -0.405241310596466060f,
-  -0.427555084228515630f, -0.449611335992813110f, -0.471396744251251220f,
-  -0.492898195981979370f, -0.514102756977081300f,
-  -0.534997642040252690f, -0.555570244789123540f, -0.575808167457580570f,
-  -0.595699310302734380f, -0.615231573581695560f, -0.634393274784088130f,
-  -0.653172850608825680f, -0.671558976173400880f,
-  -0.689540565013885500f, -0.707106769084930420f, -0.724247097969055180f,
-  -0.740951120853424070f, -0.757208824157714840f, -0.773010432720184330f,
-  -0.788346409797668460f, -0.803207516670227050f,
-  -0.817584812641143800f, -0.831469595432281490f, -0.844853579998016360f,
-  -0.857728600502014160f, -0.870086967945098880f, -0.881921291351318360f,
-  -0.893224298954010010f, -0.903989315032958980f,
-  -0.914209783077239990f, -0.923879504203796390f, -0.932992815971374510f,
-  -0.941544055938720700f, -0.949528157711029050f, -0.956940352916717530f,
-  -0.963776051998138430f, -0.970031261444091800f,
-  -0.975702106952667240f, -0.980785250663757320f, -0.985277652740478520f,
-  -0.989176511764526370f, -0.992479562759399410f, -0.995184719562530520f,
-  -0.997290432453155520f, -0.998795449733734130f,
-  -0.999698817729949950f, -1.000000000000000000f, -0.999698817729949950f,
-  -0.998795449733734130f, -0.997290432453155520f, -0.995184719562530520f,
-  -0.992479562759399410f, -0.989176511764526370f,
-  -0.985277652740478520f, -0.980785250663757320f, -0.975702106952667240f,
-  -0.970031261444091800f, -0.963776051998138430f, -0.956940352916717530f,
-  -0.949528157711029050f, -0.941544055938720700f,
-  -0.932992815971374510f, -0.923879504203796390f, -0.914209783077239990f,
-  -0.903989315032958980f, -0.893224298954010010f, -0.881921291351318360f,
-  -0.870086967945098880f, -0.857728600502014160f,
-  -0.844853579998016360f, -0.831469595432281490f, -0.817584812641143800f,
-  -0.803207516670227050f, -0.788346409797668460f, -0.773010432720184330f,
-  -0.757208824157714840f, -0.740951120853424070f,
-  -0.724247097969055180f, -0.707106769084930420f, -0.689540565013885500f,
-  -0.671558976173400880f, -0.653172850608825680f, -0.634393274784088130f,
-  -0.615231573581695560f, -0.595699310302734380f,
-  -0.575808167457580570f, -0.555570244789123540f, -0.534997642040252690f,
-  -0.514102756977081300f, -0.492898195981979370f, -0.471396744251251220f,
-  -0.449611335992813110f, -0.427555084228515630f,
-  -0.405241310596466060f, -0.382683426141738890f, -0.359895050525665280f,
-  -0.336889863014221190f, -0.313681751489639280f, -0.290284663438797000f,
-  -0.266712754964828490f, -0.242980182170867920f,
-  -0.219101235270500180f, -0.195090323686599730f, -0.170961886644363400f,
-  -0.146730467677116390f, -0.122410677373409270f, -0.098017141222953796f,
-  -0.073564566671848297f, -0.049067676067352295f,
-  -0.024541229009628296f, -0.000000000000000245f, 0.024541229009628296f
-};
-
-
-/**   
- * @brief  Fast approximation to the trigonometric sine function for floating-point data.   
- * @param[in] x input value in radians.   
- * @return  sin(x).   
- */
-
-float32_t arm_sin_f32(
-  float32_t x)
-{
-  float32_t sinVal, fract, in;                   /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variable */
-  uint32_t tableSize = (uint32_t) TABLE_SIZE;    /* Initialise tablesize */
-  float32_t wa, wb, wc, wd;                      /* Cubic interpolation coefficients */
-  float32_t a, b, c, d;                          /* Four nearest output values */
-  float32_t *tablePtr;                           /* Pointer to table */
-  int32_t n;
-  float32_t fractsq, fractby2, fractby6, fractby3, fractsqby2;
-  float32_t oneminusfractby2;
-  float32_t frby2xfrsq, frby6xfrsq;
-
-  /* input x is in radians */
-  /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
-  in = x * 0.159154943092f;
-
-  /* Calculation of floor value of input */
-  n = (int32_t) in;
-
-  /* Make negative values towards -infinity */
-  if(x < 0.0f)
-  {
-    n = n - 1;
-  }
-
-  /* Map input value to [0 1] */
-  in = in - (float32_t) n;
-
-  /* Calculation of index of the table */
-  index = (uint32_t) (tableSize * in);
-
-  /* fractional value calculation */
-  fract = ((float32_t) tableSize * in) - (float32_t) index;
-
-  /* Checking min and max index of table */
-  if(index < 0)
-  {
-    index = 0;
-  }
-  else if(index > 256)
-  {
-    index = 256;
-  }
-
-  /* Initialise table pointer */
-  tablePtr = (float32_t *) & sinTable[index];
-
-  /* Read four nearest values of input value from the sin table */
-  a = tablePtr[0];
-  b = tablePtr[1];
-  c = tablePtr[2];
-  d = tablePtr[3];
-
-  /* Cubic interpolation process */
-  fractsq = fract * fract;
-  fractby2 = fract * 0.5f;
-  fractby6 = fract * 0.166666667f;
-  fractby3 = fract * 0.3333333333333f;
-  fractsqby2 = fractsq * 0.5f;
-  frby2xfrsq = (fractby2) * fractsq;
-  frby6xfrsq = (fractby6) * fractsq;
-  oneminusfractby2 = 1.0f - fractby2;
-  wb = fractsqby2 - fractby3;
-  wc = (fractsqby2 + fract);
-  wa = wb - frby6xfrsq;
-  wb = frby2xfrsq - fractsq;
-  sinVal = wa * a;
-  wc = wc - frby2xfrsq;
-  wd = (frby6xfrsq) - fractby6;
-  wb = wb + oneminusfractby2;
-
-  /* Calculate sin value */
-  sinVal = (sinVal + (b * wb)) + ((c * wc) + (d * wd));
-
-  /* Return the output value */
-  return (sinVal);
-
-}
-
-/**    
- * @} end of sin group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c
deleted file mode 100644
index 5eb35652ca..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_q15.c    
-*    
-* Description:	Fast sine calculation for Q15 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
- /**    
- * @addtogroup sin    
- * @{    
- */
-
-
-/**    
- * \par    
- * Example code for Generation of Q15 Sin Table:   
- * \par    
- * 
tableSize = 256;    
- * for(n = -1; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n+1]=sin(2*pi*n/tableSize);    
- * } 
    
- * where pi value is  3.14159265358979    
- * \par    
- * Convert Floating point to Q15(Fixed point):    
- *	(sinTable[i] * pow(2, 15))    
- * \par    
- * rounding to nearest integer is done    
- * 	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);    
- */
-
-
-static const q15_t sinTableQ15[259] = {
-  0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8,
-  0x15e2, 0x18f9, 0x1c0c, 0x1f1a, 0x2224, 0x2528, 0x2827, 0x2b1f,
-  0x2e11, 0x30fc, 0x33df, 0x36ba, 0x398d, 0x3c57, 0x3f17, 0x41ce,
-  0x447b, 0x471d, 0x49b4, 0x4c40, 0x4ec0, 0x5134, 0x539b, 0x55f6,
-  0x5843, 0x5a82, 0x5cb4, 0x5ed7, 0x60ec, 0x62f2, 0x64e9, 0x66d0,
-  0x68a7, 0x6a6e, 0x6c24, 0x6dca, 0x6f5f, 0x70e3, 0x7255, 0x73b6,
-  0x7505, 0x7642, 0x776c, 0x7885, 0x798a, 0x7a7d, 0x7b5d, 0x7c2a,
-  0x7ce4, 0x7d8a, 0x7e1e, 0x7e9d, 0x7f0a, 0x7f62, 0x7fa7, 0x7fd9,
-  0x7ff6, 0x7fff, 0x7ff6, 0x7fd9, 0x7fa7, 0x7f62, 0x7f0a, 0x7e9d,
-  0x7e1e, 0x7d8a, 0x7ce4, 0x7c2a, 0x7b5d, 0x7a7d, 0x798a, 0x7885,
-  0x776c, 0x7642, 0x7505, 0x73b6, 0x7255, 0x70e3, 0x6f5f, 0x6dca,
-  0x6c24, 0x6a6e, 0x68a7, 0x66d0, 0x64e9, 0x62f2, 0x60ec, 0x5ed7,
-  0x5cb4, 0x5a82, 0x5843, 0x55f6, 0x539b, 0x5134, 0x4ec0, 0x4c40,
-  0x49b4, 0x471d, 0x447b, 0x41ce, 0x3f17, 0x3c57, 0x398d, 0x36ba,
-  0x33df, 0x30fc, 0x2e11, 0x2b1f, 0x2827, 0x2528, 0x2224, 0x1f1a,
-  0x1c0c, 0x18f9, 0x15e2, 0x12c8, 0xfab, 0xc8c, 0x96b, 0x648,
-  0x324, 0x0, 0xfcdc, 0xf9b8, 0xf695, 0xf374, 0xf055, 0xed38,
-  0xea1e, 0xe707, 0xe3f4, 0xe0e6, 0xdddc, 0xdad8, 0xd7d9, 0xd4e1,
-  0xd1ef, 0xcf04, 0xcc21, 0xc946, 0xc673, 0xc3a9, 0xc0e9, 0xbe32,
-  0xbb85, 0xb8e3, 0xb64c, 0xb3c0, 0xb140, 0xaecc, 0xac65, 0xaa0a,
-  0xa7bd, 0xa57e, 0xa34c, 0xa129, 0x9f14, 0x9d0e, 0x9b17, 0x9930,
-  0x9759, 0x9592, 0x93dc, 0x9236, 0x90a1, 0x8f1d, 0x8dab, 0x8c4a,
-  0x8afb, 0x89be, 0x8894, 0x877b, 0x8676, 0x8583, 0x84a3, 0x83d6,
-  0x831c, 0x8276, 0x81e2, 0x8163, 0x80f6, 0x809e, 0x8059, 0x8027,
-  0x800a, 0x8000, 0x800a, 0x8027, 0x8059, 0x809e, 0x80f6, 0x8163,
-  0x81e2, 0x8276, 0x831c, 0x83d6, 0x84a3, 0x8583, 0x8676, 0x877b,
-  0x8894, 0x89be, 0x8afb, 0x8c4a, 0x8dab, 0x8f1d, 0x90a1, 0x9236,
-  0x93dc, 0x9592, 0x9759, 0x9930, 0x9b17, 0x9d0e, 0x9f14, 0xa129,
-  0xa34c, 0xa57e, 0xa7bd, 0xaa0a, 0xac65, 0xaecc, 0xb140, 0xb3c0,
-  0xb64c, 0xb8e3, 0xbb85, 0xbe32, 0xc0e9, 0xc3a9, 0xc673, 0xc946,
-  0xcc21, 0xcf04, 0xd1ef, 0xd4e1, 0xd7d9, 0xdad8, 0xdddc, 0xe0e6,
-  0xe3f4, 0xe707, 0xea1e, 0xed38, 0xf055, 0xf374, 0xf695, 0xf9b8,
-  0xfcdc, 0x0, 0x324
-};
-
-
-/**   
- * @brief Fast approximation to the trigonometric sine function for Q15 data.   
- * @param[in] x Scaled input value in radians.   
- * @return  sin(x).   
- *   
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi.   
- */
-
-q15_t arm_sin_q15(
-  q15_t x)
-{
-  q31_t sinVal;                                  /* Temporary variables output */
-  q15_t *tablePtr;                               /* Pointer to table */
-  q15_t fract, in, in2;                          /* Temporary variables for input, output */
-  q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
-  q15_t a, b, c, d;                              /* Four nearest output values */
-  q15_t fractCube, fractSquare;                  /* Temporary values for fractional value */
-  q15_t oneBy6 = 0x1555;                         /* Fixed point value of 1/6 */
-  q15_t tableSpacing = TABLE_SPACING_Q15;        /* Table spacing */
-  int32_t index;                                 /* Index variable */
-
-  in = x;
-
-  /* Calculate the nearest index */
-  index = (int32_t) in / tableSpacing;
-
-  /* Calculate the nearest value of input */
-  in2 = (q15_t) ((index) * tableSpacing);
-
-  /* Calculation of fractional value */
-  fract = (in - in2) << 8;
-
-  /* fractSquare = fract * fract */
-  fractSquare = (q15_t) ((fract * fract) >> 15);
-
-  /* fractCube = fract * fract * fract */
-  fractCube = (q15_t) ((fractSquare * fract) >> 15);
-
-  /* Checking min and max index of table */
-  if(index < 0)
-  {
-    index = 0;
-  }
-  else if(index > 256)
-  {
-    index = 256;
-  }
-
-  /* Initialise table pointer */
-  tablePtr = (q15_t *) & sinTableQ15[index];
-
-  /* Cubic interpolation process */
-  /* Calculation of wa */
-  /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAA)*fract; */
-  wa = (q31_t) oneBy6 *fractCube;
-  wa += (q31_t) 0x2AAA *fract;
-  wa = -(wa >> 15);
-  wa += ((q31_t) fractSquare >> 1u);
-
-  /* Read first nearest value of output from the sin table */
-  a = *tablePtr++;
-
-  /* sinVal = a * wa */
-  sinVal = a * wa;
-
-  /* Calculation of wb */
-  wb = (((q31_t) fractCube >> 1u) - (q31_t) fractSquare) -
-    (((q31_t) fract >> 1u) - 0x7FFF);
-
-  /* Read second nearest value of output from the sin table */
-  b = *tablePtr++;
-
-  /*      sinVal += b*wb */
-  sinVal += b * wb;
-
-
-  /* Calculation of wc */
-  wc = -(q31_t) fractCube + fractSquare;
-  wc = (wc >> 1u) + fract;
-
-  /* Read third nearest value of output from the sin table */
-  c = *tablePtr++;
-
-  /* sinVal += c*wc */
-  sinVal += c * wc;
-
-  /* Calculation of wd */
-  /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
-  fractCube = fractCube - fract;
-  wd = ((q15_t) (((q31_t) oneBy6 * fractCube) >> 15));
-
-  /* Read fourth nearest value of output from the sin table */
-  d = *tablePtr++;
-
-  /* sinVal += d*wd; */
-  sinVal += d * wd;
-
-  /* Convert output value in 1.15(q15) format and saturate */
-  sinVal = __SSAT((sinVal >> 15), 16);
-
-  /* Return the output value in 1.15(q15) format */
-  return ((q15_t) sinVal);
-
-}
-
-/**    
- * @} end of sin group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c
deleted file mode 100644
index cf540e24f0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_q31.c    
-*    
-* Description:	Fast sine calculation for Q31 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
- /**    
- * @addtogroup sin    
- * @{    
- */
-
-/**   
- * \par    
- * Tables generated are in Q31(1.31 Fixed point format)    
- * Generation of sin values in floating point:    
- * 
tableSize = 256;      
- * for(n = -1; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n+1]= sin(2*pi*n/tableSize);    
- * } 
    
- * where pi value is  3.14159265358979    
- * \par    
- * Convert Floating point to Q31(Fixed point):    
- *	(sinTable[i] * pow(2, 31))    
- * \par    
- * rounding to nearest integer is done    
- * 	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);    
- */
-
-static const q31_t sinTableQ31[259] = {
-  0xfcdbd541, 0x0, 0x3242abf, 0x647d97c, 0x96a9049, 0xc8bd35e, 0xfab272b,
-  0x12c8106f,
-  0x15e21445, 0x18f8b83c, 0x1c0b826a, 0x1f19f97b, 0x2223a4c5, 0x25280c5e,
-  0x2826b928, 0x2b1f34eb,
-  0x2e110a62, 0x30fbc54d, 0x33def287, 0x36ba2014, 0x398cdd32, 0x3c56ba70,
-  0x3f1749b8, 0x41ce1e65,
-  0x447acd50, 0x471cece7, 0x49b41533, 0x4c3fdff4, 0x4ebfe8a5, 0x5133cc94,
-  0x539b2af0, 0x55f5a4d2,
-  0x5842dd54, 0x5a82799a, 0x5cb420e0, 0x5ed77c8a, 0x60ec3830, 0x62f201ac,
-  0x64e88926, 0x66cf8120,
-  0x68a69e81, 0x6a6d98a4, 0x6c242960, 0x6dca0d14, 0x6f5f02b2, 0x70e2cbc6,
-  0x72552c85, 0x73b5ebd1,
-  0x7504d345, 0x7641af3d, 0x776c4edb, 0x78848414, 0x798a23b1, 0x7a7d055b,
-  0x7b5d039e, 0x7c29fbee,
-  0x7ce3ceb2, 0x7d8a5f40, 0x7e1d93ea, 0x7e9d55fc, 0x7f0991c4, 0x7f62368f,
-  0x7fa736b4, 0x7fd8878e,
-  0x7ff62182, 0x7fffffff, 0x7ff62182, 0x7fd8878e, 0x7fa736b4, 0x7f62368f,
-  0x7f0991c4, 0x7e9d55fc,
-  0x7e1d93ea, 0x7d8a5f40, 0x7ce3ceb2, 0x7c29fbee, 0x7b5d039e, 0x7a7d055b,
-  0x798a23b1, 0x78848414,
-  0x776c4edb, 0x7641af3d, 0x7504d345, 0x73b5ebd1, 0x72552c85, 0x70e2cbc6,
-  0x6f5f02b2, 0x6dca0d14,
-  0x6c242960, 0x6a6d98a4, 0x68a69e81, 0x66cf8120, 0x64e88926, 0x62f201ac,
-  0x60ec3830, 0x5ed77c8a,
-  0x5cb420e0, 0x5a82799a, 0x5842dd54, 0x55f5a4d2, 0x539b2af0, 0x5133cc94,
-  0x4ebfe8a5, 0x4c3fdff4,
-  0x49b41533, 0x471cece7, 0x447acd50, 0x41ce1e65, 0x3f1749b8, 0x3c56ba70,
-  0x398cdd32, 0x36ba2014,
-  0x33def287, 0x30fbc54d, 0x2e110a62, 0x2b1f34eb, 0x2826b928, 0x25280c5e,
-  0x2223a4c5, 0x1f19f97b,
-  0x1c0b826a, 0x18f8b83c, 0x15e21445, 0x12c8106f, 0xfab272b, 0xc8bd35e,
-  0x96a9049, 0x647d97c,
-  0x3242abf, 0x0, 0xfcdbd541, 0xf9b82684, 0xf6956fb7, 0xf3742ca2, 0xf054d8d5,
-  0xed37ef91,
-  0xea1debbb, 0xe70747c4, 0xe3f47d96, 0xe0e60685, 0xdddc5b3b, 0xdad7f3a2,
-  0xd7d946d8, 0xd4e0cb15,
-  0xd1eef59e, 0xcf043ab3, 0xcc210d79, 0xc945dfec, 0xc67322ce, 0xc3a94590,
-  0xc0e8b648, 0xbe31e19b,
-  0xbb8532b0, 0xb8e31319, 0xb64beacd, 0xb3c0200c, 0xb140175b, 0xaecc336c,
-  0xac64d510, 0xaa0a5b2e,
-  0xa7bd22ac, 0xa57d8666, 0xa34bdf20, 0xa1288376, 0x9f13c7d0, 0x9d0dfe54,
-  0x9b1776da, 0x99307ee0,
-  0x9759617f, 0x9592675c, 0x93dbd6a0, 0x9235f2ec, 0x90a0fd4e, 0x8f1d343a,
-  0x8daad37b, 0x8c4a142f,
-  0x8afb2cbb, 0x89be50c3, 0x8893b125, 0x877b7bec, 0x8675dc4f, 0x8582faa5,
-  0x84a2fc62, 0x83d60412,
-  0x831c314e, 0x8275a0c0, 0x81e26c16, 0x8162aa04, 0x80f66e3c, 0x809dc971,
-  0x8058c94c, 0x80277872,
-  0x8009de7e, 0x80000000, 0x8009de7e, 0x80277872, 0x8058c94c, 0x809dc971,
-  0x80f66e3c, 0x8162aa04,
-  0x81e26c16, 0x8275a0c0, 0x831c314e, 0x83d60412, 0x84a2fc62, 0x8582faa5,
-  0x8675dc4f, 0x877b7bec,
-  0x8893b125, 0x89be50c3, 0x8afb2cbb, 0x8c4a142f, 0x8daad37b, 0x8f1d343a,
-  0x90a0fd4e, 0x9235f2ec,
-  0x93dbd6a0, 0x9592675c, 0x9759617f, 0x99307ee0, 0x9b1776da, 0x9d0dfe54,
-  0x9f13c7d0, 0xa1288376,
-  0xa34bdf20, 0xa57d8666, 0xa7bd22ac, 0xaa0a5b2e, 0xac64d510, 0xaecc336c,
-  0xb140175b, 0xb3c0200c,
-  0xb64beacd, 0xb8e31319, 0xbb8532b0, 0xbe31e19b, 0xc0e8b648, 0xc3a94590,
-  0xc67322ce, 0xc945dfec,
-  0xcc210d79, 0xcf043ab3, 0xd1eef59e, 0xd4e0cb15, 0xd7d946d8, 0xdad7f3a2,
-  0xdddc5b3b, 0xe0e60685,
-  0xe3f47d96, 0xe70747c4, 0xea1debbb, 0xed37ef91, 0xf054d8d5, 0xf3742ca2,
-  0xf6956fb7, 0xf9b82684,
-  0xfcdbd541, 0x0, 0x3242abf
-};
-
-
-/**   
- * @brief Fast approximation to the trigonometric sine function for Q31 data.   
- * @param[in] x Scaled input value in radians.   
- * @return  sin(x).   
- *   
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi.   
- */
-
-q31_t arm_sin_q31(
-  q31_t x)
-{
-  q31_t sinVal, in, in2;                         /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
-  q31_t a, b, c, d;                              /* Four nearest output values */
-  q31_t *tablePtr;                               /* Pointer to table */
-  q31_t fract, fractCube, fractSquare;           /* Temporary values for fractional values */
-  q31_t oneBy6 = 0x15555555;                     /* Fixed point value of 1/6 */
-  q31_t tableSpacing = TABLE_SPACING_Q31;        /* Table spacing */
-  q31_t temp;                                    /* Temporary variable for intermediate process */
-
-  in = x;
-
-  /* Calculate the nearest index */
-  index = (uint32_t) in / (uint32_t) tableSpacing;
-
-  /* Calculate the nearest value of input */
-  in2 = (q31_t) index *tableSpacing;
-
-  /* Calculation of fractional value */
-  fract = (in - in2) << 8;
-
-  /* fractSquare = fract * fract */
-  fractSquare = ((q31_t) (((q63_t) fract * fract) >> 32));
-  fractSquare = fractSquare << 1;
-
-  /* fractCube = fract * fract * fract */
-  fractCube = ((q31_t) (((q63_t) fractSquare * fract) >> 32));
-  fractCube = fractCube << 1;
-
-  /* Checking min and max index of table */
-  if(index < 0)
-  {
-    index = 0;
-  }
-  else if(index > 256)
-  {
-    index = 256;
-  }
-
-  /* Initialise table pointer */
-  tablePtr = (q31_t *) & sinTableQ31[index];
-
-  /* Cubic interpolation process */
-  /* Calculation of wa */
-  /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAAAAAA)*fract; */
-  wa = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
-  temp = 0x2AAAAAAA;
-  wa = (q31_t) ((((q63_t) wa << 32) + ((q63_t) temp * fract)) >> 32);
-  wa = -(wa << 1u);
-  wa += (fractSquare >> 1u);
-
-  /* Read first nearest value of output from the sin table */
-  a = *tablePtr++;
-
-  /* sinVal = a*wa */
-  sinVal = ((q31_t) (((q63_t) a * wa) >> 32));
-
-  /* q31(1.31) Fixed point value of 1 */
-  temp = 0x7FFFFFFF;
-
-  /* Calculation of wb */
-  wb = ((fractCube >> 1u) - (fractSquare + (fract >> 1u))) + temp;
-
-  /* Read second nearest value of output from the sin table */
-  b = *tablePtr++;
-
-  /*  sinVal += b*wb */
-  sinVal = (q31_t) ((((q63_t) sinVal << 32) + (q63_t) b * (wb)) >> 32);
-
-  /* Calculation of wc */
-  wc = -fractCube + fractSquare;
-  wc = (wc >> 1u) + fract;
-
-  /* Read third nearest value of output from the sin table */
-  c = *tablePtr++;
-
-  /*      sinVal += c*wc */
-  sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) c * wc)) >> 32);
-
-  /* Calculation of wd */
-  /* wd = (oneBy6) * fractCube - (oneBy6) * fract; */
-  fractCube = fractCube - fract;
-  wd = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
-  wd = (wd << 1u);
-
-  /* Read fourth nearest value of output from the sin table */
-  d = *tablePtr++;
-
-  /* sinVal += d*wd; */
-  sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) d * wd)) >> 32);
-
-  /* convert sinVal in 2.30 format to 1.31 format */
-  return (__QADD(sinVal, sinVal));
-
-}
-
-/**    
- * @} end of sin group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c
deleted file mode 100644
index 32eee32522..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/* ----------------------------------------------------------------------     
-* Copyright (C) 2011 ARM Limited. All rights reserved.  
-*     
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*     
-* Project:      CMSIS DSP Library  
-* Title:		arm_sqrt_q15.c     
-*     
-* Description:	Q15 square root function.    
-*     
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.0 2011/03/08 
-*     Alpha release. 
-* 
-* Version 1.0.1 2011/09/30 
-*     Beta release.  
-*     
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-
-/**     
- * @ingroup groupFastMath     
- */
-
-/**     
- * @addtogroup SQRT     
- * @{     
- */
-
-  /**    
-   * @brief  Q15 square root function.    
-   * @param[in]   in     input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.    
-   * @param[out]  *pOut  square root of input value.    
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if    
-   * in is negative value and returns zero output for negative values.    
-   */
-
-arm_status arm_sqrt_q15(
-  q15_t in,
-  q15_t * pOut)
-{
-  q15_t number, temp1, var1, signBits1, half;
-  q31_t bits_val1;
-  float32_t temp_float1;
-
-  number = in;
-
-  /* If the input is a positive number then compute the signBits. */
-  if(number > 0)
-  {
-    signBits1 = __CLZ(number) - 17;
-
-    /* Shift by the number of signBits1 */
-    if((signBits1 % 2) == 0)
-    {
-      number = number << signBits1;
-    }
-    else
-    {
-      number = number << (signBits1 - 1);
-    }
-
-    /* Calculate half value of the number */
-    half = number >> 1;
-    /* Store the number for later use */
-    temp1 = number;
-
-    /*Convert to float */
-    temp_float1 = number * 3.051757812500000e-005f;
-    /*Store as integer */
-    bits_val1 = *(int *) &temp_float1;
-    /* Subtract the shifted value from the magic number to give intial guess */
-    bits_val1 = 0x5f3759df - (bits_val1 >> 1);  // gives initial guess  
-    /* Store as float */
-    temp_float1 = *(float *) &bits_val1;
-    /* Convert to integer format */
-    var1 = (q31_t) (temp_float1 * 16384);
-
-    /* 1st iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-    /* 2nd iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-    /* 3rd iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-
-    /* Multiply the inverse square root with the original value */
-    var1 = ((q15_t) (((q31_t) temp1 * var1) >> 15)) << 1;
-
-    /* Shift the output down accordingly */
-    if((signBits1 % 2) == 0)
-    {
-      var1 = var1 >> (signBits1 / 2);
-    }
-    else
-    {
-      var1 = var1 >> ((signBits1 - 1) / 2);
-    }
-    *pOut = var1;
-
-    return (ARM_MATH_SUCCESS);
-  }
-  /* If the number is a negative number then store zero as its square root value */
-  else
-  {
-    *pOut = 0;
-    return (ARM_MATH_ARGUMENT_ERROR);
-  }
-}
-
-/**     
- * @} end of SQRT group     
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c
deleted file mode 100644
index 65de4b3d16..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/* ----------------------------------------------------------------------     
-* Copyright (C) 2011 ARM Limited. All rights reserved.  
-*     
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*     
-* Project:      CMSIS DSP Library  
-* Title:		arm_sqrt_q31.c     
-*     
-* Description:	Q31 square root function.    
-*     
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.0 2011/03/08 
-*     Alpha release. 
-* 
-* Version 1.0.1 2011/09/30 
-*     Beta release.  
-*     
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**     
- * @ingroup groupFastMath     
- */
-
-/**     
- * @addtogroup SQRT     
- * @{     
- */
-
-/**    
- * @brief Q31 square root function.    
- * @param[in]   in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.    
- * @param[out]  *pOut square root of input value.    
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if    
- * in is negative value and returns zero output for negative values.    
- */
-
-arm_status arm_sqrt_q31(
-  q31_t in,
-  q31_t * pOut)
-{
-  q31_t number, temp1, bits_val1, var1, signBits1, half;
-  float32_t temp_float1;
-
-  number = in;
-
-  /* If the input is a positive number then compute the signBits. */
-  if(number > 0)
-  {
-    signBits1 = __CLZ(number) - 1;
-
-    /* Shift by the number of signBits1 */
-    if((signBits1 % 2) == 0)
-    {
-      number = number << signBits1;
-    }
-    else
-    {
-      number = number << (signBits1 - 1);
-    }
-
-    /* Calculate half value of the number */
-    half = number >> 1;
-    /* Store the number for later use */
-    temp1 = number;
-
-    /*Convert to float */
-    temp_float1 = number * 4.6566128731e-010f;
-    /*Store as integer */
-    bits_val1 = *(int *) &temp_float1;
-    /* Subtract the shifted value from the magic number to give intial guess */
-    bits_val1 = 0x5f3759df - (bits_val1 >> 1);  // gives initial guess  
-    /* Store as float */
-    temp_float1 = *(float *) &bits_val1;
-    /* Convert to integer format */
-    var1 = (q31_t) (temp_float1 * 1073741824);
-
-    /* 1st iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-    /* 2nd iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-    /* 3rd iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-
-    /* Multiply the inverse square root with the original value */
-    var1 = ((q31_t) (((q63_t) temp1 * var1) >> 31)) << 1;
-
-    /* Shift the output down accordingly */
-    if((signBits1 % 2) == 0)
-    {
-      var1 = var1 >> (signBits1 / 2);
-    }
-    else
-    {
-      var1 = var1 >> ((signBits1 - 1) / 2);
-    }
-    *pOut = var1;
-
-    return (ARM_MATH_SUCCESS);
-  }
-  /* If the number is a negative number then store zero as its square root value */
-  else
-  {
-    *pOut = 0;
-    return (ARM_MATH_ARGUMENT_ERROR);
-  }
-}
-
-/**     
- * @} end of SQRT group     
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
deleted file mode 100644
index 4ca7111b39..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_32x64_init_q31.c    
-*    
-* Description:	High precision Q31 Biquad cascade filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1_32x64    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S           	points to an instance of the high precision Q31 Biquad cascade filter structure.    
- * @param[in]     numStages     number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs      points to the filter coefficients.    
- * @param[in]     *pState       points to the state buffer.    
- * @param[in]     postShift     Shift to be applied after the accumulator.  Varies according to the coefficients format.    
- * @return        none    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState points to state variables array and size of each state variable is 1.63 format.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the state array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cas_df1_32x64_init_q31(
-  arm_biquad_cas_df1_32x64_ins_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q63_t * pState,
-  uint8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q63_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1_32x64 group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
deleted file mode 100644
index 607f7f5074..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
+++ /dev/null
@@ -1,553 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_32x64_q31.c    
-*    
-* Description:	High precision Q31 Biquad cascade filter processing function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter    
- *    
- * This function implements a high precision Biquad cascade filter which operates on    
- * Q31 data values.  The filter coefficients are in 1.31 format and the state variables    
- * are in 1.63 format.  The double precision state variables reduce quantization noise    
- * in the filter and provide a cleaner output.    
- * These filters are particularly useful when implementing filters in which the    
- * singularities are close to the unit circle.  This is common for low pass or high    
- * pass filters with very low cutoff frequencies.    
- *    
- * The function operates on blocks of input and output data    
- * and each call to the function processes blockSize samples through    
- * the filter. pSrc and pDst points to input and output arrays    
- * containing blockSize Q31 values.    
- *    
- * \par Algorithm    
- * Each Biquad stage implements a second order filter using the difference equation:    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
- * 
    
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.    
- * \image html Biquad.gif "Single Biquad filter stage"    
- * Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.    
- * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.    
- * Pay careful attention to the sign of the feedback coefficients.    
- * Some design tools use the difference equation    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
- * 
    
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.    
- *    
- * \par    
- * Higher order filters are realized as a cascade of second order sections.    
- * numStages refers to the number of second order stages used.    
- * For example, an 8th order filter would be realized with numStages=4 second order stages.    
- * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"    
- * A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).    
- *    
- * \par    
- * The pState points to state variables array .    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2] and each state variable in 1.63 format to improve precision.    
- * The state variables are arranged in the array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- *    
- * \par    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values of data in 1.63 format.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- *    
- * \par Init Function    
- * There is also an associated initialization function which performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * For example, to statically initialize the filter instance structure use    
- * 
    
- *     arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};    
- * 
    
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer; postShift shift to be applied which is described in detail below.    
- * \par Fixed-Point Behavior    
- * Care must be taken while using Biquad Cascade 32x64 filter function.    
- * Following issues must be considered:    
- * - Scaling of coefficients    
- * - Filter gain    
- * - Overflow and saturation    
- *    
- * \par    
- * Filter coefficients are represented as fractional values and    
- * restricted to lie in the range [-1 +1).    
- * The processing function has an additional scaling parameter postShift    
- * which allows the filter coefficients to exceed the range [+1 -1).    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"    
- * This essentially scales the filter coefficients by 2^postShift.    
- * For example, to realize the coefficients    
- * 
    
- *    {1.5, -0.8, 1.2, 1.6, -0.9}    
- * 
    
- * set the Coefficient array to:    
- * 
    
- *    {0.75, -0.4, 0.6, 0.8, -0.45}    
- * 
    
- * and set postShift=1    
- *    
- * \par    
- * The second thing to keep in mind is the gain through the filter.    
- * The frequency response of a Biquad filter is a function of its coefficients.    
- * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.    
- * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.    
- * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.    
- *    
- * \par    
- * The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.    
- * This is described in the function specific documentation below.    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1_32x64    
- * @{    
- */
-
-/**    
- * @details    
-    
- * @param[in]  *S points to an instance of the high precision Q31 Biquad cascade filter.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in]  blockSize number of samples to process.    
- * @return none.    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).    
- * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to    
- * 1.31 format by discarding the low 32 bits.    
- *    
- * \par    
- * Two related functions are provided in the CMSIS DSP library.    
- * arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.    
- * arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.    
- */
-
-void arm_biquad_cas_df1_32x64_q31(
-  const arm_biquad_cas_df1_32x64_ins_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q63_t *pState = S->pState;                     /*  state pointer initialization  */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q63_t acc;                                     /*  accumulator                   */
-  q31_t Xn1, Xn2;                                /*  Input Filter state variables        */
-  q63_t Yn1, Yn2;                                /*  Output Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t Xn;                                      /*  temporary input               */
-  int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-  q31_t acc_l, acc_h;                            /*  temporary output               */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = (q31_t) (pState[0]);
-    Xn2 = (q31_t) (pState[1]);
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /* The variable acc hold output value that is being computed and    
-     * stored in the destination buffer    
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling. Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* The result is converted to 1.63 , Yn2 variable is reused */
-      Yn2 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut = acc_h;
-
-      /* Read the second input into Xn2, to reuse the value */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc +=  b1 * x[n-1] */
-      acc = (q63_t) Xn *b1;
-
-      /* acc =  b0 * x[n] */
-      acc += (q63_t) Xn2 *b0;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn1 *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn2, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn1, a2);
-
-      /* The result is converted to 1.63, Yn1 variable is reused */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Read the third input into Xn1, to reuse the value */
-      Xn1 = *pIn++;
-
-      /* The result is converted to 1.31 */
-      /* Store the output in the destination buffer. */
-      *(pOut + 1u) = acc_h;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn1 *b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn2 *b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* The result is converted to 1.63, Yn2 variable is reused  */
-      Yn2 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *(pOut + 2u) = acc_h;
-
-      /* Read the fourth input into Xn, to reuse the value */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn2, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn1, a2);
-
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *(pOut + 3u) = acc_h;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* update output pointer */
-      pOut += 4u;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3u);
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut++ = acc_h;
-      //Yn1 = acc << shift; 
-
-      /* Store the output in the destination buffer in 1.31 format. */
-//      *pOut++ = (q31_t) (acc >> (32 - shift)); 
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage output is given as input to the second stage. */
-    pIn = pDst;
-
-    /* Reset to destination buffer working pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = (q63_t) Xn1;
-    *pState++ = (q63_t) Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* The variable acc hold output value that is being computed and        
-     * stored in the destination buffer            
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]            
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut++ = acc_h;
-
-      //Yn1 = acc << shift; 
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      //*pOut++ = (q31_t) (acc >> (32 - shift)); 
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage output is given as input to the second stage. */
-    pIn = pDst;
-
-    /* Reset to destination buffer working pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = (q63_t) Xn1;
-    *pState++ = (q63_t) Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#endif /*    #ifndef ARM_MATH_CM0     */
-}
-
-  /**    
-   * @} end of BiquadCascadeDF1_32x64 group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
deleted file mode 100644
index 4ea80e1615..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
+++ /dev/null
@@ -1,421 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_f32.c    
-*    
-* Description:	Processing function for the    
-*               floating-point Biquad cascade DirectFormI(DF1) filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure    
- *    
- * This set of functions implements arbitrary order recursive (IIR) filters.    
- * The filters are implemented as a cascade of second order Biquad sections.    
- * The functions support Q15, Q31 and floating-point data types.  
- * Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3.    
- *    
- * The functions operate on blocks of input and output data and each call to the function    
- * processes blockSize samples through the filter.    
- * pSrc points to the array of input data and    
- * pDst points to the array of output data.    
- * Both arrays contain blockSize values.    
- *    
- * \par Algorithm    
- * Each Biquad stage implements a second order filter using the difference equation:    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
- * 
    
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.    
- * \image html Biquad.gif "Single Biquad filter stage"    
- * Coefficients b0, b1 and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.    
- * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.    
- * Pay careful attention to the sign of the feedback coefficients.    
- * Some design tools use the difference equation    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
- * 
    
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.    
- *    
- * \par    
- * Higher order filters are realized as a cascade of second order sections.    
- * numStages refers to the number of second order stages used.    
- * For example, an 8th order filter would be realized with numStages=4 second order stages.    
- * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"    
- * A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).    
- *    
- * \par    
- * The pState points to state variables array.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- *    
- * \par    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed, the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Init Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- *     arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};    
- *     arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};    
- *     arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};    
- * 
    
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer; postShift shift to be applied.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.    
- * Following issues must be considered:    
- * - Scaling of coefficients    
- * - Filter gain    
- * - Overflow and saturation    
- *    
- * \par    
- * Scaling of coefficients:     
- * Filter coefficients are represented as fractional values and    
- * coefficients are restricted to lie in the range [-1 +1).    
- * The fixed-point functions have an additional scaling parameter postShift    
- * which allow the filter coefficients to exceed the range [+1 -1).    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"    
- * This essentially scales the filter coefficients by 2^postShift.    
- * For example, to realize the coefficients    
- * 
    
- *    {1.5, -0.8, 1.2, 1.6, -0.9}    
- * 
    
- * set the pCoeffs array to:    
- * 
    
- *    {0.75, -0.4, 0.6, 0.8, -0.45}    
- * 
    
- * and set postShift=1    
- *    
- * \par    
- * Filter gain:     
- * The frequency response of a Biquad filter is a function of its coefficients.    
- * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.    
- * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.    
- * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.    
- *    
- * \par    
- * Overflow and saturation:     
- * For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @param[in]  *S         points to an instance of the floating-point Biquad cascade structure.    
- * @param[in]  *pSrc      points to the block of input data.    
- * @param[out] *pDst      points to the block of output data.    
- * @param[in]  blockSize  number of samples to process per call.    
- * @return     none.    
- *    
- */
-
-void arm_biquad_cascade_df1_f32(
-  const arm_biquad_casd_df1_inst_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /*  source pointer            */
-  float32_t *pOut = pDst;                        /*  destination pointer       */
-  float32_t *pState = S->pState;                 /*  pState pointer            */
-  float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-  float32_t acc;                                 /*  Simulates the accumulator */
-  float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-  float32_t Xn1, Xn2, Yn1, Yn2;                  /*  Filter pState variables   */
-  float32_t Xn;                                  /*  temporary input           */
-  uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the pState values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:    
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the first input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-
-      /* Read the second input */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-
-      /* Read the third input */
-      Xn1 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-
-      /* Read the forth input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    sample = blockSize & 0x3u;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:    */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* decrement the loop counter */
-      sample--;
-
-    }
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent numStages  occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the pState values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:        
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]        
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:    */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent numStages  occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#endif /*   #ifndef ARM_MATH_CM0         */
-
-}
-
-
-  /**    
-   * @} end of BiquadCascadeDF1 group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
deleted file mode 100644
index 3d9b5f64aa..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
+++ /dev/null
@@ -1,283 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_fast_q15.c    
-*    
-* Description:	Fast processing function for the    
-*				Q15 Biquad cascade filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.9  2010/08/16     
-*    Initial version    
-*    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in]  blockSize number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around and distorts the result.    
- * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).    
- * The 2.30 accumulator is then shifted by postShift bits and the result truncated to 1.15 format by discarding the low 16 bits.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_biquad_cascade_df1_init_q15() to initialize the filter structure.    
- *    
- */
-
-void arm_biquad_cascade_df1_fast_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q31_t in;                                      /*  Temporary variable to hold input value       */
-  q31_t out;                                     /*  Temporary variable to hold output value      */
-  q31_t b0;                                      /*  Temporary variable to hold bo value          */
-  q31_t b1, a1;                                  /*  Filter coefficients                          */
-  q31_t state_in, state_out;                     /*  Filter state variables                       */
-  q31_t acc;                                     /*  Accumulator                                  */
-  int32_t shift = (int32_t) (15 - S->postShift); /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = S->numStages;         /*  Stage loop counter                           */
-
-
-
-  do
-  {
-
-    /* Read the b0 and 0 coefficients using SIMD  */
-    b0 = *__SIMD32(pCoeffs)++;
-
-    /* Read the b1 and b2 coefficients using SIMD */
-    b1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the a1 and a2 coefficients using SIMD */
-    a1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
-    state_in = *__SIMD32(pState)++;
-
-    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
-    state_out = *__SIMD32(pState)--;
-
-    /* Apply loop unrolling and compute 2 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:       
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]       
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]       
-     */
-    sample = blockSize >> 1u;
-
-    /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.    
-     ** a second loop below computes the remaining 1 sample. */
-    while(sample > 0u)
-    {
-
-      /* Read the input */
-      in = *__SIMD32(pIn)++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUAD(b0, in);
-      /* acc =  b1 * x[n-1] + acc +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
-      state_out = __PKHBT(state_out >> 16, (out), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUADX(b0, in);
-      /* acc0 =  b1 * x[n-1] , acc0 +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-
-      /* Store the output in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
-
-#else
-
-      *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in >> 16, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-
-      /* Decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 2, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-
-    if((blockSize & 0x1u) != 0u)
-    {
-      /* Read the input */
-      in = *pIn++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      out = __SMUAD(b0, in);
-
-#else
-
-      out = __SMUADX(b0, in);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* acc =  b1 * x[n-1], acc +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) out;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer.  */
-    /*  Subsequent (numStages - 1) occur in-place in the output buffer  */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the state array */
-    *__SIMD32(pState)++ = state_in;
-    *__SIMD32(pState)++ = state_out;
-
-
-    /* Decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-}
-
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
deleted file mode 100644
index 62f02502c1..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
+++ /dev/null
@@ -1,275 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_fast_q31.c    
-*    
-* Description:	Processing function for the    
-*				Q31 Fast Biquad cascade DirectFormI(DF1) filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.9  2010/08/27     
-*    Initial version    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in]  *S        points to an instance of the Q31 Biquad cascade structure.    
- * @param[in]  *pSrc     points to the block of input data.    
- * @param[out] *pDst     points to the block of output data.    
- * @param[in]  blockSize number of samples to process per call.    
- * @return 	   none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are added to a 2.30 accumulator.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function    
- * arm_biquad_cascade_df1_init_q31() to initialize filter structure.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_biquad_cascade_df1_init_q31() to initialize the filter structure.    
- */
-
-void arm_biquad_cascade_df1_fast_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t acc;                                     /*  accumulator                   */
-  q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q31_t *pState = S->pState;                     /*  pState pointer initialization */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q31_t Xn;                                      /*  temporary input               */
-  int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variables acc ... acc3 hold output values that are being computed:       
-     *       
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]       
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);
-      /* acc +=  b1 * x[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);
-      /* acc +=  b[2] * x[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
-      /* acc +=  a1 * y[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
-      /* acc +=  a2 * y[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
-
-      /* The result is converted to 1.31 , Yn2 variable is reused */
-      Yn2 = acc << shift;
-
-      /* Read the second input */
-      Xn2 = *(pIn + 1u);
-
-      /* Store the output in the destination buffer. */
-      *pOut = Yn2;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);
-      /* acc +=  b1 * x[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);
-      /* acc +=  b[2] * x[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);
-      /* acc +=  a1 * y[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
-      /* acc +=  a2 * y[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Read the third input  */
-      Xn1 = *(pIn + 2u);
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 1u) = Yn1;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);
-      /* acc +=  b1 * x[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);
-      /* acc +=  b[2] * x[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);
-      /* acc +=  a1 * y[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
-      /* acc +=  a2 * y[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
-
-      /* The result is converted to 1.31, Yn2 variable is reused  */
-      Yn2 = acc << shift;
-
-      /* Read the forth input */
-      Xn = *(pIn + 3u);
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 2u) = Yn2;
-      pIn += 4u;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
-      /* acc +=  b1 * x[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
-      /* acc +=  b[2] * x[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
-      /* acc +=  a1 * y[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
-      /* acc +=  a2 * y[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      Xn2 = Xn1;
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Xn1 = Xn     */
-      Xn1 = Xn;
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 3u) = Yn1;
-      pOut += 4u;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.       
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3u);
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
-      /* acc +=  b1 * x[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
-      /* acc +=  b[2] * x[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
-      /* acc +=  a1 * y[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
-      /* acc +=  a2 * y[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
-      /* The result is converted to 1.31  */
-      acc = acc << shift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-}
-
-/**    
-  * @} end of BiquadCascadeDF1 group    
-  */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
deleted file mode 100644
index b5032a55f1..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_init_f32.c    
-*    
-* Description:  floating-point Biquad cascade DirectFormI(DF1) filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- * @brief  Initialization function for the floating-point Biquad cascade filter.    
- * @param[in,out] *S           points to an instance of the floating-point Biquad cascade structure.    
- * @param[in]     numStages    number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs     points to the filter coefficients array.    
- * @param[in]     *pState      points to the state array.    
- * @return        none    
- *    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- *    
- * \par    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState is a pointer to state array.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- *    
- */
-
-void arm_biquad_cascade_df1_init_f32(
-  arm_biquad_casd_df1_inst_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
deleted file mode 100644
index fa102f681b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_init_q15.c    
-*    
-* Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S           points to an instance of the Q15 Biquad cascade structure.    
- * @param[in]     numStages    number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs     points to the filter coefficients.    
- * @param[in]     *pState      points to the state buffer.    
- * @param[in]     postShift    Shift to be applied to the accumulator result. Varies according to the coefficients format    
- * @return        none    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}    
- * 
    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 6*numStages values.    
- * The zero coefficient between b1 and b2 facilities  use of 16-bit SIMD instructions on the Cortex-M4.    
- *    
- * \par    
- * The state variables are stored in the array pState.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df1_init_q15(
-  arm_biquad_casd_df1_inst_q15 * S,
-  uint8_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
deleted file mode 100644
index 74eea26474..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_init_q31.c    
-*    
-* Description:	Q31 Biquad cascade DirectFormI(DF1) filter initialization function.    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S           points to an instance of the Q31 Biquad cascade structure.    
- * @param[in]     numStages    number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs     points to the filter coefficients buffer.    
- * @param[in]     *pState      points to the state buffer.    
- * @param[in]     postShift    Shift to be applied after the accumulator.  Varies according to the coefficients format    
- * @return        none    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState points to state variables array.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df1_init_q31(
-  arm_biquad_casd_df1_inst_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
deleted file mode 100644
index 3109c08602..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
+++ /dev/null
@@ -1,408 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_q15.c    
-*    
-* Description:	Processing function for the    
-*				Q15 Biquad cascade DirectFormI(DF1) filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 Biquad cascade filter.    
- * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[out] *pDst points to the location where the output result is written.    
- * @param[in]  blockSize number of samples to process per call.    
- * @return none.    
- *    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * The accumulator is then shifted by postShift bits to truncate the result to 1.15 format by discarding the low 16 bits.    
- * Finally, the result is saturated to 1.15 format.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_biquad_cascade_df1_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q31_t in;                                      /*  Temporary variable to hold input value       */
-  q31_t out;                                     /*  Temporary variable to hold output value      */
-  q31_t b0;                                      /*  Temporary variable to hold bo value          */
-  q31_t b1, a1;                                  /*  Filter coefficients                          */
-  q31_t state_in, state_out;                     /*  Filter state variables                       */
-  q31_t acc_l, acc_h;
-  q63_t acc;                                     /*  Accumulator                                  */
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
-  int32_t uShift = (32 - lShift);
-
-  do
-  {
-    /* Read the b0 and 0 coefficients using SIMD  */
-    b0 = *__SIMD32(pCoeffs)++;
-
-    /* Read the b1 and b2 coefficients using SIMD */
-    b1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the a1 and a2 coefficients using SIMD */
-    a1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
-    state_in = *__SIMD32(pState)++;
-
-    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
-    state_out = *__SIMD32(pState)--;
-
-    /* Apply loop unrolling and compute 2 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:    
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     */
-    sample = blockSize >> 1u;
-
-    /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.    
-     ** a second loop below computes the remaining 1 sample. */
-    while(sample > 0u)
-    {
-
-      /* Read the input */
-      in = *__SIMD32(pIn)++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUAD(b0, in);
-
-      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] +  a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
-      state_out = __PKHBT(state_out >> 16, (out), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUADX(b0, in);
-      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Store the output in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
-
-#else
-
-      *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in >> 16, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-
-      /* Decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 2, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-
-    if((blockSize & 0x1u) != 0u)
-    {
-      /* Read the input */
-      in = *pIn++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      out = __SMUAD(b0, in);
-
-#else
-
-      out = __SMUADX(b0, in);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* acc =  b1 * x[n-1] + b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) out;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    }
-
-    /*  The first stage goes from the input wire to the output wire.  */
-    /*  Subsequent numStages occur in-place in the output wire  */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the state array */
-    *__SIMD32(pState)++ = state_in;
-    *__SIMD32(pState)++ = state_out;
-
-
-    /* Decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q15_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q15_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q15_t Xn;                                      /*  temporary input               */
-  q63_t acc;                                     /*  Accumulator                                  */
-  int32_t shift = (15 - (int32_t) S->postShift); /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:         
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]         
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q31_t) b0 *Xn;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q31_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q31_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q31_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q31_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = __SSAT((acc >> shift), 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q15_t) acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#endif /*     #ifndef ARM_MATH_CM0 */
-
-}
-
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
deleted file mode 100644
index 53a7a1047a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
+++ /dev/null
@@ -1,400 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_q31.c    
-*    
-* Description:	Processing function for the    
-*				Q31 Biquad cascade filter    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 Biquad cascade filter.    
- * @param[in]  *S         points to an instance of the Q31 Biquad cascade structure.    
- * @param[in]  *pSrc      points to the block of input data.    
- * @param[out] *pDst      points to the block of output data.    
- * @param[in]  blockSize  number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).    
- * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to    
- * 1.31 format by discarding the low 32 bits.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_biquad_cascade_df1_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q63_t acc;                                     /*  accumulator                   */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q31_t *pState = S->pState;                     /*  pState pointer initialization */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t Xn;                                      /*  temporary input               */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-
-
-#ifndef ARM_MATH_CM0
-
-  q31_t acc_l, acc_h;                            /*  temporary output variables    */
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:    
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31 , Yn2 variable is reused */
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Read the second input */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn2;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn1;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn2;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn1;
-
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Read the third input  */
-      Xn1 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn1;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn2;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31, Yn2 variable is reused  */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Read the forth input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn2;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn1;
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3u);
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = acc >> lShift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q31_t) acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q31_t) acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:         
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]         
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = acc >> lShift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q31_t) acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q31_t) acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#endif /*  #ifndef ARM_MATH_CM0 */
-}
-
-/**    
-  * @} end of BiquadCascadeDF1 group    
-  */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
deleted file mode 100644
index 0b81422fff..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
+++ /dev/null
@@ -1,377 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df2T_f32.c    
-*    
-* Description:  Processing function for the floating-point transposed    
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
- * @ingroup groupFilters       
- */
-
-/**       
- * @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure       
- *       
- * This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.       
- * The filters are implemented as a cascade of second order Biquad sections.       
- * These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.      
- * Only floating-point data is supported.       
- *       
- * This function operate on blocks of input and output data and each call to the function       
- * processes blockSize samples through the filter.       
- * pSrc points to the array of input data and       
- * pDst points to the array of output data.       
- * Both arrays contain blockSize values.       
- *       
- * \par Algorithm       
- * Each Biquad stage implements a second order filter using the difference equation:       
- * 
       
- *    y[n] = b0 * x[n] + d1       
- *    d1 = b1 * x[n] + a1 * y[n] + d2       
- *    d2 = b2 * x[n] + a2 * y[n]       
- * 
       
- * where d1 and d2 represent the two state values.       
- *       
- * \par       
- * A Biquad filter using a transposed Direct Form II structure is shown below.       
- * \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"       
- * Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.       
- * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.       
- * Pay careful attention to the sign of the feedback coefficients.       
- * Some design tools flip the sign of the feedback coefficients:       
- * 
       
- *    y[n] = b0 * x[n] + d1;       
- *    d1 = b1 * x[n] - a1 * y[n] + d2;       
- *    d2 = b2 * x[n] - a2 * y[n];       
- * 
       
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.       
- *       
- * \par       
- * Higher order filters are realized as a cascade of second order sections.       
- * numStages refers to the number of second order stages used.       
- * For example, an 8th order filter would be realized with numStages=4 second order stages.       
- * A 9th order filter would be realized with numStages=5 second order stages with the       
- * coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).       
- *       
- * \par       
- * pState points to the state variable array.       
- * Each Biquad stage has 2 state variables d1 and d2.       
- * The state variables are arranged in the pState array as:       
- * 
       
- *     {d11, d12, d21, d22, ...}       
- * 
       
- * where d1x refers to the state variables for the first Biquad and       
- * d2x refers to the state variables for the second Biquad.       
- * The state array has a total length of 2*numStages values.       
- * The state variables are updated after each block of data is processed; the coefficients are untouched.       
- *       
- * \par       
- * The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.    
- * The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.    
- * That is why the Direct Form I structure supports Q15 and Q31 data types.    
- * The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2.    
- * Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.    
- * The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.    
- *       
- * \par Instance Structure       
- * The coefficients and state variables for a filter are stored together in an instance data structure.       
- * A separate instance structure must be defined for each filter.       
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.       
- *       
- * \par Init Functions       
- * There is also an associated initialization function.      
- * The initialization function performs following operations:       
- * - Sets the values of the internal structure fields.       
- * - Zeros out the values in the state buffer.       
- *       
- * \par       
- * Use of the initialization function is optional.       
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.       
- * To place an instance structure into a const data section, the instance structure must be manually initialized.       
- * Set the values in the state buffer to zeros before static initialization.       
- * For example, to statically initialize the instance structure use       
- * 
       
- *     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};       
- * 
       
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer.       
- * pCoeffs is the address of the coefficient buffer;        
- *       
- */
-
-/**       
- * @addtogroup BiquadCascadeDF2T       
- * @{       
- */
-
-/**      
- * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.      
- * @param[in]  *S        points to an instance of the filter data structure.      
- * @param[in]  *pSrc     points to the block of input data.      
- * @param[out] *pDst     points to the block of output data      
- * @param[in]  blockSize number of samples to process.      
- * @return none.      
- */
-
-void arm_biquad_cascade_df2T_f32(
-  const arm_biquad_cascade_df2T_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-
-  float32_t *pIn = pSrc;                         /*  source pointer            */
-  float32_t *pOut = pDst;                        /*  destination pointer       */
-  float32_t *pState = S->pState;                 /*  State pointer             */
-  float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-  float32_t acc0;                                /*  accumulator               */
-  float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-  float32_t Xn;                                  /*  temporary input           */
-  float32_t d1, d2;                              /*  state variables           */
-  uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-#ifndef ARM_MATH_CM0
-
-  float32_t Xn1, Xn2;                            /*  Input State variables     */
-  float32_t acc1;                                /*  accumulator               */
-
-
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /*Reading the state values */
-    d1 = pState[0];
-    d2 = pState[1];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-
-      /* y[n] = b0 * x[n] + d1 */
-      /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-      /* d2 = b2 * x[n] + a2 * y[n] */
-
-      /* Read the first input */
-      Xn1 = *pIn++;
-
-      /* y[n] = b0 * x[n] + d1 */
-      acc0 = (b0 * Xn1) + d1;
-
-      /* d1 = b1 * x[n] + d2 */
-      d1 = (b1 * Xn1) + d2;
-
-      /* d2 = b2 * x[n] */
-      d2 = (b2 * Xn1);
-
-      /* Read the second input */
-      Xn2 = *pIn++;
-
-      /* d1 = b1 * x[n] + a1 * y[n] */
-      d1 = (a1 * acc0) + d1;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
-
-      d2 = (a2 * acc0) + d2;
-
-      /* y[n] = b0 * x[n] + d1 */
-      acc1 = (b0 * Xn2) + d1;
-
-      /* Read the third input */
-      Xn1 = *pIn++;
-
-      d1 = (b1 * Xn2) + d2;
-
-      d2 = (b2 * Xn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc1;
-
-      d1 = (a1 * acc1) + d1;
-
-      d2 = (a2 * acc1) + d2;
-
-      /* y[n] = b0 * x[n] + d1 */
-      acc0 = (b0 * Xn1) + d1;
-
-      d1 = (b1 * Xn1) + d2;
-
-      d2 = (b2 * Xn1);
-
-      /* Read the fourth input */
-      Xn2 = *pIn++;
-
-      d1 = (a1 * acc0) + d1;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
-
-      d2 = (a2 * acc0) + d2;
-
-      /* y[n] = b0 * x[n] + d1 */
-      acc1 = (b0 * Xn2) + d1;
-
-      d1 = (b1 * Xn2) + d2;
-
-      d2 = (b2 * Xn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc1;
-
-      d1 = (a1 * acc1) + d1;
-
-      d2 = (a2 * acc1) + d2;
-
-      /* decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.       
-     ** No loop unrolling is used. */
-    sample = blockSize & 0x3u;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* y[n] = b0 * x[n] + d1 */
-      acc0 = (b0 * Xn) + d1;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
-
-      /* Every time after the output is computed state should be updated. */
-      /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-      d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
-
-      /* d2 = b2 * x[n] + a2 * y[n] */
-      d2 = (b2 * Xn) + (a2 * acc0);
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* Store the updated state variables back into the state array */
-    *pState++ = d1;
-    *pState++ = d2;
-
-    /* The current stage input is given as the output to the next stage */
-    pIn = pDst;
-
-    /*Reset the output working pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /*Reading the state values */
-    d1 = pState[0];
-    d2 = pState[1];
-
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* y[n] = b0 * x[n] + d1 */
-      acc0 = (b0 * Xn) + d1;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
-
-      /* Every time after the output is computed state should be updated. */
-      /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-      d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
-
-      /* d2 = b2 * x[n] + a2 * y[n] */
-      d2 = (b2 * Xn) + (a2 * acc0);
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* Store the updated state variables back into the state array */
-    *pState++ = d1;
-    *pState++ = d2;
-
-    /* The current stage input is given as the output to the next stage */
-    pIn = pDst;
-
-    /*Reset the output working pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#endif /*  #ifndef ARM_MATH_CM0         */
-
-}
-
-
-  /**       
-   * @} end of BiquadCascadeDF2T group       
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
deleted file mode 100644
index 3f0afd706b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df2T_init_f32.c    
-*    
-* Description:  Initialization function for the floating-point transposed   
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF2T    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.   
- * @param[in,out] *S           points to an instance of the filter data structure.   
- * @param[in]     numStages    number of 2nd order stages in the filter.   
- * @param[in]     *pCoeffs     points to the filter coefficients.   
- * @param[in]     *pState      points to the state buffer.   
- * @return        none   
- *    
- * Coefficient and State Ordering:    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- *    
- * \par    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState is a pointer to state array.    
- * Each Biquad stage has 2 state variables d1, and d2.    
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.    
- * The state array has a total length of 2*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df2T_init_f32(
-  arm_biquad_cascade_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 2 * numStages */
-  memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF2T group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c
deleted file mode 100644
index 9b036c85c9..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c
+++ /dev/null
@@ -1,646 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_f32.c    
-*    
-* Description:	Convolution of floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup Conv Convolution    
- *    
- * Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector.    
- * Convolution is similar to correlation and is frequently used in filtering and data analysis.    
- * The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types.    
- * The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3.    
- *    
- * \par Algorithm    
- * Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively.    
- * Then the convolution    
- *    
- * 
    
- *                   c[n] = a[n] * b[n]    
- * 
    
- *    
- * \par    
- * is defined as    
- * \image html ConvolutionEquation.gif    
- * \par    
- * Note that c[n] is of length srcALen + srcBLen - 1 and is defined over the interval n=0, 1, 2, ..., srcALen + srcBLen - 2.    
- * pSrcA points to the first input vector of length srcALen and    
- * pSrcB points to the second input vector of length srcBLen.    
- * The output result is written to pDst and the calling function must allocate srcALen+srcBLen-1 words for the result.    
- *    
- * \par    
- * Conceptually, when two signals a[n] and b[n] are convolved,    
- * the signal b[n] slides over a[n].    
- * For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together.    
- *    
- * \par    
- * Note that convolution is a commutative operation:    
- *    
- * 
    
- *                   a[n] * b[n] = b[n] * a[n].    
- * 
    
- *    
- * \par    
- * This means that switching the A and B arguments to the convolution functions has no effect.    
- *    
- * Fixed-Point Behavior    
- *    
- * \par    
- * Convolution requires summing up a large number of intermediate products.    
- * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.    
- * Refer to the function specific documentation below for further details of the particular algorithm used.    
- *
- *
- * Fast Versions
- *
- * \par 
- * Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.   
- *
- *
- * Opt Versions
- *
- * \par 
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions 
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of floating-point sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @return none.    
- */
-
-void arm_conv_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1;                               /* inputA pointer */
-  float32_t *pIn2;                               /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
-  float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counters */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally    
-   * divided into three stages according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first stage of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-   * In the third stage of the algorithm, the multiplications decrease by one    
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.    
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]    
-   * sum = x[0] * y[1] + x[1] * y[0]    
-   * ....    
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum += *px++ * *py--;
-
-      /* x[1] * y[srcBLen - 2] */
-      sum += *px++ * *py--;
-
-      /* x[2] * y[srcBLen - 3] */
-      sum += *px++ * *py--;
-
-      /* x[3] * y[srcBLen - 4] */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-
-        /* Read x[3] sample */
-        x3 = *(px);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 += x0 * c0;
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 += x1 * c0;
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 += x2 * c0;
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] */
-        acc3 += x3 * c0;
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py--);
-
-        /* Read x[4] sample */
-        x0 = *(px + 1u);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 += x1 * c0;
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 += x2 * c0;
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 += x3 * c0;
-        /* acc3 +=  x[4] * y[srcBLen - 2] */
-        acc3 += x0 * c0;
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
-
-        /* Read x[5] sample */
-        x1 = *(px + 2u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 += x2 * c0;
-        /* acc1 +=  x[3] * y[srcBLen - 2] */
-        acc1 += x3 * c0;
-        /* acc2 +=  x[4] * y[srcBLen - 2] */
-        acc2 += x0 * c0;
-        /* acc3 +=  x[5] * y[srcBLen - 2] */
-        acc3 += x1 * c0;
-
-        /* Read y[srcBLen - 4] sample */
-        c0 = *(py--);
-
-        /* Read x[6] sample */
-        x2 = *(px + 3u);
-        px += 4u;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[srcBLen - 4] */
-        acc0 += x3 * c0;
-        /* acc1 +=  x[4] * y[srcBLen - 4] */
-        acc1 += x0 * c0;
-        /* acc2 +=  x[5] * y[srcBLen - 4] */
-        acc2 += x1 * c0;
-        /* acc3 +=  x[6] * y[srcBLen - 4] */
-        acc3 += x2 * c0;
-
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 += x3 * c0;
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
-      *pOut++ = acc1;
-      *pOut++ = acc2;
-      *pOut++ = acc3;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-   * sum +=  x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i < ((srcALen + srcBLen) - 1u); i++)
-  {
-    /* Initialize sum with zero to carry out MAC operations */
-    sum = 0.0f;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += pIn1[j] * pIn2[i - j];
-      }
-    }
-    /* Store the output in the destination buffer */
-    pDst[i] = sum;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0        */
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
deleted file mode 100644
index a8097419d3..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
+++ /dev/null
@@ -1,538 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_fast_opt_q15.c    
-*    
-* Description:	Fast Q15 Convolution.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
- *     
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results    
- * but provides only a single guard bit. There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,    
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.    
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.    
- *    
- * \par    
- * See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.    
- */
-
-void arm_conv_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  uint32_t tapCnt;                               /* loop count */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifdef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* Pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2 + srcBLen - 1;
-
-  /* points to smaller length sequence */
-  px = pIn2;
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-
-  /* Copy smaller length input sequence in reverse order into second scratch buffer */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Assuming scratch1 buffer is aligned by 32-bit */
-  /* Fill (srcBLen - 1u) zeros in scratch1 buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr1, srcALen);
-
-  /* Update pointers */
-  pScr1 += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = py;
-
-  /* First part of the processing with loop unrolling process 4 data points at a time.       
-   ** a second loop below process for the remaining 1 to 3 samples. */
-
-  /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = _SIMD32_OFFSET(pScr1);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x2, y2, acc0);
-      acc2 = __SMLAD(x1, y2, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-      acc1 = __SMLADX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-	  a = *pScr1;
-	  b = *(pScr1 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-	  a = *(pScr1 + 2);
-	  b = *(pScr1 + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* update scratch pointers */
-      pIn2 += 4u;
-      pScr1 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2);
-      acc1 += (*pScr1++ * *pIn2);
-      acc2 += (*pScr1++ * *pIn2);
-      acc3 += (*pScr1++ * *pIn2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-
-#else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      acc0 += (*pScr1++ * *pIn2++);
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the output in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c
deleted file mode 100644
index 499e6cfb25..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c
+++ /dev/null
@@ -1,1405 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_fast_q15.c   
-*   
-* Description:	Fast Q15 Convolution.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3
-* 
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Conv   
- * @{   
- */
-
-/**   
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.   
- * @return none.   
- *   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * This fast version uses a 32-bit accumulator with 2.30 format.   
- * The accumulator maintains full precision of the intermediate multiplication results   
- * but provides only a single guard bit. There is no saturation on intermediate additions.   
- * Thus, if the accumulator overflows it wraps around and distorts the result.   
- * The input signals should be scaled down to avoid intermediate overflows.   
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,   
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.   
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.   
- *   
- * \par   
- * See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.   
- */
-
-void arm_conv_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
-{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between   
-     * inputA samples and inputB samples */
-    k = count;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:   
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD   
-     * So, py is incremented by 1 */
-    py = py + 1u;
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1u);
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT((acc0 >> 15), (acc1 >> 15), 16);
-      *__SIMD32(pOut)++ = __PKHBT((acc2 >> 15), (acc3 >> 15), 16);
-
-#else
-
-      *__SIMD32(pOut)++ = __PKHBT((acc1 >> 15), (acc0 >> 15), 16);
-      *__SIMD32(pOut)++ = __PKHBT((acc3 >> 15), (acc2 >> 15), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  pIn2 = pSrc2 - 1u;
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2u;
-
-  while((j > 0u) && (blockSize3 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-       * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-       * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD   
-     * So, py is incremented by 1 */
-    py = py + 1u;
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,   
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1u;
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
-  q15_t a, b;
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between   
-     * inputA samples and inputB samples */
-    k = count;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:   
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1u);
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;	  
-
-      /* read x[0], x[1] samples */
-	  a = *px++;
-	  b = *px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *px;
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *px;
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x2 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  x2 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  a = *(px + 2);
-	  b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px+1);
-		px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		a = *(px+2);
-		b = *(px+3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-	  *pOut++ = (q15_t)(acc0 >> 15);
-	  *pOut++ = (q15_t)(acc1 >> 15);
-	  *pOut++ = (q15_t)(acc2 >> 15);
-	  *pOut++ = (q15_t)(acc3 >> 15);
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  pIn2 = pSrc2 - 1u;
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2u;
-
-  while((j > 0u) && (blockSize3 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {	
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,   
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1u;
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-}
-
-/**   
- * @} end of Conv group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c
deleted file mode 100644
index 46c694b707..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c
+++ /dev/null
@@ -1,572 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_fast_q31.c    
-*    
-* Description:	Q31 Convolution (fast version).    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are accumulated in a 32-bit register in 2.30 format.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- *    
- * \par    
- * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signals must be scaled down.    
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,    
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.    
- *    
- * \par    
- * See arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.    
- */
-
-void arm_conv_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
-{
-  q31_t *pIn1;                                   /* inputA pointer */
-  q31_t *pIn2;                                   /* inputB pointer */
-  q31_t *pOut = pDst;                            /* output pointer */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally    
-   * divided into three stages according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first stage of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-   * In the third stage of the algorithm, the multiplications decrease by one    
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.    
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]    
-   * sum = x[0] * y[1] + x[1] * y[0]    
-   * ....    
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* x[1] * y[srcBLen - 2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* x[2] * y[srcBLen - 3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* x[3] * y[srcBLen - 4] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum << 1;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py--);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc3 +=  x[4] * y[srcBLen - 2] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
-
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc1 +=  x[3] * y[srcBLen - 3] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc2 +=  x[4] * y[srcBLen - 3] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc3 +=  x[5] * y[srcBLen - 3] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-        /* Read y[srcBLen - 4] sample */
-        c0 = *(py--);
-
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[srcBLen - 4] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc1 +=  x[4] * y[srcBLen - 4] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc2 +=  x[5] * y[srcBLen - 4] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc3 +=  x[6] * y[srcBLen - 4] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = (q31_t) (acc0 << 1);
-      *pOut++ = (q31_t) (acc1 << 1);
-      *pOut++ = (q31_t) (acc2 << 1);
-      *pOut++ = (q31_t) (acc3 << 1);
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-   * sum +=  x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum << 1;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c
deleted file mode 100644
index 2d9ada7be2..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c
+++ /dev/null
@@ -1,544 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_opt_q15.c    
-*    
-* Description:	Convolution of Q15 sequences.      
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q15 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).    
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
- *    
- *       
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * This approach provides 33 guard bits and there is no risk of overflow.    
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.    
- *  
- *   
- * \par    
- * Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.     
- * 
- *  
- */
-
-void arm_conv_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  uint32_t tapCnt;                               /* loop count */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2 + srcBLen - 1;
-
-  /* points to smaller length sequence */
-  px = pIn2;
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  /* Copy smaller length input sequence in reverse order into second scratch buffer */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Assuming scratch1 buffer is aligned by 32-bit */
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr1, srcALen);
-
-  /* Update pointers */
-  pScr1 += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = py;
-
-  /* First part of the processing with loop unrolling process 4 data points at a time.       
-   ** a second loop below process for the remaining 1 to 3 samples. */
-
-  /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      /* multiply and accumlate */
-      acc0 = __SMLALD(x1, y1, acc0);
-      acc2 = __SMLALD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = _SIMD32_OFFSET(pScr1);
-
-      /* multiply and accumlate */
-      acc0 = __SMLALD(x2, y2, acc0);
-      acc2 = __SMLALD(x1, y2, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-	  a = *pScr1;
-	  b = *(pScr1 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-	  a = *(pScr1 + 2);
-	  b = *(pScr1 + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4u;
-      pScr1 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2);
-      acc1 += (*pScr1++ * *pIn2);
-      acc2 += (*pScr1++ * *pIn2);
-      acc3 += (*pScr1++ * *pIn2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Read next two samples from scratch1 buffer */
-      acc0 += (*pScr1++ * *pIn2++);
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the output in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-
-/**    
- * @} end of Conv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c
deleted file mode 100644
index b57e4a24b0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c
+++ /dev/null
@@ -1,434 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_opt_q7.c    
-*    
-* Description:	Convolution of Q7 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q7 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit     
- *       
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.    
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.    
- *
- */
-
-void arm_conv_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t out0, out1, out2, out3;                   /* temporary variables */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2;
-
-  /* points to smaller length sequence */
-  px = pIn2 + srcBLen - 1;
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy (srcALen) samples in scratch buffer */
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = (q7_t *) py;
-
-  pScr2 = py;
-
-  /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2 + 2u);
-
-      acc0 = __SMLAD(x2, y1, acc0);
-
-      acc2 = __SMLAD(x1, y1, acc2);
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x2 = *__SIMD32(pScr1)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      pScr2 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2);
-      acc1 += (*pScr1++ * *pScr2);
-      acc2 += (*pScr1++ * *pScr2);
-      acc3 += (*pScr1++ * *pScr2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    out0 = (q7_t) (__SSAT(acc0 >> 7u, 8));
-    out1 = (q7_t) (__SSAT(acc1 >> 7u, 8));
-    out2 = (q7_t) (__SSAT(acc2 >> 7u, 8));
-    out3 = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-    *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-      acc0 += (*pScr1++ * *pScr2++);
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-
-/**    
- * @} end of Conv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c
deleted file mode 100644
index b3200f7e8b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c
+++ /dev/null
@@ -1,661 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_f32.c    
-*    
-* Description:	Partial convolution of floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup PartialConv Partial Convolution    
- *    
- * Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated.    
- * Each function has two additional arguments.    
- * firstIndex specifies the starting index of the subset of output samples.    
- * numPoints is the number of output samples to compute.    
- * The function computes the output in the range    
- * [firstIndex, ..., firstIndex+numPoints-1].    
- * The output array pDst contains numPoints values.    
- *    
- * The allowable range of output indices is [0 srcALen+srcBLen-2].    
- * If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR.    
- * Otherwise the functions return ARM_MATH_SUCCESS.    
- * \note Refer arm_conv_f32() for details on fixed point behavior.   
- *
- * 
- * Fast Versions
- *
- * \par 
- * Fast versions are supported for Q31 and Q15 of partial convolution.  Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.   
- *
- *
- * Opt Versions
- *
- * \par 
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of partial convolution
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of floating-point sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- */
-
-arm_status arm_conv_partial_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
-  float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count = 0u, blkCnt, check;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds    
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = (int32_t) check - (int32_t) srcALen;
-    blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = ((int32_t) check - blockSize3) -
-      (blockSize1 + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally    
-     * divided into three stages according to the number of multiplications that has to be    
-     * taken place between inputA samples and inputB samples. In the first stage of the    
-     * algorithm, the multiplications increase by one for every iteration.    
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-     * In the third stage of the algorithm, the multiplications decrease by one    
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex    
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------    
-     * Initializations of stage1    
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]    
-     * sum = x[0] * y[1] + x[1] * y[0]    
-     * ....    
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed.    
-       Since the partial convolution starts from from firstIndex    
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc1 = pIn2 + firstIndex;
-    py = pSrc1;
-
-    /* ------------------------    
-     * Stage1 process    
-     * ----------------------*/
-
-    /* The first stage starts here */
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum += *px++ * *py--;
-
-        /* x[1] * y[srcBLen - 2] */
-        sum += *px++ * *py--;
-
-        /* x[2] * y[srcBLen - 3] */
-        sum += *px++ * *py--;
-
-        /* x[3] * y[srcBLen - 4] */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc1;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------    
-     * Initializations of stage2    
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-     * ....    
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-     */
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-    /* -------------------    
-     * Stage2 process    
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-     * So, to loop unroll over blockSize2,    
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0.0f;
-        acc1 = 0.0f;
-        acc2 = 0.0f;
-        acc3 = 0.0f;
-
-        /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
-
-          /* Read x[3] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 += x0 * c0;
-
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 += x1 * c0;
-
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 += x2 * c0;
-
-          /* acc3 +=  x[3] * y[srcBLen - 1] */
-          acc3 += x3 * c0;
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *(py--);
-
-          /* Read x[4] sample */
-          x0 = *(px++);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 += x1 * c0;
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 += x2 * c0;
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 += x3 * c0;
-          /* acc3 +=  x[4] * y[srcBLen - 2] */
-          acc3 += x0 * c0;
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
-
-          /* Read x[5] sample */
-          x1 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 += x2 * c0;
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 += x3 * c0;
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 += x0 * c0;
-          /* acc3 +=  x[5] * y[srcBLen - 2] */
-          acc3 += x1 * c0;
-
-          /* Read y[srcBLen - 4] sample */
-          c0 = *(py--);
-
-          /* Read x[6] sample */
-          x2 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[3] * y[srcBLen - 4] */
-          acc0 += x3 * c0;
-          /* acc1 +=  x[4] * y[srcBLen - 4] */
-          acc1 += x0 * c0;
-          /* acc2 +=  x[5] * y[srcBLen - 4] */
-          acc2 += x1 * c0;
-          /* acc3 +=  x[6] * y[srcBLen - 4] */
-          acc3 += x2 * c0;
-
-
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
-          /* Read x[7] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += x0 * c0;
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += x1 * c0;
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += x2 * c0;
-          /* acc3 +=  x[7] * y[srcBLen - 5] */
-          acc3 += x3 * c0;
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-          x2 = x3;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = acc0;
-        *pOut++ = acc1;
-        *pOut++ = acc2;
-        *pOut++ = acc3;
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0.0f;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += *px++ * *py--;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,    
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0.0f;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += *px++ * *py--;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------    
-     * Initializations of stage3    
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-     * ....    
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-     * sum +=  x[srcALen-1] * y[srcBLen-1]    
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0.0f;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0u; j <= i; j++)
-      {
-        /* Check the array limitations for inputs */
-        if((((i - j) < srcBLen) && (j < srcALen)))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += pIn1[j] * pIn2[i - j];
-        }
-      }
-      /* Store the output in the destination buffer */
-      pDst[i] = sum;
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
deleted file mode 100644
index 1c04d2217a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
+++ /dev/null
@@ -1,763 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_fast_opt_q15.c    
-*    
-* Description:	Fast Q15 Partial convolution.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @param[in]       *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]       *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
- *     
- */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;
-
-  uint32_t tapCnt;                               /* loop count */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-
-    /* Copy smaller length input sequence in reverse order into second scratch buffer */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Assuming scratch1 buffer is aligned by 32-bit */
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-    /* Copy (srcALen) samples in scratch buffer */
-    arm_copy_q15(pIn1, pScr1, srcALen);
-
-    /* Update pointers */
-    pScr1 += srcALen;
-
-    /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* First part of the processing with loop unrolling process 4 data points at a time.       
-     ** a second loop below process for the remaining 1 to 3 samples. */
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pIn2);
-        y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x1, y1, acc0);
-        acc2 = __SMLAD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = _SIMD32_OFFSET(pScr1);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x2, y2, acc0);
-
-        acc2 = __SMLAD(x1, y2, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-        acc1 = __SMLADX(x3, y2, acc1);
-
-        x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y2, acc3);
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pIn2)++;
-
-        acc0 = __SMLAD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-       ** Then store the output in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-#else
-
-arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-  q15_t x10, x11, x20, x21;                      /* Temporary variables to hold srcA buffer */
-  q15_t y10, y11;                                /* Temporary variables to hold srcB buffer */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1u) >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1u) % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2;
-        y11 = *(pIn2 + 1u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-        acc2 += (q31_t) x20 *y10;
-        acc2 += (q31_t) x21 *y11;
-
-        /* multiply and accumlate */
-        acc1 += (q31_t) x11 *y10;
-        acc1 += (q31_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1u);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x21 *y10;
-        acc3 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pIn2 + 2u);
-        y11 = *(pIn2 + 3u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x20 *y10;
-        acc0 += (q31_t) x21 *y11;
-        acc2 += (q31_t) x10 *y10;
-        acc2 += (q31_t) x11 *y11;
-        acc1 += (q31_t) x21 *y10;
-        acc1 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x11 *y10;
-        acc3 += (q31_t) x20 *y11;
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = __SSAT((acc0 >> 15), 16);
-      *pOut++ = __SSAT((acc1 >> 15), 16);
-      *pOut++ = __SSAT((acc2 >> 15), 16);
-      *pOut++ = __SSAT((acc3 >> 15), 16);
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2++;
-        y11 = *pIn2++;
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
deleted file mode 100644
index 5d6eb6f49f..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
+++ /dev/null
@@ -1,1473 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_partial_fast_q15.c   
-*   
-* Description:	Fast Q15 Partial convolution.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup PartialConv   
- * @{   
- */
-
-/**   
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.   
- * @param[in]       *pSrcA points to the first input sequence.   
- * @param[in]       srcALen length of the first input sequence.   
- * @param[in]       *pSrcB points to the second input sequence.   
- * @param[in]       srcBLen length of the second input sequence.   
- * @param[out]      *pDst points to the location where the output result is written.   
- * @param[in]       firstIndex is the first output sample to start with.   
- * @param[in]       numPoints is the number of output points to be computed.   
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
- *   
- * See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.   
- */
-
-
-arm_status arm_conv_partial_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >=srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t) check - (int32_t) srcALen);
-    blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    while((count < 4u) && (blockSize1 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between   
-       * inputA samples and inputB samples */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:   
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1u;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is the index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-
-    /* --------------------   
-     * Stage2 process   
-     * -------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-     * So, to loop unroll over blockSize2,   
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-      py = py - 1u;
-
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-
-        /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-        /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read the last two inputB samples using SIMD:   
-           * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-          acc0 = __SMLADX(x0, c0, acc0);
-
-          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-          acc1 = __SMLADX(x1, c0, acc1);
-
-          /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-          /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-          acc2 = __SMLADX(x2, c0, acc2);
-
-          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-          acc3 = __SMLADX(x3, c0, acc3);
-
-          /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-          acc0 = __SMLADX(x2, c0, acc0);
-
-          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-          acc1 = __SMLADX(x3, c0, acc1);
-
-          /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-          /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-          acc2 = __SMLADX(x0, c0, acc2);
-
-          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-          acc3 = __SMLADX(x1, c0, acc3);
-
-        } while(--k);
-
-        /* For the next MAC operations, SIMD is not used   
-         * So, the 16 bit pointer if inputB, py is updated */
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        if(k == 1u)
-        {
-          /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-          /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLAD(x0, c0, acc0);
-          acc1 = __SMLAD(x1, c0, acc1);
-          acc2 = __SMLADX(x1, c0, acc2);
-          acc3 = __SMLADX(x3, c0, acc3);
-        }
-
-        if(k == 2u)
-        {
-          /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-          /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLADX(x0, c0, acc0);
-          acc1 = __SMLADX(x1, c0, acc1);
-          acc2 = __SMLADX(x3, c0, acc2);
-          acc3 = __SMLADX(x2, c0, acc3);
-        }
-
-        if(k == 3u)
-        {
-          /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-          /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-          /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLADX(x0, c0, acc0);
-          acc1 = __SMLADX(x1, c0, acc1);
-          acc2 = __SMLADX(x3, c0, acc2);
-          acc3 = __SMLADX(x2, c0, acc3);
-
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-          /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLADX(x1, c0, acc0);
-          acc1 = __SMLAD(x2, c0, acc1);
-          acc2 = __SMLADX(x2, c0, acc2);
-          acc3 = __SMLADX(x3, c0, acc3);
-        }
-
-        /* Store the results in the accumulators in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *__SIMD32(pOut)++ = __PKHBT(acc0 >> 15, acc1 >> 15, 16);
-        *__SIMD32(pOut)++ = __PKHBT(acc2 >> 15, acc3 >> 15, 16);
-
-#else
-
-        *__SIMD32(pOut)++ = __PKHBT(acc1 >> 15, acc0 >> 15, 16);
-        *__SIMD32(pOut)++ = __PKHBT(acc3 >> 15, acc2 >> 15, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    pIn2 = pSrc2 - 1u;
-    py = pIn2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2u;
-
-    while((j > 0u) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,   
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1u;
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
-  q15_t a, b;
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >=srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t) check - (int32_t) srcALen);
-    blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0u))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between   
-       * inputA samples and inputB samples */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:   
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-  while(blockSize1 > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1u;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is the index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-
-    /* --------------------   
-     * Stage2 process   
-     * -------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-     * So, to loop unroll over blockSize2,   
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-      py = py - 1u;
-
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-      /* read x[0], x[1] samples */
-	  a = *px++;
-	  b = *px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *px;
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *px;
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x2 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  x2 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  a = *(px + 2);
-	  b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px+1);
-		px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		a = *(px+2);
-		b = *(px+3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-	  *pOut++ = (q15_t)(acc0 >> 15);
-	  *pOut++ = (q15_t)(acc1 >> 15);
-	  *pOut++ = (q15_t)(acc2 >> 15);
-	  *pOut++ = (q15_t)(acc3 >> 15);
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    pIn2 = pSrc2 - 1u;
-    py = pIn2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2u;
-
-    while((j > 0u) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {	
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,   
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1u;
-
-  while(blockSize3 > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#endif /*     #ifndef UNALIGNED_SUPPORT_DISABLE      */
-}
-
-/**   
- * @} end of PartialConv group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
deleted file mode 100644
index 0e4795f478..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
+++ /dev/null
@@ -1,599 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_fast_q31.c    
-*    
-* Description:	Fast Q31 Partial convolution.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * \par    
- * See arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.    
- */
-
-arm_status arm_conv_partial_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds    
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t) check - (int32_t) srcALen);
-    blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally    
-     * divided into three stages according to the number of multiplications that has to be    
-     * taken place between inputA samples and inputB samples. In the first stage of the    
-     * algorithm, the multiplications increase by one for every iteration.    
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-     * In the third stage of the algorithm, the multiplications decrease by one    
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex    
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------    
-     * Initializations of stage1    
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]    
-     * sum = x[0] * y[1] + x[1] * y[0]    
-     * ....    
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed.    
-       Since the partial convolution starts from firstIndex    
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------    
-     * Stage1 process    
-     * ----------------------*/
-
-    /* The first loop starts here */
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* x[1] * y[srcBLen - 2] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* x[2] * y[srcBLen - 3] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* x[3] * y[srcBLen - 4] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------    
-     * Initializations of stage2    
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-     * ....    
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-     */
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-    /* -------------------    
-     * Stage2 process    
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-     * So, to loop unroll over blockSize2,    
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-        /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
-
-          /* Read x[3] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-          /* acc3 +=  x[3] * y[srcBLen - 1] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *(py--);
-
-          /* Read x[4] sample */
-          x0 = *(px++);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-          /* acc3 +=  x[4] * y[srcBLen - 2] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
-
-          /* Read x[5] sample */
-          x1 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-          /* acc3 +=  x[5] * y[srcBLen - 2] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-          /* Read y[srcBLen - 4] sample */
-          c0 = *(py--);
-
-          /* Read x[6] sample */
-          x2 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[3] * y[srcBLen - 4] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-          /* acc1 +=  x[4] * y[srcBLen - 4] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-          /* acc2 +=  x[5] * y[srcBLen - 4] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-          /* acc3 +=  x[6] * y[srcBLen - 4] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
-          /* Read x[7] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-          /* acc3 +=  x[7] * y[srcBLen - 5] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-          x2 = x3;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (acc0 << 1);
-        *pOut++ = (q31_t) (acc1 << 1);
-        *pOut++ = (q31_t) (acc2 << 1);
-        *pOut++ = (q31_t) (acc3 << 1);
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum << 1;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,    
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum << 1;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------    
-     * Initializations of stage3    
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-     * ....    
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-     * sum +=  x[srcALen-1] * y[srcBLen-1]    
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* -------------------    
-     * Stage3 process    
-     * ------------------*/
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-}
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
deleted file mode 100644
index 0dd3347a82..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
+++ /dev/null
@@ -1,764 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_opt_q15.c    
-*    
-* Description:	Partial convolution of Q15 sequences.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q15 sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @param[in]       *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]       *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, state buffers should be aligned by 32-bit    
- *    
- * Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.   
- *  
- * 
- */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-    /* Copy (srcALen) samples in scratch buffer */
-    arm_copy_q15(pIn1, pScr1, srcALen);
-
-    /* Update pointers */
-    pScr1 += srcALen;
-
-    /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pIn2);
-        y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-        /* multiply and accumlate */
-        acc0 = __SMLALD(x1, y1, acc0);
-        acc2 = __SMLALD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLALDX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = _SIMD32_OFFSET(pScr1);
-
-        /* multiply and accumlate */
-        acc0 = __SMLALD(x2, y2, acc0);
-        acc2 = __SMLALD(x1, y2, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLALDX(x3, y1, acc3);
-        acc1 = __SMLALDX(x3, y2, acc1);
-
-        x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLALDX(x3, y2, acc3);
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pIn2)++;
-
-        acc0 = __SMLALD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#else
-
-arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-  q15_t x10, x11, x20, x21;                      /* Temporary variables to hold srcA buffer */
-  q15_t y10, y11;                                /* Temporary variables to hold srcB buffer */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1u) >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1u) % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2;
-        y11 = *(pIn2 + 1u);
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x10 *y10;
-        acc0 += (q63_t) x11 *y11;
-        acc2 += (q63_t) x20 *y10;
-        acc2 += (q63_t) x21 *y11;
-
-        /* multiply and accumlate */
-        acc1 += (q63_t) x11 *y10;
-        acc1 += (q63_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1u);
-
-        /* multiply and accumlate */
-        acc3 += (q63_t) x21 *y10;
-        acc3 += (q63_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pIn2 + 2u);
-        y11 = *(pIn2 + 3u);
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x20 *y10;
-        acc0 += (q63_t) x21 *y11;
-        acc2 += (q63_t) x10 *y10;
-        acc2 += (q63_t) x11 *y11;
-        acc1 += (q63_t) x21 *y10;
-        acc1 += (q63_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q63_t) x11 *y10;
-        acc3 += (q63_t) x20 *y11;
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = __SSAT((acc0 >> 15), 16);
-      *pOut++ = __SSAT((acc1 >> 15), 16);
-      *pOut++ = __SSAT((acc2 >> 15), 16);
-      *pOut++ = __SSAT((acc3 >> 15), 16);
-
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2++;
-        y11 = *pIn2++;
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x10 *y10;
-        acc0 += (q63_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
deleted file mode 100644
index 6a82603165..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
+++ /dev/null
@@ -1,806 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_opt_q7.c    
-*    
-* Description:	Partial convolution of Q7 sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q7 sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @param[in]      *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @param[in]      *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).    
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit   
- * 
- *
- * 
- */
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-  arm_status status;
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t out0, out1, out2, out3;                   /* temporary variables */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2;
-
-    /* points to smaller length sequence */
-    px = pIn2 + srcBLen - 1;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy (srcALen) samples in scratch buffer */
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1u);
-
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = (q7_t *) py;
-
-    pScr2 = py;
-
-    pOut = pDst + firstIndex;
-
-    pScratch1 += firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pScr2);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x1, y1, acc0);
-        acc2 = __SMLAD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pScr2 + 2u);
-
-        acc0 = __SMLAD(x2, y1, acc0);
-
-        acc2 = __SMLAD(x1, y1, acc2);
-
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        x2 = *__SIMD32(pScr1)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-
-        pScr2 += 4u;
-
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2);
-        acc1 += (*pScr1++ * *pScr2);
-        acc2 += (*pScr1++ * *pScr2);
-        acc3 += (*pScr1++ * *pScr2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      out0 = (q7_t) (__SSAT(acc0 >> 7u, 8));
-      out1 = (q7_t) (__SSAT(acc1 >> 7u, 8));
-      out2 = (q7_t) (__SSAT(acc2 >> 7u, 8));
-      out3 = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-      *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-    blkCnt = (numPoints) & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pScr2)++;
-
-        acc0 = __SMLAD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-
-  }
-
-  return (status);
-
-}
-
-#else
-
-arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  arm_status status;
-  q7_t *pOut = pDst;                             /* output pointer */
-  q15_t x10, x11, x20, x21;                      /* Temporary input variables */
-  q15_t y10, y11;                                /* Temporary input variables */
-  q7_t out0, out1, out2, out3;                   /* temporary variables */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2;
-
-    /* points to smaller length sequence */
-    px = pIn2 + srcBLen - 1;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy (srcALen) samples in scratch buffer */
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1u) >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1u) % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = (q7_t *) py;
-
-    pScr2 = py;
-
-    pOut = pDst + firstIndex;
-
-    pScratch1 += firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y10 = *pScr2;
-        y11 = *(pScr2 + 1u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-        acc2 += (q31_t) x20 *y10;
-        acc2 += (q31_t) x21 *y11;
-
-
-        acc1 += (q31_t) x11 *y10;
-        acc1 += (q31_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1u);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x21 *y10;
-        acc3 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pScr2 + 2u);
-        y11 = *(pScr2 + 3u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x20 *y10;
-        acc0 += (q31_t) x21 *y11;
-        acc2 += (q31_t) x10 *y10;
-        acc2 += (q31_t) x11 *y11;
-        acc1 += (q31_t) x21 *y10;
-        acc1 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x11 *y10;
-        acc3 += (q31_t) x20 *y11;
-
-        /* update scratch pointers */
-
-        pScr1 += 4u;
-        pScr2 += 4u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2);
-        acc1 += (*pScr1++ * *pScr2);
-        acc2 += (*pScr1++ * *pScr2);
-        acc3 += (*pScr1++ * *pScr2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      out0 = (q7_t) (__SSAT(acc0 >> 7u, 8));
-      out1 = (q7_t) (__SSAT(acc1 >> 7u, 8));
-      out2 = (q7_t) (__SSAT(acc2 >> 7u, 8));
-      out3 = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-
-      *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-    blkCnt = (numPoints) & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pScr2++;
-        y11 = *pScr2++;
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  return (status);
-
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c
deleted file mode 100644
index 83d7cc6219..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c
+++ /dev/null
@@ -1,778 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_partial_q15.c   
-*   
-* Description:	Partial convolution of Q15 sequences.  
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-* 
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup PartialConv   
- * @{   
- */
-
-/**   
- * @brief Partial convolution of Q15 sequences.   
- * @param[in]       *pSrcA points to the first input sequence.   
- * @param[in]       srcALen length of the first input sequence.   
- * @param[in]       *pSrcB points to the second input sequence.   
- * @param[in]       srcBLen length of the second input sequence.   
- * @param[out]      *pDst points to the location where the output result is written.   
- * @param[in]       firstIndex is the first output sample to start with.   
- * @param[in]       numPoints is the number of output points to be computed.   
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
- *   
- * Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.  
- * 
- * \par    
- * Refer the function arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers.
- * 
- */
-
-
-arm_status arm_conv_partial_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables */
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t) check - (int32_t) srcALen);
-    blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    while((count < 4u) && (blockSize1 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between   
-       * inputA samples and inputB samples */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:   
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1u;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLALDX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLALDX(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLALDX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLALDX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLALDX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLALDX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLALDX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLALDX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALDX(x1, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-
-		c0 = *(py-1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
-        acc2 = __SMLALDX(x2, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-  	  
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-  
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    pIn2 = pSrc2 - 1u;
-    py = pIn2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2u;
-
-    while((j > 0u) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,   
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1u;
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA;                           /* inputA pointer */
-  q15_t *pIn2 = pSrcB;                           /* inputB pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if(((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q31_t) pIn1[j] * (pIn2[i - j]));
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u);
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /* #if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)  */
-
-}
-
-/**   
- * @} end of PartialConv group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c
deleted file mode 100644
index 89c98be966..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c
+++ /dev/null
@@ -1,599 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_q31.c    
-*    
-* Description:	Partial convolution of Q31 sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q31 sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * See arm_conv_partial_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-arm_status arm_conv_partial_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q63_t sum, acc0, acc1, acc2;                   /* Accumulator                  */
-  q31_t x0, x1, x2, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
-  arm_status status;                             /* status of Partial convolution */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds    
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t) check - (int32_t) srcALen);
-    blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally    
-     * divided into three stages according to the number of multiplications that has to be    
-     * taken place between inputA samples and inputB samples. In the first stage of the    
-     * algorithm, the multiplications increase by one for every iteration.    
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-     * In the third stage of the algorithm, the multiplications decrease by one    
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex    
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------    
-     * Initializations of stage1    
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]    
-     * sum = x[0] * y[1] + x[1] * y[0]    
-     * ....    
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed.    
-       Since the partial convolution starts from firstIndex    
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------    
-     * Stage1 process    
-     * ----------------------*/
-
-    /* The first loop starts here */
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[1] * y[srcBLen - 2] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[2] * y[srcBLen - 3] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[3] * y[srcBLen - 4] */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------    
-     * Initializations of stage2    
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-     * ....    
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-     */
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-    /* -------------------    
-     * Stage2 process    
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-     * So, to loop unroll over blockSize2,    
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blkCnt */
-
-      blkCnt = blockSize2 / 3;
-      while(blkCnt > 0u)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-
-        /* read x[0], x[1] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-
-        /* Apply loop unrolling and compute 3 MACs simultaneously. */
-        k = srcBLen / 3;
-
-        /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.        
-         ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py);
-
-          /* Read x[2] sample */
-          x2 = *(px);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 += (q63_t) x0 *c0;
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 += (q63_t) x1 *c0;
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 += (q63_t) x2 *c0;
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *(py - 1u);
-
-          /* Read x[3] sample */
-          x0 = *(px + 1u);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 += (q63_t) x1 *c0;
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 += (q63_t) x2 *c0;
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 += (q63_t) x0 *c0;
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py - 2u);
-
-          /* Read x[4] sample */
-          x1 = *(px + 2u);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 += (q63_t) x2 *c0;
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 += (q63_t) x0 *c0;
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 += (q63_t) x1 *c0;
-
-
-          px += 3u;
-
-          py -= 3u;
-
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.        
-         ** No loop unrolling is used. */
-        k = srcBLen - (3 * (srcBLen / 3));
-
-        while(k > 0u)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
-          /* Read x[7] sample */
-          x2 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += (q63_t) x0 *c0;
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += (q63_t) x1 *c0;
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += (q63_t) x2 *c0;
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (acc0 >> 31);
-        *pOut++ = (q31_t) (acc1 >> 31);
-        *pOut++ = (q31_t) (acc2 >> 31);
-
-        /* Increment the pointer pIn1 index, count by 3 */
-        count += 3u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.        
-       ** No loop unrolling is used. */
-      blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) * px++ * (*py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (sum >> 31);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,    
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) * px++ * (*py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (sum >> 31);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------    
-     * Initializations of stage3    
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-     * ....    
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-     * sum +=  x[srcALen-1] * y[srcBLen-1]    
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.    
-       The blockSize3 variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* -------------------    
-     * Stage3 process    
-     * ------------------*/
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* inputA pointer */
-  q31_t *pIn2 = pSrcB;                           /* inputB pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if(((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q31_t) (sum >> 31u);
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /*    #ifndef ARM_MATH_CM0      */
-
-}
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c
deleted file mode 100644
index b532669947..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c
+++ /dev/null
@@ -1,733 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_partial_q7.c   
-*   
-* Description:	Partial convolution of Q7 sequences.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup PartialConv   
- * @{   
- */
-
-/**   
- * @brief Partial convolution of Q7 sequences.   
- * @param[in]       *pSrcA points to the first input sequence.   
- * @param[in]       srcALen length of the first input sequence.   
- * @param[in]       *pSrcB points to the second input sequence.   
- * @param[in]       srcBLen length of the second input sequence.   
- * @param[out]      *pDst points to the location where the output result is written.   
- * @param[in]       firstIndex is the first output sample to start with.   
- * @param[in]       numPoints is the number of output points to be computed.   
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
- *  
- * \par    
- * Refer the function arm_conv_partial_opt_q7() for a faster implementation of this function.
- *  
- */
-
-arm_status arm_conv_partial_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer */
-  q7_t *pIn2;                                    /* inputB pointer */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t *px;                                      /* Intermediate inputA pointer */
-  q7_t *py;                                      /* Intermediate inputB pointer */
-  q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t input1, input2;
-  q15_t in1, in2;
-  q7_t x0, x1, x2, x3, c0, c1;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter */
-  arm_status status;
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t) check - (int32_t) srcALen);
-    blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* The first stage starts here */
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[0] , x[1] */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* y[srcBLen - 1] , y[srcBLen - 2] */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* x[0] * y[srcBLen - 1] */
-        /* x[1] * y[srcBLen - 2] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* x[2] , x[3] */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* y[srcBLen - 3] , y[srcBLen - 4] */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* x[2] * y[srcBLen - 3] */
-        /* x[3] * y[srcBLen - 4] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-    /* -------------------   
-     * Stage2 process   
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-     * So, to loop unroll over blockSize2,   
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-        /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
-          /* Read y[srcBLen - 2] sample */
-          c1 = *(py--);
-
-          /* Read x[3] sample */
-          x3 = *(px++);
-
-          /* x[0] and x[1] are packed */
-          in1 = (q15_t) x0;
-          in2 = (q15_t) x1;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
-          in1 = (q15_t) c0;
-          in2 = (q15_t) c1;
-
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
-          acc0 = __SMLAD(input1, input2, acc0);
-
-          /* x[1] and x[2] are packed */
-          in1 = (q15_t) x1;
-          in2 = (q15_t) x2;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
-          acc1 = __SMLAD(input1, input2, acc1);
-
-          /* x[2] and x[3] are packed */
-          in1 = (q15_t) x2;
-          in2 = (q15_t) x3;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
-          acc2 = __SMLAD(input1, input2, acc2);
-
-          /* Read x[4] sample */
-          x0 = *(px++);
-
-          /* x[3] and x[4] are packed */
-          in1 = (q15_t) x3;
-          in2 = (q15_t) x0;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
-          acc3 = __SMLAD(input1, input2, acc3);
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
-          /* Read y[srcBLen - 4] sample */
-          c1 = *(py--);
-
-          /* Read x[5] sample */
-          x1 = *(px++);
-
-          /* x[2] and x[3] are packed */
-          in1 = (q15_t) x2;
-          in2 = (q15_t) x3;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
-          in1 = (q15_t) c0;
-          in2 = (q15_t) c1;
-
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
-          acc0 = __SMLAD(input1, input2, acc0);
-
-          /* x[3] and x[4] are packed */
-          in1 = (q15_t) x3;
-          in2 = (q15_t) x0;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
-          acc1 = __SMLAD(input1, input2, acc1);
-
-          /* x[4] and x[5] are packed */
-          in1 = (q15_t) x0;
-          in2 = (q15_t) x1;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
-          acc2 = __SMLAD(input1, input2, acc2);
-
-          /* Read x[6] sample */
-          x2 = *(px++);
-
-          /* x[5] and x[6] are packed */
-          in1 = (q15_t) x1;
-          in2 = (q15_t) x2;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
-          acc3 = __SMLAD(input1, input2, acc3);
-
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
-          /* Read x[7] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += ((q31_t) x0 * c0);
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += ((q31_t) x1 * c0);
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += ((q31_t) x2 * c0);
-          /* acc3 +=  x[7] * y[srcBLen - 5] */
-          acc3 += ((q31_t) x3 * c0);
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-          x2 = x3;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q7_t) (__SSAT(acc0 >> 7, 8));
-        *pOut++ = (q7_t) (__SSAT(acc1 >> 7, 8));
-        *pOut++ = (q7_t) (__SSAT(acc2 >> 7, 8));
-        *pOut++ = (q7_t) (__SSAT(acc3 >> 7, 8));
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-
-          /* Reading two inputs of SrcA buffer and packing */
-          in1 = (q15_t) * px++;
-          in2 = (q15_t) * px++;
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Reading two inputs of SrcB buffer and packing */
-          in1 = (q15_t) * py--;
-          in2 = (q15_t) * py--;
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Perform the multiply-accumulates */
-          sum = __SMLAD(input1, input2, sum);
-
-          /* Reading two inputs of SrcA buffer and packing */
-          in1 = (q15_t) * px++;
-          in2 = (q15_t) * px++;
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Reading two inputs of SrcB buffer and packing */
-          in1 = (q15_t) * py--;
-          in2 = (q15_t) * py--;
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Perform the multiply-accumulates */
-          sum = __SMLAD(input1, input2, sum);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-        /* Increment the pointer pIn1 index, count by 1 */
- 	    count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-      	px = pIn1 + count;
-        py = pSrc2;	
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* inputA pointer */
-  q7_t *pIn2 = pSrcB;                            /* inputB pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if(((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q15_t) pIn1[j] * (pIn2[i - j]));
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /*  #ifndef ARM_MATH_CM0 */
-
-}
-
-/**   
- * @} end of PartialConv group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c
deleted file mode 100644
index ac6425dfe1..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c
+++ /dev/null
@@ -1,733 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_q15.c   
-*   
-* Description:	Convolution of Q15 sequences.     
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Conv   
- * @{   
- */
-
-/**   
- * @brief Convolution of Q15 sequences.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 64-bit internal accumulator.   
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.   
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.   
- * This approach provides 33 guard bits and there is no risk of overflow.   
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.   
- *   
- * \par   
- * Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. 
- *
- * \par    
- * Refer the function arm_conv_opt_q15() for a faster implementation of this function using scratch buffers.
- *  
- */
-
-void arm_conv_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
-{
-
-#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between   
-     * inputA samples and inputB samples */
-    k = count;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:   
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD   
-     * So, py is incremented by 1 */
-    py = py + 1u;
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1u);
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLALDX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLALDX(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLALDX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLALDX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLALDX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLALDX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLALDX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLALDX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALDX(x1, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-
-		c0 = *(py-1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-        /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
-        acc2 = __SMLALDX(x2, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-       /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  blockSize3 = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  pIn2 = pSrc2 - 1u;
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2u;
-
-  while((j > 0u) && (blockSize3 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-       * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-       * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD   
-     * So, py is incremented by 1 */
-    py = py + 1u;
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,   
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1u;
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA;                           /* input pointer */
-  q15_t *pIn2 = pSrcB;                           /* coefficient pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if(((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += (q31_t) pIn1[j] * (pIn2[i - j]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u);
-  }
-
-#endif /*  #if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)*/
-
-}
-
-/**   
- * @} end of Conv group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c
deleted file mode 100644
index 713ea1bd47..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c
+++ /dev/null
@@ -1,564 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_q31.c    
-*    
-* Description:	Convolution of Q31 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q31 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,    
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.    
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.    
- *    
- * \par    
- * See arm_conv_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_conv_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer */
-  q31_t *pIn2;                                   /* inputB pointer */
-  q31_t *pOut = pDst;                            /* output pointer */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q63_t sum;                                     /* Accumulator */
-  q63_t acc0, acc1, acc2;                        /* Accumulator */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (q31_t *) pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = (q31_t *) pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally    
-   * divided into three stages according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first stage of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-   * In the third stage of the algorithm, the multiplications decrease by one    
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.    
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]    
-   * sum = x[0] * y[1] + x[1] * y[0]    
-   * ....    
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[1] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[2] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[3] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q31_t) (sum >> 31);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll by 3 */
-    blkCnt = blockSize2 / 3;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-
-      /* Apply loop unrolling and compute 3 MACs simultaneously. */
-      k = srcBLen / 3;
-
-      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.        
-       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py);
-
-        /* Read x[3] sample */
-        x2 = *(px);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py - 1u);
-
-        /* Read x[4] sample */
-        x0 = *(px + 1u);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 += ((q63_t) x1 * c0);
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 += ((q63_t) x2 * c0);
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 += ((q63_t) x0 * c0);
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py - 2u);
-
-        /* Read x[5] sample */
-        x1 = *(px + 2u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 += ((q63_t) x2 * c0);
-        /* acc1 +=  x[3] * y[srcBLen - 2] */
-        acc1 += ((q63_t) x0 * c0);
-        /* acc2 +=  x[4] * y[srcBLen - 2] */
-        acc2 += ((q63_t) x1 * c0);
-
-        /* update scratch pointers */
-        px += 3u;
-        py -= 3u;
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.        
-       ** No loop unrolling is used. */
-      k = srcBLen - (3 * (srcBLen / 3));
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = (q31_t) (acc0 >> 31);
-      *pOut++ = (q31_t) (acc1 >> 31);
-      *pOut++ = (q31_t) (acc2 >> 31);
-
-      /* Increment the pointer pIn1 index, count by 3 */
-      count += 3u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-   * sum +=  x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q31_t) (sum >> 31);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* input pointer */
-  q31_t *pIn2 = pSrcB;                           /* coefficient pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if(((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q31_t) (sum >> 31u);
-  }
-
-#endif /*     #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c
deleted file mode 100644
index 9fc7e4044f..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c
+++ /dev/null
@@ -1,689 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_q7.c   
-*   
-* Description:	Convolution of Q7 sequences. 
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Conv   
- * @{   
- */
-
-/**   
- * @brief Convolution of Q7 sequences.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 32-bit internal accumulator.   
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.   
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.   
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.   
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.   
- *
- * \par    
- * Refer the function arm_conv_opt_q7() for a faster implementation of this function.
- * 
- */
-
-void arm_conv_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer */
-  q7_t *pIn2;                                    /* inputB pointer */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t *px;                                      /* Intermediate inputA pointer */
-  q7_t *py;                                      /* Intermediate inputB pointer */
-  q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
-  q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t input1, input2;                          /* Temporary input variables */
-  q15_t in1, in2;                                /* Temporary input variables */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = (srcALen - srcBLen) + 1u;
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] , x[1] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* y[srcBLen - 1] , y[srcBLen - 2] */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* x[0] * y[srcBLen - 1] */
-      /* x[1] * y[srcBLen - 2] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* x[2] , x[3] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* y[srcBLen - 3] , y[srcBLen - 4] */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* x[2] * y[srcBLen - 3] */
-      /* x[3] * y[srcBLen - 4] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-        /* Read y[srcBLen - 2] sample */
-        c1 = *(py--);
-
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* x[0] and x[1] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[1] and x[2] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
-        /* Read y[srcBLen - 4] sample */
-        c1 = *(py--);
-
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[4] and x[5] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* x[5] and x[6] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += ((q15_t) x0 * c0);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += ((q15_t) x1 * c0);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += ((q15_t) x2 * c0);
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 += ((q15_t) x3 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc1 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc2 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q15_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q15_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* input pointer */
-  q7_t *pIn2 = pSrcB;                            /* coefficient pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if(((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += (q15_t) pIn1[j] * (pIn2[i - j]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0        */
-
-}
-
-/**   
- * @} end of Conv group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c
deleted file mode 100644
index 317950ec49..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c
+++ /dev/null
@@ -1,738 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_f32.c    
-*    
-* Description:	 Correlation of floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup Corr Correlation    
- *    
- * Correlation is a mathematical operation that is similar to convolution.    
- * As with convolution, correlation uses two signals to produce a third signal.    
- * The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.    
- * Correlation is commonly used to measure the similarity between two signals.    
- * It has applications in pattern recognition, cryptanalysis, and searching.    
- * The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.    
- * Fast versions of the Q15 and Q31 functions are also provided.    
- *    
- * \par Algorithm    
- * Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively.    
- * The convolution of the two signals is denoted by    
- * 
    
- *                   c[n] = a[n] * b[n]    
- * 
    
- * In correlation, one of the signals is flipped in time    
- * 
    
- *                   c[n] = a[n] * b[-n]    
- * 
    
- *    
- * \par    
- * and this is mathematically defined as    
- * \image html CorrelateEquation.gif    
- * \par    
- * The pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen.    
- * The result c[n] is of length 2 * max(srcALen, srcBLen) - 1 and is defined over the interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2).    
- * The output result is written to pDst and the calling function must allocate 2 * max(srcALen, srcBLen) - 1 words for the result.    
- *    
- * Note   
- * \par  
- * The pDst should be initialized to all zeros before being used.  
- *  
- * Fixed-Point Behavior    
- * \par    
- * Correlation requires summing up a large number of intermediate products.    
- * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.    
- * Refer to the function specific documentation below for further details of the particular algorithm used.    
- *
- *
- * Fast Versions
- *
- * \par 
- * Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.   
- *
- *
- * Opt Versions
- *
- * \par 
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of correlate 
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-/**    
- * @brief Correlation of floating-point sequences.    
- * @param[in]  *pSrcA points to the first input sequence.    
- * @param[in]  srcALen length of the first input sequence.    
- * @param[in]  *pSrcB points to the second input sequence.    
- * @param[in]  srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @return none.    
- */
-
-void arm_correlate_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1;                               /* inputA pointer */
-  float32_t *pIn2;                               /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1;                              /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulators */
-  float32_t x0, x1, x2, x3, c0;                  /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counters */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,    
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding has to be done to srcB    
-     * to make their lengths equal.    
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))    
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-    //while(j > 0u)   
-    //{   
-    //  /* Zero is stored in the destination buffer */   
-    //  *pOut++ = 0.0f;   
-
-    //  /* Decrement the loop counter */   
-    //  j--;   
-    //}   
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally    
-   * divided into three parts according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first part of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second part of the algorithm, srcBLen number of multiplications are done.    
-   * In the third part of the algorithm, the multiplications decrease by one    
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.    
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]    
-   * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]    
-   * ....    
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum += *px++ * *py++;
-      /* x[1] * y[srcBLen - 3] */
-      sum += *px++ * *py++;
-      /* x[2] * y[srcBLen - 2] */
-      sum += *px++ * *py++;
-      /* x[3] * y[srcBLen - 1] */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[0] * y[srcBLen - 1] */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]    
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *(py++);
-
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[1] * y[0] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[2] * y[0] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[3] * y[0] */
-        acc3 += x3 * c0;
-
-        /* Read y[1] sample */
-        c0 = *(py++);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 += x1 * c0;
-        /* acc1 +=  x[2] * y[1] */
-        acc1 += x2 * c0;
-        /* acc2 +=  x[3] * y[1] */
-        acc2 += x3 * c0;
-        /* acc3 +=  x[4] * y[1] */
-        acc3 += x0 * c0;
-
-        /* Read y[2] sample */
-        c0 = *(py++);
-
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 += x2 * c0;
-        /* acc1 +=  x[3] * y[2] */
-        acc1 += x3 * c0;
-        /* acc2 +=  x[4] * y[2] */
-        acc2 += x0 * c0;
-        /* acc3 +=  x[5] * y[2] */
-        acc3 += x1 * c0;
-
-        /* Read y[3] sample */
-        c0 = *(py++);
-
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[3] */
-        acc0 += x3 * c0;
-        /* acc1 +=  x[4] * y[3] */
-        acc1 += x0 * c0;
-        /* acc2 +=  x[5] * y[3] */
-        acc2 += x1 * c0;
-        /* acc3 +=  x[6] * y[3] */
-        acc3 += x2 * c0;
-
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[4] sample */
-        c0 = *(py++);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[7] * y[4] */
-        acc3 += x3 * c0;
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = acc0;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = acc1;
-      pOut += inc;
-
-      *pOut = acc2;
-      pOut += inc;
-
-      *pOut = acc3;
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]    
-   * sum +=  x[srcALen-1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB + (srcBLen - 1u);      /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two    
-   * inputs of same length. But to improve the performance, we include zeroes    
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the    
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the   
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted   
-   * using convolution but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
-
-  if(srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if(srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0.0f;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += pIn1[j] * pIn2[-((int32_t) i - j)];
-      }
-    }
-    /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = sum;
-    else
-      *pDst++ = sum;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
deleted file mode 100644
index 59970e11d4..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
+++ /dev/null
@@ -1,507 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_fast_opt_q15.c    
-*    
-* Description:	Fast Q15 Correlation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @return none.    
- *    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch buffers should be aligned by 32-bit    
- *    
- *     
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a    
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.    
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.    
- *    
- * \par    
- * See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.    
- */
-
-void arm_correlate_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch)
-{
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t x1, x2, x3;                              /* temporary variables for holding input and coefficient values */
-  uint32_t j, blkCnt, outBlockSize;              /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-  uint32_t tapCnt;
-  q31_t y1, y2;
-  q15_t *pScr;                                   /* Intermediate pointers        */
-  q15_t *pOut = pDst;                            /* output pointer               */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,        
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB        
-     * to make their lengths equal.        
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))        
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  pScr = pScratch;
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr += (srcBLen - 1u);
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr, srcALen);
-
-  /* Update pointers */
-  pScr += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = srcALen % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr += (srcBLen - 1u);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = (srcBLen - 1u) % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for scratch2 */
-  py = pIn2;
-
-
-  /* Actual correlation process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read four samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr)++;
-
-    /* Read next four samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x1 = _SIMD32_OFFSET(pScr);
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-	  a = *pScr;
-	  b = *(pScr + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-	  a = *(pScr + 2);
-	  b = *(pScr + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4u;
-
-      pScr += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2);
-      acc1 += (*pScr++ * *pIn2);
-      acc2 += (*pScr++ * *pIn2);
-      acc3 += (*pScr++ * *pIn2++);
-
-      pScr -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-    *pOut = (__SSAT(acc0 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc1 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc2 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc3 >> 15u, 16));
-    pOut += inc;
-
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      acc0 += (*pScr++ * *pIn2++);
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-
-    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 1u;
-
-  }
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c
deleted file mode 100644
index ca7fe1f2ab..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c
+++ /dev/null
@@ -1,1314 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_correlate_fast_q15.c   
-*   
-* Description:	Fast Q15 Correlation.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Corr   
- * @{   
- */
-
-/**   
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.   
- * @return none.   
- *   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * This fast version uses a 32-bit accumulator with 2.30 format.   
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.   
- * There is no saturation on intermediate additions.   
- * Thus, if the accumulator overflows it wraps around and distorts the result.   
- * The input signals should be scaled down to avoid intermediate overflows.   
- * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a   
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.   
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.   
- *   
- * \par   
- * See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.   
- */
-
-void arm_correlate_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
-{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum = __SMLAD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px + 1);
-	  px += 2u;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:   
-         * y[0] and y[1] */
-        c0 = *__SIMD32(py)++;
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLAD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px + 1);
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLAD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLAD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-        c0 = *__SIMD32(py)++;
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLAD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLAD(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px + 2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px + 3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLAD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLAD(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[4] */
-        c0 = *py;
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[4], y[5] */
-        c0 = *__SIMD32(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[4], y[5] */
-        c0 = *__SIMD32(py)++;
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-
-        c0 = (*py);
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-        x3 = _SIMD32_OFFSET(px + 2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (acc0 >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (acc1 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc2 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc3 >> 15);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-  q15_t a, b;
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-	  px += 2u;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:   
-         * y[0] and y[1] */
-		  a = *py;
-		  b = *(py + 1);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLAD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(x1, c0, acc1);
-
-        /* Read x[2], x[3], x[4] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x2 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x2 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLAD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLAD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-		  a = *(py + 2);
-		  b = *(py + 3);
-
-		  py += 4u;
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLAD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLAD(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  	a = *(px + 2);
-	  	b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x0 = __PKHBT(a, b, 16);
-	  	a = *(px + 4);
-	  	x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x0 = __PKHBT(b, a, 16);
-	  	a = *(px + 4);
-	  	x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLAD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLAD(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[4] */
-        c0 = *py;
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px + 1);
-
-		px++;;
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		x3 = __PKHBT(a, b, 16);
-	
-#else
-	
-		x3 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[4], y[5] */
-		  a = *py;
-		  b = *(py + 1);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x3 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x3 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[4], y[5] */
-		  a = *py;
-		  b = *(py + 1);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		py += 2u;
-
-        /* Read x[7], x[8], x[9] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x3 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x3 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-
-        c0 = (*py);
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		b = *(px + 3);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		x3 = __PKHBT(a, b, 16);
-	
-#else
-	
-		x3 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (acc0 >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (acc1 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc2 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc3 >> 15);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#endif /*   #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-}
-
-/**   
- * @} end of Corr group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c
deleted file mode 100644
index 5b337ca544..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c
+++ /dev/null
@@ -1,607 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_fast_q31.c    
-*    
-* Description:	Fast Q31 Correlation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are accumulated in a 32-bit register in 2.30 format.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- *    
- * \par    
- * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signals must be scaled down.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a    
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.    
- *    
- * \par    
- * See arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.    
- */
-
-void arm_correlate_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
-{
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB    
-     * to make their lengths equal.    
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))    
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally    
-   * divided into three parts according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first part of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second part of the algorithm, srcBLen number of multiplications are done.    
-   * In the third part of the algorithm, the multiplications decrease by one    
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.    
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]    
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]    
-   * ....    
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* x[1] * y[srcBLen - 3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* x[2] * y[srcBLen - 2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* x[3] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum << 1;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]    
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *(py++);
-
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc1 +=  x[1] * y[0] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc2 +=  x[2] * y[0] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc3 +=  x[3] * y[0] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-        /* Read y[1] sample */
-        c0 = *(py++);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc1 +=  x[2] * y[1] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc2 +=  x[3] * y[1] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc3 +=  x[4] * y[1] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-        /* Read y[2] sample */
-        c0 = *(py++);
-
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc1 +=  x[3] * y[2] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc2 +=  x[4] * y[2] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc3 +=  x[5] * y[2] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-        /* Read y[3] sample */
-        c0 = *(py++);
-
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[3] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc1 +=  x[4] * y[3] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc2 +=  x[5] * y[3] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc3 +=  x[6] * y[3] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[4] sample */
-        c0 = *(py++);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc1 +=  x[5] * y[4] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc2 +=  x[6] * y[4] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc3 +=  x[7] * y[4] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (acc0 << 1);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q31_t) (acc1 << 1);
-      pOut += inc;
-
-      *pOut = (q31_t) (acc2 << 1);
-      pOut += inc;
-
-      *pOut = (q31_t) (acc3 << 1);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum << 1;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum << 1;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]    
-   * sum +=  x[srcALen-1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1u;
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum << 1;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c
deleted file mode 100644
index 3a1c8cd4a6..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c
+++ /dev/null
@@ -1,512 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_opt_q15.c    
-*    
-* Description:	Correlation of Q15 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q15 sequences.  
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch buffers should be aligned by 32-bit    
- *     
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * This approach provides 33 guard bits and there is no risk of overflow.    
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.    
- *    
- * \par    
- * Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.   
- *  
- * 
- */
-
-
-void arm_correlate_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch)
-{
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t x1, x2, x3;                              /* temporary variables for holding input1 and input2 values */
-  uint32_t j, blkCnt, outBlockSize;              /* loop counter                 */
-  int32_t inc = 1;                               /* output pointer increment     */
-  uint32_t tapCnt;
-  q31_t y1, y2;
-  q15_t *pScr;                                   /* Intermediate pointers        */
-  q15_t *pOut = pDst;                            /* output pointer               */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,        
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB        
-     * to make their lengths equal.        
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))        
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  pScr = pScratch;
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr += (srcBLen - 1u);
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr, srcALen);
-
-  /* Update pointers */
-  //pIn1 += srcALen;    
-  pScr += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = srcALen % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr += (srcBLen - 1u);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = (srcBLen - 1u) % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for scratch2 */
-  py = pIn2;
-
-
-  /* Actual correlation process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read four samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr)++;
-
-    /* Read next four samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-      x1 = _SIMD32_OFFSET(pScr);
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-	  a = *pScr;
-	  b = *(pScr + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-	  a = *(pScr + 2);
-	  b = *(pScr + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4u;
-
-      pScr += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2);
-      acc1 += (*pScr++ * *pIn2);
-      acc2 += (*pScr++ * *pIn2);
-      acc3 += (*pScr++ * *pIn2++);
-
-      pScr -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-    *pOut = (__SSAT(acc0 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc1 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc2 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc3 >> 15u, 16));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      acc0 += (*pScr++ * *pIn2++);
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 1u;
-
-  }
-
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c
deleted file mode 100644
index 48a6d091c3..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c
+++ /dev/null
@@ -1,463 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_opt_q7.c    
-*    
-* Description:	Correlation of Q7 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q7 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).    
- * @return none.    
- *    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit     
- *        
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.    
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.  
- *  
- * 
- */
-
-
-
-void arm_correlate_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-  q7_t *pOut = pDst;                             /* output pointer                */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
-  q7_t *pIn1;                                    /* inputA pointer                */
-  q7_t *pIn2;                                    /* inputB pointer                */
-  q15_t *py;                                     /* Intermediate inputB pointer   */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  uint32_t j, k = 0u, blkCnt;                    /* loop counter                  */
-  int32_t inc = 1;                               /* output pointer increment          */
-  uint32_t outBlockSize;                         /* loop counter                  */
-  q15_t x4;                                      /* Temporary input variable      */
-  uint32_t tapCnt;                               /* loop counter                  */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables     */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,        
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB        
-     * to make their lengths equal.        
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))        
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-
-  /* Copy (srcBLen) samples in scratch buffer */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy (srcALen) samples in scratch buffer */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for second sequence */
-  py = pScratch2;
-
-  /* Initialization of pScr2 pointer */
-  pScr2 = pScratch2;
-
-  /* Actual correlation process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2 + 2u);
-
-      acc0 = __SMLAD(x2, y1, acc0);
-
-      acc2 = __SMLAD(x1, y1, acc2);
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x2 = *__SIMD32(pScr1)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      pScr2 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2);
-      acc1 += (*pScr1++ * *pScr2);
-      acc2 += (*pScr1++ * *pScr2);
-      acc3 += (*pScr1++ * *pScr2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(acc0 >> 7u, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc1 >> 7u, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc2 >> 7u, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc3 >> 7u, 8));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-      acc0 += (*pScr1++ * *pScr2++);
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c
deleted file mode 100644
index 1832424890..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c
+++ /dev/null
@@ -1,718 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_correlate_q15.c   
-*   
-* Description:	Correlation of Q15 sequences. 
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Corr   
- * @{   
- */
-
-/**   
- * @brief Correlation of Q15 sequences. 
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 64-bit internal accumulator.   
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.   
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.   
- * This approach provides 33 guard bits and there is no risk of overflow.   
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.   
- *   
- * \par   
- * Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. 
- *
- * \par    
- * Refer the function arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers.
- * 
- */
-
-void arm_correlate_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
-{
-
-#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum = __SMLALD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((sum >> 15), 16));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px + 1);
-	  px += 2u;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:   
-         * y[0] and y[1] */
-        c0 = *__SIMD32(py)++;
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLALD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLALD(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px + 1);
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLALD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLALD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-        c0 = *__SIMD32(py)++;
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLALD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLALD(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px + 2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px + 3);
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLALD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLALD(x1, c0, acc3);
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[4] */
-        c0 = *py;
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALDX(x1, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[4], y[5] */
-        c0 = *__SIMD32(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALD(x3, c0, acc2);
-        acc3 = __SMLALD(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[4], y[5] */
-        c0 = *__SIMD32(py)++;
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALD(x3, c0, acc2);
-        acc3 = __SMLALD(x2, c0, acc3);
-
-        c0 = (*py);
-
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-        /* Read x[10] */
-        x3 = _SIMD32_OFFSET(px + 2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
-        acc2 = __SMLALDX(x2, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (__SSAT(acc0 >> 15, 16));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (__SSAT(acc1 >> 15, 16));
-      pOut += inc;
-
-      *pOut = (q15_t) (__SSAT(acc2 >> 15, 16));
-      pOut += inc;
-
-      *pOut = (q15_t) (__SSAT(acc3 >> 15, 16));
-      pOut += inc;
-
-      /* Increment the count by 4 as 4 output values are computed */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q63_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (__SSAT(sum >> 15, 16));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment count by 1, as one output value is computed */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q63_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (__SSAT(sum >> 15, 16));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLALD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((sum >> 15), 16));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA;                           /* inputA pointer               */
-  q15_t *pIn2 = pSrcB + (srcBLen - 1u);          /* inputB pointer               */
-  q63_t sum;                                     /* Accumulators                  */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two   
-   * inputs of same length. But to improve the performance, we include zeroes   
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the   
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the  
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted  
-   * using convolution but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
-
-  if(srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if(srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
-      }
-    }
-    /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = (q15_t) __SSAT((sum >> 15u), 16u);
-    else
-      *pDst++ = (q15_t) __SSAT((sum >> 15u), 16u);
-  }
-
-#endif /*#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) */
-
-}
-
-/**   
- * @} end of Corr group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c
deleted file mode 100644
index 8d0a0c3b12..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c
+++ /dev/null
@@ -1,664 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_q31.c    
-*    
-* Description:	Correlation of Q31 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q31 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a    
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.    
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.    
- *    
- * \par    
- * See arm_correlate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_correlate_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
-{
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1;                                  /* Intermediate pointers        */
-  q63_t sum, acc0, acc1, acc2;                   /* Accumulators                  */
-  q31_t x0, x1, x2, c0;                          /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,    
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB    
-     * to make their lengths equal.    
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))    
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally    
-   * divided into three parts according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first part of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second part of the algorithm, srcBLen number of multiplications are done.    
-   * In the third part of the algorithm, the multiplications decrease by one    
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.    
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]    
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]    
-   * ....    
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[1] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[2] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[3] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q31_t) (sum >> 31);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]    
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll by 3 */
-    blkCnt = blockSize2 / 3;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-
-      /* Apply loop unrolling and compute 3 MACs simultaneously. */
-      k = srcBLen / 3;
-
-      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.        
-       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *(py);
-
-        /* Read x[2] sample */
-        x2 = *(px);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[1] * y[0] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[2] * y[0] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Read y[1] sample */
-        c0 = *(py + 1u);
-
-        /* Read x[3] sample */
-        x0 = *(px + 1u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 += ((q63_t) x1 * c0);
-        /* acc1 +=  x[2] * y[1] */
-        acc1 += ((q63_t) x2 * c0);
-        /* acc2 +=  x[3] * y[1] */
-        acc2 += ((q63_t) x0 * c0);
-
-        /* Read y[2] sample */
-        c0 = *(py + 2u);
-
-        /* Read x[4] sample */
-        x1 = *(px + 2u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 += ((q63_t) x2 * c0);
-        /* acc1 +=  x[3] * y[2] */
-        acc1 += ((q63_t) x0 * c0);
-        /* acc2 +=  x[4] * y[2] */
-        acc2 += ((q63_t) x1 * c0);
-
-        /* update scratch pointers */
-        px += 3u;
-        py += 3u;
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.        
-       ** No loop unrolling is used. */
-      k = srcBLen - (3 * (srcBLen / 3));
-
-      while(k > 0u)
-      {
-        /* Read y[4] sample */
-        c0 = *(py++);
-
-        /* Read x[7] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (acc0 >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q31_t) (acc1 >> 31);
-      pOut += inc;
-
-      *pOut = (q31_t) (acc2 >> 31);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 3 */
-      count += 3u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (sum >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (sum >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]    
-   * sum +=  x[srcALen-1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q31_t) (sum >> 31);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* inputA pointer               */
-  q31_t *pIn2 = pSrcB + (srcBLen - 1u);          /* inputB pointer               */
-  q63_t sum;                                     /* Accumulators                  */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two    
-   * inputs of same length. But to improve the performance, we include zeroes    
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the    
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the   
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted   
-   * using correlation but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
-
-  if(srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if(srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate correlation for output length number of times */
-  for (i = 0u; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to correlation equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
-      }
-    }
-    /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = (q31_t) (sum >> 31u);
-    else
-      *pDst++ = (q31_t) (sum >> 31u);
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c
deleted file mode 100644
index eb2ddff999..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c
+++ /dev/null
@@ -1,789 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_correlate_q7.c   
-*   
-* Description:	Correlation of Q7 sequences. 
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Corr   
- * @{   
- */
-
-/**   
- * @brief Correlation of Q7 sequences.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 32-bit internal accumulator.   
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.   
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.   
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.   
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.   
- *
- * \par    
- * Refer the function arm_correlate_opt_q7() for a faster implementation of this function.
- * 
- */
-
-void arm_correlate_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer               */
-  q7_t *pIn2;                                    /* inputB pointer               */
-  q7_t *pOut = pDst;                             /* output pointer               */
-  q7_t *px;                                      /* Intermediate inputA pointer  */
-  q7_t *py;                                      /* Intermediate inputB pointer  */
-  q7_t *pSrc1;                                   /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t input1, input2;                          /* temporary variables */
-  q15_t in1, in2;                                /* temporary variables */
-  q7_t x0, x1, x2, x3, c0, c1;                   /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] , x[1] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* y[srcBLen - 4] , y[srcBLen - 3] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* x[0] * y[srcBLen - 4] */
-      /* x[1] * y[srcBLen - 3] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* x[2] , x[3] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* y[srcBLen - 2] , y[srcBLen - 1] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* x[2] * y[srcBLen - 2] */
-      /* x[3] * y[srcBLen - 1] */
-      sum = __SMLAD(input1, input2, sum);
-
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q31_t) ((q15_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(sum >> 7, 8));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *py++;
-        /* Read y[1] sample */
-        c1 = *py++;
-
-        /* Read x[3] sample */
-        x3 = *px++;
-
-        /* x[0] and x[1] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* y[0] and y[1] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc0 += x[0] * y[0] + x[1] * y[1]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[1] and x[2] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc1 += x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc2 += x[2] * y[0] + x[3] * y[1]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc3 += x[3] * y[0] + x[4] * y[1]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-        /* Read y[2] sample */
-        c0 = *py++;
-        /* Read y[3] sample */
-        c1 = *py++;
-
-        /* Read x[5] sample */
-        x1 = *px++;
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* y[2] and y[3] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc0 += x[2] * y[2] + x[3] * y[3]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc1 += x[3] * y[2] + x[4] * y[3]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[4] and x[5] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc2 += x[4] * y[2] + x[5] * y[3]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[6] sample */
-        x2 = *px++;
-
-        /* x[5] and x[6] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc3 += x[5] * y[2] + x[6] * y[3]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[4] sample */
-        c0 = *py++;
-
-        /* Read x[7] sample */
-        x3 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += ((q15_t) x0 * c0);
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += ((q15_t) x1 * c0);
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += ((q15_t) x2 * c0);
-        /* acc3 +=  x[7] * y[4] */
-        acc3 += ((q15_t) x3 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(acc0 >> 7, 8));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q7_t) (__SSAT(acc1 >> 7, 8));
-      pOut += inc;
-
-      *pOut = (q7_t) (__SSAT(acc2 >> 7, 8));
-      pOut += inc;
-
-      *pOut = (q7_t) (__SSAT(acc3 >> 7, 8));
-      pOut += inc;
-
-	  count += 4u;
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py++;
-        in2 = (q15_t) * py++;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py++;
-        in2 = (q15_t) * py++;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q15_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(sum >> 7, 8));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-	  count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q15_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(sum >> 7, 8));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2]  */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* y[0] , y[1] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* y[2] , y[3] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(sum >> 7, 8));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* inputA pointer */
-  q7_t *pIn2 = pSrcB + (srcBLen - 1u);           /* inputB pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two   
-   * inputs of same length. But to improve the performance, we include zeroes   
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the   
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the  
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted  
-   * using convolution but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
-
-  if(srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if(srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
-      }
-    }
-    /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = (q7_t) __SSAT((sum >> 7u), 8u);
-    else
-      *pDst++ = (q7_t) __SSAT((sum >> 7u), 8u);
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**   
- * @} end of Corr group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c
deleted file mode 100644
index 60cd2ad3b3..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c
+++ /dev/null
@@ -1,518 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_f32.c    
-*    
-* Description:	FIR decimation for floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator    
- *    
- * These functions combine an FIR filter together with a decimator.    
- * They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion.    
- * Conceptually, the functions are equivalent to the block diagram below:    
- * \image html FIRDecimator.gif "Components included in the FIR Decimator functions"    
- * When decimating by a factor of M, the signal should be prefiltered by a lowpass filter with a normalized    
- * cutoff frequency of 1/M in order to prevent aliasing distortion.    
- * The user of the function is responsible for providing the filter coefficients.    
- *    
- * The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner.    
- * Instead of calculating all of the FIR filter outputs and discarding M-1 out of every M, only the    
- * samples output by the decimator are computed.    
- * The functions operate on blocks of input and output data.    
- * pSrc points to an array of blockSize input values and    
- * pDst points to an array of blockSize/M output values.    
- * In order to have an integer number of output samples blockSize    
- * must always be a multiple of the decimation factor M.    
- *    
- * The library provides separate functions for Q15, Q31 and floating-point data types.    
- *    
- * \par Algorithm:    
- * The FIR portion of the algorithm uses the standard form filter:    
- * 
    
- *    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
    
- * where, b[n] are the filter coefficients.    
- * \par   
- * The pCoeffs points to a coefficient array of size numTaps.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size numTaps + blockSize - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * The state variables are updated after each block of data is processed, the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable array should be allocated separately.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * - Checks to make sure that the size of the input is a multiple of the decimation factor.    
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- *arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};    
- *arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};    
- *arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};    
- * 
    
- * where M is the decimation factor; numTaps is the number of filter coefficients in the filter;    
- * pCoeffs is the address of the coefficient buffer;    
- * pState is the address of the state buffer.    
- * Be sure to set the values in the state buffer to zeros when doing static initialization.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the FIR decimate filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-  /**    
-   * @brief Processing function for the floating-point FIR decimator.    
-   * @param[in] *S        points to an instance of the floating-point FIR decimator structure.    
-   * @param[in] *pSrc     points to the block of input data.    
-   * @param[out] *pDst    points to the block of output data.    
-   * @param[in] blockSize number of input samples to process per call.    
-   * @return none.    
-   */
-
-void arm_fir_decimate_f32(
-  const arm_fir_decimate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t sum0;                                /* Accumulator */
-  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-#ifndef ARM_MATH_CM0
-
-  uint32_t blkCntN4;
-  float32_t *px0, *px1, *px2, *px3;
-  float32_t acc0, acc1, acc2, acc3;
-  float32_t x1, x2, x3;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 4;
-  blkCntN4 = outBlockSize - (4 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy 4 * decimation factor number of new input samples into the state buffer */
-    i = 4 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulators to zero */
-    acc0 = 0.0f;
-    acc1 = 0.0f;
-    acc2 = 0.0f;
-    acc3 = 0.0f;
-
-    /* Initialize state pointer for all the samples */
-    px0 = pState;
-    px1 = pState + S->M;
-    px2 = pState + 2 * S->M;
-    px3 = pState + 3 * S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample for acc0 */
-      x0 = *(px0++);
-      /* Read x[n-numTaps-1] sample for acc1 */
-      x1 = *(px1++);
-      /* Read x[n-numTaps-1] sample for acc2 */
-      x2 = *(px2++);
-      /* Read x[n-numTaps-1] sample for acc3 */
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch  state variables for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + 4 * S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = acc0;
-    *pDst++ = acc1;
-    *pDst++ = acc2;
-    *pDst++ = acc3;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN4 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = sum0;
-
-    /* Decrement the loop counter */
-    blkCntN4--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor           
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = sum0;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
-  i = (numTaps - 1u);
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0        */
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
deleted file mode 100644
index b3d55464b7..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
+++ /dev/null
@@ -1,590 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_fast_q15.c    
-*    
-* Description:	Fast Q15 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.    
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none    
- *    
- * \par Restrictions   
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE   
- *	In this case input, output, state buffers should be aligned by 32-bit   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around and distorts the result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2).    
- * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.    
- * Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_decimate_init_q15() to initialize the filter structure.    
- */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, x1, c0, c1;                          /* Temporary variables to hold state and coefficient values */
-  q31_t sum0;                                    /* Accumulators */
-  q31_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c1 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c0, sum0);
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c1, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c0, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-#else
-
-
-void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-  q31_t sum0;                                    /* Accumulators */
-  q31_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-3]  coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] and sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] and  sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3]  coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
deleted file mode 100644
index d2f0e5fd07..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
+++ /dev/null
@@ -1,343 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_fast_q31.c    
-*    
-* Description:	Fast Q31 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.    
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none    
- *    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are added to a 2.30 accumulator.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.    
- * Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_decimate_init_q31() to initialize the filter structure.    
- */
-
-void arm_fir_decimate_fast_q31(
-  arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q31_t *px;                                     /* Temporary pointers for state buffer */
-  q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
-  q31_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-  uint32_t blkCntN2;
-  q31_t x1;
-  q31_t acc0, acc1;
-  q31_t *px0, *px1;
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-
-  blkCnt = outBlockSize / 2;
-  blkCntN2 = outBlockSize - (2 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-    px1 = pState + S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb);
-
-      /* Read x[n-numTaps-1] for sample 0 sample 1 */
-      x0 = *(px0);
-      x1 = *(px1);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb + 1u);
-
-      /* Read x[n-numTaps-2]  for sample 0 sample 1  */
-      x0 = *(px0 + 1u);
-      x1 = *(px1 + 1u);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb + 2u);
-
-      /* Read x[n-numTaps-3]  for sample 0 sample 1 */
-      x0 = *(px0 + 2u);
-      x1 = *(px1 + 2u);
-      pb += 4u;
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb - 1u);
-
-      /* Read x[n-numTaps-4] for sample 0 sample 1 */
-      x0 = *(px0 + 3u);
-      x1 = *(px1 + 3u);
-
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* update state pointers */
-      px0 += 4u;
-      px1 += 4u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px0++);
-      x1 = *(px1++);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-    *pDst++ = (q31_t) (acc1 << 1);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN2 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 << 1);
-
-    /* Decrement the loop counter */
-    blkCntN2--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
deleted file mode 100644
index 55c1e991a8..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_decimate_init_f32.c    
-*    
-* Description:  Floating-point FIR Decimator initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the floating-point FIR decimator.    
- * @param[in,out] *S points to an instance of the floating-point FIR decimator structure.    
- * @param[in] numTaps  number of coefficients in the filter.    
- * @param[in] M  decimation factor.    
- * @param[in] *pCoeffs points to the filter coefficients.    
- * @param[in] *pState points to the state buffer.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * blockSize is not a multiple of M.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_f32().    
- * M is the decimation factor.    
- */
-
-arm_status arm_fir_decimate_init_f32(
-  arm_fir_decimate_instance_f32 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if((blockSize % M) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear state buffer and size is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation Factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
deleted file mode 100644
index a6ccab926d..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_decimate_init_q15.c    
-*    
-* Description:  Initialization function for the Q15 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q15 FIR decimator.    
- * @param[in,out] *S points to an instance of the Q15 FIR decimator structure.    
- * @param[in] numTaps  number of coefficients in the filter.    
- * @param[in] M  decimation factor.    
- * @param[in] *pCoeffs points to the filter coefficients.    
- * @param[in] *pState points to the state buffer.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * blockSize is not a multiple of M.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples    
- * to the call arm_fir_decimate_q15().    
- * M is the decimation factor.    
- */
-
-arm_status arm_fir_decimate_init_q15(
-  arm_fir_decimate_instance_q15 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if((blockSize % M) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer.  The size of buffer is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
deleted file mode 100644
index 046ac1aa31..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_decimate_init_q31.c    
-*    
-* Description:  Initialization function for Q31 FIR Decimation filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q31 FIR decimator.    
- * @param[in,out] *S points to an instance of the Q31 FIR decimator structure.    
- * @param[in] numTaps  number of coefficients in the filter.    
- * @param[in] M  decimation factor.    
- * @param[in] *pCoeffs points to the filter coefficients.    
- * @param[in] *pState points to the state buffer.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * blockSize is not a multiple of M.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_q31().    
- * M is the decimation factor.    
- */
-
-arm_status arm_fir_decimate_init_q31(
-  arm_fir_decimate_instance_q31 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if((blockSize % M) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(q31_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c
deleted file mode 100644
index 3fead69284..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c
+++ /dev/null
@@ -1,691 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_q15.c    
-*    
-* Description:	Q15 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 FIR decimator.    
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the location where the output result is written.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-#ifndef ARM_MATH_CM0
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, x1, c0, c1;                          /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  q63_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c1 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c0, sum0);
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c1, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c0, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-#else
-
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  q63_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] and sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] and  sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3]  coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#else
-
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q31_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor           
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /*Store filter output , smlad will return the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = numTaps - 1u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-}
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c
deleted file mode 100644
index 72bf76c3a2..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c
+++ /dev/null
@@ -1,306 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_q31.c    
-*    
-* Description:	Q31 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 FIR decimator.    
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).    
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_fir_decimate_q31(
-  const arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q31_t *px;                                     /* Temporary pointers for state buffer */
-  q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
-  q63_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.    
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor    
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 >> 31);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor           
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 >> 31);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = numTaps - 1u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c
deleted file mode 100644
index a407131e8a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c
+++ /dev/null
@@ -1,554 +0,0 @@
-/* ----------------------------------------------------------------------  
-* Copyright (C) 2010 ARM Limited. All rights reserved.  
-*  
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*  
-* Project: 	    CMSIS DSP Library  
-* Title:	    arm_fir_f32.c  
-*  
-* Description:	Floating-point FIR filter processing function.  
-*  
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.2 2010/11/11  
-*    Documentation updated.   
-*  
-* Version 1.0.1 2010/10/05   
-*    Production release and review comments incorporated.  
-*  
-* Version 1.0.0 2010/09/20   
-*    Production release and review comments incorporated.  
-*  
-* Version 0.0.5  2010/04/26   
-* 	 incorporated review comments and updated with latest CMSIS layer  
-*  
-* Version 0.0.3  2010/03/10   
-*    Initial version  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**  
- * @ingroup groupFilters  
- */
-
-/**  
- * @defgroup FIR Finite Impulse Response (FIR) Filters  
- *  
- * This set of functions implements Finite Impulse Response (FIR) filters  
- * for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31 are also provided.  
- * The functions operate on blocks of input and output data and each call to the function processes  
- * blockSize samples through the filter.  pSrc and  
- * pDst points to input and output arrays containing blockSize values.  
- *  
- * \par Algorithm:  
- * The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.  
- * Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n].  
- * 
  
- *    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]  
- * 
  
- * \par  
- * \image html FIR.gif "Finite Impulse Response filter"  
- * \par  
- * pCoeffs points to a coefficient array of size numTaps.  
- * Coefficients are stored in time reversed order.  
- * \par  
- * 
  
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}  
- * 
  
- * \par  
- * pState points to a state array of size numTaps + blockSize - 1.  
- * Samples in the state buffer are stored in the following order.  
- * \par  
- * 
  
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}  
- * 
  
- * \par  
- * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1.  
- * The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,  
- * to be avoided and yields a significant speed improvement.  
- * The state variables are updated after each block of data is processed; the coefficients are untouched.  
- * \par Instance Structure  
- * The coefficients and state variables for a filter are stored together in an instance data structure.  
- * A separate instance structure must be defined for each filter.  
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.  
- * There are separate instance structure declarations for each of the 4 supported data types.  
- *  
- * \par Initialization Functions  
- * There is also an associated initialization function for each data type.  
- * The initialization function performs the following operations:  
- * - Sets the values of the internal structure fields.  
- * - Zeros out the values in the state buffer.  
- *  
- * \par  
- * Use of the initialization function is optional.  
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.  
- * To place an instance structure into a const data section, the instance structure must be manually initialized.  
- * Set the values in the state buffer to zeros before static initialization.  
- * The code below statically initializes each of the 4 different data type filter instance structures  
- * 
  
- *arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};  
- *arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};  
- *arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};  
- *arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};  
- * 
  
- *  
- * where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer;  
- * pCoeffs is the address of the coefficient buffer.  
- *  
- * \par Fixed-Point Behavior  
- * Care must be taken when using the fixed-point versions of the FIR filter functions.  
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.  
- * Refer to the function specific documentation below for usage guidelines.  
- */
-
-/**  
- * @addtogroup FIR  
- * @{  
- */
-
-/**  
- *  
- * @param[in]  *S points to an instance of the floating-point FIR filter structure.  
- * @param[in]  *pSrc points to the block of input data.  
- * @param[out] *pDst points to the block of output data.  
- * @param[in]  blockSize number of samples to process per call.  
- * @return     none.  
- *  
- */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_f32(
-  const arm_fir_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
-  float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0;  /* Temporary variables to hold state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.  
-   * The variables acc0 ... acc3 hold output values that are being computed:  
-   *  
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]  
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]  
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]  
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]  
-   */
-  blkCnt = blockSize >> 3;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.  
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0.0f;
-    acc1 = 0.0f;
-    acc2 = 0.0f;
-    acc3 = 0.0f;
-    acc4 = 0.0f;
-    acc5 = 0.0f;
-    acc6 = 0.0f;
-    acc7 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the first three samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *px++;
-    x1 = *px++;
-    x2 = *px++;
-    x3 = *px++;
-    x4 = *px++;
-    x5 = *px++;
-    x6 = *px++;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 3u;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.  
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x7 = *(px++);
-
-      /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
-      acc0 += x0 * c0;
-
-      /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
-      acc1 += x1 * c0;
-
-      /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
-      acc2 += x2 * c0;
-
-      /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
-      acc3 += x3 * c0;
-
-      /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
-      acc4 += x4 * c0;
-
-      /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
-      acc5 += x5 * c0;
-
-      /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
-      acc6 += x6 * c0;
-
-      /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
-      acc7 += x7 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x1 * c0;
-      acc1 += x2 * c0;
-      acc2 += x3 * c0;
-      acc3 += x4 * c0;
-      acc4 += x5 * c0;
-      acc5 += x6 * c0;
-      acc6 += x7 * c0;
-      acc7 += x0 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x2 * c0;
-      acc1 += x3 * c0;
-      acc2 += x4 * c0;
-      acc3 += x5 * c0;
-      acc4 += x6 * c0;
-      acc5 += x7 * c0;
-      acc6 += x0 * c0;
-      acc7 += x1 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x3 * c0;
-      acc1 += x4 * c0;
-      acc2 += x5 * c0;
-      acc3 += x6 * c0;
-      acc4 += x7 * c0;
-      acc5 += x0 * c0;
-      acc6 += x1 * c0;
-      acc7 += x2 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x3 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x4 * c0;
-      acc1 += x5 * c0;
-      acc2 += x6 * c0;
-      acc3 += x7 * c0;
-      acc4 += x0 * c0;
-      acc5 += x1 * c0;
-      acc6 += x2 * c0;
-      acc7 += x3 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x4 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x5 * c0;
-      acc1 += x6 * c0;
-      acc2 += x7 * c0;
-      acc3 += x0 * c0;
-      acc4 += x1 * c0;
-      acc5 += x2 * c0;
-      acc6 += x3 * c0;
-      acc7 += x4 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x5 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x6 * c0;
-      acc1 += x7 * c0;
-      acc2 += x0 * c0;
-      acc3 += x1 * c0;
-      acc4 += x2 * c0;
-      acc5 += x3 * c0;
-      acc6 += x4 * c0;
-      acc7 += x5 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x6 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x7 * c0;
-      acc1 += x0 * c0;
-      acc2 += x1 * c0;
-      acc3 += x2 * c0;
-      acc4 += x3 * c0;
-      acc5 += x4 * c0;
-      acc6 += x5 * c0;
-      acc7 += x6 * c0;
-
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x8u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x7 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-      acc4 += x4 * c0;
-      acc5 += x5 * c0;
-      acc6 += x6 * c0;
-      acc7 += x7 * c0;
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-      x3 = x4;
-      x4 = x5;
-      x5 = x6;
-      x6 = x7;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 8;
-
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    *pDst++ = acc0;
-    *pDst++ = acc1;
-    *pDst++ = acc2;
-    *pDst++ = acc3;
-    *pDst++ = acc4;
-    *pDst++ = acc5;
-    *pDst++ = acc6;
-    *pDst++ = acc7;
-
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.  
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x8u;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 += *px++ * *pb++;
-      i--;
-
-    } while(i > 0u);
-
-    /* The result is store in the destination buffer. */
-    *pDst++ = acc0;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    blkCnt--;
-  }
-
-  /* Processing is complete.  
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.  
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else
-
-void arm_fir_f32(
-  const arm_fir_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t acc;
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += *px++ * *pb++;
-      i--;
-
-    } while(i > 0u);
-
-    /* The result is store in the destination buffer. */
-    *pDst++ = acc;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the starting of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
-  tapCnt = numTaps - 1u;
-
-  /* Copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-/**  
- * @} end of FIR group  
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c
deleted file mode 100644
index 02634327bc..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c
+++ /dev/null
@@ -1,341 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_fast_q15.c    
-*    
-* Description:  Q15 Fast FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.9  2010/08/16     
-*    Initial version    
-*    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in] *S points to an instance of the Q15 FIR filter structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around and distorts the result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.    
- * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.    
- *    
- * \par    
- * Refer to the function arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_init_q15() to initialize the filter structure.    
- */
-
-void arm_fir_fast_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q15_t *px;                                     /* Temporary q31 pointer for SIMD state buffer accesses */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold SIMD state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.      
-   * The variables acc0 ... acc3 hold output values that are being computed:      
-   *      
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]      
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]      
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]      
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]      
-   */
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.      
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer.      
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
-    px = pState;
-
-    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = *__SIMD32(px)++;
-
-    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
-    x2 = *__SIMD32(px)++;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.      
-     ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLAD(x0, c0, acc0);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLAD(x2, c0, acc2);
-
-      /* pack  x[n-N-1] and x[n-N-2] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack  x[n-N-3] and x[n-N-4] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLADX(x1, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLAD(x2, c0, acc0);
-
-      /* Read state x[n-N-6], x[n-N-7] with offset */
-      x2 = _SIMD32_OFFSET(px + 2u);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLAD(x0, c0, acc2);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack  x[n-N-5] and x[n-N-6] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLADX(x1, c0, acc3);
-
-      /* Update state pointer for next state reading */
-      px += 4u;
-
-      /* Decrement tap count */
-      tapCnt--;
-
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.       
-     ** This is always be 2 taps since the filter length is even. */
-    if((numTaps & 0x3u) != 0u)
-    {
-
-      /* Read last two coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLAD(x0, c0, acc0);
-      acc2 = __SMLAD(x2, c0, acc2);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read last state variables */
-      x0 = *__SIMD32(px);
-
-      /* Perform the multiply-accumulates */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* Perform the multiply-accumulates */
-      acc3 = __SMLADX(x1, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.      
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-  while(blkCnt > 0u)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Use SIMD to hold states and coefficients */
-    px = pState;
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1u;
-
-    do
-    {
-
-      acc0 += (q31_t) * px++ * *pb++;
-	  acc0 += (q31_t) * px++ * *pb++;
-
-      tapCnt--;
-    }
-    while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.      
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.      
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.      
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy remaining data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c
deleted file mode 100644
index eeccb6c8a0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c
+++ /dev/null
@@ -1,309 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_fast_q31.c    
-*    
-* Description:	Processing function for the Q31 Fast FIR filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.9  2010/08/27     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in] *S points to an instance of the Q31 structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block output data.    
- * @param[in] blockSize number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are added to a 2.30 accumulator.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.    
- *    
- * \par    
- * Refer to the function arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_init_q31() to initialize the filter structure.    
- */
-
-void arm_fir_fast_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, x1, x2, x3;                          /* Temporary variables to hold state */
-  q31_t c0;                                      /* Temporary variable to hold coefficient value */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.    
-   * The variables acc0 ... acc3 hold output values that are being computed:    
-   *    
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]    
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]    
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]    
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]    
-   */
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first three samples from the state buffer:    
-     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *(px++);
-    x1 = *(px++);
-    x2 = *(px++);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-    i = tapCnt;
-
-    while(i > 0u)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x3 = *(px++);
-
-      /* acc0 +=  b[numTaps] * x[n-numTaps] */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-      i--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-
-    i = numTaps - (tapCnt * 4u);
-    while(i > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x3 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.31    
-     ** Then store the 4 outputs in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-    *pDst++ = (q31_t) (acc1 << 1);
-    *pDst++ = (q31_t) (acc2 << 1);
-    *pDst++ = (q31_t) (acc3 << 1);
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 =
-        (q31_t) ((((q63_t) acc0 << 32) +
-                  ((q63_t) (*px++) * (*(pb++)))) >> 32);
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.31    
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c
deleted file mode 100644
index 4665ad135d..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_init_f32.c    
-*    
-* Description:  Floating-point FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S points to an instance of the floating-point FIR filter structure.    
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs points to the filter coefficients buffer.    
- * @param[in]     *pState points to the state buffer.    
- * @param[in] 	  blockSize number of samples that are processed per call.    
- * @return 		  none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().    
- */
-
-void arm_fir_init_f32(
-  arm_fir_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c
deleted file mode 100644
index cb113916ff..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_init_q15.c    
-*    
-* Description:  Q15 FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in,out]  *S points to an instance of the Q15 FIR filter structure.    
- * @param[in] 	   numTaps  Number of filter coefficients in the filter. Must be even and greater than or equal to 4.    
- * @param[in]      *pCoeffs points to the filter coefficients buffer.    
- * @param[in]      *pState points to the state buffer.    
- * @param[in]      blockSize is number of samples processed per call.    
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if    
- * numTaps is not greater than or equal to 4 and even.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * Note that numTaps must be even and greater than or equal to 4.    
- * To implement an odd length filter simply increase numTaps by 1 and set the last coefficient to zero.    
- * For example, to implement a filter with numTaps=3 and coefficients    
- * 
    
- *     {0.3, -0.8, 0.3}    
- * 
    
- * set numTaps=4 and use the coefficients:    
- * 
    
- *     {0.3, -0.8, 0.3, 0}.    
- * 
    
- * Similarly, to implement a two point filter    
- * 
    
- *     {0.3, -0.3}    
- * 
    
- * set numTaps=4 and use the coefficients:    
- * 
    
- *     {0.3, -0.3, 0, 0}.    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize, when running on Cortex-M4 and Cortex-M3  and is of length numTaps+blockSize-1, when running on Cortex-M0 where blockSize is the number of input samples processed by each call to arm_fir_q15().    
- */
-
-arm_status arm_fir_init_q15(
-  arm_fir_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* The Number of filter coefficients in the filter must be even and at least 4 */
-  if(numTaps & 0x1u)
-  {
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer.  The size is always (blockSize + numTaps ) */
-    memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  status = ARM_MATH_SUCCESS;
-
-  return (status);
-
-#endif /*  #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c
deleted file mode 100644
index 121db2a886..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_init_q31.c    
-*    
-* Description:	Q31 FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S points to an instance of the Q31 FIR filter structure.    
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
- * @param[in] 	  *pCoeffs points to the filter coefficients buffer.    
- * @param[in] 	  *pState points to the state buffer.    
- * @param[in] 	  blockSize number of samples that are processed per call.    
- * @return        none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().    
- */
-
-void arm_fir_init_q31(
-  arm_fir_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
-  memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c
deleted file mode 100644
index 1ea905cb6a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_init_q7.c    
-*    
-* Description:  Q7 FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-/**    
- * @param[in,out] *S points to an instance of the Q7 FIR filter structure.    
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
- * @param[in] 	  *pCoeffs points to the filter coefficients buffer.    
- * @param[in]     *pState points to the state buffer.    
- * @param[in]     blockSize number of samples that are processed per call.    
- * @return     	  none    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().    
- */
-
-void arm_fir_init_q7(
-  arm_fir_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  uint32_t blockSize)
-{
-
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c
deleted file mode 100644
index 24e072cdec..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c
+++ /dev/null
@@ -1,574 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_interpolate_f32.c    
-*    
-* Description:	FIR interpolation for floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator    
- *    
- * These functions combine an upsampler (zero stuffer) and an FIR filter.    
- * They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.    
- * Conceptually, the functions are equivalent to the block diagram below:    
- * \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"    
- * After upsampling by a factor of L, the signal should be filtered by a lowpass filter with a normalized    
- * cutoff frequency of 1/L in order to eliminate high frequency copies of the spectrum.    
- * The user of the function is responsible for providing the filter coefficients.    
- *    
- * The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.    
- * The upsampler inserts L-1 zeros between each sample.    
- * Instead of multiplying by these zero values, the FIR filter is designed to skip them.    
- * This leads to an efficient implementation without any wasted effort.    
- * The functions operate on blocks of input and output data.    
- * pSrc points to an array of blockSize input values and    
- * pDst points to an array of blockSize*L output values.    
- *    
- * The library provides separate functions for Q15, Q31, and floating-point data types.    
- *    
- * \par Algorithm:    
- * The functions use a polyphase filter structure:    
- * 
    
- *    y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]    
- *    y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]    
- *    ...    
- *    y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]    
- * 
    
- * This approach is more efficient than straightforward upsample-then-filter algorithms.    
- * With this method the computation is reduced by a factor of 1/L when compared to using a standard FIR filter.    
- * \par    
- * pCoeffs points to a coefficient array of size numTaps.    
- * numTaps must be a multiple of the interpolation factor L and this is checked by the    
- * initialization functions.    
- * Internally, the function divides the FIR filter's impulse response into shorter filters of length    
- * phaseLength=numTaps/L.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size blockSize + phaseLength - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * The state variables are updated after each block of data is processed, the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable array should be allocated separately.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * - Checks to make sure that the length of the filter is a multiple of the interpolation factor.    
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- * arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};    
- * arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};    
- * arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};    
- * 
    
- * where L is the interpolation factor; phaseLength=numTaps/L is the    
- * length of each of the shorter FIR filters used internally,    
- * pCoeffs is the address of the coefficient buffer;    
- * pState is the address of the state buffer.    
- * Be sure to set the values in the state buffer to zeros when doing static initialization.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point FIR interpolator.    
- * @param[in] *S        points to an instance of the floating-point FIR interpolator structure.    
- * @param[in] *pSrc     points to the block of input data.    
- * @param[out] *pDst    points to the block of output data.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- */
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
-  float32_t sum0;                                /* Accumulators */
-  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j;                         /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-  float32_t acc0, acc1, acc2, acc3;
-  float32_t x1, x2, x3;
-  uint32_t blkCntN4;
-  float32_t c1, c2, c3;
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1u);
-
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 4;
-  blkCntN4 = blockSize - (4 * blkCnt);
-
-  /* Samples loop unrolled by 4 */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-
-      x0 = *(ptr1++);
-      x1 = *(ptr1++);
-      x2 = *(ptr1++);
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x0 * c0;
-        acc1 += x1 * c0;
-        acc2 += x2 * c0;
-        acc3 += x3 * c0;
-
-        /* Read the coefficient */
-        c1 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x1 * c1;
-        acc1 += x2 * c1;
-        acc2 += x3 * c1;
-        acc3 += x0 * c1;
-
-        /* Read the coefficient */
-        c2 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x2 * c2;
-        acc1 += x3 * c2;
-        acc2 += x0 * c2;
-        acc3 += x1 * c2;
-
-        /* Read the coefficient */
-        c3 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x2 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x3 * c3;
-        acc1 += x0 * c3;
-        acc2 += x1 * c3;
-        acc3 += x2 * c3;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x0 * c0;
-        acc1 += x1 * c0;
-        acc2 += x2 * c0;
-        acc3 += x3 * c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = acc0;
-      *(pDst + S->L) = acc1;
-      *(pDst + 2 * S->L) = acc2;
-      *(pDst + 3 * S->L) = acc3;
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 4;
-
-    pDst += S->L * 3;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-
-  while(blkCntN4 > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-      while(tapCnt > 0u)
-      {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += *(ptr1++) * (*ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = sum0;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCntN4--;
-  }
-
-  /* Processing is complete.        
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.        
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (phaseLen - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  tapCnt = (phaseLen - 1u) % 0x04u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
-
-
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1u);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1u);
-
-      /* Loop over the polyPhase length */
-      tapCnt = phaseLen;
-
-      while(tapCnt > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *ptr1++ * *ptr2;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = sum;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1           
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = phaseLen - 1u;
-
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
deleted file mode 100644
index 097c883b6c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_interpolate_init_f32.c    
-*    
-* Description:  Floating-point FIR interpolator initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the floating-point FIR interpolator.    
- * @param[in,out] *S        points to an instance of the floating-point FIR interpolator structure.    
- * @param[in]     L         upsample factor.    
- * @param[in]     numTaps   number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.    
- * @param[in]     *pState   points to the state buffer.    
- * @param[in]     blockSize number of input samples to process per call.    
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * the filter length numTaps is not a multiple of the interpolation factor L.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
    
- * The length of the filter numTaps must be a multiple of the interpolation factor L.    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length (numTaps/L)+blockSize-1 words    
- * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_f32().    
- */
-
-arm_status arm_fir_interpolate_init_f32(
-  arm_fir_interpolate_instance_f32 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if((numTaps % L) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of state array is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize +
-            ((uint32_t) S->phaseLength - 1u)) * sizeof(float32_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
deleted file mode 100644
index d147d10b3a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_interpolate_init_q15.c    
-*    
-* Description:  Q15 FIR interpolator initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q15 FIR interpolator.    
- * @param[in,out] *S        points to an instance of the Q15 FIR interpolator structure.    
- * @param[in]     L         upsample factor.    
- * @param[in]     numTaps   number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.    
- * @param[in]     *pState   points to the state buffer.    
- * @param[in]     blockSize number of input samples to process per call.    
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * the filter length numTaps is not a multiple of the interpolation factor L.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
    
- * The length of the filter numTaps must be a multiple of the interpolation factor L.    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length (numTaps/L)+blockSize-1 words    
- * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q15().    
- */
-
-arm_status arm_fir_interpolate_init_q15(
-  arm_fir_interpolate_instance_q15 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if((numTaps % L) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
deleted file mode 100644
index 21e25dd542..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_interpolate_init_q31.c    
-*    
-* Description:  Q31 FIR interpolator initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-
-/**    
- * @brief  Initialization function for the Q31 FIR interpolator.    
- * @param[in,out] *S        points to an instance of the Q31 FIR interpolator structure.    
- * @param[in]     L         upsample factor.    
- * @param[in]     numTaps   number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.    
- * @param[in]     *pState   points to the state buffer.    
- * @param[in]     blockSize number of input samples to process per call.    
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * the filter length numTaps is not a multiple of the interpolation factor L.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
    
- * The length of the filter numTaps must be a multiple of the interpolation factor L.    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length (numTaps/L)+blockSize-1 words    
- * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q31().    
- */
-
-arm_status arm_fir_interpolate_init_q31(
-  arm_fir_interpolate_instance_q31 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if((numTaps % L) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q31_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c
deleted file mode 100644
index 3f11c47ae4..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c
+++ /dev/null
@@ -1,503 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fir_interpolate_q15.c    
-*    
-* Description:	Q15 FIR interpolation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 FIR interpolator.    
- * @param[in] *S        points to an instance of the Q15 FIR interpolator structure.    
- * @param[in] *pSrc     points to the block of input data.    
- * @param[out] *pDst    points to the block of output data.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer                                            */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
-  q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
-  q63_t sum0;                                    /* Accumulators                                             */
-  q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j, tapCnt;                 /* Loop counters                                            */
-  uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-  uint32_t blkCntN2;
-  q63_t acc0, acc1;
-  q15_t x1;
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
-
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 2;
-  blkCntN2 = blockSize - (2 * blkCnt);
-
-  /* Samples loop unrolled by 2 */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0;
-      acc1 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-
-      x0 = *(ptr1++);
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = (q15_t) (__SSAT((acc0 >> 15), 16));
-      *(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 2;
-
-    pDst += S->L;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blkCntN2;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2;
-      while(tapCnt > 0u)
-      {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen & 0x3u;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-  /* Processing is complete.    
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = ((uint32_t) phaseLen - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
-    *pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-	
-	/* Decrement the loop counter */
-    i--;
-  }
-
-  i = ((uint32_t) phaseLen - 1u) % 0x04u;
-
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer                                            */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
-  q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
-  q63_t sum;                                     /* Accumulator */
-  q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, tapCnt;                    /* Loop counters                                            */
-  uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1u);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1u);
-
-      /* Loop over the polyPhase length */
-      tapCnt = (uint32_t) phaseLen;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *ptr2;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *ptr1++;
-
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) x0 * c0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Store the result after converting to 1.15 format in the destination buffer */
-      *pDst++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1           
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (uint32_t) phaseLen - 1u;
-
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c
deleted file mode 100644
index 05e64e1465..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c
+++ /dev/null
@@ -1,499 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fir_interpolate_q31.c    
-*    
-* Description:	Q31 FIR interpolation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 FIR interpolator.    
- * @param[in] *S        points to an instance of the Q31 FIR interpolator structure.    
- * @param[in] *pSrc     points to the block of input data.    
- * @param[out] *pDst    points to the block of output data.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 1/(numTaps/L).    
- * since numTaps/L additions occur per output sample.    
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.    
- */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
-  q63_t sum0;                                    /* Accumulators */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j;                         /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-
-  uint32_t blkCntN2;
-  q63_t acc0, acc1;
-  q31_t x1;
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
-
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 2;
-  blkCntN2 = blockSize - (2 * blkCnt);
-
-  /* Samples loop unrolled by 2 */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0;
-      acc1 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-
-      x0 = *(ptr1++);
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = (q31_t) (acc0 >> 31);
-      *(pDst + S->L) = (q31_t) (acc1 >> 31);
-
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 2;
-
-    pDst += S->L;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blkCntN2;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2;
-      while(tapCnt > 0u)
-      {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen & 0x3u;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q31_t) (sum0 >> 31);
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.        
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.        
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (phaseLen - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  tapCnt = (phaseLen - 1u) % 0x04u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-
-#else
-
-void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
-
-  /* Run the below code for Cortex-M0 */
-
-  q63_t sum;                                     /* Accumulator */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1u);
-
-      tapCnt = phaseLen;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *ptr1++;
-
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q31_t) (sum >> 31);
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1           
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = phaseLen - 1u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c
deleted file mode 100644
index 3b5fc9408f..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c
+++ /dev/null
@@ -1,499 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_lattice_f32.c    
-*    
-* Description:	Processing function for the floating-point FIR Lattice filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters    
- *    
- * This set of functions implements Finite Impulse Response (FIR) lattice filters    
- * for Q15, Q31 and floating-point data types.  Lattice filters are used in a     
- * variety of adaptive filter applications.  The filter structure is feedforward and    
- * the net impulse response is finite length.    
- * The functions operate on blocks    
- * of input and output data and each call to the function processes    
- * blockSize samples through the filter.  pSrc and    
- * pDst point to input and output arrays containing blockSize values.    
- *    
- * \par Algorithm:    
- * \image html FIRLattice.gif "Finite Impulse Response Lattice filter"    
- * The following difference equation is implemented:    
- * 
    
- *    f0[n] = g0[n] = x[n]    
- *    fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M    
- *    gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M    
- *    y[n] = fM[n]    
- * 
    
- * \par    
- * pCoeffs points to tha array of reflection coefficients of size numStages.    
- * Reflection Coefficients are stored in the following order.    
- * \par    
- * 
    
- *    {k1, k2, ..., kM}    
- * 
    
- * where M is number of stages    
- * \par    
- * pState points to a state array of size numStages.    
- * The state variables (g values) hold previous inputs and are stored in the following order.    
- * 
    
- *    {g0[n], g1[n], g2[n] ...gM-1[n]}    
- * 
    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:    
- * 
    
- *arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};    
- *arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};    
- *arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};    
- * 
    
- * \par    
- * where numStages is the number of stages in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer.    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-
-  /**    
-   * @brief Processing function for the floating-point FIR lattice filter.    
-   * @param[in]  *S        points to an instance of the floating-point FIR lattice structure.    
-   * @param[in]  *pSrc     points to the block of input data.    
-   * @param[out] *pDst     points to the block of output data    
-   * @param[in]  blockSize number of samples to process.    
-   * @return none.    
-   */
-
-void arm_fir_lattice_f32(
-  const arm_fir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState;                             /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *px;                                 /* temporary state pointer */
-  float32_t *pk;                                 /* temporary coefficient pointer */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t fcurr1, fnext1, gcurr1, gnext1;      /* temporary variables for first sample in loop unrolling */
-  float32_t fcurr2, fnext2, gnext2;              /* temporary variables for second sample in loop unrolling */
-  float32_t fcurr3, fnext3, gnext3;              /* temporary variables for third sample in loop unrolling */
-  float32_t fcurr4, fnext4, gnext4;              /* temporary variables for fourth sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  gcurr1 = 0.0f;
-  pState = &S->pState[0];
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* Read two samples from input buffer */
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-    fcurr2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Read g0(n-1) from state */
-    gcurr1 = *px;
-
-    /* Process first sample for first tap */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = fcurr1 + ((*pk) * gcurr1);
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (fcurr1 * (*pk)) + gcurr1;
-
-    /* Process second sample for first tap */
-    /* for sample 2 processing */
-    fnext2 = fcurr2 + ((*pk) * fcurr1);
-    gnext2 = (fcurr2 * (*pk)) + fcurr1;
-
-    /* Read next two samples from input buffer */
-    /* f0(n+2) = x(n+2) */
-    fcurr3 = *pSrc++;
-    fcurr4 = *pSrc++;
-
-    /* Copy only last input samples into the state buffer    
-       which will be used for next four samples processing */
-    *px++ = fcurr4;
-
-    /* Process third sample for first tap */
-    fnext3 = fcurr3 + ((*pk) * fcurr2);
-    gnext3 = (fcurr3 * (*pk)) + fcurr2;
-
-    /* Process fourth sample for first tap */
-    fnext4 = fcurr4 + ((*pk) * fcurr3);
-    gnext4 = (fcurr4 * (*pk++)) + fcurr3;
-
-    /* Update of f values for next coefficient set processing */
-    fcurr1 = fnext1;
-    fcurr2 = fnext2;
-    fcurr3 = fnext3;
-    fcurr4 = fnext4;
-
-    /* Loop unrolling.  Process 4 taps at a time . */
-    stageCnt = (numStages - 1u) >> 2u;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.    
-     ** Repeat until we've computed numStages-3 coefficients. */
-
-    /* Process 2nd, 3rd, 4th and 5th taps ... here */
-    while(stageCnt > 0u)
-    {
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Process first sample for 2nd, 6th .. tap */
-      /* Sample processing for K2, K6.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      /* Process second sample for 2nd, 6th .. tap */
-      /* for sample 2 processing */
-      fnext2 = fcurr2 + ((*pk) * gnext1);
-      /* Process third sample for 2nd, 6th .. tap */
-      fnext3 = fcurr3 + ((*pk) * gnext2);
-      /* Process fourth sample for 2nd, 6th .. tap */
-      fnext4 = fcurr4 + ((*pk) * gnext3);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g2(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Sample processing for K3, K7.... */
-      /* Process first sample for 3rd, 7th .. tap */
-      /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurr1 = fnext1 + ((*pk) * gcurr1);
-      /* Process second sample for 3rd, 7th .. tap */
-      fcurr2 = fnext2 + ((*pk) * gnext1);
-      /* Process third sample for 3rd, 7th .. tap */
-      fcurr3 = fnext3 + ((*pk) * gnext2);
-      /* Process fourth sample for 3rd, 7th .. tap */
-      fcurr4 = fnext4 + ((*pk) * gnext3);
-
-      /* Calculation of state values for next stage */
-      /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext4 = (fnext4 * (*pk)) + gnext3;
-      gnext3 = (fnext3 * (*pk)) + gnext2;
-      gnext2 = (fnext2 * (*pk)) + gnext1;
-      gnext1 = (fnext1 * (*pk++)) + gcurr1;
-
-
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g3(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Sample processing for K4, K8.... */
-      /* Process first sample for 4th, 8th .. tap */
-      /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      /* Process second sample for 4th, 8th .. tap */
-      /* for sample 2 processing */
-      fnext2 = fcurr2 + ((*pk) * gnext1);
-      /* Process third sample for 4th, 8th .. tap */
-      fnext3 = fcurr3 + ((*pk) * gnext2);
-      /* Process fourth sample for 4th, 8th .. tap */
-      fnext4 = fcurr4 + ((*pk) * gnext3);
-
-      /* g4(n) = f3(n) * K4  +  g3(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g4(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Sample processing for K5, K9.... */
-      /* Process first sample for 5th, 9th .. tap */
-      /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurr1 = fnext1 + ((*pk) * gcurr1);
-      /* Process second sample for 5th, 9th .. tap */
-      fcurr2 = fnext2 + ((*pk) * gnext1);
-      /* Process third sample for 5th, 9th .. tap */
-      fcurr3 = fnext3 + ((*pk) * gnext2);
-      /* Process fourth sample for 5th, 9th .. tap */
-      fcurr4 = fnext4 + ((*pk) * gnext3);
-
-      /* Calculation of state values for next stage */
-      /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext4 = (fnext4 * (*pk)) + gnext3;
-      gnext3 = (fnext3 * (*pk)) + gnext2;
-      gnext2 = (fnext2 * (*pk)) + gnext1;
-      gnext1 = (fnext1 * (*pk++)) + gcurr1;
-
-      stageCnt--;
-    }
-
-    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
-    stageCnt = (numStages - 1u) % 0x4u;
-
-    while(stageCnt > 0u)
-    {
-      gcurr1 = *px;
-
-      /* save g value in state buffer */
-      *px++ = gnext4;
-
-      /* Process four samples for last three taps here */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      fnext2 = fcurr2 + ((*pk) * gnext1);
-      fnext3 = fcurr3 + ((*pk) * gnext2);
-      fnext4 = fcurr4 + ((*pk) * gnext3);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-      /* Update of f values for next coefficient set processing */
-      fcurr1 = fnext1;
-      fcurr2 = fnext2;
-      fcurr3 = fnext3;
-      fcurr4 = fnext4;
-
-      stageCnt--;
-
-    }
-
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-    *pDst++ = fcurr2;
-    *pDst++ = fcurr3;
-    *pDst++ = fcurr4;
-
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g2(n) from state buffer */
-    gcurr1 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = fcurr1 + ((*pk) * gcurr1);
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr1;
-
-    /* f1(n) is saved in fcurr1    
-       for next stage processing */
-    fcurr1 = fnext1;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-      /* f1(n) is saved in fcurr1    
-         for next stage processing */
-      fcurr1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-
-    blkCnt--;
-
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t fcurr, fnext, gcurr, gnext;          /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n-1) from state buffer */
-    gcurr = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = fcurr + ((*pk) * gcurr);
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = (fcurr * (*pk++)) + gcurr;
-
-    /* save f0(n) in state buffer */
-    *px++ = fcurr;
-
-    /* f1(n) is saved in fcurr            
-       for next stage processing */
-    fcurr = fnext;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurr = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = fcurr + ((*pk) * gcurr);
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = (fcurr * (*pk++)) + gcurr;
-
-      /* f1(n) is saved in fcurr1            
-         for next stage processing */
-      fcurr = fnext;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr;
-
-    blkCnt--;
-
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
deleted file mode 100644
index 13f3bab16b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_lattice_init_f32.c    
-*    
-* Description:  Floating-point FIR Lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Initialization function for the floating-point FIR lattice filter.    
- * @param[in] *S points to an instance of the floating-point FIR lattice structure.    
- * @param[in] numStages  number of filter stages.    
- * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.    
- * @param[in] *pState points to the state buffer.  The array is of length numStages.    
- * @return none.    
- */
-
-void arm_fir_lattice_init_f32(
-  arm_fir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
deleted file mode 100644
index 8bdc71a7c8..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_lattice_init_q15.c    
-*    
-* Description:  Q15 FIR Lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q15 FIR lattice filter.    
-   * @param[in] *S points to an instance of the Q15 FIR lattice structure.    
-   * @param[in] numStages  number of filter stages.    
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.     
-   * @param[in] *pState points to the state buffer.  The array is of length numStages.     
-   * @return none.    
-   */
-
-void arm_fir_lattice_init_q15(
-  arm_fir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
deleted file mode 100644
index b79d3844f2..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_lattice_init_q31.c    
-*    
-* Description:  Q31 FIR lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q31 FIR lattice filter.    
-   * @param[in] *S points to an instance of the Q31 FIR lattice structure.    
-   * @param[in] numStages  number of filter stages.    
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.    
-   * @param[in] *pState points to the state buffer.   The array is of length numStages.    
-   * @return none.    
-   */
-
-void arm_fir_lattice_init_q31(
-  arm_fir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c
deleted file mode 100644
index 655b9b5fb8..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c
+++ /dev/null
@@ -1,531 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_lattice_q15.c    
-*    
-* Description:	Q15 FIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-
-/**    
- * @brief Processing function for the Q15 FIR lattice filter.    
- * @param[in]  *S        points to an instance of the Q15 FIR lattice structure.    
- * @param[in]  *pSrc     points to the block of input data.    
- * @param[out] *pDst     points to the block of output data    
- * @param[in]  blockSize number of samples to process.    
- * @return none.    
- */
-
-void arm_fir_lattice_q15(
-  const arm_fir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *px;                                     /* temporary state pointer */
-  q15_t *pk;                                     /* temporary coefficient pointer */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t fcurnt1, fnext1, gcurnt1 = 0, gnext1;    /* temporary variables for first sample in loop unrolling */
-  q31_t fcurnt2, fnext2, gnext2;                 /* temporary variables for second sample in loop unrolling */
-  q31_t fcurnt3, fnext3, gnext3;                 /* temporary variables for third sample in loop unrolling */
-  q31_t fcurnt4, fnext4, gnext4;                 /* temporary variables for fourth sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* Read two samples from input buffer */
-    /* f0(n) = x(n) */
-    fcurnt1 = *pSrc++;
-    fcurnt2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Read g0(n-1) from state */
-    gcurnt1 = *px;
-
-    /* Process first sample for first tap */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-    fnext1 = __SSAT(fnext1, 16);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + gcurnt1;
-    gnext1 = __SSAT(gnext1, 16);
-
-    /* Process second sample for first tap */
-    /* for sample 2 processing */
-    fnext2 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + fcurnt2;
-    fnext2 = __SSAT(fnext2, 16);
-
-    gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt1;
-    gnext2 = __SSAT(gnext2, 16);
-
-
-    /* Read next two samples from input buffer */
-    /* f0(n+2) = x(n+2) */
-    fcurnt3 = *pSrc++;
-    fcurnt4 = *pSrc++;
-
-    /* Copy only last input samples into the state buffer    
-       which is used for next four samples processing */
-    *px++ = (q15_t) fcurnt4;
-
-    /* Process third sample for first tap */
-    fnext3 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt3;
-    fnext3 = __SSAT(fnext3, 16);
-    gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt2;
-    gnext3 = __SSAT(gnext3, 16);
-
-    /* Process fourth sample for first tap */
-    fnext4 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt4;
-    fnext4 = __SSAT(fnext4, 16);
-    gnext4 = (q31_t) ((fcurnt4 * (*pk++)) >> 15u) + fcurnt3;
-    gnext4 = __SSAT(gnext4, 16);
-
-    /* Update of f values for next coefficient set processing */
-    fcurnt1 = fnext1;
-    fcurnt2 = fnext2;
-    fcurnt3 = fnext3;
-    fcurnt4 = fnext4;
-
-
-    /* Loop unrolling.  Process 4 taps at a time . */
-    stageCnt = (numStages - 1u) >> 2;
-
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.    
-     ** Repeat until we've computed numStages-3 coefficients. */
-
-    /* Process 2nd, 3rd, 4th and 5th taps ... here */
-    while(stageCnt > 0u)
-    {
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Process first sample for 2nd, 6th .. tap */
-      /* Sample processing for K2, K6.... */
-      /* f1(n) = f0(n) +  K1 * g0(n-1) */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-
-
-      /* Process second sample for 2nd, 6th .. tap */
-      /* for sample 2 processing */
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
-      /* Process third sample for 2nd, 6th .. tap */
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
-      /* Process fourth sample for 2nd, 6th .. tap */
-      /* fnext4 = fcurnt4 + (*pk) * gnext3; */
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Sample processing for K3, K7.... */
-      /* Process first sample for 3rd, 7th .. tap */
-      /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
-      fcurnt1 = __SSAT(fcurnt1, 16);
-
-      /* Process second sample for 3rd, 7th .. tap */
-      fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
-      fcurnt2 = __SSAT(fcurnt2, 16);
-
-      /* Process third sample for 3rd, 7th .. tap */
-      fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
-      fcurnt3 = __SSAT(fcurnt3, 16);
-
-      /* Process fourth sample for 3rd, 7th .. tap */
-      fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
-      fcurnt4 = __SSAT(fcurnt4, 16);
-
-      /* Calculation of state values for next stage */
-      /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-
-      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Sample processing for K4, K8.... */
-      /* Process first sample for 4th, 8th .. tap */
-      /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-
-      /* Process second sample for 4th, 8th .. tap */
-      /* for sample 2 processing */
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
-
-      /* Process third sample for 4th, 8th .. tap */
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
-
-      /* Process fourth sample for 4th, 8th .. tap */
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
-
-      /* g4(n) = f3(n) * K4  +  g3(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g4(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Sample processing for K5, K9.... */
-      /* Process first sample for 5th, 9th .. tap */
-      /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
-      fcurnt1 = __SSAT(fcurnt1, 16);
-
-      /* Process second sample for 5th, 9th .. tap */
-      fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
-      fcurnt2 = __SSAT(fcurnt2, 16);
-
-      /* Process third sample for 5th, 9th .. tap */
-      fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
-      fcurnt3 = __SSAT(fcurnt3, 16);
-
-      /* Process fourth sample for 5th, 9th .. tap */
-      fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
-      fcurnt4 = __SSAT(fcurnt4, 16);
-
-      /* Calculation of state values for next stage */
-      /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-      stageCnt--;
-    }
-
-    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
-    stageCnt = (numStages - 1u) % 0x4u;
-
-    while(stageCnt > 0u)
-    {
-      gcurnt1 = *px;
-
-      /* save g value in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Process four samples for last three taps here */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
-
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
-
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-      /* Update of f values for next coefficient set processing */
-      fcurnt1 = fnext1;
-      fcurnt2 = fnext2;
-      fcurnt3 = fnext3;
-      fcurnt4 = fnext4;
-
-      stageCnt--;
-
-    }
-
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    /* y(n) = fN(n) */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt1, fcurnt2, 16);
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt3, fcurnt4, 16);
-
-#else
-
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt2, fcurnt1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt4, fcurnt3, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurnt1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g2(n) from state buffer */
-    gcurnt1 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-    fnext1 = __SSAT(fnext1, 16);
-
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-    gnext1 = __SSAT(gnext1, 16);
-
-    /* save g1(n) in state buffer */
-    *px++ = (q15_t) fcurnt1;
-
-    /* f1(n) is saved in fcurnt1    
-       for next stage processing */
-    fcurnt1 = fnext1;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-
-      /* f1(n) is saved in fcurnt1    
-         for next stage processing */
-      fcurnt1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = __SSAT(fcurnt1, 16);
-
-
-    blkCnt--;
-
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t fcurnt, fnext, gcurnt, gnext;            /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurnt = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n-1) from state buffer */
-    gcurnt = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
-    fnext = __SSAT(fnext, 16);
-
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
-    gnext = __SSAT(gnext, 16);
-
-    /* save f0(n) in state buffer */
-    *px++ = (q15_t) fcurnt;
-
-    /* f1(n) is saved in fcurnt            
-       for next stage processing */
-    fcurnt = fnext;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g1(n-1) from state buffer */
-      gcurnt = *px;
-
-      /* save g0(n-1) in state buffer */
-      *px++ = (q15_t) gnext;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
-      fnext = __SSAT(fnext, 16);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
-      gnext = __SSAT(gnext, 16);
-
-
-      /* f1(n) is saved in fcurnt            
-         for next stage processing */
-      fcurnt = fnext;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = __SSAT(fcurnt, 16);
-
-
-    blkCnt--;
-
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c
deleted file mode 100644
index c923721333..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c
+++ /dev/null
@@ -1,348 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_lattice_q31.c    
-*    
-* Description:	Q31 FIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-
-/**    
- * @brief Processing function for the Q31 FIR lattice filter.    
- * @param[in]  *S        points to an instance of the Q31 FIR lattice structure.    
- * @param[in]  *pSrc     points to the block of input data.    
- * @param[out] *pDst     points to the block of output data    
- * @param[in]  blockSize number of samples to process.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.    
- */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* temporary state pointer */
-  q31_t *pk;                                     /* temporary coefficient pointer */
-  q31_t fcurr1, fnext1, gcurr1 = 0, gnext1;      /* temporary variables for first sample in loop unrolling */
-  q31_t fcurr2, fnext2, gnext2;                  /* temporary variables for second sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-  q31_t k;
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize >> 1u;
-
-  /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.        
-     a second loop below computes the remaining 1 sample. */
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* f0(n) = x(n) */
-    fcurr2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n - 1) from state buffer */
-    gcurr1 = *px;
-
-    /* Read the reflection coefficient */
-    k = *pk++;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-    fnext1 = fcurr1 + (fnext1 << 1u);
-    gnext1 = gcurr1 + (gnext1 << 1u);
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext2 = (q31_t) (((q63_t) fcurr1 * k) >> 32);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
-    fnext2 = fcurr2 + (fnext2 << 1u);
-    gnext2 = fcurr1 + (gnext2 << 1u);
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr2;
-
-    /* f1(n) is saved in fcurr1        
-       for next stage processing */
-    fcurr1 = fnext1;
-    fcurr2 = fnext2;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-
-      /* Read the reflection coefficient */
-      k = *pk++;
-
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext2;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-      fnext2 = (q31_t) (((q63_t) gnext1 * k) >> 32);
-
-      fnext1 = fcurr1 + (fnext1 << 1u);
-      fnext2 = fcurr2 + (fnext2 << 1u);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
-      gnext2 = gnext1 + (gnext2 << 1u);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-      gnext1 = gcurr1 + (gnext1 << 1u);
-
-      /* f1(n) is saved in fcurr1        
-         for next stage processing */
-      fcurr1 = fnext1;
-      fcurr2 = fnext2;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-    *pDst++ = fcurr2;
-
-    blkCnt--;
-
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x2u;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n - 1) from state buffer */
-    gcurr1 = *px;
-
-    /* Read the reflection coefficient */
-    k = *pk++;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-    fnext1 = fcurr1 + (fnext1 << 1u);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-    gnext1 = gcurr1 + (gnext1 << 1u);
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr1;
-
-    /* f1(n) is saved in fcurr1        
-       for next stage processing */
-    fcurr1 = fnext1;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* Read the reflection coefficient */
-      k = *pk++;
-
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-      fnext1 = fcurr1 + (fnext1 << 1u);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-      gnext1 = gcurr1 + (gnext1 << 1u);
-
-      /* f1(n) is saved in fcurr1        
-         for next stage processing */
-      fcurr1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-
-    blkCnt--;
-
-  }
-
-
-}
-
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* temporary state pointer */
-  q31_t *pk;                                     /* temporary coefficient pointer */
-  q31_t fcurr, fnext, gcurr, gnext;              /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n-1) from state buffer */
-    gcurr = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
-    /* save g1(n) in state buffer */
-    *px++ = fcurr;
-
-    /* f1(n) is saved in fcurr1            
-       for next stage processing */
-    fcurr = fnext;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurr = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
-
-      /* f1(n) is saved in fcurr1            
-         for next stage processing */
-      fcurr = fnext;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr;
-
-    blkCnt--;
-
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c
deleted file mode 100644
index ac3e2210c3..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c
+++ /dev/null
@@ -1,689 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_q15.c    
-*    
-* Description:  Q15 FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
- * @ingroup groupFilters       
- */
-
-/**       
- * @addtogroup FIR       
- * @{       
- */
-
-/**       
- * @brief Processing function for the Q15 FIR filter.       
- * @param[in] *S points to an instance of the Q15 FIR structure.       
- * @param[in] *pSrc points to the block of input data.       
- * @param[out] *pDst points to the block of output data.       
- * @param[in]  blockSize number of samples to process per call.       
- * @return none.       
- *   
- *   
- * \par Restrictions   
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE   
- *	In this case input, output, state buffers should be aligned by 32-bit   
- *   
- * Scaling and Overflow Behavior:       
- * \par       
- * The function is implemented using a 64-bit internal accumulator.       
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.       
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.       
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.       
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.       
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.       
- *       
- * \par       
- * Refer to the function arm_fir_fast_q15() for a faster but less precise implementation of this function.       
- */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px1;                                    /* Temporary q15 pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold SIMD state and coefficient values */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.       
-   * The variables acc0 ... acc3 hold output values that are being computed:       
-   *       
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]       
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]       
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]       
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]       
-   */
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer.       
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer of type q15 */
-    px1 = pState;
-
-    /* Initialize coeff pointer of type q31 */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = _SIMD32_OFFSET(px1);
-
-    /* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */
-    x1 = _SIMD32_OFFSET(px1 + 1u);
-
-    px1 += 2u;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Read state x[n-N-2], x[n-N-3] */
-      x2 = _SIMD32_OFFSET(px1);
-
-      /* Read state x[n-N-3], x[n-N-4] */
-      x3 = _SIMD32_OFFSET(px1 + 1u);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLALD(x3, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLALD(x2, c0, acc0);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLALD(x3, c0, acc1);
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px1 + 2u);
-
-      /* Read state x[n-N-5], x[n-N-6] */
-      x1 = _SIMD32_OFFSET(px1 + 3u);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLALD(x0, c0, acc2);
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLALD(x1, c0, acc3);
-
-      px1 += 4u;
-
-      tapCnt--;
-
-    }
-
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.       
-     ** This is always be 2 taps since the filter length is even. */
-    if((numTaps & 0x3u) != 0u)
-    {
-      /* Read 2 coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Fetch 4 state variables */
-      x2 = _SIMD32_OFFSET(px1);
-
-      x3 = _SIMD32_OFFSET(px1 + 1u);
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      px1 += 2u;
-
-      acc1 = __SMLALD(x1, c0, acc1);
-      acc2 = __SMLALD(x2, c0, acc2);
-      acc3 = __SMLALD(x3, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.       
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-  while(blkCnt > 0u)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer of type q15 */
-    px1 = pState;
-
-    /* Initialize coeff pointer of type q31 */
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1;
-
-    do
-    {
-
-      c0 = *__SIMD32(pb)++;
-      x0 = *__SIMD32(px1)++;
-
-      acc0 = __SMLALD(x0, c0, acc0);
-      tapCnt--;
-    }
-    while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-
-    /* Copy state values to start of state buffer */
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy remaining data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else /* UNALIGNED_SUPPORT_DISABLE */
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q15_t *px;                                     /* Temporary q31 pointer for SIMD state buffer accesses */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold SIMD state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.      
-   * The variables acc0 ... acc3 hold output values that are being computed:      
-   *      
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]      
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]      
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]      
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]      
-   */
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.      
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer.      
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
-    px = pState;
-
-    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = *__SIMD32(px)++;
-
-    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
-    x2 = *__SIMD32(px)++;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.      
-     ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* pack  x[n-N-1] and x[n-N-2] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack  x[n-N-3] and x[n-N-4] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLALDX(x1, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLALD(x2, c0, acc0);
-
-      /* Read state x[n-N-6], x[n-N-7] with offset */
-      x2 = _SIMD32_OFFSET(px + 2u);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLALD(x0, c0, acc2);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack  x[n-N-5] and x[n-N-6] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLALDX(x1, c0, acc3);
-
-      /* Update state pointer for next state reading */
-      px += 4u;
-
-      /* Decrement tap count */
-      tapCnt--;
-
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.       
-     ** This is always be 2 taps since the filter length is even. */
-    if((numTaps & 0x3u) != 0u)
-    {
-
-      /* Read last two coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLALD(x0, c0, acc0);
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read last state variables */
-      x0 = *__SIMD32(px);
-
-      /* Perform the multiply-accumulates */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* Perform the multiply-accumulates */
-      acc3 = __SMLALDX(x1, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.      
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-  while(blkCnt > 0u)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Use SIMD to hold states and coefficients */
-    px = pState;
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1u;
-
-    do
-    {
-      acc0 += (q31_t) * px++ * *pb++;
-	  acc0 += (q31_t) * px++ * *pb++;
-      tapCnt--;
-    }
-    while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.      
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.      
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.      
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy remaining data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-#else /* ARM_MATH_CM0 */
-
-
-/* Run the below code for Cortex-M0 */
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-
-
-
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc;                                     /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of nTaps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q31_t) * px++ * *pb++;
-      tapCnt--;
-    } while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15         
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT((acc >> 15u), 16);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
-  tapCnt = (numTaps - 1u);
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-
-
-/**       
- * @} end of FIR group       
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c
deleted file mode 100644
index 8113d7e274..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c
+++ /dev/null
@@ -1,363 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_q31.c    
-*    
-* Description:	Q31 FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in] *S points to an instance of the Q31 FIR filter structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process per call.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.    
- * After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.  
- *    
- * \par    
- * Refer to the function arm_fir_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_fir_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t x0, x1, x2;                              /* Temporary variables to hold state */
-  q31_t c0;                                      /* Temporary variable to hold coefficient value */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc0, acc1, acc2;                        /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt, tapCntN3;          /* Loop counters */
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.    
-   * The variables acc0 ... acc3 hold output values that are being computed:    
-   *    
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]    
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]    
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]    
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]    
-   */
-  blkCnt = blockSize / 3;
-  blockSize = blockSize - (3 * blkCnt);
-
-  tapCnt = numTaps / 3;
-  tapCntN3 = numTaps - (3 * tapCnt);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy three new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:    
-     *  x[n-numTaps], x[n-numTaps-1] */
-    x0 = *(px++);
-    x1 = *(px++);
-
-    /* Loop unrolling.  Process 3 taps at a time. */
-    i = tapCnt;
-
-    while(i > 0u)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *pb;
-
-      /* Read x[n-numTaps-2] sample */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x0 * c0);
-      acc1 += ((q63_t) x1 * c0);
-      acc2 += ((q63_t) x2 * c0);
-
-      /* Read the coefficient and state */
-      c0 = *(pb + 1u);
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x1 * c0);
-      acc1 += ((q63_t) x2 * c0);
-      acc2 += ((q63_t) x0 * c0);
-
-      /* Read the coefficient and state */
-      c0 = *(pb + 2u);
-      x1 = *(px++);
-
-      /* update coefficient pointer */
-      pb += 3u;
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x2 * c0);
-      acc1 += ((q63_t) x0 * c0);
-      acc2 += ((q63_t) x1 * c0);
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* If the filter length is not a multiple of 3, compute the remaining filter taps */
-
-    i = tapCntN3;
-
-    while(i > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x0 * c0);
-      acc1 += ((q63_t) x1 * c0);
-      acc2 += ((q63_t) x2 * c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 3 to process the next group of 3 samples */
-    pState = pState + 3;
-
-    /* The results in the 3 accumulators are in 2.30 format.  Convert to 1.31    
-     ** Then store the 3 outputs in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31u);
-    *pDst++ = (q31_t) (acc1 >> 31u);
-    *pDst++ = (q31_t) (acc2 >> 31u);
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 3, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-
-  while(blockSize > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 += (q63_t) * (px++) * (*(pb++));
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.62 format.  Convert to 1.31    
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31u);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blockSize--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc;                                     /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Length of the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q63_t) * px++ * *pb++;
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.62 format.  Convert to 1.31         
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc >> 31u);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the starting of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
-  tapCnt = numTaps - 1u;
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-
-#endif /*  #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c
deleted file mode 100644
index 97974992a0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c
+++ /dev/null
@@ -1,388 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_q7.c    
-*    
-* Description:  Q7 FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in]   *S points to an instance of the Q7 FIR filter structure.    
- * @param[in]   *pSrc points to the block of input data.    
- * @param[out]  *pDst points to the block of output data.    
- * @param[in]   blockSize number of samples to process per call.    
- * @return 	none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * The accumulator is converted to 18.7 format by discarding the low 7 bits.    
- * Finally, the result is truncated to 1.7 format.    
- */
-
-void arm_fir_q7(
-  const arm_fir_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *pStateCurnt;                             /* Points to the current sample of the state */
-  q7_t x0, x1, x2, x3;                           /* Temporary variables to hold state */
-  q7_t c0;                                       /* Temporary variable to hold coefficient value */
-  q7_t *px;                                      /* Temporary pointer for state */
-  q7_t *pb;                                      /* Temporary pointer for coefficient buffer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.    
-   * The variables acc0 ... acc3 hold output values that are being computed:    
-   *    
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]    
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]    
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]    
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]    
-   */
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first three samples from the state buffer:    
-     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *(px++);
-    x1 = *(px++);
-    x2 = *(px++);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-    i = tapCnt;
-
-    while(i > 0u)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x3 = *(px++);
-
-      /* acc0 +=  b[numTaps] * x[n-numTaps] */
-      acc0 += ((q15_t) x0 * c0);
-
-      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
-      acc1 += ((q15_t) x1 * c0);
-
-      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
-      acc2 += ((q15_t) x2 * c0);
-
-      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
-      acc3 += ((q15_t) x3 * c0);
-
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x1 * c0);
-      acc1 += ((q15_t) x2 * c0);
-      acc2 += ((q15_t) x3 * c0);
-      acc3 += ((q15_t) x0 * c0);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x2 * c0);
-      acc1 += ((q15_t) x3 * c0);
-      acc2 += ((q15_t) x0 * c0);
-      acc3 += ((q15_t) x1 * c0);
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x3 * c0);
-      acc1 += ((q15_t) x0 * c0);
-      acc2 += ((q15_t) x1 * c0);
-      acc3 += ((q15_t) x2 * c0);
-      i--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-
-    i = numTaps - (tapCnt * 4u);
-    while(i > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x3 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x0 * c0);
-      acc1 += ((q15_t) x1 * c0);
-      acc2 += ((q15_t) x2 * c0);
-      acc3 += ((q15_t) x3 * c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* The results in the 4 accumulators are in 2.62 format.  Convert to 1.31    
-     ** Then store the 4 outputs in the destination buffer. */
-    acc0 = __SSAT((acc0 >> 7u), 8);
-    *pDst++ = acc0;
-    acc1 = __SSAT((acc1 >> 7u), 8);
-    *pDst++ = acc1;
-    acc2 = __SSAT((acc2 >> 7u), 8);
-    *pDst++ = acc2;
-    acc3 = __SSAT((acc3 >> 7u), 8);
-    *pDst++ = acc3;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 += (q15_t) * (px++) * (*(pb++));
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.14 format.  Convert to 1.7    
-     ** Then store the output in the destination buffer. */
-    *pDst++ = __SSAT((acc0 >> 7u), 8);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *px, *pb;                                 /* Temporary pointers to state and coeff */
-  q31_t acc = 0;                                 /* Accumlator */
-  q7_t *pStateCurnt;                             /* Points to the current sample of the state */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  /* Perform filtering upto BlockSize - BlockSize%4  */
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer of type q7 */
-    px = pState;
-
-    /* Initialize coeff pointer of type q7 */
-    pb = pCoeffs;
-
-
-    i = numTaps;
-
-    while(i > 0u)
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q15_t) * px++ * *pb++;
-      i--;
-    }
-
-    /* Store the 1.7 format filter output in destination buffer */
-    *pDst++ = (q7_t) __SSAT((acc >> 7), 8);
-
-    /* Advance the state pointer by 1 to process the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-
-  /* Copy numTaps number of values */
-  i = (numTaps - 1u);
-
-  /* Copy q7_t data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    i--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c
deleted file mode 100644
index 3b2dff4531..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c
+++ /dev/null
@@ -1,365 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_f32.c    
-*    
-* Description:	Floating-point sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters    
- *    
- * This group of functions implements sparse FIR filters.     
- * Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.   
- * Sparse filters are used for simulating reflections in communications and audio applications.   
- *   
- * There are separate functions for Q7, Q15, Q31, and floating-point data types.    
- * The functions operate on blocks  of input and output data and each call to the function processes    
- * blockSize samples through the filter.  pSrc and    
- * pDst points to input and output arrays respectively containing blockSize values.    
- *    
- * \par Algorithm:    
- * The sparse filter instant structure contains an array of tap indices pTapDelay which specifies the locations of the non-zero coefficients.   
- * This is in addition to the coefficient array b.   
- * The implementation essentially skips the multiplications by zero and leads to an efficient realization.   
- * 
   
- *     y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]    
- * 
    
- * \par    
- * \image html FIRSparse.gif "Sparse FIR filter.  b[n] represents the filter coefficients"   
- * \par    
- * pCoeffs points to a coefficient array of size numTaps;    
- * pTapDelay points to an array of nonzero indices and is also of size numTaps;   
- * pState points to a state array of size maxDelay + blockSize, where   
- * maxDelay is the largest offset value that is ever used in the pTapDelay array.   
- * Some of the processing functions also require temporary working buffers.   
- *   
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 4 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * The code below statically initializes each of the 4 different data type filter instance structures    
- * 
    
- *arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- * 
    
- * \par    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the sparse FIR filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief Processing function for the floating-point sparse FIR filter.   
- * @param[in]  *S          points to an instance of the floating-point sparse FIR structure.   
- * @param[in]  *pSrc       points to the block of input data.   
- * @param[out] *pDst       points to the block of output data   
- * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize   number of input samples to process per call.   
- * @return none.   
- */
-
-void arm_fir_sparse_f32(
-  arm_fir_sparse_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  float32_t * pScratchIn,
-  uint32_t blockSize)
-{
-
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *px;                                 /* Scratch buffer pointer */
-  float32_t *py = pState;                        /* Temporary pointers for state buffer */
-  float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
-  float32_t *pOut;                               /* Destination pointer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
-
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
-                        (int32_t *) pSrc, 1, blockSize);
-
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                       blockSize);
-
-  /* Working pointer for the scratch buffer */
-  px = pb;
-
-  /* Working pointer for destination buffer */
-  pOut = pDst;
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 Multiplications at a time. */
-  blkCnt = blockSize >> 2u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 1u;
-
-  while(tapCnt > 0u)
-  {
-
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer */
-    px = pb;
-
-    /* Working pointer for destination buffer */
-    pOut = pDst;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = ((int32_t) S->stateIndex -
-                 (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 1u;
-
-  while(tapCnt > 0u)
-  {
-
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer */
-    px = pb;
-
-    /* Working pointer for destination buffer */
-    pOut = pDst;
-
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex =
-      ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0        */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
deleted file mode 100644
index cc9cb53f76..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_f32.c    
-*    
-* Description:	Floating-point sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the floating-point sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the floating-point sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the    
- * number of samples processed by the arm_fir_sparse_f32() function.    
- */
-
-void arm_fir_sparse_init_f32(
-  arm_fir_sparse_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
deleted file mode 100644
index ef25875281..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_q15.c    
-*    
-* Description:	Q15 sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the Q15 sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the Q15 sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the    
- * number of words processed by arm_fir_sparse_q15() function.    
- */
-
-void arm_fir_sparse_init_q15(
-  arm_fir_sparse_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
deleted file mode 100644
index abad5b85d5..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_q31.c    
-*    
-* Description:	Q31 sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the Q31 sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the Q31 sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the number of words processed by arm_fir_sparse_q31() function.    
- */
-
-void arm_fir_sparse_init_q31(
-  arm_fir_sparse_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
deleted file mode 100644
index 9fb5c564d5..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_q7.c    
-*    
-* Description:	Q7 sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the Q7 sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the Q7 sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the    
- * number of samples processed by the arm_fir_sparse_q7() function.    
- */
-
-void arm_fir_sparse_init_q7(
-  arm_fir_sparse_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c
deleted file mode 100644
index 62e7afecbb..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c
+++ /dev/null
@@ -1,406 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_q15.c    
-*    
-* Description:	Q15 sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief Processing function for the Q15 sparse FIR filter.   
- * @param[in]  *S           points to an instance of the Q15 sparse FIR structure.   
- * @param[in]  *pSrc        points to the block of input data.   
- * @param[out] *pDst        points to the block of output data   
- * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.   
- * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize    number of input samples to process per call.   
- * @return none.   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 32-bit accumulator.   
- * The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.   
- * Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.   
- * If the accumulator result overflows it will wrap around rather than saturate.   
- * After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.    
- * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.   
- */
-
-
-void arm_fir_sparse_q15(
-  arm_fir_sparse_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  q15_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize)
-{
-
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pIn = pSrc;                             /* Working pointer for input */
-  q15_t *pOut = pDst;                            /* Working pointer for output */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *px;                                     /* Temporary pointers for scratch buffer */
-  q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-  q15_t *py = pState;                            /* Temporary pointers for state buffer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-  q31_t *pScr2 = pScratchOut;                    /* Working pointer for pScratchOut */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2;                                /* Temporary variables */
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                       pb, pb, blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 multiplications at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 1u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                         pb, pb, blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-  /* All the output values are in pScratchOut buffer.    
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    in1 = *pScr2++;
-    in2 = *pScr2++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
-              16);
-
-#else
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
-              16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    in1 = *pScr2++;
-
-    in2 = *pScr2++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
-              16);
-
-#else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
-              16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-
-    blkCnt--;
-
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-     remaining samples are processed in the below loop */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                       pb, pb, blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 1u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                         pb, pb, blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-  /* All the output values are in pScratchOut buffer.       
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
-    blkCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c
deleted file mode 100644
index 9f02312501..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c
+++ /dev/null
@@ -1,370 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_q31.c    
-*    
-* Description:	Q31 sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief Processing function for the Q31 sparse FIR filter.   
- * @param[in]  *S          points to an instance of the Q31 sparse FIR structure.   
- * @param[in]  *pSrc       points to the block of input data.   
- * @param[out] *pDst       points to the block of output data   
- * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize   number of input samples to process per call.   
- * @return none.   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 32-bit accumulator.   
- * The 1.31 x 1.31 multiplications are truncated to 2.30 format.   
- * This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.    
- * If the accumulator result overflows, it wraps around rather than saturate.   
- * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.   
- */
-
-void arm_fir_sparse_q31(
-  arm_fir_sparse_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  q31_t * pScratchIn,
-  uint32_t blockSize)
-{
-
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* Scratch buffer pointer */
-  q31_t *py = pState;                            /* Temporary pointers for state buffer */
-  q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-  q31_t *pOut;                                   /* Destination pointer */
-  q63_t out;                                     /* Temporary output variable */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-  q31_t in;
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
-                        (int32_t *) pSrc, 1, blockSize);
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                       blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pOut = pDst;
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 Multiplications at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 1u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pOut = pDst;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
-
-    while(blkCnt > 0u)
-    {
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-  /* Working output pointer is updated */
-  pOut = pDst;
-
-  /* Output is converted into 1.31 format. */
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * process 4 output samples at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * process the remaining output samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 1u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pOut = pDst;
-
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-  /* Working output pointer is updated */
-  pOut = pDst;
-
-  /* Output is converted into 1.31 format. */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c
deleted file mode 100644
index e67339250f..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c
+++ /dev/null
@@ -1,398 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_q7.c    
-*    
-* Description:	Q7 sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-
-/**   
- * @brief Processing function for the Q7 sparse FIR filter.   
- * @param[in]  *S           points to an instance of the Q7 sparse FIR structure.   
- * @param[in]  *pSrc        points to the block of input data.   
- * @param[out] *pDst        points to the block of output data   
- * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.   
- * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize    number of input samples to process per call.   
- * @return none.   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * The accumulator is then converted to 18.7 format by discarding the low 7 bits.   
- * Finally, the result is truncated to 1.7 format.   
- */
-
-void arm_fir_sparse_q7(
-  arm_fir_sparse_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  q7_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize)
-{
-
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *px;                                      /* Scratch buffer pointer */
-  q7_t *py = pState;                             /* Temporary pointers for state buffer */
-  q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
-  q7_t *pOut = pDst;                             /* Destination pointer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
-  q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
-  q31_t in;
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t in1, in2, in3, in4;
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
-                       blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                      (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 multiplications at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 1u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                        (int32_t) blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = ((int32_t) S->stateIndex -
-                 (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-  /* All the output values are in pScratchOut buffer.    
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    *__SIMD32(pOut)++ = __PACKq7(in1, in2, in3, in4);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-     remaining samples are processed in the below loop */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
-                       blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                      (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  /* Loop over the blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 1u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                        (int32_t) blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    /* Loop over the blockSize */
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex =
-      ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-  /* All the output values are in pScratchOut buffer.       
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c
deleted file mode 100644
index 264e15ed9e..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c
+++ /dev/null
@@ -1,440 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_iir_lattice_f32.c    
-*    
-* Description:	Floating-point IIR Lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters    
- *    
- * This set of functions implements lattice filters    
- * for Q15, Q31 and floating-point data types.  Lattice filters are used in a     
- * variety of adaptive filter applications.  The filter structure has feedforward and    
- * feedback components and the net impulse response is infinite length.    
- * The functions operate on blocks    
- * of input and output data and each call to the function processes    
- * blockSize samples through the filter.  pSrc and    
- * pDst point to input and output arrays containing blockSize values.    
-    
- * \par Algorithm:    
- * \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"    
- * 
    
- *    fN(n)   =  x(n)    
- *    fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ...1    
- *    gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1    
- *    y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)    
- * 
    
- * \par    
- * pkCoeffs points to array of reflection coefficients of size numStages.     
- * Reflection coefficients are stored in time-reversed order.    
- * \par    
- * 
    
- *    {kN, kN-1, ....k1}    
- * 
    
- * pvCoeffs points to the array of ladder coefficients of size (numStages+1).     
- * Ladder coefficients are stored in time-reversed order.    
- * \par    
- * 
    
- *    {vN, vN-1, ...v0}    
- * 
    
- * pState points to a state array of size numStages + blockSize.    
- * The state variables shown in the figure above (the g values) are stored in the pState array.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
-  *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:    
- * 
    
- *arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- *arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- *arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- * 
    
- * \par    
- * where numStages is the number of stages in the filter; pState points to the state buffer array;    
- * pkCoeffs points to array of the reflection coefficients; pvCoeffs points to the array of ladder coefficients.    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the IIR lattice filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point IIR lattice filter.    
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t fnext1, gcurr1, gnext;               /* Temporary variables for lattice stages */
-  float32_t acc;                                 /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* temporary variables for counts */
-  float32_t *px1, *px2, *pk, *pv;                /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  float32_t *pState;                             /* State pointer */
-  float32_t *pStateCurnt;                        /* State current pointer */
-  float32_t k1, k2;
-  float32_t v1, v2, v3, v4;
-  float32_t gcurr2;
-  float32_t fnext2;
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-  /* initialise state pointer */
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fnext2 = *pSrc++;
-
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-
-    /* Set accumulator to zero */
-    acc = 0.0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages) >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Read gN-1(n-1) from state buffer */
-      gcurr1 = *px1;
-
-      /* read reflection coefficient kN */
-      k1 = *pk;
-
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext1 = fnext2 - (k1 * gcurr1);
-
-      /* read ladder coefficient vN */
-      v1 = *pv;
-
-      /* read next reflection coefficient kN-1 */
-      k2 = *(pk + 1u);
-
-      /* Read gN-2(n-1) from state buffer */
-      gcurr2 = *(px1 + 1u);
-
-      /* read next ladder coefficient vN-1 */
-      v2 = *(pv + 1u);
-
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext2 = fnext1 - (k2 * gcurr2);
-
-      /* gN(n)   = kN * fN-1(n) + gN-1(n-1) */
-      gnext = gcurr1 + (k1 * fnext1);
-
-      /* read reflection coefficient kN-2 */
-      k1 = *(pk + 2u);
-
-      /* write gN(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Read gN-3(n-1) from state buffer */
-      gcurr1 = *(px1 + 2u);
-
-      /* y(n) += gN(n) * vN  */
-      acc += (gnext * v1);
-
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fnext1 = fnext2 - (k1 * gcurr1);
-
-      /* gN-1(n)   = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = gcurr2 + (k2 * fnext2);
-
-      /* Read gN-4(n-1) from state buffer */
-      gcurr2 = *(px1 + 3u);
-
-      /* y(n) += gN-1(n) * vN-1  */
-      acc += (gnext * v2);
-
-      /* read reflection coefficient kN-3 */
-      k2 = *(pk + 3u);
-
-      /* write gN-1(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext2 = fnext1 - (k2 * gcurr2);
-
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = gcurr1 + (k1 * fnext1);
-
-      /* read ladder coefficient vN-2 */
-      v3 = *(pv + 2u);
-
-      /* y(n) += gN-2(n) * vN-2  */
-      acc += (gnext * v3);
-
-      /* write gN-2(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* update pointer */
-      pk += 4u;
-
-      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
-      gnext = (fnext2 * k2) + gcurr2;
-
-      /* read next ladder coefficient vN-3 */
-      v4 = *(pv + 3u);
-
-      /* y(n) += gN-4(n) * vN-4  */
-      acc += (gnext * v4);
-
-      /* write gN-3(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* update pointers */
-      px1 += 4u;
-      pv += 4u;
-
-      tapCnt--;
-
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = (numStages) % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      gcurr1 = *px1++;
-      /* Process sample for last taps */
-      fnext1 = fnext2 - ((*pk) * gcurr1);
-      gnext = (fnext1 * (*pk++)) + gcurr1;
-      /* Output samples for last taps */
-      acc += (gnext * (*pv++));
-      *px2++ = gnext;
-      fnext2 = fnext1;
-
-      tapCnt--;
-
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (fnext2 * (*pv));
-
-    *px2++ = fnext2;
-
-    /* write out into pDst */
-    *pDst++ = acc;
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1u;
-
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer        
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numStages) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else
-
-void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t fcurr, fnext = 0, gcurr, gnext;      /* Temporary variables for lattice stages */
-  float32_t acc;                                 /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* temporary variables for counts */
-  float32_t *px1, *px2, *pk, *pv;                /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  float32_t *pState;                             /* State pointer */
-  float32_t *pStateCurnt;                        /* State current pointer */
-
-
-  /* Run the below code for Cortex-M0 */
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0.0f;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-
-    /* Process sample for numStages */
-    tapCnt = numStages;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = fcurr - ((*pk) * gcurr);
-      gnext = (fnext * (*pk++)) + gcurr;
-
-      /* Output samples for last taps */
-      acc += (gnext * (*pv++));
-      *px2++ = gnext;
-      fcurr = fnext;
-
-      /* Decrementing loop counter */
-      tapCnt--;
-
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (fnext * (*pv));
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = acc;
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer           
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages;
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
deleted file mode 100644
index e2227e3e5b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_iir_lattice_init_f32.c    
-*    
-* Description:  Floating-point IIR lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Initialization function for the floating-point IIR lattice filter.    
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.    
- * @param[in] numStages number of stages in the filter.    
- * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.    
- * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.    
- * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- */
-
-void arm_iir_lattice_init_f32(
-  arm_iir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pkCoeffs,
-  float32_t * pvCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-
-}
-
-  /**    
-   * @} end of IIR_Lattice group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
deleted file mode 100644
index 618505c2cb..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_iir_lattice_init_q15.c    
-*    
-* Description:  Q15 IIR lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q15 IIR lattice filter.    
-   * @param[in] *S points to an instance of the Q15 IIR lattice structure.    
-   * @param[in] numStages  number of stages in the filter.    
-   * @param[in] *pkCoeffs points to reflection coefficient buffer.  The array is of length numStages.    
-   * @param[in] *pvCoeffs points to ladder coefficient buffer.  The array is of length numStages+1.    
-   * @param[in] *pState points to state buffer.  The array is of length numStages+blockSize.    
-   * @param[in] blockSize number of samples to process per call.    
-   * @return none.    
-   */
-
-void arm_iir_lattice_init_q15(
-  arm_iir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pkCoeffs,
-  q15_t * pvCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-
-}
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
deleted file mode 100644
index 85d18e6697..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_iir_lattice_init_q31.c    
-*    
-* Description:  Initialization function for the Q31 IIR lattice filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q31 IIR lattice filter.    
-   * @param[in] *S points to an instance of the Q31 IIR lattice structure.    
-   * @param[in] numStages number of stages in the filter.    
-   * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.    
-   * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.    
-   * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   */
-
-void arm_iir_lattice_init_q31(
-  arm_iir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pkCoeffs,
-  q31_t * pvCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-
-}
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c
deleted file mode 100644
index a706ae1331..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c
+++ /dev/null
@@ -1,457 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_iir_lattice_q15.c    
-*    
-* Description:	Q15 IIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 IIR lattice filter.    
- * @param[in] *S points to an instance of the Q15 IIR lattice structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- */
-
-void arm_iir_lattice_q15(
-  const arm_iir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t fcurr, fnext, gcurr = 0, gnext;          /* Temporary variables for lattice stages */
-  q15_t gnext1, gnext2;                          /* Temporary variables for lattice stages */
-  uint32_t stgCnt;                               /* Temporary variables for counts */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pStateCurnt;                            /* State current pointer */
-  q15_t out;                                     /* Temporary variable for output */
-  q15_t v1, v2;
-  q31_t v;                                       /* Temporary variable for ladder coefficient */
-
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-
-    /* Process sample for first tap */
-    gcurr = *px1++;
-    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-    fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-    fnext = __SSAT(fnext, 16);
-    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-    gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-    gnext = __SSAT(gnext, 16);
-    /* write gN(n) into state for next sample processing */
-    *px2++ = (q15_t) gnext;
-    /* y(n) += gN(n) * vN  */
-    acc += (q31_t) ((gnext * (*pv++)));
-
-
-    /* Update f values for next coefficient processing */
-    fcurr = fnext;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages - 1u) >> 2;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Process sample for 2nd, 6th ...taps */
-      /* Read gN-2(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 2nd, 6th .. taps */
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext1 = (q15_t) __SSAT(gnext, 16);
-      /* write gN-1(n) into state */
-      *px2++ = (q15_t) gnext1;
-
-
-      /* Process sample for 3nd, 7th ...taps */
-      /* Read gN-3(n-1) from state */
-      gcurr = *px1++;
-      /* Process sample for 3rd, 7th .. taps */
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
-      fcurr = __SSAT(fcurr, 16);
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
-      gnext2 = (q15_t) __SSAT(gnext, 16);
-      /* write gN-2(n) into state */
-      *px2++ = (q15_t) gnext2;
-
-      /* Read vN-1 and vN-2 at a time */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      v = *__SIMD32(pv)++;
-
-#else
-
-	  v1 = *pv++;
-	  v2 = *pv++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  v = __PKHBT(v1, v2, 16);
-
-#else
-
-	  v = __PKHBT(v2, v1, 16);
-
-#endif	/* 	#ifndef ARM_MATH_BIG_ENDIAN		*/
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
-
-      /* Pack gN-1(n) and gN-2(n) */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      gnext = __PKHBT(gnext1, gnext2, 16);
-
-#else
-
-      gnext = __PKHBT(gnext2, gnext1, 16);
-
-#endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* y(n) += gN-1(n) * vN-1  */
-      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
-      /* y(n) += gN-2(n) * vN-2  */
-      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
-      acc = __SMLALD(gnext, v, acc);
-
-
-      /* Process sample for 4th, 8th ...taps */
-      /* Read gN-4(n-1) from state */
-      gcurr = *px1++;
-      /* Process sample for 4th, 8th .. taps */
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext1 = (q15_t) __SSAT(gnext, 16);
-      /* write  gN-3(n) for the next sample process */
-      *px2++ = (q15_t) gnext1;
-
-
-      /* Process sample for 5th, 9th ...taps */
-      /* Read gN-5(n-1) from state */
-      gcurr = *px1++;
-      /* Process sample for 5th, 9th .. taps */
-      /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
-      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
-      fcurr = __SSAT(fcurr, 16);
-      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
-      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
-      gnext2 = (q15_t) __SSAT(gnext, 16);
-      /* write      gN-4(n) for the next sample process */
-      *px2++ = (q15_t) gnext2;
-
-      /* Read vN-3 and vN-4 at a time */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      v = *__SIMD32(pv)++;
-
-#else
-
-	  v1 = *pv++;
-	  v2 = *pv++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  v = __PKHBT(v1, v2, 16);
-
-#else
-
-	  v = __PKHBT(v2, v1, 16);
-
-#endif	/* #ifndef ARM_MATH_BIG_ENDIAN	 */
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
-
-      /* Pack gN-3(n) and gN-4(n) */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      gnext = __PKHBT(gnext1, gnext2, 16);
-
-#else
-
-      gnext = __PKHBT(gnext2, gnext1, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* y(n) += gN-4(n) * vN-4  */
-      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
-      /* y(n) += gN-3(n) * vN-3  */
-      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
-      acc = __SMLALD(gnext, v, acc);
-
-      tapCnt--;
-
-    }
-
-    fnext = fcurr;
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = (numStages - 1u) % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext = __SSAT(gnext, 16);
-      /* Output samples for last taps */
-      acc += (q31_t) (((q31_t) gnext * (*pv++)));
-      *px2++ = (q15_t) gnext;
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q31_t) (((q31_t) fnext * (*pv++)));
-
-    out = (q15_t) __SSAT(acc >> 15, 16);
-    *px2++ = (q15_t) fnext;
-
-    /* write out into pDst */
-    *pDst++ = out;
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer    
-     for the preperation of next frame process */
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  stgCnt = (numStages >> 2u);
-
-  /* copy data */
-  while(stgCnt > 0u)
-  {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-#endif /*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
-    /* Decrement the loop counter */
-    stgCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  stgCnt = (numStages) % 0x4u;
-
-  /* copy data */
-  while(stgCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    stgCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
-  uint32_t stgCnt;                               /* Temporary variables for counts */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pStateCurnt;                            /* State current pointer */
-  q15_t out;                                     /* Temporary variable for output */
-
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    tapCnt = numStages;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample */
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext = fcurr - ((gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-      gnext = ((fnext * (*pk++)) >> 15) + gcurr;
-      gnext = __SSAT(gnext, 16);
-      /* Output samples */
-      /* y(n) += gN(n) * vN */
-      acc += (q31_t) ((gnext * (*pv++)));
-      /* write gN(n) into state for next sample processing */
-      *px2++ = (q15_t) gnext;
-      /* Update f values for next coefficient processing */
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q31_t) ((fnext * (*pv++)));
-
-    out = (q15_t) __SSAT(acc >> 15, 16);
-    *px2++ = (q15_t) fnext;
-
-    /* write out into pDst */
-    *pDst++ = out;
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer           
-     for the preperation of next frame process */
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  stgCnt = numStages;
-
-  /* copy data */
-  while(stgCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    stgCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-
-
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c
deleted file mode 100644
index cff10f872e..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c
+++ /dev/null
@@ -1,345 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_iir_lattice_q31.c    
-*    
-* Description:	Q31 IIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 IIR lattice filter.    
- * @param[in] *S points to an instance of the Q31 IIR lattice structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.    
- * After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.    
- */
-
-void arm_iir_lattice_q31(
-  const arm_iir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q31_t *px1, *px2, *pk, *pv;                    /* Temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pStateCurnt;                            /* State current pointer */
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-
-    /* Process sample for first tap */
-    gcurr = *px1++;
-    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-    fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-    gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-    /* write gN-1(n-1) into state for next sample processing */
-    *px2++ = gnext;
-    /* y(n) += gN(n) * vN  */
-    acc += ((q63_t) gnext * *pv++);
-
-    /* Update f values for next coefficient processing */
-    fcurr = fnext;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages - 1u) >> 2;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Process sample for 2nd, 6th .. taps */
-      /* Read gN-2(n-1) from state buffer */
-      gcurr = *px1++;
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* y(n) += gN-1(n) * vN-1  */
-      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-1(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Process sample for 3nd, 7th ...taps */
-      /* Read gN-3(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 3rd, 7th .. taps */
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
-      /* y(n) += gN-2(n) * vN-2  */
-      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-2(n) into state for next sample processing */
-      *px2++ = gnext;
-
-
-      /* Process sample for 4th, 8th ...taps */
-      /* Read gN-4(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 4th, 8th .. taps */
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* y(n) += gN-3(n) * vN-3  */
-      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-3(n) into state for next sample processing */
-      *px2++ = gnext;
-
-
-      /* Process sample for 5th, 9th ...taps */
-      /* Read gN-5(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 5th, 9th .. taps */
-      /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
-      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
-      /* y(n) += gN-4(n) * vN-4  */
-      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-4(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      tapCnt--;
-
-    }
-
-    fnext = fcurr;
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = (numStages - 1u) % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* Output samples for last taps */
-      acc += ((q63_t) gnext * *pv++);
-      *px2++ = gnext;
-      fcurr = fnext;
-
-      tapCnt--;
-
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q63_t) fnext *(
-  *pv++);
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = (q31_t) (acc >> 31u);
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer    
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numStages) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  };
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    tapCnt = numStages;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample */
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext =
-        clip_q63_to_q31(((q63_t) fcurr -
-                         ((q31_t) (((q63_t) gcurr * (*pk)) >> 31))));
-      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-      gnext =
-        clip_q63_to_q31(((q63_t) gcurr +
-                         ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
-      /* Output samples */
-      /* y(n) += gN(n) * vN  */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-1(n-1) into state for next sample processing */
-      *px2++ = gnext;
-      /* Update f values for next coefficient processing */
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q63_t) fnext *(
-  *pv++);
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = (q31_t) (acc >> 31u);
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer           
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-
-
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c
deleted file mode 100644
index ca804ed101..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c
+++ /dev/null
@@ -1,434 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_f32.c    
-*    
-* Description:	Processing function for the floating-point LMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup LMS Least Mean Square (LMS) Filters    
- *    
- * LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.    
- * LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.    
- * Adaptive filters are often used in communication systems, equalizers, and noise removal.    
- * The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.    
- * The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.    
- *    
- * An LMS filter consists of two components as shown below.    
- * The first component is a standard transversal or FIR filter.    
- * The second component is a coefficient update mechanism.    
- * The LMS filter has two input signals.    
- * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.    
- * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.    
- * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.    
- * This "error signal" tends towards zero as the filter adapts.    
- * The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.    
- * \image html LMS.gif "Internal structure of the Least Mean Square filter"    
- *    
- * The functions operate on blocks of data and each call to the function processes    
- * blockSize samples through the filter.    
- * pSrc points to input signal, pRef points to reference signal,    
- * pOut points to output signal and pErr points to error signal.    
- * All arrays contain blockSize values.    
- *    
- * The functions operate on a block-by-block basis.    
- * Internally, the filter coefficients b[n] are updated on a sample-by-sample basis.    
- * The convergence of the LMS filter is slower compared to the normalized LMS algorithm.    
- *    
- * \par Algorithm:    
- * The output signal y[n] is computed by a standard FIR filter:    
- * 
    
- *     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
    
- *    
- * \par    
- * The error signal equals the difference between the reference signal d[n] and the filter output:    
- * 
    
- *     e[n] = d[n] - y[n].    
- * 
    
- *    
- * \par    
- * After each sample of the error signal is computed, the filter coefficients b[k] are updated on a sample-by-sample basis:    
- * 
    
- *     b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1    
- * 
    
- * where mu is the step size and controls the rate of coefficient convergence.    
- *\par    
- * In the APIs, pCoeffs points to a coefficient array of size numTaps.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size numTaps + blockSize - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * \par    
- * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples.    
- * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,    
- * to be avoided and yields a significant speed improvement.    
- * The state variables are updated after each block of data is processed.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter and    
- * coefficient and state arrays cannot be shared among instances.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- *    arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};    
- *    arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};    
- *    arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};    
- * 
    
- * where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer; mu is the step size parameter; and postShift is the shift applied to coefficients.    
- *    
- * \par Fixed-Point Behavior:    
- * Care must be taken when using the Q15 and Q31 versions of the LMS filter.    
- * The following issues must be considered:    
- * - Scaling of coefficients    
- * - Overflow and saturation    
- *    
- * \par Scaling of Coefficients:    
- * Filter coefficients are represented as fractional values and    
- * coefficients are restricted to lie in the range [-1 +1).    
- * The fixed-point functions have an additional scaling parameter postShift.    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * This essentially scales the filter coefficients by 2^postShift and    
- * allows the filter coefficients to exceed the range [+1 -1).    
- * The value of postShift is set by the user based on the expected gain through the system being modeled.    
- *    
- * \par Overflow and Saturation:    
- * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are    
- * described separately as part of the function specific documentation below.    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-/**           
- * @details           
- * This function operates on floating-point data types.       
- *    
- * @brief Processing function for floating-point LMS filter.    
- * @param[in]  *S points to an instance of the floating-point LMS filter structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[in]  *pRef points to the block of reference data.    
- * @param[out] *pOut points to the block of output data.    
- * @param[out] *pErr points to the block of error data.    
- * @param[in]  blockSize number of samples to process.    
- * @return     none.    
- */
-
-void arm_lms_f32(
-  const arm_lms_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t mu = S->mu;                          /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
-  float32_t w = 0.0f;                            /* weight factor */
-
-  e = 0.0f;
-  d = 0.0f;
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator, store in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for the updating filter coefficients */
-    w = e * mu;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result is stored in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Weighting factor for the LMS version */
-    w = e * mu;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-   * start of the state buffer. This prepares the state buffer for the        
-   * next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /*  Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
-   * @} end of LMS group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c
deleted file mode 100644
index 8030ba334b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_init_f32.c    
-*    
-* Description:  Floating-point LMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for floating-point LMS filter.    
-   * @param[in] *S points to an instance of the floating-point LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to the coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   */
-
-/**    
- * \par Description:    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().    
- */
-
-void arm_lms_init_f32(
-  arm_lms_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps */
-  memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-}
-
-/**    
- * @} end of LMS group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c
deleted file mode 100644
index e6dbf3467b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_init_q15.c    
-*    
-* Description:  Q15 LMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-/**    
-* @brief Initialization function for the Q15 LMS filter.    
-* @param[in] *S points to an instance of the Q15 LMS filter structure.    
-* @param[in] numTaps  number of filter coefficients.    
-* @param[in] *pCoeffs points to the coefficient buffer.    
-* @param[in] *pState points to the state buffer.    
-* @param[in] mu step size that controls filter coefficient updates.    
-* @param[in] blockSize number of samples to process.    
-* @param[in] postShift bit shift applied to coefficients.    
-* @return    none.    
-*    
-* \par Description:    
-* pCoeffs points to the array of filter coefficients stored in time reversed order:    
-* 
    
-*    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
-* 
    
-* The initial filter coefficients serve as a starting point for the adaptive filter.    
-* pState points to the array of state variables and size of array is    
-* numTaps+blockSize-1 samples, where blockSize is the number of    
-* input samples processed by each call to arm_lms_q15().    
-*/
-
-void arm_lms_init_q15(
-  arm_lms_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint32_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Assign postShift value to be applied */
-  S->postShift = postShift;
-
-}
-
-/**    
- * @} end of LMS group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c
deleted file mode 100644
index bb3dfcb2a8..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_init_q31.c    
-*    
-* Description:  Q31 LMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for Q31 LMS filter.    
-   * @param[in] *S points to an instance of the Q31 LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @param[in] postShift bit shift applied to coefficients.    
-   * @return none.    
- *    
- * \par Description:    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples,    
- * where blockSize is the number of input samples processed by each call to    
- * arm_lms_q31().    
- */
-
-void arm_lms_init_q31(
-  arm_lms_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint32_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Assign postShift value to be applied */
-  S->postShift = postShift;
-
-}
-
-/**    
- * @} end of LMS group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c
deleted file mode 100644
index 3237f0f1b6..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c
+++ /dev/null
@@ -1,456 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_norm_f32.c    
-*    
-* Description:	Processing function for the floating-point Normalised LMS.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup LMS_NORM Normalized LMS Filters    
- *    
- * This set of functions implements a commonly used adaptive filter.    
- * It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization    
- * factor which increases the adaptation rate of the filter.    
- * The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.    
- *    
- * A normalized least mean square (NLMS) filter consists of two components as shown below.    
- * The first component is a standard transversal or FIR filter.    
- * The second component is a coefficient update mechanism.    
- * The NLMS filter has two input signals.    
- * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.    
- * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.    
- * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.    
- * This "error signal" tends towards zero as the filter adapts.    
- * The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.    
- * \image html LMS.gif "Internal structure of the NLMS adaptive filter"    
- *    
- * The functions operate on blocks of data and each call to the function processes    
- * blockSize samples through the filter.    
- * pSrc points to input signal, pRef points to reference signal,    
- * pOut points to output signal and pErr points to error signal.    
- * All arrays contain blockSize values.    
- *    
- * The functions operate on a block-by-block basis.    
- * Internally, the filter coefficients b[n] are updated on a sample-by-sample basis.    
- * The convergence of the LMS filter is slower compared to the normalized LMS algorithm.    
- *    
- * \par Algorithm:    
- * The output signal y[n] is computed by a standard FIR filter:    
- * 
    
- *     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
    
- *    
- * \par    
- * The error signal equals the difference between the reference signal d[n] and the filter output:    
- * 
    
- *     e[n] = d[n] - y[n].    
- * 
    
- *    
- * \par    
- * After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:    
- * 
    
- *    E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.    
- * 
    
- * The filter coefficients b[k] are then updated on a sample-by-sample basis:    
- * 
    
- *     b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1    
- * 
    
- * where mu is the step size and controls the rate of coefficient convergence.    
- *\par    
- * In the APIs, pCoeffs points to a coefficient array of size numTaps.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size numTaps + blockSize - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * \par    
- * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples.    
- * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,    
- * to be avoided and yields a significant speed improvement.    
- * The state variables are updated after each block of data is processed.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter and    
- * coefficient and state arrays cannot be shared among instances.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * \par    
- * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.    
- * \par Fixed-Point Behavior:    
- * Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.    
- * The following issues must be considered:    
- * - Scaling of coefficients    
- * - Overflow and saturation    
- *    
- * \par Scaling of Coefficients:    
- * Filter coefficients are represented as fractional values and    
- * coefficients are restricted to lie in the range [-1 +1).    
- * The fixed-point functions have an additional scaling parameter postShift.    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * This essentially scales the filter coefficients by 2^postShift and    
- * allows the filter coefficients to exceed the range [+1 -1).    
- * The value of postShift is set by the user based on the expected gain through the system being modeled.    
- *    
- * \par Overflow and Saturation:    
- * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are    
- * described separately as part of the function specific documentation below.    
- */
-
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-
-  /**    
-   * @brief Processing function for floating-point normalized LMS filter.    
-   * @param[in] *S points to an instance of the floating-point normalized LMS filter structure.    
-   * @param[in] *pSrc points to the block of input data.    
-   * @param[in] *pRef points to the block of reference data.    
-   * @param[out] *pOut points to the block of output data.    
-   * @param[out] *pErr points to the block of error data.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   */
-
-void arm_lms_norm_f32(
-  arm_lms_norm_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t mu = S->mu;                          /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  float32_t energy;                              /* Energy of the input */
-  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
-  float32_t w, x0, in;                           /* weight factor, temporary variable to hold input sample and state */
-
-  /* Initializations of error,  difference, Coefficient update */
-  e = 0.0f;
-  d = 0.0f;
-  w = 0.0f;
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= x0 * x0;
-    energy += in * in;
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator, store in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for updating filter coefficients */
-    /* epsilon value 0.000000119209289f */
-    w = (e * mu) / (energy + 0.000000119209289f);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  S->energy = energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u)/4 samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= x0 * x0;
-    energy += in * in;
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator is stored in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for updating filter coefficients */
-    /* epsilon value 0.000000119209289f */
-    w = (e * mu) / (energy + 0.000000119209289f);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCcoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  S->energy = energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-     satrt of the state buffer. This prepares the state buffer for the        
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
-   * @} end of LMS_NORM group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c
deleted file mode 100644
index 6b7b6289e7..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_norm_init_f32.c    
-*    
-* Description:  Floating-point NLMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for floating-point normalized LMS filter.    
-   * @param[in] *S points to an instance of the floating-point LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   *    
- * \par Description:    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples,    
- * where blockSize is the number of input samples processed by each call to arm_lms_norm_f32().    
- */
-
-void arm_lms_norm_init_f32(
-  arm_lms_norm_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialise Energy to zero */
-  S->energy = 0.0f;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0.0f;
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c
deleted file mode 100644
index a70e97bffa..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_norm_init_q15.c    
-*    
-* Description:  Q15 NLMS initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for Q15 normalized LMS filter.    
-   * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @param[in] postShift bit shift applied to coefficients.    
-   * @return none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to the array of state variables and size of array is    
- * numTaps+blockSize-1 samples, where blockSize is the number of input samples processed    
- * by each call to arm_lms_norm_q15().    
- */
-
-void arm_lms_norm_init_q15(
-  arm_lms_norm_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint8_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-  /* Assign post Shift value applied to coefficients */
-  S->postShift = postShift;
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialize reciprocal pointer table */
-  S->recipTable = (q15_t *) armRecipTableQ15;
-
-  /* Initialise Energy to zero */
-  S->energy = 0;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0;
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c
deleted file mode 100644
index b539ecf92c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_norm_init_q31.c    
-*    
-* Description:  Q31 NLMS initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for Q31 normalized LMS filter.    
-   * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @param[in] postShift bit shift applied to coefficients.    
-   * @return none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples,    
- * where blockSize is the number of input samples processed by each call to arm_lms_norm_q31().    
- */
-
-void arm_lms_norm_init_q31(
-  arm_lms_norm_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint8_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1  */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
-
-  /* Assign post Shift value applied to coefficients */
-  S->postShift = postShift;
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialize reciprocal pointer table */
-  S->recipTable = (q31_t *) armRecipTableQ31;
-
-  /* Initialise Energy to zero */
-  S->energy = 0;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0;
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c
deleted file mode 100644
index 13f36a066c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c
+++ /dev/null
@@ -1,435 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_norm_q15.c    
-*    
-* Description:	Q15 NLMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-/**    
-* @brief Processing function for Q15 normalized LMS filter.    
-* @param[in] *S points to an instance of the Q15 normalized LMS filter structure.    
-* @param[in] *pSrc points to the block of input data.    
-* @param[in] *pRef points to the block of reference data.    
-* @param[out] *pOut points to the block of output data.    
-* @param[out] *pErr points to the block of error data.    
-* @param[in] blockSize number of samples to process.    
-* @return none.    
-*    
-* Scaling and Overflow Behavior:     
-* \par     
-* The function is implemented using a 64-bit internal accumulator.     
-* Both coefficients and state variables are represented in 1.15 format and    
-* multiplications yield a 2.30 result. The 2.30 intermediate results are    
-* accumulated in a 64-bit accumulator in 34.30 format.     
-* There is no risk of internal overflow with this approach and the full    
-* precision of intermediate multiplications is preserved. After all additions    
-* have been performed, the accumulator is truncated to 34.15 format by    
-* discarding low 15 bits. Lastly, the accumulator is saturated to yield a    
-* result in 1.15 format.    
-*    
-* \par   
-* 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.    
-*    
- */
-
-void arm_lms_norm_q15(
-  arm_lms_norm_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-  q15_t mu = S->mu;                              /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q31_t energy;                                  /* Energy of the input */
-  q63_t acc;                                     /* Accumulator */
-  q15_t e = 0, d = 0;                            /* error, reference data sample */
-  q15_t w = 0, in;                               /* weight factor and state */
-  q15_t x0;                                      /* temporary variable to hold input sample */
-  //uint32_t shift = (uint32_t) S->postShift + 1u; /* Shift to be applied to the output */ 
-  q15_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
-  q15_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
-  q31_t coef;                                    /* Teporary variable for coefficient */
-  q31_t acc_l, acc_h;
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
-  int32_t uShift = (32 - lShift);
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= (((q31_t) x0 * (x0)) >> 15);
-    energy += (((q31_t) in * (in)) >> 15);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Perform the multiply-accumulate */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-
-#else
-
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (((q31_t) * px++ * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16u);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q15_t) acc;
-    *pErr++ = e;
-
-    /* Calculation of 1/energy */
-    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
-                              &oneByEnergy, S->recipTable);
-
-    /* Calculation of e * mu value */
-    errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
-
-    /* Calculation of (e * mu) * (1/energy) value */
-    acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
-
-    /* Weighting factor for the normalized version */
-    w = (q15_t) __SSAT((q31_t) acc, 16);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q15_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-#endif
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= (((q31_t) x0 * (x0)) >> 15);
-    energy += (((q31_t) in * (in)) >> 15);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (((q31_t) * px++ * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16u);
-
-    /* Converting the result to 1.15 format */
-    //acc = __SSAT((acc >> (16u - shift)), 16u); 
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q15_t) acc;
-    *pErr++ = e;
-
-    /* Calculation of 1/energy */
-    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
-                              &oneByEnergy, S->recipTable);
-
-    /* Calculation of e * mu value */
-    errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
-
-    /* Calculation of (e * mu) * (1/energy) value */
-    acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
-
-    /* Weighting factor for the normalized version */
-    w = (q15_t) __SSAT((q31_t) acc, 16);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q15_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-     satrt of the state buffer. This prepares the state buffer for the        
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* copy (numTaps - 1u) data */
-  tapCnt = (numTaps - 1u);
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-
-/**    
-   * @} end of LMS_NORM group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c
deleted file mode 100644
index fee7015b0b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c
+++ /dev/null
@@ -1,426 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_norm_q31.c    
-*    
-* Description:	Processing function for the Q31 NLMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-/**    
-* @brief Processing function for Q31 normalized LMS filter.    
-* @param[in] *S points to an instance of the Q31 normalized LMS filter structure.    
-* @param[in] *pSrc points to the block of input data.    
-* @param[in] *pRef points to the block of reference data.    
-* @param[out] *pOut points to the block of output data.    
-* @param[out] *pErr points to the block of error data.    
-* @param[in] blockSize number of samples to process.    
-* @return none.    
-*    
-* Scaling and Overflow Behavior:     
-* \par     
-* The function is implemented using an internal 64-bit accumulator.     
-* The accumulator has a 2.62 format and maintains full precision of the intermediate   
-* multiplication results but provides only a single guard bit.     
-* Thus, if the accumulator result overflows it wraps around rather than clip.     
-* In order to avoid overflows completely the input signal must be scaled down by    
-* log2(numTaps) bits. The reference signal should not be scaled down.     
-* After all multiply-accumulates are performed, the 2.62 accumulator is shifted    
-* and saturated to 1.31 format to yield the final result.     
-* The output signal and error signal are in 1.31 format.     
-*    
-* \par    
-* 	In this filter, filter coefficients are updated for each sample and the    
-* updation of filter cofficients are saturted.    
-*     
-*/
-
-void arm_lms_norm_q31(
-  arm_lms_norm_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-  q31_t mu = S->mu;                              /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t energy;                                  /* Energy of the input */
-  q63_t acc;                                     /* Accumulator */
-  q31_t e = 0, d = 0;                            /* error, reference data sample */
-  q31_t w = 0, in;                               /* weight factor and state */
-  q31_t x0;                                      /* temporary variable to hold input sample */
-//  uint32_t shift = 32u - ((uint32_t) S->postShift + 1u);        /* Shift to be applied to the output */      
-  q31_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
-  q31_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
-  q31_t coef;                                    /* Temporary variable for coef */
-  q31_t acc_l, acc_h;                            /*  temporary input */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy = (q31_t) ((((q63_t) energy << 32) -
-                       (((q63_t) x0 * x0) << 1)) >> 32);
-    energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q31_t) acc;
-    *pErr++ = e;
-
-    /* Calculates the reciprocal of energy */
-    postShift = arm_recip_q31(energy + DELTA_Q31,
-                              &oneByEnergy, &S->recipTable[0]);
-
-    /* Calculation of product of (e * mu) */
-    errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Weighting factor for the normalized version */
-    w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q31_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy =
-      (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
-    energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-
-    //acc = (q31_t) (acc >> shift); 
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q31_t) acc;
-    *pErr++ = e;
-
-    /* Calculates the reciprocal of energy */
-    postShift =
-      arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
-
-    /* Calculation of product of (e * mu) */
-    errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Weighting factor for the normalized version */
-    w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q31_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the     
-     start of the state buffer. This prepares the state buffer for the        
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c
deleted file mode 100644
index bb225d3c2e..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c
+++ /dev/null
@@ -1,374 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_q15.c    
-*    
-* Description:	Processing function for the Q15 LMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
- /**    
- * @brief Processing function for Q15 LMS filter.    
- * @param[in] *S points to an instance of the Q15 LMS filter structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[in] *pRef points to the block of reference data.    
- * @param[out] *pOut points to the block of output data.    
- * @param[out] *pErr points to the block of error data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- *    
- * \par Scaling and Overflow Behavior:    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- *   
- * \par   
- * 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.   
- *    
- */
-
-void arm_lms_q15(
-  const arm_lms_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t mu = S->mu;                              /* Adaptive factor */
-  q15_t *px;                                     /* Temporary pointer for state */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t acc;                                     /* Accumulator */
-  q15_t e = 0;                                   /* error of data sample */
-  q15_t alpha;                                   /* Intermediate constant for taps update */
-  q31_t acc_l, acc_h;
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
-  int32_t uShift = (32 - lShift);
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t coef;                                    /* Teporary variable for coefficient */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initializing blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2u;
-
-    while(tapCnt > 0u)
-    {
-      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      /* Perform the multiply-accumulate */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-
-#else
-
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q15_t) acc;
-
-    *pErr++ = (q15_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
-
-    /* Initialize state pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2u;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-#else
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-#endif
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (q63_t) ((q31_t) (*px++) * (*pb++));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q15_t) acc;
-
-    *pErr++ = (q15_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb++ += (q15_t) (((q31_t) alpha * (*px++)) >> 15);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-     start of the state buffer. This prepares the state buffer for the   
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /*  Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
-   * @} end of LMS group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c
deleted file mode 100644
index 96ae9ecf65..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c
+++ /dev/null
@@ -1,364 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_q31.c    
-*    
-* Description:	Processing function for the Q31 LMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
- /**    
- * @brief Processing function for Q31 LMS filter.    
- * @param[in]  *S points to an instance of the Q15 LMS filter structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[in]  *pRef points to the block of reference data.    
- * @param[out] *pOut points to the block of output data.    
- * @param[out] *pErr points to the block of error data.    
- * @param[in]  blockSize number of samples to process.    
- * @return     none.    
- *    
- * \par Scaling and Overflow Behavior:     
- * The function is implemented using an internal 64-bit accumulator.     
- * The accumulator has a 2.62 format and maintains full precision of the intermediate    
- * multiplication results but provides only a single guard bit.     
- * Thus, if the accumulator result overflows it wraps around rather than clips.     
- * In order to avoid overflows completely the input signal must be scaled down by    
- * log2(numTaps) bits.     
- * The reference signal should not be scaled down.     
- * After all multiply-accumulates are performed, the 2.62 accumulator is shifted    
- * and saturated to 1.31 format to yield the final result.     
- * The output signal and error signal are in 1.31 format.     
- *    
- * \par    
- * 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.    
- */
-
-void arm_lms_q31(
-  const arm_lms_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t mu = S->mu;                              /* Adaptive factor */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t acc;                                     /* Accumulator */
-  q31_t e = 0;                                   /* error of data sample */
-  q31_t alpha;                                   /* Intermediate constant for taps update */
-  q31_t coef;                                    /* Temporary variable for coef */
-  q31_t acc_l, acc_h;                            /*  temporary input */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initializing blkCnt with blockSize */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      /* acc +=  b[N] * x[n-N] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-1] * x[n-N-1] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-2] * x[n-N-2] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-3] * x[n-N-3] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q31_t) acc;
-
-    *pErr++ = (q31_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Initialize state pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
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-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Store the result from accumulator into the destination buffer. */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q31_t) acc;
-
-    *pErr++ = (q31_t) e;
-
-    /* Weighting factor for the LMS version */
-    alpha = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb += (coef << 1u);
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the     
-     start of the state buffer. This prepares the state buffer for the   
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /*  Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
-   * @} end of LMS group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvopt
deleted file mode 100644
index 0740c1eb79..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvopt
+++ /dev/null
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvproj
deleted file mode 100644
index 6c370a47d6..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM0x_math.uvproj
+++ /dev/null
@@ -1,3253 +0,0 @@
-
-
-
-  1.1
-
-  
### uVision Project, (C) Keil Software

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-              1
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-        
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-              1
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-            
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-              1
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-              1
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-              1
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-        
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-              1
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-        
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-              1
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvopt
deleted file mode 100644
index b56521505e..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvopt
+++ /dev/null
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvproj
deleted file mode 100644
index 6ace95fc32..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM3x_math.uvproj
+++ /dev/null
@@ -1,3253 +0,0 @@
-
-
-
-  1.1
-
-  
### uVision Project, (C) Keil Software

-
-  
-    
-      DSP_Lib CM3 LE
-      0x3
-      ARM-GNU
-      
-        
-          Cortex-M3
-          ARM
-          CLOCK(12000000) CPUTYPE("Cortex-M3") ESEL ELITTLE
-          
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-          
-          4349
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvopt
deleted file mode 100644
index 84e27482e5..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvopt
+++ /dev/null
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvproj
deleted file mode 100644
index 3c2a5e6adb..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexM4x_math.uvproj
+++ /dev/null
@@ -1,6495 +0,0 @@
-
-
-
-  1.1
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-  
### uVision Project, (C) Keil Software

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-            
-            
-              arm_mat_mult_q31.c
-              1
-              ../MatrixFunctions/arm_mat_mult_q31.c
-            
-            
-              arm_mat_scale_f32.c
-              1
-              ../MatrixFunctions/arm_mat_scale_f32.c
-            
-            
-              arm_mat_scale_q15.c
-              1
-              ../MatrixFunctions/arm_mat_scale_q15.c
-            
-            
-              arm_mat_scale_q31.c
-              1
-              ../MatrixFunctions/arm_mat_scale_q31.c
-            
-            
-              arm_mat_sub_f32.c
-              1
-              ../MatrixFunctions/arm_mat_sub_f32.c
-            
-            
-              arm_mat_sub_q15.c
-              1
-              ../MatrixFunctions/arm_mat_sub_q15.c
-            
-            
-              arm_mat_sub_q31.c
-              1
-              ../MatrixFunctions/arm_mat_sub_q31.c
-            
-            
-              arm_mat_trans_f32.c
-              1
-              ../MatrixFunctions/arm_mat_trans_f32.c
-            
-            
-              arm_mat_trans_q15.c
-              1
-              ../MatrixFunctions/arm_mat_trans_q15.c
-            
-            
-              arm_mat_trans_q31.c
-              1
-              ../MatrixFunctions/arm_mat_trans_q31.c
-            
-          
-        
-        
-          TransformFunctions
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-            
-              arm_bitreversal.c
-              1
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-            
-              arm_cfft_radix2_f32.c
-              1
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-            
-              arm_cfft_radix2_init_f32.c
-              1
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-            
-              arm_cfft_radix2_init_q15.c
-              1
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-            
-              arm_cfft_radix2_init_q31.c
-              1
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-            
-              arm_cfft_radix2_q15.c
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-            
-              arm_cfft_radix2_q31.c
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-            
-            
-              arm_cfft_radix4_f32.c
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-            
-              arm_cfft_radix4_init_f32.c
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-            
-              arm_cfft_radix4_init_q15.c
-              1
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-            
-              arm_cfft_radix4_init_q31.c
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-            
-              arm_cfft_radix4_q15.c
-              1
-              ../TransformFunctions/arm_cfft_radix4_q15.c
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-            
-              arm_cfft_radix4_q31.c
-              1
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-            
-            
-              arm_dct4_f32.c
-              1
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-            
-            
-              arm_dct4_init_f32.c
-              1
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-            
-              arm_dct4_init_q15.c
-              1
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-            
-            
-              arm_dct4_init_q31.c
-              1
-              ../TransformFunctions/arm_dct4_init_q31.c
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-            
-              arm_dct4_q15.c
-              1
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-            
-              arm_dct4_q31.c
-              1
-              ../TransformFunctions/arm_dct4_q31.c
-            
-            
-              arm_rfft_f32.c
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-            
-              arm_rfft_init_f32.c
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-            
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-            
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-            
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-            
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-              arm_common_tables.c
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexMx_math_Build.bat b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexMx_math_Build.bat
deleted file mode 100644
index 007812c2d0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/G++/arm_cortexMx_math_Build.bat
+++ /dev/null
@@ -1,17 +0,0 @@
-
-SET TMP=C:\Temp
-SET TEMP=C:\Temp
-
-SET UVEXE=C:\Keil\UV4\UV4.EXE
-
-@echo   Building DSP Library for Cortex-M0 Little Endian
-%UVEXE% -rb arm_cortexM0x_math.uvproj -t"DSP_Lib CM0 LE" -o"DSP_Lib CM0 LE.txt" -j0
-
-@echo   Building DSP Library for Cortex-M3 Little Endian
-%UVEXE% -rb arm_cortexM3x_math.uvproj -t"DSP_Lib CM3 LE" -o"DSP_Lib CM3 LE.txt" -j0
-
-@echo   Building DSP Library for Cortex-M4 Little Endian
-%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE" -o"DSP_Lib CM4 LE.txt" -j0
-
-@echo   Building DSP Library for Cortex-M4 with FPU Little Endian
-%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE FPU" -o"DSP_Lib CM4 LE FPU.txt" -j0
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM0x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM0x_math.uvopt
deleted file mode 100644
index 6ecf373652..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM0x_math.uvopt
+++ /dev/null
@@ -1,3937 +0,0 @@
-
-
-
-  1.0
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### uVision Project, (C) Keil Software

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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM0x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM0x_math.uvproj
deleted file mode 100644
index dfdbbd51b6..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM0x_math.uvproj
+++ /dev/null
@@ -1,3253 +0,0 @@
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-          TransformFunctions
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvopt
deleted file mode 100644
index 8e5a82fd8e..0000000000
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+++ /dev/null
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvproj
deleted file mode 100644
index a32c386769..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM3x_math.uvproj
+++ /dev/null
@@ -1,3253 +0,0 @@
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-              arm_lms_norm_f32.c
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-          
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-          MatrixFunctions
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-              1
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-              arm_mat_scale_f32.c
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-              1
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-              arm_rfft_init_q15.c
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-          
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-          
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-              arm_pid_init_f32.c
-              1
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-              arm_pid_init_q15.c
-              1
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-              arm_pid_init_q31.c
-              1
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-              arm_pid_reset_f32.c
-              1
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-              arm_pid_reset_q15.c
-              1
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-              1
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-              arm_sin_cos_f32.c
-              1
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-              1
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-          
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-        
-          StatisticsFunctions
-          
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-              1
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-              arm_max_q7.c
-              1
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-              arm_max_q15.c
-              1
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-              arm_max_q31.c
-              1
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-              arm_mean_f32.c
-              1
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-              arm_mean_q7.c
-              1
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-              arm_mean_q15.c
-              1
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-              arm_mean_q31.c
-              1
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-              arm_min_f32.c
-              1
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-              arm_min_q7.c
-              1
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-              arm_min_q15.c
-              1
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-              arm_min_q31.c
-              1
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-              arm_power_f32.c
-              1
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-              arm_power_q7.c
-              1
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-              arm_power_q15.c
-              1
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-              arm_power_q31.c
-              1
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-              arm_rms_f32.c
-              1
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-              arm_rms_q15.c
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-              arm_std_f32.c
-              1
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-              arm_std_q15.c
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-              arm_var_q15.c
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-              arm_var_q31.c
-              1
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-        
-        
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-          
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-              arm_copy_f32.c
-              1
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-              arm_copy_q7.c
-              1
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-              arm_copy_q15.c
-              1
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-              arm_copy_q31.c
-              1
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-              arm_fill_f32.c
-              1
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-              arm_fill_q7.c
-              1
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-              arm_fill_q15.c
-              1
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-              arm_fill_q31.c
-              1
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-              arm_float_to_q7.c
-              1
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-              arm_float_to_q15.c
-              1
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-              arm_float_to_q31.c
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-              arm_q7_to_float.c
-              1
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-              arm_q7_to_q15.c
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-              arm_q7_to_q31.c
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-              arm_q15_to_float.c
-              1
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-              arm_q15_to_q7.c
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-              arm_q15_to_q31.c
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-              arm_q31_to_float.c
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-              arm_q31_to_q7.c
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-              arm_q31_to_q15.c
-              1
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-          CommonTables
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-              arm_common_tables.c
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM4x_math.uvopt b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM4x_math.uvopt
deleted file mode 100644
index 9201baab89..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM4x_math.uvopt
+++ /dev/null
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diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM4x_math.uvproj b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM4x_math.uvproj
deleted file mode 100644
index ad55fd5688..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexM4x_math.uvproj
+++ /dev/null
@@ -1,6495 +0,0 @@
-
-
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-  1.1
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-  
### uVision Project, (C) Keil Software

-
-  
-    
-      DSP_Lib CM4 LE
-      0x3
-      ARM-GNU
-      
-        
-          Cortex-M4
-          ARM
-          CLOCK(12000000) CPUTYPE("Cortex-M4") ESEL ELITTLE
-          
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-          
-          5125
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-            
-            
-            0
-            0
-          
-          
-            1
-            0
-            cmd.exe /C copy ".\intermediateFiles\lib@L.a" "..\..\..\Lib\GCC\"
-            
-            0
-            0
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-          0
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-        
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-          0
-          0
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-          0
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-          1
-          0
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-          0
-          0
-          3
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-          
-        
-        
-          SARMCM3.DLL
-          
-          DCM.DLL
-          -pCM4
-          SARMCM3.DLL
-          
-          TCM.DLL
-          -pCM4
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-          
-            1
-            0
-            0
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-            16
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-            1
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-              
-                0
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-                0
-                0x0
-                0x0
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-                0
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-                0
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-            
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-            0
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-            5
-            2
-            1
-            
-              -mcpu=cortex-m4 -fno-strict-aliasing -ffunction-sections
-              ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE
-              
-              ..\..\..\Include
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-            
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-            
-            -mcpu=cortex-m4 -Wl,--gc-sections
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-            
-              arm_shift_q31.c
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-            
-              arm_sqrt_q31.c
-              1
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-        
-          ComplexMathFunctions
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-              arm_cmplx_conj_f32.c
-              1
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-          TransformFunctions
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-            
-            
-              arm_fir_f32.c
-              1
-              ../FilteringFunctions/arm_fir_f32.c
-            
-            
-              arm_fir_fast_q15.c
-              1
-              ../FilteringFunctions/arm_fir_fast_q15.c
-            
-            
-              arm_fir_fast_q31.c
-              1
-              ../FilteringFunctions/arm_fir_fast_q31.c
-            
-            
-              arm_fir_init_f32.c
-              1
-              ../FilteringFunctions/arm_fir_init_f32.c
-            
-            
-              arm_fir_init_q7.c
-              1
-              ../FilteringFunctions/arm_fir_init_q7.c
-            
-            
-              arm_fir_init_q15.c
-              1
-              ../FilteringFunctions/arm_fir_init_q15.c
-            
-            
-              arm_fir_init_q31.c
-              1
-              ../FilteringFunctions/arm_fir_init_q31.c
-            
-            
-              arm_fir_interpolate_f32.c
-              1
-              ../FilteringFunctions/arm_fir_interpolate_f32.c
-            
-            
-              arm_fir_interpolate_init_f32.c
-              1
-              ../FilteringFunctions/arm_fir_interpolate_init_f32.c
-            
-            
-              arm_fir_interpolate_init_q15.c
-              1
-              ../FilteringFunctions/arm_fir_interpolate_init_q15.c
-            
-            
-              arm_fir_interpolate_init_q31.c
-              1
-              ../FilteringFunctions/arm_fir_interpolate_init_q31.c
-            
-            
-              arm_fir_interpolate_q15.c
-              1
-              ../FilteringFunctions/arm_fir_interpolate_q15.c
-            
-            
-              arm_fir_interpolate_q31.c
-              1
-              ../FilteringFunctions/arm_fir_interpolate_q31.c
-            
-            
-              arm_fir_lattice_f32.c
-              1
-              ../FilteringFunctions/arm_fir_lattice_f32.c
-            
-            
-              arm_fir_lattice_init_f32.c
-              1
-              ../FilteringFunctions/arm_fir_lattice_init_f32.c
-            
-            
-              arm_fir_lattice_init_q15.c
-              1
-              ../FilteringFunctions/arm_fir_lattice_init_q15.c
-            
-            
-              arm_fir_lattice_init_q31.c
-              1
-              ../FilteringFunctions/arm_fir_lattice_init_q31.c
-            
-            
-              arm_fir_lattice_q15.c
-              1
-              ../FilteringFunctions/arm_fir_lattice_q15.c
-            
-            
-              arm_fir_lattice_q31.c
-              1
-              ../FilteringFunctions/arm_fir_lattice_q31.c
-            
-            
-              arm_fir_q7.c
-              1
-              ../FilteringFunctions/arm_fir_q7.c
-            
-            
-              arm_fir_q15.c
-              1
-              ../FilteringFunctions/arm_fir_q15.c
-            
-            
-              arm_fir_q31.c
-              1
-              ../FilteringFunctions/arm_fir_q31.c
-            
-            
-              arm_fir_sparse_f32.c
-              1
-              ../FilteringFunctions/arm_fir_sparse_f32.c
-            
-            
-              arm_fir_sparse_init_f32.c
-              1
-              ../FilteringFunctions/arm_fir_sparse_init_f32.c
-            
-            
-              arm_fir_sparse_init_q7.c
-              1
-              ../FilteringFunctions/arm_fir_sparse_init_q7.c
-            
-            
-              arm_fir_sparse_init_q15.c
-              1
-              ../FilteringFunctions/arm_fir_sparse_init_q15.c
-            
-            
-              arm_fir_sparse_init_q31.c
-              1
-              ../FilteringFunctions/arm_fir_sparse_init_q31.c
-            
-            
-              arm_fir_sparse_q7.c
-              1
-              ../FilteringFunctions/arm_fir_sparse_q7.c
-            
-            
-              arm_fir_sparse_q15.c
-              1
-              ../FilteringFunctions/arm_fir_sparse_q15.c
-            
-            
-              arm_fir_sparse_q31.c
-              1
-              ../FilteringFunctions/arm_fir_sparse_q31.c
-            
-            
-              arm_iir_lattice_f32.c
-              1
-              ../FilteringFunctions/arm_iir_lattice_f32.c
-            
-            
-              arm_iir_lattice_init_f32.c
-              1
-              ../FilteringFunctions/arm_iir_lattice_init_f32.c
-            
-            
-              arm_iir_lattice_init_q15.c
-              1
-              ../FilteringFunctions/arm_iir_lattice_init_q15.c
-            
-            
-              arm_iir_lattice_init_q31.c
-              1
-              ../FilteringFunctions/arm_iir_lattice_init_q31.c
-            
-            
-              arm_iir_lattice_q15.c
-              1
-              ../FilteringFunctions/arm_iir_lattice_q15.c
-            
-            
-              arm_iir_lattice_q31.c
-              1
-              ../FilteringFunctions/arm_iir_lattice_q31.c
-            
-            
-              arm_lms_f32.c
-              1
-              ../FilteringFunctions/arm_lms_f32.c
-            
-            
-              arm_lms_init_f32.c
-              1
-              ../FilteringFunctions/arm_lms_init_f32.c
-            
-            
-              arm_lms_init_q15.c
-              1
-              ../FilteringFunctions/arm_lms_init_q15.c
-            
-            
-              arm_lms_init_q31.c
-              1
-              ../FilteringFunctions/arm_lms_init_q31.c
-            
-            
-              arm_lms_norm_f32.c
-              1
-              ../FilteringFunctions/arm_lms_norm_f32.c
-            
-            
-              arm_lms_norm_init_f32.c
-              1
-              ../FilteringFunctions/arm_lms_norm_init_f32.c
-            
-            
-              arm_lms_norm_init_q15.c
-              1
-              ../FilteringFunctions/arm_lms_norm_init_q15.c
-            
-            
-              arm_lms_norm_init_q31.c
-              1
-              ../FilteringFunctions/arm_lms_norm_init_q31.c
-            
-            
-              arm_lms_norm_q15.c
-              1
-              ../FilteringFunctions/arm_lms_norm_q15.c
-            
-            
-              arm_lms_norm_q31.c
-              1
-              ../FilteringFunctions/arm_lms_norm_q31.c
-            
-            
-              arm_lms_q15.c
-              1
-              ../FilteringFunctions/arm_lms_q15.c
-            
-            
-              arm_lms_q31.c
-              1
-              ../FilteringFunctions/arm_lms_q31.c
-            
-          
-        
-        
-          MatrixFunctions
-          
-            
-              arm_mat_add_f32.c
-              1
-              ../MatrixFunctions/arm_mat_add_f32.c
-            
-            
-              arm_mat_add_q15.c
-              1
-              ../MatrixFunctions/arm_mat_add_q15.c
-            
-            
-              arm_mat_add_q31.c
-              1
-              ../MatrixFunctions/arm_mat_add_q31.c
-            
-            
-              arm_mat_init_f32.c
-              1
-              ../MatrixFunctions/arm_mat_init_f32.c
-            
-            
-              arm_mat_init_q15.c
-              1
-              ../MatrixFunctions/arm_mat_init_q15.c
-            
-            
-              arm_mat_init_q31.c
-              1
-              ../MatrixFunctions/arm_mat_init_q31.c
-            
-            
-              arm_mat_inverse_f32.c
-              1
-              ../MatrixFunctions/arm_mat_inverse_f32.c
-            
-            
-              arm_mat_mult_f32.c
-              1
-              ../MatrixFunctions/arm_mat_mult_f32.c
-            
-            
-              arm_mat_mult_fast_q15.c
-              1
-              ../MatrixFunctions/arm_mat_mult_fast_q15.c
-            
-            
-              arm_mat_mult_fast_q31.c
-              1
-              ../MatrixFunctions/arm_mat_mult_fast_q31.c
-            
-            
-              arm_mat_mult_q15.c
-              1
-              ../MatrixFunctions/arm_mat_mult_q15.c
-            
-            
-              arm_mat_mult_q31.c
-              1
-              ../MatrixFunctions/arm_mat_mult_q31.c
-            
-            
-              arm_mat_scale_f32.c
-              1
-              ../MatrixFunctions/arm_mat_scale_f32.c
-            
-            
-              arm_mat_scale_q15.c
-              1
-              ../MatrixFunctions/arm_mat_scale_q15.c
-            
-            
-              arm_mat_scale_q31.c
-              1
-              ../MatrixFunctions/arm_mat_scale_q31.c
-            
-            
-              arm_mat_sub_f32.c
-              1
-              ../MatrixFunctions/arm_mat_sub_f32.c
-            
-            
-              arm_mat_sub_q15.c
-              1
-              ../MatrixFunctions/arm_mat_sub_q15.c
-            
-            
-              arm_mat_sub_q31.c
-              1
-              ../MatrixFunctions/arm_mat_sub_q31.c
-            
-            
-              arm_mat_trans_f32.c
-              1
-              ../MatrixFunctions/arm_mat_trans_f32.c
-            
-            
-              arm_mat_trans_q15.c
-              1
-              ../MatrixFunctions/arm_mat_trans_q15.c
-            
-            
-              arm_mat_trans_q31.c
-              1
-              ../MatrixFunctions/arm_mat_trans_q31.c
-            
-          
-        
-        
-          TransformFunctions
-          
-            
-              arm_bitreversal.c
-              1
-              ../TransformFunctions/arm_bitreversal.c
-            
-            
-              arm_cfft_radix2_f32.c
-              1
-              ../TransformFunctions/arm_cfft_radix2_f32.c
-            
-            
-              arm_cfft_radix2_init_f32.c
-              1
-              ../TransformFunctions/arm_cfft_radix2_init_f32.c
-            
-            
-              arm_cfft_radix2_init_q15.c
-              1
-              ../TransformFunctions/arm_cfft_radix2_init_q15.c
-            
-            
-              arm_cfft_radix2_init_q31.c
-              1
-              ../TransformFunctions/arm_cfft_radix2_init_q31.c
-            
-            
-              arm_cfft_radix2_q15.c
-              1
-              ../TransformFunctions/arm_cfft_radix2_q15.c
-            
-            
-              arm_cfft_radix2_q31.c
-              1
-              ../TransformFunctions/arm_cfft_radix2_q31.c
-            
-            
-              arm_cfft_radix4_f32.c
-              1
-              ../TransformFunctions/arm_cfft_radix4_f32.c
-            
-            
-              arm_cfft_radix4_init_f32.c
-              1
-              ../TransformFunctions/arm_cfft_radix4_init_f32.c
-            
-            
-              arm_cfft_radix4_init_q15.c
-              1
-              ../TransformFunctions/arm_cfft_radix4_init_q15.c
-            
-            
-              arm_cfft_radix4_init_q31.c
-              1
-              ../TransformFunctions/arm_cfft_radix4_init_q31.c
-            
-            
-              arm_cfft_radix4_q15.c
-              1
-              ../TransformFunctions/arm_cfft_radix4_q15.c
-            
-            
-              arm_cfft_radix4_q31.c
-              1
-              ../TransformFunctions/arm_cfft_radix4_q31.c
-            
-            
-              arm_dct4_f32.c
-              1
-              ../TransformFunctions/arm_dct4_f32.c
-            
-            
-              arm_dct4_init_f32.c
-              1
-              ../TransformFunctions/arm_dct4_init_f32.c
-            
-            
-              arm_dct4_init_q15.c
-              1
-              ../TransformFunctions/arm_dct4_init_q15.c
-            
-            
-              arm_dct4_init_q31.c
-              1
-              ../TransformFunctions/arm_dct4_init_q31.c
-            
-            
-              arm_dct4_q15.c
-              1
-              ../TransformFunctions/arm_dct4_q15.c
-            
-            
-              arm_dct4_q31.c
-              1
-              ../TransformFunctions/arm_dct4_q31.c
-            
-            
-              arm_rfft_f32.c
-              1
-              ../TransformFunctions/arm_rfft_f32.c
-            
-            
-              arm_rfft_init_f32.c
-              1
-              ../TransformFunctions/arm_rfft_init_f32.c
-            
-            
-              arm_rfft_init_q15.c
-              1
-              ../TransformFunctions/arm_rfft_init_q15.c
-            
-            
-              arm_rfft_init_q31.c
-              1
-              ../TransformFunctions/arm_rfft_init_q31.c
-            
-            
-              arm_rfft_q15.c
-              1
-              ../TransformFunctions/arm_rfft_q15.c
-            
-            
-              arm_rfft_q31.c
-              1
-              ../TransformFunctions/arm_rfft_q31.c
-            
-          
-        
-        
-          ControllerFunctions
-          
-            
-              arm_pid_init_f32.c
-              1
-              ../ControllerFunctions/arm_pid_init_f32.c
-            
-            
-              arm_pid_init_q15.c
-              1
-              ../ControllerFunctions/arm_pid_init_q15.c
-            
-            
-              arm_pid_init_q31.c
-              1
-              ../ControllerFunctions/arm_pid_init_q31.c
-            
-            
-              arm_pid_reset_f32.c
-              1
-              ../ControllerFunctions/arm_pid_reset_f32.c
-            
-            
-              arm_pid_reset_q15.c
-              1
-              ../ControllerFunctions/arm_pid_reset_q15.c
-            
-            
-              arm_pid_reset_q31.c
-              1
-              ../ControllerFunctions/arm_pid_reset_q31.c
-            
-            
-              arm_sin_cos_f32.c
-              1
-              ../ControllerFunctions/arm_sin_cos_f32.c
-            
-            
-              arm_sin_cos_q31.c
-              1
-              ../ControllerFunctions/arm_sin_cos_q31.c
-            
-          
-        
-        
-          StatisticsFunctions
-          
-            
-              arm_max_f32.c
-              1
-              ../StatisticsFunctions/arm_max_f32.c
-            
-            
-              arm_max_q7.c
-              1
-              ../StatisticsFunctions/arm_max_q7.c
-            
-            
-              arm_max_q15.c
-              1
-              ../StatisticsFunctions/arm_max_q15.c
-            
-            
-              arm_max_q31.c
-              1
-              ../StatisticsFunctions/arm_max_q31.c
-            
-            
-              arm_mean_f32.c
-              1
-              ../StatisticsFunctions/arm_mean_f32.c
-            
-            
-              arm_mean_q7.c
-              1
-              ../StatisticsFunctions/arm_mean_q7.c
-            
-            
-              arm_mean_q15.c
-              1
-              ../StatisticsFunctions/arm_mean_q15.c
-            
-            
-              arm_mean_q31.c
-              1
-              ../StatisticsFunctions/arm_mean_q31.c
-            
-            
-              arm_min_f32.c
-              1
-              ../StatisticsFunctions/arm_min_f32.c
-            
-            
-              arm_min_q7.c
-              1
-              ../StatisticsFunctions/arm_min_q7.c
-            
-            
-              arm_min_q15.c
-              1
-              ../StatisticsFunctions/arm_min_q15.c
-            
-            
-              arm_min_q31.c
-              1
-              ../StatisticsFunctions/arm_min_q31.c
-            
-            
-              arm_power_f32.c
-              1
-              ../StatisticsFunctions/arm_power_f32.c
-            
-            
-              arm_power_q7.c
-              1
-              ../StatisticsFunctions/arm_power_q7.c
-            
-            
-              arm_power_q15.c
-              1
-              ../StatisticsFunctions/arm_power_q15.c
-            
-            
-              arm_power_q31.c
-              1
-              ../StatisticsFunctions/arm_power_q31.c
-            
-            
-              arm_rms_f32.c
-              1
-              ../StatisticsFunctions/arm_rms_f32.c
-            
-            
-              arm_rms_q15.c
-              1
-              ../StatisticsFunctions/arm_rms_q15.c
-            
-            
-              arm_rms_q31.c
-              1
-              ../StatisticsFunctions/arm_rms_q31.c
-            
-            
-              arm_std_f32.c
-              1
-              ../StatisticsFunctions/arm_std_f32.c
-            
-            
-              arm_std_q15.c
-              1
-              ../StatisticsFunctions/arm_std_q15.c
-            
-            
-              arm_std_q31.c
-              1
-              ../StatisticsFunctions/arm_std_q31.c
-            
-            
-              arm_var_f32.c
-              1
-              ../StatisticsFunctions/arm_var_f32.c
-            
-            
-              arm_var_q15.c
-              1
-              ../StatisticsFunctions/arm_var_q15.c
-            
-            
-              arm_var_q31.c
-              1
-              ../StatisticsFunctions/arm_var_q31.c
-            
-          
-        
-        
-          SupportFunctions
-          
-            
-              arm_copy_f32.c
-              1
-              ../SupportFunctions/arm_copy_f32.c
-            
-            
-              arm_copy_q7.c
-              1
-              ../SupportFunctions/arm_copy_q7.c
-            
-            
-              arm_copy_q15.c
-              1
-              ../SupportFunctions/arm_copy_q15.c
-            
-            
-              arm_copy_q31.c
-              1
-              ../SupportFunctions/arm_copy_q31.c
-            
-            
-              arm_fill_f32.c
-              1
-              ../SupportFunctions/arm_fill_f32.c
-            
-            
-              arm_fill_q7.c
-              1
-              ../SupportFunctions/arm_fill_q7.c
-            
-            
-              arm_fill_q15.c
-              1
-              ../SupportFunctions/arm_fill_q15.c
-            
-            
-              arm_fill_q31.c
-              1
-              ../SupportFunctions/arm_fill_q31.c
-            
-            
-              arm_float_to_q7.c
-              1
-              ../SupportFunctions/arm_float_to_q7.c
-            
-            
-              arm_float_to_q15.c
-              1
-              ../SupportFunctions/arm_float_to_q15.c
-            
-            
-              arm_float_to_q31.c
-              1
-              ../SupportFunctions/arm_float_to_q31.c
-            
-            
-              arm_q7_to_float.c
-              1
-              ../SupportFunctions/arm_q7_to_float.c
-            
-            
-              arm_q7_to_q15.c
-              1
-              ../SupportFunctions/arm_q7_to_q15.c
-            
-            
-              arm_q7_to_q31.c
-              1
-              ../SupportFunctions/arm_q7_to_q31.c
-            
-            
-              arm_q15_to_float.c
-              1
-              ../SupportFunctions/arm_q15_to_float.c
-            
-            
-              arm_q15_to_q7.c
-              1
-              ../SupportFunctions/arm_q15_to_q7.c
-            
-            
-              arm_q15_to_q31.c
-              1
-              ../SupportFunctions/arm_q15_to_q31.c
-            
-            
-              arm_q31_to_float.c
-              1
-              ../SupportFunctions/arm_q31_to_float.c
-            
-            
-              arm_q31_to_q7.c
-              1
-              ../SupportFunctions/arm_q31_to_q7.c
-            
-            
-              arm_q31_to_q15.c
-              1
-              ../SupportFunctions/arm_q31_to_q15.c
-            
-          
-        
-        
-          CommonTables
-          
-            
-              arm_common_tables.c
-              1
-              ../CommonTables/arm_common_tables.c
-            
-          
-        
-      
-    
-  
-
-
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexMx_math_Build.bat b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexMx_math_Build.bat
deleted file mode 100644
index 007812c2d0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/GCC/arm_cortexMx_math_Build.bat
+++ /dev/null
@@ -1,17 +0,0 @@
-
-SET TMP=C:\Temp
-SET TEMP=C:\Temp
-
-SET UVEXE=C:\Keil\UV4\UV4.EXE
-
-@echo   Building DSP Library for Cortex-M0 Little Endian
-%UVEXE% -rb arm_cortexM0x_math.uvproj -t"DSP_Lib CM0 LE" -o"DSP_Lib CM0 LE.txt" -j0
-
-@echo   Building DSP Library for Cortex-M3 Little Endian
-%UVEXE% -rb arm_cortexM3x_math.uvproj -t"DSP_Lib CM3 LE" -o"DSP_Lib CM3 LE.txt" -j0
-
-@echo   Building DSP Library for Cortex-M4 Little Endian
-%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE" -o"DSP_Lib CM4 LE.txt" -j0
-
-@echo   Building DSP Library for Cortex-M4 with FPU Little Endian
-%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE FPU" -o"DSP_Lib CM4 LE FPU.txt" -j0
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c
deleted file mode 100644
index 9ebd9e21c7..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c
+++ /dev/null
@@ -1,206 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_add_f32.c    
-*    
-* Description:	Floating-point matrix addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @defgroup MatrixAdd Matrix Addition        
- *        
- * Adds two matrices.        
- * \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"        
- *        
- * The functions check to make sure that        
- * pSrcA, pSrcB, and pDst have the same        
- * number of rows and columns.        
- */
-
-/**        
- * @addtogroup MatrixAdd        
- * @{        
- */
-
-
-/**        
- * @brief Floating-point matrix addition.        
- * @param[in]       *pSrcA points to the first input matrix structure        
- * @param[in]       *pSrcB points to the second input matrix structure        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- */
-
-arm_status arm_mat_add_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer   */
-
-#ifndef ARM_MATH_CM0
-
-  float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix addition */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0
-
-    /* Loop unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* out = sourceA + sourceB */
-      out1 = inA1 + inB1;
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* out = sourceA + sourceB */
-      out2 = inA2 + inB2;
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* out = sourceA + sourceB */
-      out1 = inA1 + inB1;
-
-      /* out = sourceA + sourceB */
-      out2 = inA2 + inB2;
-
-      /* Store result in destination */
-      pOut[2] = out1;
-
-      /* Store result in destination */
-      pOut[3] = out2;
-
-
-      /* update pointers to process next sampels */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add and then store the results in the destination buffer. */
-      *pOut++ = (*pIn1++) + (*pIn2++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixAdd group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c
deleted file mode 100644
index 9c86301310..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_add_q15.c    
-*    
-* Description:	Q15 matrix addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixAdd    
- * @{    
- */
-
-/**    
- * @brief Q15 matrix addition.    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-arm_status arm_mat_add_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A  */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint16_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix addition  */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
-
-#ifndef ARM_MATH_CM0
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop unrolling */
-    blkCnt = (uint32_t) numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-      *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = (uint32_t) numSamples % 0x4u;
-
-    /* q15 pointers of input and output are initialized */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = (uint32_t) numSamples;
-
-
-    /* q15 pointers of input and output are initialized */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixAdd group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c
deleted file mode 100644
index ee1207e570..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_add_q31.c    
-*    
-* Description:	Q31 matrix addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**      
- * @ingroup groupMatrix      
- */
-
-/**      
- * @addtogroup MatrixAdd      
- * @{      
- */
-
-/**      
- * @brief Q31 matrix addition.      
- * @param[in]       *pSrcA points to the first input matrix structure      
- * @param[in]       *pSrcB points to the second input matrix structure      
- * @param[out]      *pDst points to output matrix structure      
- * @return     		The function returns either      
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.      
- *      
- * Scaling and Overflow Behavior:      
- * \par      
- * The function uses saturating arithmetic.      
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.      
- */
-
-arm_status arm_mat_add_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t inA1, inB1;                              /* temporary variables */
-
-#ifndef ARM_MATH_CM0
-
-  q31_t inA2, inB2;                              /* temporary variables */
-  q31_t out1, out2;                              /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix addition */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, saturate and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* Add and saturate */
-      out1 = __QADD(inA1, inB1);
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* Add and saturate */
-      out2 = __QADD(inA2, inB2);
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* Add and saturate */
-      out1 = __QADD(inA1, inB1);
-      out2 = __QADD(inA2, inB2);
-
-      /* Store result in destination */
-      pOut[2] = out1;
-      pOut[3] = out2;
-
-      /* update pointers to process next sampels */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.      
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, saturate and then store the results in the destination buffer. */
-      inA1 = *pIn1++;
-      inB1 = *pIn2++;
-
-      inA1 = __QADD(inA1, inB1);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-
-      *pOut++ = inA1;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**      
- * @} end of MatrixAdd group      
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c
deleted file mode 100644
index 8d2cea559b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_init_f32.c    
-*    
-* Description:	Floating-point matrix initialization.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInit Matrix Initialization    
- *    
- * Initializes the underlying matrix data structure.    
- * The functions set the numRows,    
- * numCols, and pData fields    
- * of the matrix data structure.    
- */
-
-/**    
- * @addtogroup MatrixInit    
- * @{    
- */
-
-/**    
-   * @brief  Floating-point matrix initialization.    
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
-   * @param[in]     nRows          number of rows in the matrix.    
-   * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData	   points to the matrix data array.    
-   * @return        none    
-   */
-
-void arm_mat_init_f32(
-  arm_matrix_instance_f32 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  float32_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**    
- * @} end of MatrixInit group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c
deleted file mode 100644
index 7255627c2e..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_init_q15.c    
-*    
-* Description:	Q15 matrix initialization.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixInit    
- * @{    
- */
-
-  /**    
-   * @brief  Q15 matrix initialization.    
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
-   * @param[in]     nRows          number of rows in the matrix.    
-   * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData	   points to the matrix data array.    
-   * @return        none    
-   */
-
-void arm_mat_init_q15(
-  arm_matrix_instance_q15 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q15_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**    
- * @} end of MatrixInit group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c
deleted file mode 100644
index 86ad404da6..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_init_q31.c    
-*    
-* Description:	Q31 matrix initialization.    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInit Matrix Initialization    
- *    
- */
-
-/**    
- * @addtogroup MatrixInit    
- * @{    
- */
-
-  /**    
-   * @brief  Q31 matrix initialization.    
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
-   * @param[in]     nRows          number of rows in the matrix.    
-   * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData	   points to the matrix data array.    
-   * @return        none    
-   */
-
-void arm_mat_init_q31(
-  arm_matrix_instance_q31 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q31_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**    
- * @} end of MatrixInit group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c
deleted file mode 100644
index e8c6daebb2..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c
+++ /dev/null
@@ -1,668 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_inverse_f32.c    
-*    
-* Description:	Floating-point matrix inverse.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInv Matrix Inverse    
- *    
- * Computes the inverse of a matrix.    
- *    
- * The inverse is defined only if the input matrix is square and non-singular (the determinant    
- * is non-zero). The function checks that the input and output matrices are square and of the    
- * same size.    
- *    
- * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix    
- * inversion of floating-point matrices.    
- *    
- * \par Algorithm    
- * The Gauss-Jordan method is used to find the inverse.    
- * The algorithm performs a sequence of elementary row-operations till it    
- * reduces the input matrix to an identity matrix. Applying the same sequence    
- * of elementary row-operations to an identity matrix yields the inverse matrix.    
- * If the input matrix is singular, then the algorithm terminates and returns error status    
- * ARM_MATH_SINGULAR.    
- * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"    
- */
-
-/**    
- * @addtogroup MatrixInv    
- * @{    
- */
-
-/**    
- * @brief Floating-point matrix inverse.    
- * @param[in]       *pSrc points to input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns    
- * ARM_MATH_SIZE_MISMATCH if the input matrix is not square or if the size    
- * of the output matrix does not match the size of the input matrix.    
- * If the input matrix is found to be singular (non-invertible), then the function returns    
- * ARM_MATH_SINGULAR.  Otherwise, the function returns ARM_MATH_SUCCESS.    
- */
-
-arm_status arm_mat_inverse_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
-  float32_t *pInT3, *pInT4;                      /* Temporary output data matrix pointer */
-  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
-  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
-  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------    
-	 * Matrix Inverse can be solved using elementary row operations.    
-	 *    
-	 *	Gauss-Jordan Method:    
-	 *    
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an    
-	 *        augmented matrix as follows:    
-	 *				        _ 	      	       _         _	       _    
-	 *					   |  a11  a12 | 1   0  |       |  X11 X12  |    
-	 *					   |           |        |   =   |           |    
-	 *					   |_ a21  a22 | 0   1 _|       |_ X21 X21 _|    
-	 *    
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
-	 *    
-	 *		3. Begin with the first row. Let i = 1.    
-	 *    
-	 *	    4. Check to see if the pivot for row i is zero.    
-	 *		   The pivot is the element of the main diagonal that is on the current row.    
-	 *		   For instance, if working with row i, then the pivot element is aii.    
-	 *		   If the pivot is zero, exchange that row with a row below it that does not    
-	 *		   contain a zero in column i. If this is not possible, then an inverse    
-	 *		   to that matrix does not exist.    
-	 *    
-	 *	    5. Divide every element of row i by the pivot.    
-	 *    
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and    
-	 *		   a multiple of row i so that each new element in column i below row i is zero.    
-	 *    
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros    
-	 *		   for every element below and above the main diagonal.    
-	 *    
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).    
-	 *		   Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).    
-	 *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pInT2 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while(rowCnt > 0u)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while(j > 0u)
-      {
-        *pInT2++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pInT2++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1u;
-      while(j > 0u)
-      {
-        *pInT2++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.    
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0u;
-
-    while(loopCnt > 0u)
-    {
-      /* Check if the pivot element is zero..    
-       * If it is zero then interchange the row with non zero row below.    
-       * If there is no non zero element to replace in the rows below,    
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points    
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points    
-       * to the pivot element of the particular row  */
-      pInT3 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Destination pointer modifier */
-      k = 1u;
-
-      /* Check if the pivot element is zero */
-      if(*pInT1 == 0.0f)
-      {
-        /* Loop over the number rows present below */
-        i = numRows - (l + 1u);
-
-        while(i > 0u)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pInT4 = pInT3 + (numCols * k);
-
-          /* Check if there is a non zero pivot element to    
-           * replace in the rows below */
-          if(*pInT2 != 0.0f)
-          {
-            /* Loop over number of columns    
-             * to the right of the pilot element */
-            j = numCols - l;
-
-            while(j > 0u)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Loop over number of columns of the destination matrix */
-            j = numCols;
-
-            while(j > 0u)
-            {
-              /* Exchange the row elements of the destination matrix */
-              Xchg = *pInT4;
-              *pInT4++ = *pInT3;
-              *pInT3++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1u;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-
-          /* Decrement the loop counter */
-          i--;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if((flag != 1u) && (in == 0.0f))
-      {
-        status = ARM_MATH_SINGULAR;
-
-        break;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pInT2 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *(pIn + (l * numCols));
-
-      /* Loop over number of columns    
-       * to the right of the pilot element */
-      j = (numCols - l);
-
-      while(j > 0u)
-      {
-        /* Divide each element of the row of the input matrix    
-         * by the pivot element */
-        in1 = *pInT1;
-        *pInT1++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Loop over number of columns of the destination matrix */
-      j = numCols;
-
-      while(j > 0u)
-      {
-        /* Divide each element of the row of the destination matrix    
-         * by the pivot element */
-        in1 = *pInT2;
-        *pInT2++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i    
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pInT2 = pOut;
-
-      /* index used to check for pivot element */
-      i = 0u;
-
-      /* Loop over number of rows */
-      /*  to be replaced by the sum of that row and a multiple of row i */
-      k = numRows;
-
-      while(k > 0u)
-      {
-        /* Check for the pivot element */
-        if(i == l)
-        {
-          /* If the processing element is the pivot element,    
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-
-          pInT2 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,    
-             to replace the elements in the input matrix */
-          j = (numCols - l);
-
-          while(j > 0u)
-          {
-            /* Replace the element by the sum of that row    
-               and a multiple of the reference row  */
-            in1 = *pInT1;
-            *pInT1++ = in1 - (in * *pPRT_in++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-          /* Loop over the number of columns to    
-             replace the elements in the destination matrix */
-          j = numCols;
-
-          while(j > 0u)
-          {
-            /* Replace the element by the sum of that row    
-               and a multiple of the reference row  */
-            in1 = *pInT2;
-            *pInT2++ = in1 - (in * *pPRT_pDst++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-        }
-
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-
-        /* Decrement the loop counter */
-        k--;
-
-        /* Increment the pivot index */
-        i++;
-      }
-
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t Xchg, in = 0.0f;                     /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------       
-	 * Matrix Inverse can be solved using elementary row operations.        
-	 *        
-	 *	Gauss-Jordan Method:       
-	 *	 	       
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an        
-	 *        augmented matrix as follows:        
-	 *				        _  _	      _	    _	   _   _         _	       _       
-	 *					   |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |         
-	 *					   |  |            | | |        |   |   =   |           |        
-	 *					   |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|       
-	 *					          
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
-	 *       
-	 *		3. Begin with the first row. Let i = 1.       
-	 *       
-	 *	    4. Check to see if the pivot for row i is zero.       
-	 *		   The pivot is the element of the main diagonal that is on the current row.       
-	 *		   For instance, if working with row i, then the pivot element is aii.       
-	 *		   If the pivot is zero, exchange that row with a row below it that does not        
-	 *		   contain a zero in column i. If this is not possible, then an inverse        
-	 *		   to that matrix does not exist.       
-	 *	       
-	 *	    5. Divide every element of row i by the pivot.       
-	 *	       
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and        
-	 *		   a multiple of row i so that each new element in column i below row i is zero.       
-	 *	       
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros       
-	 *		   for every element below and above the main diagonal.        
-	 *		   		          
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, src).       
-	 *		   Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).         
-	 *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pInT2 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while(rowCnt > 0u)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while(j > 0u)
-      {
-        *pInT2++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pInT2++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1u;
-      while(j > 0u)
-      {
-        *pInT2++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.     
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0u;
-    //for(loopCnt = 0u; loopCnt < numCols; loopCnt++)   
-    while(loopCnt > 0u)
-    {
-      /* Check if the pivot element is zero..    
-       * If it is zero then interchange the row with non zero row below.   
-       * If there is no non zero element to replace in the rows below,   
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points     
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points     
-       * to the pivot element of the particular row  */
-      pInT3 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Destination pointer modifier */
-      k = 1u;
-
-      /* Check if the pivot element is zero */
-      if(*pInT1 == 0.0f)
-      {
-        /* Loop over the number rows present below */
-        for (i = (l + 1u); i < numRows; i++)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pInT4 = pInT3 + (numCols * k);
-
-          /* Check if there is a non zero pivot element to     
-           * replace in the rows below */
-          if(*pInT2 != 0.0f)
-          {
-            /* Loop over number of columns     
-             * to the right of the pilot element */
-            for (j = 0u; j < (numCols - l); j++)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-            }
-
-            for (j = 0u; j < numCols; j++)
-            {
-              Xchg = *pInT4;
-              *pInT4++ = *pInT3;
-              *pInT3++ = Xchg;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1u;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if((flag != 1u) && (in == 0.0f))
-      {
-        status = ARM_MATH_SINGULAR;
-
-        break;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pInT2 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *(pIn + (l * numCols));
-
-      /* Loop over number of columns     
-       * to the right of the pilot element */
-      for (j = 0u; j < (numCols - l); j++)
-      {
-        /* Divide each element of the row of the input matrix     
-         * by the pivot element */
-        *pInT1++ = *pInT1 / in;
-      }
-      for (j = 0u; j < numCols; j++)
-      {
-        /* Divide each element of the row of the destination matrix     
-         * by the pivot element */
-        *pInT2++ = *pInT2 / in;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i     
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pInT2 = pOut;
-
-      for (i = 0u; i < numRows; i++)
-      {
-        /* Check for the pivot element */
-        if(i == l)
-        {
-          /* If the processing element is the pivot element,     
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-          pInT2 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,     
-             to replace the elements in the input matrix */
-          for (j = 0u; j < (numCols - l); j++)
-          {
-            /* Replace the element by the sum of that row     
-               and a multiple of the reference row  */
-            *pInT1++ = *pInT1 - (in * *pPRT_in++);
-          }
-          /* Loop over the number of columns to     
-             replace the elements in the destination matrix */
-          for (j = 0u; j < numCols; j++)
-          {
-            /* Replace the element by the sum of that row     
-               and a multiple of the reference row  */
-            *pInT2++ = *pInT2 - (in * *pPRT_pDst++);
-          }
-
-        }
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-      }
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-    if((flag != 1u) && (in == 0.0f))
-    {
-      status = ARM_MATH_SINGULAR;
-    }
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixInv group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c
deleted file mode 100644
index a04f12600a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_f32.c    
-*    
-* Description:  Floating-point matrix multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixMult Matrix Multiplication    
- *    
- * Multiplies two matrices.    
- *    
- * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"    
-    
- * Matrix multiplication is only defined if the number of columns of the    
- * first matrix equals the number of rows of the second matrix.    
- * Multiplying an M x N matrix with an N x P matrix results    
- * in an M x P matrix.    
- * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of    
- * pSrcA and pSrcB are equal; and (2) that the size of the output    
- * matrix equals the outer dimensions of pSrcA and pSrcB.    
- */
-
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-/**    
- * @brief Floating-point matrix multiplication.    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- */
-
-arm_status arm_mat_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t in1, in2, in3, in4;
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set    
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0.0f;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2u;
-
-        /* matrix multiplication        */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          in3 = *pIn2;
-          pIn2 += numColsB;
-          in1 = pIn1[0];
-          in2 = pIn1[1];
-          sum += in1 * in3;
-          in4 = *pIn2;
-          pIn2 += numColsB;
-          sum += in2 * in4;
-
-          in3 = *pIn2;
-          pIn2 += numColsB;
-          in1 = pIn1[2];
-          in2 = pIn1[3];
-          sum += in1 * in3;
-          in4 = *pIn2;
-          pIn2 += numColsB;
-          sum += in2 * in4;
-          pIn1 += 4u;
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += *pIn1++ * (*pIn2);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Store the result in the destination buffer */
-        *px++ = sum;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
-  uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pInA with each column in pInB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set     
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0.0f;
-
-        /* Initialize the pointer pIn1 to point to the starting address of the row being processed */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += *pIn1++ * (*pIn2);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Store the result in the destination buffer */
-        *px++ = sum;
-
-        /* Decrement the column loop counter */
-        col--;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while(col > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
deleted file mode 100644
index 5699511cf8..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
+++ /dev/null
@@ -1,361 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_fast_q15.c    
-*    
-* Description:	 Q15 matrix multiplication (fast variant)    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-
-/**    
- * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @param[in]		*pState points to the array for storing intermediate results    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The difference between the function arm_mat_mult_q15() and this fast variant is that    
- * the fast variant use a 32-bit rather than a 64-bit accumulator.    
- * The result of each 1.15 x 1.15 multiplication is truncated to        
- * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30        
- * format. Finally, the accumulator is saturated and converted to a 1.15 result.        
- *        
- * \par        
- * The fast version has the same overflow behavior as the standard version but provides        
- * less precision since it discards the low 16 bits of each multiplication result.        
- * In order to avoid overflows completely the input signals must be scaled down.        
- * Scale down one of the input matrices by log2(numColsA) bits to        
- * avoid overflows, as a total of numColsA additions are computed internally for each        
- * output element.        
- *        
- * \par    
- * See arm_mat_mult_q15() for a slower implementation of this function    
- * which uses 64-bit accumulation to provide higher precision.    
- */
-
-arm_status arm_mat_mult_fast_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState)
-{
-  q31_t sum;                                     /* accumulator */
-  q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t inA1, inA2, inB1, inB2;
-
-#else
-
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t inA1, inA2, inB1, inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pSrcBT + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-#else
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-        
-		/* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.        
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4u;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pInB++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Reset the variables for the usage in the following multiplication process */
-    row = numRowsA;
-    i = 0u;
-    px = pDst->pData;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set        
-       ** to the starting address of the transposed pSrcB data */
-      pInB = pSrcBT;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pInA = pSrcA->pData + i;
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-          inA1 = *__SIMD32(pInA)++;
-          inB1 = *__SIMD32(pInB)++;
-          inA2 = *__SIMD32(pInA)++;
-          inB2 = *__SIMD32(pInB)++;
-
-          sum = __SMLAD(inA1, inB1, sum);
-          sum = __SMLAD(inA2, inB2, sum);
-
-#else
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          inA2 = *pInA++;
-          sum += inA1 * inB1;
-          inB2 = *pInB++;
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          sum += inA2 * inB2;
-          inA2 = *pInA++;
-          inB2 = *pInB++;
-
-          sum += inA1 * inB1;
-          sum += inA2 * inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* process odd column samples */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += (q31_t) (*pInA++) * (*pInB++);
-
-          colCnt--;
-        }
-
-        /* Saturate and store the result in the destination buffer */
-        *px = (q15_t) (sum >> 15);
-        px++;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      i = i + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixMult group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
deleted file mode 100644
index a7b08fbabf..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_fast_q31.c    
-*    
-* Description:	 Q31 matrix multiplication (fast variant).    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-/**    
- * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The difference between the function arm_mat_mult_q31() and this fast variant is that    
- * the fast variant use a 32-bit rather than a 64-bit accumulator.    
- * The result of each 1.31 x 1.31 multiplication is truncated to    
- * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30    
- * format. Finally, the accumulator is saturated and converted to a 1.31 result.    
- *    
- * \par    
- * The fast version has the same overflow behavior as the standard version but provides    
- * less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signals must be scaled down.    
- * Scale down one of the input matrices by log2(numColsA) bits to    
- * avoid overflows, as a total of numColsA additions are computed internally for each    
- * output element.    
- *    
- * \par    
- * See arm_mat_mult_q31() for a slower implementation of this function    
- * which uses 64-bit accumulation to provide higher precision.    
- */
-
-arm_status arm_mat_mult_fast_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-//  q31_t *pSrcB = pSrcB->pData;                    /* input data matrix pointer B */    
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q31_t inA1, inA2, inA3, inA4, inB1, inB2, inB3, inB4;
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set    
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          inB1 = *pIn2;
-          pIn2 += numColsB;
-
-          inA1 = pIn1[0];
-          inA2 = pIn1[1];
-
-          inB2 = *pIn2;
-          pIn2 += numColsB;
-
-          inB3 = *pIn2;
-          pIn2 += numColsB;
-
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA1 * inB1)) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA2 * inB2)) >> 32);
-
-          inA3 = pIn1[2];
-          inA4 = pIn1[3];
-
-          inB4 = *pIn2;
-          pIn2 += numColsB;
-
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA3 * inB3)) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA4 * inB4)) >> 32);
-
-          pIn1 += 4u;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.    
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * pIn1++ * (*pIn2))) >> 32);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
-        *px++ = sum << 1;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c
deleted file mode 100644
index 46ceca1f26..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c
+++ /dev/null
@@ -1,467 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_q15.c    
-*    
-* Description:	 Q15 matrix multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-
-/**    
- * @brief Q15 matrix multiplication    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @param[in]		*pState points to the array for storing intermediate results   
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator. The inputs to the    
- * multiplications are in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate    
- * results are accumulated in a 64-bit accumulator in 34.30 format. This approach    
- * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then    
- * truncated to 34.15 format by discarding the low 15 bits and then saturated to    
- * 1.15 format.    
- *    
- * \par    
- * Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.    
- *    
- */
-
-arm_status arm_mat_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState)
-{
-  q63_t sum;                                     /* accumulator */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t pSourceA1, pSourceB1, pSourceA2, pSourceB2;
-
-#else
-
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t inA1, inB1, inA2, inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pSrcBT + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-#else
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-       /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.        
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4u;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pInB++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Reset the variables for the usage in the following multiplication process */
-    row = numRowsA;
-    i = 0u;
-    px = pDst->pData;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set        
-       ** to the starting address of the transposed pSrcB data */
-      pInB = pSrcBT;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pInA = pSrcA->pData + i;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA1 = *__SIMD32(pInA)++;
-          pSourceB1 = *__SIMD32(pInB)++;
-
-          pSourceA2 = *__SIMD32(pInA)++;
-          pSourceB2 = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-          sum = __SMLALD(pSourceA1, pSourceB1, sum);
-          sum = __SMLALD(pSourceA2, pSourceB2, sum);
-
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          inA2 = *pInA++;
-          /* Multiply and Accumlates */
-          sum += inA1 * inB1;
-          inB2 = *pInB++;
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          /* Multiply and Accumlates */
-          sum += inA2 * inB2;
-          inA2 = *pInA++;
-          inB2 = *pInB++;
-
-          /* Multiply and Accumlates */
-          sum += inA1 * inB1;
-          sum += inA2 * inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* process remaining column samples */
-        colCnt = numColsA & 3u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += *pInA++ * *pInB++;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Saturate and store the result in the destination buffer */
-        *px = (q15_t) (__SSAT((sum >> 15), 16));
-        px++;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      i = i + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q15_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set          
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pSrcA */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum += (q31_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */
-        /* Saturate and store the result in the destination buffer */
-        *px++ = (q15_t) __SSAT((sum >> 15), 16);
-
-        /* Decrement the column loop counter */
-        col--;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while(col > 0u);
-
-      /* Update the pointer pSrcA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixMult group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c
deleted file mode 100644
index 54026e3db4..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c
+++ /dev/null
@@ -1,292 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_q31.c    
-*    
-* Description:	 Q31 matrix multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-/**    
- * @brief Q31 matrix multiplication    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate    
- * multiplication results but provides only a single guard bit. There is no saturation    
- * on intermediate additions. Thus, if the accumulator overflows it wraps around and    
- * distorts the result. The input signals should be scaled down to avoid intermediate    
- * overflows. The input is thus scaled down by log2(numColsA) bits    
- * to avoid overflows, as a total of numColsA additions are performed internally.    
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.    
- *    
- * \par    
- * See arm_mat_mult_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- *    
- */
-
-arm_status arm_mat_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q31_t a0, a1, a2, a3, b0, b1, b2, b3;
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set    
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          b0 = *pIn2;
-          pIn2 += numColsB;
-
-          a0 = *pIn1++;
-          a1 = *pIn1++;
-
-          b1 = *pIn2;
-          pIn2 += numColsB;
-          b2 = *pIn2;
-          pIn2 += numColsB;
-
-          sum += (q63_t) a0 *b0;
-          sum += (q63_t) a1 *b1;
-
-          a2 = *pIn1++;
-          a3 = *pIn1++;
-
-          b3 = *pIn2;
-          pIn2 += numColsB;
-
-          sum += (q63_t) a2 *b2;
-          sum += (q63_t) a3 *b3;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.    
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
-        *px++ = (q31_t) (sum >> 31);
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = (pSrcB->pData) + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set          
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
-        *px++ = (q31_t) (sum >> 31);
-
-        /* Decrement the column loop counter */
-        col--;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while(col > 0u);
-
-#endif
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixMult group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c
deleted file mode 100644
index 833c282a7c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_scale_f32.c    
-*    
-* Description:	Multiplies a floating-point matrix by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @defgroup MatrixScale Matrix Scale        
- *        
- * Multiplies a matrix by a scalar.  This is accomplished by multiplying each element in the        
- * matrix by the scalar.  For example:        
- * \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"        
- *        
- * The function checks to make sure that the input and output matrices are of the same size.        
- *        
- * In the fixed-point Q15 and Q31 functions, scale is represented by        
- * a fractional multiplication scaleFract and an arithmetic shift shift.        
- * The shift allows the gain of the scaling operation to exceed 1.0.        
- * The overall scale factor applied to the fixed-point data is        
- * 
        
- *     scale = scaleFract * 2^shift.        
- * 
        
- */
-
-/**        
- * @addtogroup MatrixScale        
- * @{        
- */
-
-/**        
- * @brief Floating-point matrix scaling.        
- * @param[in]       *pSrc points to input matrix structure        
- * @param[in]       scale scale factor to be applied         
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either ARM_MATH_SIZE_MISMATCH         
- * or ARM_MATH_SUCCESS based on the outcome of size checking.        
- *        
- */
-
-arm_status arm_mat_scale_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  float32_t scale,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix scaling     */
-
-#ifndef ARM_MATH_CM0
-
-  float32_t in1, in2, in3, in4;                  /* temporary variables */
-  float32_t out1, out2, out3, out4;              /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#ifndef ARM_MATH_CM0
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * scale */
-      /* Scaling and results are stored in the destination buffer. */
-      in1 = pIn[0];
-      in2 = pIn[1];
-      in3 = pIn[2];
-      in4 = pIn[3];
-
-      out1 = in1 * scale;
-      out2 = in2 * scale;
-      out3 = in3 * scale;
-      out4 = in4 * scale;
-
-
-      pOut[0] = out1;
-      pOut[1] = out2;
-      pOut[2] = out3;
-      pOut[3] = out4;
-
-      /* update pointers to process next sampels */
-      pIn += 4u;
-      pOut += 4u;
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * scale */
-      /* The results are stored in the destination buffer. */
-      *pOut++ = (*pIn++) * scale;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixScale group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c
deleted file mode 100644
index 684fbcc50c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_scale_q15.c    
-*    
-* Description:	Multiplies a Q15 matrix by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixScale    
- * @{    
- */
-
-/**    
- * @brief Q15 matrix scaling.    
- * @param[in]       *pSrc points to input matrix    
- * @param[in]       scaleFract fractional portion of the scale factor    
- * @param[in]       shift number of bits to shift the result by    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The input data *pSrc and scaleFract are in 1.15 format.    
- * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.    
- */
-
-arm_status arm_mat_scale_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  q15_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pIn = pSrc->pData;                      /* input data matrix pointer */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  int32_t totShift = 15 - shift;                 /* total shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix scaling     */
-
-#ifndef ARM_MATH_CM0
-
-  q15_t in1, in2, in3, in4;
-  q31_t out1, out2, out3, out4;
-  q31_t inA1, inA2;
-
-#endif //     #ifndef ARM_MATH_CM0
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch */
-  if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif //    #ifdef ARM_MATH_MATRIX_CHECK
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#ifndef ARM_MATH_CM0
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      /* Reading 2 inputs from memory */
-      inA1 = _SIMD32_OFFSET(pIn);
-      inA2 = _SIMD32_OFFSET(pIn + 2);
-
-      /* C = A * scale */
-      /* Scale the inputs and then store the 2 results in the destination buffer        
-       * in single cycle by packing the outputs */
-      out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
-      out2 = (q31_t) ((q15_t) inA1 * scaleFract);
-      out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
-      out4 = (q31_t) ((q15_t) inA2 * scaleFract);
-
-      out1 = out1 >> totShift;
-      inA1 = _SIMD32_OFFSET(pIn + 4);
-      out2 = out2 >> totShift;
-      inA2 = _SIMD32_OFFSET(pIn + 6);
-      out3 = out3 >> totShift;
-      out4 = out4 >> totShift;
-
-      in1 = (q15_t) (__SSAT(out1, 16));
-      in2 = (q15_t) (__SSAT(out2, 16));
-      in3 = (q15_t) (__SSAT(out3, 16));
-      in4 = (q15_t) (__SSAT(out4, 16));
-
-      _SIMD32_OFFSET(pOut) = __PKHBT(in2, in1, 16);
-      _SIMD32_OFFSET(pOut + 2) = __PKHBT(in4, in3, 16);
-
-      /* update pointers to process next sampels */
-      pIn += 4u;
-      pOut += 4u;
-
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      *pOut++ =
-        (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixScale group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c
deleted file mode 100644
index 7227ad38ae..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c
+++ /dev/null
@@ -1,201 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_scale_q31.c    
-*    
-* Description:	Multiplies a Q31 matrix by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @addtogroup MatrixScale        
- * @{        
- */
-
-/**        
- * @brief Q31 matrix scaling.        
- * @param[in]       *pSrc points to input matrix        
- * @param[in]       scaleFract fractional portion of the scale factor        
- * @param[in]       shift number of bits to shift the result by        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- *        
- * @details        
- * Scaling and Overflow Behavior:        
- * \par        
- * The input data *pSrc and scaleFract are in 1.31 format.        
- * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.        
- */
-
-arm_status arm_mat_scale_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  q31_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  int32_t totShift = shift + 1;                  /* shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix scaling      */
-  q31_t in1, in2, out1;                          /* temporary variabels */
-
-#ifndef ARM_MATH_CM0
-
-  q31_t in3, in4, out2, out3, out4;              /* temporary variables */
-
-#endif //      #ifndef ARM_MAT_CM0
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch  */
-  if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif //    #ifdef ARM_MATH_MATRIX_CHECK
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#ifndef ARM_MATH_CM0
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Read values from input */
-      in1 = *pIn;
-      in2 = *(pIn + 1);
-      in3 = *(pIn + 2);
-      in4 = *(pIn + 3);
-
-      /* multiply input with scaler value */
-      in1 = ((q63_t) in1 * scaleFract) >> 32;
-      in2 = ((q63_t) in2 * scaleFract) >> 32;
-      in3 = ((q63_t) in3 * scaleFract) >> 32;
-      in4 = ((q63_t) in4 * scaleFract) >> 32;
-
-      /* apply shifting */
-      out1 = in1 << totShift;
-      out2 = in2 << totShift;
-
-      /* saturate the results. */
-      if(in1 != (out1 >> totShift))
-        out1 = 0x7FFFFFFF ^ (in1 >> 31);
-
-      if(in2 != (out2 >> totShift))
-        out2 = 0x7FFFFFFF ^ (in2 >> 31);
-
-      out3 = in3 << totShift;
-      out4 = in4 << totShift;
-
-      *pOut = out1;
-      *(pOut + 1) = out2;
-
-      if(in3 != (out3 >> totShift))
-        out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
-      if(in4 != (out4 >> totShift))
-        out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
-
-      *(pOut + 2) = out3;
-      *(pOut + 3) = out4;
-
-      /* update pointers to process next sampels */
-      pIn += 4u;
-      pOut += 4u;
-
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      in1 = *pIn++;
-
-      in2 = ((q63_t) in1 * scaleFract) >> 32;
-
-      out1 = in2 << totShift;
-
-      if(in2 != (out1 >> totShift))
-        out1 = 0x7FFFFFFF ^ (in2 >> 31);
-
-      *pOut++ = out1;
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixScale group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c
deleted file mode 100644
index 6ee7a46c8f..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_sub_f32.c    
-*    
-* Description:	Floating-point matrix subtraction.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @defgroup MatrixSub Matrix Subtraction        
- *        
- * Subtract two matrices.        
- * \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"        
- *        
- * The functions check to make sure that        
- * pSrcA, pSrcB, and pDst have the same        
- * number of rows and columns.        
- */
-
-/**        
- * @addtogroup MatrixSub        
- * @{        
- */
-
-/**        
- * @brief Floating-point matrix subtraction        
- * @param[in]       *pSrcA points to the first input matrix structure        
- * @param[in]       *pSrcB points to the second input matrix structure        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- */
-
-arm_status arm_mat_sub_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer  */
-
-#ifndef ARM_MATH_CM0
-
-  float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix subtraction */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* out = sourceA - sourceB */
-      out1 = inA1 - inB1;
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* out = sourceA - sourceB */
-      out2 = inA2 - inB2;
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* out = sourceA - sourceB */
-      out1 = inA1 - inB1;
-
-
-      /* out = sourceA - sourceB */
-      out2 = inA2 - inB2;
-
-      /* Store result in destination */
-      pOut[2] = out1;
-
-      /* Store result in destination */
-      pOut[3] = out2;
-
-
-      /* update pointers to process next sampels */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (*pIn1++) - (*pIn2++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixSub group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c
deleted file mode 100644
index ea32f04bd1..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_sub_q15.c    
-*    
-* Description:	Q15 Matrix subtraction    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixSub    
- * @{    
- */
-
-/**    
- * @brief Q15 matrix subtraction.    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-arm_status arm_mat_sub_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix subtraction  */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Apply loop unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, Saturate and then store the results in the destination buffer. */
-      *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-      *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixSub group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c
deleted file mode 100644
index 157d59b725..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c
+++ /dev/null
@@ -1,206 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_sub_q31.c    
-*    
-* Description:	Q31 matrix subtraction    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @addtogroup MatrixSub        
- * @{        
- */
-
-/**        
- * @brief Q31 matrix subtraction.        
- * @param[in]       *pSrcA points to the first input matrix structure        
- * @param[in]       *pSrcB points to the second input matrix structure        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.        
- */
-
-
-arm_status arm_mat_sub_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t inA1, inB1;                              /* temporary variables */
-
-#ifndef ARM_MATH_CM0
-
-  q31_t inA2, inB2;                              /* temporary variables */
-  q31_t out1, out2;                              /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix subtraction */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition  */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, saturate and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* Subtract and saturate */
-      out1 = __QSUB(inA1, inB1);
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* Subtract and saturate */
-      out2 = __QSUB(inA2, inB2);
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* Subtract and saturate */
-      out1 = __QSUB(inA1, inB1);
-
-      /* Subtract and saturate */
-      out2 = __QSUB(inA2, inB2);
-
-      /* Store result in destination */
-      pOut[2] = out1;
-      pOut[3] = out2;
-
-      /* update pointers to process next samples */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, saturate and then store the results in the destination buffer. */
-      inA1 = *pIn1++;
-      inB1 = *pIn2++;
-
-      inA1 = __QSUB(inA1, inB1);
-
-      *pOut++ = inA1;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixSub group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c
deleted file mode 100644
index 721b512b79..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_trans_f32.c    
-*    
-* Description:	Floating-point matrix transpose.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-/**    
- * @defgroup MatrixTrans Matrix Transpose    
- *    
- * Tranposes a matrix.    
- * Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix.    
- * \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"    
- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixTrans    
- * @{    
- */
-
-/**    
-  * @brief Floating-point matrix transpose.    
-  * @param[in]  *pSrc points to the input matrix    
-  * @param[out] *pDst points to the output matrix    
-  * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH    
-  * or ARM_MATH_SUCCESS based on the outcome of size checking.    
-  */
-
-
-arm_status arm_mat_trans_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of rows */
-  uint16_t nColumns = pSrc->numCols;             /* number of columns */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t blkCnt, i = 0u, row = nRows;          /* loop counters */
-  arm_status status;                             /* status of matrix transpose  */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* Loop Unrolling */
-      blkCnt = nColumns >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(blkCnt > 0u)        /* column loop */
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      blkCnt = nColumns % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  uint16_t col, i = 0u, row = nRows;             /* loop counters */
-  arm_status status;                             /* status of matrix transpose  */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);          /* row loop end  */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixTrans group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c
deleted file mode 100644
index bb03e72de0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c
+++ /dev/null
@@ -1,282 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_trans_q15.c    
-*    
-* Description:	Q15 matrix transpose.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixTrans    
- * @{    
- */
-
-/*    
- * @brief Q15 matrix transpose.    
- * @param[in]  *pSrc points to the input matrix    
- * @param[out] *pDst points to the output matrix    
- * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH    
- * or ARM_MATH_SUCCESS based on the outcome of size checking.    
- */
-
-arm_status arm_mat_trans_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pSrcA = pSrc->pData;                    /* input data matrix pointer */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of nRows */
-  uint16_t nColumns = pSrc->numCols;             /* number of nColumns */
-  uint16_t col, row = nRows, i = 0u;             /* row and column loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* variable to hold temporary output  */
-
-#else
-
-  q15_t in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = nColumns >> 2u;
-
-      /* The pointer pOut is set to starting address of the column being processed */
-      pOut = pDst->pData + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pSrcA)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) in;
-
-#else
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Unpack and store the second element in the destination */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *pOut = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read two elements from the row */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        in = *__SIMD32(pSrcA)++;
-
-#else
-
-        in = *__SIMD32(pSrcA)++;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) in;
-
-#else
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *pOut = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-#else	 
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      col = nColumns % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer pOut is set to starting address of the column being processed */
-      pOut = pDst->pData + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *pOut = *pSrcA++;
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixTrans group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c
deleted file mode 100644
index 70cb018605..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_trans_q31.c    
-*    
-* Description:	Q31 matrix transpose.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixTrans    
- * @{    
- */
-
-/*    
-  * @brief Q31 matrix transpose.    
-  * @param[in]  *pSrc points to the input matrix    
-  * @param[out] *pDst points to the output matrix    
-  * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH    
-  * or ARM_MATH_SUCCESS based on the outcome of size checking.    
- */
-
-arm_status arm_mat_trans_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer  */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer  */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of nRows */
-  uint16_t nColumns = pSrc->numCols;             /* number of nColumns  */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t blkCnt, i = 0u, row = nRows;          /* loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      blkCnt = nColumns >> 2u;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(blkCnt > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      blkCnt = nColumns % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  uint16_t col, i = 0u, row = nRows;             /* loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    }
-    while(row > 0u);            /* row loop end */
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixTrans group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c
deleted file mode 100644
index 06a348cd42..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c
+++ /dev/null
@@ -1,178 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_f32.c    
-*    
-* Description:	Maximum value of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup Max Maximum    
- *    
- * Computes the maximum value of an array of data.     
- * The function returns both the maximum value and its position within the array.     
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
- * @return none.    
- */
-
-void arm_max_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t maxVal1, maxVal2, out;               /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  float32_t maxVal1, out;                        /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c
deleted file mode 100644
index 5544cde57e..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c
+++ /dev/null
@@ -1,168 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_q15.c    
-*    
-* Description:	Maximum value of a Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
- * @return none.    
- */
-
-void arm_max_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q15_t maxVal1, maxVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t maxVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  blkCnt = (blockSize - 1u);
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c
deleted file mode 100644
index 208f2b67b9..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_q31.c    
-*    
-* Description:	Maximum value of a Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
- * @return none.    
- */
-
-void arm_max_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t maxVal1, maxVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q31_t maxVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c
deleted file mode 100644
index 22ee440443..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_q7.c    
-*    
-* Description:	Maximum value of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
-  * @return none.    
- */
-
-void arm_max_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t maxVal1, maxVal2, out;                    /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q7_t maxVal1, out;                             /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c
deleted file mode 100644
index ea4ffb0cc5..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_f32.c    
-*    
-* Description:	Mean value of a floating-point vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup mean Mean    
- *    
- * Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;    
- * 
    
- *    
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-
-/**    
- * @brief Mean value of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- */
-
-
-void arm_mean_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    sum += in1;
-    sum += in2;
-    sum += in3;
-    sum += in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = sum / (float32_t) blockSize;
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c
deleted file mode 100644
index 2e8fdfa091..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_q15.c    
-*    
-* Description:	Mean value of a Q15 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-/**    
- * @brief Mean value of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * The input is represented in 1.15 format and is accumulated in a 32-bit     
- * accumulator in 17.15 format.     
- * There is no risk of internal overflow with this approach, and the     
- * full precision of intermediate result is preserved.     
- * Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.    
- *    
- */
-
-
-void arm_mean_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-  q31_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q15_t) (sum / blockSize);
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c
deleted file mode 100644
index 4dd3ce6b36..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_q31.c    
-*    
-* Description:	Mean value of a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-/**    
- * @brief Mean value of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *\par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.31 format and is accumulated in a 64-bit    
- * accumulator in 33.31 format.    
- * There is no risk of internal overflow with this approach, and the     
- * full precision of intermediate result is preserved.     
- * Finally, the accumulator is truncated to yield a result of 1.31 format.    
- *    
- */
-
-
-void arm_mean_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    sum += in1;
-    sum += in2;
-    sum += in3;
-    sum += in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q31_t) (sum / (int32_t) blockSize);
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c
deleted file mode 100644
index 22c60ccdd9..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_q7.c    
-*    
-* Description:	Mean value of a Q7 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-/**    
- * @brief Mean value of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.     
- * The input is represented in 1.7 format and is accumulated in a 32-bit    
- * accumulator in 25.7 format.    
- * There is no risk of internal overflow with this approach, and the     
- * full precision of intermediate result is preserved.     
- * Finally, the accumulator is truncated to yield a result of 1.7 format.    
- *    
- */
-
-
-void arm_mean_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult)
-{
-  q31_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = *__SIMD32(pSrc)++;
-
-    sum += ((in << 24) >> 24);
-    sum += ((in << 16) >> 24);
-    sum += ((in << 8) >> 24);
-    sum += (in >> 24);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q7_t) (sum / (int32_t) blockSize);
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c
deleted file mode 100644
index 723b693ca6..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_f32.c    
-*    
-* Description:	Minimum value of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup Min Minimum    
- *    
- * Computes the minimum value of an array of data.     
- * The function returns both the minimum value and its position within the array.     
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.    
- */
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
-  * @return none.    
- *    
- */
-
-void arm_min_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t minVal1, minVal2, out;               /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  float32_t minVal1, out;                        /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif //      #ifndef ARM_MATH_CM0
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-  /* Store the minimum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c
deleted file mode 100644
index 831505bb24..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_q15.c    
-*    
-* Description:	Minimum value of a Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
- * @return none.    
- *    
- */
-
-void arm_min_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q15_t minVal1, minVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t minVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  blkCnt = (blockSize - 1u);
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#endif //      #ifndef ARM_MATH_CM0
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-
-
-  /* Store the minimum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c
deleted file mode 100644
index 76896902ee..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c
+++ /dev/null
@@ -1,168 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_q31.c    
-*    
-* Description:	Minimum value of a Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
- * @return none.    
- *    
- */
-
-void arm_min_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t minVal1, minVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q31_t minVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  blkCnt = (blockSize - 1u);
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#endif //      #ifndef ARM_MATH_CM0
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-  /* Store the minimum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c
deleted file mode 100644
index 88e4dcef5e..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_q7.c    
-*    
-* Description:	Minimum value of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
- * @return none.    
- *    
- */
-
-void arm_min_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t minVal1, minVal2, out;                    /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q7_t minVal1, out;                             /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif //      #ifndef ARM_MATH_CM0
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-  /* Store the minimum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-
-
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c
deleted file mode 100644
index 4e3505b997..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_f32.c    
-*    
-* Description:	Sum of the squares of the elements of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup power Power    
- *    
- * Calculates the sum of the squares of the elements in the input vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];    
- * 
    
- *   
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.     
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-
-/**    
- * @brief Sum of the squares of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- */
-
-
-void arm_power_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* accumulator */
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* compute power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the result to the destination */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c
deleted file mode 100644
index a8d0db898d..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c
+++ /dev/null
@@ -1,144 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_q15.c    
-*    
-* Description:	Sum of the squares of the elements of a Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-/**    
- * @brief Sum of the squares of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.     
- * The input is represented in 1.15 format.   
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the return result is in 34.30 format.     
- *    
- */
-
-void arm_power_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in32;                                    /* Temporary variable to store input value */
-  q15_t in16;                                    /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in32 = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in32, in32, sum);
-    in32 = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in32, in32, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in16 = *pSrc++;
-    sum = __SMLALD(in16, in16, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Store the results in 34.30 format  */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c
deleted file mode 100644
index 49cdb67fa3..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_q31.c    
-*    
-* Description:	Sum of the squares of the elements of a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-/**    
- * @brief Sum of the squares of the elements of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.31 format.    
- * Intermediate multiplication yields a 2.62 format, and this    
- * result is truncated to 2.48 format by discarding the lower 14 bits.    
- * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.    
- * With 15 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the return result is in 16.48 format.     
- *    
- */
-
-void arm_power_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-  q31_t in;
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the results in 16.48 format  */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c
deleted file mode 100644
index 39fd2e98d0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_q7.c    
-*    
-* Description:	Sum of the squares of the elements of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-/**    
- * @brief Sum of the squares of the elements of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.     
- * The input is represented in 1.7 format.   
- * Intermediate multiplication yields a 2.14 format, and this    
- * result is added without saturation to an accumulator in 18.14 format.    
- * With 17 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the return result is in 18.14 format.     
- *    
- */
-
-void arm_power_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q31_t sum = 0;                                 /* Temporary result storage */
-  q7_t in;                                       /* Temporary variable to store input */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t input1;                                  /* Temporary variable to store packed input */
-  q31_t in1, in2;                                /* Temporary variables to store input */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Reading two inputs of pSrc vector and packing */
-    input1 = *__SIMD32(pSrc)++;
-
-    in1 = __SXTB16(__ROR(input1, 8));
-    in2 = __SXTB16(input1);
-
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* calculate power and accumulate to accumulator */
-    sum = __SMLAD(in1, in1, sum);
-    sum = __SMLAD(in2, in2, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q15_t) in * in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the result in 18.14 format  */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c
deleted file mode 100644
index eacc166ffb..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_rms_f32.c    
-*    
-* Description:	Root mean square value of an array of F32 type    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup RMS Root mean square (RMS)    
- *    
- *     
- * Calculates the Root Mean Sqaure of the elements in the input vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));    
- * 
    
- *   
- * There are separate functions for floating point, Q31, and Q15 data types.     
- */
-
-/**    
- * @addtogroup RMS    
- * @{    
- */
-
-
-/**    
- * @brief Root Mean Square of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult rms value returned here    
- * @return none.    
- *    
- */
-
-void arm_rms_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* Accumulator */
-  float32_t in;                                  /* Tempoprary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the result in a temporary variable, sum  */
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum  */
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Rms and store the result in the destination */
-  arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
-}
-
-/**    
- * @} end of RMS group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c
deleted file mode 100644
index 4621a2c21a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_rms_q15.c    
-*    
-* Description:	Root Mean Square of the elements of a Q15 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @addtogroup RMS    
- * @{    
- */
-
-/**    
- * @brief Root Mean Square of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult rms value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.15 format.    
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower     
- * 15 bits, and then saturated to yield a result in 1.15 format.    
- *    
- */
-
-void arm_rms_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-  q63_t sum = 0;                                 /* accumulator */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in;                                      /* temporary variable to store the input value */
-  q15_t in1;                                     /* temporary variable to store the input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in, in, sum);
-    in = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in, in, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in1 = *pSrc++;
-    sum = __SMLALD(in1, in1, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Truncating and saturating the accumulator to 1.15 format */
-  sum = __SSAT((q31_t) (sum >> 15), 16);
-
-  in1 = (q15_t) (sum / blockSize);
-
-  /* Store the result in the destination */
-  arm_sqrt_q15(in1, pResult);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* temporary variable to store the input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Truncating and saturating the accumulator to 1.15 format */
-  sum = __SSAT((q31_t) (sum >> 15), 16);
-
-  in = (q15_t) (sum / blockSize);
-
-  /* Store the result in the destination */
-  arm_sqrt_q15(in, pResult);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of RMS group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c
deleted file mode 100644
index 56eff443ad..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_rms_q31.c    
-*    
-* Description:	Root Mean Square of the elements of a Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @addtogroup RMS        
- * @{        
- */
-
-
-/**        
- * @brief Root Mean Square of the elements of a Q31 vector.        
- * @param[in]       *pSrc points to the input vector        
- * @param[in]       blockSize length of the input vector        
- * @param[out]      *pResult rms value returned here        
- * @return none.        
- *        
- * @details        
- * Scaling and Overflow Behavior:        
- *        
- *\par        
- * The function is implemented using an internal 64-bit accumulator.        
- * The input is represented in 1.31 format, and intermediate multiplication        
- * yields a 2.62 format.        
- * The accumulator maintains full precision of the intermediate multiplication results,         
- * but provides only a single guard bit.        
- * There is no saturation on intermediate additions.        
- * If the accumulator overflows, it wraps around and distorts the result.         
- * In order to avoid overflows completely, the input signal must be scaled down by         
- * log2(blockSize) bits, as a total of blockSize additions are performed internally.         
- * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.        
- *        
- */
-
-void arm_rms_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* accumulator */
-  q31_t in;                                      /* Temporary variable to store the input */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2, in3, in4;                      /* Temporary input variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 7 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the result in a temporary variable, sum */
-    /* read two samples from source buffer */
-    in1 = pSrc[0];
-    in2 = pSrc[1];
-
-    /* calculate power and accumulate to accumulator */
-    sum += (q63_t) in1 *in1;
-    sum += (q63_t) in2 *in2;
-
-    /* read two samples from source buffer */
-    in3 = pSrc[2];
-    in4 = pSrc[3];
-
-    /* calculate power and accumulate to accumulator */
-    sum += (q63_t) in3 *in3;
-    sum += (q63_t) in4 *in4;
-
-
-    /* update source buffer to process next samples */
-    pSrc += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 8, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *pSrc++;
-    sum += (q63_t) in *in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
-
-  sum = __SSAT(sum >> 31, 31);
-
-
-  /* Compute Rms and store the result in the destination vector */
-  arm_sqrt_q31((q31_t) ((q31_t) sum / (int32_t) blockSize), pResult);
-}
-
-/**        
- * @} end of RMS group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c
deleted file mode 100644
index 2fcc4e5a73..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c
+++ /dev/null
@@ -1,188 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_std_f32.c    
-*    
-* Description:	Standard deviation of the elements of a floating-point vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup STD Standard deviation    
- *    
- * Calculates the standard deviation of the elements in the input vector.     
- * The underlying algorithm is used:    
- *   
- * 
    
- * 	Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize - 1))   
- *   
- *	   where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
- *   
- *	                   sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
- * 
   
- *    
- * There are separate functions for floating point, Q31, and Q15 data types.    
- */
-
-/**    
- * @addtogroup STD    
- * @{    
- */
-
-
-/**    
- * @brief Standard deviation of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult standard deviation value returned here    
- * @return none.    
- *    
- */
-
-
-void arm_std_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
-  float32_t in;                                  /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t meanOfSquares, mean, squareOfMean;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
-
-  /* Compute mean of all input values */
-  mean = sum / (float32_t) blockSize;
-
-  /* Compute square of mean */
-  squareOfMean = (mean * mean) * (((float32_t) blockSize) /
-                                  ((float32_t) blockSize - 1.0f));
-
-  /* Compute standard deviation and then store the result to the destination */
-  arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t squareOfSum;                         /* Square of Sum */
-  float32_t var;                                 /* Temporary varaince storage */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += in * in;
-
-    /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
-    /* Compute Sum of the input samples     
-     * and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute the square of sum */
-  squareOfSum = ((sum * sum) / (float32_t) blockSize);
-
-  /* Compute the variance */
-  var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
-
-  /* Compute standard deviation and then store the result to the destination */
-  arm_sqrt_f32(var, pResult);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of STD group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c
deleted file mode 100644
index ac51167a12..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_std_q15.c    
-*    
-* Description:	Standard deviation of an array of Q15 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup STD    
- * @{    
- */
-
-/**    
- * @brief Standard deviation of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult standard deviation value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.15 format.   
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower     
- * 15 bits, and then saturated to yield a result in 1.15 format.    
- */
-
-void arm_std_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-  q31_t sum = 0;                                 /* Accumulator */
-  q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  q15_t mean;                                    /* mean */
-  uint32_t blkCnt;                               /* loop counter */
-  q15_t t;                                       /* Temporary variable */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in;                                      /* input value */
-  q15_t in1;                                     /* input value */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in1 = *pSrc++;
-    sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
-    sum += in1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  t = (q15_t) ((1.0 / (blockSize - 1)) * 16384LL);
-  sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
-
-  meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
-
-  /* Compute mean of all input values */
-  t = (q15_t) ((1.0 / (blockSize * (blockSize - 1))) * 32768LL);
-  mean = (q15_t) __SSAT(sum, 16u);
-
-  /* Compute square of mean */
-  squareOfMean = ((q31_t) mean * mean) >> 15;
-  squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
-
-  /* mean of the squares minus the square of the mean. */
-  in1 = (q15_t) (meanOfSquares - squareOfMean);
-
-  /* Compute standard deviation and store the result to the destination */
-  arm_sqrt_q15(in1, pResult);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t in;                                      /* input value */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  t = (q15_t) ((1.0 / (blockSize - 1)) * 16384LL);
-  sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
-  meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
-
-  /* Compute mean of all input values */
-  mean = (q15_t) __SSAT(sum, 16u);
-
-  /* Compute square of mean of the input samples   
-   * and then store the result in a temporary variable, squareOfMean.*/
-  t = (q15_t) ((1.0 / (blockSize * (blockSize - 1))) * 32768LL);
-  squareOfMean = ((q31_t) mean * mean) >> 15;
-  squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
-
-  /* mean of the squares minus the square of the mean. */
-  in = (q15_t) (meanOfSquares - squareOfMean);
-
-  /* Compute standard deviation and store the result to the destination */
-  arm_sqrt_q15(in, pResult);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-}
-
-/**    
- * @} end of STD group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c
deleted file mode 100644
index de60bc06ea..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_std_q31.c    
-*    
-* Description:	Standard deviation of an array of Q31 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup STD    
- * @{    
- */
-
-
-/**    
- * @brief Standard deviation of the elements of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult standard deviation value returned here    
- * @return none.    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- *\par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The input is represented in 1.31 format, and intermediate multiplication    
- * yields a 2.62 format.    
- * The accumulator maintains full precision of the intermediate multiplication results,     
- * but provides only a single guard bit.    
- * There is no saturation on intermediate additions.    
- * If the accumulator overflows it wraps around and distorts the result.    
- * In order to avoid overflows completely the input signal must be scaled down by     
- * log2(blockSize) bits, as a total of blockSize additions are performed internally.     
- * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.    
- *    
- */
-
-
-void arm_std_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* Accumulator */
-  q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  q31_t mean;                                    /* mean */
-  q31_t in;                                      /* input value */
-  q31_t t;                                       /* Temporary variable */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f);
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  sumOfSquares = (sumOfSquares >> 31);
-  meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f);
-  sumOfSquares = (sumOfSquares >> 31);
-  meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Compute mean of all input values */
-  t = (q31_t) ((1.0f / (blockSize * (blockSize - 1u))) * 2147483648.0f);
-  mean = (q31_t) (sum);
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t) (((q63_t) mean * mean) >> 31);
-  squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 31);
-
-
-  /* Compute standard deviation and then store the result to the destination */
-  arm_sqrt_q31(meanOfSquares - squareOfMean, pResult);
-
-}
-
-/**    
- * @} end of STD group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c
deleted file mode 100644
index 4dfd846c2b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_var_f32.c    
-*    
-* Description:	Variance of the elements of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup variance  Variance    
- *    
- * Calculates the variance of the elements in the input vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = (sumOfSquares - sum2 / blockSize) / (blockSize - 1)   
- *   
- *	   where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
- *   
- *	                   sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
- * 
   
- *    
- * There are separate functions for floating point, Q31, and Q15 data types.    
- */
-
-/**    
- * @addtogroup variance    
- * @{    
- */
-
-
-/**    
- * @brief Variance of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult variance value returned here    
- * @return none.    
- *    
- */
-
-
-void arm_var_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
-  float32_t in;                                  /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t meanOfSquares, mean, squareOfMean;   /* Temporary variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
-
-  /* Compute mean of all input values */
-  mean = sum / (float32_t) blockSize;
-
-  /* Compute square of mean */
-  squareOfMean = (mean * mean) * (((float32_t) blockSize) /
-                                  ((float32_t) blockSize - 1.0f));
-
-  /* Compute variance and then store the result to the destination */
-  *pResult = meanOfSquares - squareOfMean;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  float32_t squareOfSum;                         /* Square of Sum */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += in * in;
-
-    /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
-    /* Compute Sum of the input samples     
-     * and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute the square of sum */
-  squareOfSum = ((sum * sum) / (float32_t) blockSize);
-
-  /* Compute the variance */
-  *pResult = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of variance group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c
deleted file mode 100644
index d37e66a57c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_var_q15.c    
-*    
-* Description:	Variance of an array of Q15 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup variance    
- * @{    
- */
-
-/**    
- * @brief Variance of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult variance value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.15 format.   
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower     
- * 15 bits, and then saturated to yield a result in 1.15 format.    
- *    
- */
-
-
-void arm_var_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q31_t sum = 0;                                 /* Accumulator */
-  q31_t meanOfSquares, squareOfMean;             /* Mean of square and square of mean */
-  q15_t mean;                                    /* mean */
-  uint32_t blkCnt;                               /* loop counter */
-  q15_t t;                                       /* Temporary variable */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in;                                      /* Input variable */
-  q15_t in1;                                     /* Temporary variable */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in1 = *pSrc++;
-    sum += in1;
-    sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384);
-  sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
-
-  meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* Temporary variable */
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384);
-  sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
-  meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Compute mean of all input values */
-  t = (q15_t) ((1.0f / (float32_t) (blockSize * (blockSize - 1u))) * 32768);
-  mean = __SSAT(sum, 16u);
-
-  /* Compute square of mean */
-  squareOfMean = ((q31_t) mean * mean) >> 15;
-  squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
-
-  /* Compute variance and then store the result to the destination */
-  *pResult = (meanOfSquares - squareOfMean);
-
-}
-
-/**    
- * @} end of variance group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c
deleted file mode 100644
index 7acef7ef12..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_var_q31.c    
-*    
-* Description:	Variance of an array of Q31 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupStats        
- */
-
-/**        
- * @addtogroup variance        
- * @{        
- */
-
-/**        
- * @brief Variance of the elements of a Q31 vector.        
- * @param[in]       *pSrc points to the input vector        
- * @param[in]       blockSize length of the input vector        
- * @param[out]      *pResult variance value returned here        
- * @return none.        
- *        
- * @details        
- * Scaling and Overflow Behavior:        
- *        
- *\par        
- * The function is implemented using an internal 64-bit accumulator.        
- * The input is represented in 1.31 format, and intermediate multiplication        
- * yields a 2.62 format.        
- * The accumulator maintains full precision of the intermediate multiplication results,         
- * but provides only a single guard bit.        
- * There is no saturation on intermediate additions.        
- * If the accumulator overflows it wraps around and distorts the result.        
- * In order to avoid overflows completely the input signal must be scaled down by         
- * log2(blockSize) bits, as a total of blockSize additions are performed internally.         
- * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.        
- *        
- */
-
-
-void arm_var_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult)
-{
-  q63_t sum = 0, sumSquare = 0;                  /* Accumulator */
-  q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  q31_t mean;                                    /* mean */
-  q31_t in;                                      /* input value */
-  q31_t t;                                       /* Temporary variable */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q63_t sumSquare1 = 0;                          /* Accumulator */
-  q31_t in1, in2, in3, in4;                      /* Temporary input variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples        
-     * and then store the result in a temporary variable, sum. */
-    /* read input samples from source buffer */
-    in1 = pSrc[0];
-    in2 = pSrc[1];
-
-    /* calculate sum of inputs */
-    sum += in1;
-    /* calculate sum of squares */
-    sumSquare += ((q63_t) (in1) * (in1));
-    in3 = pSrc[2];
-    sum += in2;
-    sumSquare1 += ((q63_t) (in2) * (in2));
-    in4 = pSrc[3];
-    sum += in3;
-    sumSquare += ((q63_t) (in3) * (in3));
-    sum += in4;
-    sumSquare1 += ((q63_t) (in4) * (in4));
-
-    /* update input pointer to process next samples */
-    pSrc += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* add two accumulators */
-  sumSquare = sumSquare + sumSquare1;
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples        
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sumSquare += ((q63_t) (in) * (in));
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f);
-
-  /* Compute Mean of squares of the input samples        
-   * and then store the result in a temporary variable, meanOfSquares. */
-  sumSquare = (sumSquare >> 31);
-  meanOfSquares = (q31_t) ((sumSquare * t) >> 30);
-
-  /* Compute mean of all input values */
-  t = (q31_t) ((1.0f / (blockSize * (blockSize - 1u))) * 2147483648.0f);
-  mean = (q31_t) (sum);
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t) (((q63_t) mean * mean) >> 31);
-  squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 31);
-
-  /* Compute variance and then store the result to the destination */
-  *pResult = (q63_t) meanOfSquares - squareOfMean;
-
-}
-
-/**        
- * @} end of variance group        
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c
deleted file mode 100644
index 5621b87520..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_f32.c    
-*    
-* Description:	Copies the elements of a floating-point vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup copy Vector Copy    
- *    
- * Copies sample by sample from source vector to destination vector.    
- *    
- * 
    
- * 	pDst[n] = pSrc[n];   0 <= n < blockSize.    
- * 
    
- *   
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.     
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-
-/**    
- * @brief Copies the elements of a floating-point vector.     
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-
-void arm_copy_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c
deleted file mode 100644
index e605a72698..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_q15.c    
-*    
-* Description:	Copies the elements of a Q15 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-/**    
- * @brief Copies the elements of a Q15 vector.     
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-void arm_copy_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Read two inputs */
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the value in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c
deleted file mode 100644
index 843083db22..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_q31.c    
-*    
-* Description:	Copies the elements of a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-
-/**    
- * @brief Copies the elements of a Q31 vector.     
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-void arm_copy_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the values in the destination buffer */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the value in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c
deleted file mode 100644
index 06288fc0b0..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_q7.c    
-*    
-* Description:	Copies the elements of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-
-/**    
- * @brief Copies the elements of a Q7 vector.    
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-void arm_copy_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    /* 4 samples are copied and stored at a time using SIMD */
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c
deleted file mode 100644
index 98d6635f58..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_f32.c    
-*    
-* Description:	Fills a constant value into a floating-point vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup Fill Vector Fill    
- *    
- * Fills the destination vector with a constant value.    
- *    
- * 
    
- * 	pDst[n] = value;   0 <= n < blockSize.    
- * 
    
- *   
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.     
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a floating-point vector.     
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-
-void arm_fill_f32(
-  float32_t value,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1 = value;
-  float32_t in2 = value;
-  float32_t in3 = value;
-  float32_t in4 = value;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c
deleted file mode 100644
index 9de552934a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_q15.c    
-*    
-* Description:	Fills a constant value into a Q15 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a Q15 vector.    
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-void arm_fill_q15(
-  q15_t value,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t packedValue;                             /* value packed to 32 bits */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Packing two 16 bit values to 32 bit value in order to use SIMD */
-  packedValue = __PKHBT(value, value, 16u);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *__SIMD32(pDst)++ = packedValue;
-    *__SIMD32(pDst)++ = packedValue;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c
deleted file mode 100644
index 2d4f22e1e7..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_q31.c    
-*    
-* Description:	Fills a constant value into a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a Q31 vector.    
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-void arm_fill_q31(
-  q31_t value,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1 = value;
-  q31_t in2 = value;
-  q31_t in3 = value;
-  q31_t in4 = value;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c
deleted file mode 100644
index 2a26be451b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_q7.c    
-*    
-* Description:	Fills a constant value into a Q7 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a Q7 vector.    
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-void arm_fill_q7(
-  q7_t value,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t packedValue;                             /* value packed to 32 bits */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Packing four 8 bit values to 32 bit value in order to use SIMD */
-  packedValue = __PACKq7(value, value, value, value);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *__SIMD32(pDst)++ = packedValue;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c
deleted file mode 100644
index 8ff2efd197..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_float_to_q15.c    
-*    
-* Description:	Converts the elements of the floating-point vector to Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup float_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the floating-point vector to Q15 vector.    
- * @param[in]       *pSrc points to the floating-point input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- * \par   
- * The equation used for the conversion process is:    
- * 
    
- * 	pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.    
- * 
    
- * \par Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- * \note   
- * In order to apply rounding, the library should be rebuilt with the ROUNDING macro     
- * defined in the preprocessor section of project options.     
- *    
- */
-
-
-void arm_float_to_q15(
-  float32_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifdef ARM_MATH_ROUNDING
-
-  float32_t in;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0 ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of float_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c
deleted file mode 100644
index 1244c8b753..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_float_to_q31.c    
-*    
-* Description:	Converts the elements of the floating-point vector to Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup float_to_x  Convert 32-bit floating point value    
- */
-
-/**    
- * @addtogroup float_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the floating-point vector to Q31 vector.    
- * @param[in]       *pSrc points to the floating-point input vector    
- * @param[out]      *pDst points to the Q31 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- *\par Description:    
- * \par   
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.    
- * 
    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- *   
- * \note In order to apply rounding, the library should be rebuilt with the ROUNDING macro     
- * defined in the preprocessor section of project options.     
- */
-
-
-void arm_float_to_q31(
-  float32_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifdef ARM_MATH_ROUNDING
-
-  float32_t in;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 32768 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0 ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of float_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c
deleted file mode 100644
index e43f0531ee..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_float_to_q7.c    
-*    
-* Description:	Converts the elements of the floating-point vector to Q7 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup float_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the floating-point vector to Q7 vector.    
- * @param[in]       *pSrc points to the floating-point input vector    
- * @param[out]      *pDst points to the Q7 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- *\par Description:    
- * \par   
- * The equation used for the conversion process is:    
- * 
    
- * 	pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.    
- * 
    
- * \par Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.    
- * \note   
- * In order to apply rounding, the library should be rebuilt with the ROUNDING macro     
- * defined in the preprocessor section of project options.     
- */
-
-
-void arm_float_to_q7(
-  float32_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifdef ARM_MATH_ROUNDING
-
-  float32_t in;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-#else
-
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0 ? 0.5 : -0.5;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-#else
-
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128.0f);
-    in += in > 0 ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q31_t) (in), 8));
-
-#else
-
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of float_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c
deleted file mode 100644
index c927358515..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q15_to_float.c    
-*    
-* Description:	Converts the elements of the Q15 vector to floating-point vector.     
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup q15_to_x  Convert 16-bit Integer value    
- */
-
-/**    
- * @addtogroup q15_to_x    
- * @{    
- */
-
-
-
-
-/**    
- * @brief  Converts the elements of the Q15 vector to floating-point vector.     
- * @param[in]       *pSrc points to the Q15 input vector    
- * @param[out]      *pDst points to the floating-point output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q15_to_float(
-  q15_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 32768 */
-    /* convert from q15 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 32768 */
-    /* convert from q15 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of q15_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c
deleted file mode 100644
index d785e93018..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q15_to_q31.c    
-*    
-* Description:	Converts the elements of the Q15 vector to Q31 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q15_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q15 vector to Q31 vector.     
- * @param[in]       *pSrc points to the Q15 input vector    
- * @param[out]      *pDst points to the Q31 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:   
- *   
- * 
    
- * 	pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q15_to_q31(
-  q15_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2;
-  q31_t out1, out2, out3, out4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t)A << 16 */
-    /* convert from q15 to q31 and then store the results in the destination buffer */
-    in1 = *__SIMD32(pIn)++;
-    in2 = *__SIMD32(pIn)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* extract lower 16 bits to 32 bit result */
-    out1 = in1 << 16u;
-    /* extract upper 16 bits to 32 bit result */
-    out2 = in1 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out3 = in2 << 16u;
-    /* extract upper 16 bits to 32 bit result */
-    out4 = in2 & 0xFFFF0000;
-
-#else
-
-    /* extract upper 16 bits to 32 bit result */
-    out1 = in1 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out2 = in1 << 16u;
-    /* extract upper 16 bits to 32 bit result */
-    out3 = in2 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out4 = in2 << 16u;
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    *pDst++ = out1;
-    *pDst++ = out2;
-    *pDst++ = out3;
-    *pDst++ = out4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t)A << 16 */
-    /* convert from q15 to q31 and then store the results in the destination buffer */
-    *pDst++ = (q31_t) * pIn++ << 16;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q15_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c
deleted file mode 100644
index 8d9a9be044..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q15_to_q7.c    
-*    
-* Description:	Converts the elements of the Q15 vector to Q7 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q15_to_x    
- * @{    
- */
-
-
-/**    
- * @brief Converts the elements of the Q15 vector to Q7 vector.     
- * @param[in]       *pSrc points to the Q15 input vector    
- * @param[out]      *pDst points to the Q7 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.    
- * 
   
- *   
- */
-
-
-void arm_q15_to_q7(
-  q15_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2;
-  q31_t out1, out2;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 8 */
-    /* convert from q15 to q7 and then store the results in the destination buffer */
-    in1 = *__SIMD32(pIn)++;
-    in2 = *__SIMD32(pIn)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __PKHTB(in2, in1, 16);
-    out2 = __PKHBT(in2, in1, 16);
-
-#else
-
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHBT(in1, in2, 16);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* rotate packed value by 24 */
-    out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24);
-
-    /* anding with 0xff00ff00 to get two 8 bit values */
-    out1 = out1 & 0xFF00FF00;
-    /* anding with 0x00ff00ff to get two 8 bit values */
-    out2 = out2 & 0x00FF00FF;
-
-    /* oring two values(contains two 8 bit values) to get four packed 8 bit values */
-    out1 = out1 | out2;
-
-    /* store 4 samples at a time to destiantion buffer */
-    *__SIMD32(pDst)++ = out1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 8 */
-    /* convert from q15 to q7 and then store the results in the destination buffer */
-    *pDst++ = (q7_t) (*pIn++ >> 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q15_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c
deleted file mode 100644
index b2f6de9b26..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q31_to_float.c    
-*    
-* Description:	Converts the elements of the Q31 vector to floating-point vector.      
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup q31_to_x  Convert 32-bit Integer value    
- */
-
-/**    
- * @addtogroup q31_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q31 vector to floating-point vector.    
- * @param[in]       *pSrc points to the Q31 input vector    
- * @param[out]      *pDst points to the floating-point output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q31_to_float(
-  q31_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 2147483648 */
-    /* convert from q31 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 2147483648 */
-    /* convert from q31 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of q31_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c
deleted file mode 100644
index 1c99dbb473..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q31_to_q15.c    
-*    
-* Description:	Converts the elements of the Q31 vector to Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q31_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q31 vector to Q15 vector.    
- * @param[in]       *pSrc points to the Q31 input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *     
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q31_to_q15(
-  q31_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-  q31_t out1, out2;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A >> 16 */
-    /* convert from q31 to q15 and then store the results in the destination buffer */
-    in1 = *pIn++;
-    in2 = *pIn++;
-    in3 = *pIn++;
-    in4 = *pIn++;
-
-    /* pack two higher 16-bit values from two 32-bit values */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __PKHTB(in2, in1, 16);
-    out2 = __PKHTB(in4, in3, 16);
-
-#else
-
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHTB(in3, in4, 16);
-
-#endif //      #ifdef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ = out1;
-    *__SIMD32(pDst)++ = out2;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A >> 16 */
-    /* convert from q31 to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) (*pIn++ >> 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q31_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c
deleted file mode 100644
index 2531c11e81..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q31_to_q7.c    
-*    
-* Description:	Converts the elements of the Q31 vector to Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q31_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q31 vector to Q7 vector.    
- * @param[in]       *pSrc points to the Q31 input vector    
- * @param[out]      *pDst points to the Q7 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.     
- * 
    
- *   
- */
-
-
-void arm_q31_to_q7(
-  q31_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-  q7_t out1, out2, out3, out4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 24 */
-    /* convert from q31 to q7 and then store the results in the destination buffer */
-    in1 = *pIn++;
-    in2 = *pIn++;
-    in3 = *pIn++;
-    in4 = *pIn++;
-
-    out1 = (q7_t) (in1 >> 24);
-    out2 = (q7_t) (in2 >> 24);
-    out3 = (q7_t) (in3 >> 24);
-    out4 = (q7_t) (in4 >> 24);
-
-    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 24 */
-    /* convert from q31 to q7 and then store the results in the destination buffer */
-    *pDst++ = (q7_t) (*pIn++ >> 24);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q31_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c
deleted file mode 100644
index 8e3f6f1b7d..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q7_to_float.c    
-*    
-* Description:	Converts the elements of the Q7 vector to floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup q7_to_x  Convert 8-bit Integer value    
- */
-
-/**    
- * @addtogroup q7_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q7 vector to floating-point vector.    
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the floating-point output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *		     
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q7_to_float(
-  q7_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 128 */
-    /* convert from q7 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 128 */
-    /* convert from q7 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of q7_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c
deleted file mode 100644
index a48ec29b82..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q7_to_q15.c    
-*    
-* Description:	Converts the elements of the Q7 vector to Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q7_to_x    
- * @{    
- */
-
-
-
-
-/**    
- * @brief Converts the elements of the Q7 vector to Q15 vector.    
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q7_to_q15(
-  q7_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-  q31_t in;
-  q31_t in1, in2;
-  q31_t out1, out2;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A << 8 */
-    /* convert from q7 to q15 and then store the results in the destination buffer */
-    in = *__SIMD32(pIn)++;
-
-    /* rotatate in by 8 and extend two q7_t values to q15_t values */
-    in1 = __SXTB16(__ROR(in, 8));
-
-    /* extend remainig two q7_t values to q15_t values */
-    in2 = __SXTB16(in);
-
-    in1 = in1 << 8u;
-    in2 = in2 << 8u;
-
-    in1 = in1 & 0xFF00FF00;
-    in2 = in2 & 0xFF00FF00;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out2 = __PKHTB(in1, in2, 16);
-    out1 = __PKHBT(in2, in1, 16);
-
-#else
-
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHBT(in2, in1, 16);
-
-#endif
-
-    *__SIMD32(pDst)++ = out1;
-    *__SIMD32(pDst)++ = out2;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A << 8 */
-    /* convert from q7 to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) * pIn++ << 8;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q7_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c
deleted file mode 100644
index 0607a9a4c8..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q7_to_q31.c    
-*    
-* Description:	Converts the elements of the Q7 vector to Q31 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q7_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q7 vector to Q31 vector.    
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the Q31 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.   
- * 
     
- *   
- */
-
-
-void arm_q7_to_q31(
-  q7_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  q31_t in;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t) A << 24 */
-    /* convert from q7 to q31 and then store the results in the destination buffer */
-    in = *__SIMD32(pIn)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
-    *pDst++ = (in & 0xFF000000);
-
-#else
-
-    *pDst++ = (in & 0xFF000000);
-    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
-
-#endif //              #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t) A << 24 */
-    /* convert from q7 to q31 and then store the results in the destination buffer */
-    *pDst++ = (q31_t) * pIn++ << 24;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q7_to_x group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c
deleted file mode 100644
index 5529914755..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c
+++ /dev/null
@@ -1,222 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_bitreversal.c    
-*    
-* Description:	This file has common tables like Bitreverse, reciprocal etc which are used across different functions    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Initial Version  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/*    
- * @brief  In-place bit reversal function.   
- * @param[in, out] *pSrc        points to the in-place buffer of floating-point data type.   
- * @param[in]      fftSize      length of the FFT.   
- * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.   
- * @param[in]      *pBitRevTab  points to the bit reversal table.   
- * @return none.   
- */
-
-void arm_bitreversal_f32(
-  float32_t * pSrc,
-  uint16_t fftSize,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab)
-{
-  uint16_t fftLenBy2, fftLenBy2p1;
-  uint16_t i, j;
-  float32_t in;
-
-  /*  Initializations */
-  j = 0u;
-  fftLenBy2 = fftSize >> 1u;
-  fftLenBy2p1 = (fftSize >> 1u) + 1u;
-
-  /* Bit Reversal Implementation */
-  for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-  {
-    if(i < j)
-    {
-      /*  pSrc[i] <-> pSrc[j]; */
-      in = pSrc[2u * i];
-      pSrc[2u * i] = pSrc[2u * j];
-      pSrc[2u * j] = in;
-
-      /*  pSrc[i+1u] <-> pSrc[j+1u] */
-      in = pSrc[(2u * i) + 1u];
-      pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
-      pSrc[(2u * j) + 1u] = in;
-
-      /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
-      in = pSrc[2u * (i + fftLenBy2p1)];
-      pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
-      pSrc[2u * (j + fftLenBy2p1)] = in;
-
-      /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
-      in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
-      pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
-        pSrc[(2u * (j + fftLenBy2p1)) + 1u];
-      pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
-
-    }
-
-    /*  pSrc[i+1u] <-> pSrc[j+1u] */
-    in = pSrc[2u * (i + 1u)];
-    pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
-    pSrc[2u * (j + fftLenBy2)] = in;
-
-    /*  pSrc[i+2u] <-> pSrc[j+2u] */
-    in = pSrc[(2u * (i + 1u)) + 1u];
-    pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
-    pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
-
-    /*  Reading the index for the bit reversal */
-    j = *pBitRevTab;
-
-    /*  Updating the bit reversal index depending on the fft length  */
-    pBitRevTab += bitRevFactor;
-  }
-}
-
-
-
-/*    
- * @brief  In-place bit reversal function.   
- * @param[in, out] *pSrc        points to the in-place buffer of Q31 data type.   
- * @param[in]      fftLen       length of the FFT.   
- * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table   
- * @param[in]      *pBitRevTab  points to bit reversal table.   
- * @return none.   
- */
-
-void arm_bitreversal_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTable)
-{
-  uint32_t fftLenBy2, fftLenBy2p1, i, j;
-  q31_t in;
-
-  /*  Initializations      */
-  j = 0u;
-  fftLenBy2 = fftLen / 2u;
-  fftLenBy2p1 = (fftLen / 2u) + 1u;
-
-  /* Bit Reversal Implementation */
-  for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-  {
-    if(i < j)
-    {
-      /*  pSrc[i] <-> pSrc[j]; */
-      in = pSrc[2u * i];
-      pSrc[2u * i] = pSrc[2u * j];
-      pSrc[2u * j] = in;
-
-      /*  pSrc[i+1u] <-> pSrc[j+1u] */
-      in = pSrc[(2u * i) + 1u];
-      pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
-      pSrc[(2u * j) + 1u] = in;
-
-      /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
-      in = pSrc[2u * (i + fftLenBy2p1)];
-      pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
-      pSrc[2u * (j + fftLenBy2p1)] = in;
-
-      /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
-      in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
-      pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
-        pSrc[(2u * (j + fftLenBy2p1)) + 1u];
-      pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
-
-    }
-
-    /*  pSrc[i+1u] <-> pSrc[j+1u] */
-    in = pSrc[2u * (i + 1u)];
-    pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
-    pSrc[2u * (j + fftLenBy2)] = in;
-
-    /*  pSrc[i+2u] <-> pSrc[j+2u] */
-    in = pSrc[(2u * (i + 1u)) + 1u];
-    pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
-    pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
-
-    /*  Reading the index for the bit reversal */
-    j = *pBitRevTable;
-
-    /*  Updating the bit reversal index depending on the fft length */
-    pBitRevTable += bitRevFactor;
-  }
-}
-
-
-
-/*    
-   * @brief  In-place bit reversal function.   
-   * @param[in, out] *pSrc        points to the in-place buffer of Q15 data type.   
-   * @param[in]      fftLen       length of the FFT.   
-   * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table   
-   * @param[in]      *pBitRevTab  points to bit reversal table.   
-   * @return none.   
- */
-
-void arm_bitreversal_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab)
-{
-  q31_t *pSrc = (q31_t *) pSrc16;
-  q31_t in;
-  uint32_t fftLenBy2, fftLenBy2p1;
-  uint32_t i, j;
-
-  /*  Initializations */
-  j = 0u;
-  fftLenBy2 = fftLen / 2u;
-  fftLenBy2p1 = (fftLen / 2u) + 1u;
-
-  /* Bit Reversal Implementation */
-  for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-  {
-    if(i < j)
-    {
-      /*  pSrc[i] <-> pSrc[j]; */
-      /*  pSrc[i+1u] <-> pSrc[j+1u] */
-      in = pSrc[i];
-      pSrc[i] = pSrc[j];
-      pSrc[j] = in;
-
-      /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */
-      /*  pSrc[i + fftLenBy2p1+1u] <-> pSrc[j + fftLenBy2p1+1u] */
-      in = pSrc[i + fftLenBy2p1];
-      pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
-      pSrc[j + fftLenBy2p1] = in;
-    }
-
-    /*  pSrc[i+1u] <-> pSrc[j+fftLenBy2];         */
-    /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1u]  */
-    in = pSrc[i + 1u];
-    pSrc[i + 1u] = pSrc[j + fftLenBy2];
-    pSrc[j + fftLenBy2] = in;
-
-    /*  Reading the index for the bit reversal */
-    j = *pBitRevTab;
-
-    /*  Updating the bit reversal index depending on the fft length  */
-    pBitRevTab += bitRevFactor;
-  }
-}
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c
deleted file mode 100644
index 3cfc45fd9a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c
+++ /dev/null
@@ -1,511 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_f32.c   
-*   
-* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function   
-*   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Initial version   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @defgroup Radix2_CFFT_CIFFT Radix-2 Complex FFT Functions   
- *   
- * \par   
- * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT).   
- * Computational complexity of CFFT reduces drastically when compared to DFT.   
- * \par   
- * This set of functions implements CFFT/CIFFT   
- * for Q15, Q31, and floating-point data types.  The functions operates on in-place buffer which uses same buffer for input and output.   
- * Complex input is stored in input buffer in an interleaved fashion.   
- *   
- * \par   
- * The functions operate on blocks of input and output data and each call to the function processes   
- * 2*fftLen samples through the transform.  pSrc  points to In-place arrays containing 2*fftLen values.   
- * \par  
- * The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below.   
- * 
 {real[0], imag[0], real[1], imag[1],..} 
   
- *   
- * \par Lengths supported by the transform:  
- * \par   
- * Internally, the function utilize a radix-2 decimation in frequency(DIF) algorithm   
- * and the size of the FFT supported are of the lengths [16, 32, 64, 128, 256, 512, 1024, 2048, 4096].  
- *    
- *   
- * \par Algorithm:   
- *   
- * Complex Fast Fourier Transform:   
- * \par    
- * Input real and imaginary data:   
- * 
   
- * x(n) = xa + j * ya   
- * x(n+N/2 ) = xb + j * yb   
- * 
   
- * where N is length of FFT   
- * \par   
- * Output real and imaginary data:   
- * 
   
- * X(2r) = xa'+ j * ya'   
- * X(2r+1) = xb'+ j * yb'   
- * 
   
- * \par   
- * Twiddle factors for radix-2 FFT:   
- * 
   
- * Wn = cosVal + j * (- sinVal)   
- * 
   
- *   
- * \par   
- * \image html CFFT_Radix2.gif "Radix-2 Decimation-in Frequency Complex Fast Fourier Transform"   
- *   
- * \par   
- * Output from Radix-2 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output.   
- * \par   
- *  Butterfly CFFT equations:   
- * 
   
- * xa' = xa + xb  
- * ya' = ya + yb  
- * xb' = (xa-xb)* cosVal + (ya-yb) * sinVal   
- * yb' = (ya-yb)* cosVal - (xa-xb) * sinVal   
- * 
   
- *   
- *   
- * Complex Inverse Fast Fourier Transform:   
- * \par   
- * CIFFT uses same twiddle factor table as CFFT with modifications in the design equation as shown below.   
- *   
- * \par   
- *  Modified Butterfly CIFFT equations:   
- * 
   
- * xa' = xa + xb  
- * ya' = ya + yb  
- * xb' = (xa-xb)* cosVal - (ya-yb) * sinVal   
- * yb' = (ya-yb)* cosVal + (xa-xb) * sinVal   
- * 
   
- *   
- * \par Instance Structure   
- * A separate instance structure must be defined for each Instance but the twiddle factors and bit reversal tables can be reused.   
- * There are separate instance structure declarations for each of the 3 supported data types.   
- *   
- * \par Initialization Functions   
- * There is also an associated initialization function for each data type.   
- * The initialization function performs the following operations:   
- * - Sets the values of the internal structure fields.   
- * - Initializes twiddle factor table and bit reversal table pointers   
- * \par   
- * Use of the initialization function is optional.   
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.   
- * To place an instance structure into a const data section, the instance structure must be manually initialized.   
- * Manually initialize the instance structure as follows:   
- * 
   
- *arm_cfft_radix2_instance_f32 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor, onebyfftLen};   
- *arm_cfft_radix2_instance_q31 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};   
- *arm_cfft_radix2_instance_q15 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};   
- * 
   
- * \par   
- * where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT);   
- * bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order);    
- * pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table.   
- * twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table;    
- * pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table.   
- * onebyfftLen value of 1/fftLen to calculate CIFFT;   
- *  
- * \par Fixed-Point Behavior   
- * Care must be taken when using the fixed-point versions of the CFFT/CIFFT function.   
- * Refer to the function specific documentation below for usage guidelines.   
- */
-
-
-/**   
- * @addtogroup Radix2_CFFT_CIFFT   
- * @{   
- */
-
-/**   
- * @details   
- * @brief Processing function for the floating-point Radix-2 CFFT/CIFFT.  
- * @param[in]      *S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure.  
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
- * @return none.  
- */
-
-void arm_cfft_radix2_f32(
-  const arm_cfft_radix2_instance_f32 * S,
-  float32_t * pSrc)
-{
-
-  if(S->ifftFlag == 1u)
-  {
-    /*  Complex IFFT radix-2  */
-    arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
-                                     S->twidCoefModifier, S->onebyfftLen);
-  }
-  else
-  {
-    /*  Complex FFT radix-2  */
-    arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
-                             S->twidCoefModifier);
-  }
-
-  if(S->bitReverseFlag == 1u)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
-
-}
-
-
-/**    
- * @} end of Radix2_CFFT_CIFFT group    
- */
-
-
-
-/* ----------------------------------------------------------------------    
-** Internal helper function used by the FFTs    
-** ------------------------------------------------------------------- */
-
-/*    
- * @brief  Core function for the floating-point CFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to the twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-void arm_radix2_butterfly_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-
-  int i, j, k, l;
-  int n1, n2, ia;
-  float32_t xt, yt, cosVal, sinVal;
-
-#ifndef ARM_MATH_CM0
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-
-    /*  Twiddle coefficients index modifier */
-    ia = ia + twidCoefModifier;
-
-    /*  index calculation for the input as, */
-    /*  pSrc[i + 0], pSrc[i + fftLen/1] */
-    l = i + n2;
-
-    /*  Butterfly implementation */
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-    pSrc[2u * l] = xt * cosVal + yt * sinVal;
-
-    pSrc[2u * l + 1u] = yt * cosVal - xt * sinVal;
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-        pSrc[2u * l] = xt * cosVal + yt * sinVal;
-
-        pSrc[2u * l + 1u] = yt * cosVal - xt * sinVal;
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-  }                             // groups loop end 
-
-#else
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  // loop for stage 
-  for (k = fftLen; k > 1; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-        pSrc[2 * l] = (cosVal * xt + sinVal * yt);      // >> 15; 
-        pSrc[2 * l + 1] = (cosVal * yt - sinVal * xt);  // >> 15; 
-
-      }
-    }
-    twidCoefModifier = twidCoefModifier << 1u;
-  }
-
-#endif //    #ifndef ARM_MATH_CM0
-
-}
-
-
-void arm_radix2_butterfly_inverse_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier,
-  float32_t onebyfftLen)
-{
-
-  int i, j, k, l;
-  int n1, n2, ia;
-  float32_t xt, yt, cosVal, sinVal;
-
-#ifndef ARM_MATH_CM0
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-    pSrc[2u * l] = xt * cosVal - yt * sinVal;
-
-    pSrc[2u * l + 1u] = yt * cosVal + xt * sinVal;
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-        pSrc[2u * l] = xt * cosVal - yt * sinVal;
-
-        pSrc[2u * l + 1u] = yt * cosVal + xt * sinVal;
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) * onebyfftLen;
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) * onebyfftLen;
-
-    pSrc[2u * l] = xt * onebyfftLen;
-
-    pSrc[2u * l + 1u] = yt * onebyfftLen;
-
-  }                             // butterfly loop end 
-
-#else
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  // loop for stage 
-  for (k = fftLen; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-        pSrc[2u * l] = xt * cosVal - yt * sinVal;
-
-        pSrc[2u * l + 1u] = yt * cosVal + xt * sinVal;
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) * onebyfftLen;
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) * onebyfftLen;
-
-    pSrc[2u * l] = xt * onebyfftLen;
-
-    pSrc[2u * l + 1u] = yt * onebyfftLen;
-
-  }                             // butterfly loop end 
-
-#endif //      #ifndef ARM_MATH_CM0
-
-}
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
deleted file mode 100644
index 76c781fc32..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
+++ /dev/null
@@ -1,198 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix4_init_f32.c   
-*   
-* Description:	Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated.   
-*   
-* Version 0.0.5  2010/04/26    
-* 	 incorporated review comments and updated with latest CMSIS layer   
-*   
-* Version 0.0.3  2010/03/10    
-*    Initial version   
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @addtogroup Radix2_CFFT_CIFFT   
- * @{   
- */
-
-/**   
-* @brief  Initialization function for the floating-point CFFT/CIFFT.  
-* @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.  
-* @param[in]     fftLen         length of the FFT.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.   
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated  
-* \par   
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.   
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par   
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-arm_status arm_cfft_radix2_init_f32(
-  arm_cfft_radix2_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (float32_t *) twiddleCoef;
-
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.000244140625;
-    break;
-
-  case 2048u:
-    /*  Initializations of structure parameters for 2048 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.00048828125;
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.0009765625f;
-    break;
-
-  case 512u:
-    /*  Initializations of structure parameters for 512 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 8u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 8u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.001953125;
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    S->onebyfftLen = 0.00390625f;
-    break;
-
-  case 128u:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32u;
-    S->bitRevFactor = 32u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-    S->onebyfftLen = 0.0078125;
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    S->onebyfftLen = 0.015625f;
-    break;
-
-  case 32u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 128u;
-    S->bitRevFactor = 128u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-    S->onebyfftLen = 0.03125;
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    S->onebyfftLen = 0.0625f;
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**   
- * @} end of Radix2_CFFT_CIFFT group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
deleted file mode 100644
index b6ba22c186..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix2_init_q15.c    
-*    
-* Description:	Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-
-/**    
- * @addtogroup Radix2_CFFT_CIFFT    
- * @{    
- */
-
-/**   
-* @brief Initialization function for the Q15 CFFT/CIFFT.   
-* @param[in,out] *S             points to an instance of the Q15 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.   
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated  
-* \par   
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.   
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par   
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-
-arm_status arm_cfft_radix2_init_q15(
-  arm_cfft_radix2_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q15_t *) twiddleCoefQ15;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-
-    break;
-
-  case 2048u:
-    /*  Initializations of structure parameters for 2048 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-    S->twidCoefModifier = 4u;
-    S->bitRevFactor = 4u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-
-    break;
-
-  case 512u:
-    /*  Initializations of structure parameters for 512 point FFT */
-    S->twidCoefModifier = 8u;
-    S->bitRevFactor = 8u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-
-    break;
-
-  case 128u:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32u;
-    S->bitRevFactor = 32u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-
-    break;
-
-  case 32u:
-    /*  Initializations of structure parameters for 32 point FFT */
-    S->twidCoefModifier = 128u;
-    S->bitRevFactor = 128u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of Radix2_CFFT_CIFFT group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
deleted file mode 100644
index 94eeeb00ae..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
+++ /dev/null
@@ -1,164 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_init_q31.c   
-*   
-* Description:	Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @addtogroup Radix2_CFFT_CIFFT   
- * @{   
- */
-
-
-/**    
-*    
-* @brief  Initialization function for the Q31 CFFT/CIFFT.   
-* @param[in,out] *S             points to an instance of the Q31 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.   
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated  
-* \par   
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.   
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par   
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-
-arm_status arm_cfft_radix2_init_q31(
-  arm_cfft_radix2_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q31_t *) twiddleCoefQ31;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of Instance structure depending on the FFT length */
-  switch (S->fftLen)
-  {
-    /*  Initializations of structure parameters for 4096 point FFT */
-  case 4096u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    break;
-
-    /*  Initializations of structure parameters for 2048 point FFT */
-  case 2048u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-    break;
-
-    /*  Initializations of structure parameters for 1024 point FFT */
-  case 1024u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    break;
-
-    /*  Initializations of structure parameters for 512 point FFT */
-  case 512u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 8u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 8u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    break;
-
-  case 128u:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32u;
-    S->bitRevFactor = 32u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    break;
-
-  case 32u:
-    /*  Initializations of structure parameters for 32 point FFT */
-    S->twidCoefModifier = 128u;
-    S->bitRevFactor = 128u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**   
- * @} end of Radix2_CFFT_CIFFT group   
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c
deleted file mode 100644
index c385091c7a..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c
+++ /dev/null
@@ -1,712 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_q15.c   
-*   
-* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function   
-*   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 0.0.3  2010/03/10    
-*    Initial version   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @defgroup Radix2_CFFT_CIFFT Radix-2 Complex FFT Functions   
- *   
- * \par   
- * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT).   
- * Computational complexity of CFFT reduces drastically when compared to DFT.    
- */
-
-
-/**   
- * @addtogroup Radix2_CFFT_CIFFT   
- * @{   
- */
-
-/**   
- * @details   
- * @brief Processing function for the fixed-point CFFT/CIFFT.  
- * @param[in]      *S    points to an instance of the fixed-point CFFT/CIFFT structure.  
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
- * @return none.  
- */
-
-void arm_cfft_radix2_q15(
-  const arm_cfft_radix2_instance_q15 * S,
-  q15_t * pSrc)
-{
-
-  if(S->ifftFlag == 1u)
-  {
-    arm_radix2_butterfly_inverse_q15(pSrc, S->fftLen,
-                                     S->pTwiddle, S->twidCoefModifier);
-  }
-  else
-  {
-    arm_radix2_butterfly_q15(pSrc, S->fftLen,
-                             S->pTwiddle, S->twidCoefModifier);
-  }
-
-  arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-}
-
-/**   
- * @} end of Radix2_CFFT_CIFFT group   
- */
-
-void arm_radix2_butterfly_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-#ifndef ARM_MATH_CM0
-
-  int i, j, k, l;
-  int n1, n2, ia;
-  q15_t in;
-  q31_t T, S, R;
-  q31_t coeff, out1, out2;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 2;
-    T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 2;
-    S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUAD(coeff, R) >> 16;
-    out2 = __SMUSDX(coeff, R);
-
-#else
-
-    out1 = __SMUSDX(R, coeff) >> 16u;
-    out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    i++;
-    l++;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 2;
-    T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 2;
-    S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUAD(coeff, R) >> 16;
-    out2 = __SMUSDX(coeff, R);
-
-#else
-
-    out1 = __SMUSDX(R, coeff) >> 16u;
-    out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
-
-#else
-
-        out1 = __SMUSDX(R, coeff) >> 16u;
-        out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-        i += n1;
-
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
-
-#else
-
-        out1 = __SMUSDX(R, coeff) >> 16u;
-        out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) = R;
-
-    i += n1;
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) = R;
-
-  }                             // groups loop end 
-
-
-#else
-
-  int i, j, k, l;
-  int n1, n2, ia;
-  q15_t xt, yt, cosVal, sinVal;
-
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u;
-
-      yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u;
-
-      pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                      ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-      pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-        pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-        pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                             ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-#endif //             #ifndef ARM_MATH_CM0
-
-}
-
-
-void arm_radix2_butterfly_inverse_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-#ifndef ARM_MATH_CM0
-
-  int i, j, k, l;
-  int n1, n2, ia;
-  q15_t in;
-  q31_t T, S, R;
-  q31_t coeff, out1, out2;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 2;
-    T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 2;
-    S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUSD(coeff, R) >> 16;
-    out2 = __SMUADX(coeff, R);
-#else
-
-    out1 = __SMUADX(R, coeff) >> 16u;
-    out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    i++;
-    l++;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 2;
-    T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 2;
-    S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUSD(coeff, R) >> 16;
-    out2 = __SMUADX(coeff, R);
-#else
-
-    out1 = __SMUADX(R, coeff) >> 16u;
-    out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-
-#else
-
-        out1 = __SMUADX(R, coeff) >> 16u;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-        i += n1;
-
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-#else
-
-        out1 = __SMUADX(R, coeff) >> 16u;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-
-      T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-      S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-      R = __QSUB16(T, S);
-
-      _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
-
-      _SIMD32_OFFSET(pSrc + (2u * l)) = R;
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-#else
-
-
-  int i, j, k, l;
-  int n1, n2, ia;
-  q15_t xt, yt, cosVal, sinVal;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u;
-
-      yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u;
-
-      pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                      ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-      pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-        pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-        pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                             ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-  }                             // groups loop end 
-
-
-#endif //             #ifndef ARM_MATH_CM0
-
-}
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c
deleted file mode 100644
index 5b950c39c6..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
-*   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_q31.c   
-*   
-* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function   
-*   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 0.0.3  2010/03/10    
-*    Initial version   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @defgroup Radix2_CFFT_CIFFT Radix-2 Complex FFT Functions   
- *   
- * \par   
- * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT).   
- * Computational complexity of CFFT reduces drastically when compared to DFT.    
- */
-
-
-/**   
- * @addtogroup Radix2_CFFT_CIFFT   
- * @{   
- */
-
-/**   
- * @details   
- * @brief Processing function for the fixed-point CFFT/CIFFT.  
- * @param[in]      *S    points to an instance of the fixed-point CFFT/CIFFT structure.  
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
- * @return none.  
- */
-
-void arm_cfft_radix2_q31(
-  const arm_cfft_radix2_instance_q31 * S,
-  q31_t * pSrc)
-{
-
-  if(S->ifftFlag == 1u)
-  {
-    arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen,
-                                     S->pTwiddle, S->twidCoefModifier);
-  }
-  else
-  {
-    arm_radix2_butterfly_q31(pSrc, S->fftLen,
-                             S->pTwiddle, S->twidCoefModifier);
-  }
-
-  arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-}
-
-/**   
- * @} end of Radix2_CFFT_CIFFT group   
- */
-
-void arm_radix2_butterfly_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-
-  int i, j, k, l;
-  int n1, n2, ia;
-  q31_t xt, yt, cosVal, sinVal;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-    xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u);
-    pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u;
-
-    yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u);
-    pSrc[2 * i + 1] =
-      ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u;
-
-    pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) +
-                    ((int32_t) (((q63_t) yt * sinVal) >> 32)));
-
-    pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) -
-                         ((int32_t) (((q63_t) xt * sinVal) >> 32)));
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-        pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) +
-                        ((int32_t) (((q63_t) yt * sinVal) >> 32)));
-
-        pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) -
-                             ((int32_t) (((q63_t) xt * sinVal) >> 32)));
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-    i += n1;
-    l = i + n2;
-
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-  }                             // butterfly loop end 
-
-}
-
-
-void arm_radix2_butterfly_inverse_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-
-  int i, j, k, l;
-  int n1, n2, ia;
-  q31_t xt, yt, cosVal, sinVal;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-    xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u);
-    pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u;
-
-    yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u);
-    pSrc[2 * i + 1] =
-      ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u;
-
-    pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) -
-                    ((int32_t) (((q63_t) yt * sinVal) >> 32)));
-
-    pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) +
-                         ((int32_t) (((q63_t) xt * sinVal) >> 32)));
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-        pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) -
-                        ((int32_t) (((q63_t) yt * sinVal) >> 32)));
-
-        pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) +
-                             ((int32_t) (((q63_t) xt * sinVal) >> 32)));
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-    i += n1;
-    l = i + n2;
-
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-  }                             // butterfly loop end 
-
-}
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c
deleted file mode 100644
index d1fb3196e3..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c
+++ /dev/null
@@ -1,1236 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_f32.c    
-*    
-* Description:	Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @defgroup Radix4_CFFT_CIFFT Radix-4 Complex FFT Functions    
- *    
- * \par    
- * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT).    
- * Computational complexity of CFFT reduces drastically when compared to DFT.    
- * \par    
- * This set of functions implements CFFT/CIFFT    
- * for Q15, Q31, and floating-point data types.  The functions operates on in-place buffer which uses same buffer for input and output.    
- * Complex input is stored in input buffer in an interleaved fashion.    
- *    
- * \par    
- * The functions operate on blocks of input and output data and each call to the function processes    
- * 2*fftLen samples through the transform.  pSrc  points to In-place arrays containing 2*fftLen values.    
- * \par   
- * The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below.    
- * 
 {real[0], imag[0], real[1], imag[1],..} 
    
- *    
- * \par Lengths supported by the transform:   
- * \par    
- * Internally, the function utilize a radix-4 decimation in frequency(DIF) algorithm    
- * and the size of the FFT supported are of the lengths [16, 64, 256, 1024].   
- *     
- *    
- * \par Algorithm:    
- *    
- * Complex Fast Fourier Transform:    
- * \par     
- * Input real and imaginary data:    
- * 
    
- * x(n) = xa + j * ya    
- * x(n+N/4 ) = xb + j * yb    
- * x(n+N/2 ) = xc + j * yc    
- * x(n+3N 4) = xd + j * yd    
- * 
    
- * where N is length of FFT    
- * \par    
- * Output real and imaginary data:    
- * 
    
- * X(4r) = xa'+ j * ya'    
- * X(4r+1) = xb'+ j * yb'    
- * X(4r+2) = xc'+ j * yc'    
- * X(4r+3) = xd'+ j * yd'    
- * 
    
- * \par    
- * Twiddle factors for radix-4 FFT:    
- * 
    
- * Wn = co1 + j * (- si1)    
- * W2n = co2 + j * (- si2)    
- * W3n = co3 + j * (- si3)    
- * 
    
- *    
- * \par    
- * \image html CFFT.gif "Radix-4 Decimation-in Frequency Complex Fast Fourier Transform"    
- *    
- * \par    
- * Output from Radix-4 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output.    
- * \par    
- *  Butterfly CFFT equations:    
- * 
    
- * xa' = xa + xb + xc + xd    
- * ya' = ya + yb + yc + yd    
- * xc' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
- * yc' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
- * xb' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
- * yb' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
- * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
- * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
- * 
    
- *    
- *    
- * Complex Inverse Fast Fourier Transform:    
- * \par    
- * CIFFT uses same twiddle factor table as CFFT with modifications in the design equation as shown below.    
- *    
- * \par    
- *  Modified Butterfly CIFFT equations:    
- * 
    
- * xa' = xa + xb + xc + xd    
- * ya' = ya + yb + yc + yd    
- * xc' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)    
- * yc' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)    
- * xb' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)    
- * yb' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)    
- * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)    
- * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)    
- * 
    
- *    
- * \par Instance Structure    
- * A separate instance structure must be defined for each Instance but the twiddle factors and bit reversal tables can be reused.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Initializes twiddle factor table and bit reversal table pointers    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Manually initialize the instance structure as follows:    
- * 
    
- *arm_cfft_radix4_instance_f32 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor, onebyfftLen};    
- *arm_cfft_radix4_instance_q31 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};    
- *arm_cfft_radix4_instance_q15 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};    
- * 
    
- * \par    
- * where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT);    
- * bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order);     
- * pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table.    
- * twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table;     
- * pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table.    
- * onebyfftLen value of 1/fftLen to calculate CIFFT;    
- *   
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the CFFT/CIFFT function.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-
-/**    
- * @addtogroup Radix4_CFFT_CIFFT    
- * @{    
- */
-
-/**    
- * @details    
- * @brief Processing function for the floating-point Radix-4 CFFT/CIFFT.   
- * @param[in]      *S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure.   
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.   
- * @return none.   
- */
-
-void arm_cfft_radix4_f32(
-  const arm_cfft_radix4_instance_f32 * S,
-  float32_t * pSrc)
-{
-
-  if(S->ifftFlag == 1u)
-  {
-    /*  Complex IFFT radix-4  */
-    arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
-                                     S->twidCoefModifier, S->onebyfftLen);
-  }
-  else
-  {
-    /*  Complex FFT radix-4  */
-    arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
-                             S->twidCoefModifier);
-  }
-
-  if(S->bitReverseFlag == 1u)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
-
-}
-
-
-/**    
- * @} end of Radix4_CFFT_CIFFT group    
- */
-
-
-/* ----------------------------------------------------------------------    
-** Internal helper function used by the FFTs    
-** ------------------------------------------------------------------- */
-
-/*    
- * @brief  Core function for the floating-point CFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to the twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-void arm_radix4_butterfly_f32(
-  float32_t * pSrc,
-  uint16_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-
-  float32_t co1, co2, co3, si1, si2, si3;
-  uint32_t ia1, ia2, ia3;
-  uint32_t i0, i1, i2, i3;
-  uint32_t n1, n2, j, k;
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-  float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-    Ybminusd;
-  float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-  float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-  float32_t *ptr1;
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-  i0 = 0u;
-  ia1 = 0u;
-
-  j = n2;
-
-  /*  Calculation of first stage */
-  do
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    xaIn = pSrc[(2u * i0)];
-    yaIn = pSrc[(2u * i0) + 1u];
-
-    xcIn = pSrc[(2u * i2)];
-    ycIn = pSrc[(2u * i2) + 1u];
-
-    xbIn = pSrc[(2u * i1)];
-    ybIn = pSrc[(2u * i1) + 1u];
-
-    xdIn = pSrc[(2u * i3)];
-    ydIn = pSrc[(2u * i3) + 1u];
-
-    /* xa + xc */
-    Xaplusc = xaIn + xcIn;
-    /* xb + xd */
-    Xbplusd = xbIn + xdIn;
-    /* ya + yc */
-    Yaplusc = yaIn + ycIn;
-    /* yb + yd */
-    Ybplusd = ybIn + ydIn;
-
-    /*  index calculation for the coefficients */
-    ia2 = ia1 + ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xa - xc */
-    Xaminusc = xaIn - xcIn;
-    /* xb - xd */
-    Xbminusd = xbIn - xdIn;
-    /* ya - yc */
-    Yaminusc = yaIn - ycIn;
-    /* yb + yd */
-    Ybminusd = ybIn - ydIn;
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
-
-    /* (xa - xc) + (yb - yd) */
-    Xb12C_out = (Xaminusc + Ybminusd);
-    /* (ya - yc) + (xb - xd) */
-    Yb12C_out = (Yaminusc - Xbminusd);
-    /* (xa + xc) - (xb + xd) */
-    Xc12C_out = (Xaplusc - Xbplusd);
-    /* (ya + yc) - (yb + yd) */
-    Yc12C_out = (Yaplusc - Ybplusd);
-    /* (xa - xc) - (yb - yd) */
-    Xd12C_out = (Xaminusc - Ybminusd);
-    /* (ya - yc) + (xb - xd) */
-    Yd12C_out = (Xbminusd + Yaminusc);
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /*  index calculation for the coefficients */
-    ia3 = ia2 + ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    Xb12_out = Xb12C_out * co1;
-    Yb12_out = Yb12C_out * co1;
-    Xc12_out = Xc12C_out * co2;
-    Yc12_out = Yc12C_out * co2;
-    Xd12_out = Xd12C_out * co3;
-    Yd12_out = Yd12C_out * co3;
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    Xb12_out += Yb12C_out * si1;
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    Yb12_out -= Xb12C_out * si1;
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    Xc12_out += Yc12C_out * si2;
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    Yc12_out -= Xc12C_out * si2;
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    Xd12_out += Yd12C_out * si3;
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    Yd12_out -= Xd12C_out * si3;
-
-
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = Xc12_out;
-
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    pSrc[(2u * i1) + 1u] = Yc12_out;
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = Xb12_out;
-
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = Yb12_out;
-
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = Xd12_out;
-
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = Yd12_out;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  }
-  while(--j);
-
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        xaIn = pSrc[(2u * i0)];
-        yaIn = pSrc[(2u * i0) + 1u];
-
-        xbIn = pSrc[(2u * i1)];
-        ybIn = pSrc[(2u * i1) + 1u];
-
-        xcIn = pSrc[(2u * i2)];
-        ycIn = pSrc[(2u * i2) + 1u];
-
-        xdIn = pSrc[(2u * i3)];
-        ydIn = pSrc[(2u * i3) + 1u];
-
-        /* xa - xc */
-        Xaminusc = xaIn - xcIn;
-        /* (xb - xd) */
-        Xbminusd = xbIn - xdIn;
-        /* ya - yc */
-        Yaminusc = yaIn - ycIn;
-        /* (yb - yd) */
-        Ybminusd = ybIn - ydIn;
-
-        /* xa + xc */
-        Xaplusc = xaIn + xcIn;
-        /* xb + xd */
-        Xbplusd = xbIn + xdIn;
-        /* ya + yc */
-        Yaplusc = yaIn + ycIn;
-        /* yb + yd */
-        Ybplusd = ybIn + ydIn;
-
-        /* (xa - xc) + (yb - yd) */
-        Xb12C_out = (Xaminusc + Ybminusd);
-        /* (ya - yc) -  (xb - xd) */
-        Yb12C_out = (Yaminusc - Xbminusd);
-        /* xa + xc -(xb + xd) */
-        Xc12C_out = (Xaplusc - Xbplusd);
-        /* (ya + yc) - (yb + yd) */
-        Yc12C_out = (Yaplusc - Ybplusd);
-        /* (xa - xc) - (yb - yd) */
-        Xd12C_out = (Xaminusc - Ybminusd);
-        /* (ya - yc) +  (xb - xd) */
-        Yd12C_out = (Xbminusd + Yaminusc);
-
-        pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-        pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
-
-        Xb12_out = Xb12C_out * co1;
-        Yb12_out = Yb12C_out * co1;
-        Xc12_out = Xc12C_out * co2;
-        Yc12_out = Yc12C_out * co2;
-        Xd12_out = Xd12C_out * co3;
-        Yd12_out = Yd12C_out * co3;
-
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        Xb12_out += Yb12C_out * si1;
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        Yb12_out -= Xb12C_out * si1;
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        Xc12_out += Yc12C_out * si2;
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        Yc12_out -= Xc12C_out * si2;
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        Xd12_out += Yd12C_out * si3;
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        Yd12_out -= Xd12C_out * si3;
-
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = Xc12_out;
-
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = Yc12_out;
-
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = Xb12_out;
-
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = Yb12_out;
-
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = Xd12_out;
-
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = Yd12_out;
-
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
-
-  /*  Calculations of last stage */
-  do
-  {
-
-    xaIn = ptr1[0];
-    xcIn = ptr1[4];
-    yaIn = ptr1[1];
-    ycIn = ptr1[5];
-
-    /* xa + xc */
-    Xaplusc = xaIn + xcIn;
-
-    xbIn = ptr1[2];
-
-    /* xa - xc */
-    Xaminusc = xaIn - xcIn;
-
-    xdIn = ptr1[6];
-
-    /* ya + yc */
-    Yaplusc = yaIn + ycIn;
-
-    ybIn = ptr1[3];
-
-    /* ya - yc */
-    Yaminusc = yaIn - ycIn;
-
-    ydIn = ptr1[7];
-
-    /* xb + xd */
-    Xbplusd = xbIn + xdIn;
-
-    /* yb + yd */
-    Ybplusd = ybIn + ydIn;
-
-    /* xa' = xa + xb + xc + xd */
-    ptr1[0] = (Xaplusc + Xbplusd);
-
-    /* (xb-xd) */
-    Xbminusd = xbIn - xdIn;
-
-    /* ya' = ya + yb + yc + yd */
-    ptr1[1] = (Yaplusc + Ybplusd);
-
-    /* (yb-yd) */
-    Ybminusd = ybIn - ydIn;
-
-    /* xc' = (xa-xb+xc-xd) */
-    ptr1[2] = (Xaplusc - Xbplusd);
-    /* yc' = (ya-yb+yc-yd) */
-    ptr1[3] = (Yaplusc - Ybplusd);
-    /* xb' = (xa+yb-xc-yd) */
-    ptr1[4] = (Xaminusc + Ybminusd);
-    /* yb' = (ya-xb-yc+xd) */
-    ptr1[5] = (Yaminusc - Xbminusd);
-    /* xd' = (xa-yb-xc+yd)) */
-    ptr1[6] = (Xaminusc - Ybminusd);
-    /* yd' = (ya+xb-yc-xd) */
-    ptr1[7] = (Xbminusd + Yaminusc);
-
-    /* increment pointer by 8 */
-    ptr1 = ptr1 + 8u;
-
-  } while(--j);
-
-#else
-
-  float32_t t1, t2, r1, r2, s1, s2;
-
-  /* Run the below code for Cortex-M0 */
-
-  /*  Initializations for the fft calculation */
-  n2 = fftLen;
-  n1 = n2;
-  for (k = fftLen; k > 1u; k >>= 2u)
-  {
-    /*  Initializations for the fft calculation */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  FFT Calculation */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /* xa + xc */
-        r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
-
-        /* xa - xc */
-        r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
-
-        /* ya + yc */
-        s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-
-        /* ya - yc */
-        s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-        /* xb + xd */
-        t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2u * i0] = r1 + t1;
-
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-
-        /* yb + yd */
-        t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2u * i0) + 1u] = s1 + t2;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-
-        /* (xb - xd) */
-        t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
-
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
-
-        /* (xa - xc) + (yb - yd) */
-        r1 = r2 + t1;
-
-        /* (xa - xc) - (yb - yd) */
-        r2 = r2 - t1;
-
-        /* (ya - yc) -  (xb - xd) */
-        s1 = s2 - t2;
-
-        /* (ya - yc) +  (xb - xd) */
-        s2 = s2 + t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
-
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
-
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
-
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/*    
- * @brief  Core function for the floating-point CIFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @param[in]      onebyfftLen      value of 1/fftLen.   
- * @return none.   
- */
-
-void arm_radix4_butterfly_inverse_f32(
-  float32_t * pSrc,
-  uint16_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier,
-  float32_t onebyfftLen)
-{
-  float32_t co1, co2, co3, si1, si2, si3;
-  uint32_t ia1, ia2, ia3;
-  uint32_t i0, i1, i2, i3;
-  uint32_t n1, n2, j, k;
-
-#ifndef ARM_MATH_CM0
-
-  float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-  float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-    Ybminusd;
-  float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-  float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-  float32_t *ptr1;
-
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-  i0 = 0u;
-  ia1 = 0u;
-
-  j = n2;
-
-  /*  Calculation of first stage */
-  do
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Butterfly implementation */
-    xaIn = pSrc[(2u * i0)];
-    yaIn = pSrc[(2u * i0) + 1u];
-
-    xcIn = pSrc[(2u * i2)];
-    ycIn = pSrc[(2u * i2) + 1u];
-
-    xbIn = pSrc[(2u * i1)];
-    ybIn = pSrc[(2u * i1) + 1u];
-
-    xdIn = pSrc[(2u * i3)];
-    ydIn = pSrc[(2u * i3) + 1u];
-
-    /* xa + xc */
-    Xaplusc = xaIn + xcIn;
-    /* xb + xd */
-    Xbplusd = xbIn + xdIn;
-    /* ya + yc */
-    Yaplusc = yaIn + ycIn;
-    /* yb + yd */
-    Ybplusd = ybIn + ydIn;
-
-    /*  index calculation for the coefficients */
-    ia2 = ia1 + ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xa - xc */
-    Xaminusc = xaIn - xcIn;
-    /* xb - xd */
-    Xbminusd = xbIn - xdIn;
-    /* ya - yc */
-    Yaminusc = yaIn - ycIn;
-    /* yb - yd */
-    Ybminusd = ybIn - ydIn;
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
-
-    /* (xa - xc) - (yb - yd) */
-    Xb12C_out = (Xaminusc - Ybminusd);
-    /* (ya - yc) + (xb - xd) */
-    Yb12C_out = (Yaminusc + Xbminusd);
-    /* (xa + xc) - (xb + xd) */
-    Xc12C_out = (Xaplusc - Xbplusd);
-    /* (ya + yc) - (yb + yd) */
-    Yc12C_out = (Yaplusc - Ybplusd);
-    /* (xa - xc) + (yb - yd) */
-    Xd12C_out = (Xaminusc + Ybminusd);
-    /* (ya - yc) - (xb - xd) */
-    Yd12C_out = (Yaminusc - Xbminusd);
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /*  index calculation for the coefficients */
-    ia3 = ia2 + ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    Xb12_out = Xb12C_out * co1;
-    Yb12_out = Yb12C_out * co1;
-    Xc12_out = Xc12C_out * co2;
-    Yc12_out = Yc12C_out * co2;
-    Xd12_out = Xd12C_out * co3;
-    Yd12_out = Yd12C_out * co3;
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    Xb12_out -= Yb12C_out * si1;
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    Yb12_out += Xb12C_out * si1;
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    Xc12_out -= Yc12C_out * si2;
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    Yc12_out += Xc12C_out * si2;
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    Xd12_out -= Yd12C_out * si3;
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    Yd12_out += Xd12C_out * si3;
-
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = Xc12_out;
-
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    pSrc[(2u * i1) + 1u] = Yc12_out;
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = Xb12_out;
-
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = Yb12_out;
-
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = Xd12_out;
-
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = Yd12_out;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        xaIn = pSrc[(2u * i0)];
-        yaIn = pSrc[(2u * i0) + 1u];
-
-        xbIn = pSrc[(2u * i1)];
-        ybIn = pSrc[(2u * i1) + 1u];
-
-        xcIn = pSrc[(2u * i2)];
-        ycIn = pSrc[(2u * i2) + 1u];
-
-        xdIn = pSrc[(2u * i3)];
-        ydIn = pSrc[(2u * i3) + 1u];
-
-        /* xa - xc */
-        Xaminusc = xaIn - xcIn;
-        /* (xb - xd) */
-        Xbminusd = xbIn - xdIn;
-        /* ya - yc */
-        Yaminusc = yaIn - ycIn;
-        /* (yb - yd) */
-        Ybminusd = ybIn - ydIn;
-
-        /* xa + xc */
-        Xaplusc = xaIn + xcIn;
-        /* xb + xd */
-        Xbplusd = xbIn + xdIn;
-        /* ya + yc */
-        Yaplusc = yaIn + ycIn;
-        /* yb + yd */
-        Ybplusd = ybIn + ydIn;
-
-        /* (xa - xc) - (yb - yd) */
-        Xb12C_out = (Xaminusc - Ybminusd);
-        /* (ya - yc) +  (xb - xd) */
-        Yb12C_out = (Yaminusc + Xbminusd);
-        /* xa + xc -(xb + xd) */
-        Xc12C_out = (Xaplusc - Xbplusd);
-        /* (ya + yc) - (yb + yd) */
-        Yc12C_out = (Yaplusc - Ybplusd);
-        /* (xa - xc) + (yb - yd) */
-        Xd12C_out = (Xaminusc + Ybminusd);
-        /* (ya - yc) -  (xb - xd) */
-        Yd12C_out = (Yaminusc - Xbminusd);
-
-        pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-        pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
-
-        Xb12_out = Xb12C_out * co1;
-        Yb12_out = Yb12C_out * co1;
-        Xc12_out = Xc12C_out * co2;
-        Yc12_out = Yc12C_out * co2;
-        Xd12_out = Xd12C_out * co3;
-        Yd12_out = Yd12C_out * co3;
-
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        Xb12_out -= Yb12C_out * si1;
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        Yb12_out += Xb12C_out * si1;
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        Xc12_out -= Yc12C_out * si2;
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        Yc12_out += Xc12C_out * si2;
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        Xd12_out -= Yd12C_out * si3;
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        Yd12_out += Xd12C_out * si3;
-
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = Xc12_out;
-
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = Yc12_out;
-
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = Xb12_out;
-
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = Yb12_out;
-
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = Xd12_out;
-
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = Yd12_out;
-
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-  /*  Initializations of last stage */
-
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
-
-  /*  Calculations of last stage */
-  do
-  {
-
-    xaIn = ptr1[0];
-    xcIn = ptr1[4];
-    yaIn = ptr1[1];
-    ycIn = ptr1[5];
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    Xaplusc = xaIn + xcIn;
-
-    xbIn = ptr1[2];
-
-    /* xa - xc */
-    Xaminusc = xaIn - xcIn;
-
-    xdIn = ptr1[6];
-
-    /* ya + yc */
-    Yaplusc = yaIn + ycIn;
-
-    ybIn = ptr1[3];
-
-    /* ya - yc */
-    Yaminusc = yaIn - ycIn;
-
-    ydIn = ptr1[7];
-
-    /* xc + xd */
-    Xbplusd = xbIn + xdIn;
-
-    /* yb + yd */
-    Ybplusd = ybIn + ydIn;
-
-    /* xa' = xa + xb + xc + xd */
-    ptr1[0] = (Xaplusc + Xbplusd) * onebyfftLen;
-
-    /* (xb-xd) */
-    Xbminusd = xbIn - xdIn;
-
-    /* ya' = ya + yb + yc + yd */
-    ptr1[1] = (Yaplusc + Ybplusd) * onebyfftLen;
-
-    /* (yb-yd) */
-    Ybminusd = ybIn - ydIn;
-
-    /* xc' = (xa-xb+xc-xd) * onebyfftLen */
-    ptr1[2] = (Xaplusc - Xbplusd) * onebyfftLen;
-
-    /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
-    ptr1[3] = (Yaplusc - Ybplusd) * onebyfftLen;
-
-    /* xb' = (xa-yb-xc+yd) * onebyfftLen */
-    ptr1[4] = (Xaminusc - Ybminusd) * onebyfftLen;
-
-    /* yb' = (ya+xb-yc-xd) * onebyfftLen */
-    ptr1[5] = (Yaminusc + Xbminusd) * onebyfftLen;
-
-    /* xd' = (xa-yb-xc+yd) * onebyfftLen */
-    ptr1[6] = (Xaminusc + Ybminusd) * onebyfftLen;
-
-    /* yd' = (ya-xb-yc+xd) * onebyfftLen */
-    ptr1[7] = (Yaminusc - Xbminusd) * onebyfftLen;
-
-    /* increment source pointer by 8 for next calculations */
-    ptr1 = ptr1 + 8u;
-
-  } while(--j);
-
-#else
-
-  float32_t t1, t2, r1, r2, s1, s2;
-
-  /* Run the below code for Cortex-M0 */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /*  Calculation of first stage */
-  for (k = fftLen; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /* xa + xc */
-        r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
-
-        /* xa - xc */
-        r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
-
-        /* ya + yc */
-        s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-
-        /* ya - yc */
-        s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-        /* xb + xd */
-        t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2u * i0] = r1 + t1;
-
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-
-        /* yb + yd */
-        t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2u * i0) + 1u] = s1 + t2;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-
-        /* (xb - xd) */
-        t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
-
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
-
-        /* (xa - xc) - (yb - yd) */
-        r1 = r2 - t1;
-
-        /* (xa - xc) + (yb - yd) */
-        r2 = r2 + t1;
-
-        /* (ya - yc) +  (xb - xd) */
-        s1 = s2 + t2;
-
-        /* (ya - yc) -  (xb - xd) */
-        s2 = s2 - t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
-
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
-
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
-
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-  /*  Initializations of last stage */
-  n1 = n2;
-  n2 >>= 2u;
-
-  /*  Calculations of last stage */
-  for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = pSrc[2u * i0] + pSrc[2u * i2];
-
-    /* xa - xc */
-    r2 = pSrc[2u * i0] - pSrc[2u * i2];
-
-    /* ya + yc */
-    s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-
-    /* ya - yc */
-    s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-    /* xc + xd */
-    t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[2u * i0] = (r1 + t1) * onebyfftLen;
-
-    /* (xa + xb) - (xc + xd) */
-    r1 = r1 - t1;
-
-    /* yb + yd */
-    t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = (s1 + t2) * onebyfftLen;
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* (yb-yd) */
-    t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-
-    /* (xb-xd) */
-    t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = r1 * onebyfftLen;
-
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    pSrc[(2u * i1) + 1u] = s1 * onebyfftLen;
-
-
-    /* (xa - xc) - (yb-yd) */
-    r1 = r2 - t1;
-
-    /* (xa - xc) + (yb-yd) */
-    r2 = r2 + t1;
-
-    /* (ya - yc) + (xb-xd) */
-    s1 = s2 + t2;
-
-    /* (ya - yc) - (xb-xd) */
-    s2 = s2 - t2;
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = r1 * onebyfftLen;
-
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = s1 * onebyfftLen;
-
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = r2 * onebyfftLen;
-
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = s2 * onebyfftLen;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
deleted file mode 100644
index 11cf66ff8b..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_init_f32.c    
-*    
-* Description:	Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup Radix4_CFFT_CIFFT    
- * @{    
- */
-
-/**    
-* @brief  Initialization function for the floating-point CFFT/CIFFT.   
-* @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.   
-*    
-* \par Description:   
-* \par    
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated   
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
-* \par    
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
-* \par    
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
-*/
-
-arm_status arm_cfft_radix4_init_f32(
-  arm_cfft_radix4_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (float32_t *) twiddleCoef;
-
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.000244140625;
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.0009765625f;
-    break;
-
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    S->onebyfftLen = 0.00390625f;
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    S->onebyfftLen = 0.015625f;
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    S->onebyfftLen = 0.0625f;
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of Radix4_CFFT_CIFFT group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
deleted file mode 100644
index dd637a3612..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_init_q15.c    
-*    
-* Description:	Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-
-/**    
- * @addtogroup Radix4_CFFT_CIFFT    
- * @{    
- */
-
-
-/**    
-* @brief Initialization function for the Q15 CFFT/CIFFT.   
-* @param[in,out] *S             points to an instance of the Q15 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.   
-*    
-* \par Description:   
-* \par    
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated   
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
-* \par    
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
-* \par    
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
-*/
-
-arm_status arm_cfft_radix4_init_q15(
-  arm_cfft_radix4_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q15_t *) twiddleCoefQ15;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-    S->twidCoefModifier = 4u;
-    S->bitRevFactor = 4u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of Radix4_CFFT_CIFFT group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
deleted file mode 100644
index 66f06e6342..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_init_q31.c    
-*    
-* Description:	Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup Radix4_CFFT_CIFFT    
- * @{    
- */
-
-/**    
-*    
-* @brief  Initialization function for the Q31 CFFT/CIFFT.   
-* @param[in,out] *S             points to an instance of the Q31 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.   
-*    
-* \par Description:   
-* \par    
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated   
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
-* \par    
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
-* \par    
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
-*/
-
-arm_status arm_cfft_radix4_init_q31(
-  arm_cfft_radix4_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q31_t *) twiddleCoefQ31;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of Instance structure depending on the FFT length */
-  switch (S->fftLen)
-  {
-    /*  Initializations of structure parameters for 4096 point FFT */
-  case 4096u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    break;
-
-    /*  Initializations of structure parameters for 1024 point FFT */
-  case 1024u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of Radix4_CFFT_CIFFT group    
- */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c
deleted file mode 100644
index 023e2f7abc..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c
+++ /dev/null
@@ -1,1896 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_q15.c    
-*    
-* Description:	This file has function definition of Radix-4 FFT & IFFT function and    
-*				In-place bit reversal using bit reversal table    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup Radix4_CFFT_CIFFT    
- * @{    
- */
-
-
-/**    
- * @details    
- * @brief Processing function for the Q15 CFFT/CIFFT.   
- * @param[in]      *S    points to an instance of the Q15 CFFT/CIFFT structure.   
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.   
- * @return none.   
- *     
- * \par Input and output formats:    
- * \par    
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.   
- * Hence the output format is different for different FFT sizes.    
- * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:   
- * \par   
- * \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT"    
- * \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT"    
- */
-
-void arm_cfft_radix4_q15(
-  const arm_cfft_radix4_instance_q15 * S,
-  q15_t * pSrc)
-{
-  if(S->ifftFlag == 1u)
-  {
-    /*  Complex IFFT radix-4  */
-    arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle,
-                                     S->twidCoefModifier);
-  }
-  else
-  {
-    /*  Complex FFT radix-4  */
-    arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle,
-                             S->twidCoefModifier);
-  }
-
-  if(S->bitReverseFlag == 1u)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
-
-}
-
-/**    
- * @} end of Radix4_CFFT_CIFFT group    
- */
-
-/*    
-* Radix-4 FFT algorithm used is :    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 FFT:    
-* Wn = co1 + j * (- si1)    
-* W2n = co2 + j * (- si2)    
-* W3n = co3 + j * (- si3)    
-    
-* The real and imaginary output values for the radix-4 butterfly are    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
-* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
-*    
-*/
-
-/**    
- * @brief  Core function for the Q15 CFFT butterfly process.   
- * @param[in, out] *pSrc16          points to the in-place buffer of Q15 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef16         points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-void arm_radix4_butterfly_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier)
-{
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t R, S, T, U;
-  q31_t C1, C2, C3, out1, out2;
-  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
-  q15_t in;
-
-  q15_t *ptr1;
-
-
-
-  q31_t xaya, xbyb, xcyc, xdyd;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  /* Index for twiddle coefficient */
-  ic = 0u;
-
-  /* Index for input read and output write */
-  i0 = 0u;
-  j = n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T = _SIMD32_OFFSET(pSrc16 + (2u * i0));
-    in = ((int16_t) (T & 0xFFFF)) >> 2;
-    T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* Read yc (real), xc(imag) input */
-    S = _SIMD32_OFFSET(pSrc16 + (2u * i2));
-    in = ((int16_t) (S & 0xFFFF)) >> 2;
-    S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* R = packed((ya + yc), (xa + xc) ) */
-    R = __QADD16(T, S);
-
-    /* S = packed((ya - yc), (xa - xc) ) */
-    S = __QSUB16(T, S);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T = _SIMD32_OFFSET(pSrc16 + (2u * i1));
-    in = ((int16_t) (T & 0xFFFF)) >> 2;
-    T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* Read yd (real), xd(imag) input */
-    U = _SIMD32_OFFSET(pSrc16 + (2u * i3));
-    in = ((int16_t) (U & 0xFFFF)) >> 2;
-    U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* T = packed((yb + yd), (xb + xd) ) */
-    T = __QADD16(T, U);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    _SIMD32_OFFSET(pSrc16 + (2u * i0)) = __SHADD16(R, T);
-
-    /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
-    R = __QSUB16(R, T);
-
-    /* co2 & si2 are read from SIMD Coefficient pointer */
-    C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = __SMUAD(C2, R) >> 16u;
-    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out2 = __SMUSDX(C2, R);
-
-#else
-
-    /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out1 = __SMUSDX(R, C2) >> 16u;
-    /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out2 = __SMUAD(C2, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /*  Reading i0+fftLen/4 */
-    /* T = packed(yb, xb) */
-    T = _SIMD32_OFFSET(pSrc16 + (2u * i1));
-    in = ((int16_t) (T & 0xFFFF)) >> 2;
-    T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    _SIMD32_OFFSET(pSrc16 + (2u * i1)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    /*  Butterfly calculations */
-    /* U = packed(yd, xd) */
-    U = _SIMD32_OFFSET(pSrc16 + (2u * i3));
-    in = ((int16_t) (U & 0xFFFF)) >> 2;
-    U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* T = packed(yb-yd, xb-xd) */
-    T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QASX(S, T);
-    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-    S = __QSAX(S, T);
-
-#else
-
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QSAX(S, T);
-    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-    S = __QASX(S, T);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* co1 & si1 are read from SIMD Coefficient pointer */
-    C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
-    /*  Butterfly process for the i0+fftLen/2 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = __SMUAD(C1, S) >> 16u;
-    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out2 = __SMUSDX(C1, S);
-
-#else
-
-    /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out1 = __SMUSDX(S, C1) >> 16u;
-    /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out2 = __SMUAD(C1, S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* writing output(xb', yb') in little endian format */
-    _SIMD32_OFFSET(pSrc16 + (2u * i2)) =
-      ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
-
-
-    /* co3 & si3 are read from SIMD Coefficient pointer */
-    C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = __SMUAD(C3, R) >> 16u;
-    /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out2 = __SMUSDX(C3, R);
-
-#else
-
-    /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out1 = __SMUSDX(R, C3) >> 16u;
-    /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out2 = __SMUAD(C3, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* writing output(xd', yd') in little endian format */
-    _SIMD32_OFFSET(pSrc16 + (2u * i3)) =
-      ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-  /* data is in 4.11(q11) format */
-
-  /* end of first stage process */
-
-
-  /* start of middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
-
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
-      C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
-      C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T = _SIMD32_OFFSET(pSrc16 + (2u * i0));
-
-        /* Read yc (real), xc(imag) input */
-        S = _SIMD32_OFFSET(pSrc16 + (2u * i2));
-
-        /* R = packed( (ya + yc), (xa + xc)) */
-        R = __QADD16(T, S);
-
-        /* S = packed((ya - yc), (xa - xc)) */
-        S = __QSUB16(T, S);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSrc16 + (2u * i1));
-
-        /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSrc16 + (2u * i3));
-
-        /* T = packed( (yb + yd), (xb + xd)) */
-        T = __QADD16(T, U);
-
-        /*  writing the butterfly processed i0 sample */
-
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        out1 = __SHADD16(R, T);
-        in = ((int16_t) (out1 & 0xFFFF)) >> 1;
-        out1 = ((out1 >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-        _SIMD32_OFFSET(pSrc16 + (2u * i0)) = out1;
-
-        /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
-        R = __SHSUB16(R, T);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = __SMUAD(C2, R) >> 16u;
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out2 = __SMUSDX(C2, R);
-
-#else
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out1 = __SMUSDX(R, C2) >> 16u;
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out2 = __SMUAD(C2, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSrc16 + (2u * i1));
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        _SIMD32_OFFSET(pSrc16 + (2u * i1)) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-        /*  Butterfly calculations */
-
-        /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSrc16 + (2u * i3));
-
-        /* T = packed(yb-yd, xb-xd) */
-        T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHASX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHSAX(S, T);
-
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUAD(C1, S) >> 16u;
-        out2 = __SMUSDX(C1, S);
-
-#else
-
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHSAX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHASX(S, T);
-
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUSDX(S, C1) >> 16u;
-        out2 = __SMUAD(C1, S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        _SIMD32_OFFSET(pSrc16 + (2u * i2)) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(C3, R) >> 16u;
-        out2 = __SMUSDX(C3, R);
-
-#else
-
-        out1 = __SMUSDX(R, C3) >> 16u;
-        out2 = __SMUAD(C3, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-        /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-        _SIMD32_OFFSET(pSrc16 + (2u * i3)) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
-  }
-  /* end of middle stage process */
-
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point */
-  /* data is in 6.10(q10) format for the 64 point */
-  /* data is in 4.12(q12) format for the 16 point */
-
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-
-  ptr1 = &pSrc16[0];
-
-  /* start of last stage process */
-
-  /*  Butterfly implementation */
-  do
-  {
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD32(ptr1)++;
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD32(ptr1)++;
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD32(ptr1)++;
-
-    /* Read xd (real), yd(imag) input */
-    xdyd = *__SIMD32(ptr1)++;
-
-    /* R = packed((ya + yc), (xa + xc)) */
-    R = __QADD16(xaya, xcyc);
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
-
-
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    *__SIMD32(ptr1)++ = __SHADD16(R, T);
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    *__SIMD32(ptr1)++ = __SHSUB16(R, T);
-
-    /* S = packed((ya - yc), (xa - xc)) */
-    S = __QSUB16(xaya, xcyc);
-
-    /* Read yd (real), xd(imag) input */
-    /* T = packed( (yb - yd), (xb - xd))  */
-    U = __QSUB16(xbyb, xdyd);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-#else
-
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-  } while(--j);
-
-  /* end of last stage process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t R0, R1, S0, S1, T0, T1, U0, U1;
-  q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
-  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  /* Index for twiddle coefficient */
-  ic = 0u;
-
-  /* Index for input read and output write */
-  i0 = 0u;
-  j = n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-
-    /* input is down scale by 4 to avoid overflow */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u] >> 2u;
-    T1 = pSrc16[(i0 * 2u) + 1u] >> 2u;
-
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u] >> 2u;
-    S1 = pSrc16[(i2 * 2u) + 1u] >> 2u;
-
-    /* R0 = (ya + yc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    /* R1 = (xa + xc) */
-    R1 = __SSAT(T1 + S1, 16u);
-
-    /* S0 = (ya - yc) */
-    S0 = __SSAT(T0 - S0, 16);
-    /* S1 = (xa - xc) */
-    S1 = __SSAT(T1 - S1, 16);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u] >> 2u;
-    T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
-
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u] >> 2u;
-    U1 = pSrc16[(i3 * 2u) + 1] >> 2u;
-
-    /* T0 = (yb + yd) */
-    T0 = __SSAT(T0 + U0, 16u);
-    /* T1 = (xb + xd) */
-    T1 = __SSAT(T1 + U1, 16u);
-
-    /*  writing the butterfly processed i0 sample */
-    /* ya' = ya + yb + yc + yd */
-    /* xa' = xa + xb + xc + xd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
-
-    /* R0 = (ya + yc) - (yb + yd) */
-    /* R1 = (xa + xc) - (xb + xd) */
-    R0 = __SSAT(R0 - T0, 16u);
-    R1 = __SSAT(R1 - T1, 16u);
-
-    /* co2 & si2 are read from Coefficient pointer */
-    Co2 = pCoef16[2u * ic * 2u];
-    Si2 = pCoef16[(2u * ic * 2u) + 1];
-
-    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = (short) ((Co2 * R0 + Si2 * R1) >> 16u);
-    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out2 = (short) ((-Si2 * R0 + Co2 * R1) >> 16u);
-
-    /*  Reading i0+fftLen/4 */
-    /* input is down scale by 4 to avoid overflow */
-    /* T0 = yb, T1 =  xb */
-    T0 = pSrc16[i1 * 2u] >> 2;
-    T1 = pSrc16[(i1 * 2u) + 1] >> 2;
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    pSrc16[i1 * 2u] = out1;
-    pSrc16[(i1 * 2u) + 1] = out2;
-
-    /*  Butterfly calculations */
-    /* input is down scale by 4 to avoid overflow */
-    /* U0 = yd, U1 = xd */
-    U0 = pSrc16[i3 * 2u] >> 2;
-    U1 = pSrc16[(i3 * 2u) + 1] >> 2;
-    /* T0 = yb-yd */
-    T0 = __SSAT(T0 - U0, 16);
-    /* T1 = xb-xd */
-    T1 = __SSAT(T1 - U1, 16);
-
-    /* R1 = (ya-yc) + (xb- xd),  R0 = (xa-xc) - (yb-yd)) */
-    R0 = (short) __SSAT((q31_t) (S0 - T1), 16);
-    R1 = (short) __SSAT((q31_t) (S1 + T0), 16);
-
-    /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */
-    S0 = (short) __SSAT(((q31_t) S0 + T1), 16u);
-    S1 = (short) __SSAT(((q31_t) S1 - T0), 16u);
-
-    /* co1 & si1 are read from Coefficient pointer */
-    Co1 = pCoef16[ic * 2u];
-    Si1 = pCoef16[(ic * 2u) + 1];
-    /*  Butterfly process for the i0+fftLen/2 sample */
-    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = (short) ((Si1 * S1 + Co1 * S0) >> 16);
-    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out2 = (short) ((-Si1 * S0 + Co1 * S1) >> 16);
-
-    /* writing output(xb', yb') in little endian format */
-    pSrc16[i2 * 2u] = out1;
-    pSrc16[(i2 * 2u) + 1] = out2;
-
-    /* Co3 & si3 are read from Coefficient pointer */
-    Co3 = pCoef16[3u * (ic * 2u)];
-    Si3 = pCoef16[(3u * (ic * 2u)) + 1];
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-    /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = (short) ((Si3 * R1 + Co3 * R0) >> 16u);
-    /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
-    out2 = (short) ((-Si3 * R0 + Co3 * R1) >> 16u);
-    /* writing output(xd', yd') in little endian format */
-    pSrc16[i3 * 2u] = out1;
-    pSrc16[(i3 * 2u) + 1] = out2;
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-  /* data is in 4.11(q11) format */
-
-  /* end of first stage process */
-
-
-  /* start of middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
-
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      Co1 = pCoef16[ic * 2u];
-      Si1 = pCoef16[(ic * 2u) + 1u];
-      Co2 = pCoef16[2u * (ic * 2u)];
-      Si2 = pCoef16[(2u * (ic * 2u)) + 1u];
-      Co3 = pCoef16[3u * (ic * 2u)];
-      Si3 = pCoef16[(3u * (ic * 2u)) + 1u];
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T0 = pSrc16[i0 * 2u];
-        T1 = pSrc16[(i0 * 2u) + 1u];
-
-        /* Read yc (real), xc(imag) input */
-        S0 = pSrc16[i2 * 2u];
-        S1 = pSrc16[(i2 * 2u) + 1u];
-
-        /* R0 = (ya + yc), R1 = (xa + xc) */
-        R0 = __SSAT(T0 + S0, 16);
-        R1 = __SSAT(T1 + S1, 16);
-
-        /* S0 = (ya - yc), S1 =(xa - xc) */
-        S0 = __SSAT(T0 - S0, 16);
-        S1 = __SSAT(T1 - S1, 16);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
-
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
-
-
-        /* T0 = (yb + yd), T1 = (xb + xd) */
-        T0 = __SSAT(T0 + U0, 16);
-        T1 = __SSAT(T1 + U1, 16);
-
-        /*  writing the butterfly processed i0 sample */
-
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        out1 = ((R0 >> 1u) + (T0 >> 1u)) >> 1u;
-        out2 = ((R1 >> 1u) + (T1 >> 1u)) >> 1u;
-
-        pSrc16[i0 * 2u] = out1;
-        pSrc16[(2u * i0) + 1u] = out2;
-
-        /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-        R0 = (R0 >> 1u) - (T0 >> 1u);
-        R1 = (R1 >> 1u) - (T1 >> 1u);
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = (short) ((Co2 * R0 + Si2 * R1) >> 16u);
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out2 = (short) ((-Si2 * R0 + Co2 * R1) >> 16u);
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        pSrc16[i1 * 2u] = out1;
-        pSrc16[(i1 * 2u) + 1u] = out2;
-
-        /*  Butterfly calculations */
-
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
-
-        /* T0 = yb-yd, T1 = xb-xd */
-        T0 = __SSAT(T0 - U0, 16);
-        T1 = __SSAT(T1 - U1, 16);
-
-        /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */
-        R0 = (S0 >> 1u) - (T1 >> 1u);
-        R1 = (S1 >> 1u) + (T0 >> 1u);
-
-        /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */
-        S0 = (S0 >> 1u) + (T1 >> 1u);
-        S1 = (S1 >> 1u) - (T0 >> 1u);
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = (short) ((Co1 * S0 + Si1 * S1) >> 16u);
-
-        out2 = (short) ((-Si1 * S0 + Co1 * S1) >> 16u);
-
-        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        pSrc16[i2 * 2u] = out1;
-        pSrc16[(i2 * 2u) + 1u] = out2;
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-        out1 = (short) ((Si3 * R1 + Co3 * R0) >> 16u);
-
-        out2 = (short) ((-Si3 * R0 + Co3 * R1) >> 16u);
-        /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
-        /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
-        pSrc16[i3 * 2u] = out1;
-        pSrc16[(i3 * 2u) + 1u] = out2;
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
-  }
-  /* end of middle stage process */
-
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point */
-  /* data is in 6.10(q10) format for the 64 point */
-  /* data is in 4.12(q12) format for the 16 point */
-
-  /*  Initializations for the last stage */
-  n1 = n2;
-  n2 >>= 2u;
-
-  /* start of last stage process */
-
-  /*  Butterfly implementation */
-  for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u];
-    T1 = pSrc16[(i0 * 2u) + 1u];
-
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u];
-    S1 = pSrc16[(i2 * 2u) + 1u];
-
-    /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    R1 = __SSAT(T1 + S1, 16u);
-
-    /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16u);
-    S1 = __SSAT(T1 - S1, 16u);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
-
-    /* T0 = (yb + yd), T1 = (xb + xd)) */
-    T0 = __SSAT(T0 + U0, 16u);
-    T1 = __SSAT(T1 + U1, 16u);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
-
-    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-    R0 = (R0 >> 1u) - (T0 >> 1u);
-    R1 = (R1 >> 1u) - (T1 >> 1u);
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
-
-    /*  writing the butterfly processed i0 + fftLen/4 sample */
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    pSrc16[i1 * 2u] = R0;
-    pSrc16[(i1 * 2u) + 1u] = R1;
-
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
-    /* T0 = (yb - yd), T1 = (xb - xd)  */
-    T0 = __SSAT(T0 - U0, 16u);
-    T1 = __SSAT(T1 - U1, 16u);
-
-    /*  writing the butterfly processed i0 + fftLen/2 sample */
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    pSrc16[i2 * 2u] = (S0 >> 1u) + (T1 >> 1u);
-    pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u);
-
-    /*  writing the butterfly processed i0 + 3fftLen/4 sample */
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    pSrc16[i3 * 2u] = (S0 >> 1u) - (T1 >> 1u);
-    pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u);
-
-  }
-
-  /* end of last stage process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-
-/**    
- * @brief  Core function for the Q15 CIFFT butterfly process.   
- * @param[in, out] *pSrc16          points to the in-place buffer of Q15 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef16         points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-/*    
-* Radix-4 IFFT algorithm used is :    
-*    
-* CIFFT uses same twiddle coefficients as CFFT function    
-*  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]    
-*    
-*    
-* IFFT is implemented with following changes in equations from FFT    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 IFFT:    
-* Wn = co1 + j * (si1)    
-* W2n = co2 + j * (si2)    
-* W3n = co3 + j * (si3)    
-    
-* The real and imaginary output values for the radix-4 butterfly are    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)    
-* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)    
-* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)    
-* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)    
-*    
-*/
-
-void arm_radix4_butterfly_inverse_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier)
-{
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t R, S, T, U;
-  q31_t C1, C2, C3, out1, out2;
-  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
-  q15_t in;
-
-  q15_t *ptr1;
-
-
-
-  q31_t xaya, xbyb, xcyc, xdyd;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  /* Index for twiddle coefficient */
-  ic = 0u;
-
-  /* Index for input read and output write */
-  i0 = 0u;
-  j = n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T = _SIMD32_OFFSET(pSrc16 + (2u * i0));
-    in = ((int16_t) (T & 0xFFFF)) >> 2;
-    T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* Read yc (real), xc(imag) input */
-    S = _SIMD32_OFFSET(pSrc16 + (2u * i2));
-    in = ((int16_t) (S & 0xFFFF)) >> 2;
-    S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* R = packed((ya + yc), (xa + xc) ) */
-    R = __QADD16(T, S);
-
-    /* S = packed((ya - yc), (xa - xc) ) */
-    S = __QSUB16(T, S);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T = _SIMD32_OFFSET(pSrc16 + (2u * i1));
-    in = ((int16_t) (T & 0xFFFF)) >> 2;
-    T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* Read yd (real), xd(imag) input */
-    U = _SIMD32_OFFSET(pSrc16 + (2u * i3));
-    in = ((int16_t) (U & 0xFFFF)) >> 2;
-    U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* T = packed((yb + yd), (xb + xd) ) */
-    T = __QADD16(T, U);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    _SIMD32_OFFSET(pSrc16 + (2u * i0)) = __SHADD16(R, T);
-
-    /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
-    R = __QSUB16(R, T);
-
-    /* co2 & si2 are read from SIMD Coefficient pointer */
-    C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = __SMUSD(C2, R) >> 16u;
-    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out2 = __SMUADX(C2, R);
-
-#else
-
-    /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out1 = __SMUADX(C2, R) >> 16u;
-    /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out2 = __SMUSD(__QSUB16(0, C2), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /*  Reading i0+fftLen/4 */
-    /* T = packed(yb, xb) */
-    T = _SIMD32_OFFSET(pSrc16 + (2u * i1));
-    in = ((int16_t) (T & 0xFFFF)) >> 2;
-    T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    _SIMD32_OFFSET(pSrc16 + (2u * i1)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    /*  Butterfly calculations */
-    /* U = packed(yd, xd) */
-    U = _SIMD32_OFFSET(pSrc16 + (2u * i3));
-    in = ((int16_t) (U & 0xFFFF)) >> 2;
-    U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* T = packed(yb-yd, xb-xd) */
-    T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QSAX(S, T);
-    /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
-    S = __QASX(S, T);
-
-#else
-
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QASX(S, T);
-    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-    S = __QSAX(S, T);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* co1 & si1 are read from SIMD Coefficient pointer */
-    C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
-    /*  Butterfly process for the i0+fftLen/2 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = __SMUSD(C1, S) >> 16u;
-    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out2 = __SMUADX(C1, S);
-
-#else
-
-    /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out1 = __SMUADX(C1, S) >> 16u;
-    /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out2 = __SMUSD(__QSUB16(0, C1), S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* writing output(xb', yb') in little endian format */
-    _SIMD32_OFFSET(pSrc16 + (2u * i2)) =
-      ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
-
-
-    /* co3 & si3 are read from SIMD Coefficient pointer */
-    C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = __SMUSD(C3, R) >> 16u;
-    /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out2 = __SMUADX(C3, R);
-
-#else
-
-    /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out1 = __SMUADX(C3, R) >> 16u;
-    /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out2 = __SMUSD(__QSUB16(0, C3), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* writing output(xd', yd') in little endian format */
-    _SIMD32_OFFSET(pSrc16 + (2u * i3)) =
-      ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-  /* data is in 4.11(q11) format */
-
-  /* end of first stage process */
-
-
-  /* start of middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
-
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
-      C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
-      C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T = _SIMD32_OFFSET(pSrc16 + (2u * i0));
-
-        /* Read yc (real), xc(imag) input */
-        S = _SIMD32_OFFSET(pSrc16 + (2u * i2));
-
-        /* R = packed( (ya + yc), (xa + xc)) */
-        R = __QADD16(T, S);
-
-        /* S = packed((ya - yc), (xa - xc)) */
-        S = __QSUB16(T, S);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSrc16 + (2u * i1));
-
-        /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSrc16 + (2u * i3));
-
-        /* T = packed( (yb + yd), (xb + xd)) */
-        T = __QADD16(T, U);
-
-        /*  writing the butterfly processed i0 sample */
-
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        out1 = __SHADD16(R, T);
-        in = ((int16_t) (out1 & 0xFFFF)) >> 1;
-        out1 = ((out1 >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-        _SIMD32_OFFSET(pSrc16 + (2u * i0)) = out1;
-
-        /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
-        R = __SHSUB16(R, T);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = __SMUSD(C2, R) >> 16u;
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out2 = __SMUADX(C2, R);
-
-#else
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out1 = __SMUADX(R, C2) >> 16u;
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out2 = __SMUSD(__QSUB16(0, C2), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSrc16 + (2u * i1));
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        _SIMD32_OFFSET(pSrc16 + (2u * i1)) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-        /*  Butterfly calculations */
-
-        /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSrc16 + (2u * i3));
-
-        /* T = packed(yb-yd, xb-xd) */
-        T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHSAX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHASX(S, T);
-
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUSD(C1, S) >> 16u;
-        out2 = __SMUADX(C1, S);
-
-#else
-
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHASX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHSAX(S, T);
-
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUADX(S, C1) >> 16u;
-        out2 = __SMUSD(__QSUB16(0, C1), S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        _SIMD32_OFFSET(pSrc16 + (2u * i2)) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(C3, R) >> 16u;
-        out2 = __SMUADX(C3, R);
-
-#else
-
-        out1 = __SMUADX(C3, R) >> 16u;
-        out2 = __SMUSD(__QSUB16(0, C3), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-        /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-        _SIMD32_OFFSET(pSrc16 + (2u * i3)) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
-  }
-  /* end of middle stage process */
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point */
-  /* data is in 6.10(q10) format for the 64 point */
-  /* data is in 4.12(q12) format for the 16 point */
-
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-
-  ptr1 = &pSrc16[0];
-
-  /* start of last stage process */
-
-  /*  Butterfly implementation */
-  do
-  {
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD32(ptr1)++;
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD32(ptr1)++;
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD32(ptr1)++;
-
-    /* Read xd (real), yd(imag) input */
-    xdyd = *__SIMD32(ptr1)++;
-
-    /* R = packed((ya + yc), (xa + xc)) */
-    R = __QADD16(xaya, xcyc);
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
-
-
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    *__SIMD32(ptr1)++ = __SHADD16(R, T);
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    *__SIMD32(ptr1)++ = __SHSUB16(R, T);
-
-    /* S = packed((ya - yc), (xa - xc)) */
-    S = __QSUB16(xaya, xcyc);
-
-    /* Read yd (real), xd(imag) input */
-    /* T = packed( (yb - yd), (xb - xd))  */
-    U = __QSUB16(xbyb, xdyd);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-#else
-
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-  } while(--j);
-
-  /* end of last stage  process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t R0, R1, S0, S1, T0, T1, U0, U1;
-  q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
-  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  /* Index for twiddle coefficient */
-  ic = 0u;
-
-  /* Index for input read and output write */
-  i0 = 0u;
-
-  j = n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  Start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* input is down scale by 4 to avoid overflow */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u] >> 2u;
-    T1 = pSrc16[(i0 * 2u) + 1u] >> 2u;
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u] >> 2u;
-    S1 = pSrc16[(i2 * 2u) + 1u] >> 2u;
-
-    /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    R1 = __SSAT(T1 + S1, 16u);
-    /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16u);
-    S1 = __SSAT(T1 - S1, 16u);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u] >> 2u;
-    T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
-    /* Read yd (real), xd(imag) input */
-    /* input is down scale by 4 to avoid overflow */
-    U0 = pSrc16[i3 * 2u] >> 2u;
-    U1 = pSrc16[(i3 * 2u) + 1u] >> 2u;
-
-    /* T0 = (yb + yd), T1 = (xb + xd) */
-    T0 = __SSAT(T0 + U0, 16u);
-    T1 = __SSAT(T1 + U1, 16u);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
-
-    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */
-    R0 = __SSAT(R0 - T0, 16u);
-    R1 = __SSAT(R1 - T1, 16u);
-    /* co2 & si2 are read from Coefficient pointer */
-    Co2 = pCoef16[2u * ic * 2u];
-    Si2 = pCoef16[(2u * ic * 2u) + 1u];
-    /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
-    out1 = (short) ((Co2 * R0 - Si2 * R1) >> 16u);
-    /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-    out2 = (short) ((Si2 * R0 + Co2 * R1) >> 16u);
-
-    /*  Reading i0+fftLen/4 */
-    /* input is down scale by 4 to avoid overflow */
-    /* T0 = yb, T1 = xb */
-    T0 = pSrc16[i1 * 2u] >> 2u;
-    T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    pSrc16[i1 * 2u] = out1;
-    pSrc16[(i1 * 2u) + 1u] = out2;
-
-    /*  Butterfly calculations */
-    /* input is down scale by 4 to avoid overflow */
-    /* U0 = yd, U1 = xd) */
-    U0 = pSrc16[i3 * 2u] >> 2u;
-    U1 = pSrc16[(i3 * 2u) + 1u] >> 2u;
-
-    /* T0 = yb-yd, T1 = xb-xd) */
-    T0 = __SSAT(T0 - U0, 16u);
-    T1 = __SSAT(T1 - U1, 16u);
-    /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
-    R0 = (short) __SSAT((q31_t) (S0 + T1), 16);
-    R1 = (short) __SSAT((q31_t) (S1 - T0), 16);
-    /* S = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
-    S0 = (short) __SSAT((q31_t) (S0 - T1), 16);
-    S1 = (short) __SSAT((q31_t) (S1 + T0), 16);
-
-    /* co1 & si1 are read from Coefficient pointer */
-    Co1 = pCoef16[ic * 2u];
-    Si1 = pCoef16[(ic * 2u) + 1u];
-    /*  Butterfly process for the i0+fftLen/2 sample */
-    /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
-    out1 = (short) ((Co1 * S0 - Si1 * S1) >> 16u);
-    /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
-    out2 = (short) ((Si1 * S0 + Co1 * S1) >> 16u);
-    /* writing output(xb', yb') in little endian format */
-    pSrc16[i2 * 2u] = out1;
-    pSrc16[(i2 * 2u) + 1u] = out2;
-
-    /* Co3 & si3 are read from Coefficient pointer */
-    Co3 = pCoef16[3u * ic * 2u];
-    Si3 = pCoef16[(3u * ic * 2u) + 1u];
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-    /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
-    out1 = (short) ((Co3 * R0 - Si3 * R1) >> 16u);
-    /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
-    out2 = (short) ((Si3 * R0 + Co3 * R1) >> 16u);
-    /* writing output(xd', yd') in little endian format */
-    pSrc16[i3 * 2u] = out1;
-    pSrc16[(i3 * 2u) + 1u] = out2;
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-
-  /*  End of first stage process */
-
-  /* data is in 4.11(q11) format */
-
-
-  /*  Start of Middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
-
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      Co1 = pCoef16[ic * 2u];
-      Si1 = pCoef16[(ic * 2u) + 1u];
-      Co2 = pCoef16[2u * ic * 2u];
-      Si2 = pCoef16[2u * ic * 2u + 1u];
-      Co3 = pCoef16[3u * ic * 2u];
-      Si3 = pCoef16[(3u * ic * 2u) + 1u];
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T0 = pSrc16[i0 * 2u];
-        T1 = pSrc16[(i0 * 2u) + 1u];
-
-        /* Read yc (real), xc(imag) input */
-        S0 = pSrc16[i2 * 2u];
-        S1 = pSrc16[(i2 * 2u) + 1u];
-
-
-        /* R0 = (ya + yc), R1 = (xa + xc) */
-        R0 = __SSAT(T0 + S0, 16u);
-        R1 = __SSAT(T1 + S1, 16u);
-        /* S0 = (ya - yc), S1 = (xa - xc) */
-        S0 = __SSAT(T0 - S0, 16u);
-        S1 = __SSAT(T1 - S1, 16u);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
-
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
-
-        /* T0 = (yb + yd), T1 = (xb + xd) */
-        T0 = __SSAT(T0 + U0, 16u);
-        T1 = __SSAT(T1 + U1, 16u);
-
-        /*  writing the butterfly processed i0 sample */
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        pSrc16[i0 * 2u] = ((R0 >> 1u) + (T0 >> 1u)) >> 1u;
-        pSrc16[(i0 * 2u) + 1u] = ((R1 >> 1u) + (T1 >> 1u)) >> 1u;
-
-        /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-        R0 = (R0 >> 1u) - (T0 >> 1u);
-        R1 = (R1 >> 1u) - (T1 >> 1u);
-
-        /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
-        out1 = (short) ((Co2 * R0 - Si2 * R1) >> 16);
-        /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-        out2 = (short) ((Si2 * R0 + Co2 * R1) >> 16);
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-        pSrc16[i1 * 2u] = out1;
-        pSrc16[(i1 * 2u) + 1u] = out2;
-
-        /*  Butterfly calculations */
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
-
-        /* T0 = yb-yd, T1 = xb-xd) */
-        T0 = __SSAT(T0 - U0, 16u);
-        T1 = __SSAT(T1 - U1, 16u);
-
-        /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
-        R0 = (S0 >> 1u) + (T1 >> 1u);
-        R1 = (S1 >> 1u) - (T0 >> 1u);
-
-        /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
-        S0 = (S0 >> 1u) - (T1 >> 1u);
-        S1 = (S1 >> 1u) + (T0 >> 1u);
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = (short) ((Co1 * S0 - Si1 * S1) >> 16u);
-        out2 = (short) ((Si1 * S0 + Co1 * S1) >> 16u);
-        /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
-        /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
-        pSrc16[i2 * 2u] = out1;
-        pSrc16[(i2 * 2u) + 1u] = out2;
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-        out1 = (short) ((Co3 * R0 - Si3 * R1) >> 16u);
-
-        out2 = (short) ((Si3 * R0 + Co3 * R1) >> 16u);
-        /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
-        /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
-        pSrc16[i3 * 2u] = out1;
-        pSrc16[(i3 * 2u) + 1u] = out2;
-
-
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
-  }
-  /*  End of Middle stages process */
-
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point   */
-  /* data is in 6.10(q10) format for the 64 point  */
-  /* data is in 4.12(q12) format for the 16 point  */
-
-  /* start of last stage process */
-
-
-  /*  Initializations for the last stage */
-  n1 = n2;
-  n2 >>= 2u;
-
-  /*  Butterfly implementation */
-  for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u];
-    T1 = pSrc16[(i0 * 2u) + 1u];
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u];
-    S1 = pSrc16[(i2 * 2u) + 1u];
-
-    /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    R1 = __SSAT(T1 + S1, 16u);
-    /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16u);
-    S1 = __SSAT(T1 - S1, 16u);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
-
-    /* T0 = (yb + yd), T1 = (xb + xd) */
-    T0 = __SSAT(T0 + U0, 16u);
-    T1 = __SSAT(T1 + U1, 16u);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
-
-    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-    R0 = (R0 >> 1u) - (T0 >> 1u);
-    R1 = (R1 >> 1u) - (T1 >> 1u);
-
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
-
-    /*  writing the butterfly processed i0 + fftLen/4 sample */
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    pSrc16[i1 * 2u] = R0;
-    pSrc16[(i1 * 2u) + 1u] = R1;
-
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
-    /* T0 = (yb - yd), T1 = (xb - xd) */
-    T0 = __SSAT(T0 - U0, 16u);
-    T1 = __SSAT(T1 - U1, 16u);
-
-    /*  writing the butterfly processed i0 + fftLen/2 sample */
-    /* xb' = (xa-yb-xc+yd) */
-    /* yb' = (ya+xb-yc-xd) */
-    pSrc16[i2 * 2u] = (S0 >> 1u) - (T1 >> 1u);
-    pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u);
-
-
-    /*  writing the butterfly processed i0 + 3fftLen/4 sample */
-    /* xd' = (xa+yb-xc-yd) */
-    /* yd' = (ya-xb-yc+xd) */
-    pSrc16[i3 * 2u] = (S0 >> 1u) + (T1 >> 1u);
-    pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u);
-  }
-  /* end of last stage  process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c
deleted file mode 100644
index cfa5d8df0e..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c
+++ /dev/null
@@ -1,891 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_q31.c    
-*    
-* Description:	This file has function definition of Radix-4 FFT & IFFT function and    
-*				In-place bit reversal using bit reversal table    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup Radix4_CFFT_CIFFT    
- * @{    
- */
-
-/**    
- * @details    
- * @brief Processing function for the Q31 CFFT/CIFFT.    
- * @param[in]      *S    points to an instance of the Q31 CFFT/CIFFT structure.   
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.   
- * @return none.    
- *     
- * \par Input and output formats:    
- * \par    
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.   
- * Hence the output format is different for different FFT sizes.    
- * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:   
- * \par   
- * \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT"    
- * \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT"    
- *    
- */
-
-void arm_cfft_radix4_q31(
-  const arm_cfft_radix4_instance_q31 * S,
-  q31_t * pSrc)
-{
-  if(S->ifftFlag == 1u)
-  {
-    /* Complex IFFT radix-4 */
-    arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle,
-                                     S->twidCoefModifier);
-  }
-  else
-  {
-    /* Complex FFT radix-4 */
-    arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle,
-                             S->twidCoefModifier);
-  }
-
-
-  if(S->bitReverseFlag == 1u)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
-
-}
-
-/**    
- * @} end of Radix4_CFFT_CIFFT group    
- */
-
-/*    
-* Radix-4 FFT algorithm used is :    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 FFT:    
-* Wn = co1 + j * (- si1)    
-* W2n = co2 + j * (- si2)    
-* W3n = co3 + j * (- si3)    
-*    
-*  Butterfly implementation:    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
-* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
-*    
-*/
-
-/**    
- * @brief  Core function for the Q31 CFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-void arm_radix4_butterfly_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint32_t twidCoefModifier)
-{
-  uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q63_t xaya, xbyb, xcyc, xdyd;
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-
-  /* start of first stage process */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-  i0 = 0u;
-  ia1 = 0u;
-
-  j = n2;
-
-  /*  Calculation of first stage */
-  do
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSrc[(2u * i0)] >> 4u) + (pSrc[(2u * i2)] >> 4u);
-    /* xa - xc */
-    r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u);
-
-    /* xb + xd */
-    t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u);
-
-    /* ya + yc */
-    s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u);
-    /* ya - yc */
-    s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u);
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[2u * i0] = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u);
-
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u);
-    /* xb - xd */
-    t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2u * ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
-
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
-
-    /* (xa - xc) + (yb - yd) */
-    r1 = r2 + t1;
-    /* (xa - xc) - (yb - yd) */
-    r2 = r2 - t1;
-
-    /* (ya - yc) - (xb - xd) */
-    s1 = s2 - t2;
-    /* (ya - yc) + (xb - xd) */
-    s2 = s2 + t2;
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
-
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3u * ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
-
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-
-  /* end of first stage process */
-
-  /* data is in 5.27(q27) format */
-
-
-  /* start of Middle stages process */
-
-
-  /* each stage in middle stages provides two down scaling of the input */
-
-  twidCoefModifier <<= 2u;
-
-
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSrc[2u * i0] + pSrc[2u * i2];
-        /* xa - xc */
-        r2 = pSrc[2u * i0] - pSrc[2u * i2];
-
-        /* ya + yc */
-        s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-        /* ya - yc */
-        s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-        /* xb + xd */
-        t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2u * i0] = (r1 + t1) >> 2u;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-
-        /* yb + yd */
-        t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-        /* (xb - xd) */
-        t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1u;
-
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1u;
-
-        /* (xa - xc) + (yb - yd) */
-        r1 = r2 + t1;
-        /* (xa - xc) - (yb - yd) */
-        r2 = r2 - t1;
-
-        /* (ya - yc) -  (xb - xd) */
-        s1 = s2 - t2;
-        /* (ya - yc) +  (xb - xd) */
-        s2 = s2 + t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
-
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
-
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                         ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
-
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-
-  /* End of Middle stages process */
-
-  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
-  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
-  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
-  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
-
-
-  /* start of Last stage process */
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
-
-  /*  Calculations of last stage */
-  do
-  {
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    xa = (q31_t) xaya;
-    ya = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    xb = (q31_t) xbyb;
-    yb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    xc = (q31_t) xcyc;
-    yc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    xd = (q31_t) xdyd;
-    yd = (q31_t) (xdyd >> 32);
-
-#else
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    ya = (q31_t) xaya;
-    xa = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    yb = (q31_t) xbyb;
-    xb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    yc = (q31_t) xcyc;
-    xc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    yd = (q31_t) xdyd;
-    xd = (q31_t) (xdyd >> 32);
-
-
-#endif
-
-    /* xa' = xa + xb + xc + xd */
-    xa_out = xa + xb + xc + xd;
-
-    /* ya' = ya + yb + yc + yd */
-    ya_out = ya + yb + yc + yd;
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
-
-    /* writing xa' and ya' */
-    *ptr1++ = xa_out;
-    *ptr1++ = ya_out;
-
-    xc_out = (xa - xb + xc - xd);
-    yc_out = (ya - yb + yc - yd);
-
-    /* writing xc' and yc' */
-    *ptr1++ = xc_out;
-    *ptr1++ = yc_out;
-
-    xb_out = (xa + yb - xc - yd);
-    yb_out = (ya - xb - yc + xd);
-
-    /* writing xb' and yb' */
-    *ptr1++ = xb_out;
-    *ptr1++ = yb_out;
-
-    xd_out = (xa - yb - xc + yd);
-    yd_out = (ya + xb - yc - xd);
-
-    /* writing xd' and yd' */
-    *ptr1++ = xd_out;
-    *ptr1++ = yd_out;
-
-
-  } while(--j);
-
-  /* output is in 11.21(q21) format for the 1024 point */
-  /* output is in 9.23(q23) format for the 256 point */
-  /* output is in 7.25(q25) format for the 64 point */
-  /* output is in 5.27(q27) format for the 16 point */
-
-  /* End of last stage process */
-
-}
-
-
-/**    
- * @brief  Core function for the Q31 CIFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-
-/*    
-* Radix-4 IFFT algorithm used is :    
-*    
-* CIFFT uses same twiddle coefficients as CFFT Function    
-*  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]    
-*    
-*    
-* IFFT is implemented with following changes in equations from FFT    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 IFFT:    
-* Wn = co1 + j * (si1)    
-* W2n = co2 + j * (si2)    
-* W3n = co3 + j * (si3)    
-    
-* The real and imaginary output values for the radix-4 butterfly are    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)    
-* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)    
-* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)    
-* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)    
-*    
-*/
-
-void arm_radix4_butterfly_inverse_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint32_t twidCoefModifier)
-{
-  uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q63_t xaya, xbyb, xcyc, xdyd;
-
-  /* input is be 1.31(q31) format for all FFT sizes */
-  /* Total process is divided into three stages */
-  /* process first stage, middle stages, & last stage */
-
-  /* Start of first stage process */
-
-  /* Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-  i0 = 0u;
-  ia1 = 0u;
-
-  j = n2;
-
-  do
-  {
-
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSrc[2u * i0] >> 4u) + (pSrc[2u * i2] >> 4u);
-    /* xa - xc */
-    r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u);
-
-    /* xb + xd */
-    t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u);
-
-    /* ya + yc */
-    s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u);
-    /* ya - yc */
-    s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u);
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[2u * i0] = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u);
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u);
-    /* xb - xd */
-    t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2u * ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
-
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    pSrc[2u * i1 + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
-                          ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
-
-    /* (xa - xc) - (yb - yd) */
-    r1 = r2 - t1;
-    /* (xa - xc) + (yb - yd) */
-    r2 = r2 + t1;
-
-    /* (ya - yc) + (xb - xd) */
-    s1 = s2 + t2;
-    /* (ya - yc) - (xb - xd) */
-    s2 = s2 - t2;
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
-
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3u * ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
-
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-
-  /* data is in 5.27(q27) format */
-  /* each stage provides two down scaling of the input */
-
-
-  /* Start of Middle stages process */
-
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    for (j = 0; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSrc[2u * i0] + pSrc[2u * i2];
-        /* xa - xc */
-        r2 = pSrc[2u * i0] - pSrc[2u * i2];
-
-        /* ya + yc */
-        s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-        /* ya - yc */
-        s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-        /* xb + xd */
-        t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2u * i0] = (r1 + t1) >> 2u;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-        /* yb + yd */
-        t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-        /* (xb - xd) */
-        t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32u)) -
-                         ((int32_t) (((q63_t) s1 * si2) >> 32u))) >> 1u;
-
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] =
-          (((int32_t) (((q63_t) s1 * co2) >> 32u)) +
-           ((int32_t) (((q63_t) r1 * si2) >> 32u))) >> 1u;
-
-        /* (xa - xc) - (yb - yd) */
-        r1 = r2 - t1;
-        /* (xa - xc) + (yb - yd) */
-        r2 = r2 + t1;
-
-        /* (ya - yc) +  (xb - xd) */
-        s1 = s2 + t2;
-        /* (ya - yc) -  (xb - xd) */
-        s2 = s2 - t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
-
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
-
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSrc[(2u * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                           ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
-
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-
-  /* End of Middle stages process */
-
-  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
-  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
-  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
-  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
-
-
-  /* Start of last stage process */
-
-
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
-
-  /*  Calculations of last stage */
-  do
-  {
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    xa = (q31_t) xaya;
-    ya = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    xb = (q31_t) xbyb;
-    yb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    xc = (q31_t) xcyc;
-    yc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    xd = (q31_t) xdyd;
-    yd = (q31_t) (xdyd >> 32);
-
-#else
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    ya = (q31_t) xaya;
-    xa = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    yb = (q31_t) xbyb;
-    xb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    yc = (q31_t) xcyc;
-    xc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    yd = (q31_t) xdyd;
-    xd = (q31_t) (xdyd >> 32);
-
-
-#endif
-
-    /* xa' = xa + xb + xc + xd */
-    xa_out = xa + xb + xc + xd;
-
-    /* ya' = ya + yb + yc + yd */
-    ya_out = ya + yb + yc + yd;
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
-
-    /* writing xa' and ya' */
-    *ptr1++ = xa_out;
-    *ptr1++ = ya_out;
-
-    xc_out = (xa - xb + xc - xd);
-    yc_out = (ya - yb + yc - yd);
-
-    /* writing xc' and yc' */
-    *ptr1++ = xc_out;
-    *ptr1++ = yc_out;
-
-    xb_out = (xa - yb - xc + yd);
-    yb_out = (ya + xb - yc - xd);
-
-    /* writing xb' and yb' */
-    *ptr1++ = xb_out;
-    *ptr1++ = yb_out;
-
-    xd_out = (xa + yb - xc - yd);
-    yd_out = (ya - xb - yc + xd);
-
-    /* writing xd' and yd' */
-    *ptr1++ = xd_out;
-    *ptr1++ = yd_out;
-
-
-  } while(--j);
-
-  /* output is in 11.21(q21) format for the 1024 point */
-  /* output is in 9.23(q23) format for the 256 point */
-  /* output is in 7.25(q25) format for the 64 point */
-  /* output is in 5.27(q27) format for the 16 point */
-
-  /* End of last stage process */
-}
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c
deleted file mode 100644
index 75cc3ef689..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c
+++ /dev/null
@@ -1,453 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_f32.c    
-*    
-* Description:	Processing function of DCT4 & IDCT4 F32.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @defgroup DCT4_IDCT4 DCT Type IV Functions    
- * Representation of signals by minimum number of values is important for storage and transmission.    
- * The possibility of large discontinuity between the beginning and end of a period of a signal    
- * in DFT can be avoided by extending the signal so that it is even-symmetric.    
- * Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the    
- * spectrum and is very widely used in signal and image coding applications.    
- * The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions.    
- * DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.    
- *    
- * DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal.    
- * Reordering of the input data makes the computation of DCT just a problem of    
- * computing the DFT of a real signal with a few additional operations.    
- * This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.    
- *     
- * DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used.    
- * DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing.    
- * DCT2 implementation can be described in the following steps:    
- * - Re-ordering input    
- * - Calculating Real FFT    
- * - Multiplication of weights and Real FFT output and getting real part from the product.    
- *    
- * This process is explained by the block diagram below:    
- * \image html DCT4.gif "Discrete Cosine Transform - type-IV"    
- *    
- * \par Algorithm:    
- * The N-point type-IV DCT is defined as a real, linear transformation by the formula:    
- * \image html DCT4Equation.gif    
- * where k = 0,1,2,.....N-1    
- *\par    
- * Its inverse is defined as follows:    
- * \image html IDCT4Equation.gif    
- * where n = 0,1,2,.....N-1    
- *\par    
- * The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N).    
- * The symmetry of the transform matrix indicates that the fast algorithms for the forward    
- * and inverse transform computation are identical.    
- * Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.    
- *    
- * \par Lengths supported by the transform:    
- *  As DCT4 internally uses Real FFT, it supports all the lengths supported by arm_rfft_f32().    
- * The library provides separate functions for Q15, Q31, and floating-point data types.    
- * \par Instance Structure    
- * The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure.    
- * A separate instance structure must be defined for each transform.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Initializes Real FFT as its process function is used internally in DCT4, by calling arm_rfft_init_f32().    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Manually initialize the instance structure as follows:    
- * 
    
- *arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};    
- *arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};   
- *arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};   
- * 
   
- * where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4;   
- * \c normalize is normalizing factor used and is equal to sqrt(2/N);    
- * \c pTwiddle points to the twiddle factor table;   
- * \c pCosFactor points to the cosFactor table;   
- * \c pRfft points to the real FFT instance;   
- * \c pCfft points to the complex FFT instance;   
- * The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32()   
- * and arm_rfft_f32() respectively for details regarding static initialization.   
- *   
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the DCT4 transform functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
- /**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point DCT4/IDCT4.   
- * @param[in]       *S             points to an instance of the floating-point DCT4/IDCT4 structure.   
- * @param[in]       *pState        points to state buffer.   
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.   
- * @return none.   
- */
-
-void arm_dct4_f32(
-  const arm_dct4_instance_f32 * S,
-  float32_t * pState,
-  float32_t * pInlineBuffer)
-{
-  uint32_t i;                                    /* Loop counter */
-  float32_t *weights = S->pTwiddle;              /* Pointer to the Weights table */
-  float32_t *cosFact = S->pCosFactor;            /* Pointer to the cos factors table */
-  float32_t *pS1, *pS2, *pbuff;                  /* Temporary pointers for input buffer and pState buffer */
-  float32_t in;                                  /* Temporary variable */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)    
-   * along with some pre-processing and post-processing.    
-   * Computational procedure is explained as follows:    
-   * (a) Pre-processing involves multiplying input with cos factor,    
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))    
-   *              where,    
-   *                 r(n) -- output of preprocessing    
-   *                 u(n) -- input to preprocessing(actual Source buffer)    
-   * (b) Calculation of DCT2 using FFT is divided into three steps:    
-   *                  Step1: Re-ordering of even and odd elements of input.    
-   *                  Step2: Calculating FFT of the re-ordered input.    
-   *                  Step3: Taking the real part of the product of FFT output and weights.    
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:    
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *                        where,    
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output    
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).    
-   */
-
-        /*-------- Pre-processing ------------*/
-  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);
-  arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-
-  /* ----------------------------------------------------------------    
-   * Step1: Re-ordering of even and odd elements as,    
-   *             pState[i] =  pInlineBuffer[2*i] and    
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2    
-   ---------------------------------------------------------------------*/
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = (uint32_t) S->Nby2 >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.    
-   * Compute 4 outputs at a time */
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
-
-        /*----------------------------------------------------------------------    
-	 *  Step3: Multiply the FFT output with the weights.    
-	 *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = ((uint32_t) S->N - 1u) >> 2u;
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ * (float32_t) 0.5;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  i = ((uint32_t) S->N - 1u) % 0x4u;
-
-  while(i > 0u)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initializing the loop counter to N/2 */
-  i = (uint32_t) S->Nby2;
-
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
-
-        /*----------------------------------------------------------------------    
-	 *  Step3: Multiply the FFT output with the weights.    
-	 *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ * (float32_t) 0.5;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* Initializing the loop counter */
-  i = ((uint32_t) S->N - 1u);
-
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c
deleted file mode 100644
index f6848f61fc..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c
+++ /dev/null
@@ -1,16511 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_init_f32.c    
-*    
-* Description:	Initialization function of DCT-4 & IDCT4 F32    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/*    
-* @brief  Weights Table    
-*/
-
-/**    
-* \par    
-* Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*    weights[2*i]= cos(i*c);    
-*    weights[(2*i)+1]= -sin(i * c);    
-* } 
    
-* \par    
-* Where N is the Number of weights to be calculated and c is pi/(2*N)    
-* \par    
-* In the tables below the real and imaginary values are placed alternatively, hence the    
-* array length is 2*N.    
-*/
-
-static const float32_t Weights_128[256] = {
-  1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f,
-  -0.012271538285719925f,
-  0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f,
-  -0.036807222941358832f,
-  0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f,
-  -0.061320736302208578f,
-  0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f,
-  -0.085797312344439894f,
-  0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f,
-  -0.110222207293883060f,
-  0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f,
-  -0.134580708507126170f,
-  0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f,
-  -0.158858143333861450f,
-  0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f,
-  -0.183039887955140950f,
-  0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f,
-  -0.207111376192218560f,
-  0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f,
-  -0.231058108280671110f,
-  0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f,
-  -0.254865659604514570f,
-  0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f,
-  -0.278519689385053060f,
-  0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f,
-  -0.302005949319228080f,
-  0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f,
-  -0.325310292162262930f,
-  0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f,
-  -0.348418680249434560f,
-  0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f,
-  -0.371317193951837540f,
-  0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f,
-  -0.393992040061048100f,
-  0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f,
-  -0.416429560097637150f,
-  0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f,
-  -0.438616238538527660f,
-  0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f,
-  -0.460538710958240010f,
-  0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f,
-  -0.482183772079122720f,
-  0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f,
-  -0.503538383725717580f,
-  0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f,
-  -0.524589682678468950f,
-  0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f,
-  -0.545324988422046460f,
-  0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f,
-  -0.565731810783613120f,
-  0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f,
-  -0.585797857456438860f,
-  0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f,
-  -0.605511041404325550f,
-  0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f,
-  -0.624859488142386340f,
-  0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f,
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-
-static const float32_t Weights_2048[4096] = {
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-  0.002300969151425887, -0.999997352766978210, 0.002109222019415816,
-    -0.999997775588762350,
-  0.001917474809855460, -0.999998161643486980, 0.001725727529795258,
-    -0.999998510931137790,
-  0.001533980186284766, -0.999998823451701880, 0.001342232786374430,
-    -0.999999099205167830,
-  0.001150485337113809, -0.999999338191525530, 0.000958737845553352,
-    -0.999999540410766110,
-  0.000766990318742846, -0.999999705862882230, 0.000575242763732077,
-    -0.999999834547867670,
-  0.000383495187571497, -0.999999926465717890, 0.000191747597310674,
-    -0.999999981616429330,
-
-};
-
-/**    
-* \par    
-* cosFactor tables are generated using the formula : 
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
    
-* \par    
-* C command to generate the table    
-* \par    
-* 
 for(i = 0; i< N; i++)    
-* {    
-*    cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
    
-* \par    
-* where N is the number of factors to generate and c is pi/(2*N)    
-*/
-static const float32_t cos_factors_128[128] = {
-  0.999981175282601110f, 0.999830581795823400f, 0.999529417501093140f,
-  0.999077727752645360f,
-  0.998475580573294770f, 0.997723066644191640f, 0.996820299291165670f,
-  0.995767414467659820f,
-  0.994564570734255420f, 0.993211949234794500f, 0.991709753669099530f,
-  0.990058210262297120f,
-  0.988257567730749460f, 0.986308097244598670f, 0.984210092386929030f,
-  0.981963869109555240f,
-  0.979569765685440520f, 0.977028142657754390f, 0.974339382785575860f,
-  0.971503890986251780f,
-  0.968522094274417380f, 0.965394441697689400f, 0.962121404269041580f,
-  0.958703474895871600f,
-  0.955141168305770780f, 0.951435020969008340f, 0.947585591017741090f,
-  0.943593458161960390f,
-  0.939459223602189920f, 0.935183509938947610f, 0.930766961078983710f,
-  0.926210242138311380f,
-  0.921514039342042010f, 0.916679059921042700f, 0.911706032005429880f,
-  0.906595704514915330f,
-  0.901348847046022030f, 0.895966249756185220f, 0.890448723244757880f,
-  0.884797098430937790f,
-  0.879012226428633530f, 0.873094978418290090f, 0.867046245515692650f,
-  0.860866938637767310f,
-  0.854557988365400530f, 0.848120344803297230f, 0.841554977436898440f,
-  0.834862874986380010f,
-  0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f,
-  0.806847553543799330f,
-  0.799537269107905010f, 0.792106577300212390f, 0.784556597155575240f,
-  0.776888465673232440f,
-  0.769103337645579700f, 0.761202385484261780f, 0.753186799043612520f,
-  0.745057785441466060f,
-  0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f,
-  0.711432195745216430f,
-  0.702754744457225300f, 0.693971460889654000f, 0.685083667772700360f,
-  0.676092703575316030f,
-  0.666999922303637470f, 0.657806693297078640f, 0.648514401022112550f,
-  0.639124444863775730f,
-  0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f,
-  0.600616479383868970f,
-  0.590759701858874280f, 0.580813958095764530f, 0.570780745886967370f,
-  0.560661576197336030f,
-  0.550457972936604810f, 0.540171472729892970f, 0.529803624686294830f,
-  0.519355990165589530f,
-  0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f,
-  0.476799230063322250f,
-  0.465976495767966130f, 0.455083587126343840f, 0.444122144570429260f,
-  0.433093818853152010f,
-  0.422000270799799790f, 0.410843171057903910f, 0.399624199845646790f,
-  0.388345046698826300f,
-  0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f,
-  0.342660717311994380f,
-  0.331106305759876430f, 0.319502030816015750f, 0.307849640041534980f,
-  0.296150888243623960f,
-  0.284407537211271820f, 0.272621355449948980f, 0.260794117915275570f,
-  0.248927605745720260f,
-  0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f,
-  0.201104634842091960f,
-  0.189068664149806280f, 0.177004220412148860f, 0.164913120489970090f,
-  0.152797185258443410f,
-  0.140658239332849240f, 0.128498110793793220f, 0.116318630911904880f,
-  0.104121633872054730f,
-  0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f,
-  0.055195244349690031f,
-  0.042938256934940959f, 0.030674803176636581f, 0.018406729905804820f,
-  0.006135884649154515f
-};
-
-static const float32_t cos_factors_512[512] = {
-  0.999998823451701880f, 0.999989411081928400f, 0.999970586430974140f,
-  0.999942349676023910f,
-  0.999904701082852900f, 0.999857641005823860f, 0.999801169887884260f,
-  0.999735288260561680f,
-  0.999659996743959220f, 0.999575296046749220f, 0.999481186966166950f,
-  0.999377670388002850f,
-  0.999264747286594420f, 0.999142418724816910f, 0.999010685854073380f,
-  0.998869549914283560f,
-  0.998719012233872940f, 0.998559074229759310f, 0.998389737407340160f,
-  0.998211003360478190f,
-  0.998022873771486240f, 0.997825350411111640f, 0.997618435138519550f,
-  0.997402129901275300f,
-  0.997176436735326190f, 0.996941357764982160f, 0.996696895202896060f,
-  0.996443051350042630f,
-  0.996179828595696980f, 0.995907229417411720f, 0.995625256380994310f,
-  0.995333912140482280f,
-  0.995033199438118630f, 0.994723121104325700f, 0.994403680057679100f,
-  0.994074879304879370f,
-  0.993736721940724600f, 0.993389211148080650f, 0.993032350197851410f,
-  0.992666142448948020f,
-  0.992290591348257370f, 0.991905700430609330f, 0.991511473318743900f,
-  0.991107913723276890f,
-  0.990695025442664630f, 0.990272812363169110f, 0.989841278458820530f,
-  0.989400427791380380f,
-  0.988950264510302990f, 0.988490792852696590f, 0.988022017143283530f,
-  0.987543941794359230f,
-  0.987056571305750970f, 0.986559910264775410f, 0.986053963346195440f,
-  0.985538735312176060f,
-  0.985014231012239840f, 0.984480455383220930f, 0.983937413449218920f,
-  0.983385110321551180f,
-  0.982823551198705240f, 0.982252741366289370f, 0.981672686196983110f,
-  0.981083391150486710f,
-  0.980484861773469380f, 0.979877103699517640f, 0.979260122649082020f,
-  0.978633924429423210f,
-  0.977998514934557140f, 0.977353900145199960f, 0.976700086128711840f,
-  0.976037079039039020f,
-  0.975364885116656980f, 0.974683510688510670f, 0.973992962167955830f,
-  0.973293246054698250f,
-  0.972584368934732210f, 0.971866337480279400f, 0.971139158449725090f,
-  0.970402838687555500f,
-  0.969657385124292450f, 0.968902804776428870f, 0.968139104746362440f,
-  0.967366292222328510f,
-  0.966584374478333120f, 0.965793358874083680f, 0.964993252854920320f,
-  0.964184063951745830f,
-  0.963365799780954050f, 0.962538468044359160f, 0.961702076529122540f,
-  0.960856633107679660f,
-  0.960002145737665960f, 0.959138622461841890f, 0.958266071408017670f,
-  0.957384500788975860f,
-  0.956493918902395100f, 0.955594334130771110f, 0.954685754941338340f,
-  0.953768189885990330f,
-  0.952841647601198720f, 0.951906136807932350f, 0.950961666311575080f,
-  0.950008245001843000f,
-  0.949045881852700560f, 0.948074585922276230f, 0.947094366352777220f,
-  0.946105232370403450f,
-  0.945107193285260610f, 0.944100258491272660f, 0.943084437466093490f,
-  0.942059739771017310f,
-  0.941026175050889260f, 0.939983753034014050f, 0.938932483532064600f,
-  0.937872376439989890f,
-  0.936803441735921560f, 0.935725689481080370f, 0.934639129819680780f,
-  0.933543772978836170f,
-  0.932439629268462360f, 0.931326709081180430f, 0.930205022892219070f,
-  0.929074581259315860f,
-  0.927935394822617890f, 0.926787474304581750f, 0.925630830509872720f,
-  0.924465474325262600f,
-  0.923291416719527640f, 0.922108668743345180f, 0.920917241529189520f,
-  0.919717146291227360f,
-  0.918508394325212250f, 0.917290997008377910f, 0.916064965799331720f,
-  0.914830312237946200f,
-  0.913587047945250810f, 0.912335184623322750f, 0.911074734055176360f,
-  0.909805708104652220f,
-  0.908528118716306120f, 0.907241977915295820f, 0.905947297807268460f,
-  0.904644090578246240f,
-  0.903332368494511820f, 0.902012143902493180f, 0.900683429228646970f,
-  0.899346236979341570f,
-  0.898000579740739880f, 0.896646470178680150f, 0.895283921038557580f,
-  0.893912945145203250f,
-  0.892533555402764580f, 0.891145764794583180f, 0.889749586383072780f,
-  0.888345033309596350f,
-  0.886932118794342190f, 0.885510856136199950f, 0.884081258712634990f,
-  0.882643339979562790f,
-  0.881197113471222090f, 0.879742592800047410f, 0.878279791656541580f,
-  0.876808723809145650f,
-  0.875329403104110890f, 0.873841843465366860f, 0.872346058894391540f,
-  0.870842063470078980f,
-  0.869329871348606840f, 0.867809496763303320f, 0.866280954024512990f,
-  0.864744257519462380f,
-  0.863199421712124160f, 0.861646461143081300f, 0.860085390429390140f,
-  0.858516224264442740f,
-  0.856938977417828760f, 0.855353664735196030f, 0.853760301138111410f,
-  0.852158901623919830f,
-  0.850549481265603480f, 0.848932055211639610f, 0.847306638685858320f,
-  0.845673246987299070f,
-  0.844031895490066410f, 0.842382599643185850f, 0.840725374970458070f,
-  0.839060237070312740f,
-  0.837387201615661940f, 0.835706284353752600f, 0.834017501106018130f,
-  0.832320867767929680f,
-  0.830616400308846310f, 0.828904114771864870f, 0.827184027273669130f,
-  0.825456154004377550f,
-  0.823720511227391430f, 0.821977115279241550f, 0.820225982569434690f,
-  0.818467129580298660f,
-  0.816700572866827850f, 0.814926329056526620f, 0.813144414849253590f,
-  0.811354847017063730f,
-  0.809557642404051260f, 0.807752817926190360f, 0.805940390571176280f,
-  0.804120377398265810f,
-  0.802292795538115720f, 0.800457662192622820f, 0.798614994634760820f,
-  0.796764810208418830f,
-  0.794907126328237010f, 0.793041960479443640f, 0.791169330217690200f,
-  0.789289253168885650f,
-  0.787401747029031430f, 0.785506829564053930f, 0.783604518609638200f,
-  0.781694832071059390f,
-  0.779777787923014550f, 0.777853404209453150f, 0.775921699043407690f,
-  0.773982690606822900f,
-  0.772036397150384520f, 0.770082836993347900f, 0.768122028523365420f,
-  0.766153990196312920f,
-  0.764178740536116670f, 0.762196298134578900f, 0.760206681651202420f,
-  0.758209909813015280f,
-  0.756206001414394540f, 0.754194975316889170f, 0.752176850449042810f,
-  0.750151645806215070f,
-  0.748119380450403600f, 0.746080073510063780f, 0.744033744179929290f,
-  0.741980411720831070f,
-  0.739920095459516200f, 0.737852814788465980f, 0.735778589165713590f,
-  0.733697438114660370f,
-  0.731609381223892630f, 0.729514438146997010f, 0.727412628602375770f,
-  0.725303972373060770f,
-  0.723188489306527460f, 0.721066199314508110f, 0.718937122372804490f,
-  0.716801278521099540f,
-  0.714658687862769090f, 0.712509370564692320f, 0.710353346857062420f,
-  0.708190637033195400f,
-  0.706021261449339740f, 0.703845240524484940f, 0.701662594740168570f,
-  0.699473344640283770f,
-  0.697277510830886630f, 0.695075113980000880f, 0.692866174817424740f,
-  0.690650714134534720f,
-  0.688428752784090550f, 0.686200311680038700f, 0.683965411797315510f,
-  0.681724074171649820f,
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-  0.672694769070772970f,
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-  0.663564158612039880f,
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-  0.654333617831800550f,
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-  0.645004536815544040f,
-  0.642657033966226860f, 0.640303482184151670f, 0.637943903621844170f,
-  0.635578320488556230f,
-  0.633206755050057190f, 0.630829229628424470f, 0.628445766601832710f,
-  0.626056388404343520f,
-  0.623661117525694640f, 0.621259976511087660f, 0.618852987960976320f,
-  0.616440174530853650f,
-  0.614021558931038490f, 0.611597163926462020f, 0.609167012336453210f,
-  0.606731127034524480f,
-  0.604289530948156070f, 0.601842247058580030f, 0.599389298400564540f,
-  0.596930708062196500f,
-  0.594466499184664540f, 0.591996694962040990f, 0.589521318641063940f,
-  0.587040393520918080f,
-  0.584553942953015330f, 0.582061990340775550f, 0.579564559139405740f,
-  0.577061672855679550f,
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-  0.566996048825108680f,
-  0.564466241520519500f, 0.561931121244689470f, 0.559390711859136140f,
-  0.556845037275160100f,
-  0.554294121453620110f, 0.551737988404707450f, 0.549176662187719770f,
-  0.546610166910834860f,
-  0.544038526730883930f, 0.541461765853123560f, 0.538879908531008420f,
-  0.536292979065963180f,
-  0.533701001807152960f, 0.531104001151255000f, 0.528502001542228480f,
-  0.525895027471084740f,
-  0.523283103475656430f, 0.520666254140367270f, 0.518044504095999340f,
-  0.515417878019463150f,
-  0.512786400633563070f, 0.510150096706766700f, 0.507508991052970870f,
-  0.504863108531267480f,
-  0.502212474045710900f, 0.499557112545081890f, 0.496897049022654640f,
-  0.494232308515959730f,
-  0.491562916106550060f, 0.488888896919763230f, 0.486210276124486530f,
-  0.483527078932918740f,
-  0.480839330600333900f, 0.478147056424843120f, 0.475450281747155870f,
-  0.472749031950342900f,
-  0.470043332459595620f, 0.467333208741988530f, 0.464618686306237820f,
-  0.461899790702462840f,
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-  0.450980989045103810f,
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-  0.439994271309633260f,
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-  0.428941292055329550f,
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-  0.417823715820212380f,
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-  0.406643216870369140f,
-  0.403838457567654130f, 0.401029897183575790f, 0.398217562153373620f,
-  0.395401478947816300f,
-  0.392581674072951530f, 0.389758174069856410f, 0.386931005514388690f,
-  0.384100195016935040f,
-  0.381265769222162490f, 0.378427754808765620f, 0.375586178489217330f,
-  0.372741067009515810f,
-  0.369892447148934270f, 0.367040345719767240f, 0.364184789567079840f,
-  0.361325805568454340f,
-  0.358463420633736540f, 0.355597661704783960f, 0.352728555755210730f,
-  0.349856129790135030f,
-  0.346980410845923680f, 0.344101425989938980f, 0.341219202320282410f,
-  0.338333766965541290f,
-  0.335445147084531660f, 0.332553369866044220f, 0.329658462528587550f,
-  0.326760452320131790f,
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-  0.315137928752522440f,
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-  0.303467946572011370f,
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-  0.291752263234989370f,
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-  0.279992643080273380f,
-  0.277046080306099950f, 0.274096909868706330f, 0.271145159526808070f,
-  0.268190857063403180f,
-  0.265234030285511900f, 0.262274707023913590f, 0.259312915132886350f,
-  0.256348682489942910f,
-  0.253382036995570270f, 0.250413006572965280f, 0.247441619167773440f,
-  0.244467902747824210f,
-  0.241491885302869300f, 0.238513594844318500f, 0.235533059404975460f,
-  0.232550307038775330f,
-  0.229565365820518870f, 0.226578263845610110f, 0.223589029229790020f,
-  0.220597690108873650f,
-  0.217604274638483670f, 0.214608810993786920f, 0.211611327369227610f,
-  0.208611851978263460f,
-  0.205610413053099320f, 0.202607038844421110f, 0.199601757621131050f,
-  0.196594597670080220f,
-  0.193585587295803750f, 0.190574754820252800f, 0.187562128582529740f,
-  0.184547736938619640f,
-  0.181531608261125130f, 0.178513770938997590f, 0.175494253377271400f,
-  0.172473083996796030f,
-  0.169450291233967930f, 0.166425903540464220f, 0.163399949382973230f,
-  0.160372457242928400f,
-  0.157343455616238280f, 0.154312973013020240f, 0.151281037957330250f,
-  0.148247678986896200f,
-  0.145212924652847520f, 0.142176803519448000f, 0.139139344163826280f,
-  0.136100575175706200f,
-  0.133060525157139180f, 0.130019222722233350f, 0.126976696496885980f,
-  0.123932975118512200f,
-  0.120888087235777220f, 0.117842061508325020f, 0.114794926606510250f,
-  0.111746711211126660f,
-  0.108697444013138670f, 0.105647153713410700f, 0.102595869022436280f,
-  0.099543618660069444f,
-  0.096490431355252607f, 0.093436335845747912f, 0.090381360877865011f,
-  0.087325535206192226f,
-  0.084268887593324127f, 0.081211446809592386f, 0.078153241632794315f,
-  0.075094300847921291f,
-  0.072034653246889416f, 0.068974327628266732f, 0.065913352797003930f,
-  0.062851757564161420f,
-  0.059789570746640007f, 0.056726821166907783f, 0.053663537652730679f,
-  0.050599749036899337f,
-  0.047535484156959261f, 0.044470771854938744f, 0.041405640977076712f,
-  0.038340120373552791f,
-  0.035274238898213947f, 0.032208025408304704f, 0.029141508764193740f,
-  0.026074717829104040f,
-  0.023007681468839410f, 0.019940428551514598f, 0.016872987947281773f,
-  0.013805388528060349f,
-  0.010737659167264572f, 0.007669828739531077f, 0.004601926120448672f,
-  0.001533980186284766f
-};
-
-static const float32_t cos_factors_2048[2048] = {
-  0.999999926465717890f, 0.999999338191525530f, 0.999998161643486980f,
-  0.999996396822294350f,
-  0.999994043728985820f, 0.999991102364945590f, 0.999987572731904080f,
-  0.999983454831937730f,
-  0.999978748667468830f, 0.999973454241265940f, 0.999967571556443780f,
-  0.999961100616462820f,
-  0.999954041425129780f, 0.999946393986597460f, 0.999938158305364590f,
-  0.999929334386276070f,
-  0.999919922234522750f, 0.999909921855641540f, 0.999899333255515390f,
-  0.999888156440373320f,
-  0.999876391416790410f, 0.999864038191687680f, 0.999851096772332190f,
-  0.999837567166337090f,
-  0.999823449381661570f, 0.999808743426610520f, 0.999793449309835270f,
-  0.999777567040332940f,
-  0.999761096627446610f, 0.999744038080865430f, 0.999726391410624470f,
-  0.999708156627104880f,
-  0.999689333741033640f, 0.999669922763483760f, 0.999649923705874240f,
-  0.999629336579970110f,
-  0.999608161397882110f, 0.999586398172067070f, 0.999564046915327740f,
-  0.999541107640812940f,
-  0.999517580362016990f, 0.999493465092780590f, 0.999468761847290050f,
-  0.999443470640077770f,
-  0.999417591486021720f, 0.999391124400346050f, 0.999364069398620550f,
-  0.999336426496761240f,
-  0.999308195711029470f, 0.999279377058032710f, 0.999249970554724420f,
-  0.999219976218403530f,
-  0.999189394066714920f, 0.999158224117649430f, 0.999126466389543390f,
-  0.999094120901079070f,
-  0.999061187671284600f, 0.999027666719533690f, 0.998993558065545680f,
-  0.998958861729386080f,
-  0.998923577731465780f, 0.998887706092541290f, 0.998851246833715180f,
-  0.998814199976435390f,
-  0.998776565542495610f, 0.998738343554035230f, 0.998699534033539280f,
-  0.998660137003838490f,
-  0.998620152488108870f, 0.998579580509872500f, 0.998538421092996730f,
-  0.998496674261694640f,
-  0.998454340040524800f, 0.998411418454391300f, 0.998367909528543820f,
-  0.998323813288577560f,
-  0.998279129760433200f, 0.998233858970396850f, 0.998188000945100300f,
-  0.998141555711520520f,
-  0.998094523296980010f, 0.998046903729146840f, 0.997998697036034390f,
-  0.997949903246001190f,
-  0.997900522387751620f, 0.997850554490335110f, 0.997799999583146470f,
-  0.997748857695925690f,
-  0.997697128858758500f, 0.997644813102075420f, 0.997591910456652630f,
-  0.997538420953611340f,
-  0.997484344624417930f, 0.997429681500884180f, 0.997374431615167150f,
-  0.997318594999768600f,
-  0.997262171687536170f, 0.997205161711661850f, 0.997147565105683480f,
-  0.997089381903483400f,
-  0.997030612139289450f, 0.996971255847674320f, 0.996911313063555740f,
-  0.996850783822196610f,
-  0.996789668159204560f, 0.996727966110532490f, 0.996665677712478160f,
-  0.996602803001684130f,
-  0.996539342015137940f, 0.996475294790172160f, 0.996410661364464100f,
-  0.996345441776035900f,
-  0.996279636063254650f, 0.996213244264832040f, 0.996146266419824620f,
-  0.996078702567633980f,
-  0.996010552748005870f, 0.995941817001031350f, 0.995872495367145730f,
-  0.995802587887129160f,
-  0.995732094602106430f, 0.995661015553546910f, 0.995589350783264600f,
-  0.995517100333418110f,
-  0.995444264246510340f, 0.995370842565388990f, 0.995296835333246090f,
-  0.995222242593618360f,
-  0.995147064390386470f, 0.995071300767776170f, 0.994994951770357020f,
-  0.994918017443043200f,
-  0.994840497831093180f, 0.994762392980109930f, 0.994683702936040250f,
-  0.994604427745175660f,
-  0.994524567454151740f, 0.994444122109948040f, 0.994363091759888570f,
-  0.994281476451641550f,
-  0.994199276233218910f, 0.994116491152977070f, 0.994033121259616400f,
-  0.993949166602181130f,
-  0.993864627230059750f, 0.993779503192984580f, 0.993693794541031790f,
-  0.993607501324621610f,
-  0.993520623594518090f, 0.993433161401829360f, 0.993345114798006910f,
-  0.993256483834846440f,
-  0.993167268564487230f, 0.993077469039412300f, 0.992987085312448390f,
-  0.992896117436765980f,
-  0.992804565465879140f, 0.992712429453645460f, 0.992619709454266140f,
-  0.992526405522286100f,
-  0.992432517712593660f, 0.992338046080420420f, 0.992242990681341700f,
-  0.992147351571276090f,
-  0.992051128806485720f, 0.991954322443575950f, 0.991856932539495470f,
-  0.991758959151536110f,
-  0.991660402337333210f, 0.991561262154865290f, 0.991461538662453790f,
-  0.991361231918763460f,
-  0.991260341982802440f, 0.991158868913921350f, 0.991056812771814340f,
-  0.990954173616518500f,
-  0.990850951508413620f, 0.990747146508222710f, 0.990642758677011570f,
-  0.990537788076188750f,
-  0.990432234767505970f, 0.990326098813057330f, 0.990219380275280000f,
-  0.990112079216953770f,
-  0.990004195701200910f, 0.989895729791486660f, 0.989786681551618640f,
-  0.989677051045747210f,
-  0.989566838338365120f, 0.989456043494307710f, 0.989344666578752640f,
-  0.989232707657220050f,
-  0.989120166795572690f, 0.989007044060015270f, 0.988893339517095130f,
-  0.988779053233701520f,
-  0.988664185277066230f, 0.988548735714763200f, 0.988432704614708340f,
-  0.988316092045159690f,
-  0.988198898074717610f, 0.988081122772324070f, 0.987962766207263420f,
-  0.987843828449161740f,
-  0.987724309567986960f, 0.987604209634049160f, 0.987483528717999710f,
-  0.987362266890832400f,
-  0.987240424223882250f, 0.987118000788826280f, 0.986994996657682980f,
-  0.986871411902812470f,
-  0.986747246596916590f, 0.986622500813038480f, 0.986497174624562880f,
-  0.986371268105216030f,
-  0.986244781329065460f, 0.986117714370520090f, 0.985990067304330140f,
-  0.985861840205586980f,
-  0.985733033149723490f, 0.985603646212513400f, 0.985473679470071810f,
-  0.985343132998854790f,
-  0.985212006875659350f, 0.985080301177623800f, 0.984948015982227030f,
-  0.984815151367289140f,
-  0.984681707410970940f, 0.984547684191773960f, 0.984413081788540700f,
-  0.984277900280454370f,
-  0.984142139747038570f, 0.984005800268157870f, 0.983868881924017220f,
-  0.983731384795162090f,
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-  0.983175610055424420f,
-  0.983035220223095640f, 0.982894252096474070f, 0.982752705758487830f,
-  0.982610581292404750f,
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-  0.982036303824369020f,
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-  0.981452783056635520f,
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-  0.980860024481523870f,
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-  0.980258033678303550f,
-  0.980106094103951770f, 0.979953577958436740f, 0.979800485331479790f,
-  0.979646816313141210f,
-  0.979492570993820810f, 0.979337749464256780f, 0.979182351815526930f,
-  0.979026378139047580f,
-  0.978869828526574120f, 0.978712703070200420f, 0.978555001862359550f,
-  0.978396724995823090f,
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-  0.977757862810002760f,
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-  0.977109797594800880f,
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-  0.976452535450054060f,
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-  0.975786082562163930f,
-  0.975618034019781750f, 0.975449411546446380f, 0.975280215241354220f,
-  0.975110445204038890f,
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-  0.974425629735034990f,
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-  0.973731642600896400f,
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-  0.973028490333694210f,
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-  0.972316179551765300f,
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-  0.971594716959650160f,
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-  0.970864109348029470f,
-  0.970680029339806130f, 0.970495378305530560f, 0.970310156353828110f,
-  0.970124363593660280f,
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-  0.969375486659311280f,
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-  0.966288809384209690f,
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-  0.965494383997269500f,
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-  0.963878277983814200f,
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-  0.958812473320129310f,
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-  0.957936538962351420f,
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-  0.945732010777477150f,
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-  0.052514674564603257f,
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-  0.046386267926707213f,
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-  0.037190455560088091f,
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-  0.034124446197403423f,
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-  0.031058115642434700f,
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-  0.024924606404281485f,
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-  0.021857485452021874f,
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-  0.018790158768784596f,
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-  0.015722655225417017f,
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-  0.012655003694430301f,
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-  0.009587233049729183f,
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-  0.003451449920135975f,
-  0.002684463154596083f, 0.001917474809855460f, 0.001150485337113809f,
-  0.000383495187571497f
-};
-
-static const float32_t cos_factors_8192[8192] = {
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-  1.999999255465430200, 1.999998887794072000, 1.999998446588471700,
-    1.999997931848645600,
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-    1.999995137547503600,
-  1.999994255136887000, 1.999993299192198700, 1.999992269713474200,
-    1.999991166700750800,
-  1.999989990154069600, 1.999988740073473500, 1.999987416459008600,
-    1.999986019310723500,
-  1.999984548628669600, 1.999983004412901000, 1.999981386663474400,
-    1.999979695380449400,
-  1.999977930563888100, 1.999976092213855400, 1.999974180330418700,
-    1.999972194913648900,
-  1.999970135963618400, 1.999968003480403000, 1.999965797464081200,
-    1.999963517914734100,
-  1.999961164832445800, 1.999958738217302300, 1.999956238069392900,
-    1.999953664388809800,
-  1.999951017175647600, 1.999948296430003500, 1.999945502151977600,
-    1.999942634341672600,
-  1.999939692999193900, 1.999936678124649700, 1.999933589718150700,
-    1.999930427779810900,
-  1.999927192309745900, 1.999923883308075200, 1.999920500774920300,
-    1.999917044710405500,
-  1.999913515114657900, 1.999909911987807200, 1.999906235329986100,
-    1.999902485141329400,
-  1.999898661421975400, 1.999894764172064600, 1.999890793391740000,
-    1.999886749081147800,
-  1.999882631240436700, 1.999878439869758200, 1.999874174969266300,
-    1.999869836539117700,
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-    1.999851747525188200,
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-    1.999832482050000900,
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-    1.999812040124888700,
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-    1.999790421761877400,
-  1.999784833354177900, 1.999779171420106700, 1.999773435959872000,
-    1.999767626973684400,
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-    1.999743655773719400,
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-    1.999718508176084000,
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-    1.999692184195571900,
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-    1.999664683847668800,
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-    1.999636007148552400,
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-    1.999606154115092500,
-  1.999598507056529000, 1.999590786478444600, 1.999582992381123000,
-    1.999575124764850800,
-  1.999567183629917100, 1.999559168976613900, 1.999551080805236100,
-    1.999542919116081000,
-  1.999534683909448600, 1.999526375185641800, 1.999517992944965800,
-    1.999509537187729200,
-  1.999501007914242600, 1.999492405124819700, 1.999483728819776900,
-    1.999474978999432800,
-  1.999466155664109600, 1.999457258814131500, 1.999448288449825500,
-    1.999439244571521700,
-  1.999430127179552500, 1.999420936274252800, 1.999411671855960900,
-    1.999402333925017300,
-  1.999392922481765500, 1.999383437526551300, 1.999373879059723500,
-    1.999364247081633500,
-  1.999354541592635500, 1.999344762593086500, 1.999334910083345700,
-    1.999324984063775700,
-  1.999314984534741100, 1.999304911496609700, 1.999294764949752100,
-    1.999284544894541100,
-  1.999274251331352400, 1.999263884260564600, 1.999253443682558900,
-    1.999242929597719200,
-  1.999232342006432000, 1.999221680909086400, 1.999210946306074500,
-    1.999200138197791100,
-  1.999189256584633600, 1.999178301467001900, 1.999167272845298900,
-    1.999156170719930100,
-  1.999144995091303600, 1.999133745959830600, 1.999122423325924200,
-    1.999111027190001000,
-  1.999099557552479900, 1.999088014413782800, 1.999076397774334000,
-    1.999064707634560700,
-  1.999052943994892300, 1.999041106855761900, 1.999029196217604100,
-    1.999017212080857400,
-  1.999005154445962200, 1.998993023313361700, 1.998980818683502100,
-    1.998968540556831800,
-  1.998956188933802800, 1.998943763814868800, 1.998931265200486900,
-    1.998918693091116200,
-  1.998906047487219600, 1.998893328389261400, 1.998880535797709700,
-    1.998867669713034500,
-  1.998854730135709400, 1.998841717066209400, 1.998828630505013400,
-    1.998815470452602400,
-  1.998802236909460500, 1.998788929876074100, 1.998775549352932400,
-    1.998762095340527400,
-  1.998748567839354000, 1.998734966849909000, 1.998721292372693100,
-    1.998707544408208700,
-  1.998693722956961500, 1.998679828019459300, 1.998665859596213500,
-    1.998651817687737300,
-  1.998637702294547000, 1.998623513417161700, 1.998609251056103100,
-    1.998594915211895600,
-  1.998580505885066100, 1.998566023076144600, 1.998551466785663400,
-    1.998536837014157900,
-  1.998522133762165900, 1.998507357030227900, 1.998492506818887200,
-    1.998477583128690100,
-  1.998462585960185000, 1.998447515313923400, 1.998432371190459500,
-    1.998417153590349900,
-  1.998401862514154200, 1.998386497962434800, 1.998371059935756300,
-    1.998355548434686400,
-  1.998339963459795400, 1.998324305011656600, 1.998308573090845200,
-    1.998292767697940100,
-  1.998276888833522300, 1.998260936498175400, 1.998244910692486000,
-    1.998228811417043700,
-  1.998212638672439900, 1.998196392459269400, 1.998180072778129600,
-    1.998163679629620500,
-  1.998147213014344900, 1.998130672932908000, 1.998114059385918400,
-    1.998097372373986300,
-  1.998080611897725700, 1.998063777957752600, 1.998046870554686100,
-    1.998029889689147700,
-  1.998012835361761900, 1.997995707573155600, 1.997978506323958600,
-    1.997961231614803200,
-  1.997943883446324800, 1.997926461819161000, 1.997908966733952500,
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-  0.110199032897608850, 0.109816118257049110, 0.109433199578864170,
-    0.109050276877133770,
-  0.108667350165936400, 0.108284419459350770, 0.107901484771457020,
-    0.107518546116333660,
-  0.107135603508061170, 0.106752656960718350, 0.106369706488385940,
-    0.105986752105143480,
-  0.105603793825070680, 0.105220831662248700, 0.104837865630757090,
-    0.104454895744677270,
-  0.104071922018089540, 0.103688944465074300, 0.103305963099713400,
-    0.102922977936087120,
-  0.102539988988277600, 0.102156996270365800, 0.101773999796432830,
-    0.101390999580561250,
-  0.101007995636832020, 0.100624987979327970, 0.100241976622130760,
-    0.099858961579322170,
-  0.099475942864985456, 0.099092920493202258, 0.098709894478056073,
-    0.098326864833628791,
-  0.097943831574004214, 0.097560794713264939, 0.097177754265493674,
-    0.096794710244774623,
-  0.096411662665190329, 0.096028611540825232, 0.095645556885762609,
-    0.095262498714085819,
-  0.094879437039879722, 0.094496371877227495, 0.094113303240214247,
-    0.093730231142923864,
-  0.093347155599440373, 0.092964076623849271, 0.092580994230234359,
-    0.092197908432681386,
-  0.091814819245274432, 0.091431726682099479, 0.091048630757241303,
-    0.090665531484784803,
-  0.090282428878816323, 0.089899322953420582, 0.089516213722684160,
-    0.089133101200692441,
-  0.088749985401530951, 0.088366866339286629, 0.087983744028044805,
-    0.087600618481892656,
-  0.087217489714916191, 0.086834357741201490, 0.086451222574836131,
-    0.086068084229906014,
-  0.085684942720498897, 0.085301798060701386, 0.084918650264600160,
-    0.084535499346283349,
-  0.084152345319837438, 0.083769188199350780, 0.083386027998910095,
-    0.083002864732603973,
-  0.082619698414519799, 0.082236529058745025, 0.081853356679368619,
-    0.081470181290477811,
-  0.081087002906161790, 0.080703821540508452, 0.080320637207605849,
-    0.079937449921543474,
-  0.079554259696409127, 0.079171066546292510, 0.078787870485282088,
-    0.078404671527466441,
-  0.078021469686935602, 0.077638264977777913, 0.077255057414083589,
-    0.076871847009941652,
-  0.076488633779441206, 0.076105417736672773, 0.075722198895725248,
-    0.075338977270689375,
-  0.074955752875654230, 0.074572525724710764, 0.074189295831948693,
-    0.073806063211457842,
-  0.073422827877329483, 0.073039589843653177, 0.072656349124520389,
-    0.072273105734021334,
-  0.071889859686246352, 0.071506610995287156, 0.071123359675233852,
-    0.070740105740178361,
-  0.070356849204211397, 0.069973590081423773, 0.069590328385907715,
-    0.069207064131753759,
-  0.068823797333054326, 0.068440528003900616, 0.068057256158383886,
-    0.067673981810596848,
-  0.067290704974630494, 0.066907425664577733, 0.066524143894529736,
-    0.066140859678579578,
-  0.065757573030819083, 0.065374283965340146, 0.064990992496236119,
-    0.064607698637598646,
-  0.064224402403521202, 0.063841103808096086, 0.063457802865415636,
-    0.063074499589573618,
-  0.062691193994662109, 0.062307886094775049, 0.061924575904005130,
-    0.061541263436445129,
-  0.061157948706189229, 0.060774631727329942, 0.060391312513961619,
-    0.060007991080177375,
-  0.059624667440070382, 0.059241341607735261, 0.058858013597264912,
-    0.058474683422754095,
-  0.058091351098295878, 0.057708016637985186, 0.057324680055915692,
-    0.056941341366181127,
-  0.056558000582876661, 0.056174657720095743, 0.055791312791933681,
-    0.055407965812484541,
-  0.055024616795842439, 0.054641265756102911, 0.054257912707359794,
-    0.053874557663708772,
-  0.053491200639244271, 0.053107841648060788, 0.052724480704254229,
-    0.052341117821918783,
-  0.051957753015150501, 0.051574386298044173, 0.051191017684694640,
-    0.050807647189198162,
-  0.050424274825649297, 0.050040900608144430, 0.049657524550778251,
-    0.049274146667647289,
-  0.048890766972846805, 0.048507385480472134, 0.048124002204620014,
-    0.047740617159385448,
-  0.047357230358865306, 0.046973841817155179, 0.046590451548350717,
-    0.046207059566548990,
-  0.045823665885845313, 0.045440270520336883, 0.045056873484119603,
-    0.044673474791289434,
-  0.044290074455943754, 0.043906672492178188, 0.043523268914090238,
-    0.043139863735776100,
-  0.042756456971332048, 0.042373048634855741, 0.041989638740443119,
-    0.041606227302191955,
-  0.041222814334198304, 0.040839399850560058, 0.040455983865373815,
-    0.040072566392736257,
-  0.039689147446745419, 0.039305727041497644, 0.038922305191091085,
-    0.038538881909622631,
-  0.038155457211189216, 0.037772031109889144, 0.037388603619819022,
-    0.037005174755077273,
-  0.036621744529761024, 0.036238312957967478, 0.035854880053795196,
-    0.035471445831341021,
-  0.035088010304703626, 0.034704573487980395, 0.034321135395268765,
-    0.033937696040667535,
-  0.033554255438273790, 0.033170813602186440, 0.032787370546502645,
-    0.032403926285321405,
-  0.032020480832740429, 0.031637034202857461, 0.031253586409771626,
-    0.030870137467580314,
-  0.030486687390382738, 0.030103236192276818, 0.029719783887360508,
-    0.029336330489733147,
-  0.028952876013492331, 0.028569420472737472, 0.028185963881566689,
-    0.027802506254078142,
-  0.027419047604371360, 0.027035587946544135, 0.026652127294696067,
-    0.026268665662925468,
-  0.025885203065330677, 0.025501739516011413, 0.025118275029065638,
-    0.024734809618593138,
-  0.024351343298691951, 0.023967876083461924, 0.023584407987001611,
-    0.023200939023409587,
-  0.022817469206785804, 0.022433998551228459, 0.022050527070837558,
-    0.021667054779711814,
-  0.021283581691949955, 0.020900107821652084, 0.020516633182916549,
-    0.020133157789843505,
-  0.019749681656531803, 0.019366204797080316, 0.018982727225589285,
-    0.018599248956157190,
-  0.018215770002884327, 0.017832290379869671, 0.017448810101212228,
-    0.017065329181012358,
-  0.016681847633368677, 0.016298365472381587, 0.015914882712149747,
-    0.015531399366773606,
-  0.015147915450352307, 0.014764430976985016, 0.014380945960772247,
-    0.013997460415812761,
-  0.013613974356207112, 0.013230487796054543, 0.012847000749454314,
-    0.012463513230507034,
-  0.012080025253311559, 0.011696536831968529, 0.011313047980577277,
-    0.010929558713237145,
-  0.010546069044048827, 0.010162578987111254, 0.009779088556525145,
-    0.009395597766389905,
-  0.009012106630804949, 0.008628615163871038, 0.008245123379687167,
-    0.007861631292354124,
-  0.007478138915970929, 0.007094646264638386, 0.006711153352455981,
-    0.006327660193523208,
-  0.005944166801940901, 0.005560673191808128, 0.005177179377225743,
-    0.004793685372293270,
-  0.004410191191110246, 0.004026696847777542, 0.003643202356394263,
-    0.003259707731061291,
-  0.002876212985878184, 0.002492718134944503, 0.002109223192361147,
-    0.001725728172227238,
-  0.001342233088643682, 0.000958737955710053, 0.000575242787525925,
-    0.000191747598192208,
-
-};
-
-/**    
- * @brief  Initialization function for the floating-point DCT4/IDCT4.   
- * @param[in,out] *S         points to an instance of floating-point DCT4/IDCT4 structure.   
- * @param[in]     *S_RFFT    points to an instance of floating-point RFFT/RIFFT structure.   
- * @param[in]     *S_CFFT    points to an instance of floating-point CFFT/CIFFT structure.   
- * @param[in]     N			 length of the DCT4.   
- * @param[in]     Nby2       half of the length of the DCT4.   
- * @param[in]     normalize  normalizing factor.   
- * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.   
- * \par Normalizing factor:    
- * The normalizing factor is sqrt(2/N), which depends on the size of transform N.    
- * Floating-point normalizing factors are mentioned in the table below for different DCT sizes:    
- * \image html dct4NormalizingF32Table.gif    
- */
-
-arm_status arm_dct4_init_f32(
-  arm_dct4_instance_f32 * S,
-  arm_rfft_instance_f32 * S_RFFT,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  float32_t normalize)
-{
-  /*  Initialize the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  float32_t *twiddlePtr[4] =
-    { (float32_t *) Weights_128, (float32_t *) Weights_512,
-    (float32_t *) Weights_2048, (float32_t *) Weights_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  float32_t *pCosFactor[4] =
-    { (float32_t *) cos_factors_128, (float32_t *) cos_factors_512,
-    (float32_t *) cos_factors_2048, (float32_t *) cos_factors_8192
-  };
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-    /* Initialize the table modifier values */
-  case 8192u:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
-    break;
-  case 2048u:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
-    break;
-  case 512u:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
-    break;
-  case 128u:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
-    break;
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT */
-  arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0u, 1u);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c
deleted file mode 100644
index 8038716bd7..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c
+++ /dev/null
@@ -1,4276 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_init_q15.c    
-*    
-* Description:	Initialization function of DCT-4 & IDCT4 Q15    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/*    
-* @brief  Weights Table    
-*/
-
-/**    
-* \par    
-* Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   weights[2*i]= cos(i*c);    
-*   weights[(2*i)+1]= -sin(i * c);    
-* } 
    
-* \par    
-* where N is the Number of weights to be calculated and c is pi/(2*N)    
-* \par    
-* Converted the output to q15 format by multiplying with 2^31 and saturated if required.    
-* \par    
-* In the tables below the real and imaginary values are placed alternatively, hence the    
-* array length is 2*N.    
-*/
-
-static const q15_t ALIGN4 WeightsQ15_128[256] = {
-  0x7fff, 0x0, 0x7ffd, 0xfe6e, 0x7ff6, 0xfcdc, 0x7fe9, 0xfb4a,
-  0x7fd8, 0xf9b9, 0x7fc2, 0xf827, 0x7fa7, 0xf696, 0x7f87, 0xf505,
-  0x7f62, 0xf375, 0x7f38, 0xf1e5, 0x7f09, 0xf055, 0x7ed5, 0xeec7,
-  0x7e9d, 0xed38, 0x7e5f, 0xebab, 0x7e1d, 0xea1e, 0x7dd6, 0xe893,
-  0x7d8a, 0xe708, 0x7d39, 0xe57e, 0x7ce3, 0xe3f5, 0x7c89, 0xe26d,
-  0x7c29, 0xe0e7, 0x7bc5, 0xdf61, 0x7b5d, 0xdddd, 0x7aef, 0xdc5a,
-  0x7a7d, 0xdad8, 0x7a05, 0xd958, 0x798a, 0xd7da, 0x7909, 0xd65d,
-  0x7884, 0xd4e1, 0x77fa, 0xd368, 0x776c, 0xd1ef, 0x76d9, 0xd079,
-  0x7641, 0xcf05, 0x75a5, 0xcd92, 0x7504, 0xcc22, 0x745f, 0xcab3,
-  0x73b5, 0xc946, 0x7307, 0xc7dc, 0x7255, 0xc674, 0x719e, 0xc50e,
-  0x70e2, 0xc3aa, 0x7023, 0xc248, 0x6f5f, 0xc0e9, 0x6e96, 0xbf8d,
-  0x6dca, 0xbe32, 0x6cf9, 0xbcdb, 0x6c24, 0xbb86, 0x6b4a, 0xba33,
-  0x6a6d, 0xb8e4, 0x698c, 0xb797, 0x68a6, 0xb64c, 0x67bd, 0xb505,
-  0x66cf, 0xb3c1, 0x65dd, 0xb27f, 0x64e8, 0xb141, 0x63ef, 0xb005,
-  0x62f2, 0xaecd, 0x61f1, 0xad97, 0x60ec, 0xac65, 0x5fe3, 0xab36,
-  0x5ed7, 0xaa0b, 0x5dc7, 0xa8e3, 0x5cb4, 0xa7be, 0x5b9d, 0xa69c,
-  0x5a82, 0xa57e, 0x5964, 0xa463, 0x5842, 0xa34c, 0x571d, 0xa239,
-  0x55f5, 0xa129, 0x54ca, 0xa01d, 0x539b, 0x9f14, 0x5269, 0x9e0f,
-  0x5133, 0x9d0e, 0x4ffb, 0x9c11, 0x4ebf, 0x9b18, 0x4d81, 0x9a23,
-  0x4c3f, 0x9931, 0x4afb, 0x9843, 0x49b4, 0x975a, 0x4869, 0x9674,
-  0x471c, 0x9593, 0x45cd, 0x94b6, 0x447a, 0x93dc, 0x4325, 0x9307,
-  0x41ce, 0x9236, 0x4073, 0x916a, 0x3f17, 0x90a1, 0x3db8, 0x8fdd,
-  0x3c56, 0x8f1e, 0x3af2, 0x8e62, 0x398c, 0x8dab, 0x3824, 0x8cf9,
-  0x36ba, 0x8c4b, 0x354d, 0x8ba1, 0x33de, 0x8afc, 0x326e, 0x8a5b,
-  0x30fb, 0x89bf, 0x2f87, 0x8927, 0x2e11, 0x8894, 0x2c98, 0x8806,
-  0x2b1f, 0x877c, 0x29a3, 0x86f7, 0x2826, 0x8676, 0x26a8, 0x85fb,
-  0x2528, 0x8583, 0x23a6, 0x8511, 0x2223, 0x84a3, 0x209f, 0x843b,
-  0x1f19, 0x83d7, 0x1d93, 0x8377, 0x1c0b, 0x831d, 0x1a82, 0x82c7,
-  0x18f8, 0x8276, 0x176d, 0x822a, 0x15e2, 0x81e3, 0x1455, 0x81a1,
-  0x12c8, 0x8163, 0x1139, 0x812b, 0xfab, 0x80f7, 0xe1b, 0x80c8,
-  0xc8b, 0x809e, 0xafb, 0x8079, 0x96a, 0x8059, 0x7d9, 0x803e,
-  0x647, 0x8028, 0x4b6, 0x8017, 0x324, 0x800a, 0x192, 0x8003,
-};
-
-static const q15_t ALIGN4 WeightsQ15_512[1024] = {
-  0x7fff, 0x0, 0x7fff, 0xff9c, 0x7fff, 0xff37, 0x7ffe, 0xfed3,
-  0x7ffd, 0xfe6e, 0x7ffc, 0xfe0a, 0x7ffa, 0xfda5, 0x7ff8, 0xfd41,
-  0x7ff6, 0xfcdc, 0x7ff3, 0xfc78, 0x7ff0, 0xfc13, 0x7fed, 0xfbaf,
-  0x7fe9, 0xfb4a, 0x7fe5, 0xfae6, 0x7fe1, 0xfa81, 0x7fdd, 0xfa1d,
-  0x7fd8, 0xf9b9, 0x7fd3, 0xf954, 0x7fce, 0xf8f0, 0x7fc8, 0xf88b,
-  0x7fc2, 0xf827, 0x7fbc, 0xf7c3, 0x7fb5, 0xf75e, 0x7fae, 0xf6fa,
-  0x7fa7, 0xf696, 0x7f9f, 0xf632, 0x7f97, 0xf5cd, 0x7f8f, 0xf569,
-  0x7f87, 0xf505, 0x7f7e, 0xf4a1, 0x7f75, 0xf43d, 0x7f6b, 0xf3d9,
-  0x7f62, 0xf375, 0x7f58, 0xf311, 0x7f4d, 0xf2ad, 0x7f43, 0xf249,
-  0x7f38, 0xf1e5, 0x7f2d, 0xf181, 0x7f21, 0xf11d, 0x7f15, 0xf0b9,
-  0x7f09, 0xf055, 0x7efd, 0xeff2, 0x7ef0, 0xef8e, 0x7ee3, 0xef2a,
-  0x7ed5, 0xeec7, 0x7ec8, 0xee63, 0x7eba, 0xedff, 0x7eab, 0xed9c,
-  0x7e9d, 0xed38, 0x7e8e, 0xecd5, 0x7e7f, 0xec72, 0x7e6f, 0xec0e,
-  0x7e5f, 0xebab, 0x7e4f, 0xeb48, 0x7e3f, 0xeae5, 0x7e2e, 0xea81,
-  0x7e1d, 0xea1e, 0x7e0c, 0xe9bb, 0x7dfa, 0xe958, 0x7de8, 0xe8f6,
-  0x7dd6, 0xe893, 0x7dc3, 0xe830, 0x7db0, 0xe7cd, 0x7d9d, 0xe76a,
-  0x7d8a, 0xe708, 0x7d76, 0xe6a5, 0x7d62, 0xe643, 0x7d4e, 0xe5e0,
-  0x7d39, 0xe57e, 0x7d24, 0xe51c, 0x7d0f, 0xe4b9, 0x7cf9, 0xe457,
-  0x7ce3, 0xe3f5, 0x7ccd, 0xe393, 0x7cb7, 0xe331, 0x7ca0, 0xe2cf,
-  0x7c89, 0xe26d, 0x7c71, 0xe20b, 0x7c5a, 0xe1aa, 0x7c42, 0xe148,
-  0x7c29, 0xe0e7, 0x7c11, 0xe085, 0x7bf8, 0xe024, 0x7bdf, 0xdfc2,
-  0x7bc5, 0xdf61, 0x7bac, 0xdf00, 0x7b92, 0xde9f, 0x7b77, 0xde3e,
-  0x7b5d, 0xdddd, 0x7b42, 0xdd7c, 0x7b26, 0xdd1b, 0x7b0b, 0xdcbb,
-  0x7aef, 0xdc5a, 0x7ad3, 0xdbf9, 0x7ab6, 0xdb99, 0x7a9a, 0xdb39,
-  0x7a7d, 0xdad8, 0x7a5f, 0xda78, 0x7a42, 0xda18, 0x7a24, 0xd9b8,
-  0x7a05, 0xd958, 0x79e7, 0xd8f9, 0x79c8, 0xd899, 0x79a9, 0xd839,
-  0x798a, 0xd7da, 0x796a, 0xd77a, 0x794a, 0xd71b, 0x792a, 0xd6bc,
-  0x7909, 0xd65d, 0x78e8, 0xd5fe, 0x78c7, 0xd59f, 0x78a6, 0xd540,
-  0x7884, 0xd4e1, 0x7862, 0xd483, 0x7840, 0xd424, 0x781d, 0xd3c6,
-  0x77fa, 0xd368, 0x77d7, 0xd309, 0x77b4, 0xd2ab, 0x7790, 0xd24d,
-  0x776c, 0xd1ef, 0x7747, 0xd192, 0x7723, 0xd134, 0x76fe, 0xd0d7,
-  0x76d9, 0xd079, 0x76b3, 0xd01c, 0x768e, 0xcfbf, 0x7668, 0xcf62,
-  0x7641, 0xcf05, 0x761b, 0xcea8, 0x75f4, 0xce4b, 0x75cc, 0xcdef,
-  0x75a5, 0xcd92, 0x757d, 0xcd36, 0x7555, 0xccda, 0x752d, 0xcc7e,
-  0x7504, 0xcc22, 0x74db, 0xcbc6, 0x74b2, 0xcb6a, 0x7489, 0xcb0e,
-  0x745f, 0xcab3, 0x7435, 0xca58, 0x740b, 0xc9fc, 0x73e0, 0xc9a1,
-  0x73b5, 0xc946, 0x738a, 0xc8ec, 0x735f, 0xc891, 0x7333, 0xc836,
-  0x7307, 0xc7dc, 0x72db, 0xc782, 0x72af, 0xc728, 0x7282, 0xc6ce,
-  0x7255, 0xc674, 0x7227, 0xc61a, 0x71fa, 0xc5c0, 0x71cc, 0xc567,
-  0x719e, 0xc50e, 0x716f, 0xc4b4, 0x7141, 0xc45b, 0x7112, 0xc403,
-  0x70e2, 0xc3aa, 0x70b3, 0xc351, 0x7083, 0xc2f9, 0x7053, 0xc2a0,
-  0x7023, 0xc248, 0x6ff2, 0xc1f0, 0x6fc1, 0xc198, 0x6f90, 0xc141,
-  0x6f5f, 0xc0e9, 0x6f2d, 0xc092, 0x6efb, 0xc03b, 0x6ec9, 0xbfe3,
-  0x6e96, 0xbf8d, 0x6e63, 0xbf36, 0x6e30, 0xbedf, 0x6dfd, 0xbe89,
-  0x6dca, 0xbe32, 0x6d96, 0xbddc, 0x6d62, 0xbd86, 0x6d2d, 0xbd30,
-  0x6cf9, 0xbcdb, 0x6cc4, 0xbc85, 0x6c8f, 0xbc30, 0x6c59, 0xbbdb,
-  0x6c24, 0xbb86, 0x6bee, 0xbb31, 0x6bb8, 0xbadc, 0x6b81, 0xba88,
-  0x6b4a, 0xba33, 0x6b13, 0xb9df, 0x6adc, 0xb98b, 0x6aa5, 0xb937,
-  0x6a6d, 0xb8e4, 0x6a35, 0xb890, 0x69fd, 0xb83d, 0x69c4, 0xb7ea,
-  0x698c, 0xb797, 0x6953, 0xb744, 0x6919, 0xb6f1, 0x68e0, 0xb69f,
-  0x68a6, 0xb64c, 0x686c, 0xb5fa, 0x6832, 0xb5a8, 0x67f7, 0xb557,
-  0x67bd, 0xb505, 0x6782, 0xb4b4, 0x6746, 0xb462, 0x670b, 0xb411,
-  0x66cf, 0xb3c1, 0x6693, 0xb370, 0x6657, 0xb31f, 0x661a, 0xb2cf,
-  0x65dd, 0xb27f, 0x65a0, 0xb22f, 0x6563, 0xb1df, 0x6526, 0xb190,
-  0x64e8, 0xb141, 0x64aa, 0xb0f1, 0x646c, 0xb0a2, 0x642d, 0xb054,
-  0x63ef, 0xb005, 0x63b0, 0xafb7, 0x6371, 0xaf69, 0x6331, 0xaf1b,
-  0x62f2, 0xaecd, 0x62b2, 0xae7f, 0x6271, 0xae32, 0x6231, 0xade4,
-  0x61f1, 0xad97, 0x61b0, 0xad4b, 0x616f, 0xacfe, 0x612d, 0xacb2,
-  0x60ec, 0xac65, 0x60aa, 0xac19, 0x6068, 0xabcd, 0x6026, 0xab82,
-  0x5fe3, 0xab36, 0x5fa0, 0xaaeb, 0x5f5e, 0xaaa0, 0x5f1a, 0xaa55,
-  0x5ed7, 0xaa0b, 0x5e93, 0xa9c0, 0x5e50, 0xa976, 0x5e0b, 0xa92c,
-  0x5dc7, 0xa8e3, 0x5d83, 0xa899, 0x5d3e, 0xa850, 0x5cf9, 0xa807,
-  0x5cb4, 0xa7be, 0x5c6e, 0xa775, 0x5c29, 0xa72c, 0x5be3, 0xa6e4,
-  0x5b9d, 0xa69c, 0x5b56, 0xa654, 0x5b10, 0xa60d, 0x5ac9, 0xa5c5,
-  0x5a82, 0xa57e, 0x5a3b, 0xa537, 0x59f3, 0xa4f0, 0x59ac, 0xa4aa,
-  0x5964, 0xa463, 0x591c, 0xa41d, 0x58d4, 0xa3d7, 0x588b, 0xa392,
-  0x5842, 0xa34c, 0x57f9, 0xa307, 0x57b0, 0xa2c2, 0x5767, 0xa27d,
-  0x571d, 0xa239, 0x56d4, 0xa1f5, 0x568a, 0xa1b0, 0x5640, 0xa16d,
-  0x55f5, 0xa129, 0x55ab, 0xa0e6, 0x5560, 0xa0a2, 0x5515, 0xa060,
-  0x54ca, 0xa01d, 0x547e, 0x9fda, 0x5433, 0x9f98, 0x53e7, 0x9f56,
-  0x539b, 0x9f14, 0x534e, 0x9ed3, 0x5302, 0x9e91, 0x52b5, 0x9e50,
-  0x5269, 0x9e0f, 0x521c, 0x9dcf, 0x51ce, 0x9d8f, 0x5181, 0x9d4e,
-  0x5133, 0x9d0e, 0x50e5, 0x9ccf, 0x5097, 0x9c8f, 0x5049, 0x9c50,
-  0x4ffb, 0x9c11, 0x4fac, 0x9bd3, 0x4f5e, 0x9b94, 0x4f0f, 0x9b56,
-  0x4ebf, 0x9b18, 0x4e70, 0x9ada, 0x4e21, 0x9a9d, 0x4dd1, 0x9a60,
-  0x4d81, 0x9a23, 0x4d31, 0x99e6, 0x4ce1, 0x99a9, 0x4c90, 0x996d,
-  0x4c3f, 0x9931, 0x4bef, 0x98f5, 0x4b9e, 0x98ba, 0x4b4c, 0x987e,
-  0x4afb, 0x9843, 0x4aa9, 0x9809, 0x4a58, 0x97ce, 0x4a06, 0x9794,
-  0x49b4, 0x975a, 0x4961, 0x9720, 0x490f, 0x96e7, 0x48bc, 0x96ad,
-  0x4869, 0x9674, 0x4816, 0x963c, 0x47c3, 0x9603, 0x4770, 0x95cb,
-  0x471c, 0x9593, 0x46c9, 0x955b, 0x4675, 0x9524, 0x4621, 0x94ed,
-  0x45cd, 0x94b6, 0x4578, 0x947f, 0x4524, 0x9448, 0x44cf, 0x9412,
-  0x447a, 0x93dc, 0x4425, 0x93a7, 0x43d0, 0x9371, 0x437b, 0x933c,
-  0x4325, 0x9307, 0x42d0, 0x92d3, 0x427a, 0x929e, 0x4224, 0x926a,
-  0x41ce, 0x9236, 0x4177, 0x9203, 0x4121, 0x91d0, 0x40ca, 0x919d,
-  0x4073, 0x916a, 0x401d, 0x9137, 0x3fc5, 0x9105, 0x3f6e, 0x90d3,
-  0x3f17, 0x90a1, 0x3ebf, 0x9070, 0x3e68, 0x903f, 0x3e10, 0x900e,
-  0x3db8, 0x8fdd, 0x3d60, 0x8fad, 0x3d07, 0x8f7d, 0x3caf, 0x8f4d,
-  0x3c56, 0x8f1e, 0x3bfd, 0x8eee, 0x3ba5, 0x8ebf, 0x3b4c, 0x8e91,
-  0x3af2, 0x8e62, 0x3a99, 0x8e34, 0x3a40, 0x8e06, 0x39e6, 0x8dd9,
-  0x398c, 0x8dab, 0x3932, 0x8d7e, 0x38d8, 0x8d51, 0x387e, 0x8d25,
-  0x3824, 0x8cf9, 0x37ca, 0x8ccd, 0x376f, 0x8ca1, 0x3714, 0x8c76,
-  0x36ba, 0x8c4b, 0x365f, 0x8c20, 0x3604, 0x8bf5, 0x35a8, 0x8bcb,
-  0x354d, 0x8ba1, 0x34f2, 0x8b77, 0x3496, 0x8b4e, 0x343a, 0x8b25,
-  0x33de, 0x8afc, 0x3382, 0x8ad3, 0x3326, 0x8aab, 0x32ca, 0x8a83,
-  0x326e, 0x8a5b, 0x3211, 0x8a34, 0x31b5, 0x8a0c, 0x3158, 0x89e5,
-  0x30fb, 0x89bf, 0x309e, 0x8998, 0x3041, 0x8972, 0x2fe4, 0x894d,
-  0x2f87, 0x8927, 0x2f29, 0x8902, 0x2ecc, 0x88dd, 0x2e6e, 0x88b9,
-  0x2e11, 0x8894, 0x2db3, 0x8870, 0x2d55, 0x884c, 0x2cf7, 0x8829,
-  0x2c98, 0x8806, 0x2c3a, 0x87e3, 0x2bdc, 0x87c0, 0x2b7d, 0x879e,
-  0x2b1f, 0x877c, 0x2ac0, 0x875a, 0x2a61, 0x8739, 0x2a02, 0x8718,
-  0x29a3, 0x86f7, 0x2944, 0x86d6, 0x28e5, 0x86b6, 0x2886, 0x8696,
-  0x2826, 0x8676, 0x27c7, 0x8657, 0x2767, 0x8638, 0x2707, 0x8619,
-  0x26a8, 0x85fb, 0x2648, 0x85dc, 0x25e8, 0x85be, 0x2588, 0x85a1,
-  0x2528, 0x8583, 0x24c7, 0x8566, 0x2467, 0x854a, 0x2407, 0x852d,
-  0x23a6, 0x8511, 0x2345, 0x84f5, 0x22e5, 0x84da, 0x2284, 0x84be,
-  0x2223, 0x84a3, 0x21c2, 0x8489, 0x2161, 0x846e, 0x2100, 0x8454,
-  0x209f, 0x843b, 0x203e, 0x8421, 0x1fdc, 0x8408, 0x1f7b, 0x83ef,
-  0x1f19, 0x83d7, 0x1eb8, 0x83be, 0x1e56, 0x83a6, 0x1df5, 0x838f,
-  0x1d93, 0x8377, 0x1d31, 0x8360, 0x1ccf, 0x8349, 0x1c6d, 0x8333,
-  0x1c0b, 0x831d, 0x1ba9, 0x8307, 0x1b47, 0x82f1, 0x1ae4, 0x82dc,
-  0x1a82, 0x82c7, 0x1a20, 0x82b2, 0x19bd, 0x829e, 0x195b, 0x828a,
-  0x18f8, 0x8276, 0x1896, 0x8263, 0x1833, 0x8250, 0x17d0, 0x823d,
-  0x176d, 0x822a, 0x170a, 0x8218, 0x16a8, 0x8206, 0x1645, 0x81f4,
-  0x15e2, 0x81e3, 0x157f, 0x81d2, 0x151b, 0x81c1, 0x14b8, 0x81b1,
-  0x1455, 0x81a1, 0x13f2, 0x8191, 0x138e, 0x8181, 0x132b, 0x8172,
-  0x12c8, 0x8163, 0x1264, 0x8155, 0x1201, 0x8146, 0x119d, 0x8138,
-  0x1139, 0x812b, 0x10d6, 0x811d, 0x1072, 0x8110, 0x100e, 0x8103,
-  0xfab, 0x80f7, 0xf47, 0x80eb, 0xee3, 0x80df, 0xe7f, 0x80d3,
-  0xe1b, 0x80c8, 0xdb7, 0x80bd, 0xd53, 0x80b3, 0xcef, 0x80a8,
-  0xc8b, 0x809e, 0xc27, 0x8095, 0xbc3, 0x808b, 0xb5f, 0x8082,
-  0xafb, 0x8079, 0xa97, 0x8071, 0xa33, 0x8069, 0x9ce, 0x8061,
-  0x96a, 0x8059, 0x906, 0x8052, 0x8a2, 0x804b, 0x83d, 0x8044,
-  0x7d9, 0x803e, 0x775, 0x8038, 0x710, 0x8032, 0x6ac, 0x802d,
-  0x647, 0x8028, 0x5e3, 0x8023, 0x57f, 0x801f, 0x51a, 0x801b,
-  0x4b6, 0x8017, 0x451, 0x8013, 0x3ed, 0x8010, 0x388, 0x800d,
-  0x324, 0x800a, 0x2bf, 0x8008, 0x25b, 0x8006, 0x1f6, 0x8004,
-  0x192, 0x8003, 0x12d, 0x8002, 0xc9, 0x8001, 0x64, 0x8001,
-};
-
-static const q15_t ALIGN4 WeightsQ15_2048[4096] = {
-  0x7fff, 0x0, 0x7fff, 0xffe7, 0x7fff, 0xffce, 0x7fff, 0xffb5,
-  0x7fff, 0xff9c, 0x7fff, 0xff83, 0x7fff, 0xff6a, 0x7fff, 0xff51,
-  0x7fff, 0xff37, 0x7fff, 0xff1e, 0x7fff, 0xff05, 0x7ffe, 0xfeec,
-  0x7ffe, 0xfed3, 0x7ffe, 0xfeba, 0x7ffe, 0xfea1, 0x7ffd, 0xfe88,
-  0x7ffd, 0xfe6e, 0x7ffd, 0xfe55, 0x7ffc, 0xfe3c, 0x7ffc, 0xfe23,
-  0x7ffc, 0xfe0a, 0x7ffb, 0xfdf1, 0x7ffb, 0xfdd8, 0x7ffa, 0xfdbe,
-  0x7ffa, 0xfda5, 0x7ff9, 0xfd8c, 0x7ff9, 0xfd73, 0x7ff8, 0xfd5a,
-  0x7ff8, 0xfd41, 0x7ff7, 0xfd28, 0x7ff7, 0xfd0f, 0x7ff6, 0xfcf5,
-  0x7ff6, 0xfcdc, 0x7ff5, 0xfcc3, 0x7ff4, 0xfcaa, 0x7ff4, 0xfc91,
-  0x7ff3, 0xfc78, 0x7ff2, 0xfc5f, 0x7ff2, 0xfc46, 0x7ff1, 0xfc2c,
-  0x7ff0, 0xfc13, 0x7fef, 0xfbfa, 0x7fee, 0xfbe1, 0x7fee, 0xfbc8,
-  0x7fed, 0xfbaf, 0x7fec, 0xfb96, 0x7feb, 0xfb7d, 0x7fea, 0xfb64,
-  0x7fe9, 0xfb4a, 0x7fe8, 0xfb31, 0x7fe7, 0xfb18, 0x7fe6, 0xfaff,
-  0x7fe5, 0xfae6, 0x7fe4, 0xfacd, 0x7fe3, 0xfab4, 0x7fe2, 0xfa9b,
-  0x7fe1, 0xfa81, 0x7fe0, 0xfa68, 0x7fdf, 0xfa4f, 0x7fde, 0xfa36,
-  0x7fdd, 0xfa1d, 0x7fdc, 0xfa04, 0x7fda, 0xf9eb, 0x7fd9, 0xf9d2,
-  0x7fd8, 0xf9b9, 0x7fd7, 0xf9a0, 0x7fd6, 0xf986, 0x7fd4, 0xf96d,
-  0x7fd3, 0xf954, 0x7fd2, 0xf93b, 0x7fd0, 0xf922, 0x7fcf, 0xf909,
-  0x7fce, 0xf8f0, 0x7fcc, 0xf8d7, 0x7fcb, 0xf8be, 0x7fc9, 0xf8a5,
-  0x7fc8, 0xf88b, 0x7fc6, 0xf872, 0x7fc5, 0xf859, 0x7fc3, 0xf840,
-  0x7fc2, 0xf827, 0x7fc0, 0xf80e, 0x7fbf, 0xf7f5, 0x7fbd, 0xf7dc,
-  0x7fbc, 0xf7c3, 0x7fba, 0xf7aa, 0x7fb8, 0xf791, 0x7fb7, 0xf778,
-  0x7fb5, 0xf75e, 0x7fb3, 0xf745, 0x7fb1, 0xf72c, 0x7fb0, 0xf713,
-  0x7fae, 0xf6fa, 0x7fac, 0xf6e1, 0x7faa, 0xf6c8, 0x7fa9, 0xf6af,
-  0x7fa7, 0xf696, 0x7fa5, 0xf67d, 0x7fa3, 0xf664, 0x7fa1, 0xf64b,
-  0x7f9f, 0xf632, 0x7f9d, 0xf619, 0x7f9b, 0xf600, 0x7f99, 0xf5e7,
-  0x7f97, 0xf5cd, 0x7f95, 0xf5b4, 0x7f93, 0xf59b, 0x7f91, 0xf582,
-  0x7f8f, 0xf569, 0x7f8d, 0xf550, 0x7f8b, 0xf537, 0x7f89, 0xf51e,
-  0x7f87, 0xf505, 0x7f85, 0xf4ec, 0x7f82, 0xf4d3, 0x7f80, 0xf4ba,
-  0x7f7e, 0xf4a1, 0x7f7c, 0xf488, 0x7f79, 0xf46f, 0x7f77, 0xf456,
-  0x7f75, 0xf43d, 0x7f72, 0xf424, 0x7f70, 0xf40b, 0x7f6e, 0xf3f2,
-  0x7f6b, 0xf3d9, 0x7f69, 0xf3c0, 0x7f67, 0xf3a7, 0x7f64, 0xf38e,
-  0x7f62, 0xf375, 0x7f5f, 0xf35c, 0x7f5d, 0xf343, 0x7f5a, 0xf32a,
-  0x7f58, 0xf311, 0x7f55, 0xf2f8, 0x7f53, 0xf2df, 0x7f50, 0xf2c6,
-  0x7f4d, 0xf2ad, 0x7f4b, 0xf294, 0x7f48, 0xf27b, 0x7f45, 0xf262,
-  0x7f43, 0xf249, 0x7f40, 0xf230, 0x7f3d, 0xf217, 0x7f3b, 0xf1fe,
-  0x7f38, 0xf1e5, 0x7f35, 0xf1cc, 0x7f32, 0xf1b3, 0x7f2f, 0xf19a,
-  0x7f2d, 0xf181, 0x7f2a, 0xf168, 0x7f27, 0xf14f, 0x7f24, 0xf136,
-  0x7f21, 0xf11d, 0x7f1e, 0xf104, 0x7f1b, 0xf0eb, 0x7f18, 0xf0d2,
-  0x7f15, 0xf0b9, 0x7f12, 0xf0a0, 0x7f0f, 0xf087, 0x7f0c, 0xf06e,
-  0x7f09, 0xf055, 0x7f06, 0xf03c, 0x7f03, 0xf023, 0x7f00, 0xf00b,
-  0x7efd, 0xeff2, 0x7ef9, 0xefd9, 0x7ef6, 0xefc0, 0x7ef3, 0xefa7,
-  0x7ef0, 0xef8e, 0x7eed, 0xef75, 0x7ee9, 0xef5c, 0x7ee6, 0xef43,
-  0x7ee3, 0xef2a, 0x7edf, 0xef11, 0x7edc, 0xeef8, 0x7ed9, 0xeedf,
-  0x7ed5, 0xeec7, 0x7ed2, 0xeeae, 0x7ecf, 0xee95, 0x7ecb, 0xee7c,
-  0x7ec8, 0xee63, 0x7ec4, 0xee4a, 0x7ec1, 0xee31, 0x7ebd, 0xee18,
-  0x7eba, 0xedff, 0x7eb6, 0xede7, 0x7eb3, 0xedce, 0x7eaf, 0xedb5,
-  0x7eab, 0xed9c, 0x7ea8, 0xed83, 0x7ea4, 0xed6a, 0x7ea1, 0xed51,
-  0x7e9d, 0xed38, 0x7e99, 0xed20, 0x7e95, 0xed07, 0x7e92, 0xecee,
-  0x7e8e, 0xecd5, 0x7e8a, 0xecbc, 0x7e86, 0xeca3, 0x7e83, 0xec8a,
-  0x7e7f, 0xec72, 0x7e7b, 0xec59, 0x7e77, 0xec40, 0x7e73, 0xec27,
-  0x7e6f, 0xec0e, 0x7e6b, 0xebf5, 0x7e67, 0xebdd, 0x7e63, 0xebc4,
-  0x7e5f, 0xebab, 0x7e5b, 0xeb92, 0x7e57, 0xeb79, 0x7e53, 0xeb61,
-  0x7e4f, 0xeb48, 0x7e4b, 0xeb2f, 0x7e47, 0xeb16, 0x7e43, 0xeafd,
-  0x7e3f, 0xeae5, 0x7e3b, 0xeacc, 0x7e37, 0xeab3, 0x7e32, 0xea9a,
-  0x7e2e, 0xea81, 0x7e2a, 0xea69, 0x7e26, 0xea50, 0x7e21, 0xea37,
-  0x7e1d, 0xea1e, 0x7e19, 0xea06, 0x7e14, 0xe9ed, 0x7e10, 0xe9d4,
-  0x7e0c, 0xe9bb, 0x7e07, 0xe9a3, 0x7e03, 0xe98a, 0x7dff, 0xe971,
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-  0x2d55, 0x884c, 0x2d3d, 0x8844, 0x2d26, 0x883b, 0x2d0e, 0x8832,
-  0x2cf7, 0x8829, 0x2cdf, 0x8820, 0x2cc8, 0x8817, 0x2cb0, 0x880f,
-  0x2c98, 0x8806, 0x2c81, 0x87fd, 0x2c69, 0x87f4, 0x2c52, 0x87ec,
-  0x2c3a, 0x87e3, 0x2c23, 0x87da, 0x2c0b, 0x87d2, 0x2bf3, 0x87c9,
-  0x2bdc, 0x87c0, 0x2bc4, 0x87b8, 0x2bad, 0x87af, 0x2b95, 0x87a7,
-  0x2b7d, 0x879e, 0x2b66, 0x8795, 0x2b4e, 0x878d, 0x2b36, 0x8784,
-  0x2b1f, 0x877c, 0x2b07, 0x8774, 0x2aef, 0x876b, 0x2ad8, 0x8763,
-  0x2ac0, 0x875a, 0x2aa8, 0x8752, 0x2a91, 0x874a, 0x2a79, 0x8741,
-  0x2a61, 0x8739, 0x2a49, 0x8731, 0x2a32, 0x8728, 0x2a1a, 0x8720,
-  0x2a02, 0x8718, 0x29eb, 0x870f, 0x29d3, 0x8707, 0x29bb, 0x86ff,
-  0x29a3, 0x86f7, 0x298b, 0x86ef, 0x2974, 0x86e7, 0x295c, 0x86de,
-  0x2944, 0x86d6, 0x292c, 0x86ce, 0x2915, 0x86c6, 0x28fd, 0x86be,
-  0x28e5, 0x86b6, 0x28cd, 0x86ae, 0x28b5, 0x86a6, 0x289d, 0x869e,
-  0x2886, 0x8696, 0x286e, 0x868e, 0x2856, 0x8686, 0x283e, 0x867e,
-  0x2826, 0x8676, 0x280e, 0x866e, 0x27f6, 0x8667, 0x27df, 0x865f,
-  0x27c7, 0x8657, 0x27af, 0x864f, 0x2797, 0x8647, 0x277f, 0x8640,
-  0x2767, 0x8638, 0x274f, 0x8630, 0x2737, 0x8628, 0x271f, 0x8621,
-  0x2707, 0x8619, 0x26ef, 0x8611, 0x26d8, 0x860a, 0x26c0, 0x8602,
-  0x26a8, 0x85fb, 0x2690, 0x85f3, 0x2678, 0x85eb, 0x2660, 0x85e4,
-  0x2648, 0x85dc, 0x2630, 0x85d5, 0x2618, 0x85cd, 0x2600, 0x85c6,
-  0x25e8, 0x85be, 0x25d0, 0x85b7, 0x25b8, 0x85b0, 0x25a0, 0x85a8,
-  0x2588, 0x85a1, 0x2570, 0x8599, 0x2558, 0x8592, 0x2540, 0x858b,
-  0x2528, 0x8583, 0x250f, 0x857c, 0x24f7, 0x8575, 0x24df, 0x856e,
-  0x24c7, 0x8566, 0x24af, 0x855f, 0x2497, 0x8558, 0x247f, 0x8551,
-  0x2467, 0x854a, 0x244f, 0x8543, 0x2437, 0x853b, 0x241f, 0x8534,
-  0x2407, 0x852d, 0x23ee, 0x8526, 0x23d6, 0x851f, 0x23be, 0x8518,
-  0x23a6, 0x8511, 0x238e, 0x850a, 0x2376, 0x8503, 0x235e, 0x84fc,
-  0x2345, 0x84f5, 0x232d, 0x84ee, 0x2315, 0x84e7, 0x22fd, 0x84e1,
-  0x22e5, 0x84da, 0x22cd, 0x84d3, 0x22b4, 0x84cc, 0x229c, 0x84c5,
-  0x2284, 0x84be, 0x226c, 0x84b8, 0x2254, 0x84b1, 0x223b, 0x84aa,
-  0x2223, 0x84a3, 0x220b, 0x849d, 0x21f3, 0x8496, 0x21da, 0x848f,
-  0x21c2, 0x8489, 0x21aa, 0x8482, 0x2192, 0x847c, 0x2179, 0x8475,
-  0x2161, 0x846e, 0x2149, 0x8468, 0x2131, 0x8461, 0x2118, 0x845b,
-  0x2100, 0x8454, 0x20e8, 0x844e, 0x20d0, 0x8447, 0x20b7, 0x8441,
-  0x209f, 0x843b, 0x2087, 0x8434, 0x206e, 0x842e, 0x2056, 0x8427,
-  0x203e, 0x8421, 0x2025, 0x841b, 0x200d, 0x8415, 0x1ff5, 0x840e,
-  0x1fdc, 0x8408, 0x1fc4, 0x8402, 0x1fac, 0x83fb, 0x1f93, 0x83f5,
-  0x1f7b, 0x83ef, 0x1f63, 0x83e9, 0x1f4a, 0x83e3, 0x1f32, 0x83dd,
-  0x1f19, 0x83d7, 0x1f01, 0x83d0, 0x1ee9, 0x83ca, 0x1ed0, 0x83c4,
-  0x1eb8, 0x83be, 0x1ea0, 0x83b8, 0x1e87, 0x83b2, 0x1e6f, 0x83ac,
-  0x1e56, 0x83a6, 0x1e3e, 0x83a0, 0x1e25, 0x839a, 0x1e0d, 0x8394,
-  0x1df5, 0x838f, 0x1ddc, 0x8389, 0x1dc4, 0x8383, 0x1dab, 0x837d,
-  0x1d93, 0x8377, 0x1d7a, 0x8371, 0x1d62, 0x836c, 0x1d49, 0x8366,
-  0x1d31, 0x8360, 0x1d18, 0x835a, 0x1d00, 0x8355, 0x1ce8, 0x834f,
-  0x1ccf, 0x8349, 0x1cb7, 0x8344, 0x1c9e, 0x833e, 0x1c86, 0x8338,
-  0x1c6d, 0x8333, 0x1c55, 0x832d, 0x1c3c, 0x8328, 0x1c24, 0x8322,
-  0x1c0b, 0x831d, 0x1bf2, 0x8317, 0x1bda, 0x8312, 0x1bc1, 0x830c,
-  0x1ba9, 0x8307, 0x1b90, 0x8301, 0x1b78, 0x82fc, 0x1b5f, 0x82f7,
-  0x1b47, 0x82f1, 0x1b2e, 0x82ec, 0x1b16, 0x82e7, 0x1afd, 0x82e1,
-  0x1ae4, 0x82dc, 0x1acc, 0x82d7, 0x1ab3, 0x82d1, 0x1a9b, 0x82cc,
-  0x1a82, 0x82c7, 0x1a6a, 0x82c2, 0x1a51, 0x82bd, 0x1a38, 0x82b7,
-  0x1a20, 0x82b2, 0x1a07, 0x82ad, 0x19ef, 0x82a8, 0x19d6, 0x82a3,
-  0x19bd, 0x829e, 0x19a5, 0x8299, 0x198c, 0x8294, 0x1973, 0x828f,
-  0x195b, 0x828a, 0x1942, 0x8285, 0x192a, 0x8280, 0x1911, 0x827b,
-  0x18f8, 0x8276, 0x18e0, 0x8271, 0x18c7, 0x826c, 0x18ae, 0x8268,
-  0x1896, 0x8263, 0x187d, 0x825e, 0x1864, 0x8259, 0x184c, 0x8254,
-  0x1833, 0x8250, 0x181a, 0x824b, 0x1802, 0x8246, 0x17e9, 0x8241,
-  0x17d0, 0x823d, 0x17b7, 0x8238, 0x179f, 0x8233, 0x1786, 0x822f,
-  0x176d, 0x822a, 0x1755, 0x8226, 0x173c, 0x8221, 0x1723, 0x821c,
-  0x170a, 0x8218, 0x16f2, 0x8213, 0x16d9, 0x820f, 0x16c0, 0x820a,
-  0x16a8, 0x8206, 0x168f, 0x8201, 0x1676, 0x81fd, 0x165d, 0x81f9,
-  0x1645, 0x81f4, 0x162c, 0x81f0, 0x1613, 0x81ec, 0x15fa, 0x81e7,
-  0x15e2, 0x81e3, 0x15c9, 0x81df, 0x15b0, 0x81da, 0x1597, 0x81d6,
-  0x157f, 0x81d2, 0x1566, 0x81ce, 0x154d, 0x81c9, 0x1534, 0x81c5,
-  0x151b, 0x81c1, 0x1503, 0x81bd, 0x14ea, 0x81b9, 0x14d1, 0x81b5,
-  0x14b8, 0x81b1, 0x149f, 0x81ad, 0x1487, 0x81a9, 0x146e, 0x81a5,
-  0x1455, 0x81a1, 0x143c, 0x819d, 0x1423, 0x8199, 0x140b, 0x8195,
-  0x13f2, 0x8191, 0x13d9, 0x818d, 0x13c0, 0x8189, 0x13a7, 0x8185,
-  0x138e, 0x8181, 0x1376, 0x817d, 0x135d, 0x817a, 0x1344, 0x8176,
-  0x132b, 0x8172, 0x1312, 0x816e, 0x12f9, 0x816b, 0x12e0, 0x8167,
-  0x12c8, 0x8163, 0x12af, 0x815f, 0x1296, 0x815c, 0x127d, 0x8158,
-  0x1264, 0x8155, 0x124b, 0x8151, 0x1232, 0x814d, 0x1219, 0x814a,
-  0x1201, 0x8146, 0x11e8, 0x8143, 0x11cf, 0x813f, 0x11b6, 0x813c,
-  0x119d, 0x8138, 0x1184, 0x8135, 0x116b, 0x8131, 0x1152, 0x812e,
-  0x1139, 0x812b, 0x1121, 0x8127, 0x1108, 0x8124, 0x10ef, 0x8121,
-  0x10d6, 0x811d, 0x10bd, 0x811a, 0x10a4, 0x8117, 0x108b, 0x8113,
-  0x1072, 0x8110, 0x1059, 0x810d, 0x1040, 0x810a, 0x1027, 0x8107,
-  0x100e, 0x8103, 0xff5, 0x8100, 0xfdd, 0x80fd, 0xfc4, 0x80fa,
-  0xfab, 0x80f7, 0xf92, 0x80f4, 0xf79, 0x80f1, 0xf60, 0x80ee,
-  0xf47, 0x80eb, 0xf2e, 0x80e8, 0xf15, 0x80e5, 0xefc, 0x80e2,
-  0xee3, 0x80df, 0xeca, 0x80dc, 0xeb1, 0x80d9, 0xe98, 0x80d6,
-  0xe7f, 0x80d3, 0xe66, 0x80d1, 0xe4d, 0x80ce, 0xe34, 0x80cb,
-  0xe1b, 0x80c8, 0xe02, 0x80c5, 0xde9, 0x80c3, 0xdd0, 0x80c0,
-  0xdb7, 0x80bd, 0xd9e, 0x80bb, 0xd85, 0x80b8, 0xd6c, 0x80b5,
-  0xd53, 0x80b3, 0xd3a, 0x80b0, 0xd21, 0x80ad, 0xd08, 0x80ab,
-  0xcef, 0x80a8, 0xcd6, 0x80a6, 0xcbd, 0x80a3, 0xca4, 0x80a1,
-  0xc8b, 0x809e, 0xc72, 0x809c, 0xc59, 0x8099, 0xc40, 0x8097,
-  0xc27, 0x8095, 0xc0e, 0x8092, 0xbf5, 0x8090, 0xbdc, 0x808e,
-  0xbc3, 0x808b, 0xbaa, 0x8089, 0xb91, 0x8087, 0xb78, 0x8084,
-  0xb5f, 0x8082, 0xb46, 0x8080, 0xb2d, 0x807e, 0xb14, 0x807b,
-  0xafb, 0x8079, 0xae2, 0x8077, 0xac9, 0x8075, 0xab0, 0x8073,
-  0xa97, 0x8071, 0xa7e, 0x806f, 0xa65, 0x806d, 0xa4c, 0x806b,
-  0xa33, 0x8069, 0xa19, 0x8067, 0xa00, 0x8065, 0x9e7, 0x8063,
-  0x9ce, 0x8061, 0x9b5, 0x805f, 0x99c, 0x805d, 0x983, 0x805b,
-  0x96a, 0x8059, 0x951, 0x8057, 0x938, 0x8056, 0x91f, 0x8054,
-  0x906, 0x8052, 0x8ed, 0x8050, 0x8d4, 0x804f, 0x8bb, 0x804d,
-  0x8a2, 0x804b, 0x888, 0x8049, 0x86f, 0x8048, 0x856, 0x8046,
-  0x83d, 0x8044, 0x824, 0x8043, 0x80b, 0x8041, 0x7f2, 0x8040,
-  0x7d9, 0x803e, 0x7c0, 0x803d, 0x7a7, 0x803b, 0x78e, 0x803a,
-  0x775, 0x8038, 0x75b, 0x8037, 0x742, 0x8035, 0x729, 0x8034,
-  0x710, 0x8032, 0x6f7, 0x8031, 0x6de, 0x8030, 0x6c5, 0x802e,
-  0x6ac, 0x802d, 0x693, 0x802c, 0x67a, 0x802a, 0x660, 0x8029,
-  0x647, 0x8028, 0x62e, 0x8027, 0x615, 0x8026, 0x5fc, 0x8024,
-  0x5e3, 0x8023, 0x5ca, 0x8022, 0x5b1, 0x8021, 0x598, 0x8020,
-  0x57f, 0x801f, 0x565, 0x801e, 0x54c, 0x801d, 0x533, 0x801c,
-  0x51a, 0x801b, 0x501, 0x801a, 0x4e8, 0x8019, 0x4cf, 0x8018,
-  0x4b6, 0x8017, 0x49c, 0x8016, 0x483, 0x8015, 0x46a, 0x8014,
-  0x451, 0x8013, 0x438, 0x8012, 0x41f, 0x8012, 0x406, 0x8011,
-  0x3ed, 0x8010, 0x3d4, 0x800f, 0x3ba, 0x800e, 0x3a1, 0x800e,
-  0x388, 0x800d, 0x36f, 0x800c, 0x356, 0x800c, 0x33d, 0x800b,
-  0x324, 0x800a, 0x30b, 0x800a, 0x2f1, 0x8009, 0x2d8, 0x8009,
-  0x2bf, 0x8008, 0x2a6, 0x8008, 0x28d, 0x8007, 0x274, 0x8007,
-  0x25b, 0x8006, 0x242, 0x8006, 0x228, 0x8005, 0x20f, 0x8005,
-  0x1f6, 0x8004, 0x1dd, 0x8004, 0x1c4, 0x8004, 0x1ab, 0x8003,
-  0x192, 0x8003, 0x178, 0x8003, 0x15f, 0x8002, 0x146, 0x8002,
-  0x12d, 0x8002, 0x114, 0x8002, 0xfb, 0x8001, 0xe2, 0x8001,
-  0xc9, 0x8001, 0xaf, 0x8001, 0x96, 0x8001, 0x7d, 0x8001,
-  0x64, 0x8001, 0x4b, 0x8001, 0x32, 0x8001, 0x19, 0x8001,
-};
-
-static const q15_t ALIGN4 WeightsQ15_8192[16384] = {
-  0x7fff, 0x0, 0x7fff, 0xfffa, 0x7fff, 0xfff4, 0x7fff, 0xffee,
-  0x7fff, 0xffe7, 0x7fff, 0xffe1, 0x7fff, 0xffdb, 0x7fff, 0xffd5,
-  0x7fff, 0xffce, 0x7fff, 0xffc8, 0x7fff, 0xffc2, 0x7fff, 0xffbb,
-  0x7fff, 0xffb5, 0x7fff, 0xffaf, 0x7fff, 0xffa9, 0x7fff, 0xffa2,
-  0x7fff, 0xff9c, 0x7fff, 0xff96, 0x7fff, 0xff8f, 0x7fff, 0xff89,
-  0x7fff, 0xff83, 0x7fff, 0xff7d, 0x7fff, 0xff76, 0x7fff, 0xff70,
-  0x7fff, 0xff6a, 0x7fff, 0xff63, 0x7fff, 0xff5d, 0x7fff, 0xff57,
-  0x7fff, 0xff51, 0x7fff, 0xff4a, 0x7fff, 0xff44, 0x7fff, 0xff3e,
-  0x7fff, 0xff37, 0x7fff, 0xff31, 0x7fff, 0xff2b, 0x7fff, 0xff25,
-  0x7fff, 0xff1e, 0x7fff, 0xff18, 0x7fff, 0xff12, 0x7fff, 0xff0b,
-  0x7fff, 0xff05, 0x7ffe, 0xfeff, 0x7ffe, 0xfef9, 0x7ffe, 0xfef2,
-  0x7ffe, 0xfeec, 0x7ffe, 0xfee6, 0x7ffe, 0xfedf, 0x7ffe, 0xfed9,
-  0x7ffe, 0xfed3, 0x7ffe, 0xfecd, 0x7ffe, 0xfec6, 0x7ffe, 0xfec0,
-  0x7ffe, 0xfeba, 0x7ffe, 0xfeb3, 0x7ffe, 0xfead, 0x7ffe, 0xfea7,
-  0x7ffe, 0xfea1, 0x7ffe, 0xfe9a, 0x7ffd, 0xfe94, 0x7ffd, 0xfe8e,
-  0x7ffd, 0xfe88, 0x7ffd, 0xfe81, 0x7ffd, 0xfe7b, 0x7ffd, 0xfe75,
-  0x7ffd, 0xfe6e, 0x7ffd, 0xfe68, 0x7ffd, 0xfe62, 0x7ffd, 0xfe5c,
-  0x7ffd, 0xfe55, 0x7ffd, 0xfe4f, 0x7ffd, 0xfe49, 0x7ffc, 0xfe42,
-  0x7ffc, 0xfe3c, 0x7ffc, 0xfe36, 0x7ffc, 0xfe30, 0x7ffc, 0xfe29,
-  0x7ffc, 0xfe23, 0x7ffc, 0xfe1d, 0x7ffc, 0xfe16, 0x7ffc, 0xfe10,
-  0x7ffc, 0xfe0a, 0x7ffc, 0xfe04, 0x7ffb, 0xfdfd, 0x7ffb, 0xfdf7,
-  0x7ffb, 0xfdf1, 0x7ffb, 0xfdea, 0x7ffb, 0xfde4, 0x7ffb, 0xfdde,
-  0x7ffb, 0xfdd8, 0x7ffb, 0xfdd1, 0x7ffb, 0xfdcb, 0x7ffb, 0xfdc5,
-  0x7ffa, 0xfdbe, 0x7ffa, 0xfdb8, 0x7ffa, 0xfdb2, 0x7ffa, 0xfdac,
-  0x7ffa, 0xfda5, 0x7ffa, 0xfd9f, 0x7ffa, 0xfd99, 0x7ffa, 0xfd93,
-  0x7ff9, 0xfd8c, 0x7ff9, 0xfd86, 0x7ff9, 0xfd80, 0x7ff9, 0xfd79,
-  0x7ff9, 0xfd73, 0x7ff9, 0xfd6d, 0x7ff9, 0xfd67, 0x7ff9, 0xfd60,
-  0x7ff8, 0xfd5a, 0x7ff8, 0xfd54, 0x7ff8, 0xfd4d, 0x7ff8, 0xfd47,
-  0x7ff8, 0xfd41, 0x7ff8, 0xfd3b, 0x7ff8, 0xfd34, 0x7ff8, 0xfd2e,
-  0x7ff7, 0xfd28, 0x7ff7, 0xfd21, 0x7ff7, 0xfd1b, 0x7ff7, 0xfd15,
-  0x7ff7, 0xfd0f, 0x7ff7, 0xfd08, 0x7ff7, 0xfd02, 0x7ff6, 0xfcfc,
-  0x7ff6, 0xfcf5, 0x7ff6, 0xfcef, 0x7ff6, 0xfce9, 0x7ff6, 0xfce3,
-  0x7ff6, 0xfcdc, 0x7ff5, 0xfcd6, 0x7ff5, 0xfcd0, 0x7ff5, 0xfcc9,
-  0x7ff5, 0xfcc3, 0x7ff5, 0xfcbd, 0x7ff5, 0xfcb7, 0x7ff5, 0xfcb0,
-  0x7ff4, 0xfcaa, 0x7ff4, 0xfca4, 0x7ff4, 0xfc9e, 0x7ff4, 0xfc97,
-  0x7ff4, 0xfc91, 0x7ff4, 0xfc8b, 0x7ff3, 0xfc84, 0x7ff3, 0xfc7e,
-  0x7ff3, 0xfc78, 0x7ff3, 0xfc72, 0x7ff3, 0xfc6b, 0x7ff2, 0xfc65,
-  0x7ff2, 0xfc5f, 0x7ff2, 0xfc58, 0x7ff2, 0xfc52, 0x7ff2, 0xfc4c,
-  0x7ff2, 0xfc46, 0x7ff1, 0xfc3f, 0x7ff1, 0xfc39, 0x7ff1, 0xfc33,
-  0x7ff1, 0xfc2c, 0x7ff1, 0xfc26, 0x7ff0, 0xfc20, 0x7ff0, 0xfc1a,
-  0x7ff0, 0xfc13, 0x7ff0, 0xfc0d, 0x7ff0, 0xfc07, 0x7fef, 0xfc01,
-  0x7fef, 0xfbfa, 0x7fef, 0xfbf4, 0x7fef, 0xfbee, 0x7fef, 0xfbe7,
-  0x7fee, 0xfbe1, 0x7fee, 0xfbdb, 0x7fee, 0xfbd5, 0x7fee, 0xfbce,
-  0x7fee, 0xfbc8, 0x7fed, 0xfbc2, 0x7fed, 0xfbbb, 0x7fed, 0xfbb5,
-  0x7fed, 0xfbaf, 0x7fed, 0xfba9, 0x7fec, 0xfba2, 0x7fec, 0xfb9c,
-  0x7fec, 0xfb96, 0x7fec, 0xfb8f, 0x7fec, 0xfb89, 0x7feb, 0xfb83,
-  0x7feb, 0xfb7d, 0x7feb, 0xfb76, 0x7feb, 0xfb70, 0x7fea, 0xfb6a,
-  0x7fea, 0xfb64, 0x7fea, 0xfb5d, 0x7fea, 0xfb57, 0x7fea, 0xfb51,
-  0x7fe9, 0xfb4a, 0x7fe9, 0xfb44, 0x7fe9, 0xfb3e, 0x7fe9, 0xfb38,
-  0x7fe8, 0xfb31, 0x7fe8, 0xfb2b, 0x7fe8, 0xfb25, 0x7fe8, 0xfb1e,
-  0x7fe7, 0xfb18, 0x7fe7, 0xfb12, 0x7fe7, 0xfb0c, 0x7fe7, 0xfb05,
-  0x7fe6, 0xfaff, 0x7fe6, 0xfaf9, 0x7fe6, 0xfaf3, 0x7fe6, 0xfaec,
-  0x7fe5, 0xfae6, 0x7fe5, 0xfae0, 0x7fe5, 0xfad9, 0x7fe5, 0xfad3,
-  0x7fe4, 0xfacd, 0x7fe4, 0xfac7, 0x7fe4, 0xfac0, 0x7fe4, 0xfaba,
-  0x7fe3, 0xfab4, 0x7fe3, 0xfaad, 0x7fe3, 0xfaa7, 0x7fe3, 0xfaa1,
-  0x7fe2, 0xfa9b, 0x7fe2, 0xfa94, 0x7fe2, 0xfa8e, 0x7fe2, 0xfa88,
-  0x7fe1, 0xfa81, 0x7fe1, 0xfa7b, 0x7fe1, 0xfa75, 0x7fe0, 0xfa6f,
-  0x7fe0, 0xfa68, 0x7fe0, 0xfa62, 0x7fe0, 0xfa5c, 0x7fdf, 0xfa56,
-  0x7fdf, 0xfa4f, 0x7fdf, 0xfa49, 0x7fdf, 0xfa43, 0x7fde, 0xfa3c,
-  0x7fde, 0xfa36, 0x7fde, 0xfa30, 0x7fdd, 0xfa2a, 0x7fdd, 0xfa23,
-  0x7fdd, 0xfa1d, 0x7fdd, 0xfa17, 0x7fdc, 0xfa11, 0x7fdc, 0xfa0a,
-  0x7fdc, 0xfa04, 0x7fdb, 0xf9fe, 0x7fdb, 0xf9f7, 0x7fdb, 0xf9f1,
-  0x7fda, 0xf9eb, 0x7fda, 0xf9e5, 0x7fda, 0xf9de, 0x7fda, 0xf9d8,
-  0x7fd9, 0xf9d2, 0x7fd9, 0xf9cb, 0x7fd9, 0xf9c5, 0x7fd8, 0xf9bf,
-  0x7fd8, 0xf9b9, 0x7fd8, 0xf9b2, 0x7fd7, 0xf9ac, 0x7fd7, 0xf9a6,
-  0x7fd7, 0xf9a0, 0x7fd6, 0xf999, 0x7fd6, 0xf993, 0x7fd6, 0xf98d,
-  0x7fd6, 0xf986, 0x7fd5, 0xf980, 0x7fd5, 0xf97a, 0x7fd5, 0xf974,
-  0x7fd4, 0xf96d, 0x7fd4, 0xf967, 0x7fd4, 0xf961, 0x7fd3, 0xf95b,
-  0x7fd3, 0xf954, 0x7fd3, 0xf94e, 0x7fd2, 0xf948, 0x7fd2, 0xf941,
-  0x7fd2, 0xf93b, 0x7fd1, 0xf935, 0x7fd1, 0xf92f, 0x7fd1, 0xf928,
-  0x7fd0, 0xf922, 0x7fd0, 0xf91c, 0x7fd0, 0xf916, 0x7fcf, 0xf90f,
-  0x7fcf, 0xf909, 0x7fcf, 0xf903, 0x7fce, 0xf8fc, 0x7fce, 0xf8f6,
-  0x7fce, 0xf8f0, 0x7fcd, 0xf8ea, 0x7fcd, 0xf8e3, 0x7fcd, 0xf8dd,
-  0x7fcc, 0xf8d7, 0x7fcc, 0xf8d0, 0x7fcb, 0xf8ca, 0x7fcb, 0xf8c4,
-  0x7fcb, 0xf8be, 0x7fca, 0xf8b7, 0x7fca, 0xf8b1, 0x7fca, 0xf8ab,
-  0x7fc9, 0xf8a5, 0x7fc9, 0xf89e, 0x7fc9, 0xf898, 0x7fc8, 0xf892,
-  0x7fc8, 0xf88b, 0x7fc7, 0xf885, 0x7fc7, 0xf87f, 0x7fc7, 0xf879,
-  0x7fc6, 0xf872, 0x7fc6, 0xf86c, 0x7fc6, 0xf866, 0x7fc5, 0xf860,
-  0x7fc5, 0xf859, 0x7fc5, 0xf853, 0x7fc4, 0xf84d, 0x7fc4, 0xf846,
-  0x7fc3, 0xf840, 0x7fc3, 0xf83a, 0x7fc3, 0xf834, 0x7fc2, 0xf82d,
-  0x7fc2, 0xf827, 0x7fc1, 0xf821, 0x7fc1, 0xf81b, 0x7fc1, 0xf814,
-  0x7fc0, 0xf80e, 0x7fc0, 0xf808, 0x7fc0, 0xf802, 0x7fbf, 0xf7fb,
-  0x7fbf, 0xf7f5, 0x7fbe, 0xf7ef, 0x7fbe, 0xf7e8, 0x7fbe, 0xf7e2,
-  0x7fbd, 0xf7dc, 0x7fbd, 0xf7d6, 0x7fbc, 0xf7cf, 0x7fbc, 0xf7c9,
-  0x7fbc, 0xf7c3, 0x7fbb, 0xf7bd, 0x7fbb, 0xf7b6, 0x7fba, 0xf7b0,
-  0x7fba, 0xf7aa, 0x7fb9, 0xf7a3, 0x7fb9, 0xf79d, 0x7fb9, 0xf797,
-  0x7fb8, 0xf791, 0x7fb8, 0xf78a, 0x7fb7, 0xf784, 0x7fb7, 0xf77e,
-  0x7fb7, 0xf778, 0x7fb6, 0xf771, 0x7fb6, 0xf76b, 0x7fb5, 0xf765,
-  0x7fb5, 0xf75e, 0x7fb4, 0xf758, 0x7fb4, 0xf752, 0x7fb4, 0xf74c,
-  0x7fb3, 0xf745, 0x7fb3, 0xf73f, 0x7fb2, 0xf739, 0x7fb2, 0xf733,
-  0x7fb1, 0xf72c, 0x7fb1, 0xf726, 0x7fb1, 0xf720, 0x7fb0, 0xf71a,
-  0x7fb0, 0xf713, 0x7faf, 0xf70d, 0x7faf, 0xf707, 0x7fae, 0xf700,
-  0x7fae, 0xf6fa, 0x7fae, 0xf6f4, 0x7fad, 0xf6ee, 0x7fad, 0xf6e7,
-  0x7fac, 0xf6e1, 0x7fac, 0xf6db, 0x7fab, 0xf6d5, 0x7fab, 0xf6ce,
-  0x7faa, 0xf6c8, 0x7faa, 0xf6c2, 0x7fa9, 0xf6bc, 0x7fa9, 0xf6b5,
-  0x7fa9, 0xf6af, 0x7fa8, 0xf6a9, 0x7fa8, 0xf6a2, 0x7fa7, 0xf69c,
-  0x7fa7, 0xf696, 0x7fa6, 0xf690, 0x7fa6, 0xf689, 0x7fa5, 0xf683,
-  0x7fa5, 0xf67d, 0x7fa4, 0xf677, 0x7fa4, 0xf670, 0x7fa3, 0xf66a,
-  0x7fa3, 0xf664, 0x7fa3, 0xf65e, 0x7fa2, 0xf657, 0x7fa2, 0xf651,
-  0x7fa1, 0xf64b, 0x7fa1, 0xf644, 0x7fa0, 0xf63e, 0x7fa0, 0xf638,
-  0x7f9f, 0xf632, 0x7f9f, 0xf62b, 0x7f9e, 0xf625, 0x7f9e, 0xf61f,
-  0x7f9d, 0xf619, 0x7f9d, 0xf612, 0x7f9c, 0xf60c, 0x7f9c, 0xf606,
-  0x7f9b, 0xf600, 0x7f9b, 0xf5f9, 0x7f9a, 0xf5f3, 0x7f9a, 0xf5ed,
-  0x7f99, 0xf5e7, 0x7f99, 0xf5e0, 0x7f98, 0xf5da, 0x7f98, 0xf5d4,
-  0x7f97, 0xf5cd, 0x7f97, 0xf5c7, 0x7f96, 0xf5c1, 0x7f96, 0xf5bb,
-  0x7f95, 0xf5b4, 0x7f95, 0xf5ae, 0x7f94, 0xf5a8, 0x7f94, 0xf5a2,
-  0x7f93, 0xf59b, 0x7f93, 0xf595, 0x7f92, 0xf58f, 0x7f92, 0xf589,
-  0x7f91, 0xf582, 0x7f91, 0xf57c, 0x7f90, 0xf576, 0x7f90, 0xf570,
-  0x7f8f, 0xf569, 0x7f8f, 0xf563, 0x7f8e, 0xf55d, 0x7f8e, 0xf556,
-  0x7f8d, 0xf550, 0x7f8d, 0xf54a, 0x7f8c, 0xf544, 0x7f8b, 0xf53d,
-  0x7f8b, 0xf537, 0x7f8a, 0xf531, 0x7f8a, 0xf52b, 0x7f89, 0xf524,
-  0x7f89, 0xf51e, 0x7f88, 0xf518, 0x7f88, 0xf512, 0x7f87, 0xf50b,
-  0x7f87, 0xf505, 0x7f86, 0xf4ff, 0x7f86, 0xf4f9, 0x7f85, 0xf4f2,
-  0x7f85, 0xf4ec, 0x7f84, 0xf4e6, 0x7f83, 0xf4e0, 0x7f83, 0xf4d9,
-  0x7f82, 0xf4d3, 0x7f82, 0xf4cd, 0x7f81, 0xf4c6, 0x7f81, 0xf4c0,
-  0x7f80, 0xf4ba, 0x7f80, 0xf4b4, 0x7f7f, 0xf4ad, 0x7f7e, 0xf4a7,
-  0x7f7e, 0xf4a1, 0x7f7d, 0xf49b, 0x7f7d, 0xf494, 0x7f7c, 0xf48e,
-  0x7f7c, 0xf488, 0x7f7b, 0xf482, 0x7f7b, 0xf47b, 0x7f7a, 0xf475,
-  0x7f79, 0xf46f, 0x7f79, 0xf469, 0x7f78, 0xf462, 0x7f78, 0xf45c,
-  0x7f77, 0xf456, 0x7f77, 0xf450, 0x7f76, 0xf449, 0x7f75, 0xf443,
-  0x7f75, 0xf43d, 0x7f74, 0xf437, 0x7f74, 0xf430, 0x7f73, 0xf42a,
-  0x7f72, 0xf424, 0x7f72, 0xf41e, 0x7f71, 0xf417, 0x7f71, 0xf411,
-  0x7f70, 0xf40b, 0x7f70, 0xf405, 0x7f6f, 0xf3fe, 0x7f6e, 0xf3f8,
-  0x7f6e, 0xf3f2, 0x7f6d, 0xf3ec, 0x7f6d, 0xf3e5, 0x7f6c, 0xf3df,
-  0x7f6b, 0xf3d9, 0x7f6b, 0xf3d2, 0x7f6a, 0xf3cc, 0x7f6a, 0xf3c6,
-  0x7f69, 0xf3c0, 0x7f68, 0xf3b9, 0x7f68, 0xf3b3, 0x7f67, 0xf3ad,
-  0x7f67, 0xf3a7, 0x7f66, 0xf3a0, 0x7f65, 0xf39a, 0x7f65, 0xf394,
-  0x7f64, 0xf38e, 0x7f64, 0xf387, 0x7f63, 0xf381, 0x7f62, 0xf37b,
-  0x7f62, 0xf375, 0x7f61, 0xf36e, 0x7f60, 0xf368, 0x7f60, 0xf362,
-  0x7f5f, 0xf35c, 0x7f5f, 0xf355, 0x7f5e, 0xf34f, 0x7f5d, 0xf349,
-  0x7f5d, 0xf343, 0x7f5c, 0xf33c, 0x7f5b, 0xf336, 0x7f5b, 0xf330,
-  0x7f5a, 0xf32a, 0x7f5a, 0xf323, 0x7f59, 0xf31d, 0x7f58, 0xf317,
-  0x7f58, 0xf311, 0x7f57, 0xf30a, 0x7f56, 0xf304, 0x7f56, 0xf2fe,
-  0x7f55, 0xf2f8, 0x7f55, 0xf2f1, 0x7f54, 0xf2eb, 0x7f53, 0xf2e5,
-  0x7f53, 0xf2df, 0x7f52, 0xf2d8, 0x7f51, 0xf2d2, 0x7f51, 0xf2cc,
-  0x7f50, 0xf2c6, 0x7f4f, 0xf2bf, 0x7f4f, 0xf2b9, 0x7f4e, 0xf2b3,
-  0x7f4d, 0xf2ad, 0x7f4d, 0xf2a6, 0x7f4c, 0xf2a0, 0x7f4b, 0xf29a,
-  0x7f4b, 0xf294, 0x7f4a, 0xf28d, 0x7f49, 0xf287, 0x7f49, 0xf281,
-  0x7f48, 0xf27b, 0x7f47, 0xf274, 0x7f47, 0xf26e, 0x7f46, 0xf268,
-  0x7f45, 0xf262, 0x7f45, 0xf25b, 0x7f44, 0xf255, 0x7f43, 0xf24f,
-  0x7f43, 0xf249, 0x7f42, 0xf242, 0x7f41, 0xf23c, 0x7f41, 0xf236,
-  0x7f40, 0xf230, 0x7f3f, 0xf229, 0x7f3f, 0xf223, 0x7f3e, 0xf21d,
-  0x7f3d, 0xf217, 0x7f3d, 0xf210, 0x7f3c, 0xf20a, 0x7f3b, 0xf204,
-  0x7f3b, 0xf1fe, 0x7f3a, 0xf1f7, 0x7f39, 0xf1f1, 0x7f39, 0xf1eb,
-  0x7f38, 0xf1e5, 0x7f37, 0xf1de, 0x7f36, 0xf1d8, 0x7f36, 0xf1d2,
-  0x7f35, 0xf1cc, 0x7f34, 0xf1c6, 0x7f34, 0xf1bf, 0x7f33, 0xf1b9,
-  0x7f32, 0xf1b3, 0x7f32, 0xf1ad, 0x7f31, 0xf1a6, 0x7f30, 0xf1a0,
-  0x7f2f, 0xf19a, 0x7f2f, 0xf194, 0x7f2e, 0xf18d, 0x7f2d, 0xf187,
-  0x7f2d, 0xf181, 0x7f2c, 0xf17b, 0x7f2b, 0xf174, 0x7f2a, 0xf16e,
-  0x7f2a, 0xf168, 0x7f29, 0xf162, 0x7f28, 0xf15b, 0x7f28, 0xf155,
-  0x7f27, 0xf14f, 0x7f26, 0xf149, 0x7f25, 0xf142, 0x7f25, 0xf13c,
-  0x7f24, 0xf136, 0x7f23, 0xf130, 0x7f23, 0xf129, 0x7f22, 0xf123,
-  0x7f21, 0xf11d, 0x7f20, 0xf117, 0x7f20, 0xf110, 0x7f1f, 0xf10a,
-  0x7f1e, 0xf104, 0x7f1d, 0xf0fe, 0x7f1d, 0xf0f8, 0x7f1c, 0xf0f1,
-  0x7f1b, 0xf0eb, 0x7f1a, 0xf0e5, 0x7f1a, 0xf0df, 0x7f19, 0xf0d8,
-  0x7f18, 0xf0d2, 0x7f17, 0xf0cc, 0x7f17, 0xf0c6, 0x7f16, 0xf0bf,
-  0x7f15, 0xf0b9, 0x7f14, 0xf0b3, 0x7f14, 0xf0ad, 0x7f13, 0xf0a6,
-  0x7f12, 0xf0a0, 0x7f11, 0xf09a, 0x7f11, 0xf094, 0x7f10, 0xf08d,
-  0x7f0f, 0xf087, 0x7f0e, 0xf081, 0x7f0e, 0xf07b, 0x7f0d, 0xf075,
-  0x7f0c, 0xf06e, 0x7f0b, 0xf068, 0x7f0b, 0xf062, 0x7f0a, 0xf05c,
-  0x7f09, 0xf055, 0x7f08, 0xf04f, 0x7f08, 0xf049, 0x7f07, 0xf043,
-  0x7f06, 0xf03c, 0x7f05, 0xf036, 0x7f04, 0xf030, 0x7f04, 0xf02a,
-  0x7f03, 0xf023, 0x7f02, 0xf01d, 0x7f01, 0xf017, 0x7f01, 0xf011,
-  0x7f00, 0xf00b, 0x7eff, 0xf004, 0x7efe, 0xeffe, 0x7efd, 0xeff8,
-  0x7efd, 0xeff2, 0x7efc, 0xefeb, 0x7efb, 0xefe5, 0x7efa, 0xefdf,
-  0x7ef9, 0xefd9, 0x7ef9, 0xefd2, 0x7ef8, 0xefcc, 0x7ef7, 0xefc6,
-  0x7ef6, 0xefc0, 0x7ef5, 0xefb9, 0x7ef5, 0xefb3, 0x7ef4, 0xefad,
-  0x7ef3, 0xefa7, 0x7ef2, 0xefa1, 0x7ef1, 0xef9a, 0x7ef1, 0xef94,
-  0x7ef0, 0xef8e, 0x7eef, 0xef88, 0x7eee, 0xef81, 0x7eed, 0xef7b,
-  0x7eed, 0xef75, 0x7eec, 0xef6f, 0x7eeb, 0xef68, 0x7eea, 0xef62,
-  0x7ee9, 0xef5c, 0x7ee9, 0xef56, 0x7ee8, 0xef50, 0x7ee7, 0xef49,
-  0x7ee6, 0xef43, 0x7ee5, 0xef3d, 0x7ee4, 0xef37, 0x7ee4, 0xef30,
-  0x7ee3, 0xef2a, 0x7ee2, 0xef24, 0x7ee1, 0xef1e, 0x7ee0, 0xef18,
-  0x7edf, 0xef11, 0x7edf, 0xef0b, 0x7ede, 0xef05, 0x7edd, 0xeeff,
-  0x7edc, 0xeef8, 0x7edb, 0xeef2, 0x7eda, 0xeeec, 0x7eda, 0xeee6,
-  0x7ed9, 0xeedf, 0x7ed8, 0xeed9, 0x7ed7, 0xeed3, 0x7ed6, 0xeecd,
-  0x7ed5, 0xeec7, 0x7ed5, 0xeec0, 0x7ed4, 0xeeba, 0x7ed3, 0xeeb4,
-  0x7ed2, 0xeeae, 0x7ed1, 0xeea7, 0x7ed0, 0xeea1, 0x7ecf, 0xee9b,
-  0x7ecf, 0xee95, 0x7ece, 0xee8f, 0x7ecd, 0xee88, 0x7ecc, 0xee82,
-  0x7ecb, 0xee7c, 0x7eca, 0xee76, 0x7ec9, 0xee6f, 0x7ec9, 0xee69,
-  0x7ec8, 0xee63, 0x7ec7, 0xee5d, 0x7ec6, 0xee57, 0x7ec5, 0xee50,
-  0x7ec4, 0xee4a, 0x7ec3, 0xee44, 0x7ec3, 0xee3e, 0x7ec2, 0xee37,
-  0x7ec1, 0xee31, 0x7ec0, 0xee2b, 0x7ebf, 0xee25, 0x7ebe, 0xee1f,
-  0x7ebd, 0xee18, 0x7ebc, 0xee12, 0x7ebb, 0xee0c, 0x7ebb, 0xee06,
-  0x7eba, 0xedff, 0x7eb9, 0xedf9, 0x7eb8, 0xedf3, 0x7eb7, 0xeded,
-  0x7eb6, 0xede7, 0x7eb5, 0xede0, 0x7eb4, 0xedda, 0x7eb4, 0xedd4,
-  0x7eb3, 0xedce, 0x7eb2, 0xedc7, 0x7eb1, 0xedc1, 0x7eb0, 0xedbb,
-  0x7eaf, 0xedb5, 0x7eae, 0xedaf, 0x7ead, 0xeda8, 0x7eac, 0xeda2,
-  0x7eab, 0xed9c, 0x7eab, 0xed96, 0x7eaa, 0xed8f, 0x7ea9, 0xed89,
-  0x7ea8, 0xed83, 0x7ea7, 0xed7d, 0x7ea6, 0xed77, 0x7ea5, 0xed70,
-  0x7ea4, 0xed6a, 0x7ea3, 0xed64, 0x7ea2, 0xed5e, 0x7ea1, 0xed58,
-  0x7ea1, 0xed51, 0x7ea0, 0xed4b, 0x7e9f, 0xed45, 0x7e9e, 0xed3f,
-  0x7e9d, 0xed38, 0x7e9c, 0xed32, 0x7e9b, 0xed2c, 0x7e9a, 0xed26,
-  0x7e99, 0xed20, 0x7e98, 0xed19, 0x7e97, 0xed13, 0x7e96, 0xed0d,
-  0x7e95, 0xed07, 0x7e94, 0xed01, 0x7e94, 0xecfa, 0x7e93, 0xecf4,
-  0x7e92, 0xecee, 0x7e91, 0xece8, 0x7e90, 0xece1, 0x7e8f, 0xecdb,
-  0x7e8e, 0xecd5, 0x7e8d, 0xeccf, 0x7e8c, 0xecc9, 0x7e8b, 0xecc2,
-  0x7e8a, 0xecbc, 0x7e89, 0xecb6, 0x7e88, 0xecb0, 0x7e87, 0xecaa,
-  0x7e86, 0xeca3, 0x7e85, 0xec9d, 0x7e84, 0xec97, 0x7e84, 0xec91,
-  0x7e83, 0xec8a, 0x7e82, 0xec84, 0x7e81, 0xec7e, 0x7e80, 0xec78,
-  0x7e7f, 0xec72, 0x7e7e, 0xec6b, 0x7e7d, 0xec65, 0x7e7c, 0xec5f,
-  0x7e7b, 0xec59, 0x7e7a, 0xec53, 0x7e79, 0xec4c, 0x7e78, 0xec46,
-  0x7e77, 0xec40, 0x7e76, 0xec3a, 0x7e75, 0xec34, 0x7e74, 0xec2d,
-  0x7e73, 0xec27, 0x7e72, 0xec21, 0x7e71, 0xec1b, 0x7e70, 0xec15,
-  0x7e6f, 0xec0e, 0x7e6e, 0xec08, 0x7e6d, 0xec02, 0x7e6c, 0xebfc,
-  0x7e6b, 0xebf5, 0x7e6a, 0xebef, 0x7e69, 0xebe9, 0x7e68, 0xebe3,
-  0x7e67, 0xebdd, 0x7e66, 0xebd6, 0x7e65, 0xebd0, 0x7e64, 0xebca,
-  0x7e63, 0xebc4, 0x7e62, 0xebbe, 0x7e61, 0xebb7, 0x7e60, 0xebb1,
-  0x7e5f, 0xebab, 0x7e5e, 0xeba5, 0x7e5d, 0xeb9f, 0x7e5c, 0xeb98,
-  0x7e5b, 0xeb92, 0x7e5a, 0xeb8c, 0x7e59, 0xeb86, 0x7e58, 0xeb80,
-  0x7e57, 0xeb79, 0x7e56, 0xeb73, 0x7e55, 0xeb6d, 0x7e54, 0xeb67,
-  0x7e53, 0xeb61, 0x7e52, 0xeb5a, 0x7e51, 0xeb54, 0x7e50, 0xeb4e,
-  0x7e4f, 0xeb48, 0x7e4e, 0xeb42, 0x7e4d, 0xeb3b, 0x7e4c, 0xeb35,
-  0x7e4b, 0xeb2f, 0x7e4a, 0xeb29, 0x7e49, 0xeb23, 0x7e48, 0xeb1c,
-  0x7e47, 0xeb16, 0x7e46, 0xeb10, 0x7e45, 0xeb0a, 0x7e44, 0xeb04,
-  0x7e43, 0xeafd, 0x7e42, 0xeaf7, 0x7e41, 0xeaf1, 0x7e40, 0xeaeb,
-  0x7e3f, 0xeae5, 0x7e3e, 0xeade, 0x7e3d, 0xead8, 0x7e3c, 0xead2,
-  0x7e3b, 0xeacc, 0x7e3a, 0xeac6, 0x7e39, 0xeabf, 0x7e38, 0xeab9,
-  0x7e37, 0xeab3, 0x7e35, 0xeaad, 0x7e34, 0xeaa7, 0x7e33, 0xeaa0,
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-  0x7e2e, 0xea81, 0x7e2d, 0xea7b, 0x7e2c, 0xea75, 0x7e2b, 0xea6f,
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-  0x7db0, 0xe7cd, 0x7daf, 0xe7c7, 0x7dae, 0xe7c1, 0x7dad, 0xe7bb,
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-  0x7d94, 0xe739, 0x7d92, 0xe733, 0x7d91, 0xe72d, 0x7d90, 0xe727,
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-  0x7d8a, 0xe708, 0x7d89, 0xe702, 0x7d87, 0xe6fb, 0x7d86, 0xe6f5,
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-  0x7af6, 0xdc72, 0x7af4, 0xdc6c, 0x7af2, 0xdc66, 0x7af1, 0xdc60,
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-  0x7ac5, 0xdbc9, 0x7ac3, 0xdbc3, 0x7ac1, 0xdbbd, 0x7abf, 0xdbb7,
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-  0x7ab6, 0xdb99, 0x7ab5, 0xdb93, 0x7ab3, 0xdb8d, 0x7ab1, 0xdb87,
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-  0x58af, 0xa3b5, 0x58ab, 0xa3b0, 0x58a6, 0xa3ac, 0x58a2, 0xa3a8,
-  0x589d, 0xa3a3, 0x5899, 0xa39f, 0x5894, 0xa39a, 0x5890, 0xa396,
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-  0x580c, 0xa318, 0x5807, 0xa314, 0x5803, 0xa310, 0x57fe, 0xa30b,
-  0x57f9, 0xa307, 0x57f5, 0xa303, 0x57f0, 0xa2ff, 0x57ec, 0xa2fa,
-  0x57e7, 0xa2f6, 0x57e3, 0xa2f2, 0x57de, 0xa2ed, 0x57d9, 0xa2e9,
-  0x57d5, 0xa2e5, 0x57d0, 0xa2e0, 0x57cc, 0xa2dc, 0x57c7, 0xa2d8,
-  0x57c3, 0xa2d3, 0x57be, 0xa2cf, 0x57b9, 0xa2cb, 0x57b5, 0xa2c6,
-  0x57b0, 0xa2c2, 0x57ac, 0xa2be, 0x57a7, 0xa2ba, 0x57a3, 0xa2b5,
-  0x579e, 0xa2b1, 0x5799, 0xa2ad, 0x5795, 0xa2a8, 0x5790, 0xa2a4,
-  0x578c, 0xa2a0, 0x5787, 0xa29b, 0x5783, 0xa297, 0x577e, 0xa293,
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-  0x5767, 0xa27d, 0x5762, 0xa279, 0x575e, 0xa275, 0x5759, 0xa271,
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-  0x5742, 0xa25b, 0x573e, 0xa257, 0x5739, 0xa253, 0x5734, 0xa24e,
-  0x5730, 0xa24a, 0x572b, 0xa246, 0x5727, 0xa241, 0x5722, 0xa23d,
-  0x571d, 0xa239, 0x5719, 0xa235, 0x5714, 0xa230, 0x5710, 0xa22c,
-  0x570b, 0xa228, 0x5706, 0xa224, 0x5702, 0xa21f, 0x56fd, 0xa21b,
-  0x56f9, 0xa217, 0x56f4, 0xa212, 0x56ef, 0xa20e, 0x56eb, 0xa20a,
-  0x56e6, 0xa206, 0x56e2, 0xa201, 0x56dd, 0xa1fd, 0x56d8, 0xa1f9,
-  0x56d4, 0xa1f5, 0x56cf, 0xa1f0, 0x56ca, 0xa1ec, 0x56c6, 0xa1e8,
-  0x56c1, 0xa1e4, 0x56bd, 0xa1df, 0x56b8, 0xa1db, 0x56b3, 0xa1d7,
-  0x56af, 0xa1d3, 0x56aa, 0xa1ce, 0x56a5, 0xa1ca, 0x56a1, 0xa1c6,
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-  0xd3a, 0x80b0, 0xd34, 0x80af, 0xd2e, 0x80af, 0xd28, 0x80ae,
-  0xd21, 0x80ad, 0xd1b, 0x80ad, 0xd15, 0x80ac, 0xd0f, 0x80ab,
-  0xd08, 0x80ab, 0xd02, 0x80aa, 0xcfc, 0x80aa, 0xcf6, 0x80a9,
-  0xcef, 0x80a8, 0xce9, 0x80a8, 0xce3, 0x80a7, 0xcdd, 0x80a6,
-  0xcd6, 0x80a6, 0xcd0, 0x80a5, 0xcca, 0x80a5, 0xcc4, 0x80a4,
-  0xcbd, 0x80a3, 0xcb7, 0x80a3, 0xcb1, 0x80a2, 0xcab, 0x80a1,
-  0xca4, 0x80a1, 0xc9e, 0x80a0, 0xc98, 0x80a0, 0xc92, 0x809f,
-  0xc8b, 0x809e, 0xc85, 0x809e, 0xc7f, 0x809d, 0xc79, 0x809c,
-  0xc72, 0x809c, 0xc6c, 0x809b, 0xc66, 0x809b, 0xc60, 0x809a,
-  0xc59, 0x8099, 0xc53, 0x8099, 0xc4d, 0x8098, 0xc47, 0x8098,
-  0xc40, 0x8097, 0xc3a, 0x8096, 0xc34, 0x8096, 0xc2e, 0x8095,
-  0xc27, 0x8095, 0xc21, 0x8094, 0xc1b, 0x8093, 0xc14, 0x8093,
-  0xc0e, 0x8092, 0xc08, 0x8092, 0xc02, 0x8091, 0xbfb, 0x8090,
-  0xbf5, 0x8090, 0xbef, 0x808f, 0xbe9, 0x808f, 0xbe2, 0x808e,
-  0xbdc, 0x808e, 0xbd6, 0x808d, 0xbd0, 0x808c, 0xbc9, 0x808c,
-  0xbc3, 0x808b, 0xbbd, 0x808b, 0xbb7, 0x808a, 0xbb0, 0x8089,
-  0xbaa, 0x8089, 0xba4, 0x8088, 0xb9e, 0x8088, 0xb97, 0x8087,
-  0xb91, 0x8087, 0xb8b, 0x8086, 0xb85, 0x8085, 0xb7e, 0x8085,
-  0xb78, 0x8084, 0xb72, 0x8084, 0xb6c, 0x8083, 0xb65, 0x8083,
-  0xb5f, 0x8082, 0xb59, 0x8082, 0xb53, 0x8081, 0xb4c, 0x8080,
-  0xb46, 0x8080, 0xb40, 0x807f, 0xb3a, 0x807f, 0xb33, 0x807e,
-  0xb2d, 0x807e, 0xb27, 0x807d, 0xb20, 0x807d, 0xb1a, 0x807c,
-  0xb14, 0x807b, 0xb0e, 0x807b, 0xb07, 0x807a, 0xb01, 0x807a,
-  0xafb, 0x8079, 0xaf5, 0x8079, 0xaee, 0x8078, 0xae8, 0x8078,
-  0xae2, 0x8077, 0xadc, 0x8077, 0xad5, 0x8076, 0xacf, 0x8076,
-  0xac9, 0x8075, 0xac3, 0x8075, 0xabc, 0x8074, 0xab6, 0x8073,
-  0xab0, 0x8073, 0xaaa, 0x8072, 0xaa3, 0x8072, 0xa9d, 0x8071,
-  0xa97, 0x8071, 0xa90, 0x8070, 0xa8a, 0x8070, 0xa84, 0x806f,
-  0xa7e, 0x806f, 0xa77, 0x806e, 0xa71, 0x806e, 0xa6b, 0x806d,
-  0xa65, 0x806d, 0xa5e, 0x806c, 0xa58, 0x806c, 0xa52, 0x806b,
-  0xa4c, 0x806b, 0xa45, 0x806a, 0xa3f, 0x806a, 0xa39, 0x8069,
-  0xa33, 0x8069, 0xa2c, 0x8068, 0xa26, 0x8068, 0xa20, 0x8067,
-  0xa19, 0x8067, 0xa13, 0x8066, 0xa0d, 0x8066, 0xa07, 0x8065,
-  0xa00, 0x8065, 0x9fa, 0x8064, 0x9f4, 0x8064, 0x9ee, 0x8063,
-  0x9e7, 0x8063, 0x9e1, 0x8062, 0x9db, 0x8062, 0x9d5, 0x8061,
-  0x9ce, 0x8061, 0x9c8, 0x8060, 0x9c2, 0x8060, 0x9bc, 0x805f,
-  0x9b5, 0x805f, 0x9af, 0x805e, 0x9a9, 0x805e, 0x9a2, 0x805d,
-  0x99c, 0x805d, 0x996, 0x805d, 0x990, 0x805c, 0x989, 0x805c,
-  0x983, 0x805b, 0x97d, 0x805b, 0x977, 0x805a, 0x970, 0x805a,
-  0x96a, 0x8059, 0x964, 0x8059, 0x95e, 0x8058, 0x957, 0x8058,
-  0x951, 0x8057, 0x94b, 0x8057, 0x944, 0x8057, 0x93e, 0x8056,
-  0x938, 0x8056, 0x932, 0x8055, 0x92b, 0x8055, 0x925, 0x8054,
-  0x91f, 0x8054, 0x919, 0x8053, 0x912, 0x8053, 0x90c, 0x8052,
-  0x906, 0x8052, 0x900, 0x8052, 0x8f9, 0x8051, 0x8f3, 0x8051,
-  0x8ed, 0x8050, 0x8e6, 0x8050, 0x8e0, 0x804f, 0x8da, 0x804f,
-  0x8d4, 0x804f, 0x8cd, 0x804e, 0x8c7, 0x804e, 0x8c1, 0x804d,
-  0x8bb, 0x804d, 0x8b4, 0x804c, 0x8ae, 0x804c, 0x8a8, 0x804c,
-  0x8a2, 0x804b, 0x89b, 0x804b, 0x895, 0x804a, 0x88f, 0x804a,
-  0x888, 0x8049, 0x882, 0x8049, 0x87c, 0x8049, 0x876, 0x8048,
-  0x86f, 0x8048, 0x869, 0x8047, 0x863, 0x8047, 0x85d, 0x8047,
-  0x856, 0x8046, 0x850, 0x8046, 0x84a, 0x8045, 0x843, 0x8045,
-  0x83d, 0x8044, 0x837, 0x8044, 0x831, 0x8044, 0x82a, 0x8043,
-  0x824, 0x8043, 0x81e, 0x8042, 0x818, 0x8042, 0x811, 0x8042,
-  0x80b, 0x8041, 0x805, 0x8041, 0x7fe, 0x8040, 0x7f8, 0x8040,
-  0x7f2, 0x8040, 0x7ec, 0x803f, 0x7e5, 0x803f, 0x7df, 0x803f,
-  0x7d9, 0x803e, 0x7d3, 0x803e, 0x7cc, 0x803d, 0x7c6, 0x803d,
-  0x7c0, 0x803d, 0x7ba, 0x803c, 0x7b3, 0x803c, 0x7ad, 0x803b,
-  0x7a7, 0x803b, 0x7a0, 0x803b, 0x79a, 0x803a, 0x794, 0x803a,
-  0x78e, 0x803a, 0x787, 0x8039, 0x781, 0x8039, 0x77b, 0x8039,
-  0x775, 0x8038, 0x76e, 0x8038, 0x768, 0x8037, 0x762, 0x8037,
-  0x75b, 0x8037, 0x755, 0x8036, 0x74f, 0x8036, 0x749, 0x8036,
-  0x742, 0x8035, 0x73c, 0x8035, 0x736, 0x8035, 0x730, 0x8034,
-  0x729, 0x8034, 0x723, 0x8033, 0x71d, 0x8033, 0x716, 0x8033,
-  0x710, 0x8032, 0x70a, 0x8032, 0x704, 0x8032, 0x6fd, 0x8031,
-  0x6f7, 0x8031, 0x6f1, 0x8031, 0x6ea, 0x8030, 0x6e4, 0x8030,
-  0x6de, 0x8030, 0x6d8, 0x802f, 0x6d1, 0x802f, 0x6cb, 0x802f,
-  0x6c5, 0x802e, 0x6bf, 0x802e, 0x6b8, 0x802e, 0x6b2, 0x802d,
-  0x6ac, 0x802d, 0x6a5, 0x802d, 0x69f, 0x802c, 0x699, 0x802c,
-  0x693, 0x802c, 0x68c, 0x802b, 0x686, 0x802b, 0x680, 0x802b,
-  0x67a, 0x802a, 0x673, 0x802a, 0x66d, 0x802a, 0x667, 0x802a,
-  0x660, 0x8029, 0x65a, 0x8029, 0x654, 0x8029, 0x64e, 0x8028,
-  0x647, 0x8028, 0x641, 0x8028, 0x63b, 0x8027, 0x635, 0x8027,
-  0x62e, 0x8027, 0x628, 0x8026, 0x622, 0x8026, 0x61b, 0x8026,
-  0x615, 0x8026, 0x60f, 0x8025, 0x609, 0x8025, 0x602, 0x8025,
-  0x5fc, 0x8024, 0x5f6, 0x8024, 0x5ef, 0x8024, 0x5e9, 0x8023,
-  0x5e3, 0x8023, 0x5dd, 0x8023, 0x5d6, 0x8023, 0x5d0, 0x8022,
-  0x5ca, 0x8022, 0x5c4, 0x8022, 0x5bd, 0x8021, 0x5b7, 0x8021,
-  0x5b1, 0x8021, 0x5aa, 0x8021, 0x5a4, 0x8020, 0x59e, 0x8020,
-  0x598, 0x8020, 0x591, 0x8020, 0x58b, 0x801f, 0x585, 0x801f,
-  0x57f, 0x801f, 0x578, 0x801e, 0x572, 0x801e, 0x56c, 0x801e,
-  0x565, 0x801e, 0x55f, 0x801d, 0x559, 0x801d, 0x553, 0x801d,
-  0x54c, 0x801d, 0x546, 0x801c, 0x540, 0x801c, 0x539, 0x801c,
-  0x533, 0x801c, 0x52d, 0x801b, 0x527, 0x801b, 0x520, 0x801b,
-  0x51a, 0x801b, 0x514, 0x801a, 0x50d, 0x801a, 0x507, 0x801a,
-  0x501, 0x801a, 0x4fb, 0x8019, 0x4f4, 0x8019, 0x4ee, 0x8019,
-  0x4e8, 0x8019, 0x4e2, 0x8018, 0x4db, 0x8018, 0x4d5, 0x8018,
-  0x4cf, 0x8018, 0x4c8, 0x8017, 0x4c2, 0x8017, 0x4bc, 0x8017,
-  0x4b6, 0x8017, 0x4af, 0x8016, 0x4a9, 0x8016, 0x4a3, 0x8016,
-  0x49c, 0x8016, 0x496, 0x8016, 0x490, 0x8015, 0x48a, 0x8015,
-  0x483, 0x8015, 0x47d, 0x8015, 0x477, 0x8014, 0x471, 0x8014,
-  0x46a, 0x8014, 0x464, 0x8014, 0x45e, 0x8014, 0x457, 0x8013,
-  0x451, 0x8013, 0x44b, 0x8013, 0x445, 0x8013, 0x43e, 0x8013,
-  0x438, 0x8012, 0x432, 0x8012, 0x42b, 0x8012, 0x425, 0x8012,
-  0x41f, 0x8012, 0x419, 0x8011, 0x412, 0x8011, 0x40c, 0x8011,
-  0x406, 0x8011, 0x3ff, 0x8011, 0x3f9, 0x8010, 0x3f3, 0x8010,
-  0x3ed, 0x8010, 0x3e6, 0x8010, 0x3e0, 0x8010, 0x3da, 0x800f,
-  0x3d4, 0x800f, 0x3cd, 0x800f, 0x3c7, 0x800f, 0x3c1, 0x800f,
-  0x3ba, 0x800e, 0x3b4, 0x800e, 0x3ae, 0x800e, 0x3a8, 0x800e,
-  0x3a1, 0x800e, 0x39b, 0x800e, 0x395, 0x800d, 0x38e, 0x800d,
-  0x388, 0x800d, 0x382, 0x800d, 0x37c, 0x800d, 0x375, 0x800c,
-  0x36f, 0x800c, 0x369, 0x800c, 0x362, 0x800c, 0x35c, 0x800c,
-  0x356, 0x800c, 0x350, 0x800b, 0x349, 0x800b, 0x343, 0x800b,
-  0x33d, 0x800b, 0x337, 0x800b, 0x330, 0x800b, 0x32a, 0x800b,
-  0x324, 0x800a, 0x31d, 0x800a, 0x317, 0x800a, 0x311, 0x800a,
-  0x30b, 0x800a, 0x304, 0x800a, 0x2fe, 0x8009, 0x2f8, 0x8009,
-  0x2f1, 0x8009, 0x2eb, 0x8009, 0x2e5, 0x8009, 0x2df, 0x8009,
-  0x2d8, 0x8009, 0x2d2, 0x8008, 0x2cc, 0x8008, 0x2c5, 0x8008,
-  0x2bf, 0x8008, 0x2b9, 0x8008, 0x2b3, 0x8008, 0x2ac, 0x8008,
-  0x2a6, 0x8008, 0x2a0, 0x8007, 0x299, 0x8007, 0x293, 0x8007,
-  0x28d, 0x8007, 0x287, 0x8007, 0x280, 0x8007, 0x27a, 0x8007,
-  0x274, 0x8007, 0x26d, 0x8006, 0x267, 0x8006, 0x261, 0x8006,
-  0x25b, 0x8006, 0x254, 0x8006, 0x24e, 0x8006, 0x248, 0x8006,
-  0x242, 0x8006, 0x23b, 0x8005, 0x235, 0x8005, 0x22f, 0x8005,
-  0x228, 0x8005, 0x222, 0x8005, 0x21c, 0x8005, 0x216, 0x8005,
-  0x20f, 0x8005, 0x209, 0x8005, 0x203, 0x8005, 0x1fc, 0x8004,
-  0x1f6, 0x8004, 0x1f0, 0x8004, 0x1ea, 0x8004, 0x1e3, 0x8004,
-  0x1dd, 0x8004, 0x1d7, 0x8004, 0x1d0, 0x8004, 0x1ca, 0x8004,
-  0x1c4, 0x8004, 0x1be, 0x8004, 0x1b7, 0x8003, 0x1b1, 0x8003,
-  0x1ab, 0x8003, 0x1a4, 0x8003, 0x19e, 0x8003, 0x198, 0x8003,
-  0x192, 0x8003, 0x18b, 0x8003, 0x185, 0x8003, 0x17f, 0x8003,
-  0x178, 0x8003, 0x172, 0x8003, 0x16c, 0x8003, 0x166, 0x8002,
-  0x15f, 0x8002, 0x159, 0x8002, 0x153, 0x8002, 0x14d, 0x8002,
-  0x146, 0x8002, 0x140, 0x8002, 0x13a, 0x8002, 0x133, 0x8002,
-  0x12d, 0x8002, 0x127, 0x8002, 0x121, 0x8002, 0x11a, 0x8002,
-  0x114, 0x8002, 0x10e, 0x8002, 0x107, 0x8002, 0x101, 0x8002,
-  0xfb, 0x8001, 0xf5, 0x8001, 0xee, 0x8001, 0xe8, 0x8001,
-  0xe2, 0x8001, 0xdb, 0x8001, 0xd5, 0x8001, 0xcf, 0x8001,
-  0xc9, 0x8001, 0xc2, 0x8001, 0xbc, 0x8001, 0xb6, 0x8001,
-  0xaf, 0x8001, 0xa9, 0x8001, 0xa3, 0x8001, 0x9d, 0x8001,
-  0x96, 0x8001, 0x90, 0x8001, 0x8a, 0x8001, 0x83, 0x8001,
-  0x7d, 0x8001, 0x77, 0x8001, 0x71, 0x8001, 0x6a, 0x8001,
-  0x64, 0x8001, 0x5e, 0x8001, 0x57, 0x8001, 0x51, 0x8001,
-  0x4b, 0x8001, 0x45, 0x8001, 0x3e, 0x8001, 0x38, 0x8001,
-  0x32, 0x8001, 0x2b, 0x8001, 0x25, 0x8001, 0x1f, 0x8001,
-  0x19, 0x8001, 0x12, 0x8001, 0xc, 0x8001, 0x6, 0x8001,
-};
-
-
-/**    
-* \par    
-* cosFactor tables are generated using the formula : 
 cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) 
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
    
-* \par    
-* where N is the number of factors to generate and c is pi/(2*N)    
-* \par    
-* Then converted to q15 format by multiplying with 2^31 and saturated if required.    
-    
-*/
-
-static const q15_t ALIGN4 cos_factorsQ15_128[128] = {
-  0x7fff, 0x7ffa, 0x7ff0, 0x7fe1, 0x7fce, 0x7fb5, 0x7f97, 0x7f75,
-  0x7f4d, 0x7f21, 0x7ef0, 0x7eba, 0x7e7f, 0x7e3f, 0x7dfa, 0x7db0,
-  0x7d62, 0x7d0f, 0x7cb7, 0x7c5a, 0x7bf8, 0x7b92, 0x7b26, 0x7ab6,
-  0x7a42, 0x79c8, 0x794a, 0x78c7, 0x7840, 0x77b4, 0x7723, 0x768e,
-  0x75f4, 0x7555, 0x74b2, 0x740b, 0x735f, 0x72af, 0x71fa, 0x7141,
-  0x7083, 0x6fc1, 0x6efb, 0x6e30, 0x6d62, 0x6c8f, 0x6bb8, 0x6adc,
-  0x69fd, 0x6919, 0x6832, 0x6746, 0x6657, 0x6563, 0x646c, 0x6371,
-  0x6271, 0x616f, 0x6068, 0x5f5e, 0x5e50, 0x5d3e, 0x5c29, 0x5b10,
-  0x59f3, 0x58d4, 0x57b0, 0x568a, 0x5560, 0x5433, 0x5302, 0x51ce,
-  0x5097, 0x4f5e, 0x4e21, 0x4ce1, 0x4b9e, 0x4a58, 0x490f, 0x47c3,
-  0x4675, 0x4524, 0x43d0, 0x427a, 0x4121, 0x3fc5, 0x3e68, 0x3d07,
-  0x3ba5, 0x3a40, 0x38d8, 0x376f, 0x3604, 0x3496, 0x3326, 0x31b5,
-  0x3041, 0x2ecc, 0x2d55, 0x2bdc, 0x2a61, 0x28e5, 0x2767, 0x25e8,
-  0x2467, 0x22e5, 0x2161, 0x1fdc, 0x1e56, 0x1ccf, 0x1b47, 0x19bd,
-  0x1833, 0x16a8, 0x151b, 0x138e, 0x1201, 0x1072, 0xee3, 0xd53,
-  0xbc3, 0xa33, 0x8a2, 0x710, 0x57f, 0x3ed, 0x25b, 0xc9
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_512[512] = {
-  0x7fff, 0x7fff, 0x7fff, 0x7ffe, 0x7ffc, 0x7ffb, 0x7ff9, 0x7ff7,
-  0x7ff4, 0x7ff2, 0x7fee, 0x7feb, 0x7fe7, 0x7fe3, 0x7fdf, 0x7fda,
-  0x7fd6, 0x7fd0, 0x7fcb, 0x7fc5, 0x7fbf, 0x7fb8, 0x7fb1, 0x7faa,
-  0x7fa3, 0x7f9b, 0x7f93, 0x7f8b, 0x7f82, 0x7f79, 0x7f70, 0x7f67,
-  0x7f5d, 0x7f53, 0x7f48, 0x7f3d, 0x7f32, 0x7f27, 0x7f1b, 0x7f0f,
-  0x7f03, 0x7ef6, 0x7ee9, 0x7edc, 0x7ecf, 0x7ec1, 0x7eb3, 0x7ea4,
-  0x7e95, 0x7e86, 0x7e77, 0x7e67, 0x7e57, 0x7e47, 0x7e37, 0x7e26,
-  0x7e14, 0x7e03, 0x7df1, 0x7ddf, 0x7dcd, 0x7dba, 0x7da7, 0x7d94,
-  0x7d80, 0x7d6c, 0x7d58, 0x7d43, 0x7d2f, 0x7d19, 0x7d04, 0x7cee,
-  0x7cd8, 0x7cc2, 0x7cab, 0x7c94, 0x7c7d, 0x7c66, 0x7c4e, 0x7c36,
-  0x7c1d, 0x7c05, 0x7beb, 0x7bd2, 0x7bb9, 0x7b9f, 0x7b84, 0x7b6a,
-  0x7b4f, 0x7b34, 0x7b19, 0x7afd, 0x7ae1, 0x7ac5, 0x7aa8, 0x7a8b,
-  0x7a6e, 0x7a50, 0x7a33, 0x7a15, 0x79f6, 0x79d8, 0x79b9, 0x7999,
-  0x797a, 0x795a, 0x793a, 0x7919, 0x78f9, 0x78d8, 0x78b6, 0x7895,
-  0x7873, 0x7851, 0x782e, 0x780c, 0x77e9, 0x77c5, 0x77a2, 0x777e,
-  0x775a, 0x7735, 0x7710, 0x76eb, 0x76c6, 0x76a0, 0x767b, 0x7654,
-  0x762e, 0x7607, 0x75e0, 0x75b9, 0x7591, 0x7569, 0x7541, 0x7519,
-  0x74f0, 0x74c7, 0x749e, 0x7474, 0x744a, 0x7420, 0x73f6, 0x73cb,
-  0x73a0, 0x7375, 0x7349, 0x731d, 0x72f1, 0x72c5, 0x7298, 0x726b,
-  0x723e, 0x7211, 0x71e3, 0x71b5, 0x7186, 0x7158, 0x7129, 0x70fa,
-  0x70cb, 0x709b, 0x706b, 0x703b, 0x700a, 0x6fda, 0x6fa9, 0x6f77,
-  0x6f46, 0x6f14, 0x6ee2, 0x6eaf, 0x6e7d, 0x6e4a, 0x6e17, 0x6de3,
-  0x6db0, 0x6d7c, 0x6d48, 0x6d13, 0x6cde, 0x6ca9, 0x6c74, 0x6c3f,
-  0x6c09, 0x6bd3, 0x6b9c, 0x6b66, 0x6b2f, 0x6af8, 0x6ac1, 0x6a89,
-  0x6a51, 0x6a19, 0x69e1, 0x69a8, 0x696f, 0x6936, 0x68fd, 0x68c3,
-  0x6889, 0x684f, 0x6815, 0x67da, 0x679f, 0x6764, 0x6729, 0x66ed,
-  0x66b1, 0x6675, 0x6639, 0x65fc, 0x65bf, 0x6582, 0x6545, 0x6507,
-  0x64c9, 0x648b, 0x644d, 0x640e, 0x63cf, 0x6390, 0x6351, 0x6311,
-  0x62d2, 0x6292, 0x6251, 0x6211, 0x61d0, 0x618f, 0x614e, 0x610d,
-  0x60cb, 0x6089, 0x6047, 0x6004, 0x5fc2, 0x5f7f, 0x5f3c, 0x5ef9,
-  0x5eb5, 0x5e71, 0x5e2d, 0x5de9, 0x5da5, 0x5d60, 0x5d1b, 0x5cd6,
-  0x5c91, 0x5c4b, 0x5c06, 0x5bc0, 0x5b79, 0x5b33, 0x5aec, 0x5aa5,
-  0x5a5e, 0x5a17, 0x59d0, 0x5988, 0x5940, 0x58f8, 0x58af, 0x5867,
-  0x581e, 0x57d5, 0x578c, 0x5742, 0x56f9, 0x56af, 0x5665, 0x561a,
-  0x55d0, 0x5585, 0x553a, 0x54ef, 0x54a4, 0x5458, 0x540d, 0x53c1,
-  0x5375, 0x5328, 0x52dc, 0x528f, 0x5242, 0x51f5, 0x51a8, 0x515a,
-  0x510c, 0x50bf, 0x5070, 0x5022, 0x4fd4, 0x4f85, 0x4f36, 0x4ee7,
-  0x4e98, 0x4e48, 0x4df9, 0x4da9, 0x4d59, 0x4d09, 0x4cb8, 0x4c68,
-  0x4c17, 0x4bc6, 0x4b75, 0x4b24, 0x4ad2, 0x4a81, 0x4a2f, 0x49dd,
-  0x498a, 0x4938, 0x48e6, 0x4893, 0x4840, 0x47ed, 0x479a, 0x4746,
-  0x46f3, 0x469f, 0x464b, 0x45f7, 0x45a3, 0x454e, 0x44fa, 0x44a5,
-  0x4450, 0x43fb, 0x43a5, 0x4350, 0x42fa, 0x42a5, 0x424f, 0x41f9,
-  0x41a2, 0x414c, 0x40f6, 0x409f, 0x4048, 0x3ff1, 0x3f9a, 0x3f43,
-  0x3eeb, 0x3e93, 0x3e3c, 0x3de4, 0x3d8c, 0x3d33, 0x3cdb, 0x3c83,
-  0x3c2a, 0x3bd1, 0x3b78, 0x3b1f, 0x3ac6, 0x3a6c, 0x3a13, 0x39b9,
-  0x395f, 0x3906, 0x38ab, 0x3851, 0x37f7, 0x379c, 0x3742, 0x36e7,
-  0x368c, 0x3631, 0x35d6, 0x357b, 0x351f, 0x34c4, 0x3468, 0x340c,
-  0x33b0, 0x3354, 0x32f8, 0x329c, 0x3240, 0x31e3, 0x3186, 0x312a,
-  0x30cd, 0x3070, 0x3013, 0x2fb5, 0x2f58, 0x2efb, 0x2e9d, 0x2e3f,
-  0x2de2, 0x2d84, 0x2d26, 0x2cc8, 0x2c69, 0x2c0b, 0x2bad, 0x2b4e,
-  0x2aef, 0x2a91, 0x2a32, 0x29d3, 0x2974, 0x2915, 0x28b5, 0x2856,
-  0x27f6, 0x2797, 0x2737, 0x26d8, 0x2678, 0x2618, 0x25b8, 0x2558,
-  0x24f7, 0x2497, 0x2437, 0x23d6, 0x2376, 0x2315, 0x22b4, 0x2254,
-  0x21f3, 0x2192, 0x2131, 0x20d0, 0x206e, 0x200d, 0x1fac, 0x1f4a,
-  0x1ee9, 0x1e87, 0x1e25, 0x1dc4, 0x1d62, 0x1d00, 0x1c9e, 0x1c3c,
-  0x1bda, 0x1b78, 0x1b16, 0x1ab3, 0x1a51, 0x19ef, 0x198c, 0x192a,
-  0x18c7, 0x1864, 0x1802, 0x179f, 0x173c, 0x16d9, 0x1676, 0x1613,
-  0x15b0, 0x154d, 0x14ea, 0x1487, 0x1423, 0x13c0, 0x135d, 0x12f9,
-  0x1296, 0x1232, 0x11cf, 0x116b, 0x1108, 0x10a4, 0x1040, 0xfdd,
-  0xf79, 0xf15, 0xeb1, 0xe4d, 0xde9, 0xd85, 0xd21, 0xcbd,
-  0xc59, 0xbf5, 0xb91, 0xb2d, 0xac9, 0xa65, 0xa00, 0x99c,
-  0x938, 0x8d4, 0x86f, 0x80b, 0x7a7, 0x742, 0x6de, 0x67a,
-  0x615, 0x5b1, 0x54c, 0x4e8, 0x483, 0x41f, 0x3ba, 0x356,
-  0x2f1, 0x28d, 0x228, 0x1c4, 0x15f, 0xfb, 0x96, 0x32,
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_2048[2048] = {
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffd, 0x7ffd,
-  0x7ffd, 0x7ffd, 0x7ffc, 0x7ffc, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffa,
-  0x7ffa, 0x7ff9, 0x7ff9, 0x7ff8, 0x7ff8, 0x7ff7, 0x7ff7, 0x7ff6,
-  0x7ff5, 0x7ff5, 0x7ff4, 0x7ff3, 0x7ff3, 0x7ff2, 0x7ff1, 0x7ff0,
-  0x7ff0, 0x7fef, 0x7fee, 0x7fed, 0x7fec, 0x7fec, 0x7feb, 0x7fea,
-  0x7fe9, 0x7fe8, 0x7fe7, 0x7fe6, 0x7fe5, 0x7fe4, 0x7fe3, 0x7fe2,
-  0x7fe1, 0x7fe0, 0x7fdf, 0x7fdd, 0x7fdc, 0x7fdb, 0x7fda, 0x7fd9,
-  0x7fd7, 0x7fd6, 0x7fd5, 0x7fd4, 0x7fd2, 0x7fd1, 0x7fd0, 0x7fce,
-  0x7fcd, 0x7fcb, 0x7fca, 0x7fc9, 0x7fc7, 0x7fc6, 0x7fc4, 0x7fc3,
-  0x7fc1, 0x7fc0, 0x7fbe, 0x7fbc, 0x7fbb, 0x7fb9, 0x7fb7, 0x7fb6,
-  0x7fb4, 0x7fb2, 0x7fb1, 0x7faf, 0x7fad, 0x7fab, 0x7fa9, 0x7fa8,
-  0x7fa6, 0x7fa4, 0x7fa2, 0x7fa0, 0x7f9e, 0x7f9c, 0x7f9a, 0x7f98,
-  0x7f96, 0x7f94, 0x7f92, 0x7f90, 0x7f8e, 0x7f8c, 0x7f8a, 0x7f88,
-  0x7f86, 0x7f83, 0x7f81, 0x7f7f, 0x7f7d, 0x7f7b, 0x7f78, 0x7f76,
-  0x7f74, 0x7f71, 0x7f6f, 0x7f6d, 0x7f6a, 0x7f68, 0x7f65, 0x7f63,
-  0x7f60, 0x7f5e, 0x7f5b, 0x7f59, 0x7f56, 0x7f54, 0x7f51, 0x7f4f,
-  0x7f4c, 0x7f49, 0x7f47, 0x7f44, 0x7f41, 0x7f3f, 0x7f3c, 0x7f39,
-  0x7f36, 0x7f34, 0x7f31, 0x7f2e, 0x7f2b, 0x7f28, 0x7f25, 0x7f23,
-  0x7f20, 0x7f1d, 0x7f1a, 0x7f17, 0x7f14, 0x7f11, 0x7f0e, 0x7f0b,
-  0x7f08, 0x7f04, 0x7f01, 0x7efe, 0x7efb, 0x7ef8, 0x7ef5, 0x7ef1,
-  0x7eee, 0x7eeb, 0x7ee8, 0x7ee4, 0x7ee1, 0x7ede, 0x7eda, 0x7ed7,
-  0x7ed4, 0x7ed0, 0x7ecd, 0x7ec9, 0x7ec6, 0x7ec3, 0x7ebf, 0x7ebb,
-  0x7eb8, 0x7eb4, 0x7eb1, 0x7ead, 0x7eaa, 0x7ea6, 0x7ea2, 0x7e9f,
-  0x7e9b, 0x7e97, 0x7e94, 0x7e90, 0x7e8c, 0x7e88, 0x7e84, 0x7e81,
-  0x7e7d, 0x7e79, 0x7e75, 0x7e71, 0x7e6d, 0x7e69, 0x7e65, 0x7e61,
-  0x7e5d, 0x7e59, 0x7e55, 0x7e51, 0x7e4d, 0x7e49, 0x7e45, 0x7e41,
-  0x7e3d, 0x7e39, 0x7e34, 0x7e30, 0x7e2c, 0x7e28, 0x7e24, 0x7e1f,
-  0x7e1b, 0x7e17, 0x7e12, 0x7e0e, 0x7e0a, 0x7e05, 0x7e01, 0x7dfc,
-  0x7df8, 0x7df3, 0x7def, 0x7dea, 0x7de6, 0x7de1, 0x7ddd, 0x7dd8,
-  0x7dd4, 0x7dcf, 0x7dca, 0x7dc6, 0x7dc1, 0x7dbc, 0x7db8, 0x7db3,
-  0x7dae, 0x7da9, 0x7da5, 0x7da0, 0x7d9b, 0x7d96, 0x7d91, 0x7d8c,
-  0x7d87, 0x7d82, 0x7d7e, 0x7d79, 0x7d74, 0x7d6f, 0x7d6a, 0x7d65,
-  0x7d60, 0x7d5a, 0x7d55, 0x7d50, 0x7d4b, 0x7d46, 0x7d41, 0x7d3c,
-  0x7d36, 0x7d31, 0x7d2c, 0x7d27, 0x7d21, 0x7d1c, 0x7d17, 0x7d11,
-  0x7d0c, 0x7d07, 0x7d01, 0x7cfc, 0x7cf6, 0x7cf1, 0x7cec, 0x7ce6,
-  0x7ce1, 0x7cdb, 0x7cd5, 0x7cd0, 0x7cca, 0x7cc5, 0x7cbf, 0x7cb9,
-  0x7cb4, 0x7cae, 0x7ca8, 0x7ca3, 0x7c9d, 0x7c97, 0x7c91, 0x7c8c,
-  0x7c86, 0x7c80, 0x7c7a, 0x7c74, 0x7c6e, 0x7c69, 0x7c63, 0x7c5d,
-  0x7c57, 0x7c51, 0x7c4b, 0x7c45, 0x7c3f, 0x7c39, 0x7c33, 0x7c2d,
-  0x7c26, 0x7c20, 0x7c1a, 0x7c14, 0x7c0e, 0x7c08, 0x7c01, 0x7bfb,
-  0x7bf5, 0x7bef, 0x7be8, 0x7be2, 0x7bdc, 0x7bd5, 0x7bcf, 0x7bc9,
-  0x7bc2, 0x7bbc, 0x7bb5, 0x7baf, 0x7ba8, 0x7ba2, 0x7b9b, 0x7b95,
-  0x7b8e, 0x7b88, 0x7b81, 0x7b7a, 0x7b74, 0x7b6d, 0x7b67, 0x7b60,
-  0x7b59, 0x7b52, 0x7b4c, 0x7b45, 0x7b3e, 0x7b37, 0x7b31, 0x7b2a,
-  0x7b23, 0x7b1c, 0x7b15, 0x7b0e, 0x7b07, 0x7b00, 0x7af9, 0x7af2,
-  0x7aeb, 0x7ae4, 0x7add, 0x7ad6, 0x7acf, 0x7ac8, 0x7ac1, 0x7aba,
-  0x7ab3, 0x7aac, 0x7aa4, 0x7a9d, 0x7a96, 0x7a8f, 0x7a87, 0x7a80,
-  0x7a79, 0x7a72, 0x7a6a, 0x7a63, 0x7a5c, 0x7a54, 0x7a4d, 0x7a45,
-  0x7a3e, 0x7a36, 0x7a2f, 0x7a27, 0x7a20, 0x7a18, 0x7a11, 0x7a09,
-  0x7a02, 0x79fa, 0x79f2, 0x79eb, 0x79e3, 0x79db, 0x79d4, 0x79cc,
-  0x79c4, 0x79bc, 0x79b5, 0x79ad, 0x79a5, 0x799d, 0x7995, 0x798e,
-  0x7986, 0x797e, 0x7976, 0x796e, 0x7966, 0x795e, 0x7956, 0x794e,
-  0x7946, 0x793e, 0x7936, 0x792e, 0x7926, 0x791e, 0x7915, 0x790d,
-  0x7905, 0x78fd, 0x78f5, 0x78ec, 0x78e4, 0x78dc, 0x78d4, 0x78cb,
-  0x78c3, 0x78bb, 0x78b2, 0x78aa, 0x78a2, 0x7899, 0x7891, 0x7888,
-  0x7880, 0x7877, 0x786f, 0x7866, 0x785e, 0x7855, 0x784d, 0x7844,
-  0x783b, 0x7833, 0x782a, 0x7821, 0x7819, 0x7810, 0x7807, 0x77ff,
-  0x77f6, 0x77ed, 0x77e4, 0x77db, 0x77d3, 0x77ca, 0x77c1, 0x77b8,
-  0x77af, 0x77a6, 0x779d, 0x7794, 0x778b, 0x7782, 0x7779, 0x7770,
-  0x7767, 0x775e, 0x7755, 0x774c, 0x7743, 0x773a, 0x7731, 0x7727,
-  0x771e, 0x7715, 0x770c, 0x7703, 0x76f9, 0x76f0, 0x76e7, 0x76dd,
-  0x76d4, 0x76cb, 0x76c1, 0x76b8, 0x76af, 0x76a5, 0x769c, 0x7692,
-  0x7689, 0x767f, 0x7676, 0x766c, 0x7663, 0x7659, 0x7650, 0x7646,
-  0x763c, 0x7633, 0x7629, 0x761f, 0x7616, 0x760c, 0x7602, 0x75f9,
-  0x75ef, 0x75e5, 0x75db, 0x75d1, 0x75c8, 0x75be, 0x75b4, 0x75aa,
-  0x75a0, 0x7596, 0x758c, 0x7582, 0x7578, 0x756e, 0x7564, 0x755a,
-  0x7550, 0x7546, 0x753c, 0x7532, 0x7528, 0x751e, 0x7514, 0x7509,
-  0x74ff, 0x74f5, 0x74eb, 0x74e1, 0x74d6, 0x74cc, 0x74c2, 0x74b7,
-  0x74ad, 0x74a3, 0x7498, 0x748e, 0x7484, 0x7479, 0x746f, 0x7464,
-  0x745a, 0x744f, 0x7445, 0x743a, 0x7430, 0x7425, 0x741b, 0x7410,
-  0x7406, 0x73fb, 0x73f0, 0x73e6, 0x73db, 0x73d0, 0x73c6, 0x73bb,
-  0x73b0, 0x73a5, 0x739b, 0x7390, 0x7385, 0x737a, 0x736f, 0x7364,
-  0x7359, 0x734f, 0x7344, 0x7339, 0x732e, 0x7323, 0x7318, 0x730d,
-  0x7302, 0x72f7, 0x72ec, 0x72e1, 0x72d5, 0x72ca, 0x72bf, 0x72b4,
-  0x72a9, 0x729e, 0x7293, 0x7287, 0x727c, 0x7271, 0x7266, 0x725a,
-  0x724f, 0x7244, 0x7238, 0x722d, 0x7222, 0x7216, 0x720b, 0x71ff,
-  0x71f4, 0x71e9, 0x71dd, 0x71d2, 0x71c6, 0x71bb, 0x71af, 0x71a3,
-  0x7198, 0x718c, 0x7181, 0x7175, 0x7169, 0x715e, 0x7152, 0x7146,
-  0x713b, 0x712f, 0x7123, 0x7117, 0x710c, 0x7100, 0x70f4, 0x70e8,
-  0x70dc, 0x70d1, 0x70c5, 0x70b9, 0x70ad, 0x70a1, 0x7095, 0x7089,
-  0x707d, 0x7071, 0x7065, 0x7059, 0x704d, 0x7041, 0x7035, 0x7029,
-  0x701d, 0x7010, 0x7004, 0x6ff8, 0x6fec, 0x6fe0, 0x6fd3, 0x6fc7,
-  0x6fbb, 0x6faf, 0x6fa2, 0x6f96, 0x6f8a, 0x6f7d, 0x6f71, 0x6f65,
-  0x6f58, 0x6f4c, 0x6f3f, 0x6f33, 0x6f27, 0x6f1a, 0x6f0e, 0x6f01,
-  0x6ef5, 0x6ee8, 0x6edc, 0x6ecf, 0x6ec2, 0x6eb6, 0x6ea9, 0x6e9c,
-  0x6e90, 0x6e83, 0x6e76, 0x6e6a, 0x6e5d, 0x6e50, 0x6e44, 0x6e37,
-  0x6e2a, 0x6e1d, 0x6e10, 0x6e04, 0x6df7, 0x6dea, 0x6ddd, 0x6dd0,
-  0x6dc3, 0x6db6, 0x6da9, 0x6d9c, 0x6d8f, 0x6d82, 0x6d75, 0x6d68,
-  0x6d5b, 0x6d4e, 0x6d41, 0x6d34, 0x6d27, 0x6d1a, 0x6d0c, 0x6cff,
-  0x6cf2, 0x6ce5, 0x6cd8, 0x6cca, 0x6cbd, 0x6cb0, 0x6ca3, 0x6c95,
-  0x6c88, 0x6c7b, 0x6c6d, 0x6c60, 0x6c53, 0x6c45, 0x6c38, 0x6c2a,
-  0x6c1d, 0x6c0f, 0x6c02, 0x6bf5, 0x6be7, 0x6bd9, 0x6bcc, 0x6bbe,
-  0x6bb1, 0x6ba3, 0x6b96, 0x6b88, 0x6b7a, 0x6b6d, 0x6b5f, 0x6b51,
-  0x6b44, 0x6b36, 0x6b28, 0x6b1a, 0x6b0d, 0x6aff, 0x6af1, 0x6ae3,
-  0x6ad5, 0x6ac8, 0x6aba, 0x6aac, 0x6a9e, 0x6a90, 0x6a82, 0x6a74,
-  0x6a66, 0x6a58, 0x6a4a, 0x6a3c, 0x6a2e, 0x6a20, 0x6a12, 0x6a04,
-  0x69f6, 0x69e8, 0x69da, 0x69cb, 0x69bd, 0x69af, 0x69a1, 0x6993,
-  0x6985, 0x6976, 0x6968, 0x695a, 0x694b, 0x693d, 0x692f, 0x6921,
-  0x6912, 0x6904, 0x68f5, 0x68e7, 0x68d9, 0x68ca, 0x68bc, 0x68ad,
-  0x689f, 0x6890, 0x6882, 0x6873, 0x6865, 0x6856, 0x6848, 0x6839,
-  0x682b, 0x681c, 0x680d, 0x67ff, 0x67f0, 0x67e1, 0x67d3, 0x67c4,
-  0x67b5, 0x67a6, 0x6798, 0x6789, 0x677a, 0x676b, 0x675d, 0x674e,
-  0x673f, 0x6730, 0x6721, 0x6712, 0x6703, 0x66f4, 0x66e5, 0x66d6,
-  0x66c8, 0x66b9, 0x66aa, 0x669b, 0x668b, 0x667c, 0x666d, 0x665e,
-  0x664f, 0x6640, 0x6631, 0x6622, 0x6613, 0x6603, 0x65f4, 0x65e5,
-  0x65d6, 0x65c7, 0x65b7, 0x65a8, 0x6599, 0x658a, 0x657a, 0x656b,
-  0x655c, 0x654c, 0x653d, 0x652d, 0x651e, 0x650f, 0x64ff, 0x64f0,
-  0x64e0, 0x64d1, 0x64c1, 0x64b2, 0x64a2, 0x6493, 0x6483, 0x6474,
-  0x6464, 0x6454, 0x6445, 0x6435, 0x6426, 0x6416, 0x6406, 0x63f7,
-  0x63e7, 0x63d7, 0x63c7, 0x63b8, 0x63a8, 0x6398, 0x6388, 0x6378,
-  0x6369, 0x6359, 0x6349, 0x6339, 0x6329, 0x6319, 0x6309, 0x62f9,
-  0x62ea, 0x62da, 0x62ca, 0x62ba, 0x62aa, 0x629a, 0x628a, 0x627a,
-  0x6269, 0x6259, 0x6249, 0x6239, 0x6229, 0x6219, 0x6209, 0x61f9,
-  0x61e8, 0x61d8, 0x61c8, 0x61b8, 0x61a8, 0x6197, 0x6187, 0x6177,
-  0x6166, 0x6156, 0x6146, 0x6135, 0x6125, 0x6115, 0x6104, 0x60f4,
-  0x60e4, 0x60d3, 0x60c3, 0x60b2, 0x60a2, 0x6091, 0x6081, 0x6070,
-  0x6060, 0x604f, 0x603f, 0x602e, 0x601d, 0x600d, 0x5ffc, 0x5fec,
-  0x5fdb, 0x5fca, 0x5fba, 0x5fa9, 0x5f98, 0x5f87, 0x5f77, 0x5f66,
-  0x5f55, 0x5f44, 0x5f34, 0x5f23, 0x5f12, 0x5f01, 0x5ef0, 0x5edf,
-  0x5ecf, 0x5ebe, 0x5ead, 0x5e9c, 0x5e8b, 0x5e7a, 0x5e69, 0x5e58,
-  0x5e47, 0x5e36, 0x5e25, 0x5e14, 0x5e03, 0x5df2, 0x5de1, 0x5dd0,
-  0x5dbf, 0x5dad, 0x5d9c, 0x5d8b, 0x5d7a, 0x5d69, 0x5d58, 0x5d46,
-  0x5d35, 0x5d24, 0x5d13, 0x5d01, 0x5cf0, 0x5cdf, 0x5cce, 0x5cbc,
-  0x5cab, 0x5c9a, 0x5c88, 0x5c77, 0x5c66, 0x5c54, 0x5c43, 0x5c31,
-  0x5c20, 0x5c0e, 0x5bfd, 0x5beb, 0x5bda, 0x5bc8, 0x5bb7, 0x5ba5,
-  0x5b94, 0x5b82, 0x5b71, 0x5b5f, 0x5b4d, 0x5b3c, 0x5b2a, 0x5b19,
-  0x5b07, 0x5af5, 0x5ae4, 0x5ad2, 0x5ac0, 0x5aae, 0x5a9d, 0x5a8b,
-  0x5a79, 0x5a67, 0x5a56, 0x5a44, 0x5a32, 0x5a20, 0x5a0e, 0x59fc,
-  0x59ea, 0x59d9, 0x59c7, 0x59b5, 0x59a3, 0x5991, 0x597f, 0x596d,
-  0x595b, 0x5949, 0x5937, 0x5925, 0x5913, 0x5901, 0x58ef, 0x58dd,
-  0x58cb, 0x58b8, 0x58a6, 0x5894, 0x5882, 0x5870, 0x585e, 0x584b,
-  0x5839, 0x5827, 0x5815, 0x5803, 0x57f0, 0x57de, 0x57cc, 0x57b9,
-  0x57a7, 0x5795, 0x5783, 0x5770, 0x575e, 0x574b, 0x5739, 0x5727,
-  0x5714, 0x5702, 0x56ef, 0x56dd, 0x56ca, 0x56b8, 0x56a5, 0x5693,
-  0x5680, 0x566e, 0x565b, 0x5649, 0x5636, 0x5624, 0x5611, 0x55fe,
-  0x55ec, 0x55d9, 0x55c7, 0x55b4, 0x55a1, 0x558f, 0x557c, 0x5569,
-  0x5556, 0x5544, 0x5531, 0x551e, 0x550b, 0x54f9, 0x54e6, 0x54d3,
-  0x54c0, 0x54ad, 0x549a, 0x5488, 0x5475, 0x5462, 0x544f, 0x543c,
-  0x5429, 0x5416, 0x5403, 0x53f0, 0x53dd, 0x53ca, 0x53b7, 0x53a4,
-  0x5391, 0x537e, 0x536b, 0x5358, 0x5345, 0x5332, 0x531f, 0x530c,
-  0x52f8, 0x52e5, 0x52d2, 0x52bf, 0x52ac, 0x5299, 0x5285, 0x5272,
-  0x525f, 0x524c, 0x5238, 0x5225, 0x5212, 0x51ff, 0x51eb, 0x51d8,
-  0x51c5, 0x51b1, 0x519e, 0x518b, 0x5177, 0x5164, 0x5150, 0x513d,
-  0x512a, 0x5116, 0x5103, 0x50ef, 0x50dc, 0x50c8, 0x50b5, 0x50a1,
-  0x508e, 0x507a, 0x5067, 0x5053, 0x503f, 0x502c, 0x5018, 0x5005,
-  0x4ff1, 0x4fdd, 0x4fca, 0x4fb6, 0x4fa2, 0x4f8f, 0x4f7b, 0x4f67,
-  0x4f54, 0x4f40, 0x4f2c, 0x4f18, 0x4f05, 0x4ef1, 0x4edd, 0x4ec9,
-  0x4eb6, 0x4ea2, 0x4e8e, 0x4e7a, 0x4e66, 0x4e52, 0x4e3e, 0x4e2a,
-  0x4e17, 0x4e03, 0x4def, 0x4ddb, 0x4dc7, 0x4db3, 0x4d9f, 0x4d8b,
-  0x4d77, 0x4d63, 0x4d4f, 0x4d3b, 0x4d27, 0x4d13, 0x4cff, 0x4ceb,
-  0x4cd6, 0x4cc2, 0x4cae, 0x4c9a, 0x4c86, 0x4c72, 0x4c5e, 0x4c49,
-  0x4c35, 0x4c21, 0x4c0d, 0x4bf9, 0x4be4, 0x4bd0, 0x4bbc, 0x4ba8,
-  0x4b93, 0x4b7f, 0x4b6b, 0x4b56, 0x4b42, 0x4b2e, 0x4b19, 0x4b05,
-  0x4af1, 0x4adc, 0x4ac8, 0x4ab4, 0x4a9f, 0x4a8b, 0x4a76, 0x4a62,
-  0x4a4d, 0x4a39, 0x4a24, 0x4a10, 0x49fb, 0x49e7, 0x49d2, 0x49be,
-  0x49a9, 0x4995, 0x4980, 0x496c, 0x4957, 0x4942, 0x492e, 0x4919,
-  0x4905, 0x48f0, 0x48db, 0x48c7, 0x48b2, 0x489d, 0x4888, 0x4874,
-  0x485f, 0x484a, 0x4836, 0x4821, 0x480c, 0x47f7, 0x47e2, 0x47ce,
-  0x47b9, 0x47a4, 0x478f, 0x477a, 0x4765, 0x4751, 0x473c, 0x4727,
-  0x4712, 0x46fd, 0x46e8, 0x46d3, 0x46be, 0x46a9, 0x4694, 0x467f,
-  0x466a, 0x4655, 0x4640, 0x462b, 0x4616, 0x4601, 0x45ec, 0x45d7,
-  0x45c2, 0x45ad, 0x4598, 0x4583, 0x456e, 0x4559, 0x4544, 0x452e,
-  0x4519, 0x4504, 0x44ef, 0x44da, 0x44c5, 0x44af, 0x449a, 0x4485,
-  0x4470, 0x445a, 0x4445, 0x4430, 0x441b, 0x4405, 0x43f0, 0x43db,
-  0x43c5, 0x43b0, 0x439b, 0x4385, 0x4370, 0x435b, 0x4345, 0x4330,
-  0x431b, 0x4305, 0x42f0, 0x42da, 0x42c5, 0x42af, 0x429a, 0x4284,
-  0x426f, 0x425a, 0x4244, 0x422f, 0x4219, 0x4203, 0x41ee, 0x41d8,
-  0x41c3, 0x41ad, 0x4198, 0x4182, 0x416d, 0x4157, 0x4141, 0x412c,
-  0x4116, 0x4100, 0x40eb, 0x40d5, 0x40bf, 0x40aa, 0x4094, 0x407e,
-  0x4069, 0x4053, 0x403d, 0x4027, 0x4012, 0x3ffc, 0x3fe6, 0x3fd0,
-  0x3fbb, 0x3fa5, 0x3f8f, 0x3f79, 0x3f63, 0x3f4d, 0x3f38, 0x3f22,
-  0x3f0c, 0x3ef6, 0x3ee0, 0x3eca, 0x3eb4, 0x3e9e, 0x3e88, 0x3e73,
-  0x3e5d, 0x3e47, 0x3e31, 0x3e1b, 0x3e05, 0x3def, 0x3dd9, 0x3dc3,
-  0x3dad, 0x3d97, 0x3d81, 0x3d6b, 0x3d55, 0x3d3e, 0x3d28, 0x3d12,
-  0x3cfc, 0x3ce6, 0x3cd0, 0x3cba, 0x3ca4, 0x3c8e, 0x3c77, 0x3c61,
-  0x3c4b, 0x3c35, 0x3c1f, 0x3c09, 0x3bf2, 0x3bdc, 0x3bc6, 0x3bb0,
-  0x3b99, 0x3b83, 0x3b6d, 0x3b57, 0x3b40, 0x3b2a, 0x3b14, 0x3afe,
-  0x3ae7, 0x3ad1, 0x3abb, 0x3aa4, 0x3a8e, 0x3a78, 0x3a61, 0x3a4b,
-  0x3a34, 0x3a1e, 0x3a08, 0x39f1, 0x39db, 0x39c4, 0x39ae, 0x3998,
-  0x3981, 0x396b, 0x3954, 0x393e, 0x3927, 0x3911, 0x38fa, 0x38e4,
-  0x38cd, 0x38b7, 0x38a0, 0x388a, 0x3873, 0x385d, 0x3846, 0x382f,
-  0x3819, 0x3802, 0x37ec, 0x37d5, 0x37be, 0x37a8, 0x3791, 0x377a,
-  0x3764, 0x374d, 0x3736, 0x3720, 0x3709, 0x36f2, 0x36dc, 0x36c5,
-  0x36ae, 0x3698, 0x3681, 0x366a, 0x3653, 0x363d, 0x3626, 0x360f,
-  0x35f8, 0x35e1, 0x35cb, 0x35b4, 0x359d, 0x3586, 0x356f, 0x3558,
-  0x3542, 0x352b, 0x3514, 0x34fd, 0x34e6, 0x34cf, 0x34b8, 0x34a1,
-  0x348b, 0x3474, 0x345d, 0x3446, 0x342f, 0x3418, 0x3401, 0x33ea,
-  0x33d3, 0x33bc, 0x33a5, 0x338e, 0x3377, 0x3360, 0x3349, 0x3332,
-  0x331b, 0x3304, 0x32ed, 0x32d6, 0x32bf, 0x32a8, 0x3290, 0x3279,
-  0x3262, 0x324b, 0x3234, 0x321d, 0x3206, 0x31ef, 0x31d8, 0x31c0,
-  0x31a9, 0x3192, 0x317b, 0x3164, 0x314c, 0x3135, 0x311e, 0x3107,
-  0x30f0, 0x30d8, 0x30c1, 0x30aa, 0x3093, 0x307b, 0x3064, 0x304d,
-  0x3036, 0x301e, 0x3007, 0x2ff0, 0x2fd8, 0x2fc1, 0x2faa, 0x2f92,
-  0x2f7b, 0x2f64, 0x2f4c, 0x2f35, 0x2f1e, 0x2f06, 0x2eef, 0x2ed8,
-  0x2ec0, 0x2ea9, 0x2e91, 0x2e7a, 0x2e63, 0x2e4b, 0x2e34, 0x2e1c,
-  0x2e05, 0x2ded, 0x2dd6, 0x2dbe, 0x2da7, 0x2d8f, 0x2d78, 0x2d60,
-  0x2d49, 0x2d31, 0x2d1a, 0x2d02, 0x2ceb, 0x2cd3, 0x2cbc, 0x2ca4,
-  0x2c8d, 0x2c75, 0x2c5e, 0x2c46, 0x2c2e, 0x2c17, 0x2bff, 0x2be8,
-  0x2bd0, 0x2bb8, 0x2ba1, 0x2b89, 0x2b71, 0x2b5a, 0x2b42, 0x2b2b,
-  0x2b13, 0x2afb, 0x2ae4, 0x2acc, 0x2ab4, 0x2a9c, 0x2a85, 0x2a6d,
-  0x2a55, 0x2a3e, 0x2a26, 0x2a0e, 0x29f6, 0x29df, 0x29c7, 0x29af,
-  0x2997, 0x2980, 0x2968, 0x2950, 0x2938, 0x2920, 0x2909, 0x28f1,
-  0x28d9, 0x28c1, 0x28a9, 0x2892, 0x287a, 0x2862, 0x284a, 0x2832,
-  0x281a, 0x2802, 0x27eb, 0x27d3, 0x27bb, 0x27a3, 0x278b, 0x2773,
-  0x275b, 0x2743, 0x272b, 0x2713, 0x26fb, 0x26e4, 0x26cc, 0x26b4,
-  0x269c, 0x2684, 0x266c, 0x2654, 0x263c, 0x2624, 0x260c, 0x25f4,
-  0x25dc, 0x25c4, 0x25ac, 0x2594, 0x257c, 0x2564, 0x254c, 0x2534,
-  0x251c, 0x2503, 0x24eb, 0x24d3, 0x24bb, 0x24a3, 0x248b, 0x2473,
-  0x245b, 0x2443, 0x242b, 0x2413, 0x23fa, 0x23e2, 0x23ca, 0x23b2,
-  0x239a, 0x2382, 0x236a, 0x2352, 0x2339, 0x2321, 0x2309, 0x22f1,
-  0x22d9, 0x22c0, 0x22a8, 0x2290, 0x2278, 0x2260, 0x2247, 0x222f,
-  0x2217, 0x21ff, 0x21e7, 0x21ce, 0x21b6, 0x219e, 0x2186, 0x216d,
-  0x2155, 0x213d, 0x2125, 0x210c, 0x20f4, 0x20dc, 0x20c3, 0x20ab,
-  0x2093, 0x207a, 0x2062, 0x204a, 0x2032, 0x2019, 0x2001, 0x1fe9,
-  0x1fd0, 0x1fb8, 0x1f9f, 0x1f87, 0x1f6f, 0x1f56, 0x1f3e, 0x1f26,
-  0x1f0d, 0x1ef5, 0x1edd, 0x1ec4, 0x1eac, 0x1e93, 0x1e7b, 0x1e62,
-  0x1e4a, 0x1e32, 0x1e19, 0x1e01, 0x1de8, 0x1dd0, 0x1db7, 0x1d9f,
-  0x1d87, 0x1d6e, 0x1d56, 0x1d3d, 0x1d25, 0x1d0c, 0x1cf4, 0x1cdb,
-  0x1cc3, 0x1caa, 0x1c92, 0x1c79, 0x1c61, 0x1c48, 0x1c30, 0x1c17,
-  0x1bff, 0x1be6, 0x1bce, 0x1bb5, 0x1b9d, 0x1b84, 0x1b6c, 0x1b53,
-  0x1b3a, 0x1b22, 0x1b09, 0x1af1, 0x1ad8, 0x1ac0, 0x1aa7, 0x1a8e,
-  0x1a76, 0x1a5d, 0x1a45, 0x1a2c, 0x1a13, 0x19fb, 0x19e2, 0x19ca,
-  0x19b1, 0x1998, 0x1980, 0x1967, 0x194e, 0x1936, 0x191d, 0x1905,
-  0x18ec, 0x18d3, 0x18bb, 0x18a2, 0x1889, 0x1871, 0x1858, 0x183f,
-  0x1827, 0x180e, 0x17f5, 0x17dd, 0x17c4, 0x17ab, 0x1792, 0x177a,
-  0x1761, 0x1748, 0x1730, 0x1717, 0x16fe, 0x16e5, 0x16cd, 0x16b4,
-  0x169b, 0x1682, 0x166a, 0x1651, 0x1638, 0x161f, 0x1607, 0x15ee,
-  0x15d5, 0x15bc, 0x15a4, 0x158b, 0x1572, 0x1559, 0x1541, 0x1528,
-  0x150f, 0x14f6, 0x14dd, 0x14c5, 0x14ac, 0x1493, 0x147a, 0x1461,
-  0x1449, 0x1430, 0x1417, 0x13fe, 0x13e5, 0x13cc, 0x13b4, 0x139b,
-  0x1382, 0x1369, 0x1350, 0x1337, 0x131f, 0x1306, 0x12ed, 0x12d4,
-  0x12bb, 0x12a2, 0x1289, 0x1271, 0x1258, 0x123f, 0x1226, 0x120d,
-  0x11f4, 0x11db, 0x11c2, 0x11a9, 0x1191, 0x1178, 0x115f, 0x1146,
-  0x112d, 0x1114, 0x10fb, 0x10e2, 0x10c9, 0x10b0, 0x1098, 0x107f,
-  0x1066, 0x104d, 0x1034, 0x101b, 0x1002, 0xfe9, 0xfd0, 0xfb7,
-  0xf9e, 0xf85, 0xf6c, 0xf53, 0xf3a, 0xf21, 0xf08, 0xef0,
-  0xed7, 0xebe, 0xea5, 0xe8c, 0xe73, 0xe5a, 0xe41, 0xe28,
-  0xe0f, 0xdf6, 0xddd, 0xdc4, 0xdab, 0xd92, 0xd79, 0xd60,
-  0xd47, 0xd2e, 0xd15, 0xcfc, 0xce3, 0xcca, 0xcb1, 0xc98,
-  0xc7f, 0xc66, 0xc4d, 0xc34, 0xc1b, 0xc02, 0xbe9, 0xbd0,
-  0xbb7, 0xb9e, 0xb85, 0xb6c, 0xb53, 0xb3a, 0xb20, 0xb07,
-  0xaee, 0xad5, 0xabc, 0xaa3, 0xa8a, 0xa71, 0xa58, 0xa3f,
-  0xa26, 0xa0d, 0x9f4, 0x9db, 0x9c2, 0x9a9, 0x990, 0x977,
-  0x95e, 0x944, 0x92b, 0x912, 0x8f9, 0x8e0, 0x8c7, 0x8ae,
-  0x895, 0x87c, 0x863, 0x84a, 0x831, 0x818, 0x7fe, 0x7e5,
-  0x7cc, 0x7b3, 0x79a, 0x781, 0x768, 0x74f, 0x736, 0x71d,
-  0x704, 0x6ea, 0x6d1, 0x6b8, 0x69f, 0x686, 0x66d, 0x654,
-  0x63b, 0x622, 0x609, 0x5ef, 0x5d6, 0x5bd, 0x5a4, 0x58b,
-  0x572, 0x559, 0x540, 0x527, 0x50d, 0x4f4, 0x4db, 0x4c2,
-  0x4a9, 0x490, 0x477, 0x45e, 0x445, 0x42b, 0x412, 0x3f9,
-  0x3e0, 0x3c7, 0x3ae, 0x395, 0x37c, 0x362, 0x349, 0x330,
-  0x317, 0x2fe, 0x2e5, 0x2cc, 0x2b3, 0x299, 0x280, 0x267,
-  0x24e, 0x235, 0x21c, 0x203, 0x1ea, 0x1d0, 0x1b7, 0x19e,
-  0x185, 0x16c, 0x153, 0x13a, 0x121, 0x107, 0xee, 0xd5,
-  0xbc, 0xa3, 0x8a, 0x71, 0x57, 0x3e, 0x25, 0xc,
-
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_8192[8192] = {
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe,
-  0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe,
-  0x7ffe, 0x7ffe, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd,
-  0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffc,
-  0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc,
-  0x7ffc, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb,
-  0x7ffb, 0x7ffb, 0x7ffb, 0x7ffa, 0x7ffa, 0x7ffa, 0x7ffa, 0x7ffa,
-  0x7ffa, 0x7ffa, 0x7ffa, 0x7ffa, 0x7ff9, 0x7ff9, 0x7ff9, 0x7ff9,
-  0x7ff9, 0x7ff9, 0x7ff9, 0x7ff9, 0x7ff8, 0x7ff8, 0x7ff8, 0x7ff8,
-  0x7ff8, 0x7ff8, 0x7ff8, 0x7ff7, 0x7ff7, 0x7ff7, 0x7ff7, 0x7ff7,
-  0x7ff7, 0x7ff7, 0x7ff6, 0x7ff6, 0x7ff6, 0x7ff6, 0x7ff6, 0x7ff6,
-  0x7ff6, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff4,
-  0x7ff4, 0x7ff4, 0x7ff4, 0x7ff4, 0x7ff4, 0x7ff3, 0x7ff3, 0x7ff3,
-  0x7ff3, 0x7ff3, 0x7ff3, 0x7ff2, 0x7ff2, 0x7ff2, 0x7ff2, 0x7ff2,
-  0x7ff1, 0x7ff1, 0x7ff1, 0x7ff1, 0x7ff1, 0x7ff1, 0x7ff0, 0x7ff0,
-  0x7ff0, 0x7ff0, 0x7ff0, 0x7fef, 0x7fef, 0x7fef, 0x7fef, 0x7fef,
-  0x7fee, 0x7fee, 0x7fee, 0x7fee, 0x7fee, 0x7fed, 0x7fed, 0x7fed,
-  0x7fed, 0x7fed, 0x7fec, 0x7fec, 0x7fec, 0x7fec, 0x7feb, 0x7feb,
-  0x7feb, 0x7feb, 0x7feb, 0x7fea, 0x7fea, 0x7fea, 0x7fea, 0x7fe9,
-  0x7fe9, 0x7fe9, 0x7fe9, 0x7fe8, 0x7fe8, 0x7fe8, 0x7fe8, 0x7fe8,
-  0x7fe7, 0x7fe7, 0x7fe7, 0x7fe7, 0x7fe6, 0x7fe6, 0x7fe6, 0x7fe6,
-  0x7fe5, 0x7fe5, 0x7fe5, 0x7fe5, 0x7fe4, 0x7fe4, 0x7fe4, 0x7fe4,
-  0x7fe3, 0x7fe3, 0x7fe3, 0x7fe2, 0x7fe2, 0x7fe2, 0x7fe2, 0x7fe1,
-  0x7fe1, 0x7fe1, 0x7fe1, 0x7fe0, 0x7fe0, 0x7fe0, 0x7fdf, 0x7fdf,
-  0x7fdf, 0x7fdf, 0x7fde, 0x7fde, 0x7fde, 0x7fde, 0x7fdd, 0x7fdd,
-  0x7fdd, 0x7fdc, 0x7fdc, 0x7fdc, 0x7fdb, 0x7fdb, 0x7fdb, 0x7fdb,
-  0x7fda, 0x7fda, 0x7fda, 0x7fd9, 0x7fd9, 0x7fd9, 0x7fd8, 0x7fd8,
-  0x7fd8, 0x7fd8, 0x7fd7, 0x7fd7, 0x7fd7, 0x7fd6, 0x7fd6, 0x7fd6,
-  0x7fd5, 0x7fd5, 0x7fd5, 0x7fd4, 0x7fd4, 0x7fd4, 0x7fd3, 0x7fd3,
-  0x7fd3, 0x7fd2, 0x7fd2, 0x7fd2, 0x7fd1, 0x7fd1, 0x7fd1, 0x7fd0,
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-  0x2251, 0x224a, 0x2244, 0x223e, 0x2238, 0x2232, 0x222c, 0x2226,
-  0x2220, 0x221a, 0x2214, 0x220e, 0x2208, 0x2202, 0x21fc, 0x21f6,
-  0x21f0, 0x21ea, 0x21e4, 0x21dd, 0x21d7, 0x21d1, 0x21cb, 0x21c5,
-  0x21bf, 0x21b9, 0x21b3, 0x21ad, 0x21a7, 0x21a1, 0x219b, 0x2195,
-  0x218f, 0x2189, 0x2183, 0x217c, 0x2176, 0x2170, 0x216a, 0x2164,
-  0x215e, 0x2158, 0x2152, 0x214c, 0x2146, 0x2140, 0x213a, 0x2134,
-  0x212e, 0x2128, 0x2121, 0x211b, 0x2115, 0x210f, 0x2109, 0x2103,
-  0x20fd, 0x20f7, 0x20f1, 0x20eb, 0x20e5, 0x20df, 0x20d9, 0x20d3,
-  0x20cc, 0x20c6, 0x20c0, 0x20ba, 0x20b4, 0x20ae, 0x20a8, 0x20a2,
-  0x209c, 0x2096, 0x2090, 0x208a, 0x2084, 0x207e, 0x2077, 0x2071,
-  0x206b, 0x2065, 0x205f, 0x2059, 0x2053, 0x204d, 0x2047, 0x2041,
-  0x203b, 0x2035, 0x202e, 0x2028, 0x2022, 0x201c, 0x2016, 0x2010,
-  0x200a, 0x2004, 0x1ffe, 0x1ff8, 0x1ff2, 0x1fec, 0x1fe5, 0x1fdf,
-  0x1fd9, 0x1fd3, 0x1fcd, 0x1fc7, 0x1fc1, 0x1fbb, 0x1fb5, 0x1faf,
-  0x1fa9, 0x1fa3, 0x1f9c, 0x1f96, 0x1f90, 0x1f8a, 0x1f84, 0x1f7e,
-  0x1f78, 0x1f72, 0x1f6c, 0x1f66, 0x1f60, 0x1f59, 0x1f53, 0x1f4d,
-  0x1f47, 0x1f41, 0x1f3b, 0x1f35, 0x1f2f, 0x1f29, 0x1f23, 0x1f1d,
-  0x1f16, 0x1f10, 0x1f0a, 0x1f04, 0x1efe, 0x1ef8, 0x1ef2, 0x1eec,
-  0x1ee6, 0x1ee0, 0x1ed9, 0x1ed3, 0x1ecd, 0x1ec7, 0x1ec1, 0x1ebb,
-  0x1eb5, 0x1eaf, 0x1ea9, 0x1ea3, 0x1e9c, 0x1e96, 0x1e90, 0x1e8a,
-  0x1e84, 0x1e7e, 0x1e78, 0x1e72, 0x1e6c, 0x1e66, 0x1e5f, 0x1e59,
-  0x1e53, 0x1e4d, 0x1e47, 0x1e41, 0x1e3b, 0x1e35, 0x1e2f, 0x1e29,
-  0x1e22, 0x1e1c, 0x1e16, 0x1e10, 0x1e0a, 0x1e04, 0x1dfe, 0x1df8,
-  0x1df2, 0x1deb, 0x1de5, 0x1ddf, 0x1dd9, 0x1dd3, 0x1dcd, 0x1dc7,
-  0x1dc1, 0x1dbb, 0x1db4, 0x1dae, 0x1da8, 0x1da2, 0x1d9c, 0x1d96,
-  0x1d90, 0x1d8a, 0x1d84, 0x1d7d, 0x1d77, 0x1d71, 0x1d6b, 0x1d65,
-  0x1d5f, 0x1d59, 0x1d53, 0x1d4c, 0x1d46, 0x1d40, 0x1d3a, 0x1d34,
-  0x1d2e, 0x1d28, 0x1d22, 0x1d1c, 0x1d15, 0x1d0f, 0x1d09, 0x1d03,
-  0x1cfd, 0x1cf7, 0x1cf1, 0x1ceb, 0x1ce4, 0x1cde, 0x1cd8, 0x1cd2,
-  0x1ccc, 0x1cc6, 0x1cc0, 0x1cba, 0x1cb3, 0x1cad, 0x1ca7, 0x1ca1,
-  0x1c9b, 0x1c95, 0x1c8f, 0x1c89, 0x1c83, 0x1c7c, 0x1c76, 0x1c70,
-  0x1c6a, 0x1c64, 0x1c5e, 0x1c58, 0x1c51, 0x1c4b, 0x1c45, 0x1c3f,
-  0x1c39, 0x1c33, 0x1c2d, 0x1c27, 0x1c20, 0x1c1a, 0x1c14, 0x1c0e,
-  0x1c08, 0x1c02, 0x1bfc, 0x1bf6, 0x1bef, 0x1be9, 0x1be3, 0x1bdd,
-  0x1bd7, 0x1bd1, 0x1bcb, 0x1bc4, 0x1bbe, 0x1bb8, 0x1bb2, 0x1bac,
-  0x1ba6, 0x1ba0, 0x1b9a, 0x1b93, 0x1b8d, 0x1b87, 0x1b81, 0x1b7b,
-  0x1b75, 0x1b6f, 0x1b68, 0x1b62, 0x1b5c, 0x1b56, 0x1b50, 0x1b4a,
-  0x1b44, 0x1b3d, 0x1b37, 0x1b31, 0x1b2b, 0x1b25, 0x1b1f, 0x1b19,
-  0x1b13, 0x1b0c, 0x1b06, 0x1b00, 0x1afa, 0x1af4, 0x1aee, 0x1ae8,
-  0x1ae1, 0x1adb, 0x1ad5, 0x1acf, 0x1ac9, 0x1ac3, 0x1abd, 0x1ab6,
-  0x1ab0, 0x1aaa, 0x1aa4, 0x1a9e, 0x1a98, 0x1a91, 0x1a8b, 0x1a85,
-  0x1a7f, 0x1a79, 0x1a73, 0x1a6d, 0x1a66, 0x1a60, 0x1a5a, 0x1a54,
-  0x1a4e, 0x1a48, 0x1a42, 0x1a3b, 0x1a35, 0x1a2f, 0x1a29, 0x1a23,
-  0x1a1d, 0x1a17, 0x1a10, 0x1a0a, 0x1a04, 0x19fe, 0x19f8, 0x19f2,
-  0x19eb, 0x19e5, 0x19df, 0x19d9, 0x19d3, 0x19cd, 0x19c7, 0x19c0,
-  0x19ba, 0x19b4, 0x19ae, 0x19a8, 0x19a2, 0x199b, 0x1995, 0x198f,
-  0x1989, 0x1983, 0x197d, 0x1977, 0x1970, 0x196a, 0x1964, 0x195e,
-  0x1958, 0x1952, 0x194b, 0x1945, 0x193f, 0x1939, 0x1933, 0x192d,
-  0x1926, 0x1920, 0x191a, 0x1914, 0x190e, 0x1908, 0x1901, 0x18fb,
-  0x18f5, 0x18ef, 0x18e9, 0x18e3, 0x18dc, 0x18d6, 0x18d0, 0x18ca,
-  0x18c4, 0x18be, 0x18b8, 0x18b1, 0x18ab, 0x18a5, 0x189f, 0x1899,
-  0x1893, 0x188c, 0x1886, 0x1880, 0x187a, 0x1874, 0x186e, 0x1867,
-  0x1861, 0x185b, 0x1855, 0x184f, 0x1848, 0x1842, 0x183c, 0x1836,
-  0x1830, 0x182a, 0x1823, 0x181d, 0x1817, 0x1811, 0x180b, 0x1805,
-  0x17fe, 0x17f8, 0x17f2, 0x17ec, 0x17e6, 0x17e0, 0x17d9, 0x17d3,
-  0x17cd, 0x17c7, 0x17c1, 0x17bb, 0x17b4, 0x17ae, 0x17a8, 0x17a2,
-  0x179c, 0x1795, 0x178f, 0x1789, 0x1783, 0x177d, 0x1777, 0x1770,
-  0x176a, 0x1764, 0x175e, 0x1758, 0x1752, 0x174b, 0x1745, 0x173f,
-  0x1739, 0x1733, 0x172c, 0x1726, 0x1720, 0x171a, 0x1714, 0x170e,
-  0x1707, 0x1701, 0x16fb, 0x16f5, 0x16ef, 0x16e8, 0x16e2, 0x16dc,
-  0x16d6, 0x16d0, 0x16ca, 0x16c3, 0x16bd, 0x16b7, 0x16b1, 0x16ab,
-  0x16a4, 0x169e, 0x1698, 0x1692, 0x168c, 0x1686, 0x167f, 0x1679,
-  0x1673, 0x166d, 0x1667, 0x1660, 0x165a, 0x1654, 0x164e, 0x1648,
-  0x1642, 0x163b, 0x1635, 0x162f, 0x1629, 0x1623, 0x161c, 0x1616,
-  0x1610, 0x160a, 0x1604, 0x15fd, 0x15f7, 0x15f1, 0x15eb, 0x15e5,
-  0x15de, 0x15d8, 0x15d2, 0x15cc, 0x15c6, 0x15c0, 0x15b9, 0x15b3,
-  0x15ad, 0x15a7, 0x15a1, 0x159a, 0x1594, 0x158e, 0x1588, 0x1582,
-  0x157b, 0x1575, 0x156f, 0x1569, 0x1563, 0x155c, 0x1556, 0x1550,
-  0x154a, 0x1544, 0x153d, 0x1537, 0x1531, 0x152b, 0x1525, 0x151e,
-  0x1518, 0x1512, 0x150c, 0x1506, 0x14ff, 0x14f9, 0x14f3, 0x14ed,
-  0x14e7, 0x14e0, 0x14da, 0x14d4, 0x14ce, 0x14c8, 0x14c1, 0x14bb,
-  0x14b5, 0x14af, 0x14a9, 0x14a2, 0x149c, 0x1496, 0x1490, 0x148a,
-  0x1483, 0x147d, 0x1477, 0x1471, 0x146b, 0x1464, 0x145e, 0x1458,
-  0x1452, 0x144c, 0x1445, 0x143f, 0x1439, 0x1433, 0x142d, 0x1426,
-  0x1420, 0x141a, 0x1414, 0x140e, 0x1407, 0x1401, 0x13fb, 0x13f5,
-  0x13ef, 0x13e8, 0x13e2, 0x13dc, 0x13d6, 0x13d0, 0x13c9, 0x13c3,
-  0x13bd, 0x13b7, 0x13b1, 0x13aa, 0x13a4, 0x139e, 0x1398, 0x1391,
-  0x138b, 0x1385, 0x137f, 0x1379, 0x1372, 0x136c, 0x1366, 0x1360,
-  0x135a, 0x1353, 0x134d, 0x1347, 0x1341, 0x133b, 0x1334, 0x132e,
-  0x1328, 0x1322, 0x131b, 0x1315, 0x130f, 0x1309, 0x1303, 0x12fc,
-  0x12f6, 0x12f0, 0x12ea, 0x12e4, 0x12dd, 0x12d7, 0x12d1, 0x12cb,
-  0x12c4, 0x12be, 0x12b8, 0x12b2, 0x12ac, 0x12a5, 0x129f, 0x1299,
-  0x1293, 0x128d, 0x1286, 0x1280, 0x127a, 0x1274, 0x126d, 0x1267,
-  0x1261, 0x125b, 0x1255, 0x124e, 0x1248, 0x1242, 0x123c, 0x1235,
-  0x122f, 0x1229, 0x1223, 0x121d, 0x1216, 0x1210, 0x120a, 0x1204,
-  0x11fd, 0x11f7, 0x11f1, 0x11eb, 0x11e5, 0x11de, 0x11d8, 0x11d2,
-  0x11cc, 0x11c5, 0x11bf, 0x11b9, 0x11b3, 0x11ad, 0x11a6, 0x11a0,
-  0x119a, 0x1194, 0x118d, 0x1187, 0x1181, 0x117b, 0x1175, 0x116e,
-  0x1168, 0x1162, 0x115c, 0x1155, 0x114f, 0x1149, 0x1143, 0x113d,
-  0x1136, 0x1130, 0x112a, 0x1124, 0x111d, 0x1117, 0x1111, 0x110b,
-  0x1105, 0x10fe, 0x10f8, 0x10f2, 0x10ec, 0x10e5, 0x10df, 0x10d9,
-  0x10d3, 0x10cc, 0x10c6, 0x10c0, 0x10ba, 0x10b4, 0x10ad, 0x10a7,
-  0x10a1, 0x109b, 0x1094, 0x108e, 0x1088, 0x1082, 0x107b, 0x1075,
-  0x106f, 0x1069, 0x1063, 0x105c, 0x1056, 0x1050, 0x104a, 0x1043,
-  0x103d, 0x1037, 0x1031, 0x102a, 0x1024, 0x101e, 0x1018, 0x1012,
-  0x100b, 0x1005, 0xfff, 0xff9, 0xff2, 0xfec, 0xfe6, 0xfe0,
-  0xfd9, 0xfd3, 0xfcd, 0xfc7, 0xfc0, 0xfba, 0xfb4, 0xfae,
-  0xfa8, 0xfa1, 0xf9b, 0xf95, 0xf8f, 0xf88, 0xf82, 0xf7c,
-  0xf76, 0xf6f, 0xf69, 0xf63, 0xf5d, 0xf56, 0xf50, 0xf4a,
-  0xf44, 0xf3e, 0xf37, 0xf31, 0xf2b, 0xf25, 0xf1e, 0xf18,
-  0xf12, 0xf0c, 0xf05, 0xeff, 0xef9, 0xef3, 0xeec, 0xee6,
-  0xee0, 0xeda, 0xed3, 0xecd, 0xec7, 0xec1, 0xeba, 0xeb4,
-  0xeae, 0xea8, 0xea1, 0xe9b, 0xe95, 0xe8f, 0xe89, 0xe82,
-  0xe7c, 0xe76, 0xe70, 0xe69, 0xe63, 0xe5d, 0xe57, 0xe50,
-  0xe4a, 0xe44, 0xe3e, 0xe37, 0xe31, 0xe2b, 0xe25, 0xe1e,
-  0xe18, 0xe12, 0xe0c, 0xe05, 0xdff, 0xdf9, 0xdf3, 0xdec,
-  0xde6, 0xde0, 0xdda, 0xdd3, 0xdcd, 0xdc7, 0xdc1, 0xdba,
-  0xdb4, 0xdae, 0xda8, 0xda1, 0xd9b, 0xd95, 0xd8f, 0xd88,
-  0xd82, 0xd7c, 0xd76, 0xd6f, 0xd69, 0xd63, 0xd5d, 0xd56,
-  0xd50, 0xd4a, 0xd44, 0xd3d, 0xd37, 0xd31, 0xd2b, 0xd24,
-  0xd1e, 0xd18, 0xd12, 0xd0b, 0xd05, 0xcff, 0xcf9, 0xcf2,
-  0xcec, 0xce6, 0xce0, 0xcd9, 0xcd3, 0xccd, 0xcc7, 0xcc0,
-  0xcba, 0xcb4, 0xcae, 0xca7, 0xca1, 0xc9b, 0xc95, 0xc8e,
-  0xc88, 0xc82, 0xc7c, 0xc75, 0xc6f, 0xc69, 0xc63, 0xc5c,
-  0xc56, 0xc50, 0xc4a, 0xc43, 0xc3d, 0xc37, 0xc31, 0xc2a,
-  0xc24, 0xc1e, 0xc18, 0xc11, 0xc0b, 0xc05, 0xbff, 0xbf8,
-  0xbf2, 0xbec, 0xbe6, 0xbdf, 0xbd9, 0xbd3, 0xbcd, 0xbc6,
-  0xbc0, 0xbba, 0xbb4, 0xbad, 0xba7, 0xba1, 0xb9b, 0xb94,
-  0xb8e, 0xb88, 0xb81, 0xb7b, 0xb75, 0xb6f, 0xb68, 0xb62,
-  0xb5c, 0xb56, 0xb4f, 0xb49, 0xb43, 0xb3d, 0xb36, 0xb30,
-  0xb2a, 0xb24, 0xb1d, 0xb17, 0xb11, 0xb0b, 0xb04, 0xafe,
-  0xaf8, 0xaf2, 0xaeb, 0xae5, 0xadf, 0xad8, 0xad2, 0xacc,
-  0xac6, 0xabf, 0xab9, 0xab3, 0xaad, 0xaa6, 0xaa0, 0xa9a,
-  0xa94, 0xa8d, 0xa87, 0xa81, 0xa7b, 0xa74, 0xa6e, 0xa68,
-  0xa62, 0xa5b, 0xa55, 0xa4f, 0xa48, 0xa42, 0xa3c, 0xa36,
-  0xa2f, 0xa29, 0xa23, 0xa1d, 0xa16, 0xa10, 0xa0a, 0xa04,
-  0x9fd, 0x9f7, 0x9f1, 0x9eb, 0x9e4, 0x9de, 0x9d8, 0x9d1,
-  0x9cb, 0x9c5, 0x9bf, 0x9b8, 0x9b2, 0x9ac, 0x9a6, 0x99f,
-  0x999, 0x993, 0x98d, 0x986, 0x980, 0x97a, 0x973, 0x96d,
-  0x967, 0x961, 0x95a, 0x954, 0x94e, 0x948, 0x941, 0x93b,
-  0x935, 0x92f, 0x928, 0x922, 0x91c, 0x915, 0x90f, 0x909,
-  0x903, 0x8fc, 0x8f6, 0x8f0, 0x8ea, 0x8e3, 0x8dd, 0x8d7,
-  0x8d1, 0x8ca, 0x8c4, 0x8be, 0x8b7, 0x8b1, 0x8ab, 0x8a5,
-  0x89e, 0x898, 0x892, 0x88c, 0x885, 0x87f, 0x879, 0x872,
-  0x86c, 0x866, 0x860, 0x859, 0x853, 0x84d, 0x847, 0x840,
-  0x83a, 0x834, 0x82e, 0x827, 0x821, 0x81b, 0x814, 0x80e,
-  0x808, 0x802, 0x7fb, 0x7f5, 0x7ef, 0x7e9, 0x7e2, 0x7dc,
-  0x7d6, 0x7cf, 0x7c9, 0x7c3, 0x7bd, 0x7b6, 0x7b0, 0x7aa,
-  0x7a4, 0x79d, 0x797, 0x791, 0x78a, 0x784, 0x77e, 0x778,
-  0x771, 0x76b, 0x765, 0x75f, 0x758, 0x752, 0x74c, 0x745,
-  0x73f, 0x739, 0x733, 0x72c, 0x726, 0x720, 0x71a, 0x713,
-  0x70d, 0x707, 0x700, 0x6fa, 0x6f4, 0x6ee, 0x6e7, 0x6e1,
-  0x6db, 0x6d5, 0x6ce, 0x6c8, 0x6c2, 0x6bb, 0x6b5, 0x6af,
-  0x6a9, 0x6a2, 0x69c, 0x696, 0x690, 0x689, 0x683, 0x67d,
-  0x676, 0x670, 0x66a, 0x664, 0x65d, 0x657, 0x651, 0x64a,
-  0x644, 0x63e, 0x638, 0x631, 0x62b, 0x625, 0x61f, 0x618,
-  0x612, 0x60c, 0x605, 0x5ff, 0x5f9, 0x5f3, 0x5ec, 0x5e6,
-  0x5e0, 0x5da, 0x5d3, 0x5cd, 0x5c7, 0x5c0, 0x5ba, 0x5b4,
-  0x5ae, 0x5a7, 0x5a1, 0x59b, 0x594, 0x58e, 0x588, 0x582,
-  0x57b, 0x575, 0x56f, 0x569, 0x562, 0x55c, 0x556, 0x54f,
-  0x549, 0x543, 0x53d, 0x536, 0x530, 0x52a, 0x523, 0x51d,
-  0x517, 0x511, 0x50a, 0x504, 0x4fe, 0x4f8, 0x4f1, 0x4eb,
-  0x4e5, 0x4de, 0x4d8, 0x4d2, 0x4cc, 0x4c5, 0x4bf, 0x4b9,
-  0x4b2, 0x4ac, 0x4a6, 0x4a0, 0x499, 0x493, 0x48d, 0x487,
-  0x480, 0x47a, 0x474, 0x46d, 0x467, 0x461, 0x45b, 0x454,
-  0x44e, 0x448, 0x441, 0x43b, 0x435, 0x42f, 0x428, 0x422,
-  0x41c, 0x415, 0x40f, 0x409, 0x403, 0x3fc, 0x3f6, 0x3f0,
-  0x3ea, 0x3e3, 0x3dd, 0x3d7, 0x3d0, 0x3ca, 0x3c4, 0x3be,
-  0x3b7, 0x3b1, 0x3ab, 0x3a4, 0x39e, 0x398, 0x392, 0x38b,
-  0x385, 0x37f, 0x378, 0x372, 0x36c, 0x366, 0x35f, 0x359,
-  0x353, 0x34c, 0x346, 0x340, 0x33a, 0x333, 0x32d, 0x327,
-  0x321, 0x31a, 0x314, 0x30e, 0x307, 0x301, 0x2fb, 0x2f5,
-  0x2ee, 0x2e8, 0x2e2, 0x2db, 0x2d5, 0x2cf, 0x2c9, 0x2c2,
-  0x2bc, 0x2b6, 0x2af, 0x2a9, 0x2a3, 0x29d, 0x296, 0x290,
-  0x28a, 0x283, 0x27d, 0x277, 0x271, 0x26a, 0x264, 0x25e,
-  0x258, 0x251, 0x24b, 0x245, 0x23e, 0x238, 0x232, 0x22c,
-  0x225, 0x21f, 0x219, 0x212, 0x20c, 0x206, 0x200, 0x1f9,
-  0x1f3, 0x1ed, 0x1e6, 0x1e0, 0x1da, 0x1d4, 0x1cd, 0x1c7,
-  0x1c1, 0x1ba, 0x1b4, 0x1ae, 0x1a8, 0x1a1, 0x19b, 0x195,
-  0x18e, 0x188, 0x182, 0x17c, 0x175, 0x16f, 0x169, 0x162,
-  0x15c, 0x156, 0x150, 0x149, 0x143, 0x13d, 0x137, 0x130,
-  0x12a, 0x124, 0x11d, 0x117, 0x111, 0x10b, 0x104, 0xfe,
-  0xf8, 0xf1, 0xeb, 0xe5, 0xdf, 0xd8, 0xd2, 0xcc,
-  0xc5, 0xbf, 0xb9, 0xb3, 0xac, 0xa6, 0xa0, 0x99,
-  0x93, 0x8d, 0x87, 0x80, 0x7a, 0x74, 0x6d, 0x67,
-  0x61, 0x5b, 0x54, 0x4e, 0x48, 0x41, 0x3b, 0x35,
-  0x2f, 0x28, 0x22, 0x1c, 0x15, 0xf, 0x9, 0x3,
-};
-
-/**    
- * @brief  Initialization function for the Q15 DCT4/IDCT4.   
- * @param[in,out] *S         points to an instance of Q15 DCT4/IDCT4 structure.   
- * @param[in]     *S_RFFT    points to an instance of Q15 RFFT/RIFFT structure.   
- * @param[in]     *S_CFFT    points to an instance of Q15 CFFT/CIFFT structure.   
- * @param[in]     N          length of the DCT4.   
- * @param[in]     Nby2       half of the length of the DCT4.   
- * @param[in]     normalize  normalizing factor.   
- * @return  	  arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.   
- * \par Normalizing factor:    
- * The normalizing factor is sqrt(2/N), which depends on the size of transform N.    
- * Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:    
- * \image html dct4NormalizingQ15Table.gif    
- */
-
-arm_status arm_dct4_init_q15(
-  arm_dct4_instance_q15 * S,
-  arm_rfft_instance_q15 * S_RFFT,
-  arm_cfft_radix4_instance_q15 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q15_t normalize)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  q15_t *twiddlePtr[4] = { (q15_t *) WeightsQ15_128, (q15_t *) WeightsQ15_512,
-    (q15_t *) WeightsQ15_2048, (q15_t *) WeightsQ15_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  q15_t *pCosFactor[4] =
-    { (q15_t *) cos_factorsQ15_128, (q15_t *) cos_factorsQ15_512,
-    (q15_t *) cos_factorsQ15_2048, (q15_t *) cos_factorsQ15_8192
-  };
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-    /* Initialize the table modifier values */
-  case 8192u:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
-    break;
-  case 2048u:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
-    break;
-  case 512u:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
-    break;
-  case 128u:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
-    break;
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT */
-  arm_rfft_init_q15(S->pRfft, S->pCfft, S->N, 0u, 1u);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c
deleted file mode 100644
index 9294ae062c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c
+++ /dev/null
@@ -1,8356 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_init_q31.c    
-*    
-* Description:	Initialization function of DCT-4 & IDCT4 Q31    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/*    
-* @brief  Weights Table    
-*/
-
-/**    
-* \par    
-* Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   weights[2*i]= cos(i*c);    
-*   weights[(2*i)+1]= -sin(i * c);    
-* } 
    
-* \par    
-* where N is the Number of weights to be calculated and c is pi/(2*N)    
-* \par    
-* Convert the output to q31 format by multiplying with 2^31 and saturated if required.    
-* \par    
-* In the tables below the real and imaginary values are placed alternatively, hence the    
-* array length is 2*N.    
-*/
-
-static const q31_t WeightsQ31_128[256] = {
-  0x7fffffff, 0x0, 0x7ffd885a, 0xfe6de2e0, 0x7ff62182, 0xfcdbd541, 0x7fe9cbc0,
-  0xfb49e6a3,
-  0x7fd8878e, 0xf9b82684, 0x7fc25596, 0xf826a462, 0x7fa736b4, 0xf6956fb7,
-  0x7f872bf3, 0xf50497fb,
-  0x7f62368f, 0xf3742ca2, 0x7f3857f6, 0xf1e43d1c, 0x7f0991c4, 0xf054d8d5,
-  0x7ed5e5c6, 0xeec60f31,
-  0x7e9d55fc, 0xed37ef91, 0x7e5fe493, 0xebaa894f, 0x7e1d93ea, 0xea1debbb,
-  0x7dd6668f, 0xe8922622,
-  0x7d8a5f40, 0xe70747c4, 0x7d3980ec, 0xe57d5fda, 0x7ce3ceb2, 0xe3f47d96,
-  0x7c894bde, 0xe26cb01b,
-  0x7c29fbee, 0xe0e60685, 0x7bc5e290, 0xdf608fe4, 0x7b5d039e, 0xdddc5b3b,
-  0x7aef6323, 0xdc597781,
-  0x7a7d055b, 0xdad7f3a2, 0x7a05eead, 0xd957de7a, 0x798a23b1, 0xd7d946d8,
-  0x7909a92d, 0xd65c3b7b,
-  0x78848414, 0xd4e0cb15, 0x77fab989, 0xd3670446, 0x776c4edb, 0xd1eef59e,
-  0x76d94989, 0xd078ad9e,
-  0x7641af3d, 0xcf043ab3, 0x75a585cf, 0xcd91ab39, 0x7504d345, 0xcc210d79,
-  0x745f9dd1, 0xcab26fa9,
-  0x73b5ebd1, 0xc945dfec, 0x7307c3d0, 0xc7db6c50, 0x72552c85, 0xc67322ce,
-  0x719e2cd2, 0xc50d1149,
-  0x70e2cbc6, 0xc3a94590, 0x7023109a, 0xc247cd5a, 0x6f5f02b2, 0xc0e8b648,
-  0x6e96a99d, 0xbf8c0de3,
-  0x6dca0d14, 0xbe31e19b, 0x6cf934fc, 0xbcda3ecb, 0x6c242960, 0xbb8532b0,
-  0x6b4af279, 0xba32ca71,
-  0x6a6d98a4, 0xb8e31319, 0x698c246c, 0xb796199b, 0x68a69e81, 0xb64beacd,
-  0x67bd0fbd, 0xb5049368,
-  0x66cf8120, 0xb3c0200c, 0x65ddfbd3, 0xb27e9d3c, 0x64e88926, 0xb140175b,
-  0x63ef3290, 0xb0049ab3,
-  0x62f201ac, 0xaecc336c, 0x61f1003f, 0xad96ed92, 0x60ec3830, 0xac64d510,
-  0x5fe3b38d, 0xab35f5b5,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5dc79d7c, 0xa8e21106, 0x5cb420e0, 0xa7bd22ac,
-  0x5b9d1154, 0xa69b9b68,
-  0x5a82799a, 0xa57d8666, 0x59646498, 0xa462eeac, 0x5842dd54, 0xa34bdf20,
-  0x571deefa, 0xa2386284,
-  0x55f5a4d2, 0xa1288376, 0x54ca0a4b, 0xa01c4c73, 0x539b2af0, 0x9f13c7d0,
-  0x5269126e, 0x9e0effc1,
-  0x5133cc94, 0x9d0dfe54, 0x4ffb654d, 0x9c10cd70, 0x4ebfe8a5, 0x9b1776da,
-  0x4d8162c4, 0x9a22042d,
-  0x4c3fdff4, 0x99307ee0, 0x4afb6c98, 0x9842f043, 0x49b41533, 0x9759617f,
-  0x4869e665, 0x9673db94,
-  0x471cece7, 0x9592675c, 0x45cd358f, 0x94b50d87, 0x447acd50, 0x93dbd6a0,
-  0x4325c135, 0x9306cb04,
-  0x41ce1e65, 0x9235f2ec, 0x4073f21d, 0x91695663, 0x3f1749b8, 0x90a0fd4e,
-  0x3db832a6, 0x8fdcef66,
-  0x3c56ba70, 0x8f1d343a, 0x3af2eeb7, 0x8e61d32e, 0x398cdd32, 0x8daad37b,
-  0x382493b0, 0x8cf83c30,
-  0x36ba2014, 0x8c4a142f, 0x354d9057, 0x8ba0622f, 0x33def287, 0x8afb2cbb,
-  0x326e54c7, 0x8a5a7a31,
-  0x30fbc54d, 0x89be50c3, 0x2f875262, 0x8926b677, 0x2e110a62, 0x8893b125,
-  0x2c98fbba, 0x88054677,
-  0x2b1f34eb, 0x877b7bec, 0x29a3c485, 0x86f656d3, 0x2826b928, 0x8675dc4f,
-  0x26a82186, 0x85fa1153,
-  0x25280c5e, 0x8582faa5, 0x23a6887f, 0x85109cdd, 0x2223a4c5, 0x84a2fc62,
-  0x209f701c, 0x843a1d70,
-  0x1f19f97b, 0x83d60412, 0x1d934fe5, 0x8376b422, 0x1c0b826a, 0x831c314e,
-  0x1a82a026, 0x82c67f14,
-  0x18f8b83c, 0x8275a0c0, 0x176dd9de, 0x82299971, 0x15e21445, 0x81e26c16,
-  0x145576b1, 0x81a01b6d,
-  0x12c8106f, 0x8162aa04, 0x1139f0cf, 0x812a1a3a, 0xfab272b, 0x80f66e3c,
-  0xe1bc2e4, 0x80c7a80a,
-  0xc8bd35e, 0x809dc971, 0xafb6805, 0x8078d40d, 0x96a9049, 0x8058c94c,
-  0x7d95b9e, 0x803daa6a,
-  0x647d97c, 0x80277872, 0x4b6195d, 0x80163440, 0x3242abf, 0x8009de7e,
-  0x1921d20, 0x800277a6,
-};
-
-static const q31_t WeightsQ31_512[1024] = {
-  0x7fffffff, 0x0, 0x7fffd886, 0xff9b781d, 0x7fff6216, 0xff36f078, 0x7ffe9cb2,
-  0xfed2694f,
-  0x7ffd885a, 0xfe6de2e0, 0x7ffc250f, 0xfe095d69, 0x7ffa72d1, 0xfda4d929,
-  0x7ff871a2, 0xfd40565c,
-  0x7ff62182, 0xfcdbd541, 0x7ff38274, 0xfc775616, 0x7ff09478, 0xfc12d91a,
-  0x7fed5791, 0xfbae5e89,
-  0x7fe9cbc0, 0xfb49e6a3, 0x7fe5f108, 0xfae571a4, 0x7fe1c76b, 0xfa80ffcb,
-  0x7fdd4eec, 0xfa1c9157,
-  0x7fd8878e, 0xf9b82684, 0x7fd37153, 0xf953bf91, 0x7fce0c3e, 0xf8ef5cbb,
-  0x7fc85854, 0xf88afe42,
-  0x7fc25596, 0xf826a462, 0x7fbc040a, 0xf7c24f59, 0x7fb563b3, 0xf75dff66,
-  0x7fae7495, 0xf6f9b4c6,
-  0x7fa736b4, 0xf6956fb7, 0x7f9faa15, 0xf6313077, 0x7f97cebd, 0xf5ccf743,
-  0x7f8fa4b0, 0xf568c45b,
-  0x7f872bf3, 0xf50497fb, 0x7f7e648c, 0xf4a07261, 0x7f754e80, 0xf43c53cb,
-  0x7f6be9d4, 0xf3d83c77,
-  0x7f62368f, 0xf3742ca2, 0x7f5834b7, 0xf310248a, 0x7f4de451, 0xf2ac246e,
-  0x7f434563, 0xf2482c8a,
-  0x7f3857f6, 0xf1e43d1c, 0x7f2d1c0e, 0xf1805662, 0x7f2191b4, 0xf11c789a,
-  0x7f15b8ee, 0xf0b8a401,
-  0x7f0991c4, 0xf054d8d5, 0x7efd1c3c, 0xeff11753, 0x7ef05860, 0xef8d5fb8,
-  0x7ee34636, 0xef29b243,
-  0x7ed5e5c6, 0xeec60f31, 0x7ec8371a, 0xee6276bf, 0x7eba3a39, 0xedfee92b,
-  0x7eabef2c, 0xed9b66b2,
-  0x7e9d55fc, 0xed37ef91, 0x7e8e6eb2, 0xecd48407, 0x7e7f3957, 0xec71244f,
-  0x7e6fb5f4, 0xec0dd0a8,
-  0x7e5fe493, 0xebaa894f, 0x7e4fc53e, 0xeb474e81, 0x7e3f57ff, 0xeae4207a,
-  0x7e2e9cdf, 0xea80ff7a,
-  0x7e1d93ea, 0xea1debbb, 0x7e0c3d29, 0xe9bae57d, 0x7dfa98a8, 0xe957ecfb,
-  0x7de8a670, 0xe8f50273,
-  0x7dd6668f, 0xe8922622, 0x7dc3d90d, 0xe82f5844, 0x7db0fdf8, 0xe7cc9917,
-  0x7d9dd55a, 0xe769e8d8,
-  0x7d8a5f40, 0xe70747c4, 0x7d769bb5, 0xe6a4b616, 0x7d628ac6, 0xe642340d,
-  0x7d4e2c7f, 0xe5dfc1e5,
-  0x7d3980ec, 0xe57d5fda, 0x7d24881b, 0xe51b0e2a, 0x7d0f4218, 0xe4b8cd11,
-  0x7cf9aef0, 0xe4569ccb,
-  0x7ce3ceb2, 0xe3f47d96, 0x7ccda169, 0xe3926fad, 0x7cb72724, 0xe330734d,
-  0x7ca05ff1, 0xe2ce88b3,
-  0x7c894bde, 0xe26cb01b, 0x7c71eaf9, 0xe20ae9c1, 0x7c5a3d50, 0xe1a935e2,
-  0x7c4242f2, 0xe14794ba,
-  0x7c29fbee, 0xe0e60685, 0x7c116853, 0xe0848b7f, 0x7bf88830, 0xe02323e5,
-  0x7bdf5b94, 0xdfc1cff3,
-  0x7bc5e290, 0xdf608fe4, 0x7bac1d31, 0xdeff63f4, 0x7b920b89, 0xde9e4c60,
-  0x7b77ada8, 0xde3d4964,
-  0x7b5d039e, 0xdddc5b3b, 0x7b420d7a, 0xdd7b8220, 0x7b26cb4f, 0xdd1abe51,
-  0x7b0b3d2c, 0xdcba1008,
-  0x7aef6323, 0xdc597781, 0x7ad33d45, 0xdbf8f4f8, 0x7ab6cba4, 0xdb9888a8,
-  0x7a9a0e50, 0xdb3832cd,
-  0x7a7d055b, 0xdad7f3a2, 0x7a5fb0d8, 0xda77cb63, 0x7a4210d8, 0xda17ba4a,
-  0x7a24256f, 0xd9b7c094,
-  0x7a05eead, 0xd957de7a, 0x79e76ca7, 0xd8f81439, 0x79c89f6e, 0xd898620c,
-  0x79a98715, 0xd838c82d,
-  0x798a23b1, 0xd7d946d8, 0x796a7554, 0xd779de47, 0x794a7c12, 0xd71a8eb5,
-  0x792a37fe, 0xd6bb585e,
-  0x7909a92d, 0xd65c3b7b, 0x78e8cfb2, 0xd5fd3848, 0x78c7aba2, 0xd59e4eff,
-  0x78a63d11, 0xd53f7fda,
-  0x78848414, 0xd4e0cb15, 0x786280bf, 0xd48230e9, 0x78403329, 0xd423b191,
-  0x781d9b65, 0xd3c54d47,
-  0x77fab989, 0xd3670446, 0x77d78daa, 0xd308d6c7, 0x77b417df, 0xd2aac504,
-  0x7790583e, 0xd24ccf39,
-  0x776c4edb, 0xd1eef59e, 0x7747fbce, 0xd191386e, 0x77235f2d, 0xd13397e2,
-  0x76fe790e, 0xd0d61434,
-  0x76d94989, 0xd078ad9e, 0x76b3d0b4, 0xd01b6459, 0x768e0ea6, 0xcfbe389f,
-  0x76680376, 0xcf612aaa,
-  0x7641af3d, 0xcf043ab3, 0x761b1211, 0xcea768f2, 0x75f42c0b, 0xce4ab5a2,
-  0x75ccfd42, 0xcdee20fc,
-  0x75a585cf, 0xcd91ab39, 0x757dc5ca, 0xcd355491, 0x7555bd4c, 0xccd91d3d,
-  0x752d6c6c, 0xcc7d0578,
-  0x7504d345, 0xcc210d79, 0x74dbf1ef, 0xcbc53579, 0x74b2c884, 0xcb697db0,
-  0x7489571c, 0xcb0de658,
-  0x745f9dd1, 0xcab26fa9, 0x74359cbd, 0xca5719db, 0x740b53fb, 0xc9fbe527,
-  0x73e0c3a3, 0xc9a0d1c5,
-  0x73b5ebd1, 0xc945dfec, 0x738acc9e, 0xc8eb0fd6, 0x735f6626, 0xc89061ba,
-  0x7333b883, 0xc835d5d0,
-  0x7307c3d0, 0xc7db6c50, 0x72db8828, 0xc7812572, 0x72af05a7, 0xc727016d,
-  0x72823c67, 0xc6cd0079,
-  0x72552c85, 0xc67322ce, 0x7227d61c, 0xc61968a2, 0x71fa3949, 0xc5bfd22e,
-  0x71cc5626, 0xc5665fa9,
-  0x719e2cd2, 0xc50d1149, 0x716fbd68, 0xc4b3e746, 0x71410805, 0xc45ae1d7,
-  0x71120cc5, 0xc4020133,
-  0x70e2cbc6, 0xc3a94590, 0x70b34525, 0xc350af26, 0x708378ff, 0xc2f83e2a,
-  0x70536771, 0xc29ff2d4,
-  0x7023109a, 0xc247cd5a, 0x6ff27497, 0xc1efcdf3, 0x6fc19385, 0xc197f4d4,
-  0x6f906d84, 0xc1404233,
-  0x6f5f02b2, 0xc0e8b648, 0x6f2d532c, 0xc0915148, 0x6efb5f12, 0xc03a1368,
-  0x6ec92683, 0xbfe2fcdf,
-  0x6e96a99d, 0xbf8c0de3, 0x6e63e87f, 0xbf3546a8, 0x6e30e34a, 0xbedea765,
-  0x6dfd9a1c, 0xbe88304f,
-  0x6dca0d14, 0xbe31e19b, 0x6d963c54, 0xbddbbb7f, 0x6d6227fa, 0xbd85be30,
-  0x6d2dd027, 0xbd2fe9e2,
-  0x6cf934fc, 0xbcda3ecb, 0x6cc45698, 0xbc84bd1f, 0x6c8f351c, 0xbc2f6513,
-  0x6c59d0a9, 0xbbda36dd,
-  0x6c242960, 0xbb8532b0, 0x6bee3f62, 0xbb3058c0, 0x6bb812d1, 0xbadba943,
-  0x6b81a3cd, 0xba87246d,
-  0x6b4af279, 0xba32ca71, 0x6b13fef5, 0xb9de9b83, 0x6adcc964, 0xb98a97d8,
-  0x6aa551e9, 0xb936bfa4,
-  0x6a6d98a4, 0xb8e31319, 0x6a359db9, 0xb88f926d, 0x69fd614a, 0xb83c3dd1,
-  0x69c4e37a, 0xb7e9157a,
-  0x698c246c, 0xb796199b, 0x69532442, 0xb7434a67, 0x6919e320, 0xb6f0a812,
-  0x68e06129, 0xb69e32cd,
-  0x68a69e81, 0xb64beacd, 0x686c9b4b, 0xb5f9d043, 0x683257ab, 0xb5a7e362,
-  0x67f7d3c5, 0xb556245e,
-  0x67bd0fbd, 0xb5049368, 0x67820bb7, 0xb4b330b3, 0x6746c7d8, 0xb461fc70,
-  0x670b4444, 0xb410f6d3,
-  0x66cf8120, 0xb3c0200c, 0x66937e91, 0xb36f784f, 0x66573cbb, 0xb31effcc,
-  0x661abbc5, 0xb2ceb6b5,
-  0x65ddfbd3, 0xb27e9d3c, 0x65a0fd0b, 0xb22eb392, 0x6563bf92, 0xb1def9e9,
-  0x6526438f, 0xb18f7071,
-  0x64e88926, 0xb140175b, 0x64aa907f, 0xb0f0eeda, 0x646c59bf, 0xb0a1f71d,
-  0x642de50d, 0xb0533055,
-  0x63ef3290, 0xb0049ab3, 0x63b0426d, 0xafb63667, 0x637114cc, 0xaf6803a2,
-  0x6331a9d4, 0xaf1a0293,
-  0x62f201ac, 0xaecc336c, 0x62b21c7b, 0xae7e965b, 0x6271fa69, 0xae312b92,
-  0x62319b9d, 0xade3f33e,
-  0x61f1003f, 0xad96ed92, 0x61b02876, 0xad4a1aba, 0x616f146c, 0xacfd7ae8,
-  0x612dc447, 0xacb10e4b,
-  0x60ec3830, 0xac64d510, 0x60aa7050, 0xac18cf69, 0x60686ccf, 0xabccfd83,
-  0x60262dd6, 0xab815f8d,
-  0x5fe3b38d, 0xab35f5b5, 0x5fa0fe1f, 0xaaeac02c, 0x5f5e0db3, 0xaa9fbf1e,
-  0x5f1ae274, 0xaa54f2ba,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5e93dc1f, 0xa9bff8a8, 0x5e50015d, 0xa975cb57,
-  0x5e0bec6e, 0xa92bd367,
-  0x5dc79d7c, 0xa8e21106, 0x5d8314b1, 0xa8988463, 0x5d3e5237, 0xa84f2daa,
-  0x5cf95638, 0xa8060d08,
-  0x5cb420e0, 0xa7bd22ac, 0x5c6eb258, 0xa7746ec0, 0x5c290acc, 0xa72bf174,
-  0x5be32a67, 0xa6e3aaf2,
-  0x5b9d1154, 0xa69b9b68, 0x5b56bfbd, 0xa653c303, 0x5b1035cf, 0xa60c21ee,
-  0x5ac973b5, 0xa5c4b855,
-  0x5a82799a, 0xa57d8666, 0x5a3b47ab, 0xa5368c4b, 0x59f3de12, 0xa4efca31,
-  0x59ac3cfd, 0xa4a94043,
-  0x59646498, 0xa462eeac, 0x591c550e, 0xa41cd599, 0x58d40e8c, 0xa3d6f534,
-  0x588b9140, 0xa3914da8,
-  0x5842dd54, 0xa34bdf20, 0x57f9f2f8, 0xa306a9c8, 0x57b0d256, 0xa2c1adc9,
-  0x57677b9d, 0xa27ceb4f,
-  0x571deefa, 0xa2386284, 0x56d42c99, 0xa1f41392, 0x568a34a9, 0xa1affea3,
-  0x56400758, 0xa16c23e1,
-  0x55f5a4d2, 0xa1288376, 0x55ab0d46, 0xa0e51d8c, 0x556040e2, 0xa0a1f24d,
-  0x55153fd4, 0xa05f01e1,
-  0x54ca0a4b, 0xa01c4c73, 0x547ea073, 0x9fd9d22a, 0x5433027d, 0x9f979331,
-  0x53e73097, 0x9f558fb0,
-  0x539b2af0, 0x9f13c7d0, 0x534ef1b5, 0x9ed23bb9, 0x53028518, 0x9e90eb94,
-  0x52b5e546, 0x9e4fd78a,
-  0x5269126e, 0x9e0effc1, 0x521c0cc2, 0x9dce6463, 0x51ced46e, 0x9d8e0597,
-  0x518169a5, 0x9d4de385,
-  0x5133cc94, 0x9d0dfe54, 0x50e5fd6d, 0x9cce562c, 0x5097fc5e, 0x9c8eeb34,
-  0x5049c999, 0x9c4fbd93,
-  0x4ffb654d, 0x9c10cd70, 0x4faccfab, 0x9bd21af3, 0x4f5e08e3, 0x9b93a641,
-  0x4f0f1126, 0x9b556f81,
-  0x4ebfe8a5, 0x9b1776da, 0x4e708f8f, 0x9ad9bc71, 0x4e210617, 0x9a9c406e,
-  0x4dd14c6e, 0x9a5f02f5,
-  0x4d8162c4, 0x9a22042d, 0x4d31494b, 0x99e5443b, 0x4ce10034, 0x99a8c345,
-  0x4c9087b1, 0x996c816f,
-  0x4c3fdff4, 0x99307ee0, 0x4bef092d, 0x98f4bbbc, 0x4b9e0390, 0x98b93828,
-  0x4b4ccf4d, 0x987df449,
-  0x4afb6c98, 0x9842f043, 0x4aa9dba2, 0x98082c3b, 0x4a581c9e, 0x97cda855,
-  0x4a062fbd, 0x979364b5,
-  0x49b41533, 0x9759617f, 0x4961cd33, 0x971f9ed7, 0x490f57ee, 0x96e61ce0,
-  0x48bcb599, 0x96acdbbe,
-  0x4869e665, 0x9673db94, 0x4816ea86, 0x963b1c86, 0x47c3c22f, 0x96029eb6,
-  0x47706d93, 0x95ca6247,
-  0x471cece7, 0x9592675c, 0x46c9405c, 0x955aae17, 0x46756828, 0x9523369c,
-  0x4621647d, 0x94ec010b,
-  0x45cd358f, 0x94b50d87, 0x4578db93, 0x947e5c33, 0x452456bd, 0x9447ed2f,
-  0x44cfa740, 0x9411c09e,
-  0x447acd50, 0x93dbd6a0, 0x4425c923, 0x93a62f57, 0x43d09aed, 0x9370cae4,
-  0x437b42e1, 0x933ba968,
-  0x4325c135, 0x9306cb04, 0x42d0161e, 0x92d22fd9, 0x427a41d0, 0x929dd806,
-  0x42244481, 0x9269c3ac,
-  0x41ce1e65, 0x9235f2ec, 0x4177cfb1, 0x920265e4, 0x4121589b, 0x91cf1cb6,
-  0x40cab958, 0x919c1781,
-  0x4073f21d, 0x91695663, 0x401d0321, 0x9136d97d, 0x3fc5ec98, 0x9104a0ee,
-  0x3f6eaeb8, 0x90d2acd4,
-  0x3f1749b8, 0x90a0fd4e, 0x3ebfbdcd, 0x906f927c, 0x3e680b2c, 0x903e6c7b,
-  0x3e10320d, 0x900d8b69,
-  0x3db832a6, 0x8fdcef66, 0x3d600d2c, 0x8fac988f, 0x3d07c1d6, 0x8f7c8701,
-  0x3caf50da, 0x8f4cbadb,
-  0x3c56ba70, 0x8f1d343a, 0x3bfdfecd, 0x8eedf33b, 0x3ba51e29, 0x8ebef7fb,
-  0x3b4c18ba, 0x8e904298,
-  0x3af2eeb7, 0x8e61d32e, 0x3a99a057, 0x8e33a9da, 0x3a402dd2, 0x8e05c6b7,
-  0x39e6975e, 0x8dd829e4,
-  0x398cdd32, 0x8daad37b, 0x3932ff87, 0x8d7dc399, 0x38d8fe93, 0x8d50fa59,
-  0x387eda8e, 0x8d2477d8,
-  0x382493b0, 0x8cf83c30, 0x37ca2a30, 0x8ccc477d, 0x376f9e46, 0x8ca099da,
-  0x3714f02a, 0x8c753362,
-  0x36ba2014, 0x8c4a142f, 0x365f2e3b, 0x8c1f3c5d, 0x36041ad9, 0x8bf4ac05,
-  0x35a8e625, 0x8bca6343,
-  0x354d9057, 0x8ba0622f, 0x34f219a8, 0x8b76a8e4, 0x34968250, 0x8b4d377c,
-  0x343aca87, 0x8b240e11,
-  0x33def287, 0x8afb2cbb, 0x3382fa88, 0x8ad29394, 0x3326e2c3, 0x8aaa42b4,
-  0x32caab6f, 0x8a823a36,
-  0x326e54c7, 0x8a5a7a31, 0x3211df04, 0x8a3302be, 0x31b54a5e, 0x8a0bd3f5,
-  0x3158970e, 0x89e4edef,
-  0x30fbc54d, 0x89be50c3, 0x309ed556, 0x8997fc8a, 0x3041c761, 0x8971f15a,
-  0x2fe49ba7, 0x894c2f4c,
-  0x2f875262, 0x8926b677, 0x2f29ebcc, 0x890186f2, 0x2ecc681e, 0x88dca0d3,
-  0x2e6ec792, 0x88b80432,
-  0x2e110a62, 0x8893b125, 0x2db330c7, 0x886fa7c2, 0x2d553afc, 0x884be821,
-  0x2cf72939, 0x88287256,
-  0x2c98fbba, 0x88054677, 0x2c3ab2b9, 0x87e2649b, 0x2bdc4e6f, 0x87bfccd7,
-  0x2b7dcf17, 0x879d7f41,
-  0x2b1f34eb, 0x877b7bec, 0x2ac08026, 0x8759c2ef, 0x2a61b101, 0x8738545e,
-  0x2a02c7b8, 0x8717304e,
-  0x29a3c485, 0x86f656d3, 0x2944a7a2, 0x86d5c802, 0x28e5714b, 0x86b583ee,
-  0x288621b9, 0x86958aac,
-  0x2826b928, 0x8675dc4f, 0x27c737d3, 0x865678eb, 0x27679df4, 0x86376092,
-  0x2707ebc7, 0x86189359,
-  0x26a82186, 0x85fa1153, 0x26483f6c, 0x85dbda91, 0x25e845b6, 0x85bdef28,
-  0x2588349d, 0x85a04f28,
-  0x25280c5e, 0x8582faa5, 0x24c7cd33, 0x8565f1b0, 0x24677758, 0x8549345c,
-  0x24070b08, 0x852cc2bb,
-  0x23a6887f, 0x85109cdd, 0x2345eff8, 0x84f4c2d4, 0x22e541af, 0x84d934b1,
-  0x22847de0, 0x84bdf286,
-  0x2223a4c5, 0x84a2fc62, 0x21c2b69c, 0x84885258, 0x2161b3a0, 0x846df477,
-  0x21009c0c, 0x8453e2cf,
-  0x209f701c, 0x843a1d70, 0x203e300d, 0x8420a46c, 0x1fdcdc1b, 0x840777d0,
-  0x1f7b7481, 0x83ee97ad,
-  0x1f19f97b, 0x83d60412, 0x1eb86b46, 0x83bdbd0e, 0x1e56ca1e, 0x83a5c2b0,
-  0x1df5163f, 0x838e1507,
-  0x1d934fe5, 0x8376b422, 0x1d31774d, 0x835fa00f, 0x1ccf8cb3, 0x8348d8dc,
-  0x1c6d9053, 0x83325e97,
-  0x1c0b826a, 0x831c314e, 0x1ba96335, 0x83065110, 0x1b4732ef, 0x82f0bde8,
-  0x1ae4f1d6, 0x82db77e5,
-  0x1a82a026, 0x82c67f14, 0x1a203e1b, 0x82b1d381, 0x19bdcbf3, 0x829d753a,
-  0x195b49ea, 0x8289644b,
-  0x18f8b83c, 0x8275a0c0, 0x18961728, 0x82622aa6, 0x183366e9, 0x824f0208,
-  0x17d0a7bc, 0x823c26f3,
-  0x176dd9de, 0x82299971, 0x170afd8d, 0x82175990, 0x16a81305, 0x82056758,
-  0x16451a83, 0x81f3c2d7,
-  0x15e21445, 0x81e26c16, 0x157f0086, 0x81d16321, 0x151bdf86, 0x81c0a801,
-  0x14b8b17f, 0x81b03ac2,
-  0x145576b1, 0x81a01b6d, 0x13f22f58, 0x81904a0c, 0x138edbb1, 0x8180c6a9,
-  0x132b7bf9, 0x8171914e,
-  0x12c8106f, 0x8162aa04, 0x1264994e, 0x815410d4, 0x120116d5, 0x8145c5c7,
-  0x119d8941, 0x8137c8e6,
-  0x1139f0cf, 0x812a1a3a, 0x10d64dbd, 0x811cb9ca, 0x1072a048, 0x810fa7a0,
-  0x100ee8ad, 0x8102e3c4,
-  0xfab272b, 0x80f66e3c, 0xf475bff, 0x80ea4712, 0xee38766, 0x80de6e4c,
-  0xe7fa99e, 0x80d2e3f2,
-  0xe1bc2e4, 0x80c7a80a, 0xdb7d376, 0x80bcba9d, 0xd53db92, 0x80b21baf,
-  0xcefdb76, 0x80a7cb49,
-  0xc8bd35e, 0x809dc971, 0xc27c389, 0x8094162c, 0xbc3ac35, 0x808ab180,
-  0xb5f8d9f, 0x80819b74,
-  0xafb6805, 0x8078d40d, 0xa973ba5, 0x80705b50, 0xa3308bd, 0x80683143,
-  0x9cecf89, 0x806055eb,
-  0x96a9049, 0x8058c94c, 0x9064b3a, 0x80518b6b, 0x8a2009a, 0x804a9c4d,
-  0x83db0a7, 0x8043fbf6,
-  0x7d95b9e, 0x803daa6a, 0x77501be, 0x8037a7ac, 0x710a345, 0x8031f3c2,
-  0x6ac406f, 0x802c8ead,
-  0x647d97c, 0x80277872, 0x5e36ea9, 0x8022b114, 0x57f0035, 0x801e3895,
-  0x51a8e5c, 0x801a0ef8,
-  0x4b6195d, 0x80163440, 0x451a177, 0x8012a86f, 0x3ed26e6, 0x800f6b88,
-  0x388a9ea, 0x800c7d8c,
-  0x3242abf, 0x8009de7e, 0x2bfa9a4, 0x80078e5e, 0x25b26d7, 0x80058d2f,
-  0x1f6a297, 0x8003daf1,
-  0x1921d20, 0x800277a6, 0x12d96b1, 0x8001634e, 0xc90f88, 0x80009dea,
-  0x6487e3, 0x8000277a,
-};
-
-static const q31_t WeightsQ31_2048[4096] = {
-  0x7fffffff, 0x0, 0x7ffffd88, 0xffe6de05, 0x7ffff621, 0xffcdbc0b, 0x7fffe9cb,
-  0xffb49a12,
-  0x7fffd886, 0xff9b781d, 0x7fffc251, 0xff82562c, 0x7fffa72c, 0xff69343f,
-  0x7fff8719, 0xff501258,
-  0x7fff6216, 0xff36f078, 0x7fff3824, 0xff1dcea0, 0x7fff0943, 0xff04acd0,
-  0x7ffed572, 0xfeeb8b0a,
-  0x7ffe9cb2, 0xfed2694f, 0x7ffe5f03, 0xfeb947a0, 0x7ffe1c65, 0xfea025fd,
-  0x7ffdd4d7, 0xfe870467,
-  0x7ffd885a, 0xfe6de2e0, 0x7ffd36ee, 0xfe54c169, 0x7ffce093, 0xfe3ba002,
-  0x7ffc8549, 0xfe227eac,
-  0x7ffc250f, 0xfe095d69, 0x7ffbbfe6, 0xfdf03c3a, 0x7ffb55ce, 0xfdd71b1e,
-  0x7ffae6c7, 0xfdbdfa18,
-  0x7ffa72d1, 0xfda4d929, 0x7ff9f9ec, 0xfd8bb850, 0x7ff97c18, 0xfd729790,
-  0x7ff8f954, 0xfd5976e9,
-  0x7ff871a2, 0xfd40565c, 0x7ff7e500, 0xfd2735ea, 0x7ff75370, 0xfd0e1594,
-  0x7ff6bcf0, 0xfcf4f55c,
-  0x7ff62182, 0xfcdbd541, 0x7ff58125, 0xfcc2b545, 0x7ff4dbd9, 0xfca9956a,
-  0x7ff4319d, 0xfc9075af,
-  0x7ff38274, 0xfc775616, 0x7ff2ce5b, 0xfc5e36a0, 0x7ff21553, 0xfc45174e,
-  0x7ff1575d, 0xfc2bf821,
-  0x7ff09478, 0xfc12d91a, 0x7fefcca4, 0xfbf9ba39, 0x7feeffe1, 0xfbe09b80,
-  0x7fee2e30, 0xfbc77cf0,
-  0x7fed5791, 0xfbae5e89, 0x7fec7c02, 0xfb95404d, 0x7feb9b85, 0xfb7c223d,
-  0x7feab61a, 0xfb630459,
-  0x7fe9cbc0, 0xfb49e6a3, 0x7fe8dc78, 0xfb30c91b, 0x7fe7e841, 0xfb17abc2,
-  0x7fe6ef1c, 0xfafe8e9b,
-  0x7fe5f108, 0xfae571a4, 0x7fe4ee06, 0xfacc54e0, 0x7fe3e616, 0xfab3384f,
-  0x7fe2d938, 0xfa9a1bf3,
-  0x7fe1c76b, 0xfa80ffcb, 0x7fe0b0b1, 0xfa67e3da, 0x7fdf9508, 0xfa4ec821,
-  0x7fde7471, 0xfa35ac9f,
-  0x7fdd4eec, 0xfa1c9157, 0x7fdc247a, 0xfa037648, 0x7fdaf519, 0xf9ea5b75,
-  0x7fd9c0ca, 0xf9d140de,
-  0x7fd8878e, 0xf9b82684, 0x7fd74964, 0xf99f0c68, 0x7fd6064c, 0xf985f28a,
-  0x7fd4be46, 0xf96cd8ed,
-  0x7fd37153, 0xf953bf91, 0x7fd21f72, 0xf93aa676, 0x7fd0c8a3, 0xf9218d9e,
-  0x7fcf6ce8, 0xf908750a,
-  0x7fce0c3e, 0xf8ef5cbb, 0x7fcca6a7, 0xf8d644b2, 0x7fcb3c23, 0xf8bd2cef,
-  0x7fc9ccb2, 0xf8a41574,
-  0x7fc85854, 0xf88afe42, 0x7fc6df08, 0xf871e759, 0x7fc560cf, 0xf858d0bb,
-  0x7fc3dda9, 0xf83fba68,
-  0x7fc25596, 0xf826a462, 0x7fc0c896, 0xf80d8ea9, 0x7fbf36aa, 0xf7f4793e,
-  0x7fbd9fd0, 0xf7db6423,
-  0x7fbc040a, 0xf7c24f59, 0x7fba6357, 0xf7a93ae0, 0x7fb8bdb8, 0xf79026b9,
-  0x7fb7132b, 0xf77712e5,
-  0x7fb563b3, 0xf75dff66, 0x7fb3af4e, 0xf744ec3b, 0x7fb1f5fc, 0xf72bd967,
-  0x7fb037bf, 0xf712c6ea,
-  0x7fae7495, 0xf6f9b4c6, 0x7facac7f, 0xf6e0a2fa, 0x7faadf7c, 0xf6c79188,
-  0x7fa90d8e, 0xf6ae8071,
-  0x7fa736b4, 0xf6956fb7, 0x7fa55aee, 0xf67c5f59, 0x7fa37a3c, 0xf6634f59,
-  0x7fa1949e, 0xf64a3fb8,
-  0x7f9faa15, 0xf6313077, 0x7f9dbaa0, 0xf6182196, 0x7f9bc640, 0xf5ff1318,
-  0x7f99ccf4, 0xf5e604fc,
-  0x7f97cebd, 0xf5ccf743, 0x7f95cb9a, 0xf5b3e9f0, 0x7f93c38c, 0xf59add02,
-  0x7f91b694, 0xf581d07b,
-  0x7f8fa4b0, 0xf568c45b, 0x7f8d8de1, 0xf54fb8a4, 0x7f8b7227, 0xf536ad56,
-  0x7f895182, 0xf51da273,
-  0x7f872bf3, 0xf50497fb, 0x7f850179, 0xf4eb8def, 0x7f82d214, 0xf4d28451,
-  0x7f809dc5, 0xf4b97b21,
-  0x7f7e648c, 0xf4a07261, 0x7f7c2668, 0xf4876a10, 0x7f79e35a, 0xf46e6231,
-  0x7f779b62, 0xf4555ac5,
-  0x7f754e80, 0xf43c53cb, 0x7f72fcb4, 0xf4234d45, 0x7f70a5fe, 0xf40a4735,
-  0x7f6e4a5e, 0xf3f1419a,
-  0x7f6be9d4, 0xf3d83c77, 0x7f698461, 0xf3bf37cb, 0x7f671a05, 0xf3a63398,
-  0x7f64aabf, 0xf38d2fe0,
-  0x7f62368f, 0xf3742ca2, 0x7f5fbd77, 0xf35b29e0, 0x7f5d3f75, 0xf342279b,
-  0x7f5abc8a, 0xf32925d3,
-  0x7f5834b7, 0xf310248a, 0x7f55a7fa, 0xf2f723c1, 0x7f531655, 0xf2de2379,
-  0x7f507fc7, 0xf2c523b2,
-  0x7f4de451, 0xf2ac246e, 0x7f4b43f2, 0xf29325ad, 0x7f489eaa, 0xf27a2771,
-  0x7f45f47b, 0xf26129ba,
-  0x7f434563, 0xf2482c8a, 0x7f409164, 0xf22f2fe1, 0x7f3dd87c, 0xf21633c0,
-  0x7f3b1aad, 0xf1fd3829,
-  0x7f3857f6, 0xf1e43d1c, 0x7f359057, 0xf1cb429a, 0x7f32c3d1, 0xf1b248a5,
-  0x7f2ff263, 0xf1994f3d,
-  0x7f2d1c0e, 0xf1805662, 0x7f2a40d2, 0xf1675e17, 0x7f2760af, 0xf14e665c,
-  0x7f247ba5, 0xf1356f32,
-  0x7f2191b4, 0xf11c789a, 0x7f1ea2dc, 0xf1038295, 0x7f1baf1e, 0xf0ea8d24,
-  0x7f18b679, 0xf0d19848,
-  0x7f15b8ee, 0xf0b8a401, 0x7f12b67c, 0xf09fb051, 0x7f0faf25, 0xf086bd39,
-  0x7f0ca2e7, 0xf06dcaba,
-  0x7f0991c4, 0xf054d8d5, 0x7f067bba, 0xf03be78a, 0x7f0360cb, 0xf022f6da,
-  0x7f0040f6, 0xf00a06c8,
-  0x7efd1c3c, 0xeff11753, 0x7ef9f29d, 0xefd8287c, 0x7ef6c418, 0xefbf3a45,
-  0x7ef390ae, 0xefa64cae,
-  0x7ef05860, 0xef8d5fb8, 0x7eed1b2c, 0xef747365, 0x7ee9d914, 0xef5b87b5,
-  0x7ee69217, 0xef429caa,
-  0x7ee34636, 0xef29b243, 0x7edff570, 0xef10c883, 0x7edc9fc6, 0xeef7df6a,
-  0x7ed94538, 0xeedef6f9,
-  0x7ed5e5c6, 0xeec60f31, 0x7ed28171, 0xeead2813, 0x7ecf1837, 0xee9441a0,
-  0x7ecbaa1a, 0xee7b5bd9,
-  0x7ec8371a, 0xee6276bf, 0x7ec4bf36, 0xee499253, 0x7ec14270, 0xee30ae96,
-  0x7ebdc0c6, 0xee17cb88,
-  0x7eba3a39, 0xedfee92b, 0x7eb6aeca, 0xede60780, 0x7eb31e78, 0xedcd2687,
-  0x7eaf8943, 0xedb44642,
-  0x7eabef2c, 0xed9b66b2, 0x7ea85033, 0xed8287d7, 0x7ea4ac58, 0xed69a9b3,
-  0x7ea1039b, 0xed50cc46,
-  0x7e9d55fc, 0xed37ef91, 0x7e99a37c, 0xed1f1396, 0x7e95ec1a, 0xed063856,
-  0x7e922fd6, 0xeced5dd0,
-  0x7e8e6eb2, 0xecd48407, 0x7e8aa8ac, 0xecbbaafb, 0x7e86ddc6, 0xeca2d2ad,
-  0x7e830dff, 0xec89fb1e,
-  0x7e7f3957, 0xec71244f, 0x7e7b5fce, 0xec584e41, 0x7e778166, 0xec3f78f6,
-  0x7e739e1d, 0xec26a46d,
-  0x7e6fb5f4, 0xec0dd0a8, 0x7e6bc8eb, 0xebf4fda8, 0x7e67d703, 0xebdc2b6e,
-  0x7e63e03b, 0xebc359fb,
-  0x7e5fe493, 0xebaa894f, 0x7e5be40c, 0xeb91b96c, 0x7e57dea7, 0xeb78ea52,
-  0x7e53d462, 0xeb601c04,
-  0x7e4fc53e, 0xeb474e81, 0x7e4bb13c, 0xeb2e81ca, 0x7e47985b, 0xeb15b5e1,
-  0x7e437a9c, 0xeafceac6,
-  0x7e3f57ff, 0xeae4207a, 0x7e3b3083, 0xeacb56ff, 0x7e37042a, 0xeab28e56,
-  0x7e32d2f4, 0xea99c67e,
-  0x7e2e9cdf, 0xea80ff7a, 0x7e2a61ed, 0xea683949, 0x7e26221f, 0xea4f73ee,
-  0x7e21dd73, 0xea36af69,
-  0x7e1d93ea, 0xea1debbb, 0x7e194584, 0xea0528e5, 0x7e14f242, 0xe9ec66e8,
-  0x7e109a24, 0xe9d3a5c5,
-  0x7e0c3d29, 0xe9bae57d, 0x7e07db52, 0xe9a22610, 0x7e0374a0, 0xe9896781,
-  0x7dff0911, 0xe970a9ce,
-  0x7dfa98a8, 0xe957ecfb, 0x7df62362, 0xe93f3107, 0x7df1a942, 0xe92675f4,
-  0x7ded2a47, 0xe90dbbc2,
-  0x7de8a670, 0xe8f50273, 0x7de41dc0, 0xe8dc4a07, 0x7ddf9034, 0xe8c39280,
-  0x7ddafdce, 0xe8aadbde,
-  0x7dd6668f, 0xe8922622, 0x7dd1ca75, 0xe879714d, 0x7dcd2981, 0xe860bd61,
-  0x7dc883b4, 0xe8480a5d,
-  0x7dc3d90d, 0xe82f5844, 0x7dbf298d, 0xe816a716, 0x7dba7534, 0xe7fdf6d4,
-  0x7db5bc02, 0xe7e5477f,
-  0x7db0fdf8, 0xe7cc9917, 0x7dac3b15, 0xe7b3eb9f, 0x7da77359, 0xe79b3f16,
-  0x7da2a6c6, 0xe782937e,
-  0x7d9dd55a, 0xe769e8d8, 0x7d98ff17, 0xe7513f25, 0x7d9423fc, 0xe7389665,
-  0x7d8f4409, 0xe71fee99,
-  0x7d8a5f40, 0xe70747c4, 0x7d85759f, 0xe6eea1e4, 0x7d808728, 0xe6d5fcfc,
-  0x7d7b93da, 0xe6bd590d,
-  0x7d769bb5, 0xe6a4b616, 0x7d719eba, 0xe68c141a, 0x7d6c9ce9, 0xe6737319,
-  0x7d679642, 0xe65ad315,
-  0x7d628ac6, 0xe642340d, 0x7d5d7a74, 0xe6299604, 0x7d58654d, 0xe610f8f9,
-  0x7d534b50, 0xe5f85cef,
-  0x7d4e2c7f, 0xe5dfc1e5, 0x7d4908d9, 0xe5c727dd, 0x7d43e05e, 0xe5ae8ed8,
-  0x7d3eb30f, 0xe595f6d7,
-  0x7d3980ec, 0xe57d5fda, 0x7d3449f5, 0xe564c9e3, 0x7d2f0e2b, 0xe54c34f3,
-  0x7d29cd8c, 0xe533a10a,
-  0x7d24881b, 0xe51b0e2a, 0x7d1f3dd6, 0xe5027c53, 0x7d19eebf, 0xe4e9eb87,
-  0x7d149ad5, 0xe4d15bc6,
-  0x7d0f4218, 0xe4b8cd11, 0x7d09e489, 0xe4a03f69, 0x7d048228, 0xe487b2d0,
-  0x7cff1af5, 0xe46f2745,
-  0x7cf9aef0, 0xe4569ccb, 0x7cf43e1a, 0xe43e1362, 0x7ceec873, 0xe4258b0a,
-  0x7ce94dfb, 0xe40d03c6,
-  0x7ce3ceb2, 0xe3f47d96, 0x7cde4a98, 0xe3dbf87a, 0x7cd8c1ae, 0xe3c37474,
-  0x7cd333f3, 0xe3aaf184,
-  0x7ccda169, 0xe3926fad, 0x7cc80a0f, 0xe379eeed, 0x7cc26de5, 0xe3616f48,
-  0x7cbcccec, 0xe348f0bd,
-  0x7cb72724, 0xe330734d, 0x7cb17c8d, 0xe317f6fa, 0x7cabcd28, 0xe2ff7bc3,
-  0x7ca618f3, 0xe2e701ac,
-  0x7ca05ff1, 0xe2ce88b3, 0x7c9aa221, 0xe2b610da, 0x7c94df83, 0xe29d9a23,
-  0x7c8f1817, 0xe285248d,
-  0x7c894bde, 0xe26cb01b, 0x7c837ad8, 0xe2543ccc, 0x7c7da505, 0xe23bcaa2,
-  0x7c77ca65, 0xe223599e,
-  0x7c71eaf9, 0xe20ae9c1, 0x7c6c06c0, 0xe1f27b0b, 0x7c661dbc, 0xe1da0d7e,
-  0x7c602fec, 0xe1c1a11b,
-  0x7c5a3d50, 0xe1a935e2, 0x7c5445e9, 0xe190cbd4, 0x7c4e49b7, 0xe17862f3,
-  0x7c4848ba, 0xe15ffb3f,
-  0x7c4242f2, 0xe14794ba, 0x7c3c3860, 0xe12f2f63, 0x7c362904, 0xe116cb3d,
-  0x7c3014de, 0xe0fe6848,
-  0x7c29fbee, 0xe0e60685, 0x7c23de35, 0xe0cda5f5, 0x7c1dbbb3, 0xe0b54698,
-  0x7c179467, 0xe09ce871,
-  0x7c116853, 0xe0848b7f, 0x7c0b3777, 0xe06c2fc4, 0x7c0501d2, 0xe053d541,
-  0x7bfec765, 0xe03b7bf6,
-  0x7bf88830, 0xe02323e5, 0x7bf24434, 0xe00acd0e, 0x7bebfb70, 0xdff27773,
-  0x7be5ade6, 0xdfda2314,
-  0x7bdf5b94, 0xdfc1cff3, 0x7bd9047c, 0xdfa97e0f, 0x7bd2a89e, 0xdf912d6b,
-  0x7bcc47fa, 0xdf78de07,
-  0x7bc5e290, 0xdf608fe4, 0x7bbf7860, 0xdf484302, 0x7bb9096b, 0xdf2ff764,
-  0x7bb295b0, 0xdf17ad0a,
-  0x7bac1d31, 0xdeff63f4, 0x7ba59fee, 0xdee71c24, 0x7b9f1de6, 0xdeced59b,
-  0x7b989719, 0xdeb69059,
-  0x7b920b89, 0xde9e4c60, 0x7b8b7b36, 0xde8609b1, 0x7b84e61f, 0xde6dc84b,
-  0x7b7e4c45, 0xde558831,
-  0x7b77ada8, 0xde3d4964, 0x7b710a49, 0xde250be3, 0x7b6a6227, 0xde0ccfb1,
-  0x7b63b543, 0xddf494ce,
-  0x7b5d039e, 0xdddc5b3b, 0x7b564d36, 0xddc422f8, 0x7b4f920e, 0xddabec08,
-  0x7b48d225, 0xdd93b66a,
-  0x7b420d7a, 0xdd7b8220, 0x7b3b4410, 0xdd634f2b, 0x7b3475e5, 0xdd4b1d8c,
-  0x7b2da2fa, 0xdd32ed43,
-  0x7b26cb4f, 0xdd1abe51, 0x7b1feee5, 0xdd0290b8, 0x7b190dbc, 0xdcea6478,
-  0x7b1227d3, 0xdcd23993,
-  0x7b0b3d2c, 0xdcba1008, 0x7b044dc7, 0xdca1e7da, 0x7afd59a4, 0xdc89c109,
-  0x7af660c2, 0xdc719b96,
-  0x7aef6323, 0xdc597781, 0x7ae860c7, 0xdc4154cd, 0x7ae159ae, 0xdc293379,
-  0x7ada4dd8, 0xdc111388,
-  0x7ad33d45, 0xdbf8f4f8, 0x7acc27f7, 0xdbe0d7cd, 0x7ac50dec, 0xdbc8bc06,
-  0x7abdef25, 0xdbb0a1a4,
-  0x7ab6cba4, 0xdb9888a8, 0x7aafa367, 0xdb807114, 0x7aa8766f, 0xdb685ae9,
-  0x7aa144bc, 0xdb504626,
-  0x7a9a0e50, 0xdb3832cd, 0x7a92d329, 0xdb2020e0, 0x7a8b9348, 0xdb08105e,
-  0x7a844eae, 0xdaf00149,
-  0x7a7d055b, 0xdad7f3a2, 0x7a75b74f, 0xdabfe76a, 0x7a6e648a, 0xdaa7dca1,
-  0x7a670d0d, 0xda8fd349,
-  0x7a5fb0d8, 0xda77cb63, 0x7a584feb, 0xda5fc4ef, 0x7a50ea47, 0xda47bfee,
-  0x7a497feb, 0xda2fbc61,
-  0x7a4210d8, 0xda17ba4a, 0x7a3a9d0f, 0xd9ffb9a9, 0x7a332490, 0xd9e7ba7f,
-  0x7a2ba75a, 0xd9cfbccd,
-  0x7a24256f, 0xd9b7c094, 0x7a1c9ece, 0xd99fc5d4, 0x7a151378, 0xd987cc90,
-  0x7a0d836d, 0xd96fd4c7,
-  0x7a05eead, 0xd957de7a, 0x79fe5539, 0xd93fe9ab, 0x79f6b711, 0xd927f65b,
-  0x79ef1436, 0xd910048a,
-  0x79e76ca7, 0xd8f81439, 0x79dfc064, 0xd8e0256a, 0x79d80f6f, 0xd8c8381d,
-  0x79d059c8, 0xd8b04c52,
-  0x79c89f6e, 0xd898620c, 0x79c0e062, 0xd880794b, 0x79b91ca4, 0xd868920f,
-  0x79b15435, 0xd850ac5a,
-  0x79a98715, 0xd838c82d, 0x79a1b545, 0xd820e589, 0x7999dec4, 0xd809046e,
-  0x79920392, 0xd7f124dd,
-  0x798a23b1, 0xd7d946d8, 0x79823f20, 0xd7c16a5f, 0x797a55e0, 0xd7a98f73,
-  0x797267f2, 0xd791b616,
-  0x796a7554, 0xd779de47, 0x79627e08, 0xd7620808, 0x795a820e, 0xd74a335b,
-  0x79528167, 0xd732603f,
-  0x794a7c12, 0xd71a8eb5, 0x79427210, 0xd702bec0, 0x793a6361, 0xd6eaf05f,
-  0x79325006, 0xd6d32393,
-  0x792a37fe, 0xd6bb585e, 0x79221b4b, 0xd6a38ec0, 0x7919f9ec, 0xd68bc6ba,
-  0x7911d3e2, 0xd674004e,
-  0x7909a92d, 0xd65c3b7b, 0x790179cd, 0xd6447844, 0x78f945c3, 0xd62cb6a8,
-  0x78f10d0f, 0xd614f6a9,
-  0x78e8cfb2, 0xd5fd3848, 0x78e08dab, 0xd5e57b85, 0x78d846fb, 0xd5cdc062,
-  0x78cffba3, 0xd5b606e0,
-  0x78c7aba2, 0xd59e4eff, 0x78bf56f9, 0xd58698c0, 0x78b6fda8, 0xd56ee424,
-  0x78ae9fb0, 0xd557312d,
-  0x78a63d11, 0xd53f7fda, 0x789dd5cb, 0xd527d02e, 0x789569df, 0xd5102228,
-  0x788cf94c, 0xd4f875ca,
-  0x78848414, 0xd4e0cb15, 0x787c0a36, 0xd4c92209, 0x78738bb3, 0xd4b17aa8,
-  0x786b088c, 0xd499d4f2,
-  0x786280bf, 0xd48230e9, 0x7859f44f, 0xd46a8e8d, 0x7851633b, 0xd452eddf,
-  0x7848cd83, 0xd43b4ee0,
-  0x78403329, 0xd423b191, 0x7837942b, 0xd40c15f3, 0x782ef08b, 0xd3f47c06,
-  0x78264849, 0xd3dce3cd,
-  0x781d9b65, 0xd3c54d47, 0x7814e9df, 0xd3adb876, 0x780c33b8, 0xd396255a,
-  0x780378f1, 0xd37e93f4,
-  0x77fab989, 0xd3670446, 0x77f1f581, 0xd34f764f, 0x77e92cd9, 0xd337ea12,
-  0x77e05f91, 0xd3205f8f,
-  0x77d78daa, 0xd308d6c7, 0x77ceb725, 0xd2f14fba, 0x77c5dc01, 0xd2d9ca6a,
-  0x77bcfc3f, 0xd2c246d8,
-  0x77b417df, 0xd2aac504, 0x77ab2ee2, 0xd29344f0, 0x77a24148, 0xd27bc69c,
-  0x77994f11, 0xd2644a0a,
-  0x7790583e, 0xd24ccf39, 0x77875cce, 0xd235562b, 0x777e5cc3, 0xd21ddee2,
-  0x7775581d, 0xd206695d,
-  0x776c4edb, 0xd1eef59e, 0x776340ff, 0xd1d783a6, 0x775a2e89, 0xd1c01375,
-  0x77511778, 0xd1a8a50d,
-  0x7747fbce, 0xd191386e, 0x773edb8b, 0xd179cd99, 0x7735b6af, 0xd1626490,
-  0x772c8d3a, 0xd14afd52,
-  0x77235f2d, 0xd13397e2, 0x771a2c88, 0xd11c343f, 0x7710f54c, 0xd104d26b,
-  0x7707b979, 0xd0ed7267,
-  0x76fe790e, 0xd0d61434, 0x76f5340e, 0xd0beb7d2, 0x76ebea77, 0xd0a75d42,
-  0x76e29c4b, 0xd0900486,
-  0x76d94989, 0xd078ad9e, 0x76cff232, 0xd061588b, 0x76c69647, 0xd04a054e,
-  0x76bd35c7, 0xd032b3e7,
-  0x76b3d0b4, 0xd01b6459, 0x76aa670d, 0xd00416a3, 0x76a0f8d2, 0xcfeccac7,
-  0x76978605, 0xcfd580c6,
-  0x768e0ea6, 0xcfbe389f, 0x768492b4, 0xcfa6f255, 0x767b1231, 0xcf8fade9,
-  0x76718d1c, 0xcf786b5a,
-  0x76680376, 0xcf612aaa, 0x765e7540, 0xcf49ebda, 0x7654e279, 0xcf32aeeb,
-  0x764b4b23, 0xcf1b73de,
-  0x7641af3d, 0xcf043ab3, 0x76380ec8, 0xceed036b, 0x762e69c4, 0xced5ce08,
-  0x7624c031, 0xcebe9a8a,
-  0x761b1211, 0xcea768f2, 0x76115f63, 0xce903942, 0x7607a828, 0xce790b79,
-  0x75fdec60, 0xce61df99,
-  0x75f42c0b, 0xce4ab5a2, 0x75ea672a, 0xce338d97, 0x75e09dbd, 0xce1c6777,
-  0x75d6cfc5, 0xce054343,
-  0x75ccfd42, 0xcdee20fc, 0x75c32634, 0xcdd700a4, 0x75b94a9c, 0xcdbfe23a,
-  0x75af6a7b, 0xcda8c5c1,
-  0x75a585cf, 0xcd91ab39, 0x759b9c9b, 0xcd7a92a2, 0x7591aedd, 0xcd637bfe,
-  0x7587bc98, 0xcd4c674d,
-  0x757dc5ca, 0xcd355491, 0x7573ca75, 0xcd1e43ca, 0x7569ca99, 0xcd0734f9,
-  0x755fc635, 0xccf0281f,
-  0x7555bd4c, 0xccd91d3d, 0x754bafdc, 0xccc21455, 0x75419de7, 0xccab0d65,
-  0x7537876c, 0xcc940871,
-  0x752d6c6c, 0xcc7d0578, 0x75234ce8, 0xcc66047b, 0x751928e0, 0xcc4f057c,
-  0x750f0054, 0xcc38087b,
-  0x7504d345, 0xcc210d79, 0x74faa1b3, 0xcc0a1477, 0x74f06b9e, 0xcbf31d75,
-  0x74e63108, 0xcbdc2876,
-  0x74dbf1ef, 0xcbc53579, 0x74d1ae55, 0xcbae447f, 0x74c7663a, 0xcb97558a,
-  0x74bd199f, 0xcb80689a,
-  0x74b2c884, 0xcb697db0, 0x74a872e8, 0xcb5294ce, 0x749e18cd, 0xcb3badf3,
-  0x7493ba34, 0xcb24c921,
-  0x7489571c, 0xcb0de658, 0x747eef85, 0xcaf7059a, 0x74748371, 0xcae026e8,
-  0x746a12df, 0xcac94a42,
-  0x745f9dd1, 0xcab26fa9, 0x74552446, 0xca9b971e, 0x744aa63f, 0xca84c0a3,
-  0x744023bc, 0xca6dec37,
-  0x74359cbd, 0xca5719db, 0x742b1144, 0xca404992, 0x74208150, 0xca297b5a,
-  0x7415ece2, 0xca12af37,
-  0x740b53fb, 0xc9fbe527, 0x7400b69a, 0xc9e51d2d, 0x73f614c0, 0xc9ce5748,
-  0x73eb6e6e, 0xc9b7937a,
-  0x73e0c3a3, 0xc9a0d1c5, 0x73d61461, 0xc98a1227, 0x73cb60a8, 0xc97354a4,
-  0x73c0a878, 0xc95c993a,
-  0x73b5ebd1, 0xc945dfec, 0x73ab2ab4, 0xc92f28ba, 0x73a06522, 0xc91873a5,
-  0x73959b1b, 0xc901c0ae,
-  0x738acc9e, 0xc8eb0fd6, 0x737ff9ae, 0xc8d4611d, 0x73752249, 0xc8bdb485,
-  0x736a4671, 0xc8a70a0e,
-  0x735f6626, 0xc89061ba, 0x73548168, 0xc879bb89, 0x73499838, 0xc863177b,
-  0x733eaa96, 0xc84c7593,
-  0x7333b883, 0xc835d5d0, 0x7328c1ff, 0xc81f3834, 0x731dc70a, 0xc8089cbf,
-  0x7312c7a5, 0xc7f20373,
-  0x7307c3d0, 0xc7db6c50, 0x72fcbb8c, 0xc7c4d757, 0x72f1aed9, 0xc7ae4489,
-  0x72e69db7, 0xc797b3e7,
-  0x72db8828, 0xc7812572, 0x72d06e2b, 0xc76a992a, 0x72c54fc1, 0xc7540f11,
-  0x72ba2cea, 0xc73d8727,
-  0x72af05a7, 0xc727016d, 0x72a3d9f7, 0xc7107de4, 0x7298a9dd, 0xc6f9fc8d,
-  0x728d7557, 0xc6e37d69,
-  0x72823c67, 0xc6cd0079, 0x7276ff0d, 0xc6b685bd, 0x726bbd48, 0xc6a00d37,
-  0x7260771b, 0xc68996e7,
-  0x72552c85, 0xc67322ce, 0x7249dd86, 0xc65cb0ed, 0x723e8a20, 0xc6464144,
-  0x72333251, 0xc62fd3d6,
-  0x7227d61c, 0xc61968a2, 0x721c7580, 0xc602ffaa, 0x7211107e, 0xc5ec98ee,
-  0x7205a716, 0xc5d6346f,
-  0x71fa3949, 0xc5bfd22e, 0x71eec716, 0xc5a9722c, 0x71e35080, 0xc593146a,
-  0x71d7d585, 0xc57cb8e9,
-  0x71cc5626, 0xc5665fa9, 0x71c0d265, 0xc55008ab, 0x71b54a41, 0xc539b3f1,
-  0x71a9bdba, 0xc523617a,
-  0x719e2cd2, 0xc50d1149, 0x71929789, 0xc4f6c35d, 0x7186fdde, 0xc4e077b8,
-  0x717b5fd3, 0xc4ca2e5b,
-  0x716fbd68, 0xc4b3e746, 0x7164169d, 0xc49da27a, 0x71586b74, 0xc4875ff9,
-  0x714cbbeb, 0xc4711fc2,
-  0x71410805, 0xc45ae1d7, 0x71354fc0, 0xc444a639, 0x7129931f, 0xc42e6ce8,
-  0x711dd220, 0xc41835e6,
-  0x71120cc5, 0xc4020133, 0x7106430e, 0xc3ebced0, 0x70fa74fc, 0xc3d59ebe,
-  0x70eea28e, 0xc3bf70fd,
-  0x70e2cbc6, 0xc3a94590, 0x70d6f0a4, 0xc3931c76, 0x70cb1128, 0xc37cf5b0,
-  0x70bf2d53, 0xc366d140,
-  0x70b34525, 0xc350af26, 0x70a7589f, 0xc33a8f62, 0x709b67c0, 0xc32471f7,
-  0x708f728b, 0xc30e56e4,
-  0x708378ff, 0xc2f83e2a, 0x70777b1c, 0xc2e227cb, 0x706b78e3, 0xc2cc13c7,
-  0x705f7255, 0xc2b6021f,
-  0x70536771, 0xc29ff2d4, 0x70475839, 0xc289e5e7, 0x703b44ad, 0xc273db58,
-  0x702f2ccd, 0xc25dd329,
-  0x7023109a, 0xc247cd5a, 0x7016f014, 0xc231c9ec, 0x700acb3c, 0xc21bc8e1,
-  0x6ffea212, 0xc205ca38,
-  0x6ff27497, 0xc1efcdf3, 0x6fe642ca, 0xc1d9d412, 0x6fda0cae, 0xc1c3dc97,
-  0x6fcdd241, 0xc1ade781,
-  0x6fc19385, 0xc197f4d4, 0x6fb5507a, 0xc182048d, 0x6fa90921, 0xc16c16b0,
-  0x6f9cbd79, 0xc1562b3d,
-  0x6f906d84, 0xc1404233, 0x6f841942, 0xc12a5b95, 0x6f77c0b3, 0xc1147764,
-  0x6f6b63d8, 0xc0fe959f,
-  0x6f5f02b2, 0xc0e8b648, 0x6f529d40, 0xc0d2d960, 0x6f463383, 0xc0bcfee7,
-  0x6f39c57d, 0xc0a726df,
-  0x6f2d532c, 0xc0915148, 0x6f20dc92, 0xc07b7e23, 0x6f1461b0, 0xc065ad70,
-  0x6f07e285, 0xc04fdf32,
-  0x6efb5f12, 0xc03a1368, 0x6eeed758, 0xc0244a14, 0x6ee24b57, 0xc00e8336,
-  0x6ed5bb10, 0xbff8bece,
-  0x6ec92683, 0xbfe2fcdf, 0x6ebc8db0, 0xbfcd3d69, 0x6eaff099, 0xbfb7806c,
-  0x6ea34f3d, 0xbfa1c5ea,
-  0x6e96a99d, 0xbf8c0de3, 0x6e89ffb9, 0xbf765858, 0x6e7d5193, 0xbf60a54a,
-  0x6e709f2a, 0xbf4af4ba,
-  0x6e63e87f, 0xbf3546a8, 0x6e572d93, 0xbf1f9b16, 0x6e4a6e66, 0xbf09f205,
-  0x6e3daaf8, 0xbef44b74,
-  0x6e30e34a, 0xbedea765, 0x6e24175c, 0xbec905d9, 0x6e174730, 0xbeb366d1,
-  0x6e0a72c5, 0xbe9dca4e,
-  0x6dfd9a1c, 0xbe88304f, 0x6df0bd35, 0xbe7298d7, 0x6de3dc11, 0xbe5d03e6,
-  0x6dd6f6b1, 0xbe47717c,
-  0x6dca0d14, 0xbe31e19b, 0x6dbd1f3c, 0xbe1c5444, 0x6db02d29, 0xbe06c977,
-  0x6da336dc, 0xbdf14135,
-  0x6d963c54, 0xbddbbb7f, 0x6d893d93, 0xbdc63856, 0x6d7c3a98, 0xbdb0b7bb,
-  0x6d6f3365, 0xbd9b39ad,
-  0x6d6227fa, 0xbd85be30, 0x6d551858, 0xbd704542, 0x6d48047e, 0xbd5acee5,
-  0x6d3aec6e, 0xbd455b1a,
-  0x6d2dd027, 0xbd2fe9e2, 0x6d20afac, 0xbd1a7b3d, 0x6d138afb, 0xbd050f2c,
-  0x6d066215, 0xbcefa5b0,
-  0x6cf934fc, 0xbcda3ecb, 0x6cec03af, 0xbcc4da7b, 0x6cdece2f, 0xbcaf78c4,
-  0x6cd1947c, 0xbc9a19a5,
-  0x6cc45698, 0xbc84bd1f, 0x6cb71482, 0xbc6f6333, 0x6ca9ce3b, 0xbc5a0be2,
-  0x6c9c83c3, 0xbc44b72c,
-  0x6c8f351c, 0xbc2f6513, 0x6c81e245, 0xbc1a1598, 0x6c748b3f, 0xbc04c8ba,
-  0x6c67300b, 0xbbef7e7c,
-  0x6c59d0a9, 0xbbda36dd, 0x6c4c6d1a, 0xbbc4f1df, 0x6c3f055d, 0xbbafaf82,
-  0x6c319975, 0xbb9a6fc7,
-  0x6c242960, 0xbb8532b0, 0x6c16b521, 0xbb6ff83c, 0x6c093cb6, 0xbb5ac06d,
-  0x6bfbc021, 0xbb458b43,
-  0x6bee3f62, 0xbb3058c0, 0x6be0ba7b, 0xbb1b28e4, 0x6bd3316a, 0xbb05fbb0,
-  0x6bc5a431, 0xbaf0d125,
-  0x6bb812d1, 0xbadba943, 0x6baa7d49, 0xbac6840c, 0x6b9ce39b, 0xbab16180,
-  0x6b8f45c7, 0xba9c41a0,
-  0x6b81a3cd, 0xba87246d, 0x6b73fdae, 0xba7209e7, 0x6b66536b, 0xba5cf210,
-  0x6b58a503, 0xba47dce8,
-  0x6b4af279, 0xba32ca71, 0x6b3d3bcb, 0xba1dbaaa, 0x6b2f80fb, 0xba08ad95,
-  0x6b21c208, 0xb9f3a332,
-  0x6b13fef5, 0xb9de9b83, 0x6b0637c1, 0xb9c99688, 0x6af86c6c, 0xb9b49442,
-  0x6aea9cf8, 0xb99f94b2,
-  0x6adcc964, 0xb98a97d8, 0x6acef1b2, 0xb9759db6, 0x6ac115e2, 0xb960a64c,
-  0x6ab335f4, 0xb94bb19b,
-  0x6aa551e9, 0xb936bfa4, 0x6a9769c1, 0xb921d067, 0x6a897d7d, 0xb90ce3e6,
-  0x6a7b8d1e, 0xb8f7fa21,
-  0x6a6d98a4, 0xb8e31319, 0x6a5fa010, 0xb8ce2ecf, 0x6a51a361, 0xb8b94d44,
-  0x6a43a29a, 0xb8a46e78,
-  0x6a359db9, 0xb88f926d, 0x6a2794c1, 0xb87ab922, 0x6a1987b0, 0xb865e299,
-  0x6a0b7689, 0xb8510ed4,
-  0x69fd614a, 0xb83c3dd1, 0x69ef47f6, 0xb8276f93, 0x69e12a8c, 0xb812a41a,
-  0x69d3090e, 0xb7fddb67,
-  0x69c4e37a, 0xb7e9157a, 0x69b6b9d3, 0xb7d45255, 0x69a88c19, 0xb7bf91f8,
-  0x699a5a4c, 0xb7aad465,
-  0x698c246c, 0xb796199b, 0x697dea7b, 0xb781619c, 0x696fac78, 0xb76cac69,
-  0x69616a65, 0xb757fa01,
-  0x69532442, 0xb7434a67, 0x6944da10, 0xb72e9d9b, 0x69368bce, 0xb719f39e,
-  0x6928397e, 0xb7054c6f,
-  0x6919e320, 0xb6f0a812, 0x690b88b5, 0xb6dc0685, 0x68fd2a3d, 0xb6c767ca,
-  0x68eec7b9, 0xb6b2cbe2,
-  0x68e06129, 0xb69e32cd, 0x68d1f68f, 0xb6899c8d, 0x68c387e9, 0xb6750921,
-  0x68b5153a, 0xb660788c,
-  0x68a69e81, 0xb64beacd, 0x689823bf, 0xb6375fe5, 0x6889a4f6, 0xb622d7d6,
-  0x687b2224, 0xb60e529f,
-  0x686c9b4b, 0xb5f9d043, 0x685e106c, 0xb5e550c1, 0x684f8186, 0xb5d0d41a,
-  0x6840ee9b, 0xb5bc5a50,
-  0x683257ab, 0xb5a7e362, 0x6823bcb7, 0xb5936f53, 0x68151dbe, 0xb57efe22,
-  0x68067ac3, 0xb56a8fd0,
-  0x67f7d3c5, 0xb556245e, 0x67e928c5, 0xb541bbcd, 0x67da79c3, 0xb52d561e,
-  0x67cbc6c0, 0xb518f351,
-  0x67bd0fbd, 0xb5049368, 0x67ae54ba, 0xb4f03663, 0x679f95b7, 0xb4dbdc42,
-  0x6790d2b6, 0xb4c78507,
-  0x67820bb7, 0xb4b330b3, 0x677340ba, 0xb49edf45, 0x676471c0, 0xb48a90c0,
-  0x67559eca, 0xb4764523,
-  0x6746c7d8, 0xb461fc70, 0x6737ecea, 0xb44db6a8, 0x67290e02, 0xb43973ca,
-  0x671a2b20, 0xb42533d8,
-  0x670b4444, 0xb410f6d3, 0x66fc596f, 0xb3fcbcbb, 0x66ed6aa1, 0xb3e88592,
-  0x66de77dc, 0xb3d45157,
-  0x66cf8120, 0xb3c0200c, 0x66c0866d, 0xb3abf1b2, 0x66b187c3, 0xb397c649,
-  0x66a28524, 0xb3839dd3,
-  0x66937e91, 0xb36f784f, 0x66847408, 0xb35b55bf, 0x6675658c, 0xb3473623,
-  0x6666531d, 0xb333197c,
-  0x66573cbb, 0xb31effcc, 0x66482267, 0xb30ae912, 0x66390422, 0xb2f6d550,
-  0x6629e1ec, 0xb2e2c486,
-  0x661abbc5, 0xb2ceb6b5, 0x660b91af, 0xb2baabde, 0x65fc63a9, 0xb2a6a402,
-  0x65ed31b5, 0xb2929f21,
-  0x65ddfbd3, 0xb27e9d3c, 0x65cec204, 0xb26a9e54, 0x65bf8447, 0xb256a26a,
-  0x65b0429f, 0xb242a97e,
-  0x65a0fd0b, 0xb22eb392, 0x6591b38c, 0xb21ac0a6, 0x65826622, 0xb206d0ba,
-  0x657314cf, 0xb1f2e3d0,
-  0x6563bf92, 0xb1def9e9, 0x6554666d, 0xb1cb1304, 0x6545095f, 0xb1b72f23,
-  0x6535a86b, 0xb1a34e47,
-  0x6526438f, 0xb18f7071, 0x6516dacd, 0xb17b95a0, 0x65076e25, 0xb167bdd7,
-  0x64f7fd98, 0xb153e915,
-  0x64e88926, 0xb140175b, 0x64d910d1, 0xb12c48ab, 0x64c99498, 0xb1187d05,
-  0x64ba147d, 0xb104b46a,
-  0x64aa907f, 0xb0f0eeda, 0x649b08a0, 0xb0dd2c56, 0x648b7ce0, 0xb0c96ce0,
-  0x647bed3f, 0xb0b5b077,
-  0x646c59bf, 0xb0a1f71d, 0x645cc260, 0xb08e40d2, 0x644d2722, 0xb07a8d97,
-  0x643d8806, 0xb066dd6d,
-  0x642de50d, 0xb0533055, 0x641e3e38, 0xb03f864f, 0x640e9386, 0xb02bdf5c,
-  0x63fee4f8, 0xb0183b7d,
-  0x63ef3290, 0xb0049ab3, 0x63df7c4d, 0xaff0fcfe, 0x63cfc231, 0xafdd625f,
-  0x63c0043b, 0xafc9cad7,
-  0x63b0426d, 0xafb63667, 0x63a07cc7, 0xafa2a50f, 0x6390b34a, 0xaf8f16d1,
-  0x6380e5f6, 0xaf7b8bac,
-  0x637114cc, 0xaf6803a2, 0x63613fcd, 0xaf547eb3, 0x635166f9, 0xaf40fce1,
-  0x63418a50, 0xaf2d7e2b,
-  0x6331a9d4, 0xaf1a0293, 0x6321c585, 0xaf068a1a, 0x6311dd64, 0xaef314c0,
-  0x6301f171, 0xaedfa285,
-  0x62f201ac, 0xaecc336c, 0x62e20e17, 0xaeb8c774, 0x62d216b3, 0xaea55e9e,
-  0x62c21b7e, 0xae91f8eb,
-  0x62b21c7b, 0xae7e965b, 0x62a219aa, 0xae6b36f0, 0x6292130c, 0xae57daab,
-  0x628208a1, 0xae44818b,
-  0x6271fa69, 0xae312b92, 0x6261e866, 0xae1dd8c0, 0x6251d298, 0xae0a8916,
-  0x6241b8ff, 0xadf73c96,
-  0x62319b9d, 0xade3f33e, 0x62217a72, 0xadd0ad12, 0x6211557e, 0xadbd6a10,
-  0x62012cc2, 0xadaa2a3b,
-  0x61f1003f, 0xad96ed92, 0x61e0cff5, 0xad83b416, 0x61d09be5, 0xad707dc8,
-  0x61c06410, 0xad5d4aaa,
-  0x61b02876, 0xad4a1aba, 0x619fe918, 0xad36edfc, 0x618fa5f7, 0xad23c46e,
-  0x617f5f12, 0xad109e12,
-  0x616f146c, 0xacfd7ae8, 0x615ec603, 0xacea5af2, 0x614e73da, 0xacd73e30,
-  0x613e1df0, 0xacc424a3,
-  0x612dc447, 0xacb10e4b, 0x611d66de, 0xac9dfb29, 0x610d05b7, 0xac8aeb3e,
-  0x60fca0d2, 0xac77de8b,
-  0x60ec3830, 0xac64d510, 0x60dbcbd1, 0xac51cecf, 0x60cb5bb7, 0xac3ecbc7,
-  0x60bae7e1, 0xac2bcbfa,
-  0x60aa7050, 0xac18cf69, 0x6099f505, 0xac05d613, 0x60897601, 0xabf2dffb,
-  0x6078f344, 0xabdfed1f,
-  0x60686ccf, 0xabccfd83, 0x6057e2a2, 0xabba1125, 0x604754bf, 0xaba72807,
-  0x6036c325, 0xab944229,
-  0x60262dd6, 0xab815f8d, 0x601594d1, 0xab6e8032, 0x6004f819, 0xab5ba41a,
-  0x5ff457ad, 0xab48cb46,
-  0x5fe3b38d, 0xab35f5b5, 0x5fd30bbc, 0xab23236a, 0x5fc26038, 0xab105464,
-  0x5fb1b104, 0xaafd88a4,
-  0x5fa0fe1f, 0xaaeac02c, 0x5f90478a, 0xaad7fafb, 0x5f7f8d46, 0xaac53912,
-  0x5f6ecf53, 0xaab27a73,
-  0x5f5e0db3, 0xaa9fbf1e, 0x5f4d4865, 0xaa8d0713, 0x5f3c7f6b, 0xaa7a5253,
-  0x5f2bb2c5, 0xaa67a0e0,
-  0x5f1ae274, 0xaa54f2ba, 0x5f0a0e77, 0xaa4247e1, 0x5ef936d1, 0xaa2fa056,
-  0x5ee85b82, 0xaa1cfc1a,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5ec699e9, 0xa9f7bd92, 0x5eb5b3a2, 0xa9e52347,
-  0x5ea4c9b3, 0xa9d28c4e,
-  0x5e93dc1f, 0xa9bff8a8, 0x5e82eae5, 0xa9ad6855, 0x5e71f606, 0xa99adb56,
-  0x5e60fd84, 0xa98851ac,
-  0x5e50015d, 0xa975cb57, 0x5e3f0194, 0xa9634858, 0x5e2dfe29, 0xa950c8b0,
-  0x5e1cf71c, 0xa93e4c5f,
-  0x5e0bec6e, 0xa92bd367, 0x5dfade20, 0xa9195dc7, 0x5de9cc33, 0xa906eb82,
-  0x5dd8b6a7, 0xa8f47c97,
-  0x5dc79d7c, 0xa8e21106, 0x5db680b4, 0xa8cfa8d2, 0x5da5604f, 0xa8bd43fa,
-  0x5d943c4e, 0xa8aae280,
-  0x5d8314b1, 0xa8988463, 0x5d71e979, 0xa88629a5, 0x5d60baa7, 0xa873d246,
-  0x5d4f883b, 0xa8617e48,
-  0x5d3e5237, 0xa84f2daa, 0x5d2d189a, 0xa83ce06e, 0x5d1bdb65, 0xa82a9693,
-  0x5d0a9a9a, 0xa818501c,
-  0x5cf95638, 0xa8060d08, 0x5ce80e41, 0xa7f3cd59, 0x5cd6c2b5, 0xa7e1910f,
-  0x5cc57394, 0xa7cf582a,
-  0x5cb420e0, 0xa7bd22ac, 0x5ca2ca99, 0xa7aaf094, 0x5c9170bf, 0xa798c1e5,
-  0x5c801354, 0xa786969e,
-  0x5c6eb258, 0xa7746ec0, 0x5c5d4dcc, 0xa7624a4d, 0x5c4be5b0, 0xa7502943,
-  0x5c3a7a05, 0xa73e0ba5,
-  0x5c290acc, 0xa72bf174, 0x5c179806, 0xa719daae, 0x5c0621b2, 0xa707c757,
-  0x5bf4a7d2, 0xa6f5b76d,
-  0x5be32a67, 0xa6e3aaf2, 0x5bd1a971, 0xa6d1a1e7, 0x5bc024f0, 0xa6bf9c4b,
-  0x5bae9ce7, 0xa6ad9a21,
-  0x5b9d1154, 0xa69b9b68, 0x5b8b8239, 0xa689a022, 0x5b79ef96, 0xa677a84e,
-  0x5b68596d, 0xa665b3ee,
-  0x5b56bfbd, 0xa653c303, 0x5b452288, 0xa641d58c, 0x5b3381ce, 0xa62feb8b,
-  0x5b21dd90, 0xa61e0501,
-  0x5b1035cf, 0xa60c21ee, 0x5afe8a8b, 0xa5fa4252, 0x5aecdbc5, 0xa5e8662f,
-  0x5adb297d, 0xa5d68d85,
-  0x5ac973b5, 0xa5c4b855, 0x5ab7ba6c, 0xa5b2e6a0, 0x5aa5fda5, 0xa5a11866,
-  0x5a943d5e, 0xa58f4da8,
-  0x5a82799a, 0xa57d8666, 0x5a70b258, 0xa56bc2a2, 0x5a5ee79a, 0xa55a025b,
-  0x5a4d1960, 0xa5484594,
-  0x5a3b47ab, 0xa5368c4b, 0x5a29727b, 0xa524d683, 0x5a1799d1, 0xa513243b,
-  0x5a05bdae, 0xa5017575,
-  0x59f3de12, 0xa4efca31, 0x59e1faff, 0xa4de2270, 0x59d01475, 0xa4cc7e32,
-  0x59be2a74, 0xa4badd78,
-  0x59ac3cfd, 0xa4a94043, 0x599a4c12, 0xa497a693, 0x598857b2, 0xa486106a,
-  0x59765fde, 0xa4747dc7,
-  0x59646498, 0xa462eeac, 0x595265df, 0xa4516319, 0x594063b5, 0xa43fdb10,
-  0x592e5e19, 0xa42e568f,
-  0x591c550e, 0xa41cd599, 0x590a4893, 0xa40b582e, 0x58f838a9, 0xa3f9de4e,
-  0x58e62552, 0xa3e867fa,
-  0x58d40e8c, 0xa3d6f534, 0x58c1f45b, 0xa3c585fb, 0x58afd6bd, 0xa3b41a50,
-  0x589db5b3, 0xa3a2b234,
-  0x588b9140, 0xa3914da8, 0x58796962, 0xa37fecac, 0x58673e1b, 0xa36e8f41,
-  0x58550f6c, 0xa35d3567,
-  0x5842dd54, 0xa34bdf20, 0x5830a7d6, 0xa33a8c6c, 0x581e6ef1, 0xa3293d4b,
-  0x580c32a7, 0xa317f1bf,
-  0x57f9f2f8, 0xa306a9c8, 0x57e7afe4, 0xa2f56566, 0x57d5696d, 0xa2e4249b,
-  0x57c31f92, 0xa2d2e766,
-  0x57b0d256, 0xa2c1adc9, 0x579e81b8, 0xa2b077c5, 0x578c2dba, 0xa29f4559,
-  0x5779d65b, 0xa28e1687,
-  0x57677b9d, 0xa27ceb4f, 0x57551d80, 0xa26bc3b2, 0x5742bc06, 0xa25a9fb1,
-  0x5730572e, 0xa2497f4c,
-  0x571deefa, 0xa2386284, 0x570b8369, 0xa2274959, 0x56f9147e, 0xa21633cd,
-  0x56e6a239, 0xa20521e0,
-  0x56d42c99, 0xa1f41392, 0x56c1b3a1, 0xa1e308e4, 0x56af3750, 0xa1d201d7,
-  0x569cb7a8, 0xa1c0fe6c,
-  0x568a34a9, 0xa1affea3, 0x5677ae54, 0xa19f027c, 0x566524aa, 0xa18e09fa,
-  0x565297ab, 0xa17d151b,
-  0x56400758, 0xa16c23e1, 0x562d73b2, 0xa15b364d, 0x561adcb9, 0xa14a4c5e,
-  0x5608426e, 0xa1396617,
-  0x55f5a4d2, 0xa1288376, 0x55e303e6, 0xa117a47e, 0x55d05faa, 0xa106c92f,
-  0x55bdb81f, 0xa0f5f189,
-  0x55ab0d46, 0xa0e51d8c, 0x55985f20, 0xa0d44d3b, 0x5585adad, 0xa0c38095,
-  0x5572f8ed, 0xa0b2b79b,
-  0x556040e2, 0xa0a1f24d, 0x554d858d, 0xa09130ad, 0x553ac6ee, 0xa08072ba,
-  0x55280505, 0xa06fb876,
-  0x55153fd4, 0xa05f01e1, 0x5502775c, 0xa04e4efc, 0x54efab9c, 0xa03d9fc8,
-  0x54dcdc96, 0xa02cf444,
-  0x54ca0a4b, 0xa01c4c73, 0x54b734ba, 0xa00ba853, 0x54a45be6, 0x9ffb07e7,
-  0x54917fce, 0x9fea6b2f,
-  0x547ea073, 0x9fd9d22a, 0x546bbdd7, 0x9fc93cdb, 0x5458d7f9, 0x9fb8ab41,
-  0x5445eedb, 0x9fa81d5e,
-  0x5433027d, 0x9f979331, 0x542012e1, 0x9f870cbc, 0x540d2005, 0x9f7689ff,
-  0x53fa29ed, 0x9f660afb,
-  0x53e73097, 0x9f558fb0, 0x53d43406, 0x9f45181f, 0x53c13439, 0x9f34a449,
-  0x53ae3131, 0x9f24342f,
-  0x539b2af0, 0x9f13c7d0, 0x53882175, 0x9f035f2e, 0x537514c2, 0x9ef2fa49,
-  0x536204d7, 0x9ee29922,
-  0x534ef1b5, 0x9ed23bb9, 0x533bdb5d, 0x9ec1e210, 0x5328c1d0, 0x9eb18c26,
-  0x5315a50e, 0x9ea139fd,
-  0x53028518, 0x9e90eb94, 0x52ef61ee, 0x9e80a0ee, 0x52dc3b92, 0x9e705a09,
-  0x52c91204, 0x9e6016e8,
-  0x52b5e546, 0x9e4fd78a, 0x52a2b556, 0x9e3f9bf0, 0x528f8238, 0x9e2f641b,
-  0x527c4bea, 0x9e1f300b,
-  0x5269126e, 0x9e0effc1, 0x5255d5c5, 0x9dfed33e, 0x524295f0, 0x9deeaa82,
-  0x522f52ee, 0x9dde858e,
-  0x521c0cc2, 0x9dce6463, 0x5208c36a, 0x9dbe4701, 0x51f576ea, 0x9dae2d68,
-  0x51e22740, 0x9d9e179a,
-  0x51ced46e, 0x9d8e0597, 0x51bb7e75, 0x9d7df75f, 0x51a82555, 0x9d6decf4,
-  0x5194c910, 0x9d5de656,
-  0x518169a5, 0x9d4de385, 0x516e0715, 0x9d3de482, 0x515aa162, 0x9d2de94d,
-  0x5147388c, 0x9d1df1e9,
-  0x5133cc94, 0x9d0dfe54, 0x51205d7b, 0x9cfe0e8f, 0x510ceb40, 0x9cee229c,
-  0x50f975e6, 0x9cde3a7b,
-  0x50e5fd6d, 0x9cce562c, 0x50d281d5, 0x9cbe75b0, 0x50bf031f, 0x9cae9907,
-  0x50ab814d, 0x9c9ec033,
-  0x5097fc5e, 0x9c8eeb34, 0x50847454, 0x9c7f1a0a, 0x5070e92f, 0x9c6f4cb6,
-  0x505d5af1, 0x9c5f8339,
-  0x5049c999, 0x9c4fbd93, 0x50363529, 0x9c3ffbc5, 0x50229da1, 0x9c303dcf,
-  0x500f0302, 0x9c2083b3,
-  0x4ffb654d, 0x9c10cd70, 0x4fe7c483, 0x9c011b08, 0x4fd420a4, 0x9bf16c7a,
-  0x4fc079b1, 0x9be1c1c8,
-  0x4faccfab, 0x9bd21af3, 0x4f992293, 0x9bc277fa, 0x4f857269, 0x9bb2d8de,
-  0x4f71bf2e, 0x9ba33da0,
-  0x4f5e08e3, 0x9b93a641, 0x4f4a4f89, 0x9b8412c1, 0x4f369320, 0x9b748320,
-  0x4f22d3aa, 0x9b64f760,
-  0x4f0f1126, 0x9b556f81, 0x4efb4b96, 0x9b45eb83, 0x4ee782fb, 0x9b366b68,
-  0x4ed3b755, 0x9b26ef2f,
-  0x4ebfe8a5, 0x9b1776da, 0x4eac16eb, 0x9b080268, 0x4e984229, 0x9af891db,
-  0x4e846a60, 0x9ae92533,
-  0x4e708f8f, 0x9ad9bc71, 0x4e5cb1b9, 0x9aca5795, 0x4e48d0dd, 0x9abaf6a1,
-  0x4e34ecfc, 0x9aab9993,
-  0x4e210617, 0x9a9c406e, 0x4e0d1c30, 0x9a8ceb31, 0x4df92f46, 0x9a7d99de,
-  0x4de53f5a, 0x9a6e4c74,
-  0x4dd14c6e, 0x9a5f02f5, 0x4dbd5682, 0x9a4fbd61, 0x4da95d96, 0x9a407bb9,
-  0x4d9561ac, 0x9a313dfc,
-  0x4d8162c4, 0x9a22042d, 0x4d6d60df, 0x9a12ce4b, 0x4d595bfe, 0x9a039c57,
-  0x4d455422, 0x99f46e51,
-  0x4d31494b, 0x99e5443b, 0x4d1d3b7a, 0x99d61e14, 0x4d092ab0, 0x99c6fbde,
-  0x4cf516ee, 0x99b7dd99,
-  0x4ce10034, 0x99a8c345, 0x4ccce684, 0x9999ace3, 0x4cb8c9dd, 0x998a9a74,
-  0x4ca4aa41, 0x997b8bf8,
-  0x4c9087b1, 0x996c816f, 0x4c7c622d, 0x995d7adc, 0x4c6839b7, 0x994e783d,
-  0x4c540e4e, 0x993f7993,
-  0x4c3fdff4, 0x99307ee0, 0x4c2baea9, 0x99218824, 0x4c177a6e, 0x9912955f,
-  0x4c034345, 0x9903a691,
-  0x4bef092d, 0x98f4bbbc, 0x4bdacc28, 0x98e5d4e0, 0x4bc68c36, 0x98d6f1fe,
-  0x4bb24958, 0x98c81316,
-  0x4b9e0390, 0x98b93828, 0x4b89badd, 0x98aa6136, 0x4b756f40, 0x989b8e40,
-  0x4b6120bb, 0x988cbf46,
-  0x4b4ccf4d, 0x987df449, 0x4b387af9, 0x986f2d4a, 0x4b2423be, 0x98606a49,
-  0x4b0fc99d, 0x9851ab46,
-  0x4afb6c98, 0x9842f043, 0x4ae70caf, 0x98343940, 0x4ad2a9e2, 0x9825863d,
-  0x4abe4433, 0x9816d73b,
-  0x4aa9dba2, 0x98082c3b, 0x4a957030, 0x97f9853d, 0x4a8101de, 0x97eae242,
-  0x4a6c90ad, 0x97dc4349,
-  0x4a581c9e, 0x97cda855, 0x4a43a5b0, 0x97bf1165, 0x4a2f2be6, 0x97b07e7a,
-  0x4a1aaf3f, 0x97a1ef94,
-  0x4a062fbd, 0x979364b5, 0x49f1ad61, 0x9784dddc, 0x49dd282a, 0x97765b0a,
-  0x49c8a01b, 0x9767dc41,
-  0x49b41533, 0x9759617f, 0x499f8774, 0x974aeac6, 0x498af6df, 0x973c7817,
-  0x49766373, 0x972e0971,
-  0x4961cd33, 0x971f9ed7, 0x494d341e, 0x97113847, 0x49389836, 0x9702d5c3,
-  0x4923f97b, 0x96f4774b,
-  0x490f57ee, 0x96e61ce0, 0x48fab391, 0x96d7c682, 0x48e60c62, 0x96c97432,
-  0x48d16265, 0x96bb25f0,
-  0x48bcb599, 0x96acdbbe, 0x48a805ff, 0x969e959b, 0x48935397, 0x96905388,
-  0x487e9e64, 0x96821585,
-  0x4869e665, 0x9673db94, 0x48552b9b, 0x9665a5b4, 0x48406e08, 0x965773e7,
-  0x482badab, 0x9649462d,
-  0x4816ea86, 0x963b1c86, 0x48022499, 0x962cf6f2, 0x47ed5be6, 0x961ed574,
-  0x47d8906d, 0x9610b80a,
-  0x47c3c22f, 0x96029eb6, 0x47aef12c, 0x95f48977, 0x479a1d67, 0x95e67850,
-  0x478546de, 0x95d86b3f,
-  0x47706d93, 0x95ca6247, 0x475b9188, 0x95bc5d66, 0x4746b2bc, 0x95ae5c9f,
-  0x4731d131, 0x95a05ff0,
-  0x471cece7, 0x9592675c, 0x470805df, 0x958472e2, 0x46f31c1a, 0x95768283,
-  0x46de2f99, 0x9568963f,
-  0x46c9405c, 0x955aae17, 0x46b44e65, 0x954cca0c, 0x469f59b4, 0x953eea1e,
-  0x468a624a, 0x95310e4e,
-  0x46756828, 0x9523369c, 0x46606b4e, 0x95156308, 0x464b6bbe, 0x95079394,
-  0x46366978, 0x94f9c83f,
-  0x4621647d, 0x94ec010b, 0x460c5cce, 0x94de3df8, 0x45f7526b, 0x94d07f05,
-  0x45e24556, 0x94c2c435,
-  0x45cd358f, 0x94b50d87, 0x45b82318, 0x94a75afd, 0x45a30df0, 0x9499ac95,
-  0x458df619, 0x948c0252,
-  0x4578db93, 0x947e5c33, 0x4563be60, 0x9470ba39, 0x454e9e80, 0x94631c65,
-  0x45397bf4, 0x945582b7,
-  0x452456bd, 0x9447ed2f, 0x450f2edb, 0x943a5bcf, 0x44fa0450, 0x942cce96,
-  0x44e4d71c, 0x941f4585,
-  0x44cfa740, 0x9411c09e, 0x44ba74bd, 0x94043fdf, 0x44a53f93, 0x93f6c34a,
-  0x449007c4, 0x93e94adf,
-  0x447acd50, 0x93dbd6a0, 0x44659039, 0x93ce668b, 0x4450507e, 0x93c0faa3,
-  0x443b0e21, 0x93b392e6,
-  0x4425c923, 0x93a62f57, 0x44108184, 0x9398cff5, 0x43fb3746, 0x938b74c1,
-  0x43e5ea68, 0x937e1dbb,
-  0x43d09aed, 0x9370cae4, 0x43bb48d4, 0x93637c3d, 0x43a5f41e, 0x935631c5,
-  0x43909ccd, 0x9348eb7e,
-  0x437b42e1, 0x933ba968, 0x4365e65b, 0x932e6b84, 0x4350873c, 0x932131d1,
-  0x433b2585, 0x9313fc51,
-  0x4325c135, 0x9306cb04, 0x43105a50, 0x92f99deb, 0x42faf0d4, 0x92ec7505,
-  0x42e584c3, 0x92df5054,
-  0x42d0161e, 0x92d22fd9, 0x42baa4e6, 0x92c51392, 0x42a5311b, 0x92b7fb82,
-  0x428fbabe, 0x92aae7a8,
-  0x427a41d0, 0x929dd806, 0x4264c653, 0x9290cc9b, 0x424f4845, 0x9283c568,
-  0x4239c7aa, 0x9276c26d,
-  0x42244481, 0x9269c3ac, 0x420ebecb, 0x925cc924, 0x41f93689, 0x924fd2d7,
-  0x41e3abbc, 0x9242e0c4,
-  0x41ce1e65, 0x9235f2ec, 0x41b88e84, 0x9229094f, 0x41a2fc1a, 0x921c23ef,
-  0x418d6729, 0x920f42cb,
-  0x4177cfb1, 0x920265e4, 0x416235b2, 0x91f58d3b, 0x414c992f, 0x91e8b8d0,
-  0x4136fa27, 0x91dbe8a4,
-  0x4121589b, 0x91cf1cb6, 0x410bb48c, 0x91c25508, 0x40f60dfb, 0x91b5919a,
-  0x40e064ea, 0x91a8d26d,
-  0x40cab958, 0x919c1781, 0x40b50b46, 0x918f60d6, 0x409f5ab6, 0x9182ae6d,
-  0x4089a7a8, 0x91760047,
-  0x4073f21d, 0x91695663, 0x405e3a16, 0x915cb0c3, 0x40487f94, 0x91500f67,
-  0x4032c297, 0x91437250,
-  0x401d0321, 0x9136d97d, 0x40074132, 0x912a44f0, 0x3ff17cca, 0x911db4a9,
-  0x3fdbb5ec, 0x911128a8,
-  0x3fc5ec98, 0x9104a0ee, 0x3fb020ce, 0x90f81d7b, 0x3f9a5290, 0x90eb9e50,
-  0x3f8481dd, 0x90df236e,
-  0x3f6eaeb8, 0x90d2acd4, 0x3f58d921, 0x90c63a83, 0x3f430119, 0x90b9cc7d,
-  0x3f2d26a0, 0x90ad62c0,
-  0x3f1749b8, 0x90a0fd4e, 0x3f016a61, 0x90949c28, 0x3eeb889c, 0x90883f4d,
-  0x3ed5a46b, 0x907be6be,
-  0x3ebfbdcd, 0x906f927c, 0x3ea9d4c3, 0x90634287, 0x3e93e950, 0x9056f6df,
-  0x3e7dfb73, 0x904aaf86,
-  0x3e680b2c, 0x903e6c7b, 0x3e52187f, 0x90322dbf, 0x3e3c2369, 0x9025f352,
-  0x3e262bee, 0x9019bd36,
-  0x3e10320d, 0x900d8b69, 0x3dfa35c8, 0x90015dee, 0x3de4371f, 0x8ff534c4,
-  0x3dce3614, 0x8fe90fec,
-  0x3db832a6, 0x8fdcef66, 0x3da22cd7, 0x8fd0d333, 0x3d8c24a8, 0x8fc4bb53,
-  0x3d761a19, 0x8fb8a7c7,
-  0x3d600d2c, 0x8fac988f, 0x3d49fde1, 0x8fa08dab, 0x3d33ec39, 0x8f94871d,
-  0x3d1dd835, 0x8f8884e4,
-  0x3d07c1d6, 0x8f7c8701, 0x3cf1a91c, 0x8f708d75, 0x3cdb8e09, 0x8f649840,
-  0x3cc5709e, 0x8f58a761,
-  0x3caf50da, 0x8f4cbadb, 0x3c992ec0, 0x8f40d2ad, 0x3c830a50, 0x8f34eed8,
-  0x3c6ce38a, 0x8f290f5c,
-  0x3c56ba70, 0x8f1d343a, 0x3c408f03, 0x8f115d72, 0x3c2a6142, 0x8f058b04,
-  0x3c143130, 0x8ef9bcf2,
-  0x3bfdfecd, 0x8eedf33b, 0x3be7ca1a, 0x8ee22de0, 0x3bd19318, 0x8ed66ce1,
-  0x3bbb59c7, 0x8ecab040,
-  0x3ba51e29, 0x8ebef7fb, 0x3b8ee03e, 0x8eb34415, 0x3b78a007, 0x8ea7948c,
-  0x3b625d86, 0x8e9be963,
-  0x3b4c18ba, 0x8e904298, 0x3b35d1a5, 0x8e84a02d, 0x3b1f8848, 0x8e790222,
-  0x3b093ca3, 0x8e6d6877,
-  0x3af2eeb7, 0x8e61d32e, 0x3adc9e86, 0x8e564246, 0x3ac64c0f, 0x8e4ab5bf,
-  0x3aaff755, 0x8e3f2d9b,
-  0x3a99a057, 0x8e33a9da, 0x3a834717, 0x8e282a7b, 0x3a6ceb96, 0x8e1caf80,
-  0x3a568dd4, 0x8e1138ea,
-  0x3a402dd2, 0x8e05c6b7, 0x3a29cb91, 0x8dfa58ea, 0x3a136712, 0x8deeef82,
-  0x39fd0056, 0x8de38a80,
-  0x39e6975e, 0x8dd829e4, 0x39d02c2a, 0x8dcccdaf, 0x39b9bebc, 0x8dc175e0,
-  0x39a34f13, 0x8db6227a,
-  0x398cdd32, 0x8daad37b, 0x39766919, 0x8d9f88e5, 0x395ff2c9, 0x8d9442b8,
-  0x39497a43, 0x8d8900f3,
-  0x3932ff87, 0x8d7dc399, 0x391c8297, 0x8d728aa9, 0x39060373, 0x8d675623,
-  0x38ef821c, 0x8d5c2609,
-  0x38d8fe93, 0x8d50fa59, 0x38c278d9, 0x8d45d316, 0x38abf0ef, 0x8d3ab03f,
-  0x389566d6, 0x8d2f91d5,
-  0x387eda8e, 0x8d2477d8, 0x38684c19, 0x8d196249, 0x3851bb77, 0x8d0e5127,
-  0x383b28a9, 0x8d034474,
-  0x382493b0, 0x8cf83c30, 0x380dfc8d, 0x8ced385b, 0x37f76341, 0x8ce238f6,
-  0x37e0c7cc, 0x8cd73e01,
-  0x37ca2a30, 0x8ccc477d, 0x37b38a6d, 0x8cc1556a, 0x379ce885, 0x8cb667c8,
-  0x37864477, 0x8cab7e98,
-  0x376f9e46, 0x8ca099da, 0x3758f5f2, 0x8c95b98f, 0x37424b7b, 0x8c8addb7,
-  0x372b9ee3, 0x8c800652,
-  0x3714f02a, 0x8c753362, 0x36fe3f52, 0x8c6a64e5, 0x36e78c5b, 0x8c5f9ade,
-  0x36d0d746, 0x8c54d54c,
-  0x36ba2014, 0x8c4a142f, 0x36a366c6, 0x8c3f5788, 0x368cab5c, 0x8c349f58,
-  0x3675edd9, 0x8c29eb9f,
-  0x365f2e3b, 0x8c1f3c5d, 0x36486c86, 0x8c149192, 0x3631a8b8, 0x8c09eb40,
-  0x361ae2d3, 0x8bff4966,
-  0x36041ad9, 0x8bf4ac05, 0x35ed50c9, 0x8bea131e, 0x35d684a6, 0x8bdf7eb0,
-  0x35bfb66e, 0x8bd4eebc,
-  0x35a8e625, 0x8bca6343, 0x359213c9, 0x8bbfdc44, 0x357b3f5d, 0x8bb559c1,
-  0x356468e2, 0x8baadbba,
-  0x354d9057, 0x8ba0622f, 0x3536b5be, 0x8b95ed21, 0x351fd918, 0x8b8b7c8f,
-  0x3508fa66, 0x8b81107b,
-  0x34f219a8, 0x8b76a8e4, 0x34db36df, 0x8b6c45cc, 0x34c4520d, 0x8b61e733,
-  0x34ad6b32, 0x8b578d18,
-  0x34968250, 0x8b4d377c, 0x347f9766, 0x8b42e661, 0x3468aa76, 0x8b3899c6,
-  0x3451bb81, 0x8b2e51ab,
-  0x343aca87, 0x8b240e11, 0x3423d78a, 0x8b19cef8, 0x340ce28b, 0x8b0f9462,
-  0x33f5eb89, 0x8b055e4d,
-  0x33def287, 0x8afb2cbb, 0x33c7f785, 0x8af0ffac, 0x33b0fa84, 0x8ae6d720,
-  0x3399fb85, 0x8adcb318,
-  0x3382fa88, 0x8ad29394, 0x336bf78f, 0x8ac87894, 0x3354f29b, 0x8abe6219,
-  0x333debab, 0x8ab45024,
-  0x3326e2c3, 0x8aaa42b4, 0x330fd7e1, 0x8aa039cb, 0x32f8cb07, 0x8a963567,
-  0x32e1bc36, 0x8a8c358b,
-  0x32caab6f, 0x8a823a36, 0x32b398b3, 0x8a784368, 0x329c8402, 0x8a6e5123,
-  0x32856d5e, 0x8a646365,
-  0x326e54c7, 0x8a5a7a31, 0x32573a3f, 0x8a509585, 0x32401dc6, 0x8a46b564,
-  0x3228ff5c, 0x8a3cd9cc,
-  0x3211df04, 0x8a3302be, 0x31fabcbd, 0x8a29303b, 0x31e39889, 0x8a1f6243,
-  0x31cc7269, 0x8a1598d6,
-  0x31b54a5e, 0x8a0bd3f5, 0x319e2067, 0x8a0213a0, 0x3186f487, 0x89f857d8,
-  0x316fc6be, 0x89eea09d,
-  0x3158970e, 0x89e4edef, 0x31416576, 0x89db3fcf, 0x312a31f8, 0x89d1963c,
-  0x3112fc95, 0x89c7f138,
-  0x30fbc54d, 0x89be50c3, 0x30e48c22, 0x89b4b4dd, 0x30cd5115, 0x89ab1d87,
-  0x30b61426, 0x89a18ac0,
-  0x309ed556, 0x8997fc8a, 0x308794a6, 0x898e72e4, 0x30705217, 0x8984edcf,
-  0x30590dab, 0x897b6d4c,
-  0x3041c761, 0x8971f15a, 0x302a7f3a, 0x896879fb, 0x30133539, 0x895f072e,
-  0x2ffbe95d, 0x895598f3,
-  0x2fe49ba7, 0x894c2f4c, 0x2fcd4c19, 0x8942ca39, 0x2fb5fab2, 0x893969b9,
-  0x2f9ea775, 0x89300dce,
-  0x2f875262, 0x8926b677, 0x2f6ffb7a, 0x891d63b5, 0x2f58a2be, 0x89141589,
-  0x2f41482e, 0x890acbf2,
-  0x2f29ebcc, 0x890186f2, 0x2f128d99, 0x88f84687, 0x2efb2d95, 0x88ef0ab4,
-  0x2ee3cbc1, 0x88e5d378,
-  0x2ecc681e, 0x88dca0d3, 0x2eb502ae, 0x88d372c6, 0x2e9d9b70, 0x88ca4951,
-  0x2e863267, 0x88c12475,
-  0x2e6ec792, 0x88b80432, 0x2e575af3, 0x88aee888, 0x2e3fec8b, 0x88a5d177,
-  0x2e287c5a, 0x889cbf01,
-  0x2e110a62, 0x8893b125, 0x2df996a3, 0x888aa7e3, 0x2de2211e, 0x8881a33d,
-  0x2dcaa9d5, 0x8878a332,
-  0x2db330c7, 0x886fa7c2, 0x2d9bb5f6, 0x8866b0ef, 0x2d843964, 0x885dbeb8,
-  0x2d6cbb10, 0x8854d11e,
-  0x2d553afc, 0x884be821, 0x2d3db928, 0x884303c1, 0x2d263596, 0x883a23ff,
-  0x2d0eb046, 0x883148db,
-  0x2cf72939, 0x88287256, 0x2cdfa071, 0x881fa06f, 0x2cc815ee, 0x8816d327,
-  0x2cb089b1, 0x880e0a7f,
-  0x2c98fbba, 0x88054677, 0x2c816c0c, 0x87fc870f, 0x2c69daa6, 0x87f3cc48,
-  0x2c52478a, 0x87eb1621,
-  0x2c3ab2b9, 0x87e2649b, 0x2c231c33, 0x87d9b7b7, 0x2c0b83fa, 0x87d10f75,
-  0x2bf3ea0d, 0x87c86bd5,
-  0x2bdc4e6f, 0x87bfccd7, 0x2bc4b120, 0x87b7327d, 0x2bad1221, 0x87ae9cc5,
-  0x2b957173, 0x87a60bb1,
-  0x2b7dcf17, 0x879d7f41, 0x2b662b0e, 0x8794f774, 0x2b4e8558, 0x878c744d,
-  0x2b36ddf7, 0x8783f5ca,
-  0x2b1f34eb, 0x877b7bec, 0x2b078a36, 0x877306b4, 0x2aefddd8, 0x876a9621,
-  0x2ad82fd2, 0x87622a35,
-  0x2ac08026, 0x8759c2ef, 0x2aa8ced3, 0x87516050, 0x2a911bdc, 0x87490258,
-  0x2a796740, 0x8740a907,
-  0x2a61b101, 0x8738545e, 0x2a49f920, 0x8730045d, 0x2a323f9e, 0x8727b905,
-  0x2a1a847b, 0x871f7255,
-  0x2a02c7b8, 0x8717304e, 0x29eb0957, 0x870ef2f1, 0x29d34958, 0x8706ba3d,
-  0x29bb87bc, 0x86fe8633,
-  0x29a3c485, 0x86f656d3, 0x298bffb2, 0x86ee2c1e, 0x29743946, 0x86e60614,
-  0x295c7140, 0x86dde4b5,
-  0x2944a7a2, 0x86d5c802, 0x292cdc6d, 0x86cdaffa, 0x29150fa1, 0x86c59c9f,
-  0x28fd4140, 0x86bd8df0,
-  0x28e5714b, 0x86b583ee, 0x28cd9fc1, 0x86ad7e99, 0x28b5cca5, 0x86a57df2,
-  0x289df7f8, 0x869d81f8,
-  0x288621b9, 0x86958aac, 0x286e49ea, 0x868d980e, 0x2856708d, 0x8685aa20,
-  0x283e95a1, 0x867dc0e0,
-  0x2826b928, 0x8675dc4f, 0x280edb23, 0x866dfc6e, 0x27f6fb92, 0x8666213c,
-  0x27df1a77, 0x865e4abb,
-  0x27c737d3, 0x865678eb, 0x27af53a6, 0x864eabcb, 0x27976df1, 0x8646e35c,
-  0x277f86b5, 0x863f1f9e,
-  0x27679df4, 0x86376092, 0x274fb3ae, 0x862fa638, 0x2737c7e3, 0x8627f091,
-  0x271fda96, 0x86203f9c,
-  0x2707ebc7, 0x86189359, 0x26effb76, 0x8610ebca, 0x26d809a5, 0x860948ef,
-  0x26c01655, 0x8601aac7,
-  0x26a82186, 0x85fa1153, 0x26902b39, 0x85f27c93, 0x26783370, 0x85eaec88,
-  0x26603a2c, 0x85e36132,
-  0x26483f6c, 0x85dbda91, 0x26304333, 0x85d458a6, 0x26184581, 0x85ccdb70,
-  0x26004657, 0x85c562f1,
-  0x25e845b6, 0x85bdef28, 0x25d0439f, 0x85b68015, 0x25b84012, 0x85af15b9,
-  0x25a03b11, 0x85a7b015,
-  0x2588349d, 0x85a04f28, 0x25702cb7, 0x8598f2f3, 0x2558235f, 0x85919b76,
-  0x25401896, 0x858a48b1,
-  0x25280c5e, 0x8582faa5, 0x250ffeb7, 0x857bb152, 0x24f7efa2, 0x85746cb8,
-  0x24dfdf20, 0x856d2cd7,
-  0x24c7cd33, 0x8565f1b0, 0x24afb9da, 0x855ebb44, 0x2497a517, 0x85578991,
-  0x247f8eec, 0x85505c99,
-  0x24677758, 0x8549345c, 0x244f5e5c, 0x854210db, 0x243743fa, 0x853af214,
-  0x241f2833, 0x8533d809,
-  0x24070b08, 0x852cc2bb, 0x23eeec78, 0x8525b228, 0x23d6cc87, 0x851ea652,
-  0x23beab33, 0x85179f39,
-  0x23a6887f, 0x85109cdd, 0x238e646a, 0x85099f3e, 0x23763ef7, 0x8502a65c,
-  0x235e1826, 0x84fbb239,
-  0x2345eff8, 0x84f4c2d4, 0x232dc66d, 0x84edd82d, 0x23159b88, 0x84e6f244,
-  0x22fd6f48, 0x84e0111b,
-  0x22e541af, 0x84d934b1, 0x22cd12bd, 0x84d25d06, 0x22b4e274, 0x84cb8a1b,
-  0x229cb0d5, 0x84c4bbf0,
-  0x22847de0, 0x84bdf286, 0x226c4996, 0x84b72ddb, 0x225413f8, 0x84b06df2,
-  0x223bdd08, 0x84a9b2ca,
-  0x2223a4c5, 0x84a2fc62, 0x220b6b32, 0x849c4abd, 0x21f3304f, 0x84959dd9,
-  0x21daf41d, 0x848ef5b7,
-  0x21c2b69c, 0x84885258, 0x21aa77cf, 0x8481b3bb, 0x219237b5, 0x847b19e1,
-  0x2179f64f, 0x847484ca,
-  0x2161b3a0, 0x846df477, 0x21496fa7, 0x846768e7, 0x21312a65, 0x8460e21a,
-  0x2118e3dc, 0x845a6012,
-  0x21009c0c, 0x8453e2cf, 0x20e852f6, 0x844d6a50, 0x20d0089c, 0x8446f695,
-  0x20b7bcfe, 0x844087a0,
-  0x209f701c, 0x843a1d70, 0x208721f9, 0x8433b806, 0x206ed295, 0x842d5762,
-  0x205681f1, 0x8426fb84,
-  0x203e300d, 0x8420a46c, 0x2025dcec, 0x841a521a, 0x200d888d, 0x84140490,
-  0x1ff532f2, 0x840dbbcc,
-  0x1fdcdc1b, 0x840777d0, 0x1fc4840a, 0x8401389b, 0x1fac2abf, 0x83fafe2e,
-  0x1f93d03c, 0x83f4c889,
-  0x1f7b7481, 0x83ee97ad, 0x1f63178f, 0x83e86b99, 0x1f4ab968, 0x83e2444d,
-  0x1f325a0b, 0x83dc21cb,
-  0x1f19f97b, 0x83d60412, 0x1f0197b8, 0x83cfeb22, 0x1ee934c3, 0x83c9d6fc,
-  0x1ed0d09d, 0x83c3c7a0,
-  0x1eb86b46, 0x83bdbd0e, 0x1ea004c1, 0x83b7b746, 0x1e879d0d, 0x83b1b649,
-  0x1e6f342c, 0x83abba17,
-  0x1e56ca1e, 0x83a5c2b0, 0x1e3e5ee5, 0x839fd014, 0x1e25f282, 0x8399e244,
-  0x1e0d84f5, 0x8393f940,
-  0x1df5163f, 0x838e1507, 0x1ddca662, 0x8388359b, 0x1dc4355e, 0x83825afb,
-  0x1dabc334, 0x837c8528,
-  0x1d934fe5, 0x8376b422, 0x1d7adb73, 0x8370e7e9, 0x1d6265dd, 0x836b207d,
-  0x1d49ef26, 0x83655ddf,
-  0x1d31774d, 0x835fa00f, 0x1d18fe54, 0x8359e70d, 0x1d00843d, 0x835432d8,
-  0x1ce80906, 0x834e8373,
-  0x1ccf8cb3, 0x8348d8dc, 0x1cb70f43, 0x83433314, 0x1c9e90b8, 0x833d921b,
-  0x1c861113, 0x8337f5f1,
-  0x1c6d9053, 0x83325e97, 0x1c550e7c, 0x832ccc0d, 0x1c3c8b8c, 0x83273e52,
-  0x1c240786, 0x8321b568,
-  0x1c0b826a, 0x831c314e, 0x1bf2fc3a, 0x8316b205, 0x1bda74f6, 0x8311378d,
-  0x1bc1ec9e, 0x830bc1e6,
-  0x1ba96335, 0x83065110, 0x1b90d8bb, 0x8300e50b, 0x1b784d30, 0x82fb7dd8,
-  0x1b5fc097, 0x82f61b77,
-  0x1b4732ef, 0x82f0bde8, 0x1b2ea43a, 0x82eb652b, 0x1b161479, 0x82e61141,
-  0x1afd83ad, 0x82e0c22a,
-  0x1ae4f1d6, 0x82db77e5, 0x1acc5ef6, 0x82d63274, 0x1ab3cb0d, 0x82d0f1d5,
-  0x1a9b361d, 0x82cbb60b,
-  0x1a82a026, 0x82c67f14, 0x1a6a0929, 0x82c14cf1, 0x1a517128, 0x82bc1fa2,
-  0x1a38d823, 0x82b6f727,
-  0x1a203e1b, 0x82b1d381, 0x1a07a311, 0x82acb4b0, 0x19ef0707, 0x82a79ab3,
-  0x19d669fc, 0x82a2858c,
-  0x19bdcbf3, 0x829d753a, 0x19a52ceb, 0x829869be, 0x198c8ce7, 0x82936317,
-  0x1973ebe6, 0x828e6146,
-  0x195b49ea, 0x8289644b, 0x1942a6f3, 0x82846c26, 0x192a0304, 0x827f78d8,
-  0x19115e1c, 0x827a8a61,
-  0x18f8b83c, 0x8275a0c0, 0x18e01167, 0x8270bbf7, 0x18c7699b, 0x826bdc04,
-  0x18aec0db, 0x826700e9,
-  0x18961728, 0x82622aa6, 0x187d6c82, 0x825d593a, 0x1864c0ea, 0x82588ca7,
-  0x184c1461, 0x8253c4eb,
-  0x183366e9, 0x824f0208, 0x181ab881, 0x824a43fe, 0x1802092c, 0x82458acc,
-  0x17e958ea, 0x8240d673,
-  0x17d0a7bc, 0x823c26f3, 0x17b7f5a3, 0x82377c4c, 0x179f429f, 0x8232d67f,
-  0x17868eb3, 0x822e358b,
-  0x176dd9de, 0x82299971, 0x17552422, 0x82250232, 0x173c6d80, 0x82206fcc,
-  0x1723b5f9, 0x821be240,
-  0x170afd8d, 0x82175990, 0x16f2443e, 0x8212d5b9, 0x16d98a0c, 0x820e56be,
-  0x16c0cef9, 0x8209dc9e,
-  0x16a81305, 0x82056758, 0x168f5632, 0x8200f6ef, 0x1676987f, 0x81fc8b60,
-  0x165dd9f0, 0x81f824ae,
-  0x16451a83, 0x81f3c2d7, 0x162c5a3b, 0x81ef65dc, 0x16139918, 0x81eb0dbe,
-  0x15fad71b, 0x81e6ba7c,
-  0x15e21445, 0x81e26c16, 0x15c95097, 0x81de228d, 0x15b08c12, 0x81d9dde1,
-  0x1597c6b7, 0x81d59e13,
-  0x157f0086, 0x81d16321, 0x15663982, 0x81cd2d0c, 0x154d71aa, 0x81c8fbd6,
-  0x1534a901, 0x81c4cf7d,
-  0x151bdf86, 0x81c0a801, 0x1503153a, 0x81bc8564, 0x14ea4a1f, 0x81b867a5,
-  0x14d17e36, 0x81b44ec4,
-  0x14b8b17f, 0x81b03ac2, 0x149fe3fc, 0x81ac2b9e, 0x148715ae, 0x81a82159,
-  0x146e4694, 0x81a41bf4,
-  0x145576b1, 0x81a01b6d, 0x143ca605, 0x819c1fc5, 0x1423d492, 0x819828fd,
-  0x140b0258, 0x81943715,
-  0x13f22f58, 0x81904a0c, 0x13d95b93, 0x818c61e3, 0x13c0870a, 0x81887e9a,
-  0x13a7b1bf, 0x8184a032,
-  0x138edbb1, 0x8180c6a9, 0x137604e2, 0x817cf201, 0x135d2d53, 0x8179223a,
-  0x13445505, 0x81755754,
-  0x132b7bf9, 0x8171914e, 0x1312a230, 0x816dd02a, 0x12f9c7aa, 0x816a13e6,
-  0x12e0ec6a, 0x81665c84,
-  0x12c8106f, 0x8162aa04, 0x12af33ba, 0x815efc65, 0x1296564d, 0x815b53a8,
-  0x127d7829, 0x8157afcd,
-  0x1264994e, 0x815410d4, 0x124bb9be, 0x815076bd, 0x1232d979, 0x814ce188,
-  0x1219f880, 0x81495136,
-  0x120116d5, 0x8145c5c7, 0x11e83478, 0x81423f3a, 0x11cf516a, 0x813ebd90,
-  0x11b66dad, 0x813b40ca,
-  0x119d8941, 0x8137c8e6, 0x1184a427, 0x813455e6, 0x116bbe60, 0x8130e7c9,
-  0x1152d7ed, 0x812d7e8f,
-  0x1139f0cf, 0x812a1a3a, 0x11210907, 0x8126bac8, 0x11082096, 0x8123603a,
-  0x10ef377d, 0x81200a90,
-  0x10d64dbd, 0x811cb9ca, 0x10bd6356, 0x81196de9, 0x10a4784b, 0x811626ec,
-  0x108b8c9b, 0x8112e4d4,
-  0x1072a048, 0x810fa7a0, 0x1059b352, 0x810c6f52, 0x1040c5bb, 0x81093be8,
-  0x1027d784, 0x81060d63,
-  0x100ee8ad, 0x8102e3c4, 0xff5f938, 0x80ffbf0a, 0xfdd0926, 0x80fc9f35,
-  0xfc41876, 0x80f98446,
-  0xfab272b, 0x80f66e3c, 0xf923546, 0x80f35d19, 0xf7942c7, 0x80f050db,
-  0xf604faf, 0x80ed4984,
-  0xf475bff, 0x80ea4712, 0xf2e67b8, 0x80e74987, 0xf1572dc, 0x80e450e2,
-  0xefc7d6b, 0x80e15d24,
-  0xee38766, 0x80de6e4c, 0xeca90ce, 0x80db845b, 0xeb199a4, 0x80d89f51,
-  0xe98a1e9, 0x80d5bf2e,
-  0xe7fa99e, 0x80d2e3f2, 0xe66b0c3, 0x80d00d9d, 0xe4db75b, 0x80cd3c2f,
-  0xe34bd66, 0x80ca6fa9,
-  0xe1bc2e4, 0x80c7a80a, 0xe02c7d7, 0x80c4e553, 0xde9cc40, 0x80c22784,
-  0xdd0d01f, 0x80bf6e9c,
-  0xdb7d376, 0x80bcba9d, 0xd9ed646, 0x80ba0b85, 0xd85d88f, 0x80b76156,
-  0xd6cda53, 0x80b4bc0e,
-  0xd53db92, 0x80b21baf, 0xd3adc4e, 0x80af8039, 0xd21dc87, 0x80ace9ab,
-  0xd08dc3f, 0x80aa5806,
-  0xcefdb76, 0x80a7cb49, 0xcd6da2d, 0x80a54376, 0xcbdd865, 0x80a2c08b,
-  0xca4d620, 0x80a04289,
-  0xc8bd35e, 0x809dc971, 0xc72d020, 0x809b5541, 0xc59cc68, 0x8098e5fb,
-  0xc40c835, 0x80967b9f,
-  0xc27c389, 0x8094162c, 0xc0ebe66, 0x8091b5a2, 0xbf5b8cb, 0x808f5a02,
-  0xbdcb2bb, 0x808d034c,
-  0xbc3ac35, 0x808ab180, 0xbaaa53b, 0x8088649e, 0xb919dcf, 0x80861ca6,
-  0xb7895f0, 0x8083d998,
-  0xb5f8d9f, 0x80819b74, 0xb4684df, 0x807f623b, 0xb2d7baf, 0x807d2dec,
-  0xb147211, 0x807afe87,
-  0xafb6805, 0x8078d40d, 0xae25d8d, 0x8076ae7e, 0xac952aa, 0x80748dd9,
-  0xab0475c, 0x8072721f,
-  0xa973ba5, 0x80705b50, 0xa7e2f85, 0x806e496c, 0xa6522fe, 0x806c3c74,
-  0xa4c1610, 0x806a3466,
-  0xa3308bd, 0x80683143, 0xa19fb04, 0x8066330c, 0xa00ece8, 0x806439c0,
-  0x9e7de6a, 0x80624560,
-  0x9cecf89, 0x806055eb, 0x9b5c048, 0x805e6b62, 0x99cb0a7, 0x805c85c4,
-  0x983a0a7, 0x805aa512,
-  0x96a9049, 0x8058c94c, 0x9517f8f, 0x8056f272, 0x9386e78, 0x80552084,
-  0x91f5d06, 0x80535381,
-  0x9064b3a, 0x80518b6b, 0x8ed3916, 0x804fc841, 0x8d42699, 0x804e0a04,
-  0x8bb13c5, 0x804c50b2,
-  0x8a2009a, 0x804a9c4d, 0x888ed1b, 0x8048ecd5, 0x86fd947, 0x80474248,
-  0x856c520, 0x80459ca9,
-  0x83db0a7, 0x8043fbf6, 0x8249bdd, 0x80426030, 0x80b86c2, 0x8040c956,
-  0x7f27157, 0x803f376a,
-  0x7d95b9e, 0x803daa6a, 0x7c04598, 0x803c2257, 0x7a72f45, 0x803a9f31,
-  0x78e18a7, 0x803920f8,
-  0x77501be, 0x8037a7ac, 0x75bea8c, 0x8036334e, 0x742d311, 0x8034c3dd,
-  0x729bb4e, 0x80335959,
-  0x710a345, 0x8031f3c2, 0x6f78af6, 0x80309318, 0x6de7262, 0x802f375d,
-  0x6c5598a, 0x802de08e,
-  0x6ac406f, 0x802c8ead, 0x6932713, 0x802b41ba, 0x67a0d76, 0x8029f9b4,
-  0x660f398, 0x8028b69c,
-  0x647d97c, 0x80277872, 0x62ebf22, 0x80263f36, 0x615a48b, 0x80250ae7,
-  0x5fc89b8, 0x8023db86,
-  0x5e36ea9, 0x8022b114, 0x5ca5361, 0x80218b8f, 0x5b137df, 0x80206af8,
-  0x5981c26, 0x801f4f4f,
-  0x57f0035, 0x801e3895, 0x565e40d, 0x801d26c8, 0x54cc7b1, 0x801c19ea,
-  0x533ab20, 0x801b11fa,
-  0x51a8e5c, 0x801a0ef8, 0x5017165, 0x801910e4, 0x4e8543e, 0x801817bf,
-  0x4cf36e5, 0x80172388,
-  0x4b6195d, 0x80163440, 0x49cfba7, 0x801549e6, 0x483ddc3, 0x8014647b,
-  0x46abfb3, 0x801383fe,
-  0x451a177, 0x8012a86f, 0x4388310, 0x8011d1d0, 0x41f6480, 0x8011001f,
-  0x40645c7, 0x8010335c,
-  0x3ed26e6, 0x800f6b88, 0x3d407df, 0x800ea8a3, 0x3bae8b2, 0x800deaad,
-  0x3a1c960, 0x800d31a5,
-  0x388a9ea, 0x800c7d8c, 0x36f8a51, 0x800bce63, 0x3566a96, 0x800b2427,
-  0x33d4abb, 0x800a7edb,
-  0x3242abf, 0x8009de7e, 0x30b0aa4, 0x80094310, 0x2f1ea6c, 0x8008ac90,
-  0x2d8ca16, 0x80081b00,
-  0x2bfa9a4, 0x80078e5e, 0x2a68917, 0x800706ac, 0x28d6870, 0x800683e8,
-  0x27447b0, 0x80060614,
-  0x25b26d7, 0x80058d2f, 0x24205e8, 0x80051939, 0x228e4e2, 0x8004aa32,
-  0x20fc3c6, 0x8004401a,
-  0x1f6a297, 0x8003daf1, 0x1dd8154, 0x80037ab7, 0x1c45ffe, 0x80031f6d,
-  0x1ab3e97, 0x8002c912,
-  0x1921d20, 0x800277a6, 0x178fb99, 0x80022b29, 0x15fda03, 0x8001e39b,
-  0x146b860, 0x8001a0fd,
-  0x12d96b1, 0x8001634e, 0x11474f6, 0x80012a8e, 0xfb5330, 0x8000f6bd,
-  0xe23160, 0x8000c7dc,
-  0xc90f88, 0x80009dea, 0xafeda8, 0x800078e7, 0x96cbc1, 0x800058d4, 0x7da9d4,
-  0x80003daf,
-  0x6487e3, 0x8000277a, 0x4b65ee, 0x80001635, 0x3243f5, 0x800009df, 0x1921fb,
-  0x80000278,
-};
-
-static const q31_t WeightsQ31_8192[16384] = {
-  0x7fffffff, 0x0, 0x7fffffd9, 0xfff9b781, 0x7fffff62, 0xfff36f02, 0x7ffffe9d,
-    0xffed2684,
-  0x7ffffd88, 0xffe6de05, 0x7ffffc25, 0xffe09586, 0x7ffffa73, 0xffda4d08,
-    0x7ffff872, 0xffd40489,
-  0x7ffff621, 0xffcdbc0b, 0x7ffff382, 0xffc7738c, 0x7ffff094, 0xffc12b0e,
-    0x7fffed57, 0xffbae290,
-  0x7fffe9cb, 0xffb49a12, 0x7fffe5f0, 0xffae5195, 0x7fffe1c6, 0xffa80917,
-    0x7fffdd4d, 0xffa1c09a,
-  0x7fffd886, 0xff9b781d, 0x7fffd36f, 0xff952fa0, 0x7fffce09, 0xff8ee724,
-    0x7fffc854, 0xff889ea7,
-  0x7fffc251, 0xff82562c, 0x7fffbbfe, 0xff7c0db0, 0x7fffb55c, 0xff75c535,
-    0x7fffae6c, 0xff6f7cba,
-  0x7fffa72c, 0xff69343f, 0x7fff9f9e, 0xff62ebc5, 0x7fff97c1, 0xff5ca34b,
-    0x7fff8f94, 0xff565ad1,
-  0x7fff8719, 0xff501258, 0x7fff7e4f, 0xff49c9df, 0x7fff7536, 0xff438167,
-    0x7fff6bcd, 0xff3d38ef,
-  0x7fff6216, 0xff36f078, 0x7fff5810, 0xff30a801, 0x7fff4dbb, 0xff2a5f8b,
-    0x7fff4317, 0xff241715,
-  0x7fff3824, 0xff1dcea0, 0x7fff2ce2, 0xff17862b, 0x7fff2151, 0xff113db7,
-    0x7fff1572, 0xff0af543,
-  0x7fff0943, 0xff04acd0, 0x7ffefcc5, 0xfefe645e, 0x7ffeeff8, 0xfef81bec,
-    0x7ffee2dd, 0xfef1d37b,
-  0x7ffed572, 0xfeeb8b0a, 0x7ffec7b9, 0xfee5429a, 0x7ffeb9b0, 0xfedefa2b,
-    0x7ffeab59, 0xfed8b1bd,
-  0x7ffe9cb2, 0xfed2694f, 0x7ffe8dbd, 0xfecc20e2, 0x7ffe7e79, 0xfec5d876,
-    0x7ffe6ee5, 0xfebf900a,
-  0x7ffe5f03, 0xfeb947a0, 0x7ffe4ed2, 0xfeb2ff36, 0x7ffe3e52, 0xfeacb6cc,
-    0x7ffe2d83, 0xfea66e64,
-  0x7ffe1c65, 0xfea025fd, 0x7ffe0af8, 0xfe99dd96, 0x7ffdf93c, 0xfe939530,
-    0x7ffde731, 0xfe8d4ccb,
-  0x7ffdd4d7, 0xfe870467, 0x7ffdc22e, 0xfe80bc04, 0x7ffdaf37, 0xfe7a73a2,
-    0x7ffd9bf0, 0xfe742b41,
-  0x7ffd885a, 0xfe6de2e0, 0x7ffd7476, 0xfe679a81, 0x7ffd6042, 0xfe615223,
-    0x7ffd4bc0, 0xfe5b09c5,
-  0x7ffd36ee, 0xfe54c169, 0x7ffd21ce, 0xfe4e790d, 0x7ffd0c5f, 0xfe4830b3,
-    0x7ffcf6a0, 0xfe41e85a,
-  0x7ffce093, 0xfe3ba002, 0x7ffcca37, 0xfe3557ab, 0x7ffcb38c, 0xfe2f0f55,
-    0x7ffc9c92, 0xfe28c700,
-  0x7ffc8549, 0xfe227eac, 0x7ffc6db1, 0xfe1c365a, 0x7ffc55ca, 0xfe15ee09,
-    0x7ffc3d94, 0xfe0fa5b8,
-  0x7ffc250f, 0xfe095d69, 0x7ffc0c3b, 0xfe03151c, 0x7ffbf319, 0xfdfccccf,
-    0x7ffbd9a7, 0xfdf68484,
-  0x7ffbbfe6, 0xfdf03c3a, 0x7ffba5d7, 0xfde9f3f1, 0x7ffb8b78, 0xfde3aba9,
-    0x7ffb70cb, 0xfddd6363,
-  0x7ffb55ce, 0xfdd71b1e, 0x7ffb3a83, 0xfdd0d2db, 0x7ffb1ee9, 0xfdca8a99,
-    0x7ffb0300, 0xfdc44258,
-  0x7ffae6c7, 0xfdbdfa18, 0x7ffaca40, 0xfdb7b1da, 0x7ffaad6a, 0xfdb1699e,
-    0x7ffa9045, 0xfdab2162,
-  0x7ffa72d1, 0xfda4d929, 0x7ffa550e, 0xfd9e90f0, 0x7ffa36fc, 0xfd9848b9,
-    0x7ffa189c, 0xfd920084,
-  0x7ff9f9ec, 0xfd8bb850, 0x7ff9daed, 0xfd85701e, 0x7ff9bba0, 0xfd7f27ed,
-    0x7ff99c03, 0xfd78dfbd,
-  0x7ff97c18, 0xfd729790, 0x7ff95bdd, 0xfd6c4f64, 0x7ff93b54, 0xfd660739,
-    0x7ff91a7b, 0xfd5fbf10,
-  0x7ff8f954, 0xfd5976e9, 0x7ff8d7de, 0xfd532ec3, 0x7ff8b619, 0xfd4ce69f,
-    0x7ff89405, 0xfd469e7c,
-  0x7ff871a2, 0xfd40565c, 0x7ff84ef0, 0xfd3a0e3d, 0x7ff82bef, 0xfd33c61f,
-    0x7ff8089f, 0xfd2d7e04,
-  0x7ff7e500, 0xfd2735ea, 0x7ff7c113, 0xfd20edd2, 0x7ff79cd6, 0xfd1aa5bc,
-    0x7ff7784a, 0xfd145da7,
-  0x7ff75370, 0xfd0e1594, 0x7ff72e46, 0xfd07cd83, 0x7ff708ce, 0xfd018574,
-    0x7ff6e307, 0xfcfb3d67,
-  0x7ff6bcf0, 0xfcf4f55c, 0x7ff6968b, 0xfceead52, 0x7ff66fd7, 0xfce8654b,
-    0x7ff648d4, 0xfce21d45,
-  0x7ff62182, 0xfcdbd541, 0x7ff5f9e1, 0xfcd58d3f, 0x7ff5d1f1, 0xfccf453f,
-    0x7ff5a9b2, 0xfcc8fd41,
-  0x7ff58125, 0xfcc2b545, 0x7ff55848, 0xfcbc6d4c, 0x7ff52f1d, 0xfcb62554,
-    0x7ff505a2, 0xfcafdd5e,
-  0x7ff4dbd9, 0xfca9956a, 0x7ff4b1c0, 0xfca34d78, 0x7ff48759, 0xfc9d0588,
-    0x7ff45ca3, 0xfc96bd9b,
-  0x7ff4319d, 0xfc9075af, 0x7ff40649, 0xfc8a2dc6, 0x7ff3daa6, 0xfc83e5de,
-    0x7ff3aeb4, 0xfc7d9df9,
-  0x7ff38274, 0xfc775616, 0x7ff355e4, 0xfc710e36, 0x7ff32905, 0xfc6ac657,
-    0x7ff2fbd7, 0xfc647e7b,
-  0x7ff2ce5b, 0xfc5e36a0, 0x7ff2a08f, 0xfc57eec9, 0x7ff27275, 0xfc51a6f3,
-    0x7ff2440b, 0xfc4b5f20,
-  0x7ff21553, 0xfc45174e, 0x7ff1e64c, 0xfc3ecf80, 0x7ff1b6f6, 0xfc3887b3,
-    0x7ff18751, 0xfc323fe9,
-  0x7ff1575d, 0xfc2bf821, 0x7ff1271a, 0xfc25b05c, 0x7ff0f688, 0xfc1f6899,
-    0x7ff0c5a7, 0xfc1920d8,
-  0x7ff09478, 0xfc12d91a, 0x7ff062f9, 0xfc0c915e, 0x7ff0312c, 0xfc0649a5,
-    0x7fefff0f, 0xfc0001ee,
-  0x7fefcca4, 0xfbf9ba39, 0x7fef99ea, 0xfbf37287, 0x7fef66e1, 0xfbed2ad8,
-    0x7fef3388, 0xfbe6e32b,
-  0x7feeffe1, 0xfbe09b80, 0x7feecbec, 0xfbda53d8, 0x7fee97a7, 0xfbd40c33,
-    0x7fee6313, 0xfbcdc490,
-  0x7fee2e30, 0xfbc77cf0, 0x7fedf8ff, 0xfbc13552, 0x7fedc37e, 0xfbbaedb7,
-    0x7fed8daf, 0xfbb4a61f,
-  0x7fed5791, 0xfbae5e89, 0x7fed2123, 0xfba816f6, 0x7fecea67, 0xfba1cf66,
-    0x7fecb35c, 0xfb9b87d8,
-  0x7fec7c02, 0xfb95404d, 0x7fec4459, 0xfb8ef8c5, 0x7fec0c62, 0xfb88b13f,
-    0x7febd41b, 0xfb8269bd,
-  0x7feb9b85, 0xfb7c223d, 0x7feb62a1, 0xfb75dac0, 0x7feb296d, 0xfb6f9345,
-    0x7feaefeb, 0xfb694bce,
-  0x7feab61a, 0xfb630459, 0x7fea7bfa, 0xfb5cbce7, 0x7fea418b, 0xfb567578,
-    0x7fea06cd, 0xfb502e0c,
-  0x7fe9cbc0, 0xfb49e6a3, 0x7fe99064, 0xfb439f3c, 0x7fe954ba, 0xfb3d57d9,
-    0x7fe918c0, 0xfb371078,
-  0x7fe8dc78, 0xfb30c91b, 0x7fe89fe0, 0xfb2a81c0, 0x7fe862fa, 0xfb243a69,
-    0x7fe825c5, 0xfb1df314,
-  0x7fe7e841, 0xfb17abc2, 0x7fe7aa6e, 0xfb116474, 0x7fe76c4c, 0xfb0b1d28,
-    0x7fe72ddb, 0xfb04d5e0,
-  0x7fe6ef1c, 0xfafe8e9b, 0x7fe6b00d, 0xfaf84758, 0x7fe670b0, 0xfaf20019,
-    0x7fe63103, 0xfaebb8dd,
-  0x7fe5f108, 0xfae571a4, 0x7fe5b0be, 0xfadf2a6e, 0x7fe57025, 0xfad8e33c,
-    0x7fe52f3d, 0xfad29c0c,
-  0x7fe4ee06, 0xfacc54e0, 0x7fe4ac81, 0xfac60db7, 0x7fe46aac, 0xfabfc691,
-    0x7fe42889, 0xfab97f6e,
-  0x7fe3e616, 0xfab3384f, 0x7fe3a355, 0xfaacf133, 0x7fe36045, 0xfaa6aa1a,
-    0x7fe31ce6, 0xfaa06305,
-  0x7fe2d938, 0xfa9a1bf3, 0x7fe2953b, 0xfa93d4e4, 0x7fe250ef, 0xfa8d8dd8,
-    0x7fe20c55, 0xfa8746d0,
-  0x7fe1c76b, 0xfa80ffcb, 0x7fe18233, 0xfa7ab8ca, 0x7fe13cac, 0xfa7471cc,
-    0x7fe0f6d6, 0xfa6e2ad1,
-  0x7fe0b0b1, 0xfa67e3da, 0x7fe06a3d, 0xfa619ce7, 0x7fe0237a, 0xfa5b55f7,
-    0x7fdfdc69, 0xfa550f0a,
-  0x7fdf9508, 0xfa4ec821, 0x7fdf4d59, 0xfa48813b, 0x7fdf055a, 0xfa423a59,
-    0x7fdebd0d, 0xfa3bf37a,
-  0x7fde7471, 0xfa35ac9f, 0x7fde2b86, 0xfa2f65c8, 0x7fdde24d, 0xfa291ef4,
-    0x7fdd98c4, 0xfa22d823,
-  0x7fdd4eec, 0xfa1c9157, 0x7fdd04c6, 0xfa164a8e, 0x7fdcba51, 0xfa1003c8,
-    0x7fdc6f8d, 0xfa09bd06,
-  0x7fdc247a, 0xfa037648, 0x7fdbd918, 0xf9fd2f8e, 0x7fdb8d67, 0xf9f6e8d7,
-    0x7fdb4167, 0xf9f0a224,
-  0x7fdaf519, 0xf9ea5b75, 0x7fdaa87c, 0xf9e414ca, 0x7fda5b8f, 0xf9ddce22,
-    0x7fda0e54, 0xf9d7877e,
-  0x7fd9c0ca, 0xf9d140de, 0x7fd972f2, 0xf9cafa42, 0x7fd924ca, 0xf9c4b3a9,
-    0x7fd8d653, 0xf9be6d15,
-  0x7fd8878e, 0xf9b82684, 0x7fd8387a, 0xf9b1dff7, 0x7fd7e917, 0xf9ab996e,
-    0x7fd79965, 0xf9a552e9,
-  0x7fd74964, 0xf99f0c68, 0x7fd6f914, 0xf998c5ea, 0x7fd6a875, 0xf9927f71,
-    0x7fd65788, 0xf98c38fc,
-  0x7fd6064c, 0xf985f28a, 0x7fd5b4c1, 0xf97fac1d, 0x7fd562e7, 0xf97965b4,
-    0x7fd510be, 0xf9731f4e,
-  0x7fd4be46, 0xf96cd8ed, 0x7fd46b80, 0xf9669290, 0x7fd4186a, 0xf9604c37,
-    0x7fd3c506, 0xf95a05e2,
-  0x7fd37153, 0xf953bf91, 0x7fd31d51, 0xf94d7944, 0x7fd2c900, 0xf94732fb,
-    0x7fd27460, 0xf940ecb7,
-  0x7fd21f72, 0xf93aa676, 0x7fd1ca35, 0xf934603a, 0x7fd174a8, 0xf92e1a02,
-    0x7fd11ecd, 0xf927d3ce,
-  0x7fd0c8a3, 0xf9218d9e, 0x7fd0722b, 0xf91b4773, 0x7fd01b63, 0xf915014c,
-    0x7fcfc44d, 0xf90ebb29,
-  0x7fcf6ce8, 0xf908750a, 0x7fcf1533, 0xf9022ef0, 0x7fcebd31, 0xf8fbe8da,
-    0x7fce64df, 0xf8f5a2c9,
-  0x7fce0c3e, 0xf8ef5cbb, 0x7fcdb34f, 0xf8e916b2, 0x7fcd5a11, 0xf8e2d0ae,
-    0x7fcd0083, 0xf8dc8aae,
-  0x7fcca6a7, 0xf8d644b2, 0x7fcc4c7d, 0xf8cffebb, 0x7fcbf203, 0xf8c9b8c8,
-    0x7fcb973b, 0xf8c372d9,
-  0x7fcb3c23, 0xf8bd2cef, 0x7fcae0bd, 0xf8b6e70a, 0x7fca8508, 0xf8b0a129,
-    0x7fca2905, 0xf8aa5b4c,
-  0x7fc9ccb2, 0xf8a41574, 0x7fc97011, 0xf89dcfa1, 0x7fc91320, 0xf89789d2,
-    0x7fc8b5e1, 0xf8914407,
-  0x7fc85854, 0xf88afe42, 0x7fc7fa77, 0xf884b880, 0x7fc79c4b, 0xf87e72c4,
-    0x7fc73dd1, 0xf8782d0c,
-  0x7fc6df08, 0xf871e759, 0x7fc67ff0, 0xf86ba1aa, 0x7fc62089, 0xf8655c00,
-    0x7fc5c0d3, 0xf85f165b,
-  0x7fc560cf, 0xf858d0bb, 0x7fc5007c, 0xf8528b1f, 0x7fc49fda, 0xf84c4588,
-    0x7fc43ee9, 0xf845fff5,
-  0x7fc3dda9, 0xf83fba68, 0x7fc37c1b, 0xf83974df, 0x7fc31a3d, 0xf8332f5b,
-    0x7fc2b811, 0xf82ce9dc,
-  0x7fc25596, 0xf826a462, 0x7fc1f2cc, 0xf8205eec, 0x7fc18fb4, 0xf81a197b,
-    0x7fc12c4d, 0xf813d410,
-  0x7fc0c896, 0xf80d8ea9, 0x7fc06491, 0xf8074947, 0x7fc0003e, 0xf80103ea,
-    0x7fbf9b9b, 0xf7fabe92,
-  0x7fbf36aa, 0xf7f4793e, 0x7fbed16a, 0xf7ee33f0, 0x7fbe6bdb, 0xf7e7eea7,
-    0x7fbe05fd, 0xf7e1a963,
-  0x7fbd9fd0, 0xf7db6423, 0x7fbd3955, 0xf7d51ee9, 0x7fbcd28b, 0xf7ced9b4,
-    0x7fbc6b72, 0xf7c89484,
-  0x7fbc040a, 0xf7c24f59, 0x7fbb9c53, 0xf7bc0a33, 0x7fbb344e, 0xf7b5c512,
-    0x7fbacbfa, 0xf7af7ff6,
-  0x7fba6357, 0xf7a93ae0, 0x7fb9fa65, 0xf7a2f5ce, 0x7fb99125, 0xf79cb0c2,
-    0x7fb92796, 0xf7966bbb,
-  0x7fb8bdb8, 0xf79026b9, 0x7fb8538b, 0xf789e1bc, 0x7fb7e90f, 0xf7839cc4,
-    0x7fb77e45, 0xf77d57d2,
-  0x7fb7132b, 0xf77712e5, 0x7fb6a7c3, 0xf770cdfd, 0x7fb63c0d, 0xf76a891b,
-    0x7fb5d007, 0xf764443d,
-  0x7fb563b3, 0xf75dff66, 0x7fb4f710, 0xf757ba93, 0x7fb48a1e, 0xf75175c6,
-    0x7fb41cdd, 0xf74b30fe,
-  0x7fb3af4e, 0xf744ec3b, 0x7fb34170, 0xf73ea77e, 0x7fb2d343, 0xf73862c6,
-    0x7fb264c7, 0xf7321e14,
-  0x7fb1f5fc, 0xf72bd967, 0x7fb186e3, 0xf72594c0, 0x7fb1177b, 0xf71f501e,
-    0x7fb0a7c4, 0xf7190b81,
-  0x7fb037bf, 0xf712c6ea, 0x7fafc76a, 0xf70c8259, 0x7faf56c7, 0xf7063dcd,
-    0x7faee5d5, 0xf6fff946,
-  0x7fae7495, 0xf6f9b4c6, 0x7fae0305, 0xf6f3704a, 0x7fad9127, 0xf6ed2bd4,
-    0x7fad1efa, 0xf6e6e764,
-  0x7facac7f, 0xf6e0a2fa, 0x7fac39b4, 0xf6da5e95, 0x7fabc69b, 0xf6d41a36,
-    0x7fab5333, 0xf6cdd5dc,
-  0x7faadf7c, 0xf6c79188, 0x7faa6b77, 0xf6c14d3a, 0x7fa9f723, 0xf6bb08f1,
-    0x7fa98280, 0xf6b4c4ae,
-  0x7fa90d8e, 0xf6ae8071, 0x7fa8984e, 0xf6a83c3a, 0x7fa822bf, 0xf6a1f808,
-    0x7fa7ace1, 0xf69bb3dd,
-  0x7fa736b4, 0xf6956fb7, 0x7fa6c039, 0xf68f2b96, 0x7fa6496e, 0xf688e77c,
-    0x7fa5d256, 0xf682a367,
-  0x7fa55aee, 0xf67c5f59, 0x7fa4e338, 0xf6761b50, 0x7fa46b32, 0xf66fd74d,
-    0x7fa3f2df, 0xf6699350,
-  0x7fa37a3c, 0xf6634f59, 0x7fa3014b, 0xf65d0b68, 0x7fa2880b, 0xf656c77c,
-    0x7fa20e7c, 0xf6508397,
-  0x7fa1949e, 0xf64a3fb8, 0x7fa11a72, 0xf643fbdf, 0x7fa09ff7, 0xf63db80b,
-    0x7fa0252e, 0xf637743e,
-  0x7f9faa15, 0xf6313077, 0x7f9f2eae, 0xf62aecb5, 0x7f9eb2f8, 0xf624a8fa,
-    0x7f9e36f4, 0xf61e6545,
-  0x7f9dbaa0, 0xf6182196, 0x7f9d3dfe, 0xf611dded, 0x7f9cc10d, 0xf60b9a4b,
-    0x7f9c43ce, 0xf60556ae,
-  0x7f9bc640, 0xf5ff1318, 0x7f9b4863, 0xf5f8cf87, 0x7f9aca37, 0xf5f28bfd,
-    0x7f9a4bbd, 0xf5ec4879,
-  0x7f99ccf4, 0xf5e604fc, 0x7f994ddc, 0xf5dfc184, 0x7f98ce76, 0xf5d97e13,
-    0x7f984ec1, 0xf5d33aa8,
-  0x7f97cebd, 0xf5ccf743, 0x7f974e6a, 0xf5c6b3e5, 0x7f96cdc9, 0xf5c0708d,
-    0x7f964cd9, 0xf5ba2d3b,
-  0x7f95cb9a, 0xf5b3e9f0, 0x7f954a0d, 0xf5ada6ab, 0x7f94c831, 0xf5a7636c,
-    0x7f944606, 0xf5a12034,
-  0x7f93c38c, 0xf59add02, 0x7f9340c4, 0xf59499d6, 0x7f92bdad, 0xf58e56b1,
-    0x7f923a48, 0xf5881393,
-  0x7f91b694, 0xf581d07b, 0x7f913291, 0xf57b8d69, 0x7f90ae3f, 0xf5754a5e,
-    0x7f90299f, 0xf56f0759,
-  0x7f8fa4b0, 0xf568c45b, 0x7f8f1f72, 0xf5628163, 0x7f8e99e6, 0xf55c3e72,
-    0x7f8e140a, 0xf555fb88,
-  0x7f8d8de1, 0xf54fb8a4, 0x7f8d0768, 0xf54975c6, 0x7f8c80a1, 0xf54332ef,
-    0x7f8bf98b, 0xf53cf01f,
-  0x7f8b7227, 0xf536ad56, 0x7f8aea74, 0xf5306a93, 0x7f8a6272, 0xf52a27d7,
-    0x7f89da21, 0xf523e521,
-  0x7f895182, 0xf51da273, 0x7f88c894, 0xf5175fca, 0x7f883f58, 0xf5111d29,
-    0x7f87b5cd, 0xf50ada8f,
-  0x7f872bf3, 0xf50497fb, 0x7f86a1ca, 0xf4fe556e, 0x7f861753, 0xf4f812e7,
-    0x7f858c8d, 0xf4f1d068,
-  0x7f850179, 0xf4eb8def, 0x7f847616, 0xf4e54b7d, 0x7f83ea64, 0xf4df0912,
-    0x7f835e64, 0xf4d8c6ae,
-  0x7f82d214, 0xf4d28451, 0x7f824577, 0xf4cc41fb, 0x7f81b88a, 0xf4c5ffab,
-    0x7f812b4f, 0xf4bfbd63,
-  0x7f809dc5, 0xf4b97b21, 0x7f800fed, 0xf4b338e7, 0x7f7f81c6, 0xf4acf6b3,
-    0x7f7ef350, 0xf4a6b486,
-  0x7f7e648c, 0xf4a07261, 0x7f7dd579, 0xf49a3042, 0x7f7d4617, 0xf493ee2b,
-    0x7f7cb667, 0xf48dac1a,
-  0x7f7c2668, 0xf4876a10, 0x7f7b961b, 0xf481280e, 0x7f7b057e, 0xf47ae613,
-    0x7f7a7494, 0xf474a41f,
-  0x7f79e35a, 0xf46e6231, 0x7f7951d2, 0xf468204b, 0x7f78bffb, 0xf461de6d,
-    0x7f782dd6, 0xf45b9c95,
-  0x7f779b62, 0xf4555ac5, 0x7f77089f, 0xf44f18fb, 0x7f76758e, 0xf448d739,
-    0x7f75e22e, 0xf442957e,
-  0x7f754e80, 0xf43c53cb, 0x7f74ba83, 0xf436121e, 0x7f742637, 0xf42fd079,
-    0x7f73919d, 0xf4298edc,
-  0x7f72fcb4, 0xf4234d45, 0x7f72677c, 0xf41d0bb6, 0x7f71d1f6, 0xf416ca2e,
-    0x7f713c21, 0xf41088ae,
-  0x7f70a5fe, 0xf40a4735, 0x7f700f8c, 0xf40405c3, 0x7f6f78cb, 0xf3fdc459,
-    0x7f6ee1bc, 0xf3f782f6,
-  0x7f6e4a5e, 0xf3f1419a, 0x7f6db2b1, 0xf3eb0046, 0x7f6d1ab6, 0xf3e4bef9,
-    0x7f6c826d, 0xf3de7db4,
-  0x7f6be9d4, 0xf3d83c77, 0x7f6b50ed, 0xf3d1fb40, 0x7f6ab7b8, 0xf3cbba12,
-    0x7f6a1e34, 0xf3c578eb,
-  0x7f698461, 0xf3bf37cb, 0x7f68ea40, 0xf3b8f6b3, 0x7f684fd0, 0xf3b2b5a3,
-    0x7f67b512, 0xf3ac749a,
-  0x7f671a05, 0xf3a63398, 0x7f667ea9, 0xf39ff29f, 0x7f65e2ff, 0xf399b1ad,
-    0x7f654706, 0xf39370c2,
-  0x7f64aabf, 0xf38d2fe0, 0x7f640e29, 0xf386ef05, 0x7f637144, 0xf380ae31,
-    0x7f62d411, 0xf37a6d66,
-  0x7f62368f, 0xf3742ca2, 0x7f6198bf, 0xf36debe6, 0x7f60faa0, 0xf367ab31,
-    0x7f605c33, 0xf3616a85,
-  0x7f5fbd77, 0xf35b29e0, 0x7f5f1e6c, 0xf354e943, 0x7f5e7f13, 0xf34ea8ae,
-    0x7f5ddf6b, 0xf3486820,
-  0x7f5d3f75, 0xf342279b, 0x7f5c9f30, 0xf33be71d, 0x7f5bfe9d, 0xf335a6a7,
-    0x7f5b5dbb, 0xf32f6639,
-  0x7f5abc8a, 0xf32925d3, 0x7f5a1b0b, 0xf322e575, 0x7f59793e, 0xf31ca51f,
-    0x7f58d721, 0xf31664d1,
-  0x7f5834b7, 0xf310248a, 0x7f5791fd, 0xf309e44c, 0x7f56eef5, 0xf303a416,
-    0x7f564b9f, 0xf2fd63e8,
-  0x7f55a7fa, 0xf2f723c1, 0x7f550407, 0xf2f0e3a3, 0x7f545fc5, 0xf2eaa38d,
-    0x7f53bb34, 0xf2e4637f,
-  0x7f531655, 0xf2de2379, 0x7f527127, 0xf2d7e37b, 0x7f51cbab, 0xf2d1a385,
-    0x7f5125e0, 0xf2cb6398,
-  0x7f507fc7, 0xf2c523b2, 0x7f4fd95f, 0xf2bee3d5, 0x7f4f32a9, 0xf2b8a400,
-    0x7f4e8ba4, 0xf2b26433,
-  0x7f4de451, 0xf2ac246e, 0x7f4d3caf, 0xf2a5e4b1, 0x7f4c94be, 0xf29fa4fd,
-    0x7f4bec7f, 0xf2996551,
-  0x7f4b43f2, 0xf29325ad, 0x7f4a9b16, 0xf28ce612, 0x7f49f1eb, 0xf286a67e,
-    0x7f494872, 0xf28066f4,
-  0x7f489eaa, 0xf27a2771, 0x7f47f494, 0xf273e7f7, 0x7f474a30, 0xf26da885,
-    0x7f469f7d, 0xf267691b,
-  0x7f45f47b, 0xf26129ba, 0x7f45492b, 0xf25aea61, 0x7f449d8c, 0xf254ab11,
-    0x7f43f19f, 0xf24e6bc9,
-  0x7f434563, 0xf2482c8a, 0x7f4298d9, 0xf241ed53, 0x7f41ec01, 0xf23bae24,
-    0x7f413ed9, 0xf2356efe,
-  0x7f409164, 0xf22f2fe1, 0x7f3fe3a0, 0xf228f0cc, 0x7f3f358d, 0xf222b1c0,
-    0x7f3e872c, 0xf21c72bc,
-  0x7f3dd87c, 0xf21633c0, 0x7f3d297e, 0xf20ff4ce, 0x7f3c7a31, 0xf209b5e4,
-    0x7f3bca96, 0xf2037702,
-  0x7f3b1aad, 0xf1fd3829, 0x7f3a6a75, 0xf1f6f959, 0x7f39b9ee, 0xf1f0ba91,
-    0x7f390919, 0xf1ea7bd2,
-  0x7f3857f6, 0xf1e43d1c, 0x7f37a684, 0xf1ddfe6f, 0x7f36f4c3, 0xf1d7bfca,
-    0x7f3642b4, 0xf1d1812e,
-  0x7f359057, 0xf1cb429a, 0x7f34ddab, 0xf1c50410, 0x7f342ab1, 0xf1bec58e,
-    0x7f337768, 0xf1b88715,
-  0x7f32c3d1, 0xf1b248a5, 0x7f320feb, 0xf1ac0a3e, 0x7f315bb7, 0xf1a5cbdf,
-    0x7f30a734, 0xf19f8d89,
-  0x7f2ff263, 0xf1994f3d, 0x7f2f3d44, 0xf19310f9, 0x7f2e87d6, 0xf18cd2be,
-    0x7f2dd219, 0xf186948c,
-  0x7f2d1c0e, 0xf1805662, 0x7f2c65b5, 0xf17a1842, 0x7f2baf0d, 0xf173da2b,
-    0x7f2af817, 0xf16d9c1d,
-  0x7f2a40d2, 0xf1675e17, 0x7f29893f, 0xf161201b, 0x7f28d15d, 0xf15ae228,
-    0x7f28192d, 0xf154a43d,
-  0x7f2760af, 0xf14e665c, 0x7f26a7e2, 0xf1482884, 0x7f25eec7, 0xf141eab5,
-    0x7f25355d, 0xf13bacef,
-  0x7f247ba5, 0xf1356f32, 0x7f23c19e, 0xf12f317e, 0x7f230749, 0xf128f3d4,
-    0x7f224ca6, 0xf122b632,
-  0x7f2191b4, 0xf11c789a, 0x7f20d674, 0xf1163b0b, 0x7f201ae5, 0xf10ffd85,
-    0x7f1f5f08, 0xf109c009,
-  0x7f1ea2dc, 0xf1038295, 0x7f1de662, 0xf0fd452b, 0x7f1d299a, 0xf0f707ca,
-    0x7f1c6c83, 0xf0f0ca72,
-  0x7f1baf1e, 0xf0ea8d24, 0x7f1af16a, 0xf0e44fdf, 0x7f1a3368, 0xf0de12a3,
-    0x7f197518, 0xf0d7d571,
-  0x7f18b679, 0xf0d19848, 0x7f17f78c, 0xf0cb5b28, 0x7f173850, 0xf0c51e12,
-    0x7f1678c6, 0xf0bee105,
-  0x7f15b8ee, 0xf0b8a401, 0x7f14f8c7, 0xf0b26707, 0x7f143852, 0xf0ac2a16,
-    0x7f13778e, 0xf0a5ed2f,
-  0x7f12b67c, 0xf09fb051, 0x7f11f51c, 0xf099737d, 0x7f11336d, 0xf09336b2,
-    0x7f107170, 0xf08cf9f1,
-  0x7f0faf25, 0xf086bd39, 0x7f0eec8b, 0xf080808b, 0x7f0e29a3, 0xf07a43e7,
-    0x7f0d666c, 0xf074074c,
-  0x7f0ca2e7, 0xf06dcaba, 0x7f0bdf14, 0xf0678e32, 0x7f0b1af2, 0xf06151b4,
-    0x7f0a5682, 0xf05b1540,
-  0x7f0991c4, 0xf054d8d5, 0x7f08ccb7, 0xf04e9c73, 0x7f08075c, 0xf048601c,
-    0x7f0741b2, 0xf04223ce,
-  0x7f067bba, 0xf03be78a, 0x7f05b574, 0xf035ab4f, 0x7f04eedf, 0xf02f6f1f,
-    0x7f0427fc, 0xf02932f8,
-  0x7f0360cb, 0xf022f6da, 0x7f02994b, 0xf01cbac7, 0x7f01d17d, 0xf0167ebd,
-    0x7f010961, 0xf01042be,
-  0x7f0040f6, 0xf00a06c8, 0x7eff783d, 0xf003cadc, 0x7efeaf36, 0xeffd8ef9,
-    0x7efde5e0, 0xeff75321,
-  0x7efd1c3c, 0xeff11753, 0x7efc524a, 0xefeadb8e, 0x7efb8809, 0xefe49fd3,
-    0x7efabd7a, 0xefde6423,
-  0x7ef9f29d, 0xefd8287c, 0x7ef92771, 0xefd1ecdf, 0x7ef85bf7, 0xefcbb14c,
-    0x7ef7902f, 0xefc575c3,
-  0x7ef6c418, 0xefbf3a45, 0x7ef5f7b3, 0xefb8fed0, 0x7ef52b00, 0xefb2c365,
-    0x7ef45dfe, 0xefac8804,
-  0x7ef390ae, 0xefa64cae, 0x7ef2c310, 0xefa01161, 0x7ef1f524, 0xef99d61f,
-    0x7ef126e9, 0xef939ae6,
-  0x7ef05860, 0xef8d5fb8, 0x7eef8988, 0xef872494, 0x7eeeba62, 0xef80e97a,
-    0x7eedeaee, 0xef7aae6b,
-  0x7eed1b2c, 0xef747365, 0x7eec4b1b, 0xef6e386a, 0x7eeb7abc, 0xef67fd79,
-    0x7eeaaa0f, 0xef61c292,
-  0x7ee9d914, 0xef5b87b5, 0x7ee907ca, 0xef554ce3, 0x7ee83632, 0xef4f121b,
-    0x7ee7644c, 0xef48d75d,
-  0x7ee69217, 0xef429caa, 0x7ee5bf94, 0xef3c6201, 0x7ee4ecc3, 0xef362762,
-    0x7ee419a3, 0xef2feccd,
-  0x7ee34636, 0xef29b243, 0x7ee2727a, 0xef2377c4, 0x7ee19e6f, 0xef1d3d4e,
-    0x7ee0ca17, 0xef1702e4,
-  0x7edff570, 0xef10c883, 0x7edf207b, 0xef0a8e2d, 0x7ede4b38, 0xef0453e2,
-    0x7edd75a6, 0xeefe19a1,
-  0x7edc9fc6, 0xeef7df6a, 0x7edbc998, 0xeef1a53e, 0x7edaf31c, 0xeeeb6b1c,
-    0x7eda1c51, 0xeee53105,
-  0x7ed94538, 0xeedef6f9, 0x7ed86dd1, 0xeed8bcf7, 0x7ed7961c, 0xeed28300,
-    0x7ed6be18, 0xeecc4913,
-  0x7ed5e5c6, 0xeec60f31, 0x7ed50d26, 0xeebfd55a, 0x7ed43438, 0xeeb99b8d,
-    0x7ed35afb, 0xeeb361cb,
-  0x7ed28171, 0xeead2813, 0x7ed1a798, 0xeea6ee66, 0x7ed0cd70, 0xeea0b4c4,
-    0x7ecff2fb, 0xee9a7b2d,
-  0x7ecf1837, 0xee9441a0, 0x7ece3d25, 0xee8e081e, 0x7ecd61c5, 0xee87cea7,
-    0x7ecc8617, 0xee81953b,
-  0x7ecbaa1a, 0xee7b5bd9, 0x7ecacdd0, 0xee752283, 0x7ec9f137, 0xee6ee937,
-    0x7ec9144f, 0xee68aff6,
-  0x7ec8371a, 0xee6276bf, 0x7ec75996, 0xee5c3d94, 0x7ec67bc5, 0xee560473,
-    0x7ec59da5, 0xee4fcb5e,
-  0x7ec4bf36, 0xee499253, 0x7ec3e07a, 0xee435953, 0x7ec3016f, 0xee3d205e,
-    0x7ec22217, 0xee36e775,
-  0x7ec14270, 0xee30ae96, 0x7ec0627a, 0xee2a75c2, 0x7ebf8237, 0xee243cf9,
-    0x7ebea1a6, 0xee1e043b,
-  0x7ebdc0c6, 0xee17cb88, 0x7ebcdf98, 0xee1192e0, 0x7ebbfe1c, 0xee0b5a43,
-    0x7ebb1c52, 0xee0521b2,
-  0x7eba3a39, 0xedfee92b, 0x7eb957d2, 0xedf8b0b0, 0x7eb8751e, 0xedf2783f,
-    0x7eb7921b, 0xedec3fda,
-  0x7eb6aeca, 0xede60780, 0x7eb5cb2a, 0xeddfcf31, 0x7eb4e73d, 0xedd996ed,
-    0x7eb40301, 0xedd35eb5,
-  0x7eb31e78, 0xedcd2687, 0x7eb239a0, 0xedc6ee65, 0x7eb1547a, 0xedc0b64e,
-    0x7eb06f05, 0xedba7e43,
-  0x7eaf8943, 0xedb44642, 0x7eaea333, 0xedae0e4d, 0x7eadbcd4, 0xeda7d664,
-    0x7eacd627, 0xeda19e85,
-  0x7eabef2c, 0xed9b66b2, 0x7eab07e3, 0xed952eea, 0x7eaa204c, 0xed8ef72e,
-    0x7ea93867, 0xed88bf7d,
-  0x7ea85033, 0xed8287d7, 0x7ea767b2, 0xed7c503d, 0x7ea67ee2, 0xed7618ae,
-    0x7ea595c4, 0xed6fe12b,
-  0x7ea4ac58, 0xed69a9b3, 0x7ea3c29e, 0xed637246, 0x7ea2d896, 0xed5d3ae5,
-    0x7ea1ee3f, 0xed570390,
-  0x7ea1039b, 0xed50cc46, 0x7ea018a8, 0xed4a9507, 0x7e9f2d68, 0xed445dd5,
-    0x7e9e41d9, 0xed3e26ad,
-  0x7e9d55fc, 0xed37ef91, 0x7e9c69d1, 0xed31b881, 0x7e9b7d58, 0xed2b817d,
-    0x7e9a9091, 0xed254a84,
-  0x7e99a37c, 0xed1f1396, 0x7e98b618, 0xed18dcb5, 0x7e97c867, 0xed12a5df,
-    0x7e96da67, 0xed0c6f14,
-  0x7e95ec1a, 0xed063856, 0x7e94fd7e, 0xed0001a3, 0x7e940e94, 0xecf9cafb,
-    0x7e931f5c, 0xecf39460,
-  0x7e922fd6, 0xeced5dd0, 0x7e914002, 0xece7274c, 0x7e904fe0, 0xece0f0d4,
-    0x7e8f5f70, 0xecdaba67,
-  0x7e8e6eb2, 0xecd48407, 0x7e8d7da6, 0xecce4db2, 0x7e8c8c4b, 0xecc81769,
-    0x7e8b9aa3, 0xecc1e12c,
-  0x7e8aa8ac, 0xecbbaafb, 0x7e89b668, 0xecb574d5, 0x7e88c3d5, 0xecaf3ebc,
-    0x7e87d0f5, 0xeca908ae,
-  0x7e86ddc6, 0xeca2d2ad, 0x7e85ea49, 0xec9c9cb7, 0x7e84f67e, 0xec9666cd,
-    0x7e840265, 0xec9030f0,
-  0x7e830dff, 0xec89fb1e, 0x7e82194a, 0xec83c558, 0x7e812447, 0xec7d8f9e,
-    0x7e802ef6, 0xec7759f1,
-  0x7e7f3957, 0xec71244f, 0x7e7e436a, 0xec6aeeba, 0x7e7d4d2f, 0xec64b930,
-    0x7e7c56a5, 0xec5e83b3,
-  0x7e7b5fce, 0xec584e41, 0x7e7a68a9, 0xec5218dc, 0x7e797136, 0xec4be383,
-    0x7e787975, 0xec45ae36,
-  0x7e778166, 0xec3f78f6, 0x7e768908, 0xec3943c1, 0x7e75905d, 0xec330e99,
-    0x7e749764, 0xec2cd97d,
-  0x7e739e1d, 0xec26a46d, 0x7e72a488, 0xec206f69, 0x7e71aaa4, 0xec1a3a72,
-    0x7e70b073, 0xec140587,
-  0x7e6fb5f4, 0xec0dd0a8, 0x7e6ebb27, 0xec079bd6, 0x7e6dc00c, 0xec01670f,
-    0x7e6cc4a2, 0xebfb3256,
-  0x7e6bc8eb, 0xebf4fda8, 0x7e6acce6, 0xebeec907, 0x7e69d093, 0xebe89472,
-    0x7e68d3f2, 0xebe25fea,
-  0x7e67d703, 0xebdc2b6e, 0x7e66d9c6, 0xebd5f6fe, 0x7e65dc3b, 0xebcfc29b,
-    0x7e64de62, 0xebc98e45,
-  0x7e63e03b, 0xebc359fb, 0x7e62e1c6, 0xebbd25bd, 0x7e61e303, 0xebb6f18c,
-    0x7e60e3f2, 0xebb0bd67,
-  0x7e5fe493, 0xebaa894f, 0x7e5ee4e6, 0xeba45543, 0x7e5de4ec, 0xeb9e2144,
-    0x7e5ce4a3, 0xeb97ed52,
-  0x7e5be40c, 0xeb91b96c, 0x7e5ae328, 0xeb8b8593, 0x7e59e1f5, 0xeb8551c6,
-    0x7e58e075, 0xeb7f1e06,
-  0x7e57dea7, 0xeb78ea52, 0x7e56dc8a, 0xeb72b6ac, 0x7e55da20, 0xeb6c8312,
-    0x7e54d768, 0xeb664f84,
-  0x7e53d462, 0xeb601c04, 0x7e52d10e, 0xeb59e890, 0x7e51cd6c, 0xeb53b529,
-    0x7e50c97c, 0xeb4d81ce,
-  0x7e4fc53e, 0xeb474e81, 0x7e4ec0b2, 0xeb411b40, 0x7e4dbbd9, 0xeb3ae80c,
-    0x7e4cb6b1, 0xeb34b4e4,
-  0x7e4bb13c, 0xeb2e81ca, 0x7e4aab78, 0xeb284ebc, 0x7e49a567, 0xeb221bbb,
-    0x7e489f08, 0xeb1be8c8,
-  0x7e47985b, 0xeb15b5e1, 0x7e469160, 0xeb0f8307, 0x7e458a17, 0xeb095039,
-    0x7e448281, 0xeb031d79,
-  0x7e437a9c, 0xeafceac6, 0x7e427269, 0xeaf6b81f, 0x7e4169e9, 0xeaf08586,
-    0x7e40611b, 0xeaea52fa,
-  0x7e3f57ff, 0xeae4207a, 0x7e3e4e95, 0xeaddee08, 0x7e3d44dd, 0xead7bba3,
-    0x7e3c3ad7, 0xead1894b,
-  0x7e3b3083, 0xeacb56ff, 0x7e3a25e2, 0xeac524c1, 0x7e391af3, 0xeabef290,
-    0x7e380fb5, 0xeab8c06c,
-  0x7e37042a, 0xeab28e56, 0x7e35f851, 0xeaac5c4c, 0x7e34ec2b, 0xeaa62a4f,
-    0x7e33dfb6, 0xea9ff860,
-  0x7e32d2f4, 0xea99c67e, 0x7e31c5e3, 0xea9394a9, 0x7e30b885, 0xea8d62e1,
-    0x7e2faad9, 0xea873127,
-  0x7e2e9cdf, 0xea80ff7a, 0x7e2d8e97, 0xea7acdda, 0x7e2c8002, 0xea749c47,
-    0x7e2b711f, 0xea6e6ac2,
-  0x7e2a61ed, 0xea683949, 0x7e29526e, 0xea6207df, 0x7e2842a2, 0xea5bd681,
-    0x7e273287, 0xea55a531,
-  0x7e26221f, 0xea4f73ee, 0x7e251168, 0xea4942b9, 0x7e240064, 0xea431191,
-    0x7e22ef12, 0xea3ce077,
-  0x7e21dd73, 0xea36af69, 0x7e20cb85, 0xea307e6a, 0x7e1fb94a, 0xea2a4d78,
-    0x7e1ea6c1, 0xea241c93,
-  0x7e1d93ea, 0xea1debbb, 0x7e1c80c5, 0xea17baf2, 0x7e1b6d53, 0xea118a35,
-    0x7e1a5992, 0xea0b5987,
-  0x7e194584, 0xea0528e5, 0x7e183128, 0xe9fef852, 0x7e171c7f, 0xe9f8c7cc,
-    0x7e160787, 0xe9f29753,
-  0x7e14f242, 0xe9ec66e8, 0x7e13dcaf, 0xe9e6368b, 0x7e12c6ce, 0xe9e0063c,
-    0x7e11b0a0, 0xe9d9d5fa,
-  0x7e109a24, 0xe9d3a5c5, 0x7e0f835a, 0xe9cd759f, 0x7e0e6c42, 0xe9c74586,
-    0x7e0d54dc, 0xe9c1157a,
-  0x7e0c3d29, 0xe9bae57d, 0x7e0b2528, 0xe9b4b58d, 0x7e0a0cd9, 0xe9ae85ab,
-    0x7e08f43d, 0xe9a855d7,
-  0x7e07db52, 0xe9a22610, 0x7e06c21a, 0xe99bf658, 0x7e05a894, 0xe995c6ad,
-    0x7e048ec1, 0xe98f9710,
-  0x7e0374a0, 0xe9896781, 0x7e025a31, 0xe98337ff, 0x7e013f74, 0xe97d088c,
-    0x7e00246a, 0xe976d926,
-  0x7dff0911, 0xe970a9ce, 0x7dfded6c, 0xe96a7a85, 0x7dfcd178, 0xe9644b49,
-    0x7dfbb537, 0xe95e1c1b,
-  0x7dfa98a8, 0xe957ecfb, 0x7df97bcb, 0xe951bde9, 0x7df85ea0, 0xe94b8ee5,
-    0x7df74128, 0xe9455fef,
-  0x7df62362, 0xe93f3107, 0x7df5054f, 0xe939022d, 0x7df3e6ee, 0xe932d361,
-    0x7df2c83f, 0xe92ca4a4,
-  0x7df1a942, 0xe92675f4, 0x7df089f8, 0xe9204752, 0x7def6a60, 0xe91a18bf,
-    0x7dee4a7a, 0xe913ea39,
-  0x7ded2a47, 0xe90dbbc2, 0x7dec09c6, 0xe9078d59, 0x7deae8f7, 0xe9015efe,
-    0x7de9c7da, 0xe8fb30b1,
-  0x7de8a670, 0xe8f50273, 0x7de784b9, 0xe8eed443, 0x7de662b3, 0xe8e8a621,
-    0x7de54060, 0xe8e2780d,
-  0x7de41dc0, 0xe8dc4a07, 0x7de2fad1, 0xe8d61c10, 0x7de1d795, 0xe8cfee27,
-    0x7de0b40b, 0xe8c9c04c,
-  0x7ddf9034, 0xe8c39280, 0x7dde6c0f, 0xe8bd64c2, 0x7ddd479d, 0xe8b73712,
-    0x7ddc22dc, 0xe8b10971,
-  0x7ddafdce, 0xe8aadbde, 0x7dd9d873, 0xe8a4ae59, 0x7dd8b2ca, 0xe89e80e3,
-    0x7dd78cd3, 0xe898537b,
-  0x7dd6668f, 0xe8922622, 0x7dd53ffc, 0xe88bf8d7, 0x7dd4191d, 0xe885cb9a,
-    0x7dd2f1f0, 0xe87f9e6c,
-  0x7dd1ca75, 0xe879714d, 0x7dd0a2ac, 0xe873443c, 0x7dcf7a96, 0xe86d173a,
-    0x7dce5232, 0xe866ea46,
-  0x7dcd2981, 0xe860bd61, 0x7dcc0082, 0xe85a908a, 0x7dcad736, 0xe85463c2,
-    0x7dc9ad9c, 0xe84e3708,
-  0x7dc883b4, 0xe8480a5d, 0x7dc7597f, 0xe841ddc1, 0x7dc62efc, 0xe83bb133,
-    0x7dc5042b, 0xe83584b4,
-  0x7dc3d90d, 0xe82f5844, 0x7dc2ada2, 0xe8292be3, 0x7dc181e8, 0xe822ff90,
-    0x7dc055e2, 0xe81cd34b,
-  0x7dbf298d, 0xe816a716, 0x7dbdfceb, 0xe8107aef, 0x7dbccffc, 0xe80a4ed7,
-    0x7dbba2bf, 0xe80422ce,
-  0x7dba7534, 0xe7fdf6d4, 0x7db9475c, 0xe7f7cae8, 0x7db81936, 0xe7f19f0c,
-    0x7db6eac3, 0xe7eb733e,
-  0x7db5bc02, 0xe7e5477f, 0x7db48cf4, 0xe7df1bcf, 0x7db35d98, 0xe7d8f02d,
-    0x7db22def, 0xe7d2c49b,
-  0x7db0fdf8, 0xe7cc9917, 0x7dafcdb3, 0xe7c66da3, 0x7dae9d21, 0xe7c0423d,
-    0x7dad6c42, 0xe7ba16e7,
-  0x7dac3b15, 0xe7b3eb9f, 0x7dab099a, 0xe7adc066, 0x7da9d7d2, 0xe7a7953d,
-    0x7da8a5bc, 0xe7a16a22,
-  0x7da77359, 0xe79b3f16, 0x7da640a9, 0xe795141a, 0x7da50dab, 0xe78ee92c,
-    0x7da3da5f, 0xe788be4e,
-  0x7da2a6c6, 0xe782937e, 0x7da172df, 0xe77c68be, 0x7da03eab, 0xe7763e0d,
-    0x7d9f0a29, 0xe770136b,
-  0x7d9dd55a, 0xe769e8d8, 0x7d9ca03e, 0xe763be55, 0x7d9b6ad3, 0xe75d93e0,
-    0x7d9a351c, 0xe757697b,
-  0x7d98ff17, 0xe7513f25, 0x7d97c8c4, 0xe74b14de, 0x7d969224, 0xe744eaa6,
-    0x7d955b37, 0xe73ec07e,
-  0x7d9423fc, 0xe7389665, 0x7d92ec73, 0xe7326c5b, 0x7d91b49e, 0xe72c4260,
-    0x7d907c7a, 0xe7261875,
-  0x7d8f4409, 0xe71fee99, 0x7d8e0b4b, 0xe719c4cd, 0x7d8cd240, 0xe7139b10,
-    0x7d8b98e6, 0xe70d7162,
-  0x7d8a5f40, 0xe70747c4, 0x7d89254c, 0xe7011e35, 0x7d87eb0a, 0xe6faf4b5,
-    0x7d86b07c, 0xe6f4cb45,
-  0x7d85759f, 0xe6eea1e4, 0x7d843a76, 0xe6e87893, 0x7d82fefe, 0xe6e24f51,
-    0x7d81c33a, 0xe6dc261f,
-  0x7d808728, 0xe6d5fcfc, 0x7d7f4ac8, 0xe6cfd3e9, 0x7d7e0e1c, 0xe6c9aae5,
-    0x7d7cd121, 0xe6c381f1,
-  0x7d7b93da, 0xe6bd590d, 0x7d7a5645, 0xe6b73038, 0x7d791862, 0xe6b10772,
-    0x7d77da32, 0xe6aadebc,
-  0x7d769bb5, 0xe6a4b616, 0x7d755cea, 0xe69e8d80, 0x7d741dd2, 0xe69864f9,
-    0x7d72de6d, 0xe6923c82,
-  0x7d719eba, 0xe68c141a, 0x7d705eba, 0xe685ebc2, 0x7d6f1e6c, 0xe67fc37a,
-    0x7d6dddd2, 0xe6799b42,
-  0x7d6c9ce9, 0xe6737319, 0x7d6b5bb4, 0xe66d4b01, 0x7d6a1a31, 0xe66722f7,
-    0x7d68d860, 0xe660fafe,
-  0x7d679642, 0xe65ad315, 0x7d6653d7, 0xe654ab3b, 0x7d65111f, 0xe64e8371,
-    0x7d63ce19, 0xe6485bb7,
-  0x7d628ac6, 0xe642340d, 0x7d614725, 0xe63c0c73, 0x7d600338, 0xe635e4e9,
-    0x7d5ebefc, 0xe62fbd6e,
-  0x7d5d7a74, 0xe6299604, 0x7d5c359e, 0xe6236ea9, 0x7d5af07b, 0xe61d475e,
-    0x7d59ab0a, 0xe6172024,
-  0x7d58654d, 0xe610f8f9, 0x7d571f41, 0xe60ad1de, 0x7d55d8e9, 0xe604aad4,
-    0x7d549243, 0xe5fe83d9,
-  0x7d534b50, 0xe5f85cef, 0x7d520410, 0xe5f23614, 0x7d50bc82, 0xe5ec0f4a,
-    0x7d4f74a7, 0xe5e5e88f,
-  0x7d4e2c7f, 0xe5dfc1e5, 0x7d4ce409, 0xe5d99b4b, 0x7d4b9b46, 0xe5d374c1,
-    0x7d4a5236, 0xe5cd4e47,
-  0x7d4908d9, 0xe5c727dd, 0x7d47bf2e, 0xe5c10184, 0x7d467536, 0xe5badb3a,
-    0x7d452af1, 0xe5b4b501,
-  0x7d43e05e, 0xe5ae8ed8, 0x7d42957e, 0xe5a868bf, 0x7d414a51, 0xe5a242b7,
-    0x7d3ffed7, 0xe59c1cbf,
-  0x7d3eb30f, 0xe595f6d7, 0x7d3d66fa, 0xe58fd0ff, 0x7d3c1a98, 0xe589ab38,
-    0x7d3acde9, 0xe5838581,
-  0x7d3980ec, 0xe57d5fda, 0x7d3833a2, 0xe5773a44, 0x7d36e60b, 0xe57114be,
-    0x7d359827, 0xe56aef49,
-  0x7d3449f5, 0xe564c9e3, 0x7d32fb76, 0xe55ea48f, 0x7d31acaa, 0xe5587f4a,
-    0x7d305d91, 0xe5525a17,
-  0x7d2f0e2b, 0xe54c34f3, 0x7d2dbe77, 0xe5460fe0, 0x7d2c6e76, 0xe53feade,
-    0x7d2b1e28, 0xe539c5ec,
-  0x7d29cd8c, 0xe533a10a, 0x7d287ca4, 0xe52d7c39, 0x7d272b6e, 0xe5275779,
-    0x7d25d9eb, 0xe52132c9,
-  0x7d24881b, 0xe51b0e2a, 0x7d2335fe, 0xe514e99b, 0x7d21e393, 0xe50ec51d,
-    0x7d2090db, 0xe508a0b0,
-  0x7d1f3dd6, 0xe5027c53, 0x7d1dea84, 0xe4fc5807, 0x7d1c96e5, 0xe4f633cc,
-    0x7d1b42f9, 0xe4f00fa1,
-  0x7d19eebf, 0xe4e9eb87, 0x7d189a38, 0xe4e3c77d, 0x7d174564, 0xe4dda385,
-    0x7d15f043, 0xe4d77f9d,
-  0x7d149ad5, 0xe4d15bc6, 0x7d134519, 0xe4cb37ff, 0x7d11ef11, 0xe4c5144a,
-    0x7d1098bb, 0xe4bef0a5,
-  0x7d0f4218, 0xe4b8cd11, 0x7d0deb28, 0xe4b2a98e, 0x7d0c93eb, 0xe4ac861b,
-    0x7d0b3c60, 0xe4a662ba,
-  0x7d09e489, 0xe4a03f69, 0x7d088c64, 0xe49a1c29, 0x7d0733f3, 0xe493f8fb,
-    0x7d05db34, 0xe48dd5dd,
-  0x7d048228, 0xe487b2d0, 0x7d0328cf, 0xe4818fd4, 0x7d01cf29, 0xe47b6ce9,
-    0x7d007535, 0xe4754a0e,
-  0x7cff1af5, 0xe46f2745, 0x7cfdc068, 0xe469048d, 0x7cfc658d, 0xe462e1e6,
-    0x7cfb0a65, 0xe45cbf50,
-  0x7cf9aef0, 0xe4569ccb, 0x7cf8532f, 0xe4507a57, 0x7cf6f720, 0xe44a57f4,
-    0x7cf59ac4, 0xe44435a2,
-  0x7cf43e1a, 0xe43e1362, 0x7cf2e124, 0xe437f132, 0x7cf183e1, 0xe431cf14,
-    0x7cf02651, 0xe42bad07,
-  0x7ceec873, 0xe4258b0a, 0x7ced6a49, 0xe41f6920, 0x7cec0bd1, 0xe4194746,
-    0x7ceaad0c, 0xe413257d,
-  0x7ce94dfb, 0xe40d03c6, 0x7ce7ee9c, 0xe406e220, 0x7ce68ef0, 0xe400c08b,
-    0x7ce52ef7, 0xe3fa9f08,
-  0x7ce3ceb2, 0xe3f47d96, 0x7ce26e1f, 0xe3ee5c35, 0x7ce10d3f, 0xe3e83ae5,
-    0x7cdfac12, 0xe3e219a7,
-  0x7cde4a98, 0xe3dbf87a, 0x7cdce8d1, 0xe3d5d75e, 0x7cdb86bd, 0xe3cfb654,
-    0x7cda245c, 0xe3c9955b,
-  0x7cd8c1ae, 0xe3c37474, 0x7cd75eb3, 0xe3bd539e, 0x7cd5fb6a, 0xe3b732d9,
-    0x7cd497d5, 0xe3b11226,
-  0x7cd333f3, 0xe3aaf184, 0x7cd1cfc4, 0xe3a4d0f4, 0x7cd06b48, 0xe39eb075,
-    0x7ccf067f, 0xe3989008,
-  0x7ccda169, 0xe3926fad, 0x7ccc3c06, 0xe38c4f63, 0x7ccad656, 0xe3862f2a,
-    0x7cc97059, 0xe3800f03,
-  0x7cc80a0f, 0xe379eeed, 0x7cc6a378, 0xe373ceea, 0x7cc53c94, 0xe36daef7,
-    0x7cc3d563, 0xe3678f17,
-  0x7cc26de5, 0xe3616f48, 0x7cc1061a, 0xe35b4f8b, 0x7cbf9e03, 0xe3552fdf,
-    0x7cbe359e, 0xe34f1045,
-  0x7cbcccec, 0xe348f0bd, 0x7cbb63ee, 0xe342d146, 0x7cb9faa2, 0xe33cb1e1,
-    0x7cb8910a, 0xe336928e,
-  0x7cb72724, 0xe330734d, 0x7cb5bcf2, 0xe32a541d, 0x7cb45272, 0xe3243500,
-    0x7cb2e7a6, 0xe31e15f4,
-  0x7cb17c8d, 0xe317f6fa, 0x7cb01127, 0xe311d811, 0x7caea574, 0xe30bb93b,
-    0x7cad3974, 0xe3059a76,
-  0x7cabcd28, 0xe2ff7bc3, 0x7caa608e, 0xe2f95d23, 0x7ca8f3a7, 0xe2f33e94,
-    0x7ca78674, 0xe2ed2017,
-  0x7ca618f3, 0xe2e701ac, 0x7ca4ab26, 0xe2e0e352, 0x7ca33d0c, 0xe2dac50b,
-    0x7ca1cea5, 0xe2d4a6d6,
-  0x7ca05ff1, 0xe2ce88b3, 0x7c9ef0f0, 0xe2c86aa2, 0x7c9d81a3, 0xe2c24ca2,
-    0x7c9c1208, 0xe2bc2eb5,
-  0x7c9aa221, 0xe2b610da, 0x7c9931ec, 0xe2aff311, 0x7c97c16b, 0xe2a9d55a,
-    0x7c96509d, 0xe2a3b7b5,
-  0x7c94df83, 0xe29d9a23, 0x7c936e1b, 0xe2977ca2, 0x7c91fc66, 0xe2915f34,
-    0x7c908a65, 0xe28b41d7,
-  0x7c8f1817, 0xe285248d, 0x7c8da57c, 0xe27f0755, 0x7c8c3294, 0xe278ea30,
-    0x7c8abf5f, 0xe272cd1c,
-  0x7c894bde, 0xe26cb01b, 0x7c87d810, 0xe266932c, 0x7c8663f4, 0xe260764f,
-    0x7c84ef8c, 0xe25a5984,
-  0x7c837ad8, 0xe2543ccc, 0x7c8205d6, 0xe24e2026, 0x7c809088, 0xe2480393,
-    0x7c7f1aed, 0xe241e711,
-  0x7c7da505, 0xe23bcaa2, 0x7c7c2ed0, 0xe235ae46, 0x7c7ab84e, 0xe22f91fc,
-    0x7c794180, 0xe22975c4,
-  0x7c77ca65, 0xe223599e, 0x7c7652fd, 0xe21d3d8b, 0x7c74db48, 0xe217218b,
-    0x7c736347, 0xe211059d,
-  0x7c71eaf9, 0xe20ae9c1, 0x7c70725e, 0xe204cdf8, 0x7c6ef976, 0xe1feb241,
-    0x7c6d8041, 0xe1f8969d,
-  0x7c6c06c0, 0xe1f27b0b, 0x7c6a8cf2, 0xe1ec5f8c, 0x7c6912d7, 0xe1e64420,
-    0x7c679870, 0xe1e028c6,
-  0x7c661dbc, 0xe1da0d7e, 0x7c64a2bb, 0xe1d3f24a, 0x7c63276d, 0xe1cdd727,
-    0x7c61abd3, 0xe1c7bc18,
-  0x7c602fec, 0xe1c1a11b, 0x7c5eb3b8, 0xe1bb8631, 0x7c5d3737, 0xe1b56b59,
-    0x7c5bba6a, 0xe1af5094,
-  0x7c5a3d50, 0xe1a935e2, 0x7c58bfe9, 0xe1a31b42, 0x7c574236, 0xe19d00b6,
-    0x7c55c436, 0xe196e63c,
-  0x7c5445e9, 0xe190cbd4, 0x7c52c74f, 0xe18ab180, 0x7c514869, 0xe184973e,
-    0x7c4fc936, 0xe17e7d0f,
-  0x7c4e49b7, 0xe17862f3, 0x7c4cc9ea, 0xe17248ea, 0x7c4b49d2, 0xe16c2ef4,
-    0x7c49c96c, 0xe1661510,
-  0x7c4848ba, 0xe15ffb3f, 0x7c46c7bb, 0xe159e182, 0x7c45466f, 0xe153c7d7,
-    0x7c43c4d7, 0xe14dae3f,
-  0x7c4242f2, 0xe14794ba, 0x7c40c0c1, 0xe1417b48, 0x7c3f3e42, 0xe13b61e9,
-    0x7c3dbb78, 0xe135489d,
-  0x7c3c3860, 0xe12f2f63, 0x7c3ab4fc, 0xe129163d, 0x7c39314b, 0xe122fd2a,
-    0x7c37ad4e, 0xe11ce42a,
-  0x7c362904, 0xe116cb3d, 0x7c34a46d, 0xe110b263, 0x7c331f8a, 0xe10a999c,
-    0x7c319a5a, 0xe10480e9,
-  0x7c3014de, 0xe0fe6848, 0x7c2e8f15, 0xe0f84fbb, 0x7c2d08ff, 0xe0f23740,
-    0x7c2b829d, 0xe0ec1ed9,
-  0x7c29fbee, 0xe0e60685, 0x7c2874f3, 0xe0dfee44, 0x7c26edab, 0xe0d9d616,
-    0x7c256616, 0xe0d3bdfc,
-  0x7c23de35, 0xe0cda5f5, 0x7c225607, 0xe0c78e01, 0x7c20cd8d, 0xe0c17620,
-    0x7c1f44c6, 0xe0bb5e53,
-  0x7c1dbbb3, 0xe0b54698, 0x7c1c3253, 0xe0af2ef2, 0x7c1aa8a6, 0xe0a9175e,
-    0x7c191ead, 0xe0a2ffde,
-  0x7c179467, 0xe09ce871, 0x7c1609d5, 0xe096d117, 0x7c147ef6, 0xe090b9d1,
-    0x7c12f3cb, 0xe08aa29f,
-  0x7c116853, 0xe0848b7f, 0x7c0fdc8f, 0xe07e7473, 0x7c0e507e, 0xe0785d7b,
-    0x7c0cc421, 0xe0724696,
-  0x7c0b3777, 0xe06c2fc4, 0x7c09aa80, 0xe0661906, 0x7c081d3d, 0xe060025c,
-    0x7c068fae, 0xe059ebc5,
-  0x7c0501d2, 0xe053d541, 0x7c0373a9, 0xe04dbed1, 0x7c01e534, 0xe047a875,
-    0x7c005673, 0xe041922c,
-  0x7bfec765, 0xe03b7bf6, 0x7bfd380a, 0xe03565d5, 0x7bfba863, 0xe02f4fc6,
-    0x7bfa1870, 0xe02939cc,
-  0x7bf88830, 0xe02323e5, 0x7bf6f7a4, 0xe01d0e12, 0x7bf566cb, 0xe016f852,
-    0x7bf3d5a6, 0xe010e2a7,
-  0x7bf24434, 0xe00acd0e, 0x7bf0b276, 0xe004b78a, 0x7bef206b, 0xdffea219,
-    0x7bed8e14, 0xdff88cbc,
-  0x7bebfb70, 0xdff27773, 0x7bea6880, 0xdfec623e, 0x7be8d544, 0xdfe64d1c,
-    0x7be741bb, 0xdfe0380e,
-  0x7be5ade6, 0xdfda2314, 0x7be419c4, 0xdfd40e2e, 0x7be28556, 0xdfcdf95c,
-    0x7be0f09b, 0xdfc7e49d,
-  0x7bdf5b94, 0xdfc1cff3, 0x7bddc641, 0xdfbbbb5c, 0x7bdc30a1, 0xdfb5a6d9,
-    0x7bda9ab5, 0xdfaf926a,
-  0x7bd9047c, 0xdfa97e0f, 0x7bd76df7, 0xdfa369c8, 0x7bd5d726, 0xdf9d5595,
-    0x7bd44008, 0xdf974176,
-  0x7bd2a89e, 0xdf912d6b, 0x7bd110e8, 0xdf8b1974, 0x7bcf78e5, 0xdf850591,
-    0x7bcde095, 0xdf7ef1c2,
-  0x7bcc47fa, 0xdf78de07, 0x7bcaaf12, 0xdf72ca60, 0x7bc915dd, 0xdf6cb6cd,
-    0x7bc77c5d, 0xdf66a34e,
-  0x7bc5e290, 0xdf608fe4, 0x7bc44876, 0xdf5a7c8d, 0x7bc2ae10, 0xdf54694b,
-    0x7bc1135e, 0xdf4e561c,
-  0x7bbf7860, 0xdf484302, 0x7bbddd15, 0xdf422ffd, 0x7bbc417e, 0xdf3c1d0b,
-    0x7bbaa59a, 0xdf360a2d,
-  0x7bb9096b, 0xdf2ff764, 0x7bb76cef, 0xdf29e4af, 0x7bb5d026, 0xdf23d20e,
-    0x7bb43311, 0xdf1dbf82,
-  0x7bb295b0, 0xdf17ad0a, 0x7bb0f803, 0xdf119aa6, 0x7baf5a09, 0xdf0b8856,
-    0x7badbbc3, 0xdf05761b,
-  0x7bac1d31, 0xdeff63f4, 0x7baa7e53, 0xdef951e2, 0x7ba8df28, 0xdef33fe3,
-    0x7ba73fb1, 0xdeed2dfa,
-  0x7ba59fee, 0xdee71c24, 0x7ba3ffde, 0xdee10a63, 0x7ba25f82, 0xdedaf8b7,
-    0x7ba0beda, 0xded4e71f,
-  0x7b9f1de6, 0xdeced59b, 0x7b9d7ca5, 0xdec8c42c, 0x7b9bdb18, 0xdec2b2d1,
-    0x7b9a393f, 0xdebca18b,
-  0x7b989719, 0xdeb69059, 0x7b96f4a8, 0xdeb07f3c, 0x7b9551ea, 0xdeaa6e34,
-    0x7b93aee0, 0xdea45d40,
-  0x7b920b89, 0xde9e4c60, 0x7b9067e7, 0xde983b95, 0x7b8ec3f8, 0xde922adf,
-    0x7b8d1fbd, 0xde8c1a3e,
-  0x7b8b7b36, 0xde8609b1, 0x7b89d662, 0xde7ff938, 0x7b883143, 0xde79e8d5,
-    0x7b868bd7, 0xde73d886,
-  0x7b84e61f, 0xde6dc84b, 0x7b83401b, 0xde67b826, 0x7b8199ca, 0xde61a815,
-    0x7b7ff32e, 0xde5b9819,
-  0x7b7e4c45, 0xde558831, 0x7b7ca510, 0xde4f785f, 0x7b7afd8f, 0xde4968a1,
-    0x7b7955c2, 0xde4358f8,
-  0x7b77ada8, 0xde3d4964, 0x7b760542, 0xde3739e4, 0x7b745c91, 0xde312a7a,
-    0x7b72b393, 0xde2b1b24,
-  0x7b710a49, 0xde250be3, 0x7b6f60b2, 0xde1efcb7, 0x7b6db6d0, 0xde18eda0,
-    0x7b6c0ca2, 0xde12de9e,
-  0x7b6a6227, 0xde0ccfb1, 0x7b68b760, 0xde06c0d9, 0x7b670c4d, 0xde00b216,
-    0x7b6560ee, 0xddfaa367,
-  0x7b63b543, 0xddf494ce, 0x7b62094c, 0xddee8649, 0x7b605d09, 0xdde877da,
-    0x7b5eb079, 0xdde26980,
-  0x7b5d039e, 0xdddc5b3b, 0x7b5b5676, 0xddd64d0a, 0x7b59a902, 0xddd03eef,
-    0x7b57fb42, 0xddca30e9,
-  0x7b564d36, 0xddc422f8, 0x7b549ede, 0xddbe151d, 0x7b52f03a, 0xddb80756,
-    0x7b51414a, 0xddb1f9a4,
-  0x7b4f920e, 0xddabec08, 0x7b4de286, 0xdda5de81, 0x7b4c32b1, 0xdd9fd10f,
-    0x7b4a8291, 0xdd99c3b2,
-  0x7b48d225, 0xdd93b66a, 0x7b47216c, 0xdd8da938, 0x7b457068, 0xdd879c1b,
-    0x7b43bf17, 0xdd818f13,
-  0x7b420d7a, 0xdd7b8220, 0x7b405b92, 0xdd757543, 0x7b3ea95d, 0xdd6f687b,
-    0x7b3cf6dc, 0xdd695bc9,
-  0x7b3b4410, 0xdd634f2b, 0x7b3990f7, 0xdd5d42a3, 0x7b37dd92, 0xdd573631,
-    0x7b3629e1, 0xdd5129d4,
-  0x7b3475e5, 0xdd4b1d8c, 0x7b32c19c, 0xdd451159, 0x7b310d07, 0xdd3f053c,
-    0x7b2f5826, 0xdd38f935,
-  0x7b2da2fa, 0xdd32ed43, 0x7b2bed81, 0xdd2ce166, 0x7b2a37bc, 0xdd26d59f,
-    0x7b2881ac, 0xdd20c9ed,
-  0x7b26cb4f, 0xdd1abe51, 0x7b2514a6, 0xdd14b2ca, 0x7b235db2, 0xdd0ea759,
-    0x7b21a671, 0xdd089bfe,
-  0x7b1feee5, 0xdd0290b8, 0x7b1e370d, 0xdcfc8588, 0x7b1c7ee8, 0xdcf67a6d,
-    0x7b1ac678, 0xdcf06f68,
-  0x7b190dbc, 0xdcea6478, 0x7b1754b3, 0xdce4599e, 0x7b159b5f, 0xdcde4eda,
-    0x7b13e1bf, 0xdcd8442b,
-  0x7b1227d3, 0xdcd23993, 0x7b106d9b, 0xdccc2f0f, 0x7b0eb318, 0xdcc624a2,
-    0x7b0cf848, 0xdcc01a4a,
-  0x7b0b3d2c, 0xdcba1008, 0x7b0981c5, 0xdcb405dc, 0x7b07c612, 0xdcadfbc5,
-    0x7b060a12, 0xdca7f1c5,
-  0x7b044dc7, 0xdca1e7da, 0x7b029130, 0xdc9bde05, 0x7b00d44d, 0xdc95d446,
-    0x7aff171e, 0xdc8fca9c,
-  0x7afd59a4, 0xdc89c109, 0x7afb9bdd, 0xdc83b78b, 0x7af9ddcb, 0xdc7dae23,
-    0x7af81f6c, 0xdc77a4d2,
-  0x7af660c2, 0xdc719b96, 0x7af4a1cc, 0xdc6b9270, 0x7af2e28b, 0xdc658960,
-    0x7af122fd, 0xdc5f8066,
-  0x7aef6323, 0xdc597781, 0x7aeda2fe, 0xdc536eb3, 0x7aebe28d, 0xdc4d65fb,
-    0x7aea21d0, 0xdc475d59,
-  0x7ae860c7, 0xdc4154cd, 0x7ae69f73, 0xdc3b4c57, 0x7ae4ddd2, 0xdc3543f7,
-    0x7ae31be6, 0xdc2f3bad,
-  0x7ae159ae, 0xdc293379, 0x7adf972a, 0xdc232b5c, 0x7addd45b, 0xdc1d2354,
-    0x7adc113f, 0xdc171b63,
-  0x7ada4dd8, 0xdc111388, 0x7ad88a25, 0xdc0b0bc2, 0x7ad6c626, 0xdc050414,
-    0x7ad501dc, 0xdbfefc7b,
-  0x7ad33d45, 0xdbf8f4f8, 0x7ad17863, 0xdbf2ed8c, 0x7acfb336, 0xdbece636,
-    0x7acdedbc, 0xdbe6def6,
-  0x7acc27f7, 0xdbe0d7cd, 0x7aca61e6, 0xdbdad0b9, 0x7ac89b89, 0xdbd4c9bc,
-    0x7ac6d4e0, 0xdbcec2d6,
-  0x7ac50dec, 0xdbc8bc06, 0x7ac346ac, 0xdbc2b54c, 0x7ac17f20, 0xdbbcaea8,
-    0x7abfb749, 0xdbb6a81b,
-  0x7abdef25, 0xdbb0a1a4, 0x7abc26b7, 0xdbaa9b43, 0x7aba5dfc, 0xdba494f9,
-    0x7ab894f6, 0xdb9e8ec6,
-  0x7ab6cba4, 0xdb9888a8, 0x7ab50206, 0xdb9282a2, 0x7ab3381d, 0xdb8c7cb1,
-    0x7ab16de7, 0xdb8676d8,
-  0x7aafa367, 0xdb807114, 0x7aadd89a, 0xdb7a6b68, 0x7aac0d82, 0xdb7465d1,
-    0x7aaa421e, 0xdb6e6052,
-  0x7aa8766f, 0xdb685ae9, 0x7aa6aa74, 0xdb625596, 0x7aa4de2d, 0xdb5c505a,
-    0x7aa3119a, 0xdb564b35,
-  0x7aa144bc, 0xdb504626, 0x7a9f7793, 0xdb4a412e, 0x7a9daa1d, 0xdb443c4c,
-    0x7a9bdc5c, 0xdb3e3781,
-  0x7a9a0e50, 0xdb3832cd, 0x7a983ff7, 0xdb322e30, 0x7a967153, 0xdb2c29a9,
-    0x7a94a264, 0xdb262539,
-  0x7a92d329, 0xdb2020e0, 0x7a9103a2, 0xdb1a1c9d, 0x7a8f33d0, 0xdb141871,
-    0x7a8d63b2, 0xdb0e145c,
-  0x7a8b9348, 0xdb08105e, 0x7a89c293, 0xdb020c77, 0x7a87f192, 0xdafc08a6,
-    0x7a862046, 0xdaf604ec,
-  0x7a844eae, 0xdaf00149, 0x7a827ccb, 0xdae9fdbd, 0x7a80aa9c, 0xdae3fa48,
-    0x7a7ed821, 0xdaddf6ea,
-  0x7a7d055b, 0xdad7f3a2, 0x7a7b3249, 0xdad1f072, 0x7a795eec, 0xdacbed58,
-    0x7a778b43, 0xdac5ea56,
-  0x7a75b74f, 0xdabfe76a, 0x7a73e30f, 0xdab9e495, 0x7a720e84, 0xdab3e1d8,
-    0x7a7039ad, 0xdaaddf31,
-  0x7a6e648a, 0xdaa7dca1, 0x7a6c8f1c, 0xdaa1da29, 0x7a6ab963, 0xda9bd7c7,
-    0x7a68e35e, 0xda95d57d,
-  0x7a670d0d, 0xda8fd349, 0x7a653671, 0xda89d12d, 0x7a635f8a, 0xda83cf28,
-    0x7a618857, 0xda7dcd3a,
-  0x7a5fb0d8, 0xda77cb63, 0x7a5dd90e, 0xda71c9a3, 0x7a5c00f9, 0xda6bc7fa,
-    0x7a5a2898, 0xda65c669,
-  0x7a584feb, 0xda5fc4ef, 0x7a5676f3, 0xda59c38c, 0x7a549db0, 0xda53c240,
-    0x7a52c421, 0xda4dc10b,
-  0x7a50ea47, 0xda47bfee, 0x7a4f1021, 0xda41bee8, 0x7a4d35b0, 0xda3bbdf9,
-    0x7a4b5af3, 0xda35bd22,
-  0x7a497feb, 0xda2fbc61, 0x7a47a498, 0xda29bbb9, 0x7a45c8f9, 0xda23bb27,
-    0x7a43ed0e, 0xda1dbaad,
-  0x7a4210d8, 0xda17ba4a, 0x7a403457, 0xda11b9ff, 0x7a3e578b, 0xda0bb9cb,
-    0x7a3c7a73, 0xda05b9ae,
-  0x7a3a9d0f, 0xd9ffb9a9, 0x7a38bf60, 0xd9f9b9bb, 0x7a36e166, 0xd9f3b9e5,
-    0x7a350321, 0xd9edba26,
-  0x7a332490, 0xd9e7ba7f, 0x7a3145b3, 0xd9e1baef, 0x7a2f668c, 0xd9dbbb77,
-    0x7a2d8719, 0xd9d5bc16,
-  0x7a2ba75a, 0xd9cfbccd, 0x7a29c750, 0xd9c9bd9b, 0x7a27e6fb, 0xd9c3be81,
-    0x7a26065b, 0xd9bdbf7e,
-  0x7a24256f, 0xd9b7c094, 0x7a224437, 0xd9b1c1c0, 0x7a2062b5, 0xd9abc305,
-    0x7a1e80e7, 0xd9a5c461,
-  0x7a1c9ece, 0xd99fc5d4, 0x7a1abc69, 0xd999c75f, 0x7a18d9b9, 0xd993c902,
-    0x7a16f6be, 0xd98dcabd,
-  0x7a151378, 0xd987cc90, 0x7a132fe6, 0xd981ce7a, 0x7a114c09, 0xd97bd07c,
-    0x7a0f67e0, 0xd975d295,
-  0x7a0d836d, 0xd96fd4c7, 0x7a0b9eae, 0xd969d710, 0x7a09b9a4, 0xd963d971,
-    0x7a07d44e, 0xd95ddbea,
-  0x7a05eead, 0xd957de7a, 0x7a0408c1, 0xd951e123, 0x7a02228a, 0xd94be3e3,
-    0x7a003c07, 0xd945e6bb,
-  0x79fe5539, 0xd93fe9ab, 0x79fc6e20, 0xd939ecb3, 0x79fa86bc, 0xd933efd3,
-    0x79f89f0c, 0xd92df30b,
-  0x79f6b711, 0xd927f65b, 0x79f4cecb, 0xd921f9c3, 0x79f2e63a, 0xd91bfd43,
-    0x79f0fd5d, 0xd91600da,
-  0x79ef1436, 0xd910048a, 0x79ed2ac3, 0xd90a0852, 0x79eb4105, 0xd9040c32,
-    0x79e956fb, 0xd8fe1029,
-  0x79e76ca7, 0xd8f81439, 0x79e58207, 0xd8f21861, 0x79e3971c, 0xd8ec1ca1,
-    0x79e1abe6, 0xd8e620fa,
-  0x79dfc064, 0xd8e0256a, 0x79ddd498, 0xd8da29f2, 0x79dbe880, 0xd8d42e93,
-    0x79d9fc1d, 0xd8ce334c,
-  0x79d80f6f, 0xd8c8381d, 0x79d62276, 0xd8c23d06, 0x79d43532, 0xd8bc4207,
-    0x79d247a2, 0xd8b64720,
-  0x79d059c8, 0xd8b04c52, 0x79ce6ba2, 0xd8aa519c, 0x79cc7d31, 0xd8a456ff,
-    0x79ca8e75, 0xd89e5c79,
-  0x79c89f6e, 0xd898620c, 0x79c6b01b, 0xd89267b7, 0x79c4c07e, 0xd88c6d7b,
-    0x79c2d095, 0xd8867356,
-  0x79c0e062, 0xd880794b, 0x79beefe3, 0xd87a7f57, 0x79bcff19, 0xd874857c,
-    0x79bb0e04, 0xd86e8bb9,
-  0x79b91ca4, 0xd868920f, 0x79b72af9, 0xd862987d, 0x79b53903, 0xd85c9f04,
-    0x79b346c2, 0xd856a5a3,
-  0x79b15435, 0xd850ac5a, 0x79af615e, 0xd84ab32a, 0x79ad6e3c, 0xd844ba13,
-    0x79ab7ace, 0xd83ec114,
-  0x79a98715, 0xd838c82d, 0x79a79312, 0xd832cf5f, 0x79a59ec3, 0xd82cd6aa,
-    0x79a3aa29, 0xd826de0d,
-  0x79a1b545, 0xd820e589, 0x799fc015, 0xd81aed1d, 0x799dca9a, 0xd814f4ca,
-    0x799bd4d4, 0xd80efc8f,
-  0x7999dec4, 0xd809046e, 0x7997e868, 0xd8030c64, 0x7995f1c1, 0xd7fd1474,
-    0x7993facf, 0xd7f71c9c,
-  0x79920392, 0xd7f124dd, 0x79900c0a, 0xd7eb2d37, 0x798e1438, 0xd7e535a9,
-    0x798c1c1a, 0xd7df3e34,
-  0x798a23b1, 0xd7d946d8, 0x79882afd, 0xd7d34f94, 0x798631ff, 0xd7cd586a,
-    0x798438b5, 0xd7c76158,
-  0x79823f20, 0xd7c16a5f, 0x79804541, 0xd7bb737f, 0x797e4b16, 0xd7b57cb7,
-    0x797c50a1, 0xd7af8609,
-  0x797a55e0, 0xd7a98f73, 0x79785ad5, 0xd7a398f6, 0x79765f7f, 0xd79da293,
-    0x797463de, 0xd797ac48,
-  0x797267f2, 0xd791b616, 0x79706bbb, 0xd78bbffc, 0x796e6f39, 0xd785c9fc,
-    0x796c726c, 0xd77fd415,
-  0x796a7554, 0xd779de47, 0x796877f1, 0xd773e892, 0x79667a44, 0xd76df2f6,
-    0x79647c4c, 0xd767fd72,
-  0x79627e08, 0xd7620808, 0x79607f7a, 0xd75c12b7, 0x795e80a1, 0xd7561d7f,
-    0x795c817d, 0xd7502860,
-  0x795a820e, 0xd74a335b, 0x79588255, 0xd7443e6e, 0x79568250, 0xd73e499a,
-    0x79548201, 0xd73854e0,
-  0x79528167, 0xd732603f, 0x79508082, 0xd72c6bb6, 0x794e7f52, 0xd7267748,
-    0x794c7dd7, 0xd72082f2,
-  0x794a7c12, 0xd71a8eb5, 0x79487a01, 0xd7149a92, 0x794677a6, 0xd70ea688,
-    0x79447500, 0xd708b297,
-  0x79427210, 0xd702bec0, 0x79406ed4, 0xd6fccb01, 0x793e6b4e, 0xd6f6d75d,
-    0x793c677d, 0xd6f0e3d1,
-  0x793a6361, 0xd6eaf05f, 0x79385efa, 0xd6e4fd06, 0x79365a49, 0xd6df09c6,
-    0x7934554d, 0xd6d916a0,
-  0x79325006, 0xd6d32393, 0x79304a74, 0xd6cd30a0, 0x792e4497, 0xd6c73dc6,
-    0x792c3e70, 0xd6c14b05,
-  0x792a37fe, 0xd6bb585e, 0x79283141, 0xd6b565d0, 0x79262a3a, 0xd6af735c,
-    0x792422e8, 0xd6a98101,
-  0x79221b4b, 0xd6a38ec0, 0x79201363, 0xd69d9c98, 0x791e0b31, 0xd697aa8a,
-    0x791c02b4, 0xd691b895,
-  0x7919f9ec, 0xd68bc6ba, 0x7917f0d9, 0xd685d4f9, 0x7915e77c, 0xd67fe351,
-    0x7913ddd4, 0xd679f1c2,
-  0x7911d3e2, 0xd674004e, 0x790fc9a4, 0xd66e0ef2, 0x790dbf1d, 0xd6681db1,
-    0x790bb44a, 0xd6622c89,
-  0x7909a92d, 0xd65c3b7b, 0x79079dc5, 0xd6564a87, 0x79059212, 0xd65059ac,
-    0x79038615, 0xd64a68eb,
-  0x790179cd, 0xd6447844, 0x78ff6d3b, 0xd63e87b6, 0x78fd605d, 0xd6389742,
-    0x78fb5336, 0xd632a6e8,
-  0x78f945c3, 0xd62cb6a8, 0x78f73806, 0xd626c681, 0x78f529fe, 0xd620d675,
-    0x78f31bac, 0xd61ae682,
-  0x78f10d0f, 0xd614f6a9, 0x78eefe28, 0xd60f06ea, 0x78eceef6, 0xd6091745,
-    0x78eadf79, 0xd60327b9,
-  0x78e8cfb2, 0xd5fd3848, 0x78e6bfa0, 0xd5f748f0, 0x78e4af44, 0xd5f159b3,
-    0x78e29e9d, 0xd5eb6a8f,
-  0x78e08dab, 0xd5e57b85, 0x78de7c6f, 0xd5df8c96, 0x78dc6ae8, 0xd5d99dc0,
-    0x78da5917, 0xd5d3af04,
-  0x78d846fb, 0xd5cdc062, 0x78d63495, 0xd5c7d1db, 0x78d421e4, 0xd5c1e36d,
-    0x78d20ee9, 0xd5bbf519,
-  0x78cffba3, 0xd5b606e0, 0x78cde812, 0xd5b018c0, 0x78cbd437, 0xd5aa2abb,
-    0x78c9c012, 0xd5a43cd0,
-  0x78c7aba2, 0xd59e4eff, 0x78c596e7, 0xd5986148, 0x78c381e2, 0xd59273ab,
-    0x78c16c93, 0xd58c8628,
-  0x78bf56f9, 0xd58698c0, 0x78bd4114, 0xd580ab72, 0x78bb2ae5, 0xd57abe3d,
-    0x78b9146c, 0xd574d124,
-  0x78b6fda8, 0xd56ee424, 0x78b4e69a, 0xd568f73f, 0x78b2cf41, 0xd5630a74,
-    0x78b0b79e, 0xd55d1dc3,
-  0x78ae9fb0, 0xd557312d, 0x78ac8778, 0xd55144b0, 0x78aa6ef5, 0xd54b584f,
-    0x78a85628, 0xd5456c07,
-  0x78a63d11, 0xd53f7fda, 0x78a423af, 0xd53993c7, 0x78a20a03, 0xd533a7cf,
-    0x789ff00c, 0xd52dbbf1,
-  0x789dd5cb, 0xd527d02e, 0x789bbb3f, 0xd521e484, 0x7899a06a, 0xd51bf8f6,
-    0x78978549, 0xd5160d82,
-  0x789569df, 0xd5102228, 0x78934e2a, 0xd50a36e9, 0x7891322a, 0xd5044bc4,
-    0x788f15e0, 0xd4fe60ba,
-  0x788cf94c, 0xd4f875ca, 0x788adc6e, 0xd4f28af5, 0x7888bf45, 0xd4eca03a,
-    0x7886a1d1, 0xd4e6b59a,
-  0x78848414, 0xd4e0cb15, 0x7882660c, 0xd4dae0aa, 0x788047ba, 0xd4d4f65a,
-    0x787e291d, 0xd4cf0c24,
-  0x787c0a36, 0xd4c92209, 0x7879eb05, 0xd4c33809, 0x7877cb89, 0xd4bd4e23,
-    0x7875abc3, 0xd4b76458,
-  0x78738bb3, 0xd4b17aa8, 0x78716b59, 0xd4ab9112, 0x786f4ab4, 0xd4a5a798,
-    0x786d29c5, 0xd49fbe37,
-  0x786b088c, 0xd499d4f2, 0x7868e708, 0xd493ebc8, 0x7866c53a, 0xd48e02b8,
-    0x7864a322, 0xd48819c3,
-  0x786280bf, 0xd48230e9, 0x78605e13, 0xd47c4829, 0x785e3b1c, 0xd4765f85,
-    0x785c17db, 0xd47076fb,
-  0x7859f44f, 0xd46a8e8d, 0x7857d079, 0xd464a639, 0x7855ac5a, 0xd45ebe00,
-    0x785387ef, 0xd458d5e2,
-  0x7851633b, 0xd452eddf, 0x784f3e3c, 0xd44d05f6, 0x784d18f4, 0xd4471e29,
-    0x784af361, 0xd4413677,
-  0x7848cd83, 0xd43b4ee0, 0x7846a75c, 0xd4356763, 0x784480ea, 0xd42f8002,
-    0x78425a2f, 0xd42998bc,
-  0x78403329, 0xd423b191, 0x783e0bd9, 0xd41dca81, 0x783be43e, 0xd417e38c,
-    0x7839bc5a, 0xd411fcb2,
-  0x7837942b, 0xd40c15f3, 0x78356bb2, 0xd4062f4f, 0x783342ef, 0xd40048c6,
-    0x783119e2, 0xd3fa6259,
-  0x782ef08b, 0xd3f47c06, 0x782cc6ea, 0xd3ee95cf, 0x782a9cfe, 0xd3e8afb3,
-    0x782872c8, 0xd3e2c9b2,
-  0x78264849, 0xd3dce3cd, 0x78241d7f, 0xd3d6fe03, 0x7821f26b, 0xd3d11853,
-    0x781fc70d, 0xd3cb32c0,
-  0x781d9b65, 0xd3c54d47, 0x781b6f72, 0xd3bf67ea, 0x78194336, 0xd3b982a8,
-    0x781716b0, 0xd3b39d81,
-  0x7814e9df, 0xd3adb876, 0x7812bcc4, 0xd3a7d385, 0x78108f60, 0xd3a1eeb1,
-    0x780e61b1, 0xd39c09f7,
-  0x780c33b8, 0xd396255a, 0x780a0575, 0xd39040d7, 0x7807d6e9, 0xd38a5c70,
-    0x7805a812, 0xd3847824,
-  0x780378f1, 0xd37e93f4, 0x78014986, 0xd378afdf, 0x77ff19d1, 0xd372cbe6,
-    0x77fce9d2, 0xd36ce808,
-  0x77fab989, 0xd3670446, 0x77f888f6, 0xd361209f, 0x77f65819, 0xd35b3d13,
-    0x77f426f2, 0xd35559a4,
-  0x77f1f581, 0xd34f764f, 0x77efc3c5, 0xd3499317, 0x77ed91c0, 0xd343affa,
-    0x77eb5f71, 0xd33dccf8,
-  0x77e92cd9, 0xd337ea12, 0x77e6f9f6, 0xd3320748, 0x77e4c6c9, 0xd32c2499,
-    0x77e29352, 0xd3264206,
-  0x77e05f91, 0xd3205f8f, 0x77de2b86, 0xd31a7d33, 0x77dbf732, 0xd3149af3,
-    0x77d9c293, 0xd30eb8cf,
-  0x77d78daa, 0xd308d6c7, 0x77d55878, 0xd302f4da, 0x77d322fc, 0xd2fd1309,
-    0x77d0ed35, 0xd2f73154,
-  0x77ceb725, 0xd2f14fba, 0x77cc80cb, 0xd2eb6e3c, 0x77ca4a27, 0xd2e58cdb,
-    0x77c81339, 0xd2dfab95,
-  0x77c5dc01, 0xd2d9ca6a, 0x77c3a47f, 0xd2d3e95c, 0x77c16cb4, 0xd2ce0869,
-    0x77bf349f, 0xd2c82793,
-  0x77bcfc3f, 0xd2c246d8, 0x77bac396, 0xd2bc6639, 0x77b88aa3, 0xd2b685b6,
-    0x77b65166, 0xd2b0a54f,
-  0x77b417df, 0xd2aac504, 0x77b1de0f, 0xd2a4e4d5, 0x77afa3f5, 0xd29f04c2,
-    0x77ad6990, 0xd29924cb,
-  0x77ab2ee2, 0xd29344f0, 0x77a8f3ea, 0xd28d6531, 0x77a6b8a9, 0xd287858e,
-    0x77a47d1d, 0xd281a607,
-  0x77a24148, 0xd27bc69c, 0x77a00529, 0xd275e74d, 0x779dc8c0, 0xd270081b,
-    0x779b8c0e, 0xd26a2904,
-  0x77994f11, 0xd2644a0a, 0x779711cb, 0xd25e6b2b, 0x7794d43b, 0xd2588c69,
-    0x77929661, 0xd252adc3,
-  0x7790583e, 0xd24ccf39, 0x778e19d0, 0xd246f0cb, 0x778bdb19, 0xd241127a,
-    0x77899c19, 0xd23b3444,
-  0x77875cce, 0xd235562b, 0x77851d3a, 0xd22f782f, 0x7782dd5c, 0xd2299a4e,
-    0x77809d35, 0xd223bc8a,
-  0x777e5cc3, 0xd21ddee2, 0x777c1c08, 0xd2180156, 0x7779db03, 0xd21223e7,
-    0x777799b5, 0xd20c4694,
-  0x7775581d, 0xd206695d, 0x7773163b, 0xd2008c43, 0x7770d40f, 0xd1faaf45,
-    0x776e919a, 0xd1f4d263,
-  0x776c4edb, 0xd1eef59e, 0x776a0bd3, 0xd1e918f5, 0x7767c880, 0xd1e33c69,
-    0x776584e5, 0xd1dd5ff9,
-  0x776340ff, 0xd1d783a6, 0x7760fcd0, 0xd1d1a76f, 0x775eb857, 0xd1cbcb54,
-    0x775c7395, 0xd1c5ef56,
-  0x775a2e89, 0xd1c01375, 0x7757e933, 0xd1ba37b0, 0x7755a394, 0xd1b45c08,
-    0x77535dab, 0xd1ae807c,
-  0x77511778, 0xd1a8a50d, 0x774ed0fc, 0xd1a2c9ba, 0x774c8a36, 0xd19cee84,
-    0x774a4327, 0xd197136b,
-  0x7747fbce, 0xd191386e, 0x7745b42c, 0xd18b5d8e, 0x77436c40, 0xd18582ca,
-    0x7741240a, 0xd17fa823,
-  0x773edb8b, 0xd179cd99, 0x773c92c2, 0xd173f32c, 0x773a49b0, 0xd16e18db,
-    0x77380054, 0xd1683ea7,
-  0x7735b6af, 0xd1626490, 0x77336cc0, 0xd15c8a95, 0x77312287, 0xd156b0b7,
-    0x772ed805, 0xd150d6f6,
-  0x772c8d3a, 0xd14afd52, 0x772a4225, 0xd14523cb, 0x7727f6c6, 0xd13f4a60,
-    0x7725ab1f, 0xd1397113,
-  0x77235f2d, 0xd13397e2, 0x772112f2, 0xd12dbece, 0x771ec66e, 0xd127e5d7,
-    0x771c79a0, 0xd1220cfc,
-  0x771a2c88, 0xd11c343f, 0x7717df27, 0xd1165b9f, 0x7715917d, 0xd110831b,
-    0x77134389, 0xd10aaab5,
-  0x7710f54c, 0xd104d26b, 0x770ea6c5, 0xd0fefa3f, 0x770c57f5, 0xd0f9222f,
-    0x770a08dc, 0xd0f34a3d,
-  0x7707b979, 0xd0ed7267, 0x770569cc, 0xd0e79aaf, 0x770319d6, 0xd0e1c313,
-    0x7700c997, 0xd0dbeb95,
-  0x76fe790e, 0xd0d61434, 0x76fc283c, 0xd0d03cf0, 0x76f9d721, 0xd0ca65c9,
-    0x76f785bc, 0xd0c48ebf,
-  0x76f5340e, 0xd0beb7d2, 0x76f2e216, 0xd0b8e102, 0x76f08fd5, 0xd0b30a50,
-    0x76ee3d4b, 0xd0ad33ba,
-  0x76ebea77, 0xd0a75d42, 0x76e9975a, 0xd0a186e7, 0x76e743f4, 0xd09bb0aa,
-    0x76e4f044, 0xd095da89,
-  0x76e29c4b, 0xd0900486, 0x76e04808, 0xd08a2ea0, 0x76ddf37c, 0xd08458d7,
-    0x76db9ea7, 0xd07e832c,
-  0x76d94989, 0xd078ad9e, 0x76d6f421, 0xd072d82d, 0x76d49e70, 0xd06d02da,
-    0x76d24876, 0xd0672da3,
-  0x76cff232, 0xd061588b, 0x76cd9ba5, 0xd05b838f, 0x76cb44cf, 0xd055aeb1,
-    0x76c8edb0, 0xd04fd9f1,
-  0x76c69647, 0xd04a054e, 0x76c43e95, 0xd04430c8, 0x76c1e699, 0xd03e5c60,
-    0x76bf8e55, 0xd0388815,
-  0x76bd35c7, 0xd032b3e7, 0x76badcf0, 0xd02cdfd8, 0x76b883d0, 0xd0270be5,
-    0x76b62a66, 0xd0213810,
-  0x76b3d0b4, 0xd01b6459, 0x76b176b8, 0xd01590bf, 0x76af1c72, 0xd00fbd43,
-    0x76acc1e4, 0xd009e9e4,
-  0x76aa670d, 0xd00416a3, 0x76a80bec, 0xcffe4380, 0x76a5b082, 0xcff8707a,
-    0x76a354cf, 0xcff29d92,
-  0x76a0f8d2, 0xcfeccac7, 0x769e9c8d, 0xcfe6f81a, 0x769c3ffe, 0xcfe1258b,
-    0x7699e326, 0xcfdb531a,
-  0x76978605, 0xcfd580c6, 0x7695289b, 0xcfcfae8f, 0x7692cae8, 0xcfc9dc77,
-    0x76906ceb, 0xcfc40a7c,
-  0x768e0ea6, 0xcfbe389f, 0x768bb017, 0xcfb866e0, 0x7689513f, 0xcfb2953f,
-    0x7686f21e, 0xcfacc3bb,
-  0x768492b4, 0xcfa6f255, 0x76823301, 0xcfa1210d, 0x767fd304, 0xcf9b4fe3,
-    0x767d72bf, 0xcf957ed7,
-  0x767b1231, 0xcf8fade9, 0x7678b159, 0xcf89dd18, 0x76765038, 0xcf840c65,
-    0x7673eecf, 0xcf7e3bd1,
-  0x76718d1c, 0xcf786b5a, 0x766f2b20, 0xcf729b01, 0x766cc8db, 0xcf6ccac6,
-    0x766a664d, 0xcf66faa9,
-  0x76680376, 0xcf612aaa, 0x7665a056, 0xcf5b5ac9, 0x76633ced, 0xcf558b06,
-    0x7660d93b, 0xcf4fbb61,
-  0x765e7540, 0xcf49ebda, 0x765c10fc, 0xcf441c71, 0x7659ac6f, 0xcf3e4d26,
-    0x76574798, 0xcf387dfa,
-  0x7654e279, 0xcf32aeeb, 0x76527d11, 0xcf2cdffa, 0x76501760, 0xcf271128,
-    0x764db166, 0xcf214274,
-  0x764b4b23, 0xcf1b73de, 0x7648e497, 0xcf15a566, 0x76467dc2, 0xcf0fd70c,
-    0x764416a4, 0xcf0a08d0,
-  0x7641af3d, 0xcf043ab3, 0x763f478d, 0xcefe6cb3, 0x763cdf94, 0xcef89ed2,
-    0x763a7752, 0xcef2d110,
-  0x76380ec8, 0xceed036b, 0x7635a5f4, 0xcee735e5, 0x76333cd8, 0xcee1687d,
-    0x7630d372, 0xcedb9b33,
-  0x762e69c4, 0xced5ce08, 0x762bffcd, 0xced000fb, 0x7629958c, 0xceca340c,
-    0x76272b03, 0xcec4673c,
-  0x7624c031, 0xcebe9a8a, 0x76225517, 0xceb8cdf7, 0x761fe9b3, 0xceb30181,
-    0x761d7e06, 0xcead352b,
-  0x761b1211, 0xcea768f2, 0x7618a5d3, 0xcea19cd8, 0x7616394c, 0xce9bd0dd,
-    0x7613cc7c, 0xce960500,
-  0x76115f63, 0xce903942, 0x760ef201, 0xce8a6da2, 0x760c8457, 0xce84a220,
-    0x760a1664, 0xce7ed6bd,
-  0x7607a828, 0xce790b79, 0x760539a3, 0xce734053, 0x7602cad5, 0xce6d754c,
-    0x76005bbf, 0xce67aa63,
-  0x75fdec60, 0xce61df99, 0x75fb7cb8, 0xce5c14ed, 0x75f90cc7, 0xce564a60,
-    0x75f69c8d, 0xce507ff2,
-  0x75f42c0b, 0xce4ab5a2, 0x75f1bb40, 0xce44eb71, 0x75ef4a2c, 0xce3f215f,
-    0x75ecd8cf, 0xce39576c,
-  0x75ea672a, 0xce338d97, 0x75e7f53c, 0xce2dc3e1, 0x75e58305, 0xce27fa49,
-    0x75e31086, 0xce2230d0,
-  0x75e09dbd, 0xce1c6777, 0x75de2aac, 0xce169e3b, 0x75dbb753, 0xce10d51f,
-    0x75d943b0, 0xce0b0c21,
-  0x75d6cfc5, 0xce054343, 0x75d45b92, 0xcdff7a83, 0x75d1e715, 0xcdf9b1e2,
-    0x75cf7250, 0xcdf3e95f,
-  0x75ccfd42, 0xcdee20fc, 0x75ca87ec, 0xcde858b8, 0x75c8124d, 0xcde29092,
-    0x75c59c65, 0xcddcc88b,
-  0x75c32634, 0xcdd700a4, 0x75c0afbb, 0xcdd138db, 0x75be38fa, 0xcdcb7131,
-    0x75bbc1ef, 0xcdc5a9a6,
-  0x75b94a9c, 0xcdbfe23a, 0x75b6d301, 0xcdba1aee, 0x75b45b1d, 0xcdb453c0,
-    0x75b1e2f0, 0xcdae8cb1,
-  0x75af6a7b, 0xcda8c5c1, 0x75acf1bd, 0xcda2fef0, 0x75aa78b6, 0xcd9d383f,
-    0x75a7ff67, 0xcd9771ac,
-  0x75a585cf, 0xcd91ab39, 0x75a30bef, 0xcd8be4e4, 0x75a091c6, 0xcd861eaf,
-    0x759e1755, 0xcd805899,
-  0x759b9c9b, 0xcd7a92a2, 0x75992198, 0xcd74ccca, 0x7596a64d, 0xcd6f0711,
-    0x75942ab9, 0xcd694178,
-  0x7591aedd, 0xcd637bfe, 0x758f32b9, 0xcd5db6a3, 0x758cb64c, 0xcd57f167,
-    0x758a3996, 0xcd522c4a,
-  0x7587bc98, 0xcd4c674d, 0x75853f51, 0xcd46a26f, 0x7582c1c2, 0xcd40ddb0,
-    0x758043ea, 0xcd3b1911,
-  0x757dc5ca, 0xcd355491, 0x757b4762, 0xcd2f9030, 0x7578c8b0, 0xcd29cbee,
-    0x757649b7, 0xcd2407cc,
-  0x7573ca75, 0xcd1e43ca, 0x75714aea, 0xcd187fe6, 0x756ecb18, 0xcd12bc22,
-    0x756c4afc, 0xcd0cf87e,
-  0x7569ca99, 0xcd0734f9, 0x756749ec, 0xcd017193, 0x7564c8f8, 0xccfbae4d,
-    0x756247bb, 0xccf5eb26,
-  0x755fc635, 0xccf0281f, 0x755d4467, 0xccea6538, 0x755ac251, 0xcce4a26f,
-    0x75583ff3, 0xccdedfc7,
-  0x7555bd4c, 0xccd91d3d, 0x75533a5c, 0xccd35ad4, 0x7550b725, 0xcccd988a,
-    0x754e33a4, 0xccc7d65f,
-  0x754bafdc, 0xccc21455, 0x75492bcb, 0xccbc5269, 0x7546a772, 0xccb6909e,
-    0x754422d0, 0xccb0cef2,
-  0x75419de7, 0xccab0d65, 0x753f18b4, 0xcca54bf9, 0x753c933a, 0xcc9f8aac,
-    0x753a0d77, 0xcc99c97e,
-  0x7537876c, 0xcc940871, 0x75350118, 0xcc8e4783, 0x75327a7d, 0xcc8886b5,
-    0x752ff399, 0xcc82c607,
-  0x752d6c6c, 0xcc7d0578, 0x752ae4f8, 0xcc774509, 0x75285d3b, 0xcc7184ba,
-    0x7525d536, 0xcc6bc48b,
-  0x75234ce8, 0xcc66047b, 0x7520c453, 0xcc60448c, 0x751e3b75, 0xcc5a84bc,
-    0x751bb24f, 0xcc54c50c,
-  0x751928e0, 0xcc4f057c, 0x75169f2a, 0xcc49460c, 0x7514152b, 0xcc4386bc,
-    0x75118ae4, 0xcc3dc78b,
-  0x750f0054, 0xcc38087b, 0x750c757d, 0xcc32498a, 0x7509ea5d, 0xcc2c8aba,
-    0x75075ef5, 0xcc26cc09,
-  0x7504d345, 0xcc210d79, 0x7502474d, 0xcc1b4f08, 0x74ffbb0d, 0xcc1590b8,
-    0x74fd2e84, 0xcc0fd287,
-  0x74faa1b3, 0xcc0a1477, 0x74f8149a, 0xcc045686, 0x74f58739, 0xcbfe98b6,
-    0x74f2f990, 0xcbf8db05,
-  0x74f06b9e, 0xcbf31d75, 0x74eddd65, 0xcbed6005, 0x74eb4ee3, 0xcbe7a2b5,
-    0x74e8c01a, 0xcbe1e585,
-  0x74e63108, 0xcbdc2876, 0x74e3a1ae, 0xcbd66b86, 0x74e1120c, 0xcbd0aeb7,
-    0x74de8221, 0xcbcaf208,
-  0x74dbf1ef, 0xcbc53579, 0x74d96175, 0xcbbf790a, 0x74d6d0b2, 0xcbb9bcbb,
-    0x74d43fa8, 0xcbb4008d,
-  0x74d1ae55, 0xcbae447f, 0x74cf1cbb, 0xcba88891, 0x74cc8ad8, 0xcba2ccc4,
-    0x74c9f8ad, 0xcb9d1117,
-  0x74c7663a, 0xcb97558a, 0x74c4d380, 0xcb919a1d, 0x74c2407d, 0xcb8bded1,
-    0x74bfad32, 0xcb8623a5,
-  0x74bd199f, 0xcb80689a, 0x74ba85c4, 0xcb7aadaf, 0x74b7f1a1, 0xcb74f2e4,
-    0x74b55d36, 0xcb6f383a,
-  0x74b2c884, 0xcb697db0, 0x74b03389, 0xcb63c347, 0x74ad9e46, 0xcb5e08fe,
-    0x74ab08bb, 0xcb584ed6,
-  0x74a872e8, 0xcb5294ce, 0x74a5dccd, 0xcb4cdae6, 0x74a3466b, 0xcb47211f,
-    0x74a0afc0, 0xcb416779,
-  0x749e18cd, 0xcb3badf3, 0x749b8193, 0xcb35f48d, 0x7498ea11, 0xcb303b49,
-    0x74965246, 0xcb2a8224,
-  0x7493ba34, 0xcb24c921, 0x749121da, 0xcb1f103e, 0x748e8938, 0xcb19577b,
-    0x748bf04d, 0xcb139ed9,
-  0x7489571c, 0xcb0de658, 0x7486bda2, 0xcb082df8, 0x748423e0, 0xcb0275b8,
-    0x748189d7, 0xcafcbd99,
-  0x747eef85, 0xcaf7059a, 0x747c54ec, 0xcaf14dbd, 0x7479ba0b, 0xcaeb9600,
-    0x74771ee2, 0xcae5de64,
-  0x74748371, 0xcae026e8, 0x7471e7b8, 0xcada6f8d, 0x746f4bb8, 0xcad4b853,
-    0x746caf70, 0xcacf013a,
-  0x746a12df, 0xcac94a42, 0x74677608, 0xcac3936b, 0x7464d8e8, 0xcabddcb4,
-    0x74623b80, 0xcab8261e,
-  0x745f9dd1, 0xcab26fa9, 0x745cffda, 0xcaacb955, 0x745a619b, 0xcaa70322,
-    0x7457c314, 0xcaa14d10,
-  0x74552446, 0xca9b971e, 0x74528530, 0xca95e14e, 0x744fe5d2, 0xca902b9f,
-    0x744d462c, 0xca8a7610,
-  0x744aa63f, 0xca84c0a3, 0x7448060a, 0xca7f0b56, 0x7445658d, 0xca79562b,
-    0x7442c4c8, 0xca73a120,
-  0x744023bc, 0xca6dec37, 0x743d8268, 0xca68376e, 0x743ae0cc, 0xca6282c7,
-    0x74383ee9, 0xca5cce40,
-  0x74359cbd, 0xca5719db, 0x7432fa4b, 0xca516597, 0x74305790, 0xca4bb174,
-    0x742db48e, 0xca45fd72,
-  0x742b1144, 0xca404992, 0x74286db3, 0xca3a95d2, 0x7425c9da, 0xca34e234,
-    0x742325b9, 0xca2f2eb6,
-  0x74208150, 0xca297b5a, 0x741ddca0, 0xca23c820, 0x741b37a9, 0xca1e1506,
-    0x74189269, 0xca18620e,
-  0x7415ece2, 0xca12af37, 0x74134714, 0xca0cfc81, 0x7410a0fe, 0xca0749ec,
-    0x740dfaa0, 0xca019779,
-  0x740b53fb, 0xc9fbe527, 0x7408ad0e, 0xc9f632f6, 0x740605d9, 0xc9f080e7,
-    0x74035e5d, 0xc9eacef9,
-  0x7400b69a, 0xc9e51d2d, 0x73fe0e8f, 0xc9df6b81, 0x73fb663c, 0xc9d9b9f7,
-    0x73f8bda2, 0xc9d4088f,
-  0x73f614c0, 0xc9ce5748, 0x73f36b97, 0xc9c8a622, 0x73f0c226, 0xc9c2f51e,
-    0x73ee186e, 0xc9bd443c,
-  0x73eb6e6e, 0xc9b7937a, 0x73e8c426, 0xc9b1e2db, 0x73e61997, 0xc9ac325d,
-    0x73e36ec1, 0xc9a68200,
-  0x73e0c3a3, 0xc9a0d1c5, 0x73de183e, 0xc99b21ab, 0x73db6c91, 0xc99571b3,
-    0x73d8c09d, 0xc98fc1dc,
-  0x73d61461, 0xc98a1227, 0x73d367de, 0xc9846294, 0x73d0bb13, 0xc97eb322,
-    0x73ce0e01, 0xc97903d2,
-  0x73cb60a8, 0xc97354a4, 0x73c8b307, 0xc96da597, 0x73c6051f, 0xc967f6ac,
-    0x73c356ef, 0xc96247e2,
-  0x73c0a878, 0xc95c993a, 0x73bdf9b9, 0xc956eab4, 0x73bb4ab3, 0xc9513c50,
-    0x73b89b66, 0xc94b8e0d,
-  0x73b5ebd1, 0xc945dfec, 0x73b33bf5, 0xc94031ed, 0x73b08bd1, 0xc93a8410,
-    0x73addb67, 0xc934d654,
-  0x73ab2ab4, 0xc92f28ba, 0x73a879bb, 0xc9297b42, 0x73a5c87a, 0xc923cdec,
-    0x73a316f2, 0xc91e20b8,
-  0x73a06522, 0xc91873a5, 0x739db30b, 0xc912c6b5, 0x739b00ad, 0xc90d19e6,
-    0x73984e07, 0xc9076d39,
-  0x73959b1b, 0xc901c0ae, 0x7392e7e6, 0xc8fc1445, 0x7390346b, 0xc8f667fe,
-    0x738d80a8, 0xc8f0bbd9,
-  0x738acc9e, 0xc8eb0fd6, 0x7388184d, 0xc8e563f5, 0x738563b5, 0xc8dfb836,
-    0x7382aed5, 0xc8da0c99,
-  0x737ff9ae, 0xc8d4611d, 0x737d4440, 0xc8ceb5c4, 0x737a8e8a, 0xc8c90a8d,
-    0x7377d88d, 0xc8c35f78,
-  0x73752249, 0xc8bdb485, 0x73726bbe, 0xc8b809b4, 0x736fb4ec, 0xc8b25f06,
-    0x736cfdd2, 0xc8acb479,
-  0x736a4671, 0xc8a70a0e, 0x73678ec9, 0xc8a15fc6, 0x7364d6da, 0xc89bb5a0,
-    0x73621ea4, 0xc8960b9c,
-  0x735f6626, 0xc89061ba, 0x735cad61, 0xc88ab7fa, 0x7359f456, 0xc8850e5d,
-    0x73573b03, 0xc87f64e2,
-  0x73548168, 0xc879bb89, 0x7351c787, 0xc8741252, 0x734f0d5f, 0xc86e693d,
-    0x734c52ef, 0xc868c04b,
-  0x73499838, 0xc863177b, 0x7346dd3a, 0xc85d6ece, 0x734421f6, 0xc857c642,
-    0x7341666a, 0xc8521dd9,
-  0x733eaa96, 0xc84c7593, 0x733bee7c, 0xc846cd6e, 0x7339321b, 0xc841256d,
-    0x73367572, 0xc83b7d8d,
-  0x7333b883, 0xc835d5d0, 0x7330fb4d, 0xc8302e35, 0x732e3dcf, 0xc82a86bd,
-    0x732b800a, 0xc824df67,
-  0x7328c1ff, 0xc81f3834, 0x732603ac, 0xc8199123, 0x73234512, 0xc813ea35,
-    0x73208632, 0xc80e4369,
-  0x731dc70a, 0xc8089cbf, 0x731b079b, 0xc802f638, 0x731847e5, 0xc7fd4fd4,
-    0x731587e8, 0xc7f7a992,
-  0x7312c7a5, 0xc7f20373, 0x7310071a, 0xc7ec5d76, 0x730d4648, 0xc7e6b79c,
-    0x730a8530, 0xc7e111e5,
-  0x7307c3d0, 0xc7db6c50, 0x73050229, 0xc7d5c6de, 0x7302403c, 0xc7d0218e,
-    0x72ff7e07, 0xc7ca7c61,
-  0x72fcbb8c, 0xc7c4d757, 0x72f9f8c9, 0xc7bf3270, 0x72f735c0, 0xc7b98dab,
-    0x72f47270, 0xc7b3e909,
-  0x72f1aed9, 0xc7ae4489, 0x72eeeafb, 0xc7a8a02c, 0x72ec26d6, 0xc7a2fbf3,
-    0x72e9626a, 0xc79d57db,
-  0x72e69db7, 0xc797b3e7, 0x72e3d8be, 0xc7921015, 0x72e1137d, 0xc78c6c67,
-    0x72de4df6, 0xc786c8db,
-  0x72db8828, 0xc7812572, 0x72d8c213, 0xc77b822b, 0x72d5fbb7, 0xc775df08,
-    0x72d33514, 0xc7703c08,
-  0x72d06e2b, 0xc76a992a, 0x72cda6fb, 0xc764f66f, 0x72cadf83, 0xc75f53d7,
-    0x72c817c6, 0xc759b163,
-  0x72c54fc1, 0xc7540f11, 0x72c28775, 0xc74e6ce2, 0x72bfbee3, 0xc748cad6,
-    0x72bcf60a, 0xc74328ed,
-  0x72ba2cea, 0xc73d8727, 0x72b76383, 0xc737e584, 0x72b499d6, 0xc7324404,
-    0x72b1cfe1, 0xc72ca2a7,
-  0x72af05a7, 0xc727016d, 0x72ac3b25, 0xc7216056, 0x72a9705c, 0xc71bbf62,
-    0x72a6a54d, 0xc7161e92,
-  0x72a3d9f7, 0xc7107de4, 0x72a10e5b, 0xc70add5a, 0x729e4277, 0xc7053cf2,
-    0x729b764d, 0xc6ff9cae,
-  0x7298a9dd, 0xc6f9fc8d, 0x7295dd25, 0xc6f45c8f, 0x72931027, 0xc6eebcb5,
-    0x729042e3, 0xc6e91cfd,
-  0x728d7557, 0xc6e37d69, 0x728aa785, 0xc6ddddf8, 0x7287d96c, 0xc6d83eab,
-    0x72850b0d, 0xc6d29f80,
-  0x72823c67, 0xc6cd0079, 0x727f6d7a, 0xc6c76195, 0x727c9e47, 0xc6c1c2d4,
-    0x7279cecd, 0xc6bc2437,
-  0x7276ff0d, 0xc6b685bd, 0x72742f05, 0xc6b0e767, 0x72715eb8, 0xc6ab4933,
-    0x726e8e23, 0xc6a5ab23,
-  0x726bbd48, 0xc6a00d37, 0x7268ec27, 0xc69a6f6e, 0x72661abf, 0xc694d1c8,
-    0x72634910, 0xc68f3446,
-  0x7260771b, 0xc68996e7, 0x725da4df, 0xc683f9ab, 0x725ad25d, 0xc67e5c93,
-    0x7257ff94, 0xc678bf9f,
-  0x72552c85, 0xc67322ce, 0x7252592f, 0xc66d8620, 0x724f8593, 0xc667e996,
-    0x724cb1b0, 0xc6624d30,
-  0x7249dd86, 0xc65cb0ed, 0x72470916, 0xc65714cd, 0x72443460, 0xc65178d1,
-    0x72415f63, 0xc64bdcf9,
-  0x723e8a20, 0xc6464144, 0x723bb496, 0xc640a5b3, 0x7238dec5, 0xc63b0a46,
-    0x723608af, 0xc6356efc,
-  0x72333251, 0xc62fd3d6, 0x72305bae, 0xc62a38d4, 0x722d84c4, 0xc6249df5,
-    0x722aad93, 0xc61f033a,
-  0x7227d61c, 0xc61968a2, 0x7224fe5f, 0xc613ce2f, 0x7222265b, 0xc60e33df,
-    0x721f4e11, 0xc60899b2,
-  0x721c7580, 0xc602ffaa, 0x72199ca9, 0xc5fd65c5, 0x7216c38c, 0xc5f7cc04,
-    0x7213ea28, 0xc5f23267,
-  0x7211107e, 0xc5ec98ee, 0x720e368d, 0xc5e6ff98, 0x720b5c57, 0xc5e16667,
-    0x720881d9, 0xc5dbcd59,
-  0x7205a716, 0xc5d6346f, 0x7202cc0c, 0xc5d09ba9, 0x71fff0bc, 0xc5cb0307,
-    0x71fd1525, 0xc5c56a89,
-  0x71fa3949, 0xc5bfd22e, 0x71f75d25, 0xc5ba39f8, 0x71f480bc, 0xc5b4a1e5,
-    0x71f1a40c, 0xc5af09f7,
-  0x71eec716, 0xc5a9722c, 0x71ebe9da, 0xc5a3da86, 0x71e90c57, 0xc59e4303,
-    0x71e62e8f, 0xc598aba5,
-  0x71e35080, 0xc593146a, 0x71e0722a, 0xc58d7d54, 0x71dd938f, 0xc587e661,
-    0x71dab4ad, 0xc5824f93,
-  0x71d7d585, 0xc57cb8e9, 0x71d4f617, 0xc5772263, 0x71d21662, 0xc5718c00,
-    0x71cf3667, 0xc56bf5c2,
-  0x71cc5626, 0xc5665fa9, 0x71c9759f, 0xc560c9b3, 0x71c694d2, 0xc55b33e2,
-    0x71c3b3bf, 0xc5559e34,
-  0x71c0d265, 0xc55008ab, 0x71bdf0c5, 0xc54a7346, 0x71bb0edf, 0xc544de05,
-    0x71b82cb3, 0xc53f48e9,
-  0x71b54a41, 0xc539b3f1, 0x71b26788, 0xc5341f1d, 0x71af848a, 0xc52e8a6d,
-    0x71aca145, 0xc528f5e1,
-  0x71a9bdba, 0xc523617a, 0x71a6d9e9, 0xc51dcd37, 0x71a3f5d2, 0xc5183919,
-    0x71a11175, 0xc512a51f,
-  0x719e2cd2, 0xc50d1149, 0x719b47e9, 0xc5077d97, 0x719862b9, 0xc501ea0a,
-    0x71957d44, 0xc4fc56a2,
-  0x71929789, 0xc4f6c35d, 0x718fb187, 0xc4f1303d, 0x718ccb3f, 0xc4eb9d42,
-    0x7189e4b2, 0xc4e60a6b,
-  0x7186fdde, 0xc4e077b8, 0x718416c4, 0xc4dae52a, 0x71812f65, 0xc4d552c1,
-    0x717e47bf, 0xc4cfc07c,
-  0x717b5fd3, 0xc4ca2e5b, 0x717877a1, 0xc4c49c5f, 0x71758f29, 0xc4bf0a87,
-    0x7172a66c, 0xc4b978d4,
-  0x716fbd68, 0xc4b3e746, 0x716cd41e, 0xc4ae55dc, 0x7169ea8f, 0xc4a8c497,
-    0x716700b9, 0xc4a33376,
-  0x7164169d, 0xc49da27a, 0x71612c3c, 0xc49811a3, 0x715e4194, 0xc49280f0,
-    0x715b56a7, 0xc48cf062,
-  0x71586b74, 0xc4875ff9, 0x71557ffa, 0xc481cfb4, 0x7152943b, 0xc47c3f94,
-    0x714fa836, 0xc476af98,
-  0x714cbbeb, 0xc4711fc2, 0x7149cf5a, 0xc46b9010, 0x7146e284, 0xc4660083,
-    0x7143f567, 0xc460711b,
-  0x71410805, 0xc45ae1d7, 0x713e1a5c, 0xc45552b8, 0x713b2c6e, 0xc44fc3be,
-    0x71383e3a, 0xc44a34e9,
-  0x71354fc0, 0xc444a639, 0x71326101, 0xc43f17ad, 0x712f71fb, 0xc4398947,
-    0x712c82b0, 0xc433fb05,
-  0x7129931f, 0xc42e6ce8, 0x7126a348, 0xc428def0, 0x7123b32b, 0xc423511d,
-    0x7120c2c8, 0xc41dc36f,
-  0x711dd220, 0xc41835e6, 0x711ae132, 0xc412a882, 0x7117effe, 0xc40d1b42,
-    0x7114fe84, 0xc4078e28,
-  0x71120cc5, 0xc4020133, 0x710f1ac0, 0xc3fc7462, 0x710c2875, 0xc3f6e7b7,
-    0x710935e4, 0xc3f15b31,
-  0x7106430e, 0xc3ebced0, 0x71034ff2, 0xc3e64294, 0x71005c90, 0xc3e0b67d,
-    0x70fd68e9, 0xc3db2a8b,
-  0x70fa74fc, 0xc3d59ebe, 0x70f780c9, 0xc3d01316, 0x70f48c50, 0xc3ca8793,
-    0x70f19792, 0xc3c4fc36,
-  0x70eea28e, 0xc3bf70fd, 0x70ebad45, 0xc3b9e5ea, 0x70e8b7b5, 0xc3b45afc,
-    0x70e5c1e1, 0xc3aed034,
-  0x70e2cbc6, 0xc3a94590, 0x70dfd566, 0xc3a3bb12, 0x70dcdec0, 0xc39e30b8,
-    0x70d9e7d5, 0xc398a685,
-  0x70d6f0a4, 0xc3931c76, 0x70d3f92d, 0xc38d928d, 0x70d10171, 0xc38808c9,
-    0x70ce096f, 0xc3827f2a,
-  0x70cb1128, 0xc37cf5b0, 0x70c8189b, 0xc3776c5c, 0x70c51fc8, 0xc371e32d,
-    0x70c226b0, 0xc36c5a24,
-  0x70bf2d53, 0xc366d140, 0x70bc33b0, 0xc3614881, 0x70b939c7, 0xc35bbfe8,
-    0x70b63f99, 0xc3563774,
-  0x70b34525, 0xc350af26, 0x70b04a6b, 0xc34b26fc, 0x70ad4f6d, 0xc3459ef9,
-    0x70aa5428, 0xc340171b,
-  0x70a7589f, 0xc33a8f62, 0x70a45ccf, 0xc33507cf, 0x70a160ba, 0xc32f8061,
-    0x709e6460, 0xc329f919,
-  0x709b67c0, 0xc32471f7, 0x70986adb, 0xc31eeaf9, 0x70956db1, 0xc3196422,
-    0x70927041, 0xc313dd70,
-  0x708f728b, 0xc30e56e4, 0x708c7490, 0xc308d07d, 0x70897650, 0xc3034a3c,
-    0x708677ca, 0xc2fdc420,
-  0x708378ff, 0xc2f83e2a, 0x708079ee, 0xc2f2b85a, 0x707d7a98, 0xc2ed32af,
-    0x707a7afd, 0xc2e7ad2a,
-  0x70777b1c, 0xc2e227cb, 0x70747af6, 0xc2dca291, 0x70717a8a, 0xc2d71d7e,
-    0x706e79d9, 0xc2d1988f,
-  0x706b78e3, 0xc2cc13c7, 0x706877a7, 0xc2c68f24, 0x70657626, 0xc2c10aa7,
-    0x70627460, 0xc2bb8650,
-  0x705f7255, 0xc2b6021f, 0x705c7004, 0xc2b07e14, 0x70596d6d, 0xc2aafa2e,
-    0x70566a92, 0xc2a5766e,
-  0x70536771, 0xc29ff2d4, 0x7050640b, 0xc29a6f60, 0x704d6060, 0xc294ec12,
-    0x704a5c6f, 0xc28f68e9,
-  0x70475839, 0xc289e5e7, 0x704453be, 0xc284630a, 0x70414efd, 0xc27ee054,
-    0x703e49f8, 0xc2795dc3,
-  0x703b44ad, 0xc273db58, 0x70383f1d, 0xc26e5913, 0x70353947, 0xc268d6f5,
-    0x7032332d, 0xc26354fc,
-  0x702f2ccd, 0xc25dd329, 0x702c2628, 0xc258517c, 0x70291f3e, 0xc252cff5,
-    0x7026180e, 0xc24d4e95,
-  0x7023109a, 0xc247cd5a, 0x702008e0, 0xc2424c46, 0x701d00e1, 0xc23ccb57,
-    0x7019f89d, 0xc2374a8f,
-  0x7016f014, 0xc231c9ec, 0x7013e746, 0xc22c4970, 0x7010de32, 0xc226c91a,
-    0x700dd4da, 0xc22148ea,
-  0x700acb3c, 0xc21bc8e1, 0x7007c159, 0xc21648fd, 0x7004b731, 0xc210c940,
-    0x7001acc4, 0xc20b49a9,
-  0x6ffea212, 0xc205ca38, 0x6ffb971b, 0xc2004aed, 0x6ff88bde, 0xc1facbc9,
-    0x6ff5805d, 0xc1f54cca,
-  0x6ff27497, 0xc1efcdf3, 0x6fef688b, 0xc1ea4f41, 0x6fec5c3b, 0xc1e4d0b6,
-    0x6fe94fa5, 0xc1df5251,
-  0x6fe642ca, 0xc1d9d412, 0x6fe335ab, 0xc1d455f9, 0x6fe02846, 0xc1ced807,
-    0x6fdd1a9c, 0xc1c95a3c,
-  0x6fda0cae, 0xc1c3dc97, 0x6fd6fe7a, 0xc1be5f18, 0x6fd3f001, 0xc1b8e1bf,
-    0x6fd0e144, 0xc1b3648d,
-  0x6fcdd241, 0xc1ade781, 0x6fcac2fa, 0xc1a86a9c, 0x6fc7b36d, 0xc1a2edde,
-    0x6fc4a39c, 0xc19d7145,
-  0x6fc19385, 0xc197f4d4, 0x6fbe832a, 0xc1927888, 0x6fbb728a, 0xc18cfc63,
-    0x6fb861a4, 0xc1878065,
-  0x6fb5507a, 0xc182048d, 0x6fb23f0b, 0xc17c88dc, 0x6faf2d57, 0xc1770d52,
-    0x6fac1b5f, 0xc17191ee,
-  0x6fa90921, 0xc16c16b0, 0x6fa5f69e, 0xc1669b99, 0x6fa2e3d7, 0xc16120a9,
-    0x6f9fd0cb, 0xc15ba5df,
-  0x6f9cbd79, 0xc1562b3d, 0x6f99a9e3, 0xc150b0c0, 0x6f969608, 0xc14b366b,
-    0x6f9381e9, 0xc145bc3c,
-  0x6f906d84, 0xc1404233, 0x6f8d58db, 0xc13ac852, 0x6f8a43ed, 0xc1354e97,
-    0x6f872eba, 0xc12fd503,
-  0x6f841942, 0xc12a5b95, 0x6f810386, 0xc124e24f, 0x6f7ded84, 0xc11f692f,
-    0x6f7ad73e, 0xc119f036,
-  0x6f77c0b3, 0xc1147764, 0x6f74a9e4, 0xc10efeb8, 0x6f7192cf, 0xc1098634,
-    0x6f6e7b76, 0xc1040dd6,
-  0x6f6b63d8, 0xc0fe959f, 0x6f684bf6, 0xc0f91d8f, 0x6f6533ce, 0xc0f3a5a6,
-    0x6f621b62, 0xc0ee2de3,
-  0x6f5f02b2, 0xc0e8b648, 0x6f5be9bc, 0xc0e33ed4, 0x6f58d082, 0xc0ddc786,
-    0x6f55b703, 0xc0d8505f,
-  0x6f529d40, 0xc0d2d960, 0x6f4f8338, 0xc0cd6287, 0x6f4c68eb, 0xc0c7ebd6,
-    0x6f494e5a, 0xc0c2754b,
-  0x6f463383, 0xc0bcfee7, 0x6f431869, 0xc0b788ab, 0x6f3ffd09, 0xc0b21295,
-    0x6f3ce165, 0xc0ac9ca6,
-  0x6f39c57d, 0xc0a726df, 0x6f36a94f, 0xc0a1b13e, 0x6f338cde, 0xc09c3bc5,
-    0x6f307027, 0xc096c673,
-  0x6f2d532c, 0xc0915148, 0x6f2a35ed, 0xc08bdc44, 0x6f271868, 0xc0866767,
-    0x6f23faa0, 0xc080f2b1,
-  0x6f20dc92, 0xc07b7e23, 0x6f1dbe41, 0xc07609bb, 0x6f1a9faa, 0xc070957b,
-    0x6f1780cf, 0xc06b2162,
-  0x6f1461b0, 0xc065ad70, 0x6f11424c, 0xc06039a6, 0x6f0e22a3, 0xc05ac603,
-    0x6f0b02b6, 0xc0555287,
-  0x6f07e285, 0xc04fdf32, 0x6f04c20f, 0xc04a6c05, 0x6f01a155, 0xc044f8fe,
-    0x6efe8056, 0xc03f8620,
-  0x6efb5f12, 0xc03a1368, 0x6ef83d8a, 0xc034a0d8, 0x6ef51bbe, 0xc02f2e6f,
-    0x6ef1f9ad, 0xc029bc2e,
-  0x6eeed758, 0xc0244a14, 0x6eebb4bf, 0xc01ed821, 0x6ee891e1, 0xc0196656,
-    0x6ee56ebe, 0xc013f4b2,
-  0x6ee24b57, 0xc00e8336, 0x6edf27ac, 0xc00911e1, 0x6edc03bc, 0xc003a0b3,
-    0x6ed8df88, 0xbffe2fad,
-  0x6ed5bb10, 0xbff8bece, 0x6ed29653, 0xbff34e17, 0x6ecf7152, 0xbfeddd88,
-    0x6ecc4c0d, 0xbfe86d20,
-  0x6ec92683, 0xbfe2fcdf, 0x6ec600b5, 0xbfdd8cc6, 0x6ec2daa2, 0xbfd81cd5,
-    0x6ebfb44b, 0xbfd2ad0b,
-  0x6ebc8db0, 0xbfcd3d69, 0x6eb966d1, 0xbfc7cdee, 0x6eb63fad, 0xbfc25e9b,
-    0x6eb31845, 0xbfbcef70,
-  0x6eaff099, 0xbfb7806c, 0x6eacc8a8, 0xbfb21190, 0x6ea9a073, 0xbfaca2dc,
-    0x6ea677fa, 0xbfa7344f,
-  0x6ea34f3d, 0xbfa1c5ea, 0x6ea0263b, 0xbf9c57ac, 0x6e9cfcf5, 0xbf96e997,
-    0x6e99d36b, 0xbf917ba9,
-  0x6e96a99d, 0xbf8c0de3, 0x6e937f8a, 0xbf86a044, 0x6e905534, 0xbf8132ce,
-    0x6e8d2a99, 0xbf7bc57f,
-  0x6e89ffb9, 0xbf765858, 0x6e86d496, 0xbf70eb59, 0x6e83a92f, 0xbf6b7e81,
-    0x6e807d83, 0xbf6611d2,
-  0x6e7d5193, 0xbf60a54a, 0x6e7a255f, 0xbf5b38ea, 0x6e76f8e7, 0xbf55ccb2,
-    0x6e73cc2b, 0xbf5060a2,
-  0x6e709f2a, 0xbf4af4ba, 0x6e6d71e6, 0xbf4588fa, 0x6e6a445d, 0xbf401d61,
-    0x6e671690, 0xbf3ab1f1,
-  0x6e63e87f, 0xbf3546a8, 0x6e60ba2a, 0xbf2fdb88, 0x6e5d8b91, 0xbf2a708f,
-    0x6e5a5cb4, 0xbf2505bf,
-  0x6e572d93, 0xbf1f9b16, 0x6e53fe2e, 0xbf1a3096, 0x6e50ce84, 0xbf14c63d,
-    0x6e4d9e97, 0xbf0f5c0d,
-  0x6e4a6e66, 0xbf09f205, 0x6e473df0, 0xbf048824, 0x6e440d37, 0xbeff1e6c,
-    0x6e40dc39, 0xbef9b4dc,
-  0x6e3daaf8, 0xbef44b74, 0x6e3a7972, 0xbeeee234, 0x6e3747a9, 0xbee9791c,
-    0x6e34159b, 0xbee4102d,
-  0x6e30e34a, 0xbedea765, 0x6e2db0b4, 0xbed93ec6, 0x6e2a7ddb, 0xbed3d64f,
-    0x6e274abe, 0xbece6e00,
-  0x6e24175c, 0xbec905d9, 0x6e20e3b7, 0xbec39ddb, 0x6e1dafce, 0xbebe3605,
-    0x6e1a7ba1, 0xbeb8ce57,
-  0x6e174730, 0xbeb366d1, 0x6e14127b, 0xbeadff74, 0x6e10dd82, 0xbea8983f,
-    0x6e0da845, 0xbea33132,
-  0x6e0a72c5, 0xbe9dca4e, 0x6e073d00, 0xbe986391, 0x6e0406f8, 0xbe92fcfe,
-    0x6e00d0ac, 0xbe8d9692,
-  0x6dfd9a1c, 0xbe88304f, 0x6dfa6348, 0xbe82ca35, 0x6df72c30, 0xbe7d6442,
-    0x6df3f4d4, 0xbe77fe78,
-  0x6df0bd35, 0xbe7298d7, 0x6ded8552, 0xbe6d335e, 0x6dea4d2b, 0xbe67ce0d,
-    0x6de714c0, 0xbe6268e5,
-  0x6de3dc11, 0xbe5d03e6, 0x6de0a31f, 0xbe579f0f, 0x6ddd69e9, 0xbe523a60,
-    0x6dda306f, 0xbe4cd5da,
-  0x6dd6f6b1, 0xbe47717c, 0x6dd3bcaf, 0xbe420d47, 0x6dd0826a, 0xbe3ca93b,
-    0x6dcd47e1, 0xbe374557,
-  0x6dca0d14, 0xbe31e19b, 0x6dc6d204, 0xbe2c7e09, 0x6dc396b0, 0xbe271a9f,
-    0x6dc05b18, 0xbe21b75d,
-  0x6dbd1f3c, 0xbe1c5444, 0x6db9e31d, 0xbe16f154, 0x6db6a6ba, 0xbe118e8c,
-    0x6db36a14, 0xbe0c2bed,
-  0x6db02d29, 0xbe06c977, 0x6daceffb, 0xbe01672a, 0x6da9b28a, 0xbdfc0505,
-    0x6da674d5, 0xbdf6a309,
-  0x6da336dc, 0xbdf14135, 0x6d9ff89f, 0xbdebdf8b, 0x6d9cba1f, 0xbde67e09,
-    0x6d997b5b, 0xbde11cb0,
-  0x6d963c54, 0xbddbbb7f, 0x6d92fd09, 0xbdd65a78, 0x6d8fbd7a, 0xbdd0f999,
-    0x6d8c7da8, 0xbdcb98e3,
-  0x6d893d93, 0xbdc63856, 0x6d85fd39, 0xbdc0d7f2, 0x6d82bc9d, 0xbdbb77b7,
-    0x6d7f7bbc, 0xbdb617a4,
-  0x6d7c3a98, 0xbdb0b7bb, 0x6d78f931, 0xbdab57fa, 0x6d75b786, 0xbda5f862,
-    0x6d727597, 0xbda098f3,
-  0x6d6f3365, 0xbd9b39ad, 0x6d6bf0f0, 0xbd95da91, 0x6d68ae37, 0xbd907b9d,
-    0x6d656b3a, 0xbd8b1cd2,
-  0x6d6227fa, 0xbd85be30, 0x6d5ee477, 0xbd805fb7, 0x6d5ba0b0, 0xbd7b0167,
-    0x6d585ca6, 0xbd75a340,
-  0x6d551858, 0xbd704542, 0x6d51d3c6, 0xbd6ae76d, 0x6d4e8ef2, 0xbd6589c1,
-    0x6d4b49da, 0xbd602c3f,
-  0x6d48047e, 0xbd5acee5, 0x6d44bedf, 0xbd5571b5, 0x6d4178fd, 0xbd5014ad,
-    0x6d3e32d7, 0xbd4ab7cf,
-  0x6d3aec6e, 0xbd455b1a, 0x6d37a5c1, 0xbd3ffe8e, 0x6d345ed1, 0xbd3aa22c,
-    0x6d31179e, 0xbd3545f2,
-  0x6d2dd027, 0xbd2fe9e2, 0x6d2a886e, 0xbd2a8dfb, 0x6d274070, 0xbd25323d,
-    0x6d23f830, 0xbd1fd6a8,
-  0x6d20afac, 0xbd1a7b3d, 0x6d1d66e4, 0xbd151ffb, 0x6d1a1dda, 0xbd0fc4e2,
-    0x6d16d48c, 0xbd0a69f2,
-  0x6d138afb, 0xbd050f2c, 0x6d104126, 0xbcffb48f, 0x6d0cf70f, 0xbcfa5a1b,
-    0x6d09acb4, 0xbcf4ffd1,
-  0x6d066215, 0xbcefa5b0, 0x6d031734, 0xbcea4bb9, 0x6cffcc0f, 0xbce4f1eb,
-    0x6cfc80a7, 0xbcdf9846,
-  0x6cf934fc, 0xbcda3ecb, 0x6cf5e90d, 0xbcd4e579, 0x6cf29cdc, 0xbccf8c50,
-    0x6cef5067, 0xbcca3351,
-  0x6cec03af, 0xbcc4da7b, 0x6ce8b6b4, 0xbcbf81cf, 0x6ce56975, 0xbcba294d,
-    0x6ce21bf4, 0xbcb4d0f4,
-  0x6cdece2f, 0xbcaf78c4, 0x6cdb8027, 0xbcaa20be, 0x6cd831dc, 0xbca4c8e1,
-    0x6cd4e34e, 0xbc9f712e,
-  0x6cd1947c, 0xbc9a19a5, 0x6cce4568, 0xbc94c245, 0x6ccaf610, 0xbc8f6b0f,
-    0x6cc7a676, 0xbc8a1402,
-  0x6cc45698, 0xbc84bd1f, 0x6cc10677, 0xbc7f6665, 0x6cbdb613, 0xbc7a0fd6,
-    0x6cba656c, 0xbc74b96f,
-  0x6cb71482, 0xbc6f6333, 0x6cb3c355, 0xbc6a0d20, 0x6cb071e4, 0xbc64b737,
-    0x6cad2031, 0xbc5f6177,
-  0x6ca9ce3b, 0xbc5a0be2, 0x6ca67c01, 0xbc54b676, 0x6ca32985, 0xbc4f6134,
-    0x6c9fd6c6, 0xbc4a0c1b,
-  0x6c9c83c3, 0xbc44b72c, 0x6c99307e, 0xbc3f6267, 0x6c95dcf6, 0xbc3a0dcc,
-    0x6c92892a, 0xbc34b95b,
-  0x6c8f351c, 0xbc2f6513, 0x6c8be0cb, 0xbc2a10f6, 0x6c888c36, 0xbc24bd02,
-    0x6c85375f, 0xbc1f6938,
-  0x6c81e245, 0xbc1a1598, 0x6c7e8ce8, 0xbc14c221, 0x6c7b3748, 0xbc0f6ed5,
-    0x6c77e165, 0xbc0a1bb3,
-  0x6c748b3f, 0xbc04c8ba, 0x6c7134d7, 0xbbff75ec, 0x6c6dde2b, 0xbbfa2347,
-    0x6c6a873d, 0xbbf4d0cc,
-  0x6c67300b, 0xbbef7e7c, 0x6c63d897, 0xbbea2c55, 0x6c6080e0, 0xbbe4da58,
-    0x6c5d28e6, 0xbbdf8885,
-  0x6c59d0a9, 0xbbda36dd, 0x6c56782a, 0xbbd4e55e, 0x6c531f67, 0xbbcf940a,
-    0x6c4fc662, 0xbbca42df,
-  0x6c4c6d1a, 0xbbc4f1df, 0x6c49138f, 0xbbbfa108, 0x6c45b9c1, 0xbbba505c,
-    0x6c425fb1, 0xbbb4ffda,
-  0x6c3f055d, 0xbbafaf82, 0x6c3baac7, 0xbbaa5f54, 0x6c384fef, 0xbba50f50,
-    0x6c34f4d3, 0xbb9fbf77,
-  0x6c319975, 0xbb9a6fc7, 0x6c2e3dd4, 0xbb952042, 0x6c2ae1f0, 0xbb8fd0e7,
-    0x6c2785ca, 0xbb8a81b6,
-  0x6c242960, 0xbb8532b0, 0x6c20ccb4, 0xbb7fe3d3, 0x6c1d6fc6, 0xbb7a9521,
-    0x6c1a1295, 0xbb754699,
-  0x6c16b521, 0xbb6ff83c, 0x6c13576a, 0xbb6aaa09, 0x6c0ff971, 0xbb655c00,
-    0x6c0c9b35, 0xbb600e21,
-  0x6c093cb6, 0xbb5ac06d, 0x6c05ddf5, 0xbb5572e3, 0x6c027ef1, 0xbb502583,
-    0x6bff1faa, 0xbb4ad84e,
-  0x6bfbc021, 0xbb458b43, 0x6bf86055, 0xbb403e63, 0x6bf50047, 0xbb3af1ad,
-    0x6bf19ff6, 0xbb35a521,
-  0x6bee3f62, 0xbb3058c0, 0x6beade8c, 0xbb2b0c8a, 0x6be77d74, 0xbb25c07d,
-    0x6be41c18, 0xbb20749c,
-  0x6be0ba7b, 0xbb1b28e4, 0x6bdd589a, 0xbb15dd57, 0x6bd9f677, 0xbb1091f5,
-    0x6bd69412, 0xbb0b46bd,
-  0x6bd3316a, 0xbb05fbb0, 0x6bcfce80, 0xbb00b0ce, 0x6bcc6b53, 0xbafb6615,
-    0x6bc907e3, 0xbaf61b88,
-  0x6bc5a431, 0xbaf0d125, 0x6bc2403d, 0xbaeb86ed, 0x6bbedc06, 0xbae63cdf,
-    0x6bbb778d, 0xbae0f2fc,
-  0x6bb812d1, 0xbadba943, 0x6bb4add3, 0xbad65fb5, 0x6bb14892, 0xbad11652,
-    0x6bade30f, 0xbacbcd1a,
-  0x6baa7d49, 0xbac6840c, 0x6ba71741, 0xbac13b29, 0x6ba3b0f7, 0xbabbf270,
-    0x6ba04a6a, 0xbab6a9e3,
-  0x6b9ce39b, 0xbab16180, 0x6b997c8a, 0xbaac1948, 0x6b961536, 0xbaa6d13a,
-    0x6b92ada0, 0xbaa18958,
-  0x6b8f45c7, 0xba9c41a0, 0x6b8bddac, 0xba96fa13, 0x6b88754f, 0xba91b2b1,
-    0x6b850caf, 0xba8c6b79,
-  0x6b81a3cd, 0xba87246d, 0x6b7e3aa9, 0xba81dd8b, 0x6b7ad142, 0xba7c96d4,
-    0x6b776799, 0xba775048,
-  0x6b73fdae, 0xba7209e7, 0x6b709381, 0xba6cc3b1, 0x6b6d2911, 0xba677da6,
-    0x6b69be5f, 0xba6237c5,
-  0x6b66536b, 0xba5cf210, 0x6b62e834, 0xba57ac86, 0x6b5f7cbc, 0xba526726,
-    0x6b5c1101, 0xba4d21f2,
-  0x6b58a503, 0xba47dce8, 0x6b5538c4, 0xba42980a, 0x6b51cc42, 0xba3d5356,
-    0x6b4e5f7f, 0xba380ece,
-  0x6b4af279, 0xba32ca71, 0x6b478530, 0xba2d863e, 0x6b4417a6, 0xba284237,
-    0x6b40a9d9, 0xba22fe5b,
-  0x6b3d3bcb, 0xba1dbaaa, 0x6b39cd7a, 0xba187724, 0x6b365ee7, 0xba1333c9,
-    0x6b32f012, 0xba0df099,
-  0x6b2f80fb, 0xba08ad95, 0x6b2c11a1, 0xba036abb, 0x6b28a206, 0xb9fe280d,
-    0x6b253228, 0xb9f8e58a,
-  0x6b21c208, 0xb9f3a332, 0x6b1e51a7, 0xb9ee6106, 0x6b1ae103, 0xb9e91f04,
-    0x6b17701d, 0xb9e3dd2e,
-  0x6b13fef5, 0xb9de9b83, 0x6b108d8b, 0xb9d95a03, 0x6b0d1bdf, 0xb9d418af,
-    0x6b09a9f1, 0xb9ced786,
-  0x6b0637c1, 0xb9c99688, 0x6b02c54f, 0xb9c455b6, 0x6aff529a, 0xb9bf150e,
-    0x6afbdfa4, 0xb9b9d493,
-  0x6af86c6c, 0xb9b49442, 0x6af4f8f2, 0xb9af541d, 0x6af18536, 0xb9aa1423,
-    0x6aee1138, 0xb9a4d455,
-  0x6aea9cf8, 0xb99f94b2, 0x6ae72876, 0xb99a553a, 0x6ae3b3b2, 0xb99515ee,
-    0x6ae03eac, 0xb98fd6cd,
-  0x6adcc964, 0xb98a97d8, 0x6ad953db, 0xb985590e, 0x6ad5de0f, 0xb9801a70,
-    0x6ad26802, 0xb97adbfd,
-  0x6acef1b2, 0xb9759db6, 0x6acb7b21, 0xb9705f9a, 0x6ac8044e, 0xb96b21aa,
-    0x6ac48d39, 0xb965e3e5,
-  0x6ac115e2, 0xb960a64c, 0x6abd9e49, 0xb95b68de, 0x6aba266e, 0xb9562b9c,
-    0x6ab6ae52, 0xb950ee86,
-  0x6ab335f4, 0xb94bb19b, 0x6aafbd54, 0xb94674dc, 0x6aac4472, 0xb9413848,
-    0x6aa8cb4e, 0xb93bfbe0,
-  0x6aa551e9, 0xb936bfa4, 0x6aa1d841, 0xb9318393, 0x6a9e5e58, 0xb92c47ae,
-    0x6a9ae42e, 0xb9270bf5,
-  0x6a9769c1, 0xb921d067, 0x6a93ef13, 0xb91c9505, 0x6a907423, 0xb91759cf,
-    0x6a8cf8f1, 0xb9121ec5,
-  0x6a897d7d, 0xb90ce3e6, 0x6a8601c8, 0xb907a933, 0x6a8285d1, 0xb9026eac,
-    0x6a7f0999, 0xb8fd3451,
-  0x6a7b8d1e, 0xb8f7fa21, 0x6a781062, 0xb8f2c01d, 0x6a749365, 0xb8ed8646,
-    0x6a711625, 0xb8e84c99,
-  0x6a6d98a4, 0xb8e31319, 0x6a6a1ae2, 0xb8ddd9c5, 0x6a669cdd, 0xb8d8a09d,
-    0x6a631e97, 0xb8d367a0,
-  0x6a5fa010, 0xb8ce2ecf, 0x6a5c2147, 0xb8c8f62b, 0x6a58a23c, 0xb8c3bdb2,
-    0x6a5522ef, 0xb8be8565,
-  0x6a51a361, 0xb8b94d44, 0x6a4e2392, 0xb8b4154f, 0x6a4aa381, 0xb8aedd86,
-    0x6a47232e, 0xb8a9a5e9,
-  0x6a43a29a, 0xb8a46e78, 0x6a4021c4, 0xb89f3733, 0x6a3ca0ad, 0xb89a001a,
-    0x6a391f54, 0xb894c92d,
-  0x6a359db9, 0xb88f926d, 0x6a321bdd, 0xb88a5bd8, 0x6a2e99c0, 0xb885256f,
-    0x6a2b1761, 0xb87fef33,
-  0x6a2794c1, 0xb87ab922, 0x6a2411df, 0xb875833e, 0x6a208ebb, 0xb8704d85,
-    0x6a1d0b57, 0xb86b17f9,
-  0x6a1987b0, 0xb865e299, 0x6a1603c8, 0xb860ad66, 0x6a127f9f, 0xb85b785e,
-    0x6a0efb35, 0xb8564383,
-  0x6a0b7689, 0xb8510ed4, 0x6a07f19b, 0xb84bda51, 0x6a046c6c, 0xb846a5fa,
-    0x6a00e6fc, 0xb84171cf,
-  0x69fd614a, 0xb83c3dd1, 0x69f9db57, 0xb83709ff, 0x69f65523, 0xb831d659,
-    0x69f2cead, 0xb82ca2e0,
-  0x69ef47f6, 0xb8276f93, 0x69ebc0fe, 0xb8223c72, 0x69e839c4, 0xb81d097e,
-    0x69e4b249, 0xb817d6b6,
-  0x69e12a8c, 0xb812a41a, 0x69dda28f, 0xb80d71aa, 0x69da1a50, 0xb8083f67,
-    0x69d691cf, 0xb8030d51,
-  0x69d3090e, 0xb7fddb67, 0x69cf800b, 0xb7f8a9a9, 0x69cbf6c7, 0xb7f37818,
-    0x69c86d41, 0xb7ee46b3,
-  0x69c4e37a, 0xb7e9157a, 0x69c15973, 0xb7e3e46e, 0x69bdcf29, 0xb7deb38f,
-    0x69ba449f, 0xb7d982dc,
-  0x69b6b9d3, 0xb7d45255, 0x69b32ec7, 0xb7cf21fb, 0x69afa378, 0xb7c9f1ce,
-    0x69ac17e9, 0xb7c4c1cd,
-  0x69a88c19, 0xb7bf91f8, 0x69a50007, 0xb7ba6251, 0x69a173b5, 0xb7b532d6,
-    0x699de721, 0xb7b00387,
-  0x699a5a4c, 0xb7aad465, 0x6996cd35, 0xb7a5a570, 0x69933fde, 0xb7a076a7,
-    0x698fb246, 0xb79b480b,
-  0x698c246c, 0xb796199b, 0x69889651, 0xb790eb58, 0x698507f6, 0xb78bbd42,
-    0x69817959, 0xb7868f59,
-  0x697dea7b, 0xb781619c, 0x697a5b5c, 0xb77c340c, 0x6976cbfc, 0xb77706a9,
-    0x69733c5b, 0xb771d972,
-  0x696fac78, 0xb76cac69, 0x696c1c55, 0xb7677f8c, 0x69688bf1, 0xb76252db,
-    0x6964fb4c, 0xb75d2658,
-  0x69616a65, 0xb757fa01, 0x695dd93e, 0xb752cdd8, 0x695a47d6, 0xb74da1db,
-    0x6956b62d, 0xb748760b,
-  0x69532442, 0xb7434a67, 0x694f9217, 0xb73e1ef1, 0x694bffab, 0xb738f3a7,
-    0x69486cfe, 0xb733c88b,
-  0x6944da10, 0xb72e9d9b, 0x694146e1, 0xb72972d8, 0x693db371, 0xb7244842,
-    0x693a1fc0, 0xb71f1dd9,
-  0x69368bce, 0xb719f39e, 0x6932f79b, 0xb714c98e, 0x692f6328, 0xb70f9fac,
-    0x692bce73, 0xb70a75f7,
-  0x6928397e, 0xb7054c6f, 0x6924a448, 0xb7002314, 0x69210ed1, 0xb6faf9e6,
-    0x691d7919, 0xb6f5d0e5,
-  0x6919e320, 0xb6f0a812, 0x69164ce7, 0xb6eb7f6b, 0x6912b66c, 0xb6e656f1,
-    0x690f1fb1, 0xb6e12ea4,
-  0x690b88b5, 0xb6dc0685, 0x6907f178, 0xb6d6de92, 0x690459fb, 0xb6d1b6cd,
-    0x6900c23c, 0xb6cc8f35,
-  0x68fd2a3d, 0xb6c767ca, 0x68f991fd, 0xb6c2408c, 0x68f5f97d, 0xb6bd197c,
-    0x68f260bb, 0xb6b7f298,
-  0x68eec7b9, 0xb6b2cbe2, 0x68eb2e76, 0xb6ada559, 0x68e794f3, 0xb6a87efd,
-    0x68e3fb2e, 0xb6a358ce,
-  0x68e06129, 0xb69e32cd, 0x68dcc6e4, 0xb6990cf9, 0x68d92c5d, 0xb693e752,
-    0x68d59196, 0xb68ec1d9,
-  0x68d1f68f, 0xb6899c8d, 0x68ce5b46, 0xb684776e, 0x68cabfbd, 0xb67f527c,
-    0x68c723f3, 0xb67a2db8,
-  0x68c387e9, 0xb6750921, 0x68bfeb9e, 0xb66fe4b8, 0x68bc4f13, 0xb66ac07c,
-    0x68b8b247, 0xb6659c6d,
-  0x68b5153a, 0xb660788c, 0x68b177ed, 0xb65b54d8, 0x68adda5f, 0xb6563151,
-    0x68aa3c90, 0xb6510df8,
-  0x68a69e81, 0xb64beacd, 0x68a30031, 0xb646c7ce, 0x689f61a1, 0xb641a4fe,
-    0x689bc2d1, 0xb63c825b,
-  0x689823bf, 0xb6375fe5, 0x6894846e, 0xb6323d9d, 0x6890e4dc, 0xb62d1b82,
-    0x688d4509, 0xb627f995,
-  0x6889a4f6, 0xb622d7d6, 0x688604a2, 0xb61db644, 0x6882640e, 0xb61894df,
-    0x687ec339, 0xb61373a9,
-  0x687b2224, 0xb60e529f, 0x687780ce, 0xb60931c4, 0x6873df38, 0xb6041116,
-    0x68703d62, 0xb5fef095,
-  0x686c9b4b, 0xb5f9d043, 0x6868f8f4, 0xb5f4b01e, 0x6865565c, 0xb5ef9026,
-    0x6861b384, 0xb5ea705d,
-  0x685e106c, 0xb5e550c1, 0x685a6d13, 0xb5e03153, 0x6856c979, 0xb5db1212,
-    0x685325a0, 0xb5d5f2ff,
-  0x684f8186, 0xb5d0d41a, 0x684bdd2c, 0xb5cbb563, 0x68483891, 0xb5c696da,
-    0x684493b6, 0xb5c1787e,
-  0x6840ee9b, 0xb5bc5a50, 0x683d493f, 0xb5b73c50, 0x6839a3a4, 0xb5b21e7e,
-    0x6835fdc7, 0xb5ad00d9,
-  0x683257ab, 0xb5a7e362, 0x682eb14e, 0xb5a2c61a, 0x682b0ab1, 0xb59da8ff,
-    0x682763d4, 0xb5988c12,
-  0x6823bcb7, 0xb5936f53, 0x68201559, 0xb58e52c2, 0x681c6dbb, 0xb589365e,
-    0x6818c5dd, 0xb5841a29,
-  0x68151dbe, 0xb57efe22, 0x68117560, 0xb579e248, 0x680dccc1, 0xb574c69d,
-    0x680a23e2, 0xb56fab1f,
-  0x68067ac3, 0xb56a8fd0, 0x6802d164, 0xb56574ae, 0x67ff27c4, 0xb56059bb,
-    0x67fb7de5, 0xb55b3ef5,
-  0x67f7d3c5, 0xb556245e, 0x67f42965, 0xb55109f5, 0x67f07ec5, 0xb54befba,
-    0x67ecd3e5, 0xb546d5ac,
-  0x67e928c5, 0xb541bbcd, 0x67e57d64, 0xb53ca21c, 0x67e1d1c4, 0xb5378899,
-    0x67de25e3, 0xb5326f45,
-  0x67da79c3, 0xb52d561e, 0x67d6cd62, 0xb5283d26, 0x67d320c1, 0xb523245b,
-    0x67cf73e1, 0xb51e0bbf,
-  0x67cbc6c0, 0xb518f351, 0x67c8195f, 0xb513db12, 0x67c46bbe, 0xb50ec300,
-    0x67c0bddd, 0xb509ab1d,
-  0x67bd0fbd, 0xb5049368, 0x67b9615c, 0xb4ff7be1, 0x67b5b2bb, 0xb4fa6489,
-    0x67b203da, 0xb4f54d5f,
-  0x67ae54ba, 0xb4f03663, 0x67aaa559, 0xb4eb1f95, 0x67a6f5b8, 0xb4e608f6,
-    0x67a345d8, 0xb4e0f285,
-  0x679f95b7, 0xb4dbdc42, 0x679be557, 0xb4d6c62e, 0x679834b6, 0xb4d1b048,
-    0x679483d6, 0xb4cc9a90,
-  0x6790d2b6, 0xb4c78507, 0x678d2156, 0xb4c26fad, 0x67896fb6, 0xb4bd5a80,
-    0x6785bdd6, 0xb4b84582,
-  0x67820bb7, 0xb4b330b3, 0x677e5957, 0xb4ae1c12, 0x677aa6b8, 0xb4a9079f,
-    0x6776f3d9, 0xb4a3f35b,
-  0x677340ba, 0xb49edf45, 0x676f8d5b, 0xb499cb5e, 0x676bd9bd, 0xb494b7a6,
-    0x676825de, 0xb48fa41c,
-  0x676471c0, 0xb48a90c0, 0x6760bd62, 0xb4857d93, 0x675d08c4, 0xb4806a95,
-    0x675953e7, 0xb47b57c5,
-  0x67559eca, 0xb4764523, 0x6751e96d, 0xb47132b1, 0x674e33d0, 0xb46c206d,
-    0x674a7df4, 0xb4670e57,
-  0x6746c7d8, 0xb461fc70, 0x6743117c, 0xb45ceab8, 0x673f5ae0, 0xb457d92f,
-    0x673ba405, 0xb452c7d4,
-  0x6737ecea, 0xb44db6a8, 0x67343590, 0xb448a5aa, 0x67307df5, 0xb44394db,
-    0x672cc61c, 0xb43e843b,
-  0x67290e02, 0xb43973ca, 0x672555a9, 0xb4346387, 0x67219d10, 0xb42f5373,
-    0x671de438, 0xb42a438e,
-  0x671a2b20, 0xb42533d8, 0x671671c8, 0xb4202451, 0x6712b831, 0xb41b14f8,
-    0x670efe5a, 0xb41605ce,
-  0x670b4444, 0xb410f6d3, 0x670789ee, 0xb40be807, 0x6703cf58, 0xb406d969,
-    0x67001483, 0xb401cafb,
-  0x66fc596f, 0xb3fcbcbb, 0x66f89e1b, 0xb3f7aeaa, 0x66f4e287, 0xb3f2a0c9,
-    0x66f126b4, 0xb3ed9316,
-  0x66ed6aa1, 0xb3e88592, 0x66e9ae4f, 0xb3e3783d, 0x66e5f1be, 0xb3de6b17,
-    0x66e234ed, 0xb3d95e1f,
-  0x66de77dc, 0xb3d45157, 0x66daba8c, 0xb3cf44be, 0x66d6fcfd, 0xb3ca3854,
-    0x66d33f2e, 0xb3c52c19,
-  0x66cf8120, 0xb3c0200c, 0x66cbc2d2, 0xb3bb142f, 0x66c80445, 0xb3b60881,
-    0x66c44579, 0xb3b0fd02,
-  0x66c0866d, 0xb3abf1b2, 0x66bcc721, 0xb3a6e691, 0x66b90797, 0xb3a1dba0,
-    0x66b547cd, 0xb39cd0dd,
-  0x66b187c3, 0xb397c649, 0x66adc77b, 0xb392bbe5, 0x66aa06f3, 0xb38db1b0,
-    0x66a6462b, 0xb388a7aa,
-  0x66a28524, 0xb3839dd3, 0x669ec3de, 0xb37e942b, 0x669b0259, 0xb3798ab2,
-    0x66974095, 0xb3748169,
-  0x66937e91, 0xb36f784f, 0x668fbc4e, 0xb36a6f64, 0x668bf9cb, 0xb36566a8,
-    0x66883709, 0xb3605e1c,
-  0x66847408, 0xb35b55bf, 0x6680b0c8, 0xb3564d91, 0x667ced49, 0xb3514592,
-    0x6679298a, 0xb34c3dc3,
-  0x6675658c, 0xb3473623, 0x6671a14f, 0xb3422eb2, 0x666ddcd3, 0xb33d2771,
-    0x666a1818, 0xb338205f,
-  0x6666531d, 0xb333197c, 0x66628de4, 0xb32e12c9, 0x665ec86b, 0xb3290c45,
-    0x665b02b3, 0xb32405f1,
-  0x66573cbb, 0xb31effcc, 0x66537685, 0xb319f9d6, 0x664fb010, 0xb314f410,
-    0x664be95b, 0xb30fee79,
-  0x66482267, 0xb30ae912, 0x66445b35, 0xb305e3da, 0x664093c3, 0xb300ded2,
-    0x663ccc12, 0xb2fbd9f9,
-  0x66390422, 0xb2f6d550, 0x66353bf3, 0xb2f1d0d6, 0x66317385, 0xb2eccc8c,
-    0x662daad8, 0xb2e7c871,
-  0x6629e1ec, 0xb2e2c486, 0x662618c1, 0xb2ddc0ca, 0x66224f56, 0xb2d8bd3e,
-    0x661e85ad, 0xb2d3b9e2,
-  0x661abbc5, 0xb2ceb6b5, 0x6616f19e, 0xb2c9b3b8, 0x66132738, 0xb2c4b0ea,
-    0x660f5c93, 0xb2bfae4c,
-  0x660b91af, 0xb2baabde, 0x6607c68c, 0xb2b5a99f, 0x6603fb2a, 0xb2b0a790,
-    0x66002f89, 0xb2aba5b1,
-  0x65fc63a9, 0xb2a6a402, 0x65f8978b, 0xb2a1a282, 0x65f4cb2d, 0xb29ca132,
-    0x65f0fe91, 0xb297a011,
-  0x65ed31b5, 0xb2929f21, 0x65e9649b, 0xb28d9e60, 0x65e59742, 0xb2889dcf,
-    0x65e1c9aa, 0xb2839d6d,
-  0x65ddfbd3, 0xb27e9d3c, 0x65da2dbd, 0xb2799d3a, 0x65d65f69, 0xb2749d68,
-    0x65d290d6, 0xb26f9dc6,
-  0x65cec204, 0xb26a9e54, 0x65caf2f3, 0xb2659f12, 0x65c723a3, 0xb2609fff,
-    0x65c35415, 0xb25ba11d,
-  0x65bf8447, 0xb256a26a, 0x65bbb43b, 0xb251a3e7, 0x65b7e3f1, 0xb24ca594,
-    0x65b41367, 0xb247a771,
-  0x65b0429f, 0xb242a97e, 0x65ac7198, 0xb23dabbb, 0x65a8a052, 0xb238ae28,
-    0x65a4cece, 0xb233b0c5,
-  0x65a0fd0b, 0xb22eb392, 0x659d2b09, 0xb229b68f, 0x659958c9, 0xb224b9bc,
-    0x6595864a, 0xb21fbd19,
-  0x6591b38c, 0xb21ac0a6, 0x658de08f, 0xb215c463, 0x658a0d54, 0xb210c850,
-    0x658639db, 0xb20bcc6d,
-  0x65826622, 0xb206d0ba, 0x657e922b, 0xb201d537, 0x657abdf6, 0xb1fcd9e5,
-    0x6576e982, 0xb1f7dec2,
-  0x657314cf, 0xb1f2e3d0, 0x656f3fde, 0xb1ede90e, 0x656b6aae, 0xb1e8ee7c,
-    0x6567953f, 0xb1e3f41a,
-  0x6563bf92, 0xb1def9e9, 0x655fe9a7, 0xb1d9ffe7, 0x655c137d, 0xb1d50616,
-    0x65583d14, 0xb1d00c75,
-  0x6554666d, 0xb1cb1304, 0x65508f87, 0xb1c619c3, 0x654cb863, 0xb1c120b3,
-    0x6548e101, 0xb1bc27d3,
-  0x6545095f, 0xb1b72f23, 0x65413180, 0xb1b236a4, 0x653d5962, 0xb1ad3e55,
-    0x65398105, 0xb1a84636,
-  0x6535a86b, 0xb1a34e47, 0x6531cf91, 0xb19e5689, 0x652df679, 0xb1995efb,
-    0x652a1d23, 0xb194679e,
-  0x6526438f, 0xb18f7071, 0x652269bc, 0xb18a7974, 0x651e8faa, 0xb18582a8,
-    0x651ab55b, 0xb1808c0c,
-  0x6516dacd, 0xb17b95a0, 0x65130000, 0xb1769f65, 0x650f24f5, 0xb171a95b,
-    0x650b49ac, 0xb16cb380,
-  0x65076e25, 0xb167bdd7, 0x6503925f, 0xb162c85d, 0x64ffb65b, 0xb15dd315,
-    0x64fbda18, 0xb158ddfd,
-  0x64f7fd98, 0xb153e915, 0x64f420d9, 0xb14ef45e, 0x64f043dc, 0xb149ffd7,
-    0x64ec66a0, 0xb1450b81,
-  0x64e88926, 0xb140175b, 0x64e4ab6e, 0xb13b2367, 0x64e0cd78, 0xb1362fa2,
-    0x64dcef44, 0xb1313c0e,
-  0x64d910d1, 0xb12c48ab, 0x64d53220, 0xb1275579, 0x64d15331, 0xb1226277,
-    0x64cd7404, 0xb11d6fa6,
-  0x64c99498, 0xb1187d05, 0x64c5b4ef, 0xb1138a95, 0x64c1d507, 0xb10e9856,
-    0x64bdf4e1, 0xb109a648,
-  0x64ba147d, 0xb104b46a, 0x64b633da, 0xb0ffc2bd, 0x64b252fa, 0xb0fad140,
-    0x64ae71dc, 0xb0f5dff5,
-  0x64aa907f, 0xb0f0eeda, 0x64a6aee4, 0xb0ebfdf0, 0x64a2cd0c, 0xb0e70d37,
-    0x649eeaf5, 0xb0e21cae,
-  0x649b08a0, 0xb0dd2c56, 0x6497260d, 0xb0d83c2f, 0x6493433c, 0xb0d34c39,
-    0x648f602d, 0xb0ce5c74,
-  0x648b7ce0, 0xb0c96ce0, 0x64879955, 0xb0c47d7c, 0x6483b58c, 0xb0bf8e4a,
-    0x647fd185, 0xb0ba9f48,
-  0x647bed3f, 0xb0b5b077, 0x647808bc, 0xb0b0c1d7, 0x647423fb, 0xb0abd368,
-    0x64703efc, 0xb0a6e52a,
-  0x646c59bf, 0xb0a1f71d, 0x64687444, 0xb09d0941, 0x64648e8c, 0xb0981b96,
-    0x6460a895, 0xb0932e1b,
-  0x645cc260, 0xb08e40d2, 0x6458dbed, 0xb08953ba, 0x6454f53d, 0xb08466d3,
-    0x64510e4e, 0xb07f7a1c,
-  0x644d2722, 0xb07a8d97, 0x64493fb8, 0xb075a143, 0x64455810, 0xb070b520,
-    0x6441702a, 0xb06bc92e,
-  0x643d8806, 0xb066dd6d, 0x64399fa5, 0xb061f1de, 0x6435b706, 0xb05d067f,
-    0x6431ce28, 0xb0581b51,
-  0x642de50d, 0xb0533055, 0x6429fbb5, 0xb04e458a, 0x6426121e, 0xb0495af0,
-    0x6422284a, 0xb0447087,
-  0x641e3e38, 0xb03f864f, 0x641a53e8, 0xb03a9c49, 0x6416695a, 0xb035b273,
-    0x64127e8f, 0xb030c8cf,
-  0x640e9386, 0xb02bdf5c, 0x640aa83f, 0xb026f61b, 0x6406bcba, 0xb0220d0a,
-    0x6402d0f8, 0xb01d242b,
-  0x63fee4f8, 0xb0183b7d, 0x63faf8bb, 0xb0135301, 0x63f70c3f, 0xb00e6ab5,
-    0x63f31f86, 0xb009829c,
-  0x63ef3290, 0xb0049ab3, 0x63eb455c, 0xafffb2fc, 0x63e757ea, 0xaffacb76,
-    0x63e36a3a, 0xaff5e421,
-  0x63df7c4d, 0xaff0fcfe, 0x63db8e22, 0xafec160c, 0x63d79fba, 0xafe72f4c,
-    0x63d3b114, 0xafe248bd,
-  0x63cfc231, 0xafdd625f, 0x63cbd310, 0xafd87c33, 0x63c7e3b1, 0xafd39638,
-    0x63c3f415, 0xafceb06f,
-  0x63c0043b, 0xafc9cad7, 0x63bc1424, 0xafc4e571, 0x63b823cf, 0xafc0003c,
-    0x63b4333d, 0xafbb1b39,
-  0x63b0426d, 0xafb63667, 0x63ac5160, 0xafb151c7, 0x63a86015, 0xafac6d58,
-    0x63a46e8d, 0xafa7891b,
-  0x63a07cc7, 0xafa2a50f, 0x639c8ac4, 0xaf9dc135, 0x63989884, 0xaf98dd8d,
-    0x6394a606, 0xaf93fa16,
-  0x6390b34a, 0xaf8f16d1, 0x638cc051, 0xaf8a33bd, 0x6388cd1b, 0xaf8550db,
-    0x6384d9a7, 0xaf806e2b,
-  0x6380e5f6, 0xaf7b8bac, 0x637cf208, 0xaf76a95f, 0x6378fddc, 0xaf71c743,
-    0x63750973, 0xaf6ce55a,
-  0x637114cc, 0xaf6803a2, 0x636d1fe9, 0xaf63221c, 0x63692ac7, 0xaf5e40c7,
-    0x63653569, 0xaf595fa4,
-  0x63613fcd, 0xaf547eb3, 0x635d49f4, 0xaf4f9df4, 0x635953dd, 0xaf4abd66,
-    0x63555d8a, 0xaf45dd0b,
-  0x635166f9, 0xaf40fce1, 0x634d702b, 0xaf3c1ce9, 0x6349791f, 0xaf373d22,
-    0x634581d6, 0xaf325d8e,
-  0x63418a50, 0xaf2d7e2b, 0x633d928d, 0xaf289efa, 0x63399a8d, 0xaf23bffb,
-    0x6335a24f, 0xaf1ee12e,
-  0x6331a9d4, 0xaf1a0293, 0x632db11c, 0xaf15242a, 0x6329b827, 0xaf1045f3,
-    0x6325bef5, 0xaf0b67ed,
-  0x6321c585, 0xaf068a1a, 0x631dcbd9, 0xaf01ac78, 0x6319d1ef, 0xaefccf09,
-    0x6315d7c8, 0xaef7f1cb,
-  0x6311dd64, 0xaef314c0, 0x630de2c3, 0xaeee37e6, 0x6309e7e4, 0xaee95b3f,
-    0x6305ecc9, 0xaee47ec9,
-  0x6301f171, 0xaedfa285, 0x62fdf5db, 0xaedac674, 0x62f9fa09, 0xaed5ea95,
-    0x62f5fdf9, 0xaed10ee7,
-  0x62f201ac, 0xaecc336c, 0x62ee0523, 0xaec75823, 0x62ea085c, 0xaec27d0c,
-    0x62e60b58, 0xaebda227,
-  0x62e20e17, 0xaeb8c774, 0x62de109a, 0xaeb3ecf3, 0x62da12df, 0xaeaf12a4,
-    0x62d614e7, 0xaeaa3888,
-  0x62d216b3, 0xaea55e9e, 0x62ce1841, 0xaea084e6, 0x62ca1992, 0xae9bab60,
-    0x62c61aa7, 0xae96d20c,
-  0x62c21b7e, 0xae91f8eb, 0x62be1c19, 0xae8d1ffb, 0x62ba1c77, 0xae88473e,
-    0x62b61c98, 0xae836eb4,
-  0x62b21c7b, 0xae7e965b, 0x62ae1c23, 0xae79be35, 0x62aa1b8d, 0xae74e641,
-    0x62a61aba, 0xae700e80,
-  0x62a219aa, 0xae6b36f0, 0x629e185e, 0xae665f93, 0x629a16d5, 0xae618869,
-    0x6296150f, 0xae5cb171,
-  0x6292130c, 0xae57daab, 0x628e10cc, 0xae530417, 0x628a0e50, 0xae4e2db6,
-    0x62860b97, 0xae495787,
-  0x628208a1, 0xae44818b, 0x627e056e, 0xae3fabc1, 0x627a01fe, 0xae3ad629,
-    0x6275fe52, 0xae3600c4,
-  0x6271fa69, 0xae312b92, 0x626df643, 0xae2c5691, 0x6269f1e1, 0xae2781c4,
-    0x6265ed42, 0xae22ad29,
-  0x6261e866, 0xae1dd8c0, 0x625de34e, 0xae19048a, 0x6259ddf8, 0xae143086,
-    0x6255d866, 0xae0f5cb5,
-  0x6251d298, 0xae0a8916, 0x624dcc8d, 0xae05b5aa, 0x6249c645, 0xae00e271,
-    0x6245bfc0, 0xadfc0f6a,
-  0x6241b8ff, 0xadf73c96, 0x623db202, 0xadf269f4, 0x6239aac7, 0xaded9785,
-    0x6235a351, 0xade8c548,
-  0x62319b9d, 0xade3f33e, 0x622d93ad, 0xaddf2167, 0x62298b81, 0xadda4fc3,
-    0x62258317, 0xadd57e51,
-  0x62217a72, 0xadd0ad12, 0x621d7190, 0xadcbdc05, 0x62196871, 0xadc70b2c,
-    0x62155f16, 0xadc23a85,
-  0x6211557e, 0xadbd6a10, 0x620d4baa, 0xadb899cf, 0x62094199, 0xadb3c9c0,
-    0x6205374c, 0xadaef9e4,
-  0x62012cc2, 0xadaa2a3b, 0x61fd21fc, 0xada55ac4, 0x61f916f9, 0xada08b80,
-    0x61f50bba, 0xad9bbc70,
-  0x61f1003f, 0xad96ed92, 0x61ecf487, 0xad921ee6, 0x61e8e893, 0xad8d506e,
-    0x61e4dc62, 0xad888229,
-  0x61e0cff5, 0xad83b416, 0x61dcc34c, 0xad7ee636, 0x61d8b666, 0xad7a1889,
-    0x61d4a944, 0xad754b0f,
-  0x61d09be5, 0xad707dc8, 0x61cc8e4b, 0xad6bb0b4, 0x61c88074, 0xad66e3d3,
-    0x61c47260, 0xad621725,
-  0x61c06410, 0xad5d4aaa, 0x61bc5584, 0xad587e61, 0x61b846bc, 0xad53b24c,
-    0x61b437b7, 0xad4ee66a,
-  0x61b02876, 0xad4a1aba, 0x61ac18f9, 0xad454f3e, 0x61a80940, 0xad4083f5,
-    0x61a3f94a, 0xad3bb8df,
-  0x619fe918, 0xad36edfc, 0x619bd8aa, 0xad32234b, 0x6197c800, 0xad2d58ce,
-    0x6193b719, 0xad288e85,
-  0x618fa5f7, 0xad23c46e, 0x618b9498, 0xad1efa8a, 0x618782fd, 0xad1a30d9,
-    0x61837126, 0xad15675c,
-  0x617f5f12, 0xad109e12, 0x617b4cc3, 0xad0bd4fb, 0x61773a37, 0xad070c17,
-    0x61732770, 0xad024366,
-  0x616f146c, 0xacfd7ae8, 0x616b012c, 0xacf8b29e, 0x6166edb0, 0xacf3ea87,
-    0x6162d9f8, 0xacef22a3,
-  0x615ec603, 0xacea5af2, 0x615ab1d3, 0xace59375, 0x61569d67, 0xace0cc2b,
-    0x615288be, 0xacdc0514,
-  0x614e73da, 0xacd73e30, 0x614a5eba, 0xacd27780, 0x6146495d, 0xaccdb103,
-    0x614233c5, 0xacc8eab9,
-  0x613e1df0, 0xacc424a3, 0x613a07e0, 0xacbf5ec0, 0x6135f193, 0xacba9910,
-    0x6131db0b, 0xacb5d394,
-  0x612dc447, 0xacb10e4b, 0x6129ad46, 0xacac4935, 0x6125960a, 0xaca78453,
-    0x61217e92, 0xaca2bfa4,
-  0x611d66de, 0xac9dfb29, 0x61194eee, 0xac9936e1, 0x611536c2, 0xac9472cd,
-    0x61111e5b, 0xac8faeec,
-  0x610d05b7, 0xac8aeb3e, 0x6108ecd8, 0xac8627c4, 0x6104d3bc, 0xac81647e,
-    0x6100ba65, 0xac7ca16b,
-  0x60fca0d2, 0xac77de8b, 0x60f88703, 0xac731bdf, 0x60f46cf9, 0xac6e5967,
-    0x60f052b2, 0xac699722,
-  0x60ec3830, 0xac64d510, 0x60e81d72, 0xac601333, 0x60e40278, 0xac5b5189,
-    0x60dfe743, 0xac569012,
-  0x60dbcbd1, 0xac51cecf, 0x60d7b024, 0xac4d0dc0, 0x60d3943b, 0xac484ce4,
-    0x60cf7817, 0xac438c3c,
-  0x60cb5bb7, 0xac3ecbc7, 0x60c73f1b, 0xac3a0b87, 0x60c32243, 0xac354b7a,
-    0x60bf0530, 0xac308ba0,
-  0x60bae7e1, 0xac2bcbfa, 0x60b6ca56, 0xac270c88, 0x60b2ac8f, 0xac224d4a,
-    0x60ae8e8d, 0xac1d8e40,
-  0x60aa7050, 0xac18cf69, 0x60a651d7, 0xac1410c6, 0x60a23322, 0xac0f5256,
-    0x609e1431, 0xac0a941b,
-  0x6099f505, 0xac05d613, 0x6095d59d, 0xac01183f, 0x6091b5fa, 0xabfc5a9f,
-    0x608d961b, 0xabf79d33,
-  0x60897601, 0xabf2dffb, 0x608555ab, 0xabee22f6, 0x60813519, 0xabe96625,
-    0x607d144c, 0xabe4a988,
-  0x6078f344, 0xabdfed1f, 0x6074d200, 0xabdb30ea, 0x6070b080, 0xabd674e9,
-    0x606c8ec5, 0xabd1b91c,
-  0x60686ccf, 0xabccfd83, 0x60644a9d, 0xabc8421d, 0x6060282f, 0xabc386ec,
-    0x605c0587, 0xabbecbee,
-  0x6057e2a2, 0xabba1125, 0x6053bf82, 0xabb5568f, 0x604f9c27, 0xabb09c2e,
-    0x604b7891, 0xababe200,
-  0x604754bf, 0xaba72807, 0x604330b1, 0xaba26e41, 0x603f0c69, 0xab9db4b0,
-    0x603ae7e5, 0xab98fb52,
-  0x6036c325, 0xab944229, 0x60329e2a, 0xab8f8934, 0x602e78f4, 0xab8ad073,
-    0x602a5383, 0xab8617e6,
-  0x60262dd6, 0xab815f8d, 0x602207ee, 0xab7ca768, 0x601de1ca, 0xab77ef77,
-    0x6019bb6b, 0xab7337bb,
-  0x601594d1, 0xab6e8032, 0x60116dfc, 0xab69c8de, 0x600d46ec, 0xab6511be,
-    0x60091fa0, 0xab605ad2,
-  0x6004f819, 0xab5ba41a, 0x6000d057, 0xab56ed97, 0x5ffca859, 0xab523748,
-    0x5ff88021, 0xab4d812d,
-  0x5ff457ad, 0xab48cb46, 0x5ff02efe, 0xab441593, 0x5fec0613, 0xab3f6015,
-    0x5fe7dcee, 0xab3aaacb,
-  0x5fe3b38d, 0xab35f5b5, 0x5fdf89f2, 0xab3140d4, 0x5fdb601b, 0xab2c8c27,
-    0x5fd73609, 0xab27d7ae,
-  0x5fd30bbc, 0xab23236a, 0x5fcee133, 0xab1e6f5a, 0x5fcab670, 0xab19bb7e,
-    0x5fc68b72, 0xab1507d7,
-  0x5fc26038, 0xab105464, 0x5fbe34c4, 0xab0ba125, 0x5fba0914, 0xab06ee1b,
-    0x5fb5dd29, 0xab023b46,
-  0x5fb1b104, 0xaafd88a4, 0x5fad84a3, 0xaaf8d637, 0x5fa95807, 0xaaf423ff,
-    0x5fa52b31, 0xaaef71fb,
-  0x5fa0fe1f, 0xaaeac02c, 0x5f9cd0d2, 0xaae60e91, 0x5f98a34a, 0xaae15d2a,
-    0x5f947588, 0xaadcabf8,
-  0x5f90478a, 0xaad7fafb, 0x5f8c1951, 0xaad34a32, 0x5f87eade, 0xaace999d,
-    0x5f83bc2f, 0xaac9e93e,
-  0x5f7f8d46, 0xaac53912, 0x5f7b5e22, 0xaac0891c, 0x5f772ec2, 0xaabbd959,
-    0x5f72ff28, 0xaab729cc,
-  0x5f6ecf53, 0xaab27a73, 0x5f6a9f44, 0xaaadcb4f, 0x5f666ef9, 0xaaa91c5f,
-    0x5f623e73, 0xaaa46da4,
-  0x5f5e0db3, 0xaa9fbf1e, 0x5f59dcb8, 0xaa9b10cc, 0x5f55ab82, 0xaa9662af,
-    0x5f517a11, 0xaa91b4c7,
-  0x5f4d4865, 0xaa8d0713, 0x5f49167f, 0xaa885994, 0x5f44e45e, 0xaa83ac4a,
-    0x5f40b202, 0xaa7eff34,
-  0x5f3c7f6b, 0xaa7a5253, 0x5f384c9a, 0xaa75a5a8, 0x5f34198e, 0xaa70f930,
-    0x5f2fe647, 0xaa6c4cee,
-  0x5f2bb2c5, 0xaa67a0e0, 0x5f277f09, 0xaa62f507, 0x5f234b12, 0xaa5e4963,
-    0x5f1f16e0, 0xaa599df4,
-  0x5f1ae274, 0xaa54f2ba, 0x5f16adcc, 0xaa5047b4, 0x5f1278eb, 0xaa4b9ce3,
-    0x5f0e43ce, 0xaa46f248,
-  0x5f0a0e77, 0xaa4247e1, 0x5f05d8e6, 0xaa3d9daf, 0x5f01a31a, 0xaa38f3b1,
-    0x5efd6d13, 0xaa3449e9,
-  0x5ef936d1, 0xaa2fa056, 0x5ef50055, 0xaa2af6f7, 0x5ef0c99f, 0xaa264dce,
-    0x5eec92ae, 0xaa21a4d9,
-  0x5ee85b82, 0xaa1cfc1a, 0x5ee4241c, 0xaa18538f, 0x5edfec7b, 0xaa13ab3a,
-    0x5edbb49f, 0xaa0f0319,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5ed34439, 0xaa05b377, 0x5ecf0baf, 0xaa010bf6,
-    0x5ecad2e9, 0xa9fc64a9,
-  0x5ec699e9, 0xa9f7bd92, 0x5ec260af, 0xa9f316b0, 0x5ebe273b, 0xa9ee7002,
-    0x5eb9ed8b, 0xa9e9c98a,
-  0x5eb5b3a2, 0xa9e52347, 0x5eb1797e, 0xa9e07d39, 0x5ead3f1f, 0xa9dbd761,
-    0x5ea90487, 0xa9d731bd,
-  0x5ea4c9b3, 0xa9d28c4e, 0x5ea08ea6, 0xa9cde715, 0x5e9c535e, 0xa9c94211,
-    0x5e9817dc, 0xa9c49d42,
-  0x5e93dc1f, 0xa9bff8a8, 0x5e8fa028, 0xa9bb5444, 0x5e8b63f7, 0xa9b6b014,
-    0x5e87278b, 0xa9b20c1a,
-  0x5e82eae5, 0xa9ad6855, 0x5e7eae05, 0xa9a8c4c5, 0x5e7a70ea, 0xa9a4216b,
-    0x5e763395, 0xa99f7e46,
-  0x5e71f606, 0xa99adb56, 0x5e6db83d, 0xa996389b, 0x5e697a39, 0xa9919616,
-    0x5e653bfc, 0xa98cf3c6,
-  0x5e60fd84, 0xa98851ac, 0x5e5cbed1, 0xa983afc6, 0x5e587fe5, 0xa97f0e16,
-    0x5e5440be, 0xa97a6c9c,
-  0x5e50015d, 0xa975cb57, 0x5e4bc1c2, 0xa9712a47, 0x5e4781ed, 0xa96c896c,
-    0x5e4341de, 0xa967e8c7,
-  0x5e3f0194, 0xa9634858, 0x5e3ac110, 0xa95ea81d, 0x5e368053, 0xa95a0819,
-    0x5e323f5b, 0xa9556849,
-  0x5e2dfe29, 0xa950c8b0, 0x5e29bcbd, 0xa94c294b, 0x5e257b17, 0xa9478a1c,
-    0x5e213936, 0xa942eb23,
-  0x5e1cf71c, 0xa93e4c5f, 0x5e18b4c8, 0xa939add1, 0x5e147239, 0xa9350f78,
-    0x5e102f71, 0xa9307155,
-  0x5e0bec6e, 0xa92bd367, 0x5e07a932, 0xa92735af, 0x5e0365bb, 0xa922982c,
-    0x5dff220b, 0xa91dfadf,
-  0x5dfade20, 0xa9195dc7, 0x5df699fc, 0xa914c0e6, 0x5df2559e, 0xa9102439,
-    0x5dee1105, 0xa90b87c3,
-  0x5de9cc33, 0xa906eb82, 0x5de58727, 0xa9024f76, 0x5de141e1, 0xa8fdb3a1,
-    0x5ddcfc61, 0xa8f91801,
-  0x5dd8b6a7, 0xa8f47c97, 0x5dd470b3, 0xa8efe162, 0x5dd02a85, 0xa8eb4663,
-    0x5dcbe41d, 0xa8e6ab9a,
-  0x5dc79d7c, 0xa8e21106, 0x5dc356a1, 0xa8dd76a9, 0x5dbf0f8c, 0xa8d8dc81,
-    0x5dbac83d, 0xa8d4428f,
-  0x5db680b4, 0xa8cfa8d2, 0x5db238f1, 0xa8cb0f4b, 0x5dadf0f5, 0xa8c675fb,
-    0x5da9a8bf, 0xa8c1dce0,
-  0x5da5604f, 0xa8bd43fa, 0x5da117a5, 0xa8b8ab4b, 0x5d9ccec2, 0xa8b412d1,
-    0x5d9885a5, 0xa8af7a8e,
-  0x5d943c4e, 0xa8aae280, 0x5d8ff2bd, 0xa8a64aa8, 0x5d8ba8f3, 0xa8a1b306,
-    0x5d875eef, 0xa89d1b99,
-  0x5d8314b1, 0xa8988463, 0x5d7eca39, 0xa893ed63, 0x5d7a7f88, 0xa88f5698,
-    0x5d76349d, 0xa88ac004,
-  0x5d71e979, 0xa88629a5, 0x5d6d9e1b, 0xa881937c, 0x5d695283, 0xa87cfd8a,
-    0x5d6506b2, 0xa87867cd,
-  0x5d60baa7, 0xa873d246, 0x5d5c6e62, 0xa86f3cf6, 0x5d5821e4, 0xa86aa7db,
-    0x5d53d52d, 0xa86612f6,
-  0x5d4f883b, 0xa8617e48, 0x5d4b3b10, 0xa85ce9cf, 0x5d46edac, 0xa858558d,
-    0x5d42a00e, 0xa853c180,
-  0x5d3e5237, 0xa84f2daa, 0x5d3a0426, 0xa84a9a0a, 0x5d35b5db, 0xa84606a0,
-    0x5d316757, 0xa841736c,
-  0x5d2d189a, 0xa83ce06e, 0x5d28c9a3, 0xa8384da6, 0x5d247a72, 0xa833bb14,
-    0x5d202b09, 0xa82f28b9,
-  0x5d1bdb65, 0xa82a9693, 0x5d178b89, 0xa82604a4, 0x5d133b72, 0xa82172eb,
-    0x5d0eeb23, 0xa81ce169,
-  0x5d0a9a9a, 0xa818501c, 0x5d0649d7, 0xa813bf06, 0x5d01f8dc, 0xa80f2e26,
-    0x5cfda7a7, 0xa80a9d7c,
-  0x5cf95638, 0xa8060d08, 0x5cf50490, 0xa8017ccb, 0x5cf0b2af, 0xa7fcecc4,
-    0x5cec6095, 0xa7f85cf3,
-  0x5ce80e41, 0xa7f3cd59, 0x5ce3bbb4, 0xa7ef3df5, 0x5cdf68ed, 0xa7eaaec7,
-    0x5cdb15ed, 0xa7e61fd0,
-  0x5cd6c2b5, 0xa7e1910f, 0x5cd26f42, 0xa7dd0284, 0x5cce1b97, 0xa7d8742f,
-    0x5cc9c7b2, 0xa7d3e611,
-  0x5cc57394, 0xa7cf582a, 0x5cc11f3d, 0xa7caca79, 0x5cbccaac, 0xa7c63cfe,
-    0x5cb875e3, 0xa7c1afb9,
-  0x5cb420e0, 0xa7bd22ac, 0x5cafcba4, 0xa7b895d4, 0x5cab762f, 0xa7b40933,
-    0x5ca72080, 0xa7af7cc8,
-  0x5ca2ca99, 0xa7aaf094, 0x5c9e7478, 0xa7a66497, 0x5c9a1e1e, 0xa7a1d8d0,
-    0x5c95c78b, 0xa79d4d3f,
-  0x5c9170bf, 0xa798c1e5, 0x5c8d19ba, 0xa79436c1, 0x5c88c27c, 0xa78fabd4,
-    0x5c846b05, 0xa78b211e,
-  0x5c801354, 0xa786969e, 0x5c7bbb6b, 0xa7820c55, 0x5c776348, 0xa77d8242,
-    0x5c730aed, 0xa778f866,
-  0x5c6eb258, 0xa7746ec0, 0x5c6a598b, 0xa76fe551, 0x5c660084, 0xa76b5c19,
-    0x5c61a745, 0xa766d317,
-  0x5c5d4dcc, 0xa7624a4d, 0x5c58f41a, 0xa75dc1b8, 0x5c549a30, 0xa759395b,
-    0x5c50400d, 0xa754b134,
-  0x5c4be5b0, 0xa7502943, 0x5c478b1b, 0xa74ba18a, 0x5c43304d, 0xa7471a07,
-    0x5c3ed545, 0xa74292bb,
-  0x5c3a7a05, 0xa73e0ba5, 0x5c361e8c, 0xa73984c7, 0x5c31c2db, 0xa734fe1f,
-    0x5c2d66f0, 0xa73077ae,
-  0x5c290acc, 0xa72bf174, 0x5c24ae70, 0xa7276b70, 0x5c2051db, 0xa722e5a3,
-    0x5c1bf50d, 0xa71e600d,
-  0x5c179806, 0xa719daae, 0x5c133ac6, 0xa7155586, 0x5c0edd4e, 0xa710d095,
-    0x5c0a7f9c, 0xa70c4bda,
-  0x5c0621b2, 0xa707c757, 0x5c01c38f, 0xa703430a, 0x5bfd6534, 0xa6febef4,
-    0x5bf906a0, 0xa6fa3b15,
-  0x5bf4a7d2, 0xa6f5b76d, 0x5bf048cd, 0xa6f133fc, 0x5bebe98e, 0xa6ecb0c2,
-    0x5be78a17, 0xa6e82dbe,
-  0x5be32a67, 0xa6e3aaf2, 0x5bdeca7f, 0xa6df285d, 0x5bda6a5d, 0xa6daa5fe,
-    0x5bd60a03, 0xa6d623d7,
-  0x5bd1a971, 0xa6d1a1e7, 0x5bcd48a6, 0xa6cd202d, 0x5bc8e7a2, 0xa6c89eab,
-    0x5bc48666, 0xa6c41d60,
-  0x5bc024f0, 0xa6bf9c4b, 0x5bbbc343, 0xa6bb1b6e, 0x5bb7615d, 0xa6b69ac8,
-    0x5bb2ff3e, 0xa6b21a59,
-  0x5bae9ce7, 0xa6ad9a21, 0x5baa3a57, 0xa6a91a20, 0x5ba5d78e, 0xa6a49a56,
-    0x5ba1748d, 0xa6a01ac4,
-  0x5b9d1154, 0xa69b9b68, 0x5b98ade2, 0xa6971c44, 0x5b944a37, 0xa6929d57,
-    0x5b8fe654, 0xa68e1ea1,
-  0x5b8b8239, 0xa689a022, 0x5b871de5, 0xa68521da, 0x5b82b958, 0xa680a3ca,
-    0x5b7e5493, 0xa67c25f0,
-  0x5b79ef96, 0xa677a84e, 0x5b758a60, 0xa6732ae3, 0x5b7124f2, 0xa66eadb0,
-    0x5b6cbf4c, 0xa66a30b3,
-  0x5b68596d, 0xa665b3ee, 0x5b63f355, 0xa6613760, 0x5b5f8d06, 0xa65cbb0a,
-    0x5b5b267e, 0xa6583eeb,
-  0x5b56bfbd, 0xa653c303, 0x5b5258c4, 0xa64f4752, 0x5b4df193, 0xa64acbd9,
-    0x5b498a2a, 0xa6465097,
-  0x5b452288, 0xa641d58c, 0x5b40baae, 0xa63d5ab9, 0x5b3c529c, 0xa638e01d,
-    0x5b37ea51, 0xa63465b9,
-  0x5b3381ce, 0xa62feb8b, 0x5b2f1913, 0xa62b7196, 0x5b2ab020, 0xa626f7d7,
-    0x5b2646f4, 0xa6227e50,
-  0x5b21dd90, 0xa61e0501, 0x5b1d73f4, 0xa6198be9, 0x5b190a20, 0xa6151308,
-    0x5b14a014, 0xa6109a5f,
-  0x5b1035cf, 0xa60c21ee, 0x5b0bcb52, 0xa607a9b4, 0x5b07609d, 0xa60331b1,
-    0x5b02f5b0, 0xa5feb9e6,
-  0x5afe8a8b, 0xa5fa4252, 0x5afa1f2e, 0xa5f5caf6, 0x5af5b398, 0xa5f153d2,
-    0x5af147ca, 0xa5ecdce5,
-  0x5aecdbc5, 0xa5e8662f, 0x5ae86f87, 0xa5e3efb1, 0x5ae40311, 0xa5df796b,
-    0x5adf9663, 0xa5db035c,
-  0x5adb297d, 0xa5d68d85, 0x5ad6bc5f, 0xa5d217e6, 0x5ad24f09, 0xa5cda27e,
-    0x5acde17b, 0xa5c92d4e,
-  0x5ac973b5, 0xa5c4b855, 0x5ac505b7, 0xa5c04395, 0x5ac09781, 0xa5bbcf0b,
-    0x5abc2912, 0xa5b75aba,
-  0x5ab7ba6c, 0xa5b2e6a0, 0x5ab34b8e, 0xa5ae72be, 0x5aaedc78, 0xa5a9ff14,
-    0x5aaa6d2b, 0xa5a58ba1,
-  0x5aa5fda5, 0xa5a11866, 0x5aa18de7, 0xa59ca563, 0x5a9d1df1, 0xa5983297,
-    0x5a98adc4, 0xa593c004,
-  0x5a943d5e, 0xa58f4da8, 0x5a8fccc1, 0xa58adb84, 0x5a8b5bec, 0xa5866997,
-    0x5a86eadf, 0xa581f7e3,
-  0x5a82799a, 0xa57d8666, 0x5a7e081d, 0xa5791521, 0x5a799669, 0xa574a414,
-    0x5a75247c, 0xa570333f,
-  0x5a70b258, 0xa56bc2a2, 0x5a6c3ffc, 0xa567523c, 0x5a67cd69, 0xa562e20f,
-    0x5a635a9d, 0xa55e7219,
-  0x5a5ee79a, 0xa55a025b, 0x5a5a745f, 0xa55592d5, 0x5a5600ec, 0xa5512388,
-    0x5a518d42, 0xa54cb472,
-  0x5a4d1960, 0xa5484594, 0x5a48a546, 0xa543d6ee, 0x5a4430f5, 0xa53f687f,
-    0x5a3fbc6b, 0xa53afa49,
-  0x5a3b47ab, 0xa5368c4b, 0x5a36d2b2, 0xa5321e85, 0x5a325d82, 0xa52db0f7,
-    0x5a2de81a, 0xa52943a1,
-  0x5a29727b, 0xa524d683, 0x5a24fca4, 0xa520699d, 0x5a208695, 0xa51bfcef,
-    0x5a1c104f, 0xa5179079,
-  0x5a1799d1, 0xa513243b, 0x5a13231b, 0xa50eb836, 0x5a0eac2e, 0xa50a4c68,
-    0x5a0a350a, 0xa505e0d2,
-  0x5a05bdae, 0xa5017575, 0x5a01461a, 0xa4fd0a50, 0x59fcce4f, 0xa4f89f63,
-    0x59f8564c, 0xa4f434ae,
-  0x59f3de12, 0xa4efca31, 0x59ef65a1, 0xa4eb5fec, 0x59eaecf8, 0xa4e6f5e0,
-    0x59e67417, 0xa4e28c0c,
-  0x59e1faff, 0xa4de2270, 0x59dd81b0, 0xa4d9b90c, 0x59d90829, 0xa4d54fe0,
-    0x59d48e6a, 0xa4d0e6ed,
-  0x59d01475, 0xa4cc7e32, 0x59cb9a47, 0xa4c815af, 0x59c71fe3, 0xa4c3ad64,
-    0x59c2a547, 0xa4bf4552,
-  0x59be2a74, 0xa4badd78, 0x59b9af69, 0xa4b675d6, 0x59b53427, 0xa4b20e6d,
-    0x59b0b8ae, 0xa4ada73c,
-  0x59ac3cfd, 0xa4a94043, 0x59a7c115, 0xa4a4d982, 0x59a344f6, 0xa4a072fa,
-    0x599ec8a0, 0xa49c0cab,
-  0x599a4c12, 0xa497a693, 0x5995cf4d, 0xa49340b4, 0x59915250, 0xa48edb0e,
-    0x598cd51d, 0xa48a75a0,
-  0x598857b2, 0xa486106a, 0x5983da10, 0xa481ab6d, 0x597f5c36, 0xa47d46a8,
-    0x597ade26, 0xa478e21b,
-  0x59765fde, 0xa4747dc7, 0x5971e15f, 0xa47019ac, 0x596d62a9, 0xa46bb5c9,
-    0x5968e3bc, 0xa467521e,
-  0x59646498, 0xa462eeac, 0x595fe53c, 0xa45e8b73, 0x595b65aa, 0xa45a2872,
-    0x5956e5e0, 0xa455c5a9,
-  0x595265df, 0xa4516319, 0x594de5a7, 0xa44d00c2, 0x59496538, 0xa4489ea3,
-    0x5944e492, 0xa4443cbd,
-  0x594063b5, 0xa43fdb10, 0x593be2a0, 0xa43b799a, 0x59376155, 0xa437185e,
-    0x5932dfd3, 0xa432b75a,
-  0x592e5e19, 0xa42e568f, 0x5929dc29, 0xa429f5fd, 0x59255a02, 0xa42595a3,
-    0x5920d7a3, 0xa4213581,
-  0x591c550e, 0xa41cd599, 0x5917d242, 0xa41875e9, 0x59134f3e, 0xa4141672,
-    0x590ecc04, 0xa40fb733,
-  0x590a4893, 0xa40b582e, 0x5905c4eb, 0xa406f960, 0x5901410c, 0xa4029acc,
-    0x58fcbcf6, 0xa3fe3c71,
-  0x58f838a9, 0xa3f9de4e, 0x58f3b426, 0xa3f58064, 0x58ef2f6b, 0xa3f122b2,
-    0x58eaaa7a, 0xa3ecc53a,
-  0x58e62552, 0xa3e867fa, 0x58e19ff3, 0xa3e40af3, 0x58dd1a5d, 0xa3dfae25,
-    0x58d89490, 0xa3db5190,
-  0x58d40e8c, 0xa3d6f534, 0x58cf8852, 0xa3d29910, 0x58cb01e1, 0xa3ce3d25,
-    0x58c67b39, 0xa3c9e174,
-  0x58c1f45b, 0xa3c585fb, 0x58bd6d45, 0xa3c12abb, 0x58b8e5f9, 0xa3bccfb3,
-    0x58b45e76, 0xa3b874e5,
-  0x58afd6bd, 0xa3b41a50, 0x58ab4ecc, 0xa3afbff3, 0x58a6c6a5, 0xa3ab65d0,
-    0x58a23e48, 0xa3a70be6,
-  0x589db5b3, 0xa3a2b234, 0x58992ce9, 0xa39e58bb, 0x5894a3e7, 0xa399ff7c,
-    0x58901aaf, 0xa395a675,
-  0x588b9140, 0xa3914da8, 0x5887079a, 0xa38cf513, 0x58827dbe, 0xa3889cb8,
-    0x587df3ab, 0xa3844495,
-  0x58796962, 0xa37fecac, 0x5874dee2, 0xa37b94fb, 0x5870542c, 0xa3773d84,
-    0x586bc93f, 0xa372e646,
-  0x58673e1b, 0xa36e8f41, 0x5862b2c1, 0xa36a3875, 0x585e2730, 0xa365e1e2,
-    0x58599b69, 0xa3618b88,
-  0x58550f6c, 0xa35d3567, 0x58508338, 0xa358df80, 0x584bf6cd, 0xa35489d1,
-    0x58476a2c, 0xa350345c,
-  0x5842dd54, 0xa34bdf20, 0x583e5047, 0xa3478a1d, 0x5839c302, 0xa3433554,
-    0x58353587, 0xa33ee0c3,
-  0x5830a7d6, 0xa33a8c6c, 0x582c19ef, 0xa336384e, 0x58278bd1, 0xa331e469,
-    0x5822fd7c, 0xa32d90be,
-  0x581e6ef1, 0xa3293d4b, 0x5819e030, 0xa324ea13, 0x58155139, 0xa3209713,
-    0x5810c20b, 0xa31c444c,
-  0x580c32a7, 0xa317f1bf, 0x5807a30d, 0xa3139f6b, 0x5803133c, 0xa30f4d51,
-    0x57fe8335, 0xa30afb70,
-  0x57f9f2f8, 0xa306a9c8, 0x57f56284, 0xa3025859, 0x57f0d1da, 0xa2fe0724,
-    0x57ec40fa, 0xa2f9b629,
-  0x57e7afe4, 0xa2f56566, 0x57e31e97, 0xa2f114dd, 0x57de8d15, 0xa2ecc48e,
-    0x57d9fb5c, 0xa2e87477,
-  0x57d5696d, 0xa2e4249b, 0x57d0d747, 0xa2dfd4f7, 0x57cc44ec, 0xa2db858e,
-    0x57c7b25a, 0xa2d7365d,
-  0x57c31f92, 0xa2d2e766, 0x57be8c94, 0xa2ce98a9, 0x57b9f960, 0xa2ca4a25,
-    0x57b565f6, 0xa2c5fbda,
-  0x57b0d256, 0xa2c1adc9, 0x57ac3e80, 0xa2bd5ff2, 0x57a7aa73, 0xa2b91254,
-    0x57a31631, 0xa2b4c4f0,
-  0x579e81b8, 0xa2b077c5, 0x5799ed0a, 0xa2ac2ad3, 0x57955825, 0xa2a7de1c,
-    0x5790c30a, 0xa2a3919e,
-  0x578c2dba, 0xa29f4559, 0x57879833, 0xa29af94e, 0x57830276, 0xa296ad7d,
-    0x577e6c84, 0xa29261e5,
-  0x5779d65b, 0xa28e1687, 0x57753ffc, 0xa289cb63, 0x5770a968, 0xa2858078,
-    0x576c129d, 0xa28135c7,
-  0x57677b9d, 0xa27ceb4f, 0x5762e467, 0xa278a111, 0x575e4cfa, 0xa274570d,
-    0x5759b558, 0xa2700d43,
-  0x57551d80, 0xa26bc3b2, 0x57508572, 0xa2677a5b, 0x574bed2f, 0xa263313e,
-    0x574754b5, 0xa25ee85b,
-  0x5742bc06, 0xa25a9fb1, 0x573e2320, 0xa2565741, 0x57398a05, 0xa2520f0b,
-    0x5734f0b5, 0xa24dc70f,
-  0x5730572e, 0xa2497f4c, 0x572bbd71, 0xa24537c3, 0x5727237f, 0xa240f074,
-    0x57228957, 0xa23ca95f,
-  0x571deefa, 0xa2386284, 0x57195466, 0xa2341be3, 0x5714b99d, 0xa22fd57b,
-    0x57101e9e, 0xa22b8f4d,
-  0x570b8369, 0xa2274959, 0x5706e7ff, 0xa223039f, 0x57024c5f, 0xa21ebe1f,
-    0x56fdb08a, 0xa21a78d9,
-  0x56f9147e, 0xa21633cd, 0x56f4783d, 0xa211eefb, 0x56efdbc7, 0xa20daa62,
-    0x56eb3f1a, 0xa2096604,
-  0x56e6a239, 0xa20521e0, 0x56e20521, 0xa200ddf5, 0x56dd67d4, 0xa1fc9a45,
-    0x56d8ca51, 0xa1f856ce,
-  0x56d42c99, 0xa1f41392, 0x56cf8eab, 0xa1efd08f, 0x56caf088, 0xa1eb8dc7,
-    0x56c6522f, 0xa1e74b38,
-  0x56c1b3a1, 0xa1e308e4, 0x56bd14dd, 0xa1dec6ca, 0x56b875e4, 0xa1da84e9,
-    0x56b3d6b5, 0xa1d64343,
-  0x56af3750, 0xa1d201d7, 0x56aa97b7, 0xa1cdc0a5, 0x56a5f7e7, 0xa1c97fad,
-    0x56a157e3, 0xa1c53ef0,
-  0x569cb7a8, 0xa1c0fe6c, 0x56981739, 0xa1bcbe22, 0x56937694, 0xa1b87e13,
-    0x568ed5b9, 0xa1b43e3e,
-  0x568a34a9, 0xa1affea3, 0x56859364, 0xa1abbf42, 0x5680f1ea, 0xa1a7801b,
-    0x567c503a, 0xa1a3412f,
-  0x5677ae54, 0xa19f027c, 0x56730c3a, 0xa19ac404, 0x566e69ea, 0xa19685c7,
-    0x5669c765, 0xa19247c3,
-  0x566524aa, 0xa18e09fa, 0x566081ba, 0xa189cc6b, 0x565bde95, 0xa1858f16,
-    0x56573b3b, 0xa18151fb,
-  0x565297ab, 0xa17d151b, 0x564df3e6, 0xa178d875, 0x56494fec, 0xa1749c09,
-    0x5644abbc, 0xa1705fd8,
-  0x56400758, 0xa16c23e1, 0x563b62be, 0xa167e824, 0x5636bdef, 0xa163aca2,
-    0x563218eb, 0xa15f715a,
-  0x562d73b2, 0xa15b364d, 0x5628ce43, 0xa156fb79, 0x5624289f, 0xa152c0e1,
-    0x561f82c7, 0xa14e8682,
-  0x561adcb9, 0xa14a4c5e, 0x56163676, 0xa1461275, 0x56118ffe, 0xa141d8c5,
-    0x560ce950, 0xa13d9f51,
-  0x5608426e, 0xa1396617, 0x56039b57, 0xa1352d17, 0x55fef40a, 0xa130f451,
-    0x55fa4c89, 0xa12cbbc7,
-  0x55f5a4d2, 0xa1288376, 0x55f0fce7, 0xa1244b61, 0x55ec54c6, 0xa1201385,
-    0x55e7ac71, 0xa11bdbe4,
-  0x55e303e6, 0xa117a47e, 0x55de5b27, 0xa1136d52, 0x55d9b232, 0xa10f3661,
-    0x55d50909, 0xa10affab,
-  0x55d05faa, 0xa106c92f, 0x55cbb617, 0xa10292ed, 0x55c70c4f, 0xa0fe5ce6,
-    0x55c26251, 0xa0fa271a,
-  0x55bdb81f, 0xa0f5f189, 0x55b90db8, 0xa0f1bc32, 0x55b4631d, 0xa0ed8715,
-    0x55afb84c, 0xa0e95234,
-  0x55ab0d46, 0xa0e51d8c, 0x55a6620c, 0xa0e0e920, 0x55a1b69d, 0xa0dcb4ee,
-    0x559d0af9, 0xa0d880f7,
-  0x55985f20, 0xa0d44d3b, 0x5593b312, 0xa0d019b9, 0x558f06d0, 0xa0cbe672,
-    0x558a5a58, 0xa0c7b366,
-  0x5585adad, 0xa0c38095, 0x558100cc, 0xa0bf4dfe, 0x557c53b6, 0xa0bb1ba2,
-    0x5577a66c, 0xa0b6e981,
-  0x5572f8ed, 0xa0b2b79b, 0x556e4b39, 0xa0ae85ef, 0x55699d51, 0xa0aa547e,
-    0x5564ef34, 0xa0a62348,
-  0x556040e2, 0xa0a1f24d, 0x555b925c, 0xa09dc18d, 0x5556e3a1, 0xa0999107,
-    0x555234b1, 0xa09560bc,
-  0x554d858d, 0xa09130ad, 0x5548d634, 0xa08d00d8, 0x554426a7, 0xa088d13e,
-    0x553f76e4, 0xa084a1de,
-  0x553ac6ee, 0xa08072ba, 0x553616c2, 0xa07c43d1, 0x55316663, 0xa0781522,
-    0x552cb5ce, 0xa073e6af,
-  0x55280505, 0xa06fb876, 0x55235408, 0xa06b8a78, 0x551ea2d6, 0xa0675cb6,
-    0x5519f16f, 0xa0632f2e,
-  0x55153fd4, 0xa05f01e1, 0x55108e05, 0xa05ad4cf, 0x550bdc01, 0xa056a7f9,
-    0x550729c9, 0xa0527b5d,
-  0x5502775c, 0xa04e4efc, 0x54fdc4ba, 0xa04a22d7, 0x54f911e5, 0xa045f6ec,
-    0x54f45edb, 0xa041cb3c,
-  0x54efab9c, 0xa03d9fc8, 0x54eaf829, 0xa039748e, 0x54e64482, 0xa0354990,
-    0x54e190a6, 0xa0311ecd,
-  0x54dcdc96, 0xa02cf444, 0x54d82852, 0xa028c9f7, 0x54d373d9, 0xa0249fe5,
-    0x54cebf2c, 0xa020760e,
-  0x54ca0a4b, 0xa01c4c73, 0x54c55535, 0xa0182312, 0x54c09feb, 0xa013f9ed,
-    0x54bbea6d, 0xa00fd102,
-  0x54b734ba, 0xa00ba853, 0x54b27ed3, 0xa0077fdf, 0x54adc8b8, 0xa00357a7,
-    0x54a91269, 0x9fff2fa9,
-  0x54a45be6, 0x9ffb07e7, 0x549fa52e, 0x9ff6e060, 0x549aee42, 0x9ff2b914,
-    0x54963722, 0x9fee9204,
-  0x54917fce, 0x9fea6b2f, 0x548cc845, 0x9fe64495, 0x54881089, 0x9fe21e36,
-    0x54835898, 0x9fddf812,
-  0x547ea073, 0x9fd9d22a, 0x5479e81a, 0x9fd5ac7d, 0x54752f8d, 0x9fd1870c,
-    0x547076cc, 0x9fcd61d6,
-  0x546bbdd7, 0x9fc93cdb, 0x546704ae, 0x9fc5181b, 0x54624b50, 0x9fc0f397,
-    0x545d91bf, 0x9fbccf4f,
-  0x5458d7f9, 0x9fb8ab41, 0x54541e00, 0x9fb4876f, 0x544f63d2, 0x9fb063d9,
-    0x544aa971, 0x9fac407e,
-  0x5445eedb, 0x9fa81d5e, 0x54413412, 0x9fa3fa79, 0x543c7914, 0x9f9fd7d1,
-    0x5437bde3, 0x9f9bb563,
-  0x5433027d, 0x9f979331, 0x542e46e4, 0x9f93713b, 0x54298b17, 0x9f8f4f80,
-    0x5424cf16, 0x9f8b2e00,
-  0x542012e1, 0x9f870cbc, 0x541b5678, 0x9f82ebb4, 0x541699db, 0x9f7ecae7,
-    0x5411dd0a, 0x9f7aaa55,
-  0x540d2005, 0x9f7689ff, 0x540862cd, 0x9f7269e5, 0x5403a561, 0x9f6e4a06,
-    0x53fee7c1, 0x9f6a2a63,
-  0x53fa29ed, 0x9f660afb, 0x53f56be5, 0x9f61ebcf, 0x53f0adaa, 0x9f5dccde,
-    0x53ebef3a, 0x9f59ae29,
-  0x53e73097, 0x9f558fb0, 0x53e271c0, 0x9f517173, 0x53ddb2b6, 0x9f4d5371,
-    0x53d8f378, 0x9f4935aa,
-  0x53d43406, 0x9f45181f, 0x53cf7460, 0x9f40fad0, 0x53cab486, 0x9f3cddbd,
-    0x53c5f479, 0x9f38c0e5,
-  0x53c13439, 0x9f34a449, 0x53bc73c4, 0x9f3087e9, 0x53b7b31c, 0x9f2c6bc5,
-    0x53b2f240, 0x9f284fdc,
-  0x53ae3131, 0x9f24342f, 0x53a96fee, 0x9f2018bd, 0x53a4ae77, 0x9f1bfd88,
-    0x539feccd, 0x9f17e28e,
-  0x539b2af0, 0x9f13c7d0, 0x539668de, 0x9f0fad4e, 0x5391a699, 0x9f0b9307,
-    0x538ce421, 0x9f0778fd,
-  0x53882175, 0x9f035f2e, 0x53835e95, 0x9eff459b, 0x537e9b82, 0x9efb2c44,
-    0x5379d83c, 0x9ef71328,
-  0x537514c2, 0x9ef2fa49, 0x53705114, 0x9eeee1a5, 0x536b8d33, 0x9eeac93e,
-    0x5366c91f, 0x9ee6b112,
-  0x536204d7, 0x9ee29922, 0x535d405c, 0x9ede816e, 0x53587bad, 0x9eda69f6,
-    0x5353b6cb, 0x9ed652ba,
-  0x534ef1b5, 0x9ed23bb9, 0x534a2c6c, 0x9ece24f5, 0x534566f0, 0x9eca0e6d,
-    0x5340a140, 0x9ec5f820,
-  0x533bdb5d, 0x9ec1e210, 0x53371547, 0x9ebdcc3b, 0x53324efd, 0x9eb9b6a3,
-    0x532d8880, 0x9eb5a146,
-  0x5328c1d0, 0x9eb18c26, 0x5323faec, 0x9ead7742, 0x531f33d5, 0x9ea96299,
-    0x531a6c8b, 0x9ea54e2d,
-  0x5315a50e, 0x9ea139fd, 0x5310dd5d, 0x9e9d2608, 0x530c1579, 0x9e991250,
-    0x53074d62, 0x9e94fed4,
-  0x53028518, 0x9e90eb94, 0x52fdbc9a, 0x9e8cd890, 0x52f8f3e9, 0x9e88c5c9,
-    0x52f42b05, 0x9e84b33d,
-  0x52ef61ee, 0x9e80a0ee, 0x52ea98a4, 0x9e7c8eda, 0x52e5cf27, 0x9e787d03,
-    0x52e10576, 0x9e746b68,
-  0x52dc3b92, 0x9e705a09, 0x52d7717b, 0x9e6c48e7, 0x52d2a732, 0x9e683800,
-    0x52cddcb5, 0x9e642756,
-  0x52c91204, 0x9e6016e8, 0x52c44721, 0x9e5c06b6, 0x52bf7c0b, 0x9e57f6c0,
-    0x52bab0c2, 0x9e53e707,
-  0x52b5e546, 0x9e4fd78a, 0x52b11996, 0x9e4bc849, 0x52ac4db4, 0x9e47b944,
-    0x52a7819f, 0x9e43aa7c,
-  0x52a2b556, 0x9e3f9bf0, 0x529de8db, 0x9e3b8da0, 0x52991c2d, 0x9e377f8c,
-    0x52944f4c, 0x9e3371b5,
-  0x528f8238, 0x9e2f641b, 0x528ab4f1, 0x9e2b56bc, 0x5285e777, 0x9e27499a,
-    0x528119ca, 0x9e233cb4,
-  0x527c4bea, 0x9e1f300b, 0x52777dd7, 0x9e1b239e, 0x5272af92, 0x9e17176d,
-    0x526de11a, 0x9e130b79,
-  0x5269126e, 0x9e0effc1, 0x52644390, 0x9e0af446, 0x525f7480, 0x9e06e907,
-    0x525aa53c, 0x9e02de04,
-  0x5255d5c5, 0x9dfed33e, 0x5251061c, 0x9dfac8b4, 0x524c3640, 0x9df6be67,
-    0x52476631, 0x9df2b456,
-  0x524295f0, 0x9deeaa82, 0x523dc57b, 0x9deaa0ea, 0x5238f4d4, 0x9de6978f,
-    0x523423fb, 0x9de28e70,
-  0x522f52ee, 0x9dde858e, 0x522a81af, 0x9dda7ce9, 0x5225b03d, 0x9dd6747f,
-    0x5220de99, 0x9dd26c53,
-  0x521c0cc2, 0x9dce6463, 0x52173ab8, 0x9dca5caf, 0x5212687b, 0x9dc65539,
-    0x520d960c, 0x9dc24dfe,
-  0x5208c36a, 0x9dbe4701, 0x5203f096, 0x9dba4040, 0x51ff1d8f, 0x9db639bb,
-    0x51fa4a56, 0x9db23373,
-  0x51f576ea, 0x9dae2d68, 0x51f0a34b, 0x9daa279a, 0x51ebcf7a, 0x9da62208,
-    0x51e6fb76, 0x9da21cb2,
-  0x51e22740, 0x9d9e179a, 0x51dd52d7, 0x9d9a12be, 0x51d87e3c, 0x9d960e1f,
-    0x51d3a96f, 0x9d9209bd,
-  0x51ced46e, 0x9d8e0597, 0x51c9ff3c, 0x9d8a01ae, 0x51c529d7, 0x9d85fe02,
-    0x51c0543f, 0x9d81fa92,
-  0x51bb7e75, 0x9d7df75f, 0x51b6a879, 0x9d79f469, 0x51b1d24a, 0x9d75f1b0,
-    0x51acfbe9, 0x9d71ef34,
-  0x51a82555, 0x9d6decf4, 0x51a34e8f, 0x9d69eaf1, 0x519e7797, 0x9d65e92b,
-    0x5199a06d, 0x9d61e7a2,
-  0x5194c910, 0x9d5de656, 0x518ff180, 0x9d59e546, 0x518b19bf, 0x9d55e473,
-    0x518641cb, 0x9d51e3dd,
-  0x518169a5, 0x9d4de385, 0x517c914c, 0x9d49e368, 0x5177b8c2, 0x9d45e389,
-    0x5172e005, 0x9d41e3e7,
-  0x516e0715, 0x9d3de482, 0x51692df4, 0x9d39e559, 0x516454a0, 0x9d35e66e,
-    0x515f7b1a, 0x9d31e7bf,
-  0x515aa162, 0x9d2de94d, 0x5155c778, 0x9d29eb19, 0x5150ed5c, 0x9d25ed21,
-    0x514c130d, 0x9d21ef66,
-  0x5147388c, 0x9d1df1e9, 0x51425dd9, 0x9d19f4a8, 0x513d82f4, 0x9d15f7a4,
-    0x5138a7dd, 0x9d11fadd,
-  0x5133cc94, 0x9d0dfe54, 0x512ef119, 0x9d0a0207, 0x512a156b, 0x9d0605f7,
-    0x5125398c, 0x9d020a25,
-  0x51205d7b, 0x9cfe0e8f, 0x511b8137, 0x9cfa1337, 0x5116a4c1, 0x9cf6181c,
-    0x5111c81a, 0x9cf21d3d,
-  0x510ceb40, 0x9cee229c, 0x51080e35, 0x9cea2838, 0x510330f7, 0x9ce62e11,
-    0x50fe5388, 0x9ce23427,
-  0x50f975e6, 0x9cde3a7b, 0x50f49813, 0x9cda410b, 0x50efba0d, 0x9cd647d9,
-    0x50eadbd6, 0x9cd24ee4,
-  0x50e5fd6d, 0x9cce562c, 0x50e11ed2, 0x9cca5db1, 0x50dc4005, 0x9cc66573,
-    0x50d76106, 0x9cc26d73,
-  0x50d281d5, 0x9cbe75b0, 0x50cda272, 0x9cba7e2a, 0x50c8c2de, 0x9cb686e1,
-    0x50c3e317, 0x9cb28fd5,
-  0x50bf031f, 0x9cae9907, 0x50ba22f5, 0x9caaa276, 0x50b5429a, 0x9ca6ac23,
-    0x50b0620c, 0x9ca2b60c,
-  0x50ab814d, 0x9c9ec033, 0x50a6a05c, 0x9c9aca97, 0x50a1bf39, 0x9c96d539,
-    0x509cdde4, 0x9c92e017,
-  0x5097fc5e, 0x9c8eeb34, 0x50931aa6, 0x9c8af68d, 0x508e38bd, 0x9c870224,
-    0x508956a1, 0x9c830df8,
-  0x50847454, 0x9c7f1a0a, 0x507f91d5, 0x9c7b2659, 0x507aaf25, 0x9c7732e5,
-    0x5075cc43, 0x9c733faf,
-  0x5070e92f, 0x9c6f4cb6, 0x506c05ea, 0x9c6b59fa, 0x50672273, 0x9c67677c,
-    0x50623ecb, 0x9c63753c,
-  0x505d5af1, 0x9c5f8339, 0x505876e5, 0x9c5b9173, 0x505392a8, 0x9c579feb,
-    0x504eae39, 0x9c53aea0,
-  0x5049c999, 0x9c4fbd93, 0x5044e4c7, 0x9c4bccc3, 0x503fffc4, 0x9c47dc31,
-    0x503b1a8f, 0x9c43ebdc,
-  0x50363529, 0x9c3ffbc5, 0x50314f91, 0x9c3c0beb, 0x502c69c8, 0x9c381c4f,
-    0x502783cd, 0x9c342cf0,
-  0x50229da1, 0x9c303dcf, 0x501db743, 0x9c2c4eec, 0x5018d0b4, 0x9c286046,
-    0x5013e9f4, 0x9c2471de,
-  0x500f0302, 0x9c2083b3, 0x500a1bdf, 0x9c1c95c6, 0x5005348a, 0x9c18a816,
-    0x50004d04, 0x9c14baa4,
-  0x4ffb654d, 0x9c10cd70, 0x4ff67d64, 0x9c0ce07a, 0x4ff1954b, 0x9c08f3c1,
-    0x4fecacff, 0x9c050745,
-  0x4fe7c483, 0x9c011b08, 0x4fe2dbd5, 0x9bfd2f08, 0x4fddf2f6, 0x9bf94346,
-    0x4fd909e5, 0x9bf557c1,
-  0x4fd420a4, 0x9bf16c7a, 0x4fcf3731, 0x9bed8171, 0x4fca4d8d, 0x9be996a6,
-    0x4fc563b7, 0x9be5ac18,
-  0x4fc079b1, 0x9be1c1c8, 0x4fbb8f79, 0x9bddd7b6, 0x4fb6a510, 0x9bd9ede2,
-    0x4fb1ba76, 0x9bd6044b,
-  0x4faccfab, 0x9bd21af3, 0x4fa7e4af, 0x9bce31d8, 0x4fa2f981, 0x9bca48fa,
-    0x4f9e0e22, 0x9bc6605b,
-  0x4f992293, 0x9bc277fa, 0x4f9436d2, 0x9bbe8fd6, 0x4f8f4ae0, 0x9bbaa7f0,
-    0x4f8a5ebd, 0x9bb6c048,
-  0x4f857269, 0x9bb2d8de, 0x4f8085e4, 0x9baef1b2, 0x4f7b992d, 0x9bab0ac3,
-    0x4f76ac46, 0x9ba72413,
-  0x4f71bf2e, 0x9ba33da0, 0x4f6cd1e5, 0x9b9f576b, 0x4f67e46a, 0x9b9b7174,
-    0x4f62f6bf, 0x9b978bbc,
-  0x4f5e08e3, 0x9b93a641, 0x4f591ad6, 0x9b8fc104, 0x4f542c98, 0x9b8bdc05,
-    0x4f4f3e29, 0x9b87f744,
-  0x4f4a4f89, 0x9b8412c1, 0x4f4560b8, 0x9b802e7b, 0x4f4071b6, 0x9b7c4a74,
-    0x4f3b8284, 0x9b7866ab,
-  0x4f369320, 0x9b748320, 0x4f31a38c, 0x9b709fd3, 0x4f2cb3c7, 0x9b6cbcc4,
-    0x4f27c3d1, 0x9b68d9f3,
-  0x4f22d3aa, 0x9b64f760, 0x4f1de352, 0x9b61150b, 0x4f18f2c9, 0x9b5d32f4,
-    0x4f140210, 0x9b59511c,
-  0x4f0f1126, 0x9b556f81, 0x4f0a200b, 0x9b518e24, 0x4f052ec0, 0x9b4dad06,
-    0x4f003d43, 0x9b49cc26,
-  0x4efb4b96, 0x9b45eb83, 0x4ef659b8, 0x9b420b1f, 0x4ef167aa, 0x9b3e2af9,
-    0x4eec756b, 0x9b3a4b11,
-  0x4ee782fb, 0x9b366b68, 0x4ee2905a, 0x9b328bfc, 0x4edd9d89, 0x9b2eaccf,
-    0x4ed8aa87, 0x9b2acde0,
-  0x4ed3b755, 0x9b26ef2f, 0x4ecec3f2, 0x9b2310bc, 0x4ec9d05e, 0x9b1f3288,
-    0x4ec4dc99, 0x9b1b5492,
-  0x4ebfe8a5, 0x9b1776da, 0x4ebaf47f, 0x9b139960, 0x4eb60029, 0x9b0fbc24,
-    0x4eb10ba2, 0x9b0bdf27,
-  0x4eac16eb, 0x9b080268, 0x4ea72203, 0x9b0425e8, 0x4ea22ceb, 0x9b0049a5,
-    0x4e9d37a3, 0x9afc6da1,
-  0x4e984229, 0x9af891db, 0x4e934c80, 0x9af4b654, 0x4e8e56a5, 0x9af0db0b,
-    0x4e89609b, 0x9aed0000,
-  0x4e846a60, 0x9ae92533, 0x4e7f73f4, 0x9ae54aa5, 0x4e7a7d58, 0x9ae17056,
-    0x4e75868c, 0x9add9644,
-  0x4e708f8f, 0x9ad9bc71, 0x4e6b9862, 0x9ad5e2dd, 0x4e66a105, 0x9ad20987,
-    0x4e61a977, 0x9ace306f,
-  0x4e5cb1b9, 0x9aca5795, 0x4e57b9ca, 0x9ac67efb, 0x4e52c1ab, 0x9ac2a69e,
-    0x4e4dc95c, 0x9abece80,
-  0x4e48d0dd, 0x9abaf6a1, 0x4e43d82d, 0x9ab71eff, 0x4e3edf4d, 0x9ab3479d,
-    0x4e39e63d, 0x9aaf7079,
-  0x4e34ecfc, 0x9aab9993, 0x4e2ff38b, 0x9aa7c2ec, 0x4e2af9ea, 0x9aa3ec83,
-    0x4e260019, 0x9aa01659,
-  0x4e210617, 0x9a9c406e, 0x4e1c0be6, 0x9a986ac1, 0x4e171184, 0x9a949552,
-    0x4e1216f2, 0x9a90c022,
-  0x4e0d1c30, 0x9a8ceb31, 0x4e08213e, 0x9a89167e, 0x4e03261b, 0x9a85420a,
-    0x4dfe2ac9, 0x9a816dd5,
-  0x4df92f46, 0x9a7d99de, 0x4df43393, 0x9a79c625, 0x4def37b0, 0x9a75f2ac,
-    0x4dea3b9d, 0x9a721f71,
-  0x4de53f5a, 0x9a6e4c74, 0x4de042e7, 0x9a6a79b6, 0x4ddb4644, 0x9a66a737,
-    0x4dd64971, 0x9a62d4f7,
-  0x4dd14c6e, 0x9a5f02f5, 0x4dcc4f3b, 0x9a5b3132, 0x4dc751d8, 0x9a575fae,
-    0x4dc25445, 0x9a538e68,
-  0x4dbd5682, 0x9a4fbd61, 0x4db8588f, 0x9a4bec99, 0x4db35a6c, 0x9a481c0f,
-    0x4dae5c19, 0x9a444bc5,
-  0x4da95d96, 0x9a407bb9, 0x4da45ee3, 0x9a3cabeb, 0x4d9f6001, 0x9a38dc5d,
-    0x4d9a60ee, 0x9a350d0d,
-  0x4d9561ac, 0x9a313dfc, 0x4d90623a, 0x9a2d6f2a, 0x4d8b6298, 0x9a29a097,
-    0x4d8662c6, 0x9a25d243,
-  0x4d8162c4, 0x9a22042d, 0x4d7c6293, 0x9a1e3656, 0x4d776231, 0x9a1a68be,
-    0x4d7261a0, 0x9a169b65,
-  0x4d6d60df, 0x9a12ce4b, 0x4d685fef, 0x9a0f016f, 0x4d635ece, 0x9a0b34d3,
-    0x4d5e5d7e, 0x9a076875,
-  0x4d595bfe, 0x9a039c57, 0x4d545a4f, 0x99ffd077, 0x4d4f5870, 0x99fc04d6,
-    0x4d4a5661, 0x99f83974,
-  0x4d455422, 0x99f46e51, 0x4d4051b4, 0x99f0a36d, 0x4d3b4f16, 0x99ecd8c8,
-    0x4d364c48, 0x99e90e62,
-  0x4d31494b, 0x99e5443b, 0x4d2c461e, 0x99e17a53, 0x4d2742c2, 0x99ddb0aa,
-    0x4d223f36, 0x99d9e73f,
-  0x4d1d3b7a, 0x99d61e14, 0x4d18378f, 0x99d25528, 0x4d133374, 0x99ce8c7b,
-    0x4d0e2f2a, 0x99cac40d,
-  0x4d092ab0, 0x99c6fbde, 0x4d042607, 0x99c333ee, 0x4cff212e, 0x99bf6c3d,
-    0x4cfa1c26, 0x99bba4cb,
-  0x4cf516ee, 0x99b7dd99, 0x4cf01187, 0x99b416a5, 0x4ceb0bf0, 0x99b04ff0,
-    0x4ce6062a, 0x99ac897b,
-  0x4ce10034, 0x99a8c345, 0x4cdbfa0f, 0x99a4fd4d, 0x4cd6f3bb, 0x99a13795,
-    0x4cd1ed37, 0x999d721c,
-  0x4ccce684, 0x9999ace3, 0x4cc7dfa1, 0x9995e7e8, 0x4cc2d88f, 0x9992232d,
-    0x4cbdd14e, 0x998e5eb1,
-  0x4cb8c9dd, 0x998a9a74, 0x4cb3c23d, 0x9986d676, 0x4caeba6e, 0x998312b7,
-    0x4ca9b26f, 0x997f4f38,
-  0x4ca4aa41, 0x997b8bf8, 0x4c9fa1e4, 0x9977c8f7, 0x4c9a9958, 0x99740635,
-    0x4c95909c, 0x997043b2,
-  0x4c9087b1, 0x996c816f, 0x4c8b7e97, 0x9968bf6b, 0x4c86754e, 0x9964fda7,
-    0x4c816bd5, 0x99613c22,
-  0x4c7c622d, 0x995d7adc, 0x4c775856, 0x9959b9d5, 0x4c724e50, 0x9955f90d,
-    0x4c6d441b, 0x99523885,
-  0x4c6839b7, 0x994e783d, 0x4c632f23, 0x994ab833, 0x4c5e2460, 0x9946f869,
-    0x4c59196f, 0x994338df,
-  0x4c540e4e, 0x993f7993, 0x4c4f02fe, 0x993bba87, 0x4c49f77f, 0x9937fbbb,
-    0x4c44ebd1, 0x99343d2e,
-  0x4c3fdff4, 0x99307ee0, 0x4c3ad3e7, 0x992cc0d2, 0x4c35c7ac, 0x99290303,
-    0x4c30bb42, 0x99254574,
-  0x4c2baea9, 0x99218824, 0x4c26a1e1, 0x991dcb13, 0x4c2194e9, 0x991a0e42,
-    0x4c1c87c3, 0x991651b1,
-  0x4c177a6e, 0x9912955f, 0x4c126cea, 0x990ed94c, 0x4c0d5f37, 0x990b1d79,
-    0x4c085156, 0x990761e5,
-  0x4c034345, 0x9903a691, 0x4bfe3505, 0x98ffeb7d, 0x4bf92697, 0x98fc30a8,
-    0x4bf417f9, 0x98f87612,
-  0x4bef092d, 0x98f4bbbc, 0x4be9fa32, 0x98f101a6, 0x4be4eb08, 0x98ed47cf,
-    0x4bdfdbaf, 0x98e98e38,
-  0x4bdacc28, 0x98e5d4e0, 0x4bd5bc72, 0x98e21bc8, 0x4bd0ac8d, 0x98de62f0,
-    0x4bcb9c79, 0x98daaa57,
-  0x4bc68c36, 0x98d6f1fe, 0x4bc17bc5, 0x98d339e4, 0x4bbc6b25, 0x98cf820b,
-    0x4bb75a56, 0x98cbca70,
-  0x4bb24958, 0x98c81316, 0x4bad382c, 0x98c45bfb, 0x4ba826d1, 0x98c0a520,
-    0x4ba31548, 0x98bcee84,
-  0x4b9e0390, 0x98b93828, 0x4b98f1a9, 0x98b5820c, 0x4b93df93, 0x98b1cc30,
-    0x4b8ecd4f, 0x98ae1693,
-  0x4b89badd, 0x98aa6136, 0x4b84a83b, 0x98a6ac19, 0x4b7f956b, 0x98a2f73c,
-    0x4b7a826d, 0x989f429e,
-  0x4b756f40, 0x989b8e40, 0x4b705be4, 0x9897da22, 0x4b6b485a, 0x98942643,
-    0x4b6634a2, 0x989072a5,
-  0x4b6120bb, 0x988cbf46, 0x4b5c0ca5, 0x98890c27, 0x4b56f861, 0x98855948,
-    0x4b51e3ee, 0x9881a6a9,
-  0x4b4ccf4d, 0x987df449, 0x4b47ba7e, 0x987a422a, 0x4b42a580, 0x9876904a,
-    0x4b3d9053, 0x9872deaa,
-  0x4b387af9, 0x986f2d4a, 0x4b336570, 0x986b7c2a, 0x4b2e4fb8, 0x9867cb4a,
-    0x4b2939d2, 0x98641aa9,
-  0x4b2423be, 0x98606a49, 0x4b1f0d7b, 0x985cba28, 0x4b19f70a, 0x98590a48,
-    0x4b14e06b, 0x98555aa7,
-  0x4b0fc99d, 0x9851ab46, 0x4b0ab2a1, 0x984dfc26, 0x4b059b77, 0x984a4d45,
-    0x4b00841f, 0x98469ea4,
-  0x4afb6c98, 0x9842f043, 0x4af654e3, 0x983f4223, 0x4af13d00, 0x983b9442,
-    0x4aec24ee, 0x9837e6a1,
-  0x4ae70caf, 0x98343940, 0x4ae1f441, 0x98308c1f, 0x4adcdba5, 0x982cdf3f,
-    0x4ad7c2da, 0x9829329e,
-  0x4ad2a9e2, 0x9825863d, 0x4acd90bb, 0x9821da1d, 0x4ac87767, 0x981e2e3c,
-    0x4ac35de4, 0x981a829c,
-  0x4abe4433, 0x9816d73b, 0x4ab92a54, 0x98132c1b, 0x4ab41046, 0x980f813b,
-    0x4aaef60b, 0x980bd69b,
-  0x4aa9dba2, 0x98082c3b, 0x4aa4c10b, 0x9804821b, 0x4a9fa645, 0x9800d83c,
-    0x4a9a8b52, 0x97fd2e9c,
-  0x4a957030, 0x97f9853d, 0x4a9054e1, 0x97f5dc1e, 0x4a8b3963, 0x97f2333f,
-    0x4a861db8, 0x97ee8aa0,
-  0x4a8101de, 0x97eae242, 0x4a7be5d7, 0x97e73a23, 0x4a76c9a2, 0x97e39245,
-    0x4a71ad3e, 0x97dfeaa7,
-  0x4a6c90ad, 0x97dc4349, 0x4a6773ee, 0x97d89c2c, 0x4a625701, 0x97d4f54f,
-    0x4a5d39e6, 0x97d14eb2,
-  0x4a581c9e, 0x97cda855, 0x4a52ff27, 0x97ca0239, 0x4a4de182, 0x97c65c5c,
-    0x4a48c3b0, 0x97c2b6c1,
-  0x4a43a5b0, 0x97bf1165, 0x4a3e8782, 0x97bb6c4a, 0x4a396926, 0x97b7c76f,
-    0x4a344a9d, 0x97b422d4,
-  0x4a2f2be6, 0x97b07e7a, 0x4a2a0d01, 0x97acda60, 0x4a24edee, 0x97a93687,
-    0x4a1fcead, 0x97a592ed,
-  0x4a1aaf3f, 0x97a1ef94, 0x4a158fa3, 0x979e4c7c, 0x4a106fda, 0x979aa9a4,
-    0x4a0b4fe2, 0x9797070c,
-  0x4a062fbd, 0x979364b5, 0x4a010f6b, 0x978fc29e, 0x49fbeeea, 0x978c20c8,
-    0x49f6ce3c, 0x97887f32,
-  0x49f1ad61, 0x9784dddc, 0x49ec8c57, 0x97813cc7, 0x49e76b21, 0x977d9bf2,
-    0x49e249bc, 0x9779fb5e,
-  0x49dd282a, 0x97765b0a, 0x49d8066b, 0x9772baf7, 0x49d2e47e, 0x976f1b24,
-    0x49cdc263, 0x976b7b92,
-  0x49c8a01b, 0x9767dc41, 0x49c37da5, 0x97643d2f, 0x49be5b02, 0x97609e5f,
-    0x49b93832, 0x975cffcf,
-  0x49b41533, 0x9759617f, 0x49aef208, 0x9755c370, 0x49a9ceaf, 0x975225a1,
-    0x49a4ab28, 0x974e8813,
-  0x499f8774, 0x974aeac6, 0x499a6393, 0x97474db9, 0x49953f84, 0x9743b0ed,
-    0x49901b48, 0x97401462,
-  0x498af6df, 0x973c7817, 0x4985d248, 0x9738dc0d, 0x4980ad84, 0x97354043,
-    0x497b8892, 0x9731a4ba,
-  0x49766373, 0x972e0971, 0x49713e27, 0x972a6e6a, 0x496c18ae, 0x9726d3a3,
-    0x4966f307, 0x9723391c,
-  0x4961cd33, 0x971f9ed7, 0x495ca732, 0x971c04d2, 0x49578103, 0x97186b0d,
-    0x49525aa7, 0x9714d18a,
-  0x494d341e, 0x97113847, 0x49480d68, 0x970d9f45, 0x4942e684, 0x970a0683,
-    0x493dbf74, 0x97066e03,
-  0x49389836, 0x9702d5c3, 0x493370cb, 0x96ff3dc4, 0x492e4933, 0x96fba605,
-    0x4929216e, 0x96f80e88,
-  0x4923f97b, 0x96f4774b, 0x491ed15c, 0x96f0e04f, 0x4919a90f, 0x96ed4994,
-    0x49148095, 0x96e9b319,
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-    0x48ffdcec, 0x96db5bb8,
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-    0x48eb3672, 0x96cd0865,
-  0x48e60c62, 0x96c97432, 0x48e0e227, 0x96c5e040, 0x48dbb7be, 0x96c24c8f,
-    0x48d68d28, 0x96beb91f,
-  0x48d16265, 0x96bb25f0, 0x48cc3775, 0x96b79302, 0x48c70c59, 0x96b40055,
-    0x48c1e10f, 0x96b06de9,
-  0x48bcb599, 0x96acdbbe, 0x48b789f5, 0x96a949d3, 0x48b25e25, 0x96a5b82a,
-    0x48ad3228, 0x96a226c2,
-  0x48a805ff, 0x969e959b, 0x48a2d9a8, 0x969b04b4, 0x489dad25, 0x9697740f,
-    0x48988074, 0x9693e3ab,
-  0x48935397, 0x96905388, 0x488e268e, 0x968cc3a5, 0x4888f957, 0x96893404,
-    0x4883cbf4, 0x9685a4a4,
-  0x487e9e64, 0x96821585, 0x487970a7, 0x967e86a7, 0x487442be, 0x967af80a,
-    0x486f14a8, 0x967769af,
-  0x4869e665, 0x9673db94, 0x4864b7f5, 0x96704dba, 0x485f8959, 0x966cc022,
-    0x485a5a90, 0x966932cb,
-  0x48552b9b, 0x9665a5b4, 0x484ffc79, 0x966218df, 0x484acd2a, 0x965e8c4b,
-    0x48459daf, 0x965afff9,
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-    0x4830de05, 0x964cd139,
-  0x482badab, 0x9649462d, 0x48267d24, 0x9645bb61, 0x48214c71, 0x964230d7,
-    0x481c1b92, 0x963ea68d,
-  0x4816ea86, 0x963b1c86, 0x4811b94d, 0x963792bf, 0x480c87e8, 0x96340939,
-    0x48075657, 0x96307ff5,
-  0x48022499, 0x962cf6f2, 0x47fcf2af, 0x96296e31, 0x47f7c099, 0x9625e5b0,
-    0x47f28e56, 0x96225d71,
-  0x47ed5be6, 0x961ed574, 0x47e8294a, 0x961b4db7, 0x47e2f682, 0x9617c63c,
-    0x47ddc38e, 0x96143f02,
-  0x47d8906d, 0x9610b80a, 0x47d35d20, 0x960d3153, 0x47ce29a7, 0x9609aadd,
-    0x47c8f601, 0x960624a9,
-  0x47c3c22f, 0x96029eb6, 0x47be8e31, 0x95ff1904, 0x47b95a06, 0x95fb9394,
-    0x47b425af, 0x95f80e65,
-  0x47aef12c, 0x95f48977, 0x47a9bc7d, 0x95f104cb, 0x47a487a2, 0x95ed8061,
-    0x479f529a, 0x95e9fc38,
-  0x479a1d67, 0x95e67850, 0x4794e807, 0x95e2f4a9, 0x478fb27b, 0x95df7145,
-    0x478a7cc2, 0x95dbee21,
-  0x478546de, 0x95d86b3f, 0x478010cd, 0x95d4e89f, 0x477ada91, 0x95d16640,
-    0x4775a428, 0x95cde423,
-  0x47706d93, 0x95ca6247, 0x476b36d3, 0x95c6e0ac, 0x4765ffe6, 0x95c35f53,
-    0x4760c8cd, 0x95bfde3c,
-  0x475b9188, 0x95bc5d66, 0x47565a17, 0x95b8dcd2, 0x4751227a, 0x95b55c7f,
-    0x474beab1, 0x95b1dc6e,
-  0x4746b2bc, 0x95ae5c9f, 0x47417a9b, 0x95aadd11, 0x473c424e, 0x95a75dc4,
-    0x473709d5, 0x95a3deb9,
-  0x4731d131, 0x95a05ff0, 0x472c9860, 0x959ce169, 0x47275f63, 0x95996323,
-    0x4722263b, 0x9595e51e,
-  0x471cece7, 0x9592675c, 0x4717b367, 0x958ee9db, 0x471279ba, 0x958b6c9b,
-    0x470d3fe3, 0x9587ef9e,
-  0x470805df, 0x958472e2, 0x4702cbaf, 0x9580f667, 0x46fd9154, 0x957d7a2f,
-    0x46f856cd, 0x9579fe38,
-  0x46f31c1a, 0x95768283, 0x46ede13b, 0x9573070f, 0x46e8a631, 0x956f8bdd,
-    0x46e36afb, 0x956c10ed,
-  0x46de2f99, 0x9568963f, 0x46d8f40b, 0x95651bd2, 0x46d3b852, 0x9561a1a8,
-    0x46ce7c6d, 0x955e27bf,
-  0x46c9405c, 0x955aae17, 0x46c40420, 0x955734b2, 0x46bec7b8, 0x9553bb8e,
-    0x46b98b24, 0x955042ac,
-  0x46b44e65, 0x954cca0c, 0x46af117a, 0x954951ae, 0x46a9d464, 0x9545d992,
-    0x46a49722, 0x954261b7,
-  0x469f59b4, 0x953eea1e, 0x469a1c1b, 0x953b72c7, 0x4694de56, 0x9537fbb2,
-    0x468fa066, 0x953484df,
-  0x468a624a, 0x95310e4e, 0x46852403, 0x952d97fe, 0x467fe590, 0x952a21f1,
-    0x467aa6f2, 0x9526ac25,
-  0x46756828, 0x9523369c, 0x46702933, 0x951fc154, 0x466aea12, 0x951c4c4e,
-    0x4665aac6, 0x9518d78a,
-  0x46606b4e, 0x95156308, 0x465b2bab, 0x9511eec8, 0x4655ebdd, 0x950e7aca,
-    0x4650abe3, 0x950b070e,
-  0x464b6bbe, 0x95079394, 0x46462b6d, 0x9504205c, 0x4640eaf2, 0x9500ad66,
-    0x463baa4a, 0x94fd3ab1,
-  0x46366978, 0x94f9c83f, 0x4631287a, 0x94f6560f, 0x462be751, 0x94f2e421,
-    0x4626a5fd, 0x94ef7275,
-  0x4621647d, 0x94ec010b, 0x461c22d2, 0x94e88fe3, 0x4616e0fc, 0x94e51efd,
-    0x46119efa, 0x94e1ae59,
-  0x460c5cce, 0x94de3df8, 0x46071a76, 0x94dacdd8, 0x4601d7f3, 0x94d75dfa,
-    0x45fc9545, 0x94d3ee5f,
-  0x45f7526b, 0x94d07f05, 0x45f20f67, 0x94cd0fee, 0x45eccc37, 0x94c9a119,
-    0x45e788dc, 0x94c63286,
-  0x45e24556, 0x94c2c435, 0x45dd01a5, 0x94bf5627, 0x45d7bdc9, 0x94bbe85a,
-    0x45d279c2, 0x94b87ad0,
-  0x45cd358f, 0x94b50d87, 0x45c7f132, 0x94b1a081, 0x45c2acaa, 0x94ae33be,
-    0x45bd67f6, 0x94aac73c,
-  0x45b82318, 0x94a75afd, 0x45b2de0e, 0x94a3eeff, 0x45ad98da, 0x94a08344,
-    0x45a8537a, 0x949d17cc,
-  0x45a30df0, 0x9499ac95, 0x459dc83b, 0x949641a1, 0x4598825a, 0x9492d6ef,
-    0x45933c4f, 0x948f6c7f,
-  0x458df619, 0x948c0252, 0x4588afb8, 0x94889867, 0x4583692c, 0x94852ebe,
-    0x457e2275, 0x9481c557,
-  0x4578db93, 0x947e5c33, 0x45739487, 0x947af351, 0x456e4d4f, 0x94778ab1,
-    0x456905ed, 0x94742254,
-  0x4563be60, 0x9470ba39, 0x455e76a8, 0x946d5260, 0x45592ec6, 0x9469eaca,
-    0x4553e6b8, 0x94668376,
-  0x454e9e80, 0x94631c65, 0x4549561d, 0x945fb596, 0x45440d90, 0x945c4f09,
-    0x453ec4d7, 0x9458e8bf,
-  0x45397bf4, 0x945582b7, 0x453432e6, 0x94521cf1, 0x452ee9ae, 0x944eb76e,
-    0x4529a04b, 0x944b522d,
-  0x452456bd, 0x9447ed2f, 0x451f0d04, 0x94448873, 0x4519c321, 0x944123fa,
-    0x45147913, 0x943dbfc3,
-  0x450f2edb, 0x943a5bcf, 0x4509e478, 0x9436f81d, 0x450499eb, 0x943394ad,
-    0x44ff4f32, 0x94303180,
-  0x44fa0450, 0x942cce96, 0x44f4b943, 0x94296bee, 0x44ef6e0b, 0x94260989,
-    0x44ea22a9, 0x9422a766,
-  0x44e4d71c, 0x941f4585, 0x44df8b64, 0x941be3e8, 0x44da3f83, 0x9418828c,
-    0x44d4f376, 0x94152174,
-  0x44cfa740, 0x9411c09e, 0x44ca5adf, 0x940e600a, 0x44c50e53, 0x940affb9,
-    0x44bfc19d, 0x94079fab,
-  0x44ba74bd, 0x94043fdf, 0x44b527b2, 0x9400e056, 0x44afda7d, 0x93fd810f,
-    0x44aa8d1d, 0x93fa220b,
-  0x44a53f93, 0x93f6c34a, 0x449ff1df, 0x93f364cb, 0x449aa400, 0x93f0068f,
-    0x449555f7, 0x93eca896,
-  0x449007c4, 0x93e94adf, 0x448ab967, 0x93e5ed6b, 0x44856adf, 0x93e2903a,
-    0x44801c2d, 0x93df334c,
-  0x447acd50, 0x93dbd6a0, 0x44757e4a, 0x93d87a36, 0x44702f19, 0x93d51e10,
-    0x446adfbe, 0x93d1c22c,
-  0x44659039, 0x93ce668b, 0x44604089, 0x93cb0b2d, 0x445af0b0, 0x93c7b011,
-    0x4455a0ac, 0x93c45539,
-  0x4450507e, 0x93c0faa3, 0x444b0026, 0x93bda04f, 0x4445afa4, 0x93ba463f,
-    0x44405ef8, 0x93b6ec71,
-  0x443b0e21, 0x93b392e6, 0x4435bd21, 0x93b0399e, 0x44306bf6, 0x93ace099,
-    0x442b1aa2, 0x93a987d6,
-  0x4425c923, 0x93a62f57, 0x4420777b, 0x93a2d71a, 0x441b25a8, 0x939f7f20,
-    0x4415d3ab, 0x939c2769,
-  0x44108184, 0x9398cff5, 0x440b2f34, 0x939578c3, 0x4405dcb9, 0x939221d5,
-    0x44008a14, 0x938ecb29,
-  0x43fb3746, 0x938b74c1, 0x43f5e44d, 0x93881e9b, 0x43f0912b, 0x9384c8b8,
-    0x43eb3ddf, 0x93817318,
-  0x43e5ea68, 0x937e1dbb, 0x43e096c8, 0x937ac8a1, 0x43db42fe, 0x937773ca,
-    0x43d5ef0a, 0x93741f35,
-  0x43d09aed, 0x9370cae4, 0x43cb46a5, 0x936d76d6, 0x43c5f234, 0x936a230a,
-    0x43c09d99, 0x9366cf82,
-  0x43bb48d4, 0x93637c3d, 0x43b5f3e5, 0x9360293a, 0x43b09ecc, 0x935cd67b,
-    0x43ab498a, 0x935983ff,
-  0x43a5f41e, 0x935631c5, 0x43a09e89, 0x9352dfcf, 0x439b48c9, 0x934f8e1c,
-    0x4395f2e0, 0x934c3cab,
-  0x43909ccd, 0x9348eb7e, 0x438b4691, 0x93459a94, 0x4385f02a, 0x934249ed,
-    0x4380999b, 0x933ef989,
-  0x437b42e1, 0x933ba968, 0x4375ebfe, 0x9338598a, 0x437094f1, 0x933509f0,
-    0x436b3dbb, 0x9331ba98,
-  0x4365e65b, 0x932e6b84, 0x43608ed2, 0x932b1cb2, 0x435b371f, 0x9327ce24,
-    0x4355df42, 0x93247fd9,
-  0x4350873c, 0x932131d1, 0x434b2f0c, 0x931de40c, 0x4345d6b3, 0x931a968b,
-    0x43407e31, 0x9317494c,
-  0x433b2585, 0x9313fc51, 0x4335ccaf, 0x9310af99, 0x433073b0, 0x930d6324,
-    0x432b1a87, 0x930a16f3,
-  0x4325c135, 0x9306cb04, 0x432067ba, 0x93037f59, 0x431b0e15, 0x930033f1,
-    0x4315b447, 0x92fce8cc,
-  0x43105a50, 0x92f99deb, 0x430b002f, 0x92f6534c, 0x4305a5e5, 0x92f308f1,
-    0x43004b71, 0x92efbeda,
-  0x42faf0d4, 0x92ec7505, 0x42f5960e, 0x92e92b74, 0x42f03b1e, 0x92e5e226,
-    0x42eae005, 0x92e2991c,
-  0x42e584c3, 0x92df5054, 0x42e02958, 0x92dc07d0, 0x42dacdc3, 0x92d8bf90,
-    0x42d57205, 0x92d57792,
-  0x42d0161e, 0x92d22fd9, 0x42caba0e, 0x92cee862, 0x42c55dd4, 0x92cba12f,
-    0x42c00172, 0x92c85a3f,
-  0x42baa4e6, 0x92c51392, 0x42b54831, 0x92c1cd29, 0x42afeb53, 0x92be8703,
-    0x42aa8e4b, 0x92bb4121,
-  0x42a5311b, 0x92b7fb82, 0x429fd3c1, 0x92b4b626, 0x429a763f, 0x92b1710e,
-    0x42951893, 0x92ae2c3a,
-  0x428fbabe, 0x92aae7a8, 0x428a5cc0, 0x92a7a35a, 0x4284fe99, 0x92a45f50,
-    0x427fa049, 0x92a11b89,
-  0x427a41d0, 0x929dd806, 0x4274e32e, 0x929a94c6, 0x426f8463, 0x929751c9,
-    0x426a256f, 0x92940f10,
-  0x4264c653, 0x9290cc9b, 0x425f670d, 0x928d8a69, 0x425a079e, 0x928a487a,
-    0x4254a806, 0x928706cf,
-  0x424f4845, 0x9283c568, 0x4249e85c, 0x92808444, 0x42448849, 0x927d4363,
-    0x423f280e, 0x927a02c7,
-  0x4239c7aa, 0x9276c26d, 0x4234671d, 0x92738258, 0x422f0667, 0x92704286,
-    0x4229a588, 0x926d02f7,
-  0x42244481, 0x9269c3ac, 0x421ee350, 0x926684a5, 0x421981f7, 0x926345e1,
-    0x42142075, 0x92600761,
-  0x420ebecb, 0x925cc924, 0x42095cf7, 0x92598b2b, 0x4203fafb, 0x92564d76,
-    0x41fe98d6, 0x92531005,
-  0x41f93689, 0x924fd2d7, 0x41f3d413, 0x924c95ec, 0x41ee7174, 0x92495946,
-    0x41e90eac, 0x92461ce3,
-  0x41e3abbc, 0x9242e0c4, 0x41de48a3, 0x923fa4e8, 0x41d8e561, 0x923c6950,
-    0x41d381f7, 0x92392dfc,
-  0x41ce1e65, 0x9235f2ec, 0x41c8baa9, 0x9232b81f, 0x41c356c5, 0x922f7d96,
-    0x41bdf2b9, 0x922c4351,
-  0x41b88e84, 0x9229094f, 0x41b32a26, 0x9225cf91, 0x41adc5a0, 0x92229617,
-    0x41a860f1, 0x921f5ce1,
-  0x41a2fc1a, 0x921c23ef, 0x419d971b, 0x9218eb40, 0x419831f3, 0x9215b2d5,
-    0x4192cca2, 0x92127aae,
-  0x418d6729, 0x920f42cb, 0x41880188, 0x920c0b2c, 0x41829bbe, 0x9208d3d0,
-    0x417d35cb, 0x92059cb8,
-  0x4177cfb1, 0x920265e4, 0x4172696e, 0x91ff2f54, 0x416d0302, 0x91fbf908,
-    0x41679c6f, 0x91f8c300,
-  0x416235b2, 0x91f58d3b, 0x415ccece, 0x91f257bb, 0x415767c1, 0x91ef227e,
-    0x4152008c, 0x91ebed85,
-  0x414c992f, 0x91e8b8d0, 0x414731a9, 0x91e5845f, 0x4141c9fb, 0x91e25032,
-    0x413c6225, 0x91df1c49,
-  0x4136fa27, 0x91dbe8a4, 0x41319200, 0x91d8b542, 0x412c29b1, 0x91d58225,
-    0x4126c13a, 0x91d24f4c,
-  0x4121589b, 0x91cf1cb6, 0x411befd3, 0x91cbea65, 0x411686e4, 0x91c8b857,
-    0x41111dcc, 0x91c5868e,
-  0x410bb48c, 0x91c25508, 0x41064b24, 0x91bf23c7, 0x4100e194, 0x91bbf2c9,
-    0x40fb77dc, 0x91b8c210,
-  0x40f60dfb, 0x91b5919a, 0x40f0a3f3, 0x91b26169, 0x40eb39c3, 0x91af317c,
-    0x40e5cf6a, 0x91ac01d2,
-  0x40e064ea, 0x91a8d26d, 0x40dafa41, 0x91a5a34c, 0x40d58f71, 0x91a2746f,
-    0x40d02478, 0x919f45d6,
-  0x40cab958, 0x919c1781, 0x40c54e0f, 0x9198e970, 0x40bfe29f, 0x9195bba3,
-    0x40ba7706, 0x91928e1a,
-  0x40b50b46, 0x918f60d6, 0x40af9f5e, 0x918c33d5, 0x40aa334e, 0x91890719,
-    0x40a4c716, 0x9185daa1,
-  0x409f5ab6, 0x9182ae6d, 0x4099ee2e, 0x917f827d, 0x4094817f, 0x917c56d1,
-    0x408f14a7, 0x91792b6a,
-  0x4089a7a8, 0x91760047, 0x40843a81, 0x9172d567, 0x407ecd32, 0x916faacc,
-    0x40795fbc, 0x916c8076,
-  0x4073f21d, 0x91695663, 0x406e8457, 0x91662c95, 0x40691669, 0x9163030b,
-    0x4063a854, 0x915fd9c5,
-  0x405e3a16, 0x915cb0c3, 0x4058cbb1, 0x91598806, 0x40535d24, 0x91565f8d,
-    0x404dee70, 0x91533758,
-  0x40487f94, 0x91500f67, 0x40431090, 0x914ce7bb, 0x403da165, 0x9149c053,
-    0x40383212, 0x9146992f,
-  0x4032c297, 0x91437250, 0x402d52f5, 0x91404bb5, 0x4027e32b, 0x913d255e,
-    0x4022733a, 0x9139ff4b,
-  0x401d0321, 0x9136d97d, 0x401792e0, 0x9133b3f3, 0x40122278, 0x91308eae,
-    0x400cb1e9, 0x912d69ad,
-  0x40074132, 0x912a44f0, 0x4001d053, 0x91272078, 0x3ffc5f4d, 0x9123fc44,
-    0x3ff6ee1f, 0x9120d854,
-  0x3ff17cca, 0x911db4a9, 0x3fec0b4e, 0x911a9142, 0x3fe699aa, 0x91176e1f,
-    0x3fe127df, 0x91144b41,
-  0x3fdbb5ec, 0x911128a8, 0x3fd643d2, 0x910e0653, 0x3fd0d191, 0x910ae442,
-    0x3fcb5f28, 0x9107c276,
-  0x3fc5ec98, 0x9104a0ee, 0x3fc079e0, 0x91017faa, 0x3fbb0702, 0x90fe5eab,
-    0x3fb593fb, 0x90fb3df1,
-  0x3fb020ce, 0x90f81d7b, 0x3faaad79, 0x90f4fd4a, 0x3fa539fd, 0x90f1dd5d,
-    0x3f9fc65a, 0x90eebdb4,
-  0x3f9a5290, 0x90eb9e50, 0x3f94de9e, 0x90e87f31, 0x3f8f6a85, 0x90e56056,
-    0x3f89f645, 0x90e241bf,
-  0x3f8481dd, 0x90df236e, 0x3f7f0d4f, 0x90dc0560, 0x3f799899, 0x90d8e798,
-    0x3f7423bc, 0x90d5ca13,
-  0x3f6eaeb8, 0x90d2acd4, 0x3f69398d, 0x90cf8fd9, 0x3f63c43b, 0x90cc7322,
-    0x3f5e4ec2, 0x90c956b1,
-  0x3f58d921, 0x90c63a83, 0x3f53635a, 0x90c31e9b, 0x3f4ded6b, 0x90c002f7,
-    0x3f487755, 0x90bce797,
-  0x3f430119, 0x90b9cc7d, 0x3f3d8ab5, 0x90b6b1a6, 0x3f38142a, 0x90b39715,
-    0x3f329d79, 0x90b07cc8,
-  0x3f2d26a0, 0x90ad62c0, 0x3f27afa1, 0x90aa48fd, 0x3f22387a, 0x90a72f7e,
-    0x3f1cc12c, 0x90a41644,
-  0x3f1749b8, 0x90a0fd4e, 0x3f11d21d, 0x909de49e, 0x3f0c5a5a, 0x909acc32,
-    0x3f06e271, 0x9097b40a,
-  0x3f016a61, 0x90949c28, 0x3efbf22a, 0x9091848a, 0x3ef679cc, 0x908e6d31,
-    0x3ef10148, 0x908b561c,
-  0x3eeb889c, 0x90883f4d, 0x3ee60fca, 0x908528c2, 0x3ee096d1, 0x9082127c,
-    0x3edb1db1, 0x907efc7a,
-  0x3ed5a46b, 0x907be6be, 0x3ed02afd, 0x9078d146, 0x3ecab169, 0x9075bc13,
-    0x3ec537ae, 0x9072a725,
-  0x3ebfbdcd, 0x906f927c, 0x3eba43c4, 0x906c7e17, 0x3eb4c995, 0x906969f8,
-    0x3eaf4f40, 0x9066561d,
-  0x3ea9d4c3, 0x90634287, 0x3ea45a21, 0x90602f35, 0x3e9edf57, 0x905d1c29,
-    0x3e996467, 0x905a0962,
-  0x3e93e950, 0x9056f6df, 0x3e8e6e12, 0x9053e4a1, 0x3e88f2ae, 0x9050d2a9,
-    0x3e837724, 0x904dc0f5,
-  0x3e7dfb73, 0x904aaf86, 0x3e787f9b, 0x90479e5c, 0x3e73039d, 0x90448d76,
-    0x3e6d8778, 0x90417cd6,
-  0x3e680b2c, 0x903e6c7b, 0x3e628ebb, 0x903b5c64, 0x3e5d1222, 0x90384c93,
-    0x3e579564, 0x90353d06,
-  0x3e52187f, 0x90322dbf, 0x3e4c9b73, 0x902f1ebc, 0x3e471e41, 0x902c0fff,
-    0x3e41a0e8, 0x90290186,
-  0x3e3c2369, 0x9025f352, 0x3e36a5c4, 0x9022e564, 0x3e3127f9, 0x901fd7ba,
-    0x3e2baa07, 0x901cca55,
-  0x3e262bee, 0x9019bd36, 0x3e20adaf, 0x9016b05b, 0x3e1b2f4a, 0x9013a3c5,
-    0x3e15b0bf, 0x90109775,
-  0x3e10320d, 0x900d8b69, 0x3e0ab336, 0x900a7fa3, 0x3e053437, 0x90077422,
-    0x3dffb513, 0x900468e5,
-  0x3dfa35c8, 0x90015dee, 0x3df4b657, 0x8ffe533c, 0x3def36c0, 0x8ffb48cf,
-    0x3de9b703, 0x8ff83ea7,
-  0x3de4371f, 0x8ff534c4, 0x3ddeb716, 0x8ff22b26, 0x3dd936e6, 0x8fef21ce,
-    0x3dd3b690, 0x8fec18ba,
-  0x3dce3614, 0x8fe90fec, 0x3dc8b571, 0x8fe60763, 0x3dc334a9, 0x8fe2ff1f,
-    0x3dbdb3ba, 0x8fdff720,
-  0x3db832a6, 0x8fdcef66, 0x3db2b16b, 0x8fd9e7f2, 0x3dad300b, 0x8fd6e0c2,
-    0x3da7ae84, 0x8fd3d9d8,
-  0x3da22cd7, 0x8fd0d333, 0x3d9cab04, 0x8fcdccd3, 0x3d97290b, 0x8fcac6b9,
-    0x3d91a6ed, 0x8fc7c0e3,
-  0x3d8c24a8, 0x8fc4bb53, 0x3d86a23d, 0x8fc1b608, 0x3d811fac, 0x8fbeb103,
-    0x3d7b9cf6, 0x8fbbac42,
-  0x3d761a19, 0x8fb8a7c7, 0x3d709717, 0x8fb5a391, 0x3d6b13ee, 0x8fb29fa0,
-    0x3d6590a0, 0x8faf9bf5,
-  0x3d600d2c, 0x8fac988f, 0x3d5a8992, 0x8fa9956e, 0x3d5505d2, 0x8fa69293,
-    0x3d4f81ec, 0x8fa38ffc,
-  0x3d49fde1, 0x8fa08dab, 0x3d4479b0, 0x8f9d8ba0, 0x3d3ef559, 0x8f9a89da,
-    0x3d3970dc, 0x8f978859,
-  0x3d33ec39, 0x8f94871d, 0x3d2e6771, 0x8f918627, 0x3d28e282, 0x8f8e8576,
-    0x3d235d6f, 0x8f8b850a,
-  0x3d1dd835, 0x8f8884e4, 0x3d1852d6, 0x8f858503, 0x3d12cd51, 0x8f828568,
-    0x3d0d47a6, 0x8f7f8612,
-  0x3d07c1d6, 0x8f7c8701, 0x3d023be0, 0x8f798836, 0x3cfcb5c4, 0x8f7689b0,
-    0x3cf72f83, 0x8f738b70,
-  0x3cf1a91c, 0x8f708d75, 0x3cec2290, 0x8f6d8fbf, 0x3ce69bde, 0x8f6a924f,
-    0x3ce11507, 0x8f679525,
-  0x3cdb8e09, 0x8f649840, 0x3cd606e7, 0x8f619ba0, 0x3cd07f9f, 0x8f5e9f46,
-    0x3ccaf831, 0x8f5ba331,
-  0x3cc5709e, 0x8f58a761, 0x3cbfe8e5, 0x8f55abd8, 0x3cba6107, 0x8f52b093,
-    0x3cb4d904, 0x8f4fb595,
-  0x3caf50da, 0x8f4cbadb, 0x3ca9c88c, 0x8f49c067, 0x3ca44018, 0x8f46c639,
-    0x3c9eb77f, 0x8f43cc50,
-  0x3c992ec0, 0x8f40d2ad, 0x3c93a5dc, 0x8f3dd950, 0x3c8e1cd3, 0x8f3ae038,
-    0x3c8893a4, 0x8f37e765,
-  0x3c830a50, 0x8f34eed8, 0x3c7d80d6, 0x8f31f691, 0x3c77f737, 0x8f2efe8f,
-    0x3c726d73, 0x8f2c06d3,
-  0x3c6ce38a, 0x8f290f5c, 0x3c67597b, 0x8f26182b, 0x3c61cf48, 0x8f232140,
-    0x3c5c44ee, 0x8f202a9a,
-  0x3c56ba70, 0x8f1d343a, 0x3c512fcc, 0x8f1a3e1f, 0x3c4ba504, 0x8f17484b,
-    0x3c461a16, 0x8f1452bb,
-  0x3c408f03, 0x8f115d72, 0x3c3b03ca, 0x8f0e686e, 0x3c35786d, 0x8f0b73b0,
-    0x3c2fecea, 0x8f087f37,
-  0x3c2a6142, 0x8f058b04, 0x3c24d575, 0x8f029717, 0x3c1f4983, 0x8effa370,
-    0x3c19bd6c, 0x8efcb00e,
-  0x3c143130, 0x8ef9bcf2, 0x3c0ea4cf, 0x8ef6ca1c, 0x3c091849, 0x8ef3d78b,
-    0x3c038b9e, 0x8ef0e540,
-  0x3bfdfecd, 0x8eedf33b, 0x3bf871d8, 0x8eeb017c, 0x3bf2e4be, 0x8ee81002,
-    0x3bed577e, 0x8ee51ece,
-  0x3be7ca1a, 0x8ee22de0, 0x3be23c91, 0x8edf3d38, 0x3bdcaee3, 0x8edc4cd5,
-    0x3bd72110, 0x8ed95cb8,
-  0x3bd19318, 0x8ed66ce1, 0x3bcc04fb, 0x8ed37d50, 0x3bc676b9, 0x8ed08e05,
-    0x3bc0e853, 0x8ecd9eff,
-  0x3bbb59c7, 0x8ecab040, 0x3bb5cb17, 0x8ec7c1c6, 0x3bb03c42, 0x8ec4d392,
-    0x3baaad48, 0x8ec1e5a4,
-  0x3ba51e29, 0x8ebef7fb, 0x3b9f8ee5, 0x8ebc0a99, 0x3b99ff7d, 0x8eb91d7c,
-    0x3b946ff0, 0x8eb630a6,
-  0x3b8ee03e, 0x8eb34415, 0x3b895068, 0x8eb057ca, 0x3b83c06c, 0x8ead6bc5,
-    0x3b7e304c, 0x8eaa8006,
-  0x3b78a007, 0x8ea7948c, 0x3b730f9e, 0x8ea4a959, 0x3b6d7f10, 0x8ea1be6c,
-    0x3b67ee5d, 0x8e9ed3c4,
-  0x3b625d86, 0x8e9be963, 0x3b5ccc8a, 0x8e98ff47, 0x3b573b69, 0x8e961571,
-    0x3b51aa24, 0x8e932be2,
-  0x3b4c18ba, 0x8e904298, 0x3b46872c, 0x8e8d5994, 0x3b40f579, 0x8e8a70d7,
-    0x3b3b63a1, 0x8e87885f,
-  0x3b35d1a5, 0x8e84a02d, 0x3b303f84, 0x8e81b841, 0x3b2aad3f, 0x8e7ed09b,
-    0x3b251ad6, 0x8e7be93c,
-  0x3b1f8848, 0x8e790222, 0x3b19f595, 0x8e761b4e, 0x3b1462be, 0x8e7334c1,
-    0x3b0ecfc3, 0x8e704e79,
-  0x3b093ca3, 0x8e6d6877, 0x3b03a95e, 0x8e6a82bc, 0x3afe15f6, 0x8e679d47,
-    0x3af88269, 0x8e64b817,
-  0x3af2eeb7, 0x8e61d32e, 0x3aed5ae1, 0x8e5eee8b, 0x3ae7c6e7, 0x8e5c0a2e,
-    0x3ae232c9, 0x8e592617,
-  0x3adc9e86, 0x8e564246, 0x3ad70a1f, 0x8e535ebb, 0x3ad17593, 0x8e507b76,
-    0x3acbe0e3, 0x8e4d9878,
-  0x3ac64c0f, 0x8e4ab5bf, 0x3ac0b717, 0x8e47d34d, 0x3abb21fb, 0x8e44f121,
-    0x3ab58cba, 0x8e420f3b,
-  0x3aaff755, 0x8e3f2d9b, 0x3aaa61cc, 0x8e3c4c41, 0x3aa4cc1e, 0x8e396b2e,
-    0x3a9f364d, 0x8e368a61,
-  0x3a99a057, 0x8e33a9da, 0x3a940a3e, 0x8e30c999, 0x3a8e7400, 0x8e2de99e,
-    0x3a88dd9d, 0x8e2b09e9,
-  0x3a834717, 0x8e282a7b, 0x3a7db06d, 0x8e254b53, 0x3a78199f, 0x8e226c71,
-    0x3a7282ac, 0x8e1f8dd6,
-  0x3a6ceb96, 0x8e1caf80, 0x3a67545b, 0x8e19d171, 0x3a61bcfd, 0x8e16f3a9,
-    0x3a5c257a, 0x8e141626,
-  0x3a568dd4, 0x8e1138ea, 0x3a50f609, 0x8e0e5bf4, 0x3a4b5e1b, 0x8e0b7f44,
-    0x3a45c608, 0x8e08a2db,
-  0x3a402dd2, 0x8e05c6b7, 0x3a3a9577, 0x8e02eadb, 0x3a34fcf9, 0x8e000f44,
-    0x3a2f6457, 0x8dfd33f4,
-  0x3a29cb91, 0x8dfa58ea, 0x3a2432a7, 0x8df77e27, 0x3a1e9999, 0x8df4a3a9,
-    0x3a190068, 0x8df1c973,
-  0x3a136712, 0x8deeef82, 0x3a0dcd99, 0x8dec15d8, 0x3a0833fc, 0x8de93c74,
-    0x3a029a3b, 0x8de66357,
-  0x39fd0056, 0x8de38a80, 0x39f7664e, 0x8de0b1ef, 0x39f1cc21, 0x8dddd9a5,
-    0x39ec31d1, 0x8ddb01a1,
-  0x39e6975e, 0x8dd829e4, 0x39e0fcc6, 0x8dd5526d, 0x39db620b, 0x8dd27b3c,
-    0x39d5c72c, 0x8dcfa452,
-  0x39d02c2a, 0x8dcccdaf, 0x39ca9104, 0x8dc9f751, 0x39c4f5ba, 0x8dc7213b,
-    0x39bf5a4d, 0x8dc44b6a,
-  0x39b9bebc, 0x8dc175e0, 0x39b42307, 0x8dbea09d, 0x39ae872f, 0x8dbbcba0,
-    0x39a8eb33, 0x8db8f6ea,
-  0x39a34f13, 0x8db6227a, 0x399db2d0, 0x8db34e50, 0x3998166a, 0x8db07a6d,
-    0x399279e0, 0x8dada6d1,
-  0x398cdd32, 0x8daad37b, 0x39874061, 0x8da8006c, 0x3981a36d, 0x8da52da3,
-    0x397c0655, 0x8da25b21,
-  0x39766919, 0x8d9f88e5, 0x3970cbba, 0x8d9cb6f0, 0x396b2e38, 0x8d99e541,
-    0x39659092, 0x8d9713d9,
-  0x395ff2c9, 0x8d9442b8, 0x395a54dd, 0x8d9171dd, 0x3954b6cd, 0x8d8ea148,
-    0x394f1899, 0x8d8bd0fb,
-  0x39497a43, 0x8d8900f3, 0x3943dbc9, 0x8d863133, 0x393e3d2c, 0x8d8361b9,
-    0x39389e6b, 0x8d809286,
-  0x3932ff87, 0x8d7dc399, 0x392d6080, 0x8d7af4f3, 0x3927c155, 0x8d782694,
-    0x39222208, 0x8d75587b,
-  0x391c8297, 0x8d728aa9, 0x3916e303, 0x8d6fbd1d, 0x3911434b, 0x8d6cefd9,
-    0x390ba371, 0x8d6a22db,
-  0x39060373, 0x8d675623, 0x39006352, 0x8d6489b3, 0x38fac30e, 0x8d61bd89,
-    0x38f522a6, 0x8d5ef1a5,
-  0x38ef821c, 0x8d5c2609, 0x38e9e16e, 0x8d595ab3, 0x38e4409e, 0x8d568fa4,
-    0x38de9faa, 0x8d53c4db,
-  0x38d8fe93, 0x8d50fa59, 0x38d35d59, 0x8d4e301f, 0x38cdbbfc, 0x8d4b662a,
-    0x38c81a7c, 0x8d489c7d,
-  0x38c278d9, 0x8d45d316, 0x38bcd713, 0x8d4309f6, 0x38b7352a, 0x8d40411d,
-    0x38b1931e, 0x8d3d788b,
-  0x38abf0ef, 0x8d3ab03f, 0x38a64e9d, 0x8d37e83a, 0x38a0ac29, 0x8d35207d,
-    0x389b0991, 0x8d325905,
-  0x389566d6, 0x8d2f91d5, 0x388fc3f8, 0x8d2ccaec, 0x388a20f8, 0x8d2a0449,
-    0x38847dd5, 0x8d273ded,
-  0x387eda8e, 0x8d2477d8, 0x38793725, 0x8d21b20a, 0x38739399, 0x8d1eec83,
-    0x386defeb, 0x8d1c2742,
-  0x38684c19, 0x8d196249, 0x3862a825, 0x8d169d96, 0x385d040d, 0x8d13d92a,
-    0x38575fd4, 0x8d111505,
-  0x3851bb77, 0x8d0e5127, 0x384c16f7, 0x8d0b8d90, 0x38467255, 0x8d08ca40,
-    0x3840cd90, 0x8d060737,
-  0x383b28a9, 0x8d034474, 0x3835839f, 0x8d0081f9, 0x382fde72, 0x8cfdbfc4,
-    0x382a3922, 0x8cfafdd7,
-  0x382493b0, 0x8cf83c30, 0x381eee1b, 0x8cf57ad0, 0x38194864, 0x8cf2b9b8,
-    0x3813a28a, 0x8ceff8e6,
-  0x380dfc8d, 0x8ced385b, 0x3808566e, 0x8cea7818, 0x3802b02c, 0x8ce7b81b,
-    0x37fd09c8, 0x8ce4f865,
-  0x37f76341, 0x8ce238f6, 0x37f1bc97, 0x8cdf79ce, 0x37ec15cb, 0x8cdcbaee,
-    0x37e66edd, 0x8cd9fc54,
-  0x37e0c7cc, 0x8cd73e01, 0x37db2099, 0x8cd47ff6, 0x37d57943, 0x8cd1c231,
-    0x37cfd1cb, 0x8ccf04b3,
-  0x37ca2a30, 0x8ccc477d, 0x37c48273, 0x8cc98a8e, 0x37beda93, 0x8cc6cde5,
-    0x37b93292, 0x8cc41184,
-  0x37b38a6d, 0x8cc1556a, 0x37ade227, 0x8cbe9996, 0x37a839be, 0x8cbbde0a,
-    0x37a29132, 0x8cb922c6,
-  0x379ce885, 0x8cb667c8, 0x37973fb5, 0x8cb3ad11, 0x379196c3, 0x8cb0f2a1,
-    0x378bedae, 0x8cae3879,
-  0x37864477, 0x8cab7e98, 0x37809b1e, 0x8ca8c4fd, 0x377af1a3, 0x8ca60baa,
-    0x37754806, 0x8ca3529f,
-  0x376f9e46, 0x8ca099da, 0x3769f464, 0x8c9de15c, 0x37644a60, 0x8c9b2926,
-    0x375ea03a, 0x8c987137,
-  0x3758f5f2, 0x8c95b98f, 0x37534b87, 0x8c93022e, 0x374da0fa, 0x8c904b14,
-    0x3747f64c, 0x8c8d9442,
-  0x37424b7b, 0x8c8addb7, 0x373ca088, 0x8c882773, 0x3736f573, 0x8c857176,
-    0x37314a3c, 0x8c82bbc0,
-  0x372b9ee3, 0x8c800652, 0x3725f367, 0x8c7d512b, 0x372047ca, 0x8c7a9c4b,
-    0x371a9c0b, 0x8c77e7b3,
-  0x3714f02a, 0x8c753362, 0x370f4427, 0x8c727f58, 0x37099802, 0x8c6fcb95,
-    0x3703ebbb, 0x8c6d181a,
-  0x36fe3f52, 0x8c6a64e5, 0x36f892c7, 0x8c67b1f9, 0x36f2e61a, 0x8c64ff53,
-    0x36ed394b, 0x8c624cf5,
-  0x36e78c5b, 0x8c5f9ade, 0x36e1df48, 0x8c5ce90e, 0x36dc3214, 0x8c5a3786,
-    0x36d684be, 0x8c578645,
-  0x36d0d746, 0x8c54d54c, 0x36cb29ac, 0x8c522499, 0x36c57bf0, 0x8c4f742f,
-    0x36bfce13, 0x8c4cc40b,
-  0x36ba2014, 0x8c4a142f, 0x36b471f3, 0x8c47649a, 0x36aec3b0, 0x8c44b54d,
-    0x36a9154c, 0x8c420647,
-  0x36a366c6, 0x8c3f5788, 0x369db81e, 0x8c3ca911, 0x36980954, 0x8c39fae1,
-    0x36925a69, 0x8c374cf9,
-  0x368cab5c, 0x8c349f58, 0x3686fc2e, 0x8c31f1ff, 0x36814cde, 0x8c2f44ed,
-    0x367b9d6c, 0x8c2c9822,
-  0x3675edd9, 0x8c29eb9f, 0x36703e24, 0x8c273f63, 0x366a8e4d, 0x8c24936f,
-    0x3664de55, 0x8c21e7c2,
-  0x365f2e3b, 0x8c1f3c5d, 0x36597e00, 0x8c1c913f, 0x3653cda3, 0x8c19e669,
-    0x364e1d25, 0x8c173bda,
-  0x36486c86, 0x8c149192, 0x3642bbc4, 0x8c11e792, 0x363d0ae2, 0x8c0f3dda,
-    0x363759de, 0x8c0c9469,
-  0x3631a8b8, 0x8c09eb40, 0x362bf771, 0x8c07425e, 0x36264609, 0x8c0499c4,
-    0x3620947f, 0x8c01f171,
-  0x361ae2d3, 0x8bff4966, 0x36153107, 0x8bfca1a3, 0x360f7f19, 0x8bf9fa27,
-    0x3609cd0a, 0x8bf752f2,
-  0x36041ad9, 0x8bf4ac05, 0x35fe6887, 0x8bf20560, 0x35f8b614, 0x8bef5f02,
-    0x35f3037f, 0x8becb8ec,
-  0x35ed50c9, 0x8bea131e, 0x35e79df2, 0x8be76d97, 0x35e1eafa, 0x8be4c857,
-    0x35dc37e0, 0x8be22360,
-  0x35d684a6, 0x8bdf7eb0, 0x35d0d14a, 0x8bdcda47, 0x35cb1dcc, 0x8bda3626,
-    0x35c56a2e, 0x8bd7924d,
-  0x35bfb66e, 0x8bd4eebc, 0x35ba028e, 0x8bd24b72, 0x35b44e8c, 0x8bcfa870,
-    0x35ae9a69, 0x8bcd05b5,
-  0x35a8e625, 0x8bca6343, 0x35a331c0, 0x8bc7c117, 0x359d7d39, 0x8bc51f34,
-    0x3597c892, 0x8bc27d98,
-  0x359213c9, 0x8bbfdc44, 0x358c5ee0, 0x8bbd3b38, 0x3586a9d5, 0x8bba9a73,
-    0x3580f4aa, 0x8bb7f9f6,
-  0x357b3f5d, 0x8bb559c1, 0x357589f0, 0x8bb2b9d4, 0x356fd461, 0x8bb01a2e,
-    0x356a1eb2, 0x8bad7ad0,
-  0x356468e2, 0x8baadbba, 0x355eb2f0, 0x8ba83cec, 0x3558fcde, 0x8ba59e65,
-    0x355346ab, 0x8ba30026,
-  0x354d9057, 0x8ba0622f, 0x3547d9e2, 0x8b9dc480, 0x3542234c, 0x8b9b2718,
-    0x353c6c95, 0x8b9889f8,
-  0x3536b5be, 0x8b95ed21, 0x3530fec6, 0x8b935090, 0x352b47ad, 0x8b90b448,
-    0x35259073, 0x8b8e1848,
-  0x351fd918, 0x8b8b7c8f, 0x351a219c, 0x8b88e11e, 0x35146a00, 0x8b8645f5,
-    0x350eb243, 0x8b83ab14,
-  0x3508fa66, 0x8b81107b, 0x35034267, 0x8b7e7629, 0x34fd8a48, 0x8b7bdc20,
-    0x34f7d208, 0x8b79425e,
-  0x34f219a8, 0x8b76a8e4, 0x34ec6127, 0x8b740fb3, 0x34e6a885, 0x8b7176c8,
-    0x34e0efc2, 0x8b6ede26,
-  0x34db36df, 0x8b6c45cc, 0x34d57ddc, 0x8b69adba, 0x34cfc4b7, 0x8b6715ef,
-    0x34ca0b73, 0x8b647e6d,
-  0x34c4520d, 0x8b61e733, 0x34be9887, 0x8b5f5040, 0x34b8dee1, 0x8b5cb995,
-    0x34b3251a, 0x8b5a2333,
-  0x34ad6b32, 0x8b578d18, 0x34a7b12a, 0x8b54f745, 0x34a1f702, 0x8b5261ba,
-    0x349c3cb9, 0x8b4fcc77,
-  0x34968250, 0x8b4d377c, 0x3490c7c6, 0x8b4aa2ca, 0x348b0d1c, 0x8b480e5f,
-    0x34855251, 0x8b457a3c,
-  0x347f9766, 0x8b42e661, 0x3479dc5b, 0x8b4052ce, 0x3474212f, 0x8b3dbf83,
-    0x346e65e3, 0x8b3b2c80,
-  0x3468aa76, 0x8b3899c6, 0x3462eee9, 0x8b360753, 0x345d333c, 0x8b337528,
-    0x3457776f, 0x8b30e345,
-  0x3451bb81, 0x8b2e51ab, 0x344bff73, 0x8b2bc058, 0x34464345, 0x8b292f4e,
-    0x344086f6, 0x8b269e8b,
-  0x343aca87, 0x8b240e11, 0x34350df8, 0x8b217ddf, 0x342f5149, 0x8b1eedf4,
-    0x3429947a, 0x8b1c5e52,
-  0x3423d78a, 0x8b19cef8, 0x341e1a7b, 0x8b173fe6, 0x34185d4b, 0x8b14b11d,
-    0x34129ffb, 0x8b12229b,
-  0x340ce28b, 0x8b0f9462, 0x340724fb, 0x8b0d0670, 0x3401674a, 0x8b0a78c7,
-    0x33fba97a, 0x8b07eb66,
-  0x33f5eb89, 0x8b055e4d, 0x33f02d79, 0x8b02d17c, 0x33ea6f48, 0x8b0044f3,
-    0x33e4b0f8, 0x8afdb8b3,
-  0x33def287, 0x8afb2cbb, 0x33d933f7, 0x8af8a10b, 0x33d37546, 0x8af615a3,
-    0x33cdb676, 0x8af38a83,
-  0x33c7f785, 0x8af0ffac, 0x33c23875, 0x8aee751c, 0x33bc7944, 0x8aebead5,
-    0x33b6b9f4, 0x8ae960d6,
-  0x33b0fa84, 0x8ae6d720, 0x33ab3af4, 0x8ae44db1, 0x33a57b44, 0x8ae1c48b,
-    0x339fbb74, 0x8adf3bad,
-  0x3399fb85, 0x8adcb318, 0x33943b75, 0x8ada2aca, 0x338e7b46, 0x8ad7a2c5,
-    0x3388baf7, 0x8ad51b08,
-  0x3382fa88, 0x8ad29394, 0x337d39f9, 0x8ad00c67, 0x3377794b, 0x8acd8583,
-    0x3371b87d, 0x8acafee8,
-  0x336bf78f, 0x8ac87894, 0x33663682, 0x8ac5f289, 0x33607554, 0x8ac36cc6,
-    0x335ab407, 0x8ac0e74c,
-  0x3354f29b, 0x8abe6219, 0x334f310e, 0x8abbdd30, 0x33496f62, 0x8ab9588e,
-    0x3343ad97, 0x8ab6d435,
-  0x333debab, 0x8ab45024, 0x333829a1, 0x8ab1cc5c, 0x33326776, 0x8aaf48db,
-    0x332ca52c, 0x8aacc5a4,
-  0x3326e2c3, 0x8aaa42b4, 0x33212039, 0x8aa7c00d, 0x331b5d91, 0x8aa53daf,
-    0x33159ac8, 0x8aa2bb99,
-  0x330fd7e1, 0x8aa039cb, 0x330a14da, 0x8a9db845, 0x330451b3, 0x8a9b3708,
-    0x32fe8e6d, 0x8a98b614,
-  0x32f8cb07, 0x8a963567, 0x32f30782, 0x8a93b504, 0x32ed43de, 0x8a9134e8,
-    0x32e7801a, 0x8a8eb516,
-  0x32e1bc36, 0x8a8c358b, 0x32dbf834, 0x8a89b649, 0x32d63412, 0x8a873750,
-    0x32d06fd0, 0x8a84b89e,
-  0x32caab6f, 0x8a823a36, 0x32c4e6ef, 0x8a7fbc16, 0x32bf2250, 0x8a7d3e3e,
-    0x32b95d91, 0x8a7ac0af,
-  0x32b398b3, 0x8a784368, 0x32add3b6, 0x8a75c66a, 0x32a80e99, 0x8a7349b4,
-    0x32a2495d, 0x8a70cd47,
-  0x329c8402, 0x8a6e5123, 0x3296be88, 0x8a6bd547, 0x3290f8ef, 0x8a6959b3,
-    0x328b3336, 0x8a66de68,
-  0x32856d5e, 0x8a646365, 0x327fa767, 0x8a61e8ab, 0x3279e151, 0x8a5f6e3a,
-    0x32741b1c, 0x8a5cf411,
-  0x326e54c7, 0x8a5a7a31, 0x32688e54, 0x8a580099, 0x3262c7c1, 0x8a55874a,
-    0x325d0110, 0x8a530e43,
-  0x32573a3f, 0x8a509585, 0x3251734f, 0x8a4e1d10, 0x324bac40, 0x8a4ba4e3,
-    0x3245e512, 0x8a492cff,
-  0x32401dc6, 0x8a46b564, 0x323a565a, 0x8a443e11, 0x32348ecf, 0x8a41c706,
-    0x322ec725, 0x8a3f5045,
-  0x3228ff5c, 0x8a3cd9cc, 0x32233775, 0x8a3a639b, 0x321d6f6e, 0x8a37edb3,
-    0x3217a748, 0x8a357814,
-  0x3211df04, 0x8a3302be, 0x320c16a1, 0x8a308db0, 0x32064e1e, 0x8a2e18eb,
-    0x3200857d, 0x8a2ba46e,
-  0x31fabcbd, 0x8a29303b, 0x31f4f3df, 0x8a26bc50, 0x31ef2ae1, 0x8a2448ad,
-    0x31e961c5, 0x8a21d554,
-  0x31e39889, 0x8a1f6243, 0x31ddcf30, 0x8a1cef7a, 0x31d805b7, 0x8a1a7cfb,
-    0x31d23c1f, 0x8a180ac4,
-  0x31cc7269, 0x8a1598d6, 0x31c6a894, 0x8a132731, 0x31c0dea1, 0x8a10b5d4,
-    0x31bb148f, 0x8a0e44c0,
-  0x31b54a5e, 0x8a0bd3f5, 0x31af800e, 0x8a096373, 0x31a9b5a0, 0x8a06f339,
-    0x31a3eb13, 0x8a048348,
-  0x319e2067, 0x8a0213a0, 0x3198559d, 0x89ffa441, 0x31928ab4, 0x89fd352b,
-    0x318cbfad, 0x89fac65d,
-  0x3186f487, 0x89f857d8, 0x31812943, 0x89f5e99c, 0x317b5de0, 0x89f37ba9,
-    0x3175925e, 0x89f10dff,
-  0x316fc6be, 0x89eea09d, 0x3169fb00, 0x89ec3384, 0x31642f23, 0x89e9c6b4,
-    0x315e6328, 0x89e75a2d,
-  0x3158970e, 0x89e4edef, 0x3152cad5, 0x89e281fa, 0x314cfe7f, 0x89e0164d,
-    0x31473209, 0x89ddaae9,
-  0x31416576, 0x89db3fcf, 0x313b98c4, 0x89d8d4fd, 0x3135cbf4, 0x89d66a74,
-    0x312fff05, 0x89d40033,
-  0x312a31f8, 0x89d1963c, 0x312464cd, 0x89cf2c8e, 0x311e9783, 0x89ccc328,
-    0x3118ca1b, 0x89ca5a0c,
-  0x3112fc95, 0x89c7f138, 0x310d2ef0, 0x89c588ae, 0x3107612e, 0x89c3206c,
-    0x3101934d, 0x89c0b873,
-  0x30fbc54d, 0x89be50c3, 0x30f5f730, 0x89bbe95c, 0x30f028f4, 0x89b9823e,
-    0x30ea5a9a, 0x89b71b69,
-  0x30e48c22, 0x89b4b4dd, 0x30debd8c, 0x89b24e9a, 0x30d8eed8, 0x89afe8a0,
-    0x30d32006, 0x89ad82ef,
-  0x30cd5115, 0x89ab1d87, 0x30c78206, 0x89a8b868, 0x30c1b2da, 0x89a65391,
-    0x30bbe38f, 0x89a3ef04,
-  0x30b61426, 0x89a18ac0, 0x30b0449f, 0x899f26c5, 0x30aa74fa, 0x899cc313,
-    0x30a4a537, 0x899a5faa,
-  0x309ed556, 0x8997fc8a, 0x30990557, 0x899599b3, 0x3093353a, 0x89933725,
-    0x308d64ff, 0x8990d4e0,
-  0x308794a6, 0x898e72e4, 0x3081c42f, 0x898c1131, 0x307bf39b, 0x8989afc8,
-    0x307622e8, 0x89874ea7,
-  0x30705217, 0x8984edcf, 0x306a8129, 0x89828d41, 0x3064b01d, 0x89802cfc,
-    0x305edef3, 0x897dccff,
-  0x30590dab, 0x897b6d4c, 0x30533c45, 0x89790de2, 0x304d6ac1, 0x8976aec1,
-    0x30479920, 0x89744fe9,
-  0x3041c761, 0x8971f15a, 0x303bf584, 0x896f9315, 0x30362389, 0x896d3518,
-    0x30305171, 0x896ad765,
-  0x302a7f3a, 0x896879fb, 0x3024ace6, 0x89661cda, 0x301eda75, 0x8963c002,
-    0x301907e6, 0x89616373,
-  0x30133539, 0x895f072e, 0x300d626e, 0x895cab31, 0x30078f86, 0x895a4f7e,
-    0x3001bc80, 0x8957f414,
-  0x2ffbe95d, 0x895598f3, 0x2ff6161c, 0x89533e1c, 0x2ff042bd, 0x8950e38e,
-    0x2fea6f41, 0x894e8948,
-  0x2fe49ba7, 0x894c2f4c, 0x2fdec7f0, 0x8949d59a, 0x2fd8f41b, 0x89477c30,
-    0x2fd32028, 0x89452310,
-  0x2fcd4c19, 0x8942ca39, 0x2fc777eb, 0x894071ab, 0x2fc1a3a0, 0x893e1967,
-    0x2fbbcf38, 0x893bc16b,
-  0x2fb5fab2, 0x893969b9, 0x2fb0260f, 0x89371250, 0x2faa514f, 0x8934bb31,
-    0x2fa47c71, 0x8932645b,
-  0x2f9ea775, 0x89300dce, 0x2f98d25d, 0x892db78a, 0x2f92fd26, 0x892b6190,
-    0x2f8d27d3, 0x89290bdf,
-  0x2f875262, 0x8926b677, 0x2f817cd4, 0x89246159, 0x2f7ba729, 0x89220c84,
-    0x2f75d160, 0x891fb7f8,
-  0x2f6ffb7a, 0x891d63b5, 0x2f6a2577, 0x891b0fbc, 0x2f644f56, 0x8918bc0c,
-    0x2f5e7919, 0x891668a6,
-  0x2f58a2be, 0x89141589, 0x2f52cc46, 0x8911c2b5, 0x2f4cf5b0, 0x890f702b,
-    0x2f471efe, 0x890d1dea,
-  0x2f41482e, 0x890acbf2, 0x2f3b7141, 0x89087a44, 0x2f359a37, 0x890628df,
-    0x2f2fc310, 0x8903d7c4,
-  0x2f29ebcc, 0x890186f2, 0x2f24146b, 0x88ff3669, 0x2f1e3ced, 0x88fce62a,
-    0x2f186551, 0x88fa9634,
-  0x2f128d99, 0x88f84687, 0x2f0cb5c3, 0x88f5f724, 0x2f06ddd1, 0x88f3a80b,
-    0x2f0105c1, 0x88f1593b,
-  0x2efb2d95, 0x88ef0ab4, 0x2ef5554b, 0x88ecbc77, 0x2eef7ce5, 0x88ea6e83,
-    0x2ee9a461, 0x88e820d9,
-  0x2ee3cbc1, 0x88e5d378, 0x2eddf304, 0x88e38660, 0x2ed81a29, 0x88e13992,
-    0x2ed24132, 0x88deed0e,
-  0x2ecc681e, 0x88dca0d3, 0x2ec68eed, 0x88da54e1, 0x2ec0b5a0, 0x88d8093a,
-    0x2ebadc35, 0x88d5bddb,
-  0x2eb502ae, 0x88d372c6, 0x2eaf290a, 0x88d127fb, 0x2ea94f49, 0x88cedd79,
-    0x2ea3756b, 0x88cc9340,
-  0x2e9d9b70, 0x88ca4951, 0x2e97c159, 0x88c7ffac, 0x2e91e725, 0x88c5b650,
-    0x2e8c0cd4, 0x88c36d3e,
-  0x2e863267, 0x88c12475, 0x2e8057dd, 0x88bedbf6, 0x2e7a7d36, 0x88bc93c0,
-    0x2e74a272, 0x88ba4bd4,
-  0x2e6ec792, 0x88b80432, 0x2e68ec95, 0x88b5bcd9, 0x2e63117c, 0x88b375ca,
-    0x2e5d3646, 0x88b12f04,
-  0x2e575af3, 0x88aee888, 0x2e517f84, 0x88aca255, 0x2e4ba3f8, 0x88aa5c6c,
-    0x2e45c850, 0x88a816cd,
-  0x2e3fec8b, 0x88a5d177, 0x2e3a10aa, 0x88a38c6b, 0x2e3434ac, 0x88a147a9,
-    0x2e2e5891, 0x889f0330,
-  0x2e287c5a, 0x889cbf01, 0x2e22a007, 0x889a7b1b, 0x2e1cc397, 0x88983780,
-    0x2e16e70b, 0x8895f42d,
-  0x2e110a62, 0x8893b125, 0x2e0b2d9d, 0x88916e66, 0x2e0550bb, 0x888f2bf1,
-    0x2dff73bd, 0x888ce9c5,
-  0x2df996a3, 0x888aa7e3, 0x2df3b96c, 0x8888664b, 0x2deddc19, 0x888624fd,
-    0x2de7feaa, 0x8883e3f8,
-  0x2de2211e, 0x8881a33d, 0x2ddc4376, 0x887f62cb, 0x2dd665b2, 0x887d22a4,
-    0x2dd087d1, 0x887ae2c6,
-  0x2dcaa9d5, 0x8878a332, 0x2dc4cbbc, 0x887663e7, 0x2dbeed86, 0x887424e7,
-    0x2db90f35, 0x8871e630,
-  0x2db330c7, 0x886fa7c2, 0x2dad523d, 0x886d699f, 0x2da77397, 0x886b2bc5,
-    0x2da194d5, 0x8868ee35,
-  0x2d9bb5f6, 0x8866b0ef, 0x2d95d6fc, 0x886473f2, 0x2d8ff7e5, 0x88623740,
-    0x2d8a18b3, 0x885ffad7,
-  0x2d843964, 0x885dbeb8, 0x2d7e59f9, 0x885b82e3, 0x2d787a72, 0x88594757,
-    0x2d729acf, 0x88570c16,
-  0x2d6cbb10, 0x8854d11e, 0x2d66db35, 0x88529670, 0x2d60fb3e, 0x88505c0b,
-    0x2d5b1b2b, 0x884e21f1,
-  0x2d553afc, 0x884be821, 0x2d4f5ab1, 0x8849ae9a, 0x2d497a4a, 0x8847755d,
-    0x2d4399c7, 0x88453c6a,
-  0x2d3db928, 0x884303c1, 0x2d37d86d, 0x8840cb61, 0x2d31f797, 0x883e934c,
-    0x2d2c16a4, 0x883c5b81,
-  0x2d263596, 0x883a23ff, 0x2d20546b, 0x8837ecc7, 0x2d1a7325, 0x8835b5d9,
-    0x2d1491c4, 0x88337f35,
-  0x2d0eb046, 0x883148db, 0x2d08ceac, 0x882f12cb, 0x2d02ecf7, 0x882cdd04,
-    0x2cfd0b26, 0x882aa788,
-  0x2cf72939, 0x88287256, 0x2cf14731, 0x88263d6d, 0x2ceb650d, 0x882408ce,
-    0x2ce582cd, 0x8821d47a,
-  0x2cdfa071, 0x881fa06f, 0x2cd9bdfa, 0x881d6cae, 0x2cd3db67, 0x881b3937,
-    0x2ccdf8b8, 0x8819060a,
-  0x2cc815ee, 0x8816d327, 0x2cc23308, 0x8814a08f, 0x2cbc5006, 0x88126e40,
-    0x2cb66ce9, 0x88103c3b,
-  0x2cb089b1, 0x880e0a7f, 0x2caaa65c, 0x880bd90e, 0x2ca4c2ed, 0x8809a7e7,
-    0x2c9edf61, 0x8807770a,
-  0x2c98fbba, 0x88054677, 0x2c9317f8, 0x8803162e, 0x2c8d341a, 0x8800e62f,
-    0x2c875021, 0x87feb67a,
-  0x2c816c0c, 0x87fc870f, 0x2c7b87dc, 0x87fa57ee, 0x2c75a390, 0x87f82917,
-    0x2c6fbf29, 0x87f5fa8b,
-  0x2c69daa6, 0x87f3cc48, 0x2c63f609, 0x87f19e4f, 0x2c5e114f, 0x87ef70a0,
-    0x2c582c7b, 0x87ed433c,
-  0x2c52478a, 0x87eb1621, 0x2c4c627f, 0x87e8e950, 0x2c467d58, 0x87e6bcca,
-    0x2c409816, 0x87e4908e,
-  0x2c3ab2b9, 0x87e2649b, 0x2c34cd40, 0x87e038f3, 0x2c2ee7ad, 0x87de0d95,
-    0x2c2901fd, 0x87dbe281,
-  0x2c231c33, 0x87d9b7b7, 0x2c1d364e, 0x87d78d38, 0x2c17504d, 0x87d56302,
-    0x2c116a31, 0x87d33916,
-  0x2c0b83fa, 0x87d10f75, 0x2c059da7, 0x87cee61e, 0x2bffb73a, 0x87ccbd11,
-    0x2bf9d0b1, 0x87ca944e,
-  0x2bf3ea0d, 0x87c86bd5, 0x2bee034e, 0x87c643a6, 0x2be81c74, 0x87c41bc2,
-    0x2be2357f, 0x87c1f427,
-  0x2bdc4e6f, 0x87bfccd7, 0x2bd66744, 0x87bda5d1, 0x2bd07ffe, 0x87bb7f16,
-    0x2bca989d, 0x87b958a4,
-  0x2bc4b120, 0x87b7327d, 0x2bbec989, 0x87b50c9f, 0x2bb8e1d7, 0x87b2e70c,
-    0x2bb2fa0a, 0x87b0c1c4,
-  0x2bad1221, 0x87ae9cc5, 0x2ba72a1e, 0x87ac7811, 0x2ba14200, 0x87aa53a6,
-    0x2b9b59c7, 0x87a82f87,
-  0x2b957173, 0x87a60bb1, 0x2b8f8905, 0x87a3e825, 0x2b89a07b, 0x87a1c4e4,
-    0x2b83b7d7, 0x879fa1ed,
-  0x2b7dcf17, 0x879d7f41, 0x2b77e63d, 0x879b5cde, 0x2b71fd48, 0x87993ac6,
-    0x2b6c1438, 0x879718f8,
-  0x2b662b0e, 0x8794f774, 0x2b6041c9, 0x8792d63b, 0x2b5a5868, 0x8790b54c,
-    0x2b546eee, 0x878e94a7,
-  0x2b4e8558, 0x878c744d, 0x2b489ba8, 0x878a543d, 0x2b42b1dd, 0x87883477,
-    0x2b3cc7f7, 0x878614fb,
-  0x2b36ddf7, 0x8783f5ca, 0x2b30f3dc, 0x8781d6e3, 0x2b2b09a6, 0x877fb846,
-    0x2b251f56, 0x877d99f4,
-  0x2b1f34eb, 0x877b7bec, 0x2b194a66, 0x87795e2f, 0x2b135fc6, 0x877740bb,
-    0x2b0d750b, 0x87752392,
-  0x2b078a36, 0x877306b4, 0x2b019f46, 0x8770ea20, 0x2afbb43c, 0x876ecdd6,
-    0x2af5c917, 0x876cb1d6,
-  0x2aefddd8, 0x876a9621, 0x2ae9f27e, 0x87687ab7, 0x2ae4070a, 0x87665f96,
-    0x2ade1b7c, 0x876444c1,
-  0x2ad82fd2, 0x87622a35, 0x2ad2440f, 0x87600ff4, 0x2acc5831, 0x875df5fd,
-    0x2ac66c39, 0x875bdc51,
-  0x2ac08026, 0x8759c2ef, 0x2aba93f9, 0x8757a9d8, 0x2ab4a7b1, 0x8755910b,
-    0x2aaebb50, 0x87537888,
-  0x2aa8ced3, 0x87516050, 0x2aa2e23d, 0x874f4862, 0x2a9cf58c, 0x874d30bf,
-    0x2a9708c1, 0x874b1966,
-  0x2a911bdc, 0x87490258, 0x2a8b2edc, 0x8746eb94, 0x2a8541c3, 0x8744d51b,
-    0x2a7f548e, 0x8742beec,
-  0x2a796740, 0x8740a907, 0x2a7379d8, 0x873e936d, 0x2a6d8c55, 0x873c7e1e,
-    0x2a679eb8, 0x873a6919,
-  0x2a61b101, 0x8738545e, 0x2a5bc330, 0x87363fee, 0x2a55d545, 0x87342bc9,
-    0x2a4fe740, 0x873217ee,
-  0x2a49f920, 0x8730045d, 0x2a440ae7, 0x872df117, 0x2a3e1c93, 0x872bde1c,
-    0x2a382e25, 0x8729cb6b,
-  0x2a323f9e, 0x8727b905, 0x2a2c50fc, 0x8725a6e9, 0x2a266240, 0x87239518,
-    0x2a20736a, 0x87218391,
-  0x2a1a847b, 0x871f7255, 0x2a149571, 0x871d6163, 0x2a0ea64d, 0x871b50bc,
-    0x2a08b710, 0x87194060,
-  0x2a02c7b8, 0x8717304e, 0x29fcd847, 0x87152087, 0x29f6e8bb, 0x8713110a,
-    0x29f0f916, 0x871101d8,
-  0x29eb0957, 0x870ef2f1, 0x29e5197e, 0x870ce454, 0x29df298b, 0x870ad602,
-    0x29d9397f, 0x8708c7fa,
-  0x29d34958, 0x8706ba3d, 0x29cd5918, 0x8704acca, 0x29c768be, 0x87029fa3,
-    0x29c1784a, 0x870092c5,
-  0x29bb87bc, 0x86fe8633, 0x29b59715, 0x86fc79eb, 0x29afa654, 0x86fa6dee,
-    0x29a9b579, 0x86f8623b,
-  0x29a3c485, 0x86f656d3, 0x299dd377, 0x86f44bb6, 0x2997e24f, 0x86f240e3,
-    0x2991f10e, 0x86f0365c,
-  0x298bffb2, 0x86ee2c1e, 0x29860e3e, 0x86ec222c, 0x29801caf, 0x86ea1884,
-    0x297a2b07, 0x86e80f27,
-  0x29743946, 0x86e60614, 0x296e476b, 0x86e3fd4c, 0x29685576, 0x86e1f4cf,
-    0x29626368, 0x86dfec9d,
-  0x295c7140, 0x86dde4b5, 0x29567eff, 0x86dbdd18, 0x29508ca4, 0x86d9d5c6,
-    0x294a9a30, 0x86d7cebf,
-  0x2944a7a2, 0x86d5c802, 0x293eb4fb, 0x86d3c190, 0x2938c23a, 0x86d1bb69,
-    0x2932cf60, 0x86cfb58c,
-  0x292cdc6d, 0x86cdaffa, 0x2926e960, 0x86cbaab3, 0x2920f63a, 0x86c9a5b7,
-    0x291b02fa, 0x86c7a106,
-  0x29150fa1, 0x86c59c9f, 0x290f1c2f, 0x86c39883, 0x290928a3, 0x86c194b2,
-    0x290334ff, 0x86bf912c,
-  0x28fd4140, 0x86bd8df0, 0x28f74d69, 0x86bb8b00, 0x28f15978, 0x86b9885a,
-    0x28eb656e, 0x86b785ff,
-  0x28e5714b, 0x86b583ee, 0x28df7d0e, 0x86b38229, 0x28d988b8, 0x86b180ae,
-    0x28d3944a, 0x86af7f7e,
-  0x28cd9fc1, 0x86ad7e99, 0x28c7ab20, 0x86ab7dff, 0x28c1b666, 0x86a97db0,
-    0x28bbc192, 0x86a77dab,
-  0x28b5cca5, 0x86a57df2, 0x28afd7a0, 0x86a37e83, 0x28a9e281, 0x86a17f5f,
-    0x28a3ed49, 0x869f8086,
-  0x289df7f8, 0x869d81f8, 0x2898028e, 0x869b83b4, 0x28920d0a, 0x869985bc,
-    0x288c176e, 0x8697880f,
-  0x288621b9, 0x86958aac, 0x28802beb, 0x86938d94, 0x287a3604, 0x869190c7,
-    0x28744004, 0x868f9445,
-  0x286e49ea, 0x868d980e, 0x286853b8, 0x868b9c22, 0x28625d6d, 0x8689a081,
-    0x285c670a, 0x8687a52b,
-  0x2856708d, 0x8685aa20, 0x285079f7, 0x8683af5f, 0x284a8349, 0x8681b4ea,
-    0x28448c81, 0x867fbabf,
-  0x283e95a1, 0x867dc0e0, 0x28389ea8, 0x867bc74b, 0x2832a796, 0x8679ce01,
-    0x282cb06c, 0x8677d503,
-  0x2826b928, 0x8675dc4f, 0x2820c1cc, 0x8673e3e6, 0x281aca57, 0x8671ebc8,
-    0x2814d2c9, 0x866ff3f6,
-  0x280edb23, 0x866dfc6e, 0x2808e364, 0x866c0531, 0x2802eb8c, 0x866a0e3f,
-    0x27fcf39c, 0x86681798,
-  0x27f6fb92, 0x8666213c, 0x27f10371, 0x86642b2c, 0x27eb0b36, 0x86623566,
-    0x27e512e3, 0x86603feb,
-  0x27df1a77, 0x865e4abb, 0x27d921f3, 0x865c55d7, 0x27d32956, 0x865a613d,
-    0x27cd30a1, 0x86586cee,
-  0x27c737d3, 0x865678eb, 0x27c13eec, 0x86548532, 0x27bb45ed, 0x865291c4,
-    0x27b54cd6, 0x86509ea2,
-  0x27af53a6, 0x864eabcb, 0x27a95a5d, 0x864cb93e, 0x27a360fc, 0x864ac6fd,
-    0x279d6783, 0x8648d507,
-  0x27976df1, 0x8646e35c, 0x27917447, 0x8644f1fc, 0x278b7a84, 0x864300e7,
-    0x278580a9, 0x8641101d,
-  0x277f86b5, 0x863f1f9e, 0x27798caa, 0x863d2f6b, 0x27739285, 0x863b3f82,
-    0x276d9849, 0x86394fe5,
-  0x27679df4, 0x86376092, 0x2761a387, 0x8635718b, 0x275ba901, 0x863382cf,
-    0x2755ae64, 0x8631945e,
-  0x274fb3ae, 0x862fa638, 0x2749b8e0, 0x862db85e, 0x2743bdf9, 0x862bcace,
-    0x273dc2fa, 0x8629dd8a,
-  0x2737c7e3, 0x8627f091, 0x2731ccb4, 0x862603e3, 0x272bd16d, 0x86241780,
-    0x2725d60e, 0x86222b68,
-  0x271fda96, 0x86203f9c, 0x2719df06, 0x861e541a, 0x2713e35f, 0x861c68e4,
-    0x270de79f, 0x861a7df9,
-  0x2707ebc7, 0x86189359, 0x2701efd7, 0x8616a905, 0x26fbf3ce, 0x8614befb,
-    0x26f5f7ae, 0x8612d53d,
-  0x26effb76, 0x8610ebca, 0x26e9ff26, 0x860f02a3, 0x26e402bd, 0x860d19c6,
-    0x26de063d, 0x860b3135,
-  0x26d809a5, 0x860948ef, 0x26d20cf5, 0x860760f4, 0x26cc102d, 0x86057944,
-    0x26c6134d, 0x860391e0,
-  0x26c01655, 0x8601aac7, 0x26ba1945, 0x85ffc3f9, 0x26b41c1d, 0x85fddd76,
-    0x26ae1edd, 0x85fbf73f,
-  0x26a82186, 0x85fa1153, 0x26a22416, 0x85f82bb2, 0x269c268f, 0x85f6465c,
-    0x269628f0, 0x85f46152,
-  0x26902b39, 0x85f27c93, 0x268a2d6b, 0x85f09820, 0x26842f84, 0x85eeb3f7,
-    0x267e3186, 0x85ecd01a,
-  0x26783370, 0x85eaec88, 0x26723543, 0x85e90942, 0x266c36fe, 0x85e72647,
-    0x266638a1, 0x85e54397,
-  0x26603a2c, 0x85e36132, 0x265a3b9f, 0x85e17f19, 0x26543cfb, 0x85df9d4b,
-    0x264e3e40, 0x85ddbbc9,
-  0x26483f6c, 0x85dbda91, 0x26424082, 0x85d9f9a5, 0x263c417f, 0x85d81905,
-    0x26364265, 0x85d638b0,
-  0x26304333, 0x85d458a6, 0x262a43ea, 0x85d278e7, 0x26244489, 0x85d09974,
-    0x261e4511, 0x85ceba4d,
-  0x26184581, 0x85ccdb70, 0x261245da, 0x85cafcdf, 0x260c461b, 0x85c91e9a,
-    0x26064645, 0x85c740a0,
-  0x26004657, 0x85c562f1, 0x25fa4652, 0x85c3858d, 0x25f44635, 0x85c1a875,
-    0x25ee4601, 0x85bfcba9,
-  0x25e845b6, 0x85bdef28, 0x25e24553, 0x85bc12f2, 0x25dc44d9, 0x85ba3707,
-    0x25d64447, 0x85b85b68,
-  0x25d0439f, 0x85b68015, 0x25ca42de, 0x85b4a50d, 0x25c44207, 0x85b2ca50,
-    0x25be4118, 0x85b0efdf,
-  0x25b84012, 0x85af15b9, 0x25b23ef5, 0x85ad3bdf, 0x25ac3dc0, 0x85ab6250,
-    0x25a63c74, 0x85a9890d,
-  0x25a03b11, 0x85a7b015, 0x259a3997, 0x85a5d768, 0x25943806, 0x85a3ff07,
-    0x258e365d, 0x85a226f2,
-  0x2588349d, 0x85a04f28, 0x258232c6, 0x859e77a9, 0x257c30d8, 0x859ca076,
-    0x25762ed3, 0x859ac98f,
-  0x25702cb7, 0x8598f2f3, 0x256a2a83, 0x85971ca2, 0x25642839, 0x8595469d,
-    0x255e25d7, 0x859370e4,
-  0x2558235f, 0x85919b76, 0x255220cf, 0x858fc653, 0x254c1e28, 0x858df17c,
-    0x25461b6b, 0x858c1cf1,
-  0x25401896, 0x858a48b1, 0x253a15aa, 0x858874bd, 0x253412a8, 0x8586a114,
-    0x252e0f8e, 0x8584cdb7,
-  0x25280c5e, 0x8582faa5, 0x25220916, 0x858127df, 0x251c05b8, 0x857f5564,
-    0x25160243, 0x857d8335,
-  0x250ffeb7, 0x857bb152, 0x2509fb14, 0x8579dfba, 0x2503f75a, 0x85780e6e,
-    0x24fdf389, 0x85763d6d,
-  0x24f7efa2, 0x85746cb8, 0x24f1eba4, 0x85729c4e, 0x24ebe78f, 0x8570cc30,
-    0x24e5e363, 0x856efc5e,
-  0x24dfdf20, 0x856d2cd7, 0x24d9dac7, 0x856b5d9c, 0x24d3d657, 0x85698ead,
-    0x24cdd1d0, 0x8567c009,
-  0x24c7cd33, 0x8565f1b0, 0x24c1c87f, 0x856423a4, 0x24bbc3b4, 0x856255e3,
-    0x24b5bed2, 0x8560886d,
-  0x24afb9da, 0x855ebb44, 0x24a9b4cb, 0x855cee66, 0x24a3afa6, 0x855b21d3,
-    0x249daa6a, 0x8559558c,
-  0x2497a517, 0x85578991, 0x24919fae, 0x8555bde2, 0x248b9a2f, 0x8553f27e,
-    0x24859498, 0x85522766,
-  0x247f8eec, 0x85505c99, 0x24798928, 0x854e9219, 0x2473834f, 0x854cc7e3,
-    0x246d7d5e, 0x854afdfa,
-  0x24677758, 0x8549345c, 0x2461713a, 0x85476b0a, 0x245b6b07, 0x8545a204,
-    0x245564bd, 0x8543d949,
-  0x244f5e5c, 0x854210db, 0x244957e5, 0x854048b7, 0x24435158, 0x853e80e0,
-    0x243d4ab4, 0x853cb954,
-  0x243743fa, 0x853af214, 0x24313d2a, 0x85392b20, 0x242b3644, 0x85376477,
-    0x24252f47, 0x85359e1a,
-  0x241f2833, 0x8533d809, 0x2419210a, 0x85321244, 0x241319ca, 0x85304cca,
-    0x240d1274, 0x852e879d,
-  0x24070b08, 0x852cc2bb, 0x24010385, 0x852afe24, 0x23fafbec, 0x852939da,
-    0x23f4f43e, 0x852775db,
-  0x23eeec78, 0x8525b228, 0x23e8e49d, 0x8523eec1, 0x23e2dcac, 0x85222ba5,
-    0x23dcd4a4, 0x852068d6,
-  0x23d6cc87, 0x851ea652, 0x23d0c453, 0x851ce41a, 0x23cabc09, 0x851b222e,
-    0x23c4b3a9, 0x8519608d,
-  0x23beab33, 0x85179f39, 0x23b8a2a7, 0x8515de30, 0x23b29a05, 0x85141d73,
-    0x23ac914d, 0x85125d02,
-  0x23a6887f, 0x85109cdd, 0x23a07f9a, 0x850edd03, 0x239a76a0, 0x850d1d75,
-    0x23946d90, 0x850b5e34,
-  0x238e646a, 0x85099f3e, 0x23885b2e, 0x8507e094, 0x238251dd, 0x85062235,
-    0x237c4875, 0x85046423,
-  0x23763ef7, 0x8502a65c, 0x23703564, 0x8500e8e2, 0x236a2bba, 0x84ff2bb3,
-    0x236421fb, 0x84fd6ed0,
-  0x235e1826, 0x84fbb239, 0x23580e3b, 0x84f9f5ee, 0x2352043b, 0x84f839ee,
-    0x234bfa24, 0x84f67e3b,
-  0x2345eff8, 0x84f4c2d4, 0x233fe5b6, 0x84f307b8, 0x2339db5e, 0x84f14ce8,
-    0x2333d0f1, 0x84ef9265,
-  0x232dc66d, 0x84edd82d, 0x2327bbd5, 0x84ec1e41, 0x2321b126, 0x84ea64a1,
-    0x231ba662, 0x84e8ab4d,
-  0x23159b88, 0x84e6f244, 0x230f9098, 0x84e53988, 0x23098593, 0x84e38118,
-    0x23037a78, 0x84e1c8f3,
-  0x22fd6f48, 0x84e0111b, 0x22f76402, 0x84de598f, 0x22f158a7, 0x84dca24e,
-    0x22eb4d36, 0x84daeb5a,
-  0x22e541af, 0x84d934b1, 0x22df3613, 0x84d77e54, 0x22d92a61, 0x84d5c844,
-    0x22d31e9a, 0x84d4127f,
-  0x22cd12bd, 0x84d25d06, 0x22c706cb, 0x84d0a7da, 0x22c0fac4, 0x84cef2f9,
-    0x22baeea7, 0x84cd3e64,
-  0x22b4e274, 0x84cb8a1b, 0x22aed62c, 0x84c9d61f, 0x22a8c9cf, 0x84c8226e,
-    0x22a2bd5d, 0x84c66f09,
-  0x229cb0d5, 0x84c4bbf0, 0x2296a437, 0x84c30924, 0x22909785, 0x84c156a3,
-    0x228a8abd, 0x84bfa46e,
-  0x22847de0, 0x84bdf286, 0x227e70ed, 0x84bc40e9, 0x227863e5, 0x84ba8f98,
-    0x227256c8, 0x84b8de94,
-  0x226c4996, 0x84b72ddb, 0x22663c4e, 0x84b57d6f, 0x22602ef1, 0x84b3cd4f,
-    0x225a217f, 0x84b21d7a,
-  0x225413f8, 0x84b06df2, 0x224e065c, 0x84aebeb6, 0x2247f8aa, 0x84ad0fc6,
-    0x2241eae3, 0x84ab6122,
-  0x223bdd08, 0x84a9b2ca, 0x2235cf17, 0x84a804be, 0x222fc111, 0x84a656fe,
-    0x2229b2f6, 0x84a4a98a,
-  0x2223a4c5, 0x84a2fc62, 0x221d9680, 0x84a14f87, 0x22178826, 0x849fa2f7,
-    0x221179b7, 0x849df6b4,
-  0x220b6b32, 0x849c4abd, 0x22055c99, 0x849a9f12, 0x21ff4dea, 0x8498f3b3,
-    0x21f93f27, 0x849748a0,
-  0x21f3304f, 0x84959dd9, 0x21ed2162, 0x8493f35e, 0x21e71260, 0x84924930,
-    0x21e10349, 0x84909f4e,
-  0x21daf41d, 0x848ef5b7, 0x21d4e4dc, 0x848d4c6d, 0x21ced586, 0x848ba36f,
-    0x21c8c61c, 0x8489fabe,
-  0x21c2b69c, 0x84885258, 0x21bca708, 0x8486aa3e, 0x21b6975f, 0x84850271,
-    0x21b087a1, 0x84835af0,
-  0x21aa77cf, 0x8481b3bb, 0x21a467e7, 0x84800cd2, 0x219e57eb, 0x847e6636,
-    0x219847da, 0x847cbfe5,
-  0x219237b5, 0x847b19e1, 0x218c277a, 0x84797429, 0x2186172b, 0x8477cebd,
-    0x218006c8, 0x8476299e,
-  0x2179f64f, 0x847484ca, 0x2173e5c2, 0x8472e043, 0x216dd521, 0x84713c08,
-    0x2167c46b, 0x846f9819,
-  0x2161b3a0, 0x846df477, 0x215ba2c0, 0x846c5120, 0x215591cc, 0x846aae16,
-    0x214f80c4, 0x84690b58,
-  0x21496fa7, 0x846768e7, 0x21435e75, 0x8465c6c1, 0x213d4d2f, 0x846424e8,
-    0x21373bd4, 0x8462835b,
-  0x21312a65, 0x8460e21a, 0x212b18e1, 0x845f4126, 0x21250749, 0x845da07e,
-    0x211ef59d, 0x845c0022,
-  0x2118e3dc, 0x845a6012, 0x2112d206, 0x8458c04f, 0x210cc01d, 0x845720d8,
-    0x2106ae1e, 0x845581ad,
-  0x21009c0c, 0x8453e2cf, 0x20fa89e5, 0x8452443d, 0x20f477aa, 0x8450a5f7,
-    0x20ee655a, 0x844f07fd,
-  0x20e852f6, 0x844d6a50, 0x20e2407e, 0x844bccef, 0x20dc2df2, 0x844a2fda,
-    0x20d61b51, 0x84489311,
-  0x20d0089c, 0x8446f695, 0x20c9f5d3, 0x84455a66, 0x20c3e2f5, 0x8443be82,
-    0x20bdd003, 0x844222eb,
-  0x20b7bcfe, 0x844087a0, 0x20b1a9e4, 0x843eeca2, 0x20ab96b5, 0x843d51f0,
-    0x20a58373, 0x843bb78a,
-  0x209f701c, 0x843a1d70, 0x20995cb2, 0x843883a3, 0x20934933, 0x8436ea23,
-    0x208d35a0, 0x843550ee,
-  0x208721f9, 0x8433b806, 0x20810e3e, 0x84321f6b, 0x207afa6f, 0x8430871b,
-    0x2074e68c, 0x842eef18,
-  0x206ed295, 0x842d5762, 0x2068be8a, 0x842bbff8, 0x2062aa6b, 0x842a28da,
-    0x205c9638, 0x84289209,
-  0x205681f1, 0x8426fb84, 0x20506d96, 0x8425654b, 0x204a5927, 0x8423cf5f,
-    0x204444a4, 0x842239bf,
-  0x203e300d, 0x8420a46c, 0x20381b63, 0x841f0f65, 0x203206a4, 0x841d7aaa,
-    0x202bf1d2, 0x841be63c,
-  0x2025dcec, 0x841a521a, 0x201fc7f2, 0x8418be45, 0x2019b2e4, 0x84172abc,
-    0x20139dc2, 0x84159780,
-  0x200d888d, 0x84140490, 0x20077344, 0x841271ec, 0x20015de7, 0x8410df95,
-    0x1ffb4876, 0x840f4d8a,
-  0x1ff532f2, 0x840dbbcc, 0x1fef1d59, 0x840c2a5a, 0x1fe907ae, 0x840a9935,
-    0x1fe2f1ee, 0x8409085c,
-  0x1fdcdc1b, 0x840777d0, 0x1fd6c634, 0x8405e790, 0x1fd0b03a, 0x8404579d,
-    0x1fca9a2b, 0x8402c7f6,
-  0x1fc4840a, 0x8401389b, 0x1fbe6dd4, 0x83ffa98d, 0x1fb8578b, 0x83fe1acc,
-    0x1fb2412f, 0x83fc8c57,
-  0x1fac2abf, 0x83fafe2e, 0x1fa6143b, 0x83f97052, 0x1f9ffda4, 0x83f7e2c3,
-    0x1f99e6fa, 0x83f65580,
-  0x1f93d03c, 0x83f4c889, 0x1f8db96a, 0x83f33bdf, 0x1f87a285, 0x83f1af82,
-    0x1f818b8d, 0x83f02371,
-  0x1f7b7481, 0x83ee97ad, 0x1f755d61, 0x83ed0c35, 0x1f6f462f, 0x83eb810a,
-    0x1f692ee9, 0x83e9f62b,
-  0x1f63178f, 0x83e86b99, 0x1f5d0022, 0x83e6e153, 0x1f56e8a2, 0x83e5575a,
-    0x1f50d10e, 0x83e3cdad,
-  0x1f4ab968, 0x83e2444d, 0x1f44a1ad, 0x83e0bb3a, 0x1f3e89e0, 0x83df3273,
-    0x1f3871ff, 0x83dda9f9,
-  0x1f325a0b, 0x83dc21cb, 0x1f2c4204, 0x83da99ea, 0x1f2629ea, 0x83d91255,
-    0x1f2011bc, 0x83d78b0d,
-  0x1f19f97b, 0x83d60412, 0x1f13e127, 0x83d47d63, 0x1f0dc8c0, 0x83d2f701,
-    0x1f07b045, 0x83d170eb,
-  0x1f0197b8, 0x83cfeb22, 0x1efb7f17, 0x83ce65a6, 0x1ef56664, 0x83cce076,
-    0x1eef4d9d, 0x83cb5b93,
-  0x1ee934c3, 0x83c9d6fc, 0x1ee31bd6, 0x83c852b2, 0x1edd02d6, 0x83c6ceb5,
-    0x1ed6e9c3, 0x83c54b04,
-  0x1ed0d09d, 0x83c3c7a0, 0x1ecab763, 0x83c24488, 0x1ec49e17, 0x83c0c1be,
-    0x1ebe84b8, 0x83bf3f3f,
-  0x1eb86b46, 0x83bdbd0e, 0x1eb251c1, 0x83bc3b29, 0x1eac3829, 0x83bab991,
-    0x1ea61e7e, 0x83b93845,
-  0x1ea004c1, 0x83b7b746, 0x1e99eaf0, 0x83b63694, 0x1e93d10c, 0x83b4b62e,
-    0x1e8db716, 0x83b33616,
-  0x1e879d0d, 0x83b1b649, 0x1e8182f1, 0x83b036ca, 0x1e7b68c2, 0x83aeb797,
-    0x1e754e80, 0x83ad38b1,
-  0x1e6f342c, 0x83abba17, 0x1e6919c4, 0x83aa3bca, 0x1e62ff4a, 0x83a8bdca,
-    0x1e5ce4be, 0x83a74017,
-  0x1e56ca1e, 0x83a5c2b0, 0x1e50af6c, 0x83a44596, 0x1e4a94a7, 0x83a2c8c9,
-    0x1e4479cf, 0x83a14c48,
-  0x1e3e5ee5, 0x839fd014, 0x1e3843e8, 0x839e542d, 0x1e3228d9, 0x839cd893,
-    0x1e2c0db6, 0x839b5d45,
-  0x1e25f282, 0x8399e244, 0x1e1fd73a, 0x83986790, 0x1e19bbe0, 0x8396ed29,
-    0x1e13a074, 0x8395730e,
-  0x1e0d84f5, 0x8393f940, 0x1e076963, 0x83927fbf, 0x1e014dbf, 0x8391068a,
-    0x1dfb3208, 0x838f8da2,
-  0x1df5163f, 0x838e1507, 0x1deefa63, 0x838c9cb9, 0x1de8de75, 0x838b24b8,
-    0x1de2c275, 0x8389ad03,
-  0x1ddca662, 0x8388359b, 0x1dd68a3c, 0x8386be80, 0x1dd06e04, 0x838547b2,
-    0x1dca51ba, 0x8383d130,
-  0x1dc4355e, 0x83825afb, 0x1dbe18ef, 0x8380e513, 0x1db7fc6d, 0x837f6f78,
-    0x1db1dfda, 0x837dfa2a,
-  0x1dabc334, 0x837c8528, 0x1da5a67c, 0x837b1074, 0x1d9f89b1, 0x83799c0c,
-    0x1d996cd4, 0x837827f0,
-  0x1d934fe5, 0x8376b422, 0x1d8d32e4, 0x837540a1, 0x1d8715d0, 0x8373cd6c,
-    0x1d80f8ab, 0x83725a84,
-  0x1d7adb73, 0x8370e7e9, 0x1d74be29, 0x836f759b, 0x1d6ea0cc, 0x836e039a,
-    0x1d68835e, 0x836c91e5,
-  0x1d6265dd, 0x836b207d, 0x1d5c484b, 0x8369af63, 0x1d562aa6, 0x83683e95,
-    0x1d500cef, 0x8366ce14,
-  0x1d49ef26, 0x83655ddf, 0x1d43d14b, 0x8363edf8, 0x1d3db35e, 0x83627e5d,
-    0x1d37955e, 0x83610f10,
-  0x1d31774d, 0x835fa00f, 0x1d2b592a, 0x835e315b, 0x1d253af5, 0x835cc2f4,
-    0x1d1f1cae, 0x835b54da,
-  0x1d18fe54, 0x8359e70d, 0x1d12dfe9, 0x8358798c, 0x1d0cc16c, 0x83570c59,
-    0x1d06a2dd, 0x83559f72,
-  0x1d00843d, 0x835432d8, 0x1cfa658a, 0x8352c68c, 0x1cf446c5, 0x83515a8c,
-    0x1cee27ef, 0x834feed9,
-  0x1ce80906, 0x834e8373, 0x1ce1ea0c, 0x834d185a, 0x1cdbcb00, 0x834bad8e,
-    0x1cd5abe3, 0x834a430e,
-  0x1ccf8cb3, 0x8348d8dc, 0x1cc96d72, 0x83476ef6, 0x1cc34e1f, 0x8346055e,
-    0x1cbd2eba, 0x83449c12,
-  0x1cb70f43, 0x83433314, 0x1cb0efbb, 0x8341ca62, 0x1caad021, 0x834061fd,
-    0x1ca4b075, 0x833ef9e6,
-  0x1c9e90b8, 0x833d921b, 0x1c9870e9, 0x833c2a9d, 0x1c925109, 0x833ac36c,
-    0x1c8c3116, 0x83395c88,
-  0x1c861113, 0x8337f5f1, 0x1c7ff0fd, 0x83368fa7, 0x1c79d0d6, 0x833529aa,
-    0x1c73b09d, 0x8333c3fa,
-  0x1c6d9053, 0x83325e97, 0x1c676ff8, 0x8330f981, 0x1c614f8b, 0x832f94b8,
-    0x1c5b2f0c, 0x832e303c,
-  0x1c550e7c, 0x832ccc0d, 0x1c4eedda, 0x832b682b, 0x1c48cd27, 0x832a0496,
-    0x1c42ac62, 0x8328a14d,
-  0x1c3c8b8c, 0x83273e52, 0x1c366aa5, 0x8325dba4, 0x1c3049ac, 0x83247943,
-    0x1c2a28a2, 0x8323172f,
-  0x1c240786, 0x8321b568, 0x1c1de659, 0x832053ee, 0x1c17c51b, 0x831ef2c1,
-    0x1c11a3cb, 0x831d91e1,
-  0x1c0b826a, 0x831c314e, 0x1c0560f8, 0x831ad109, 0x1bff3f75, 0x83197110,
-    0x1bf91de0, 0x83181164,
-  0x1bf2fc3a, 0x8316b205, 0x1becda83, 0x831552f4, 0x1be6b8ba, 0x8313f42f,
-    0x1be096e0, 0x831295b7,
-  0x1bda74f6, 0x8311378d, 0x1bd452f9, 0x830fd9af, 0x1bce30ec, 0x830e7c1f,
-    0x1bc80ece, 0x830d1edc,
-  0x1bc1ec9e, 0x830bc1e6, 0x1bbbca5e, 0x830a653c, 0x1bb5a80c, 0x830908e0,
-    0x1baf85a9, 0x8307acd1,
-  0x1ba96335, 0x83065110, 0x1ba340b0, 0x8304f59b, 0x1b9d1e1a, 0x83039a73,
-    0x1b96fb73, 0x83023f98,
-  0x1b90d8bb, 0x8300e50b, 0x1b8ab5f2, 0x82ff8acb, 0x1b849317, 0x82fe30d7,
-    0x1b7e702c, 0x82fcd731,
-  0x1b784d30, 0x82fb7dd8, 0x1b722a23, 0x82fa24cc, 0x1b6c0705, 0x82f8cc0d,
-    0x1b65e3d7, 0x82f7739c,
-  0x1b5fc097, 0x82f61b77, 0x1b599d46, 0x82f4c3a0, 0x1b5379e5, 0x82f36c15,
-    0x1b4d5672, 0x82f214d8,
-  0x1b4732ef, 0x82f0bde8, 0x1b410f5b, 0x82ef6745, 0x1b3aebb6, 0x82ee10ef,
-    0x1b34c801, 0x82ecbae7,
-  0x1b2ea43a, 0x82eb652b, 0x1b288063, 0x82ea0fbd, 0x1b225c7b, 0x82e8ba9c,
-    0x1b1c3883, 0x82e765c8,
-  0x1b161479, 0x82e61141, 0x1b0ff05f, 0x82e4bd07, 0x1b09cc34, 0x82e3691b,
-    0x1b03a7f9, 0x82e2157c,
-  0x1afd83ad, 0x82e0c22a, 0x1af75f50, 0x82df6f25, 0x1af13ae3, 0x82de1c6d,
-    0x1aeb1665, 0x82dcca02,
-  0x1ae4f1d6, 0x82db77e5, 0x1adecd37, 0x82da2615, 0x1ad8a887, 0x82d8d492,
-    0x1ad283c7, 0x82d7835c,
-  0x1acc5ef6, 0x82d63274, 0x1ac63a14, 0x82d4e1d8, 0x1ac01522, 0x82d3918a,
-    0x1ab9f020, 0x82d24189,
-  0x1ab3cb0d, 0x82d0f1d5, 0x1aada5e9, 0x82cfa26f, 0x1aa780b6, 0x82ce5356,
-    0x1aa15b71, 0x82cd048a,
-  0x1a9b361d, 0x82cbb60b, 0x1a9510b7, 0x82ca67d9, 0x1a8eeb42, 0x82c919f5,
-    0x1a88c5bc, 0x82c7cc5e,
-  0x1a82a026, 0x82c67f14, 0x1a7c7a7f, 0x82c53217, 0x1a7654c8, 0x82c3e568,
-    0x1a702f01, 0x82c29906,
-  0x1a6a0929, 0x82c14cf1, 0x1a63e341, 0x82c00129, 0x1a5dbd49, 0x82beb5af,
-    0x1a579741, 0x82bd6a82,
-  0x1a517128, 0x82bc1fa2, 0x1a4b4aff, 0x82bad50f, 0x1a4524c6, 0x82b98aca,
-    0x1a3efe7c, 0x82b840d2,
-  0x1a38d823, 0x82b6f727, 0x1a32b1b9, 0x82b5adca, 0x1a2c8b3f, 0x82b464ba,
-    0x1a2664b5, 0x82b31bf7,
-  0x1a203e1b, 0x82b1d381, 0x1a1a1771, 0x82b08b59, 0x1a13f0b6, 0x82af437e,
-    0x1a0dc9ec, 0x82adfbf0,
-  0x1a07a311, 0x82acb4b0, 0x1a017c27, 0x82ab6dbd, 0x19fb552c, 0x82aa2717,
-    0x19f52e22, 0x82a8e0bf,
-  0x19ef0707, 0x82a79ab3, 0x19e8dfdc, 0x82a654f6, 0x19e2b8a2, 0x82a50f85,
-    0x19dc9157, 0x82a3ca62,
-  0x19d669fc, 0x82a2858c, 0x19d04292, 0x82a14104, 0x19ca1b17, 0x829ffcc8,
-    0x19c3f38d, 0x829eb8db,
-  0x19bdcbf3, 0x829d753a, 0x19b7a449, 0x829c31e7, 0x19b17c8f, 0x829aeee1,
-    0x19ab54c5, 0x8299ac29,
-  0x19a52ceb, 0x829869be, 0x199f0502, 0x829727a0, 0x1998dd09, 0x8295e5cf,
-    0x1992b4ff, 0x8294a44c,
-  0x198c8ce7, 0x82936317, 0x198664be, 0x8292222e, 0x19803c86, 0x8290e194,
-    0x197a143e, 0x828fa146,
-  0x1973ebe6, 0x828e6146, 0x196dc37e, 0x828d2193, 0x19679b07, 0x828be22e,
-    0x19617280, 0x828aa316,
-  0x195b49ea, 0x8289644b, 0x19552144, 0x828825ce, 0x194ef88e, 0x8286e79e,
-    0x1948cfc8, 0x8285a9bb,
-  0x1942a6f3, 0x82846c26, 0x193c7e0f, 0x82832edf, 0x1936551b, 0x8281f1e4,
-    0x19302c17, 0x8280b538,
-  0x192a0304, 0x827f78d8, 0x1923d9e1, 0x827e3cc6, 0x191db0af, 0x827d0102,
-    0x1917876d, 0x827bc58a,
-  0x19115e1c, 0x827a8a61, 0x190b34bb, 0x82794f84, 0x19050b4b, 0x827814f6,
-    0x18fee1cb, 0x8276dab4,
-  0x18f8b83c, 0x8275a0c0, 0x18f28e9e, 0x8274671a, 0x18ec64f0, 0x82732dc0,
-    0x18e63b33, 0x8271f4b5,
-  0x18e01167, 0x8270bbf7, 0x18d9e78b, 0x826f8386, 0x18d3bda0, 0x826e4b62,
-    0x18cd93a5, 0x826d138d,
-  0x18c7699b, 0x826bdc04, 0x18c13f82, 0x826aa4c9, 0x18bb155a, 0x82696ddc,
-    0x18b4eb22, 0x8268373c,
-  0x18aec0db, 0x826700e9, 0x18a89685, 0x8265cae4, 0x18a26c20, 0x8264952d,
-    0x189c41ab, 0x82635fc2,
-  0x18961728, 0x82622aa6, 0x188fec95, 0x8260f5d7, 0x1889c1f3, 0x825fc155,
-    0x18839742, 0x825e8d21,
-  0x187d6c82, 0x825d593a, 0x187741b2, 0x825c25a1, 0x187116d4, 0x825af255,
-    0x186aebe6, 0x8259bf57,
-  0x1864c0ea, 0x82588ca7, 0x185e95de, 0x82575a44, 0x18586ac3, 0x8256282e,
-    0x18523f9a, 0x8254f666,
-  0x184c1461, 0x8253c4eb, 0x1845e919, 0x825293be, 0x183fbdc3, 0x825162df,
-    0x1839925d, 0x8250324d,
-  0x183366e9, 0x824f0208, 0x182d3b65, 0x824dd211, 0x18270fd3, 0x824ca268,
-    0x1820e431, 0x824b730c,
-  0x181ab881, 0x824a43fe, 0x18148cc2, 0x8249153d, 0x180e60f4, 0x8247e6ca,
-    0x18083518, 0x8246b8a4,
-  0x1802092c, 0x82458acc, 0x17fbdd32, 0x82445d41, 0x17f5b129, 0x82433004,
-    0x17ef8511, 0x82420315,
-  0x17e958ea, 0x8240d673, 0x17e32cb5, 0x823faa1e, 0x17dd0070, 0x823e7e18,
-    0x17d6d41d, 0x823d525e,
-  0x17d0a7bc, 0x823c26f3, 0x17ca7b4c, 0x823afbd5, 0x17c44ecd, 0x8239d104,
-    0x17be223f, 0x8238a681,
-  0x17b7f5a3, 0x82377c4c, 0x17b1c8f8, 0x82365264, 0x17ab9c3e, 0x823528ca,
-    0x17a56f76, 0x8233ff7e,
-  0x179f429f, 0x8232d67f, 0x179915ba, 0x8231adce, 0x1792e8c6, 0x8230856a,
-    0x178cbbc4, 0x822f5d54,
-  0x17868eb3, 0x822e358b, 0x17806194, 0x822d0e10, 0x177a3466, 0x822be6e3,
-    0x17740729, 0x822ac004,
-  0x176dd9de, 0x82299971, 0x1767ac85, 0x8228732d, 0x17617f1d, 0x82274d36,
-    0x175b51a7, 0x8226278d,
-  0x17552422, 0x82250232, 0x174ef68f, 0x8223dd24, 0x1748c8ee, 0x8222b863,
-    0x17429b3e, 0x822193f1,
-  0x173c6d80, 0x82206fcc, 0x17363fb4, 0x821f4bf5, 0x173011d9, 0x821e286b,
-    0x1729e3f0, 0x821d052f,
-  0x1723b5f9, 0x821be240, 0x171d87f3, 0x821abfa0, 0x171759df, 0x82199d4d,
-    0x17112bbd, 0x82187b47,
-  0x170afd8d, 0x82175990, 0x1704cf4f, 0x82163826, 0x16fea102, 0x82151709,
-    0x16f872a7, 0x8213f63a,
-  0x16f2443e, 0x8212d5b9, 0x16ec15c7, 0x8211b586, 0x16e5e741, 0x821095a0,
-    0x16dfb8ae, 0x820f7608,
-  0x16d98a0c, 0x820e56be, 0x16d35b5c, 0x820d37c1, 0x16cd2c9f, 0x820c1912,
-    0x16c6fdd3, 0x820afab1,
-  0x16c0cef9, 0x8209dc9e, 0x16baa011, 0x8208bed8, 0x16b4711b, 0x8207a160,
-    0x16ae4217, 0x82068435,
-  0x16a81305, 0x82056758, 0x16a1e3e5, 0x82044ac9, 0x169bb4b7, 0x82032e88,
-    0x1695857b, 0x82021294,
-  0x168f5632, 0x8200f6ef, 0x168926da, 0x81ffdb96, 0x1682f774, 0x81fec08c,
-    0x167cc801, 0x81fda5cf,
-  0x1676987f, 0x81fc8b60, 0x167068f0, 0x81fb713f, 0x166a3953, 0x81fa576c,
-    0x166409a8, 0x81f93de6,
-  0x165dd9f0, 0x81f824ae, 0x1657aa29, 0x81f70bc3, 0x16517a55, 0x81f5f327,
-    0x164b4a73, 0x81f4dad8,
-  0x16451a83, 0x81f3c2d7, 0x163eea86, 0x81f2ab24, 0x1638ba7a, 0x81f193be,
-    0x16328a61, 0x81f07ca6,
-  0x162c5a3b, 0x81ef65dc, 0x16262a06, 0x81ee4f60, 0x161ff9c4, 0x81ed3932,
-    0x1619c975, 0x81ec2351,
-  0x16139918, 0x81eb0dbe, 0x160d68ad, 0x81e9f879, 0x16073834, 0x81e8e381,
-    0x160107ae, 0x81e7ced8,
-  0x15fad71b, 0x81e6ba7c, 0x15f4a679, 0x81e5a66e, 0x15ee75cb, 0x81e492ad,
-    0x15e8450e, 0x81e37f3b,
-  0x15e21445, 0x81e26c16, 0x15dbe36d, 0x81e1593f, 0x15d5b288, 0x81e046b6,
-    0x15cf8196, 0x81df347b,
-  0x15c95097, 0x81de228d, 0x15c31f89, 0x81dd10ee, 0x15bcee6f, 0x81dbff9c,
-    0x15b6bd47, 0x81daee98,
-  0x15b08c12, 0x81d9dde1, 0x15aa5acf, 0x81d8cd79, 0x15a4297f, 0x81d7bd5e,
-    0x159df821, 0x81d6ad92,
-  0x1597c6b7, 0x81d59e13, 0x1591953e, 0x81d48ee1, 0x158b63b9, 0x81d37ffe,
-    0x15853226, 0x81d27169,
-  0x157f0086, 0x81d16321, 0x1578ced9, 0x81d05527, 0x15729d1f, 0x81cf477b,
-    0x156c6b57, 0x81ce3a1d,
-  0x15663982, 0x81cd2d0c, 0x156007a0, 0x81cc204a, 0x1559d5b1, 0x81cb13d5,
-    0x1553a3b4, 0x81ca07af,
-  0x154d71aa, 0x81c8fbd6, 0x15473f94, 0x81c7f04b, 0x15410d70, 0x81c6e50d,
-    0x153adb3f, 0x81c5da1e,
-  0x1534a901, 0x81c4cf7d, 0x152e76b5, 0x81c3c529, 0x1528445d, 0x81c2bb23,
-    0x152211f8, 0x81c1b16b,
-  0x151bdf86, 0x81c0a801, 0x1515ad06, 0x81bf9ee5, 0x150f7a7a, 0x81be9617,
-    0x150947e1, 0x81bd8d97,
-  0x1503153a, 0x81bc8564, 0x14fce287, 0x81bb7d7f, 0x14f6afc7, 0x81ba75e9,
-    0x14f07cf9, 0x81b96ea0,
-  0x14ea4a1f, 0x81b867a5, 0x14e41738, 0x81b760f8, 0x14dde445, 0x81b65a99,
-    0x14d7b144, 0x81b55488,
-  0x14d17e36, 0x81b44ec4, 0x14cb4b1c, 0x81b3494f, 0x14c517f4, 0x81b24427,
-    0x14bee4c0, 0x81b13f4e,
-  0x14b8b17f, 0x81b03ac2, 0x14b27e32, 0x81af3684, 0x14ac4ad7, 0x81ae3294,
-    0x14a61770, 0x81ad2ef2,
-  0x149fe3fc, 0x81ac2b9e, 0x1499b07c, 0x81ab2898, 0x14937cee, 0x81aa25e0,
-    0x148d4954, 0x81a92376,
-  0x148715ae, 0x81a82159, 0x1480e1fa, 0x81a71f8b, 0x147aae3a, 0x81a61e0b,
-    0x14747a6d, 0x81a51cd8,
-  0x146e4694, 0x81a41bf4, 0x146812ae, 0x81a31b5d, 0x1461debc, 0x81a21b14,
-    0x145baabd, 0x81a11b1a,
-  0x145576b1, 0x81a01b6d, 0x144f4299, 0x819f1c0e, 0x14490e74, 0x819e1cfd,
-    0x1442da43, 0x819d1e3a,
-  0x143ca605, 0x819c1fc5, 0x143671bb, 0x819b219e, 0x14303d65, 0x819a23c5,
-    0x142a0902, 0x8199263a,
-  0x1423d492, 0x819828fd, 0x141da016, 0x81972c0e, 0x14176b8e, 0x81962f6d,
-    0x141136f9, 0x8195331a,
-  0x140b0258, 0x81943715, 0x1404cdaa, 0x81933b5e, 0x13fe98f1, 0x81923ff4,
-    0x13f8642a, 0x819144d9,
-  0x13f22f58, 0x81904a0c, 0x13ebfa79, 0x818f4f8d, 0x13e5c58e, 0x818e555c,
-    0x13df9097, 0x818d5b78,
-  0x13d95b93, 0x818c61e3, 0x13d32683, 0x818b689c, 0x13ccf167, 0x818a6fa3,
-    0x13c6bc3f, 0x818976f8,
-  0x13c0870a, 0x81887e9a, 0x13ba51ca, 0x8187868b, 0x13b41c7d, 0x81868eca,
-    0x13ade724, 0x81859757,
-  0x13a7b1bf, 0x8184a032, 0x13a17c4d, 0x8183a95b, 0x139b46d0, 0x8182b2d1,
-    0x13951146, 0x8181bc96,
-  0x138edbb1, 0x8180c6a9, 0x1388a60f, 0x817fd10a, 0x13827062, 0x817edbb9,
-    0x137c3aa8, 0x817de6b6,
-  0x137604e2, 0x817cf201, 0x136fcf10, 0x817bfd9b, 0x13699933, 0x817b0982,
-    0x13636349, 0x817a15b7,
-  0x135d2d53, 0x8179223a, 0x1356f752, 0x81782f0b, 0x1350c144, 0x81773c2b,
-    0x134a8b2b, 0x81764998,
-  0x13445505, 0x81755754, 0x133e1ed4, 0x8174655d, 0x1337e897, 0x817373b5,
-    0x1331b24e, 0x8172825a,
-  0x132b7bf9, 0x8171914e, 0x13254599, 0x8170a090, 0x131f0f2c, 0x816fb020,
-    0x1318d8b4, 0x816ebffe,
-  0x1312a230, 0x816dd02a, 0x130c6ba0, 0x816ce0a4, 0x13063505, 0x816bf16c,
-    0x12fffe5d, 0x816b0282,
-  0x12f9c7aa, 0x816a13e6, 0x12f390ec, 0x81692599, 0x12ed5a21, 0x81683799,
-    0x12e7234b, 0x816749e8,
-  0x12e0ec6a, 0x81665c84, 0x12dab57c, 0x81656f6f, 0x12d47e83, 0x816482a8,
-    0x12ce477f, 0x8163962f,
-  0x12c8106f, 0x8162aa04, 0x12c1d953, 0x8161be27, 0x12bba22b, 0x8160d298,
-    0x12b56af9, 0x815fe758,
-  0x12af33ba, 0x815efc65, 0x12a8fc70, 0x815e11c1, 0x12a2c51b, 0x815d276a,
-    0x129c8dba, 0x815c3d62,
-  0x1296564d, 0x815b53a8, 0x12901ed5, 0x815a6a3c, 0x1289e752, 0x8159811e,
-    0x1283afc3, 0x8158984e,
-  0x127d7829, 0x8157afcd, 0x12774083, 0x8156c799, 0x127108d2, 0x8155dfb4,
-    0x126ad116, 0x8154f81d,
-  0x1264994e, 0x815410d4, 0x125e617b, 0x815329d9, 0x1258299c, 0x8152432c,
-    0x1251f1b3, 0x81515ccd,
-  0x124bb9be, 0x815076bd, 0x124581bd, 0x814f90fb, 0x123f49b2, 0x814eab86,
-    0x1239119b, 0x814dc660,
-  0x1232d979, 0x814ce188, 0x122ca14b, 0x814bfcff, 0x12266913, 0x814b18c3,
-    0x122030cf, 0x814a34d6,
-  0x1219f880, 0x81495136, 0x1213c026, 0x81486de5, 0x120d87c1, 0x81478ae2,
-    0x12074f50, 0x8146a82e,
-  0x120116d5, 0x8145c5c7, 0x11fade4e, 0x8144e3ae, 0x11f4a5bd, 0x814401e4,
-    0x11ee6d20, 0x81432068,
-  0x11e83478, 0x81423f3a, 0x11e1fbc5, 0x81415e5a, 0x11dbc307, 0x81407dc9,
-    0x11d58a3e, 0x813f9d86,
-  0x11cf516a, 0x813ebd90, 0x11c9188b, 0x813ddde9, 0x11c2dfa2, 0x813cfe91,
-    0x11bca6ad, 0x813c1f86,
-  0x11b66dad, 0x813b40ca, 0x11b034a2, 0x813a625b, 0x11a9fb8d, 0x8139843b,
-    0x11a3c26c, 0x8138a66a,
-  0x119d8941, 0x8137c8e6, 0x1197500a, 0x8136ebb1, 0x119116c9, 0x81360ec9,
-    0x118add7d, 0x81353230,
-  0x1184a427, 0x813455e6, 0x117e6ac5, 0x813379e9, 0x11783159, 0x81329e3b,
-    0x1171f7e2, 0x8131c2db,
-  0x116bbe60, 0x8130e7c9, 0x116584d3, 0x81300d05, 0x115f4b3c, 0x812f3290,
-    0x1159119a, 0x812e5868,
-  0x1152d7ed, 0x812d7e8f, 0x114c9e35, 0x812ca505, 0x11466473, 0x812bcbc8,
-    0x11402aa6, 0x812af2da,
-  0x1139f0cf, 0x812a1a3a, 0x1133b6ed, 0x812941e8, 0x112d7d00, 0x812869e4,
-    0x11274309, 0x8127922f,
-  0x11210907, 0x8126bac8, 0x111acefb, 0x8125e3af, 0x111494e4, 0x81250ce4,
-    0x110e5ac2, 0x81243668,
-  0x11082096, 0x8123603a, 0x1101e65f, 0x81228a5a, 0x10fbac1e, 0x8121b4c8,
-    0x10f571d3, 0x8120df85,
-  0x10ef377d, 0x81200a90, 0x10e8fd1c, 0x811f35e9, 0x10e2c2b2, 0x811e6191,
-    0x10dc883c, 0x811d8d86,
-  0x10d64dbd, 0x811cb9ca, 0x10d01333, 0x811be65d, 0x10c9d89e, 0x811b133d,
-    0x10c39dff, 0x811a406c,
-  0x10bd6356, 0x81196de9, 0x10b728a3, 0x81189bb4, 0x10b0ede5, 0x8117c9ce,
-    0x10aab31d, 0x8116f836,
-  0x10a4784b, 0x811626ec, 0x109e3d6e, 0x811555f1, 0x10980287, 0x81148544,
-    0x1091c796, 0x8113b4e5,
-  0x108b8c9b, 0x8112e4d4, 0x10855195, 0x81121512, 0x107f1686, 0x8111459e,
-    0x1078db6c, 0x81107678,
-  0x1072a048, 0x810fa7a0, 0x106c651a, 0x810ed917, 0x106629e1, 0x810e0adc,
-    0x105fee9f, 0x810d3cf0,
-  0x1059b352, 0x810c6f52, 0x105377fc, 0x810ba202, 0x104d3c9b, 0x810ad500,
-    0x10470130, 0x810a084d,
-  0x1040c5bb, 0x81093be8, 0x103a8a3d, 0x81086fd1, 0x10344eb4, 0x8107a409,
-    0x102e1321, 0x8106d88f,
-  0x1027d784, 0x81060d63, 0x10219bdd, 0x81054286, 0x101b602d, 0x810477f7,
-    0x10152472, 0x8103adb6,
-  0x100ee8ad, 0x8102e3c4, 0x1008acdf, 0x81021a20, 0x10027107, 0x810150ca,
-    0xffc3524, 0x810087c3,
-  0xff5f938, 0x80ffbf0a, 0xfefbd42, 0x80fef69f, 0xfe98143, 0x80fe2e83,
-    0xfe34539, 0x80fd66b5,
-  0xfdd0926, 0x80fc9f35, 0xfd6cd08, 0x80fbd804, 0xfd090e1, 0x80fb1121,
-    0xfca54b1, 0x80fa4a8c,
-  0xfc41876, 0x80f98446, 0xfbddc32, 0x80f8be4e, 0xfb79fe4, 0x80f7f8a4,
-    0xfb1638d, 0x80f73349,
-  0xfab272b, 0x80f66e3c, 0xfa4eac0, 0x80f5a97e, 0xf9eae4c, 0x80f4e50e,
-    0xf9871ce, 0x80f420ec,
-  0xf923546, 0x80f35d19, 0xf8bf8b4, 0x80f29994, 0xf85bc19, 0x80f1d65d,
-    0xf7f7f75, 0x80f11375,
-  0xf7942c7, 0x80f050db, 0xf73060f, 0x80ef8e90, 0xf6cc94e, 0x80eecc93,
-    0xf668c83, 0x80ee0ae4,
-  0xf604faf, 0x80ed4984, 0xf5a12d1, 0x80ec8872, 0xf53d5ea, 0x80ebc7ae,
-    0xf4d98f9, 0x80eb0739,
-  0xf475bff, 0x80ea4712, 0xf411efb, 0x80e9873a, 0xf3ae1ee, 0x80e8c7b0,
-    0xf34a4d8, 0x80e80874,
-  0xf2e67b8, 0x80e74987, 0xf282a8f, 0x80e68ae8, 0xf21ed5d, 0x80e5cc98,
-    0xf1bb021, 0x80e50e96,
-  0xf1572dc, 0x80e450e2, 0xf0f358e, 0x80e3937d, 0xf08f836, 0x80e2d666,
-    0xf02bad5, 0x80e2199e,
-  0xefc7d6b, 0x80e15d24, 0xef63ff7, 0x80e0a0f8, 0xef0027b, 0x80dfe51b,
-    0xee9c4f5, 0x80df298c,
-  0xee38766, 0x80de6e4c, 0xedd49ce, 0x80ddb35a, 0xed70c2c, 0x80dcf8b7,
-    0xed0ce82, 0x80dc3e62,
-  0xeca90ce, 0x80db845b, 0xec45311, 0x80dacaa3, 0xebe154b, 0x80da1139,
-    0xeb7d77c, 0x80d9581e,
-  0xeb199a4, 0x80d89f51, 0xeab5bc3, 0x80d7e6d3, 0xea51dd8, 0x80d72ea3,
-    0xe9edfe5, 0x80d676c1,
-  0xe98a1e9, 0x80d5bf2e, 0xe9263e3, 0x80d507e9, 0xe8c25d5, 0x80d450f3,
-    0xe85e7be, 0x80d39a4b,
-  0xe7fa99e, 0x80d2e3f2, 0xe796b74, 0x80d22de7, 0xe732d42, 0x80d1782a,
-    0xe6cef07, 0x80d0c2bc,
-  0xe66b0c3, 0x80d00d9d, 0xe607277, 0x80cf58cc, 0xe5a3421, 0x80cea449,
-    0xe53f5c2, 0x80cdf015,
-  0xe4db75b, 0x80cd3c2f, 0xe4778eb, 0x80cc8898, 0xe413a72, 0x80cbd54f,
-    0xe3afbf0, 0x80cb2255,
-  0xe34bd66, 0x80ca6fa9, 0xe2e7ed2, 0x80c9bd4c, 0xe284036, 0x80c90b3d,
-    0xe220191, 0x80c8597c,
-  0xe1bc2e4, 0x80c7a80a, 0xe15842e, 0x80c6f6e7, 0xe0f456f, 0x80c64612,
-    0xe0906a7, 0x80c5958b,
-  0xe02c7d7, 0x80c4e553, 0xdfc88fe, 0x80c4356a, 0xdf64a1c, 0x80c385cf,
-    0xdf00b32, 0x80c2d682,
-  0xde9cc40, 0x80c22784, 0xde38d44, 0x80c178d4, 0xddd4e40, 0x80c0ca73,
-    0xdd70f34, 0x80c01c60,
-  0xdd0d01f, 0x80bf6e9c, 0xdca9102, 0x80bec127, 0xdc451dc, 0x80be13ff,
-    0xdbe12ad, 0x80bd6727,
-  0xdb7d376, 0x80bcba9d, 0xdb19437, 0x80bc0e61, 0xdab54ef, 0x80bb6274,
-    0xda5159f, 0x80bab6d5,
-  0xd9ed646, 0x80ba0b85, 0xd9896e5, 0x80b96083, 0xd92577b, 0x80b8b5d0,
-    0xd8c1809, 0x80b80b6c,
-  0xd85d88f, 0x80b76156, 0xd7f990c, 0x80b6b78e, 0xd795982, 0x80b60e15,
-    0xd7319ee, 0x80b564ea,
-  0xd6cda53, 0x80b4bc0e, 0xd669aaf, 0x80b41381, 0xd605b03, 0x80b36b42,
-    0xd5a1b4f, 0x80b2c351,
-  0xd53db92, 0x80b21baf, 0xd4d9bcd, 0x80b1745c, 0xd475c00, 0x80b0cd57,
-    0xd411c2b, 0x80b026a1,
-  0xd3adc4e, 0x80af8039, 0xd349c68, 0x80aeda20, 0xd2e5c7b, 0x80ae3455,
-    0xd281c85, 0x80ad8ed9,
-  0xd21dc87, 0x80ace9ab, 0xd1b9c81, 0x80ac44cc, 0xd155c73, 0x80aba03b,
-    0xd0f1c5d, 0x80aafbf9,
-  0xd08dc3f, 0x80aa5806, 0xd029c18, 0x80a9b461, 0xcfc5bea, 0x80a9110b,
-    0xcf61bb4, 0x80a86e03,
-  0xcefdb76, 0x80a7cb49, 0xce99b2f, 0x80a728df, 0xce35ae1, 0x80a686c2,
-    0xcdd1a8b, 0x80a5e4f5,
-  0xcd6da2d, 0x80a54376, 0xcd099c7, 0x80a4a245, 0xcca5959, 0x80a40163,
-    0xcc418e3, 0x80a360d0,
-  0xcbdd865, 0x80a2c08b, 0xcb797e0, 0x80a22095, 0xcb15752, 0x80a180ed,
-    0xcab16bd, 0x80a0e194,
-  0xca4d620, 0x80a04289, 0xc9e957b, 0x809fa3cd, 0xc9854cf, 0x809f0560,
-    0xc92141a, 0x809e6741,
-  0xc8bd35e, 0x809dc971, 0xc85929a, 0x809d2bef, 0xc7f51cf, 0x809c8ebc,
-    0xc7910fb, 0x809bf1d7,
-  0xc72d020, 0x809b5541, 0xc6c8f3e, 0x809ab8fa, 0xc664e53, 0x809a1d01,
-    0xc600d61, 0x80998157,
-  0xc59cc68, 0x8098e5fb, 0xc538b66, 0x80984aee, 0xc4d4a5d, 0x8097b030,
-    0xc47094d, 0x809715c0,
-  0xc40c835, 0x80967b9f, 0xc3a8715, 0x8095e1cc, 0xc3445ee, 0x80954848,
-    0xc2e04c0, 0x8094af13,
-  0xc27c389, 0x8094162c, 0xc21824c, 0x80937d93, 0xc1b4107, 0x8092e54a,
-    0xc14ffba, 0x80924d4f,
-  0xc0ebe66, 0x8091b5a2, 0xc087d0a, 0x80911e44, 0xc023ba7, 0x80908735,
-    0xbfbfa3d, 0x808ff074,
-  0xbf5b8cb, 0x808f5a02, 0xbef7752, 0x808ec3df, 0xbe935d2, 0x808e2e0a,
-    0xbe2f44a, 0x808d9884,
-  0xbdcb2bb, 0x808d034c, 0xbd67124, 0x808c6e63, 0xbd02f87, 0x808bd9c9,
-    0xbc9ede2, 0x808b457d,
-  0xbc3ac35, 0x808ab180, 0xbbd6a82, 0x808a1dd2, 0xbb728c7, 0x80898a72,
-    0xbb0e705, 0x8088f761,
-  0xbaaa53b, 0x8088649e, 0xba4636b, 0x8087d22a, 0xb9e2193, 0x80874005,
-    0xb97dfb5, 0x8086ae2e,
-  0xb919dcf, 0x80861ca6, 0xb8b5be1, 0x80858b6c, 0xb8519ed, 0x8084fa82,
-    0xb7ed7f2, 0x808469e5,
-  0xb7895f0, 0x8083d998, 0xb7253e6, 0x80834999, 0xb6c11d5, 0x8082b9e9,
-    0xb65cfbe, 0x80822a87,
-  0xb5f8d9f, 0x80819b74, 0xb594b7a, 0x80810cb0, 0xb53094d, 0x80807e3a,
-    0xb4cc719, 0x807ff013,
-  0xb4684df, 0x807f623b, 0xb40429d, 0x807ed4b1, 0xb3a0055, 0x807e4776,
-    0xb33be05, 0x807dba89,
-  0xb2d7baf, 0x807d2dec, 0xb273952, 0x807ca19c, 0xb20f6ee, 0x807c159c,
-    0xb1ab483, 0x807b89ea,
-  0xb147211, 0x807afe87, 0xb0e2f98, 0x807a7373, 0xb07ed19, 0x8079e8ad,
-    0xb01aa92, 0x80795e36,
-  0xafb6805, 0x8078d40d, 0xaf52571, 0x80784a33, 0xaeee2d7, 0x8077c0a8,
-    0xae8a036, 0x8077376c,
-  0xae25d8d, 0x8076ae7e, 0xadc1adf, 0x807625df, 0xad5d829, 0x80759d8e,
-    0xacf956d, 0x8075158c,
-  0xac952aa, 0x80748dd9, 0xac30fe1, 0x80740675, 0xabccd11, 0x80737f5f,
-    0xab68a3a, 0x8072f898,
-  0xab0475c, 0x8072721f, 0xaaa0478, 0x8071ebf6, 0xaa3c18e, 0x8071661a,
-    0xa9d7e9d, 0x8070e08e,
-  0xa973ba5, 0x80705b50, 0xa90f8a7, 0x806fd661, 0xa8ab5a2, 0x806f51c1,
-    0xa847297, 0x806ecd6f,
-  0xa7e2f85, 0x806e496c, 0xa77ec6d, 0x806dc5b8, 0xa71a94f, 0x806d4253,
-    0xa6b662a, 0x806cbf3c,
-  0xa6522fe, 0x806c3c74, 0xa5edfcc, 0x806bb9fa, 0xa589c94, 0x806b37cf,
-    0xa525955, 0x806ab5f3,
-  0xa4c1610, 0x806a3466, 0xa45d2c5, 0x8069b327, 0xa3f8f73, 0x80693237,
-    0xa394c1b, 0x8068b196,
-  0xa3308bd, 0x80683143, 0xa2cc558, 0x8067b13f, 0xa2681ed, 0x8067318a,
-    0xa203e7c, 0x8066b224,
-  0xa19fb04, 0x8066330c, 0xa13b787, 0x8065b443, 0xa0d7403, 0x806535c9,
-    0xa073079, 0x8064b79d,
-  0xa00ece8, 0x806439c0, 0x9faa952, 0x8063bc32, 0x9f465b5, 0x80633ef3,
-    0x9ee2213, 0x8062c202,
-  0x9e7de6a, 0x80624560, 0x9e19abb, 0x8061c90c, 0x9db5706, 0x80614d08,
-    0x9d5134b, 0x8060d152,
-  0x9cecf89, 0x806055eb, 0x9c88bc2, 0x805fdad2, 0x9c247f5, 0x805f6009,
-    0x9bc0421, 0x805ee58e,
-  0x9b5c048, 0x805e6b62, 0x9af7c69, 0x805df184, 0x9a93884, 0x805d77f5,
-    0x9a2f498, 0x805cfeb5,
-  0x99cb0a7, 0x805c85c4, 0x9966cb0, 0x805c0d21, 0x99028b3, 0x805b94ce,
-    0x989e4b0, 0x805b1cc8,
-  0x983a0a7, 0x805aa512, 0x97d5c99, 0x805a2daa, 0x9771884, 0x8059b692,
-    0x970d46a, 0x80593fc7,
-  0x96a9049, 0x8058c94c, 0x9644c23, 0x8058531f, 0x95e07f8, 0x8057dd41,
-    0x957c3c6, 0x805767b2,
-  0x9517f8f, 0x8056f272, 0x94b3b52, 0x80567d80, 0x944f70f, 0x805608dd,
-    0x93eb2c6, 0x80559489,
-  0x9386e78, 0x80552084, 0x9322a24, 0x8054accd, 0x92be5ca, 0x80543965,
-    0x925a16b, 0x8053c64c,
-  0x91f5d06, 0x80535381, 0x919189c, 0x8052e106, 0x912d42c, 0x80526ed9,
-    0x90c8fb6, 0x8051fcfb,
-  0x9064b3a, 0x80518b6b, 0x90006ba, 0x80511a2b, 0x8f9c233, 0x8050a939,
-    0x8f37da7, 0x80503896,
-  0x8ed3916, 0x804fc841, 0x8e6f47f, 0x804f583c, 0x8e0afe2, 0x804ee885,
-    0x8da6b40, 0x804e791d,
-  0x8d42699, 0x804e0a04, 0x8cde1ec, 0x804d9b39, 0x8c79d3a, 0x804d2cbd,
-    0x8c15882, 0x804cbe90,
-  0x8bb13c5, 0x804c50b2, 0x8b4cf02, 0x804be323, 0x8ae8a3a, 0x804b75e2,
-    0x8a8456d, 0x804b08f0,
-  0x8a2009a, 0x804a9c4d, 0x89bbbc3, 0x804a2ff9, 0x89576e5, 0x8049c3f3,
-    0x88f3203, 0x8049583d,
-  0x888ed1b, 0x8048ecd5, 0x882a82e, 0x804881bb, 0x87c633c, 0x804816f1,
-    0x8761e44, 0x8047ac75,
-  0x86fd947, 0x80474248, 0x8699445, 0x8046d86a, 0x8634f3e, 0x80466edb,
-    0x85d0a32, 0x8046059b,
-  0x856c520, 0x80459ca9, 0x850800a, 0x80453406, 0x84a3aee, 0x8044cbb2,
-    0x843f5cd, 0x804463ad,
-  0x83db0a7, 0x8043fbf6, 0x8376b7c, 0x8043948e, 0x831264c, 0x80432d75,
-    0x82ae117, 0x8042c6ab,
-  0x8249bdd, 0x80426030, 0x81e569d, 0x8041fa03, 0x8181159, 0x80419425,
-    0x811cc10, 0x80412e96,
-  0x80b86c2, 0x8040c956, 0x805416e, 0x80406465, 0x7fefc16, 0x803fffc2,
-    0x7f8b6b9, 0x803f9b6f,
-  0x7f27157, 0x803f376a, 0x7ec2bf0, 0x803ed3b3, 0x7e5e685, 0x803e704c,
-    0x7dfa114, 0x803e0d34,
-  0x7d95b9e, 0x803daa6a, 0x7d31624, 0x803d47ef, 0x7ccd0a5, 0x803ce5c3,
-    0x7c68b21, 0x803c83e5,
-  0x7c04598, 0x803c2257, 0x7ba000b, 0x803bc117, 0x7b3ba78, 0x803b6026,
-    0x7ad74e1, 0x803aff84,
-  0x7a72f45, 0x803a9f31, 0x7a0e9a5, 0x803a3f2d, 0x79aa400, 0x8039df77,
-    0x7945e56, 0x80398010,
-  0x78e18a7, 0x803920f8, 0x787d2f4, 0x8038c22f, 0x7818d3c, 0x803863b5,
-    0x77b4780, 0x80380589,
-  0x77501be, 0x8037a7ac, 0x76ebbf9, 0x80374a1f, 0x768762e, 0x8036ece0,
-    0x762305f, 0x80368fef,
-  0x75bea8c, 0x8036334e, 0x755a4b4, 0x8035d6fb, 0x74f5ed7, 0x80357af8,
-    0x74918f6, 0x80351f43,
-  0x742d311, 0x8034c3dd, 0x73c8d27, 0x803468c5, 0x7364738, 0x80340dfd,
-    0x7300145, 0x8033b383,
-  0x729bb4e, 0x80335959, 0x7237552, 0x8032ff7d, 0x71d2f52, 0x8032a5ef,
-    0x716e94e, 0x80324cb1,
-  0x710a345, 0x8031f3c2, 0x70a5d37, 0x80319b21, 0x7041726, 0x803142cf,
-    0x6fdd110, 0x8030eacd,
-  0x6f78af6, 0x80309318, 0x6f144d7, 0x80303bb3, 0x6eafeb4, 0x802fe49d,
-    0x6e4b88d, 0x802f8dd5,
-  0x6de7262, 0x802f375d, 0x6d82c32, 0x802ee133, 0x6d1e5fe, 0x802e8b58,
-    0x6cb9fc6, 0x802e35cb,
-  0x6c5598a, 0x802de08e, 0x6bf1349, 0x802d8ba0, 0x6b8cd05, 0x802d3700,
-    0x6b286bc, 0x802ce2af,
-  0x6ac406f, 0x802c8ead, 0x6a5fa1e, 0x802c3afa, 0x69fb3c9, 0x802be796,
-    0x6996d70, 0x802b9480,
-  0x6932713, 0x802b41ba, 0x68ce0b2, 0x802aef42, 0x6869a4c, 0x802a9d19,
-    0x68053e3, 0x802a4b3f,
-  0x67a0d76, 0x8029f9b4, 0x673c704, 0x8029a878, 0x66d808f, 0x8029578b,
-    0x6673a16, 0x802906ec,
-  0x660f398, 0x8028b69c, 0x65aad17, 0x8028669b, 0x6546692, 0x802816e9,
-    0x64e2009, 0x8027c786,
-  0x647d97c, 0x80277872, 0x64192eb, 0x802729ad, 0x63b4c57, 0x8026db36,
-    0x63505be, 0x80268d0e,
-  0x62ebf22, 0x80263f36, 0x6287882, 0x8025f1ac, 0x62231de, 0x8025a471,
-    0x61beb36, 0x80255784,
-  0x615a48b, 0x80250ae7, 0x60f5ddc, 0x8024be99, 0x6091729, 0x80247299,
-    0x602d072, 0x802426e8,
-  0x5fc89b8, 0x8023db86, 0x5f642fa, 0x80239073, 0x5effc38, 0x802345af,
-    0x5e9b572, 0x8022fb3a,
-  0x5e36ea9, 0x8022b114, 0x5dd27dd, 0x8022673c, 0x5d6e10c, 0x80221db3,
-    0x5d09a38, 0x8021d47a,
-  0x5ca5361, 0x80218b8f, 0x5c40c86, 0x802142f3, 0x5bdc5a7, 0x8020faa6,
-    0x5b77ec5, 0x8020b2a7,
-  0x5b137df, 0x80206af8, 0x5aaf0f6, 0x80202397, 0x5a4aa09, 0x801fdc86,
-    0x59e6319, 0x801f95c3,
-  0x5981c26, 0x801f4f4f, 0x591d52f, 0x801f092a, 0x58b8e34, 0x801ec354,
-    0x5854736, 0x801e7dcd,
-  0x57f0035, 0x801e3895, 0x578b930, 0x801df3ab, 0x5727228, 0x801daf11,
-    0x56c2b1c, 0x801d6ac5,
-  0x565e40d, 0x801d26c8, 0x55f9cfb, 0x801ce31a, 0x55955e6, 0x801c9fbb,
-    0x5530ecd, 0x801c5cab,
-  0x54cc7b1, 0x801c19ea, 0x5468092, 0x801bd777, 0x540396f, 0x801b9554,
-    0x539f249, 0x801b537f,
-  0x533ab20, 0x801b11fa, 0x52d63f4, 0x801ad0c3, 0x5271cc4, 0x801a8fdb,
-    0x520d592, 0x801a4f42,
-  0x51a8e5c, 0x801a0ef8, 0x5144723, 0x8019cefd, 0x50dffe7, 0x80198f50,
-    0x507b8a8, 0x80194ff3,
-  0x5017165, 0x801910e4, 0x4fb2a20, 0x8018d225, 0x4f4e2d8, 0x801893b4,
-    0x4ee9b8c, 0x80185592,
-  0x4e8543e, 0x801817bf, 0x4e20cec, 0x8017da3b, 0x4dbc597, 0x80179d06,
-    0x4d57e40, 0x80176020,
-  0x4cf36e5, 0x80172388, 0x4c8ef88, 0x8016e740, 0x4c2a827, 0x8016ab46,
-    0x4bc60c4, 0x80166f9c,
-  0x4b6195d, 0x80163440, 0x4afd1f4, 0x8015f933, 0x4a98a88, 0x8015be75,
-    0x4a34319, 0x80158406,
-  0x49cfba7, 0x801549e6, 0x496b432, 0x80151015, 0x4906cbb, 0x8014d693,
-    0x48a2540, 0x80149d5f,
-  0x483ddc3, 0x8014647b, 0x47d9643, 0x80142be5, 0x4774ec1, 0x8013f39e,
-    0x471073b, 0x8013bba7,
-  0x46abfb3, 0x801383fe, 0x4647828, 0x80134ca4, 0x45e309a, 0x80131599,
-    0x457e90a, 0x8012dedd,
-  0x451a177, 0x8012a86f, 0x44b59e1, 0x80127251, 0x4451249, 0x80123c82,
-    0x43ecaae, 0x80120701,
-  0x4388310, 0x8011d1d0, 0x4323b70, 0x80119ced, 0x42bf3cd, 0x80116859,
-    0x425ac28, 0x80113414,
-  0x41f6480, 0x8011001f, 0x4191cd5, 0x8010cc78, 0x412d528, 0x8010991f,
-    0x40c8d79, 0x80106616,
-  0x40645c7, 0x8010335c, 0x3fffe12, 0x801000f1, 0x3f9b65b, 0x800fced4,
-    0x3f36ea2, 0x800f9d07,
-  0x3ed26e6, 0x800f6b88, 0x3e6df28, 0x800f3a59, 0x3e09767, 0x800f0978,
-    0x3da4fa4, 0x800ed8e6,
-  0x3d407df, 0x800ea8a3, 0x3cdc017, 0x800e78af, 0x3c7784d, 0x800e490a,
-    0x3c13080, 0x800e19b4,
-  0x3bae8b2, 0x800deaad, 0x3b4a0e0, 0x800dbbf5, 0x3ae590d, 0x800d8d8b,
-    0x3a81137, 0x800d5f71,
-  0x3a1c960, 0x800d31a5, 0x39b8185, 0x800d0429, 0x39539a9, 0x800cd6fb,
-    0x38ef1ca, 0x800caa1c,
-  0x388a9ea, 0x800c7d8c, 0x3826207, 0x800c514c, 0x37c1a22, 0x800c255a,
-    0x375d23a, 0x800bf9b7,
-  0x36f8a51, 0x800bce63, 0x3694265, 0x800ba35d, 0x362fa78, 0x800b78a7,
-    0x35cb288, 0x800b4e40,
-  0x3566a96, 0x800b2427, 0x35022a2, 0x800afa5e, 0x349daac, 0x800ad0e3,
-    0x34392b4, 0x800aa7b8,
-  0x33d4abb, 0x800a7edb, 0x33702bf, 0x800a564e, 0x330bac1, 0x800a2e0f,
-    0x32a72c1, 0x800a061f,
-  0x3242abf, 0x8009de7e, 0x31de2bb, 0x8009b72c, 0x3179ab5, 0x80099029,
-    0x31152ae, 0x80096975,
-  0x30b0aa4, 0x80094310, 0x304c299, 0x80091cf9, 0x2fe7a8c, 0x8008f732,
-    0x2f8327d, 0x8008d1ba,
-  0x2f1ea6c, 0x8008ac90, 0x2eba259, 0x800887b6, 0x2e55a44, 0x8008632a,
-    0x2df122e, 0x80083eed,
-  0x2d8ca16, 0x80081b00, 0x2d281fc, 0x8007f761, 0x2cc39e1, 0x8007d411,
-    0x2c5f1c3, 0x8007b110,
-  0x2bfa9a4, 0x80078e5e, 0x2b96184, 0x80076bfb, 0x2b31961, 0x800749e7,
-    0x2acd13d, 0x80072822,
-  0x2a68917, 0x800706ac, 0x2a040f0, 0x8006e585, 0x299f8c7, 0x8006c4ac,
-    0x293b09c, 0x8006a423,
-  0x28d6870, 0x800683e8, 0x2872043, 0x800663fd, 0x280d813, 0x80064460,
-    0x27a8fe2, 0x80062513,
-  0x27447b0, 0x80060614, 0x26dff7c, 0x8005e764, 0x267b747, 0x8005c904,
-    0x2616f10, 0x8005aaf2,
-  0x25b26d7, 0x80058d2f, 0x254de9e, 0x80056fbb, 0x24e9662, 0x80055296,
-    0x2484e26, 0x800535c0,
-  0x24205e8, 0x80051939, 0x23bbda8, 0x8004fd00, 0x2357567, 0x8004e117,
-    0x22f2d25, 0x8004c57d,
-  0x228e4e2, 0x8004aa32, 0x2229c9d, 0x80048f35, 0x21c5457, 0x80047488,
-    0x2160c0f, 0x80045a29,
-  0x20fc3c6, 0x8004401a, 0x2097b7c, 0x80042659, 0x2033331, 0x80040ce7,
-    0x1fceae4, 0x8003f3c5,
-  0x1f6a297, 0x8003daf1, 0x1f05a48, 0x8003c26c, 0x1ea11f7, 0x8003aa36,
-    0x1e3c9a6, 0x8003924f,
-  0x1dd8154, 0x80037ab7, 0x1d73900, 0x8003636e, 0x1d0f0ab, 0x80034c74,
-    0x1caa855, 0x800335c9,
-  0x1c45ffe, 0x80031f6d, 0x1be17a6, 0x80030960, 0x1b7cf4d, 0x8002f3a1,
-    0x1b186f3, 0x8002de32,
-  0x1ab3e97, 0x8002c912, 0x1a4f63b, 0x8002b440, 0x19eaddd, 0x80029fbe,
-    0x198657f, 0x80028b8a,
-  0x1921d20, 0x800277a6, 0x18bd4bf, 0x80026410, 0x1858c5e, 0x800250c9,
-    0x17f43fc, 0x80023dd2,
-  0x178fb99, 0x80022b29, 0x172b335, 0x800218cf, 0x16c6ad0, 0x800206c4,
-    0x166226a, 0x8001f508,
-  0x15fda03, 0x8001e39b, 0x159919c, 0x8001d27d, 0x1534934, 0x8001c1ae,
-    0x14d00ca, 0x8001b12e,
-  0x146b860, 0x8001a0fd, 0x1406ff6, 0x8001911b, 0x13a278a, 0x80018187,
-    0x133df1e, 0x80017243,
-  0x12d96b1, 0x8001634e, 0x1274e43, 0x800154a7, 0x12105d5, 0x80014650,
-    0x11abd66, 0x80013847,
-  0x11474f6, 0x80012a8e, 0x10e2c85, 0x80011d23, 0x107e414, 0x80011008,
-    0x1019ba2, 0x8001033b,
-  0xfb5330, 0x8000f6bd, 0xf50abd, 0x8000ea8e, 0xeec249, 0x8000deaf, 0xe879d5,
-    0x8000d31e,
-  0xe23160, 0x8000c7dc, 0xdbe8eb, 0x8000bce9, 0xd5a075, 0x8000b245, 0xcf57ff,
-    0x8000a7f0,
-  0xc90f88, 0x80009dea, 0xc2c711, 0x80009433, 0xbc7e99, 0x80008aca, 0xb63621,
-    0x800081b1,
-  0xafeda8, 0x800078e7, 0xa9a52f, 0x8000706c, 0xa35cb5, 0x8000683f, 0x9d143b,
-    0x80006062,
-  0x96cbc1, 0x800058d4, 0x908346, 0x80005194, 0x8a3acb, 0x80004aa4, 0x83f250,
-    0x80004402,
-  0x7da9d4, 0x80003daf, 0x776159, 0x800037ac, 0x7118dc, 0x800031f7, 0x6ad060,
-    0x80002c91,
-  0x6487e3, 0x8000277a, 0x5e3f66, 0x800022b3, 0x57f6e9, 0x80001e3a, 0x51ae6b,
-    0x80001a10,
-  0x4b65ee, 0x80001635, 0x451d70, 0x800012a9, 0x3ed4f2, 0x80000f6c, 0x388c74,
-    0x80000c7e,
-  0x3243f5, 0x800009df, 0x2bfb77, 0x8000078e, 0x25b2f8, 0x8000058d, 0x1f6a7a,
-    0x800003db,
-  0x1921fb, 0x80000278, 0x12d97c, 0x80000163, 0xc90fe, 0x8000009e, 0x6487f,
-    0x80000027,
-
-};
-
-/**    
-* \par    
-* cosFactor tables are generated using the formula : 
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
    
-* \par    
-* where N is the number of factors to generate and c is pi/(2*N)    
-* \par    
-* Then converted to q31 format by multiplying with 2^31 and saturated if required.    
-*/
-
-
-static const q31_t cos_factorsQ31_128[128] = {
-  0x7fff6216, 0x7ffa72d1, 0x7ff09478, 0x7fe1c76b, 0x7fce0c3e, 0x7fb563b3,
-  0x7f97cebd, 0x7f754e80,
-  0x7f4de451, 0x7f2191b4, 0x7ef05860, 0x7eba3a39, 0x7e7f3957, 0x7e3f57ff,
-  0x7dfa98a8, 0x7db0fdf8,
-  0x7d628ac6, 0x7d0f4218, 0x7cb72724, 0x7c5a3d50, 0x7bf88830, 0x7b920b89,
-  0x7b26cb4f, 0x7ab6cba4,
-  0x7a4210d8, 0x79c89f6e, 0x794a7c12, 0x78c7aba2, 0x78403329, 0x77b417df,
-  0x77235f2d, 0x768e0ea6,
-  0x75f42c0b, 0x7555bd4c, 0x74b2c884, 0x740b53fb, 0x735f6626, 0x72af05a7,
-  0x71fa3949, 0x71410805,
-  0x708378ff, 0x6fc19385, 0x6efb5f12, 0x6e30e34a, 0x6d6227fa, 0x6c8f351c,
-  0x6bb812d1, 0x6adcc964,
-  0x69fd614a, 0x6919e320, 0x683257ab, 0x6746c7d8, 0x66573cbb, 0x6563bf92,
-  0x646c59bf, 0x637114cc,
-  0x6271fa69, 0x616f146c, 0x60686ccf, 0x5f5e0db3, 0x5e50015d, 0x5d3e5237,
-  0x5c290acc, 0x5b1035cf,
-  0x59f3de12, 0x58d40e8c, 0x57b0d256, 0x568a34a9, 0x556040e2, 0x5433027d,
-  0x53028518, 0x51ced46e,
-  0x5097fc5e, 0x4f5e08e3, 0x4e210617, 0x4ce10034, 0x4b9e0390, 0x4a581c9e,
-  0x490f57ee, 0x47c3c22f,
-  0x46756828, 0x452456bd, 0x43d09aed, 0x427a41d0, 0x4121589b, 0x3fc5ec98,
-  0x3e680b2c, 0x3d07c1d6,
-  0x3ba51e29, 0x3a402dd2, 0x38d8fe93, 0x376f9e46, 0x36041ad9, 0x34968250,
-  0x3326e2c3, 0x31b54a5e,
-  0x3041c761, 0x2ecc681e, 0x2d553afc, 0x2bdc4e6f, 0x2a61b101, 0x28e5714b,
-  0x27679df4, 0x25e845b6,
-  0x24677758, 0x22e541af, 0x2161b3a0, 0x1fdcdc1b, 0x1e56ca1e, 0x1ccf8cb3,
-  0x1b4732ef, 0x19bdcbf3,
-  0x183366e9, 0x16a81305, 0x151bdf86, 0x138edbb1, 0x120116d5, 0x1072a048,
-  0xee38766, 0xd53db92,
-  0xbc3ac35, 0xa3308bd, 0x8a2009a, 0x710a345, 0x57f0035, 0x3ed26e6, 0x25b26d7,
-  0xc90f88,
-};
-
-static const q31_t cos_factorsQ31_512[512] = {
-  0x7ffff621, 0x7fffa72c, 0x7fff0943, 0x7ffe1c65, 0x7ffce093, 0x7ffb55ce,
-  0x7ff97c18, 0x7ff75370,
-  0x7ff4dbd9, 0x7ff21553, 0x7feeffe1, 0x7feb9b85, 0x7fe7e841, 0x7fe3e616,
-  0x7fdf9508, 0x7fdaf519,
-  0x7fd6064c, 0x7fd0c8a3, 0x7fcb3c23, 0x7fc560cf, 0x7fbf36aa, 0x7fb8bdb8,
-  0x7fb1f5fc, 0x7faadf7c,
-  0x7fa37a3c, 0x7f9bc640, 0x7f93c38c, 0x7f8b7227, 0x7f82d214, 0x7f79e35a,
-  0x7f70a5fe, 0x7f671a05,
-  0x7f5d3f75, 0x7f531655, 0x7f489eaa, 0x7f3dd87c, 0x7f32c3d1, 0x7f2760af,
-  0x7f1baf1e, 0x7f0faf25,
-  0x7f0360cb, 0x7ef6c418, 0x7ee9d914, 0x7edc9fc6, 0x7ecf1837, 0x7ec14270,
-  0x7eb31e78, 0x7ea4ac58,
-  0x7e95ec1a, 0x7e86ddc6, 0x7e778166, 0x7e67d703, 0x7e57dea7, 0x7e47985b,
-  0x7e37042a, 0x7e26221f,
-  0x7e14f242, 0x7e0374a0, 0x7df1a942, 0x7ddf9034, 0x7dcd2981, 0x7dba7534,
-  0x7da77359, 0x7d9423fc,
-  0x7d808728, 0x7d6c9ce9, 0x7d58654d, 0x7d43e05e, 0x7d2f0e2b, 0x7d19eebf,
-  0x7d048228, 0x7ceec873,
-  0x7cd8c1ae, 0x7cc26de5, 0x7cabcd28, 0x7c94df83, 0x7c7da505, 0x7c661dbc,
-  0x7c4e49b7, 0x7c362904,
-  0x7c1dbbb3, 0x7c0501d2, 0x7bebfb70, 0x7bd2a89e, 0x7bb9096b, 0x7b9f1de6,
-  0x7b84e61f, 0x7b6a6227,
-  0x7b4f920e, 0x7b3475e5, 0x7b190dbc, 0x7afd59a4, 0x7ae159ae, 0x7ac50dec,
-  0x7aa8766f, 0x7a8b9348,
-  0x7a6e648a, 0x7a50ea47, 0x7a332490, 0x7a151378, 0x79f6b711, 0x79d80f6f,
-  0x79b91ca4, 0x7999dec4,
-  0x797a55e0, 0x795a820e, 0x793a6361, 0x7919f9ec, 0x78f945c3, 0x78d846fb,
-  0x78b6fda8, 0x789569df,
-  0x78738bb3, 0x7851633b, 0x782ef08b, 0x780c33b8, 0x77e92cd9, 0x77c5dc01,
-  0x77a24148, 0x777e5cc3,
-  0x775a2e89, 0x7735b6af, 0x7710f54c, 0x76ebea77, 0x76c69647, 0x76a0f8d2,
-  0x767b1231, 0x7654e279,
-  0x762e69c4, 0x7607a828, 0x75e09dbd, 0x75b94a9c, 0x7591aedd, 0x7569ca99,
-  0x75419de7, 0x751928e0,
-  0x74f06b9e, 0x74c7663a, 0x749e18cd, 0x74748371, 0x744aa63f, 0x74208150,
-  0x73f614c0, 0x73cb60a8,
-  0x73a06522, 0x73752249, 0x73499838, 0x731dc70a, 0x72f1aed9, 0x72c54fc1,
-  0x7298a9dd, 0x726bbd48,
-  0x723e8a20, 0x7211107e, 0x71e35080, 0x71b54a41, 0x7186fdde, 0x71586b74,
-  0x7129931f, 0x70fa74fc,
-  0x70cb1128, 0x709b67c0, 0x706b78e3, 0x703b44ad, 0x700acb3c, 0x6fda0cae,
-  0x6fa90921, 0x6f77c0b3,
-  0x6f463383, 0x6f1461b0, 0x6ee24b57, 0x6eaff099, 0x6e7d5193, 0x6e4a6e66,
-  0x6e174730, 0x6de3dc11,
-  0x6db02d29, 0x6d7c3a98, 0x6d48047e, 0x6d138afb, 0x6cdece2f, 0x6ca9ce3b,
-  0x6c748b3f, 0x6c3f055d,
-  0x6c093cb6, 0x6bd3316a, 0x6b9ce39b, 0x6b66536b, 0x6b2f80fb, 0x6af86c6c,
-  0x6ac115e2, 0x6a897d7d,
-  0x6a51a361, 0x6a1987b0, 0x69e12a8c, 0x69a88c19, 0x696fac78, 0x69368bce,
-  0x68fd2a3d, 0x68c387e9,
-  0x6889a4f6, 0x684f8186, 0x68151dbe, 0x67da79c3, 0x679f95b7, 0x676471c0,
-  0x67290e02, 0x66ed6aa1,
-  0x66b187c3, 0x6675658c, 0x66390422, 0x65fc63a9, 0x65bf8447, 0x65826622,
-  0x6545095f, 0x65076e25,
-  0x64c99498, 0x648b7ce0, 0x644d2722, 0x640e9386, 0x63cfc231, 0x6390b34a,
-  0x635166f9, 0x6311dd64,
-  0x62d216b3, 0x6292130c, 0x6251d298, 0x6211557e, 0x61d09be5, 0x618fa5f7,
-  0x614e73da, 0x610d05b7,
-  0x60cb5bb7, 0x60897601, 0x604754bf, 0x6004f819, 0x5fc26038, 0x5f7f8d46,
-  0x5f3c7f6b, 0x5ef936d1,
-  0x5eb5b3a2, 0x5e71f606, 0x5e2dfe29, 0x5de9cc33, 0x5da5604f, 0x5d60baa7,
-  0x5d1bdb65, 0x5cd6c2b5,
-  0x5c9170bf, 0x5c4be5b0, 0x5c0621b2, 0x5bc024f0, 0x5b79ef96, 0x5b3381ce,
-  0x5aecdbc5, 0x5aa5fda5,
-  0x5a5ee79a, 0x5a1799d1, 0x59d01475, 0x598857b2, 0x594063b5, 0x58f838a9,
-  0x58afd6bd, 0x58673e1b,
-  0x581e6ef1, 0x57d5696d, 0x578c2dba, 0x5742bc06, 0x56f9147e, 0x56af3750,
-  0x566524aa, 0x561adcb9,
-  0x55d05faa, 0x5585adad, 0x553ac6ee, 0x54efab9c, 0x54a45be6, 0x5458d7f9,
-  0x540d2005, 0x53c13439,
-  0x537514c2, 0x5328c1d0, 0x52dc3b92, 0x528f8238, 0x524295f0, 0x51f576ea,
-  0x51a82555, 0x515aa162,
-  0x510ceb40, 0x50bf031f, 0x5070e92f, 0x50229da1, 0x4fd420a4, 0x4f857269,
-  0x4f369320, 0x4ee782fb,
-  0x4e984229, 0x4e48d0dd, 0x4df92f46, 0x4da95d96, 0x4d595bfe, 0x4d092ab0,
-  0x4cb8c9dd, 0x4c6839b7,
-  0x4c177a6e, 0x4bc68c36, 0x4b756f40, 0x4b2423be, 0x4ad2a9e2, 0x4a8101de,
-  0x4a2f2be6, 0x49dd282a,
-  0x498af6df, 0x49389836, 0x48e60c62, 0x48935397, 0x48406e08, 0x47ed5be6,
-  0x479a1d67, 0x4746b2bc,
-  0x46f31c1a, 0x469f59b4, 0x464b6bbe, 0x45f7526b, 0x45a30df0, 0x454e9e80,
-  0x44fa0450, 0x44a53f93,
-  0x4450507e, 0x43fb3746, 0x43a5f41e, 0x4350873c, 0x42faf0d4, 0x42a5311b,
-  0x424f4845, 0x41f93689,
-  0x41a2fc1a, 0x414c992f, 0x40f60dfb, 0x409f5ab6, 0x40487f94, 0x3ff17cca,
-  0x3f9a5290, 0x3f430119,
-  0x3eeb889c, 0x3e93e950, 0x3e3c2369, 0x3de4371f, 0x3d8c24a8, 0x3d33ec39,
-  0x3cdb8e09, 0x3c830a50,
-  0x3c2a6142, 0x3bd19318, 0x3b78a007, 0x3b1f8848, 0x3ac64c0f, 0x3a6ceb96,
-  0x3a136712, 0x39b9bebc,
-  0x395ff2c9, 0x39060373, 0x38abf0ef, 0x3851bb77, 0x37f76341, 0x379ce885,
-  0x37424b7b, 0x36e78c5b,
-  0x368cab5c, 0x3631a8b8, 0x35d684a6, 0x357b3f5d, 0x351fd918, 0x34c4520d,
-  0x3468aa76, 0x340ce28b,
-  0x33b0fa84, 0x3354f29b, 0x32f8cb07, 0x329c8402, 0x32401dc6, 0x31e39889,
-  0x3186f487, 0x312a31f8,
-  0x30cd5115, 0x30705217, 0x30133539, 0x2fb5fab2, 0x2f58a2be, 0x2efb2d95,
-  0x2e9d9b70, 0x2e3fec8b,
-  0x2de2211e, 0x2d843964, 0x2d263596, 0x2cc815ee, 0x2c69daa6, 0x2c0b83fa,
-  0x2bad1221, 0x2b4e8558,
-  0x2aefddd8, 0x2a911bdc, 0x2a323f9e, 0x29d34958, 0x29743946, 0x29150fa1,
-  0x28b5cca5, 0x2856708d,
-  0x27f6fb92, 0x27976df1, 0x2737c7e3, 0x26d809a5, 0x26783370, 0x26184581,
-  0x25b84012, 0x2558235f,
-  0x24f7efa2, 0x2497a517, 0x243743fa, 0x23d6cc87, 0x23763ef7, 0x23159b88,
-  0x22b4e274, 0x225413f8,
-  0x21f3304f, 0x219237b5, 0x21312a65, 0x20d0089c, 0x206ed295, 0x200d888d,
-  0x1fac2abf, 0x1f4ab968,
-  0x1ee934c3, 0x1e879d0d, 0x1e25f282, 0x1dc4355e, 0x1d6265dd, 0x1d00843d,
-  0x1c9e90b8, 0x1c3c8b8c,
-  0x1bda74f6, 0x1b784d30, 0x1b161479, 0x1ab3cb0d, 0x1a517128, 0x19ef0707,
-  0x198c8ce7, 0x192a0304,
-  0x18c7699b, 0x1864c0ea, 0x1802092c, 0x179f429f, 0x173c6d80, 0x16d98a0c,
-  0x1676987f, 0x16139918,
-  0x15b08c12, 0x154d71aa, 0x14ea4a1f, 0x148715ae, 0x1423d492, 0x13c0870a,
-  0x135d2d53, 0x12f9c7aa,
-  0x1296564d, 0x1232d979, 0x11cf516a, 0x116bbe60, 0x11082096, 0x10a4784b,
-  0x1040c5bb, 0xfdd0926,
-  0xf7942c7, 0xf1572dc, 0xeb199a4, 0xe4db75b, 0xde9cc40, 0xd85d88f, 0xd21dc87,
-  0xcbdd865,
-  0xc59cc68, 0xbf5b8cb, 0xb919dcf, 0xb2d7baf, 0xac952aa, 0xa6522fe, 0xa00ece8,
-  0x99cb0a7,
-  0x9386e78, 0x8d42699, 0x86fd947, 0x80b86c2, 0x7a72f45, 0x742d311, 0x6de7262,
-  0x67a0d76,
-  0x615a48b, 0x5b137df, 0x54cc7b1, 0x4e8543e, 0x483ddc3, 0x41f6480, 0x3bae8b2,
-  0x3566a96,
-  0x2f1ea6c, 0x28d6870, 0x228e4e2, 0x1c45ffe, 0x15fda03, 0xfb5330, 0x96cbc1,
-  0x3243f5,
-};
-
-static const q31_t cos_factorsQ31_2048[2048] = {
-  0x7fffff62, 0x7ffffa73, 0x7ffff094, 0x7fffe1c6, 0x7fffce09, 0x7fffb55c,
-  0x7fff97c1, 0x7fff7536,
-  0x7fff4dbb, 0x7fff2151, 0x7ffeeff8, 0x7ffeb9b0, 0x7ffe7e79, 0x7ffe3e52,
-  0x7ffdf93c, 0x7ffdaf37,
-  0x7ffd6042, 0x7ffd0c5f, 0x7ffcb38c, 0x7ffc55ca, 0x7ffbf319, 0x7ffb8b78,
-  0x7ffb1ee9, 0x7ffaad6a,
-  0x7ffa36fc, 0x7ff9bba0, 0x7ff93b54, 0x7ff8b619, 0x7ff82bef, 0x7ff79cd6,
-  0x7ff708ce, 0x7ff66fd7,
-  0x7ff5d1f1, 0x7ff52f1d, 0x7ff48759, 0x7ff3daa6, 0x7ff32905, 0x7ff27275,
-  0x7ff1b6f6, 0x7ff0f688,
-  0x7ff0312c, 0x7fef66e1, 0x7fee97a7, 0x7fedc37e, 0x7fecea67, 0x7fec0c62,
-  0x7feb296d, 0x7fea418b,
-  0x7fe954ba, 0x7fe862fa, 0x7fe76c4c, 0x7fe670b0, 0x7fe57025, 0x7fe46aac,
-  0x7fe36045, 0x7fe250ef,
-  0x7fe13cac, 0x7fe0237a, 0x7fdf055a, 0x7fdde24d, 0x7fdcba51, 0x7fdb8d67,
-  0x7fda5b8f, 0x7fd924ca,
-  0x7fd7e917, 0x7fd6a875, 0x7fd562e7, 0x7fd4186a, 0x7fd2c900, 0x7fd174a8,
-  0x7fd01b63, 0x7fcebd31,
-  0x7fcd5a11, 0x7fcbf203, 0x7fca8508, 0x7fc91320, 0x7fc79c4b, 0x7fc62089,
-  0x7fc49fda, 0x7fc31a3d,
-  0x7fc18fb4, 0x7fc0003e, 0x7fbe6bdb, 0x7fbcd28b, 0x7fbb344e, 0x7fb99125,
-  0x7fb7e90f, 0x7fb63c0d,
-  0x7fb48a1e, 0x7fb2d343, 0x7fb1177b, 0x7faf56c7, 0x7fad9127, 0x7fabc69b,
-  0x7fa9f723, 0x7fa822bf,
-  0x7fa6496e, 0x7fa46b32, 0x7fa2880b, 0x7fa09ff7, 0x7f9eb2f8, 0x7f9cc10d,
-  0x7f9aca37, 0x7f98ce76,
-  0x7f96cdc9, 0x7f94c831, 0x7f92bdad, 0x7f90ae3f, 0x7f8e99e6, 0x7f8c80a1,
-  0x7f8a6272, 0x7f883f58,
-  0x7f861753, 0x7f83ea64, 0x7f81b88a, 0x7f7f81c6, 0x7f7d4617, 0x7f7b057e,
-  0x7f78bffb, 0x7f76758e,
-  0x7f742637, 0x7f71d1f6, 0x7f6f78cb, 0x7f6d1ab6, 0x7f6ab7b8, 0x7f684fd0,
-  0x7f65e2ff, 0x7f637144,
-  0x7f60faa0, 0x7f5e7f13, 0x7f5bfe9d, 0x7f59793e, 0x7f56eef5, 0x7f545fc5,
-  0x7f51cbab, 0x7f4f32a9,
-  0x7f4c94be, 0x7f49f1eb, 0x7f474a30, 0x7f449d8c, 0x7f41ec01, 0x7f3f358d,
-  0x7f3c7a31, 0x7f39b9ee,
-  0x7f36f4c3, 0x7f342ab1, 0x7f315bb7, 0x7f2e87d6, 0x7f2baf0d, 0x7f28d15d,
-  0x7f25eec7, 0x7f230749,
-  0x7f201ae5, 0x7f1d299a, 0x7f1a3368, 0x7f173850, 0x7f143852, 0x7f11336d,
-  0x7f0e29a3, 0x7f0b1af2,
-  0x7f08075c, 0x7f04eedf, 0x7f01d17d, 0x7efeaf36, 0x7efb8809, 0x7ef85bf7,
-  0x7ef52b00, 0x7ef1f524,
-  0x7eeeba62, 0x7eeb7abc, 0x7ee83632, 0x7ee4ecc3, 0x7ee19e6f, 0x7ede4b38,
-  0x7edaf31c, 0x7ed7961c,
-  0x7ed43438, 0x7ed0cd70, 0x7ecd61c5, 0x7ec9f137, 0x7ec67bc5, 0x7ec3016f,
-  0x7ebf8237, 0x7ebbfe1c,
-  0x7eb8751e, 0x7eb4e73d, 0x7eb1547a, 0x7eadbcd4, 0x7eaa204c, 0x7ea67ee2,
-  0x7ea2d896, 0x7e9f2d68,
-  0x7e9b7d58, 0x7e97c867, 0x7e940e94, 0x7e904fe0, 0x7e8c8c4b, 0x7e88c3d5,
-  0x7e84f67e, 0x7e812447,
-  0x7e7d4d2f, 0x7e797136, 0x7e75905d, 0x7e71aaa4, 0x7e6dc00c, 0x7e69d093,
-  0x7e65dc3b, 0x7e61e303,
-  0x7e5de4ec, 0x7e59e1f5, 0x7e55da20, 0x7e51cd6c, 0x7e4dbbd9, 0x7e49a567,
-  0x7e458a17, 0x7e4169e9,
-  0x7e3d44dd, 0x7e391af3, 0x7e34ec2b, 0x7e30b885, 0x7e2c8002, 0x7e2842a2,
-  0x7e240064, 0x7e1fb94a,
-  0x7e1b6d53, 0x7e171c7f, 0x7e12c6ce, 0x7e0e6c42, 0x7e0a0cd9, 0x7e05a894,
-  0x7e013f74, 0x7dfcd178,
-  0x7df85ea0, 0x7df3e6ee, 0x7def6a60, 0x7deae8f7, 0x7de662b3, 0x7de1d795,
-  0x7ddd479d, 0x7dd8b2ca,
-  0x7dd4191d, 0x7dcf7a96, 0x7dcad736, 0x7dc62efc, 0x7dc181e8, 0x7dbccffc,
-  0x7db81936, 0x7db35d98,
-  0x7dae9d21, 0x7da9d7d2, 0x7da50dab, 0x7da03eab, 0x7d9b6ad3, 0x7d969224,
-  0x7d91b49e, 0x7d8cd240,
-  0x7d87eb0a, 0x7d82fefe, 0x7d7e0e1c, 0x7d791862, 0x7d741dd2, 0x7d6f1e6c,
-  0x7d6a1a31, 0x7d65111f,
-  0x7d600338, 0x7d5af07b, 0x7d55d8e9, 0x7d50bc82, 0x7d4b9b46, 0x7d467536,
-  0x7d414a51, 0x7d3c1a98,
-  0x7d36e60b, 0x7d31acaa, 0x7d2c6e76, 0x7d272b6e, 0x7d21e393, 0x7d1c96e5,
-  0x7d174564, 0x7d11ef11,
-  0x7d0c93eb, 0x7d0733f3, 0x7d01cf29, 0x7cfc658d, 0x7cf6f720, 0x7cf183e1,
-  0x7cec0bd1, 0x7ce68ef0,
-  0x7ce10d3f, 0x7cdb86bd, 0x7cd5fb6a, 0x7cd06b48, 0x7ccad656, 0x7cc53c94,
-  0x7cbf9e03, 0x7cb9faa2,
-  0x7cb45272, 0x7caea574, 0x7ca8f3a7, 0x7ca33d0c, 0x7c9d81a3, 0x7c97c16b,
-  0x7c91fc66, 0x7c8c3294,
-  0x7c8663f4, 0x7c809088, 0x7c7ab84e, 0x7c74db48, 0x7c6ef976, 0x7c6912d7,
-  0x7c63276d, 0x7c5d3737,
-  0x7c574236, 0x7c514869, 0x7c4b49d2, 0x7c45466f, 0x7c3f3e42, 0x7c39314b,
-  0x7c331f8a, 0x7c2d08ff,
-  0x7c26edab, 0x7c20cd8d, 0x7c1aa8a6, 0x7c147ef6, 0x7c0e507e, 0x7c081d3d,
-  0x7c01e534, 0x7bfba863,
-  0x7bf566cb, 0x7bef206b, 0x7be8d544, 0x7be28556, 0x7bdc30a1, 0x7bd5d726,
-  0x7bcf78e5, 0x7bc915dd,
-  0x7bc2ae10, 0x7bbc417e, 0x7bb5d026, 0x7baf5a09, 0x7ba8df28, 0x7ba25f82,
-  0x7b9bdb18, 0x7b9551ea,
-  0x7b8ec3f8, 0x7b883143, 0x7b8199ca, 0x7b7afd8f, 0x7b745c91, 0x7b6db6d0,
-  0x7b670c4d, 0x7b605d09,
-  0x7b59a902, 0x7b52f03a, 0x7b4c32b1, 0x7b457068, 0x7b3ea95d, 0x7b37dd92,
-  0x7b310d07, 0x7b2a37bc,
-  0x7b235db2, 0x7b1c7ee8, 0x7b159b5f, 0x7b0eb318, 0x7b07c612, 0x7b00d44d,
-  0x7af9ddcb, 0x7af2e28b,
-  0x7aebe28d, 0x7ae4ddd2, 0x7addd45b, 0x7ad6c626, 0x7acfb336, 0x7ac89b89,
-  0x7ac17f20, 0x7aba5dfc,
-  0x7ab3381d, 0x7aac0d82, 0x7aa4de2d, 0x7a9daa1d, 0x7a967153, 0x7a8f33d0,
-  0x7a87f192, 0x7a80aa9c,
-  0x7a795eec, 0x7a720e84, 0x7a6ab963, 0x7a635f8a, 0x7a5c00f9, 0x7a549db0,
-  0x7a4d35b0, 0x7a45c8f9,
-  0x7a3e578b, 0x7a36e166, 0x7a2f668c, 0x7a27e6fb, 0x7a2062b5, 0x7a18d9b9,
-  0x7a114c09, 0x7a09b9a4,
-  0x7a02228a, 0x79fa86bc, 0x79f2e63a, 0x79eb4105, 0x79e3971c, 0x79dbe880,
-  0x79d43532, 0x79cc7d31,
-  0x79c4c07e, 0x79bcff19, 0x79b53903, 0x79ad6e3c, 0x79a59ec3, 0x799dca9a,
-  0x7995f1c1, 0x798e1438,
-  0x798631ff, 0x797e4b16, 0x79765f7f, 0x796e6f39, 0x79667a44, 0x795e80a1,
-  0x79568250, 0x794e7f52,
-  0x794677a6, 0x793e6b4e, 0x79365a49, 0x792e4497, 0x79262a3a, 0x791e0b31,
-  0x7915e77c, 0x790dbf1d,
-  0x79059212, 0x78fd605d, 0x78f529fe, 0x78eceef6, 0x78e4af44, 0x78dc6ae8,
-  0x78d421e4, 0x78cbd437,
-  0x78c381e2, 0x78bb2ae5, 0x78b2cf41, 0x78aa6ef5, 0x78a20a03, 0x7899a06a,
-  0x7891322a, 0x7888bf45,
-  0x788047ba, 0x7877cb89, 0x786f4ab4, 0x7866c53a, 0x785e3b1c, 0x7855ac5a,
-  0x784d18f4, 0x784480ea,
-  0x783be43e, 0x783342ef, 0x782a9cfe, 0x7821f26b, 0x78194336, 0x78108f60,
-  0x7807d6e9, 0x77ff19d1,
-  0x77f65819, 0x77ed91c0, 0x77e4c6c9, 0x77dbf732, 0x77d322fc, 0x77ca4a27,
-  0x77c16cb4, 0x77b88aa3,
-  0x77afa3f5, 0x77a6b8a9, 0x779dc8c0, 0x7794d43b, 0x778bdb19, 0x7782dd5c,
-  0x7779db03, 0x7770d40f,
-  0x7767c880, 0x775eb857, 0x7755a394, 0x774c8a36, 0x77436c40, 0x773a49b0,
-  0x77312287, 0x7727f6c6,
-  0x771ec66e, 0x7715917d, 0x770c57f5, 0x770319d6, 0x76f9d721, 0x76f08fd5,
-  0x76e743f4, 0x76ddf37c,
-  0x76d49e70, 0x76cb44cf, 0x76c1e699, 0x76b883d0, 0x76af1c72, 0x76a5b082,
-  0x769c3ffe, 0x7692cae8,
-  0x7689513f, 0x767fd304, 0x76765038, 0x766cc8db, 0x76633ced, 0x7659ac6f,
-  0x76501760, 0x76467dc2,
-  0x763cdf94, 0x76333cd8, 0x7629958c, 0x761fe9b3, 0x7616394c, 0x760c8457,
-  0x7602cad5, 0x75f90cc7,
-  0x75ef4a2c, 0x75e58305, 0x75dbb753, 0x75d1e715, 0x75c8124d, 0x75be38fa,
-  0x75b45b1d, 0x75aa78b6,
-  0x75a091c6, 0x7596a64d, 0x758cb64c, 0x7582c1c2, 0x7578c8b0, 0x756ecb18,
-  0x7564c8f8, 0x755ac251,
-  0x7550b725, 0x7546a772, 0x753c933a, 0x75327a7d, 0x75285d3b, 0x751e3b75,
-  0x7514152b, 0x7509ea5d,
-  0x74ffbb0d, 0x74f58739, 0x74eb4ee3, 0x74e1120c, 0x74d6d0b2, 0x74cc8ad8,
-  0x74c2407d, 0x74b7f1a1,
-  0x74ad9e46, 0x74a3466b, 0x7498ea11, 0x748e8938, 0x748423e0, 0x7479ba0b,
-  0x746f4bb8, 0x7464d8e8,
-  0x745a619b, 0x744fe5d2, 0x7445658d, 0x743ae0cc, 0x74305790, 0x7425c9da,
-  0x741b37a9, 0x7410a0fe,
-  0x740605d9, 0x73fb663c, 0x73f0c226, 0x73e61997, 0x73db6c91, 0x73d0bb13,
-  0x73c6051f, 0x73bb4ab3,
-  0x73b08bd1, 0x73a5c87a, 0x739b00ad, 0x7390346b, 0x738563b5, 0x737a8e8a,
-  0x736fb4ec, 0x7364d6da,
-  0x7359f456, 0x734f0d5f, 0x734421f6, 0x7339321b, 0x732e3dcf, 0x73234512,
-  0x731847e5, 0x730d4648,
-  0x7302403c, 0x72f735c0, 0x72ec26d6, 0x72e1137d, 0x72d5fbb7, 0x72cadf83,
-  0x72bfbee3, 0x72b499d6,
-  0x72a9705c, 0x729e4277, 0x72931027, 0x7287d96c, 0x727c9e47, 0x72715eb8,
-  0x72661abf, 0x725ad25d,
-  0x724f8593, 0x72443460, 0x7238dec5, 0x722d84c4, 0x7222265b, 0x7216c38c,
-  0x720b5c57, 0x71fff0bc,
-  0x71f480bc, 0x71e90c57, 0x71dd938f, 0x71d21662, 0x71c694d2, 0x71bb0edf,
-  0x71af848a, 0x71a3f5d2,
-  0x719862b9, 0x718ccb3f, 0x71812f65, 0x71758f29, 0x7169ea8f, 0x715e4194,
-  0x7152943b, 0x7146e284,
-  0x713b2c6e, 0x712f71fb, 0x7123b32b, 0x7117effe, 0x710c2875, 0x71005c90,
-  0x70f48c50, 0x70e8b7b5,
-  0x70dcdec0, 0x70d10171, 0x70c51fc8, 0x70b939c7, 0x70ad4f6d, 0x70a160ba,
-  0x70956db1, 0x70897650,
-  0x707d7a98, 0x70717a8a, 0x70657626, 0x70596d6d, 0x704d6060, 0x70414efd,
-  0x70353947, 0x70291f3e,
-  0x701d00e1, 0x7010de32, 0x7004b731, 0x6ff88bde, 0x6fec5c3b, 0x6fe02846,
-  0x6fd3f001, 0x6fc7b36d,
-  0x6fbb728a, 0x6faf2d57, 0x6fa2e3d7, 0x6f969608, 0x6f8a43ed, 0x6f7ded84,
-  0x6f7192cf, 0x6f6533ce,
-  0x6f58d082, 0x6f4c68eb, 0x6f3ffd09, 0x6f338cde, 0x6f271868, 0x6f1a9faa,
-  0x6f0e22a3, 0x6f01a155,
-  0x6ef51bbe, 0x6ee891e1, 0x6edc03bc, 0x6ecf7152, 0x6ec2daa2, 0x6eb63fad,
-  0x6ea9a073, 0x6e9cfcf5,
-  0x6e905534, 0x6e83a92f, 0x6e76f8e7, 0x6e6a445d, 0x6e5d8b91, 0x6e50ce84,
-  0x6e440d37, 0x6e3747a9,
-  0x6e2a7ddb, 0x6e1dafce, 0x6e10dd82, 0x6e0406f8, 0x6df72c30, 0x6dea4d2b,
-  0x6ddd69e9, 0x6dd0826a,
-  0x6dc396b0, 0x6db6a6ba, 0x6da9b28a, 0x6d9cba1f, 0x6d8fbd7a, 0x6d82bc9d,
-  0x6d75b786, 0x6d68ae37,
-  0x6d5ba0b0, 0x6d4e8ef2, 0x6d4178fd, 0x6d345ed1, 0x6d274070, 0x6d1a1dda,
-  0x6d0cf70f, 0x6cffcc0f,
-  0x6cf29cdc, 0x6ce56975, 0x6cd831dc, 0x6ccaf610, 0x6cbdb613, 0x6cb071e4,
-  0x6ca32985, 0x6c95dcf6,
-  0x6c888c36, 0x6c7b3748, 0x6c6dde2b, 0x6c6080e0, 0x6c531f67, 0x6c45b9c1,
-  0x6c384fef, 0x6c2ae1f0,
-  0x6c1d6fc6, 0x6c0ff971, 0x6c027ef1, 0x6bf50047, 0x6be77d74, 0x6bd9f677,
-  0x6bcc6b53, 0x6bbedc06,
-  0x6bb14892, 0x6ba3b0f7, 0x6b961536, 0x6b88754f, 0x6b7ad142, 0x6b6d2911,
-  0x6b5f7cbc, 0x6b51cc42,
-  0x6b4417a6, 0x6b365ee7, 0x6b28a206, 0x6b1ae103, 0x6b0d1bdf, 0x6aff529a,
-  0x6af18536, 0x6ae3b3b2,
-  0x6ad5de0f, 0x6ac8044e, 0x6aba266e, 0x6aac4472, 0x6a9e5e58, 0x6a907423,
-  0x6a8285d1, 0x6a749365,
-  0x6a669cdd, 0x6a58a23c, 0x6a4aa381, 0x6a3ca0ad, 0x6a2e99c0, 0x6a208ebb,
-  0x6a127f9f, 0x6a046c6c,
-  0x69f65523, 0x69e839c4, 0x69da1a50, 0x69cbf6c7, 0x69bdcf29, 0x69afa378,
-  0x69a173b5, 0x69933fde,
-  0x698507f6, 0x6976cbfc, 0x69688bf1, 0x695a47d6, 0x694bffab, 0x693db371,
-  0x692f6328, 0x69210ed1,
-  0x6912b66c, 0x690459fb, 0x68f5f97d, 0x68e794f3, 0x68d92c5d, 0x68cabfbd,
-  0x68bc4f13, 0x68adda5f,
-  0x689f61a1, 0x6890e4dc, 0x6882640e, 0x6873df38, 0x6865565c, 0x6856c979,
-  0x68483891, 0x6839a3a4,
-  0x682b0ab1, 0x681c6dbb, 0x680dccc1, 0x67ff27c4, 0x67f07ec5, 0x67e1d1c4,
-  0x67d320c1, 0x67c46bbe,
-  0x67b5b2bb, 0x67a6f5b8, 0x679834b6, 0x67896fb6, 0x677aa6b8, 0x676bd9bd,
-  0x675d08c4, 0x674e33d0,
-  0x673f5ae0, 0x67307df5, 0x67219d10, 0x6712b831, 0x6703cf58, 0x66f4e287,
-  0x66e5f1be, 0x66d6fcfd,
-  0x66c80445, 0x66b90797, 0x66aa06f3, 0x669b0259, 0x668bf9cb, 0x667ced49,
-  0x666ddcd3, 0x665ec86b,
-  0x664fb010, 0x664093c3, 0x66317385, 0x66224f56, 0x66132738, 0x6603fb2a,
-  0x65f4cb2d, 0x65e59742,
-  0x65d65f69, 0x65c723a3, 0x65b7e3f1, 0x65a8a052, 0x659958c9, 0x658a0d54,
-  0x657abdf6, 0x656b6aae,
-  0x655c137d, 0x654cb863, 0x653d5962, 0x652df679, 0x651e8faa, 0x650f24f5,
-  0x64ffb65b, 0x64f043dc,
-  0x64e0cd78, 0x64d15331, 0x64c1d507, 0x64b252fa, 0x64a2cd0c, 0x6493433c,
-  0x6483b58c, 0x647423fb,
-  0x64648e8c, 0x6454f53d, 0x64455810, 0x6435b706, 0x6426121e, 0x6416695a,
-  0x6406bcba, 0x63f70c3f,
-  0x63e757ea, 0x63d79fba, 0x63c7e3b1, 0x63b823cf, 0x63a86015, 0x63989884,
-  0x6388cd1b, 0x6378fddc,
-  0x63692ac7, 0x635953dd, 0x6349791f, 0x63399a8d, 0x6329b827, 0x6319d1ef,
-  0x6309e7e4, 0x62f9fa09,
-  0x62ea085c, 0x62da12df, 0x62ca1992, 0x62ba1c77, 0x62aa1b8d, 0x629a16d5,
-  0x628a0e50, 0x627a01fe,
-  0x6269f1e1, 0x6259ddf8, 0x6249c645, 0x6239aac7, 0x62298b81, 0x62196871,
-  0x62094199, 0x61f916f9,
-  0x61e8e893, 0x61d8b666, 0x61c88074, 0x61b846bc, 0x61a80940, 0x6197c800,
-  0x618782fd, 0x61773a37,
-  0x6166edb0, 0x61569d67, 0x6146495d, 0x6135f193, 0x6125960a, 0x611536c2,
-  0x6104d3bc, 0x60f46cf9,
-  0x60e40278, 0x60d3943b, 0x60c32243, 0x60b2ac8f, 0x60a23322, 0x6091b5fa,
-  0x60813519, 0x6070b080,
-  0x6060282f, 0x604f9c27, 0x603f0c69, 0x602e78f4, 0x601de1ca, 0x600d46ec,
-  0x5ffca859, 0x5fec0613,
-  0x5fdb601b, 0x5fcab670, 0x5fba0914, 0x5fa95807, 0x5f98a34a, 0x5f87eade,
-  0x5f772ec2, 0x5f666ef9,
-  0x5f55ab82, 0x5f44e45e, 0x5f34198e, 0x5f234b12, 0x5f1278eb, 0x5f01a31a,
-  0x5ef0c99f, 0x5edfec7b,
-  0x5ecf0baf, 0x5ebe273b, 0x5ead3f1f, 0x5e9c535e, 0x5e8b63f7, 0x5e7a70ea,
-  0x5e697a39, 0x5e587fe5,
-  0x5e4781ed, 0x5e368053, 0x5e257b17, 0x5e147239, 0x5e0365bb, 0x5df2559e,
-  0x5de141e1, 0x5dd02a85,
-  0x5dbf0f8c, 0x5dadf0f5, 0x5d9ccec2, 0x5d8ba8f3, 0x5d7a7f88, 0x5d695283,
-  0x5d5821e4, 0x5d46edac,
-  0x5d35b5db, 0x5d247a72, 0x5d133b72, 0x5d01f8dc, 0x5cf0b2af, 0x5cdf68ed,
-  0x5cce1b97, 0x5cbccaac,
-  0x5cab762f, 0x5c9a1e1e, 0x5c88c27c, 0x5c776348, 0x5c660084, 0x5c549a30,
-  0x5c43304d, 0x5c31c2db,
-  0x5c2051db, 0x5c0edd4e, 0x5bfd6534, 0x5bebe98e, 0x5bda6a5d, 0x5bc8e7a2,
-  0x5bb7615d, 0x5ba5d78e,
-  0x5b944a37, 0x5b82b958, 0x5b7124f2, 0x5b5f8d06, 0x5b4df193, 0x5b3c529c,
-  0x5b2ab020, 0x5b190a20,
-  0x5b07609d, 0x5af5b398, 0x5ae40311, 0x5ad24f09, 0x5ac09781, 0x5aaedc78,
-  0x5a9d1df1, 0x5a8b5bec,
-  0x5a799669, 0x5a67cd69, 0x5a5600ec, 0x5a4430f5, 0x5a325d82, 0x5a208695,
-  0x5a0eac2e, 0x59fcce4f,
-  0x59eaecf8, 0x59d90829, 0x59c71fe3, 0x59b53427, 0x59a344f6, 0x59915250,
-  0x597f5c36, 0x596d62a9,
-  0x595b65aa, 0x59496538, 0x59376155, 0x59255a02, 0x59134f3e, 0x5901410c,
-  0x58ef2f6b, 0x58dd1a5d,
-  0x58cb01e1, 0x58b8e5f9, 0x58a6c6a5, 0x5894a3e7, 0x58827dbe, 0x5870542c,
-  0x585e2730, 0x584bf6cd,
-  0x5839c302, 0x58278bd1, 0x58155139, 0x5803133c, 0x57f0d1da, 0x57de8d15,
-  0x57cc44ec, 0x57b9f960,
-  0x57a7aa73, 0x57955825, 0x57830276, 0x5770a968, 0x575e4cfa, 0x574bed2f,
-  0x57398a05, 0x5727237f,
-  0x5714b99d, 0x57024c5f, 0x56efdbc7, 0x56dd67d4, 0x56caf088, 0x56b875e4,
-  0x56a5f7e7, 0x56937694,
-  0x5680f1ea, 0x566e69ea, 0x565bde95, 0x56494fec, 0x5636bdef, 0x5624289f,
-  0x56118ffe, 0x55fef40a,
-  0x55ec54c6, 0x55d9b232, 0x55c70c4f, 0x55b4631d, 0x55a1b69d, 0x558f06d0,
-  0x557c53b6, 0x55699d51,
-  0x5556e3a1, 0x554426a7, 0x55316663, 0x551ea2d6, 0x550bdc01, 0x54f911e5,
-  0x54e64482, 0x54d373d9,
-  0x54c09feb, 0x54adc8b8, 0x549aee42, 0x54881089, 0x54752f8d, 0x54624b50,
-  0x544f63d2, 0x543c7914,
-  0x54298b17, 0x541699db, 0x5403a561, 0x53f0adaa, 0x53ddb2b6, 0x53cab486,
-  0x53b7b31c, 0x53a4ae77,
-  0x5391a699, 0x537e9b82, 0x536b8d33, 0x53587bad, 0x534566f0, 0x53324efd,
-  0x531f33d5, 0x530c1579,
-  0x52f8f3e9, 0x52e5cf27, 0x52d2a732, 0x52bf7c0b, 0x52ac4db4, 0x52991c2d,
-  0x5285e777, 0x5272af92,
-  0x525f7480, 0x524c3640, 0x5238f4d4, 0x5225b03d, 0x5212687b, 0x51ff1d8f,
-  0x51ebcf7a, 0x51d87e3c,
-  0x51c529d7, 0x51b1d24a, 0x519e7797, 0x518b19bf, 0x5177b8c2, 0x516454a0,
-  0x5150ed5c, 0x513d82f4,
-  0x512a156b, 0x5116a4c1, 0x510330f7, 0x50efba0d, 0x50dc4005, 0x50c8c2de,
-  0x50b5429a, 0x50a1bf39,
-  0x508e38bd, 0x507aaf25, 0x50672273, 0x505392a8, 0x503fffc4, 0x502c69c8,
-  0x5018d0b4, 0x5005348a,
-  0x4ff1954b, 0x4fddf2f6, 0x4fca4d8d, 0x4fb6a510, 0x4fa2f981, 0x4f8f4ae0,
-  0x4f7b992d, 0x4f67e46a,
-  0x4f542c98, 0x4f4071b6, 0x4f2cb3c7, 0x4f18f2c9, 0x4f052ec0, 0x4ef167aa,
-  0x4edd9d89, 0x4ec9d05e,
-  0x4eb60029, 0x4ea22ceb, 0x4e8e56a5, 0x4e7a7d58, 0x4e66a105, 0x4e52c1ab,
-  0x4e3edf4d, 0x4e2af9ea,
-  0x4e171184, 0x4e03261b, 0x4def37b0, 0x4ddb4644, 0x4dc751d8, 0x4db35a6c,
-  0x4d9f6001, 0x4d8b6298,
-  0x4d776231, 0x4d635ece, 0x4d4f5870, 0x4d3b4f16, 0x4d2742c2, 0x4d133374,
-  0x4cff212e, 0x4ceb0bf0,
-  0x4cd6f3bb, 0x4cc2d88f, 0x4caeba6e, 0x4c9a9958, 0x4c86754e, 0x4c724e50,
-  0x4c5e2460, 0x4c49f77f,
-  0x4c35c7ac, 0x4c2194e9, 0x4c0d5f37, 0x4bf92697, 0x4be4eb08, 0x4bd0ac8d,
-  0x4bbc6b25, 0x4ba826d1,
-  0x4b93df93, 0x4b7f956b, 0x4b6b485a, 0x4b56f861, 0x4b42a580, 0x4b2e4fb8,
-  0x4b19f70a, 0x4b059b77,
-  0x4af13d00, 0x4adcdba5, 0x4ac87767, 0x4ab41046, 0x4a9fa645, 0x4a8b3963,
-  0x4a76c9a2, 0x4a625701,
-  0x4a4de182, 0x4a396926, 0x4a24edee, 0x4a106fda, 0x49fbeeea, 0x49e76b21,
-  0x49d2e47e, 0x49be5b02,
-  0x49a9ceaf, 0x49953f84, 0x4980ad84, 0x496c18ae, 0x49578103, 0x4942e684,
-  0x492e4933, 0x4919a90f,
-  0x4905061a, 0x48f06054, 0x48dbb7be, 0x48c70c59, 0x48b25e25, 0x489dad25,
-  0x4888f957, 0x487442be,
-  0x485f8959, 0x484acd2a, 0x48360e32, 0x48214c71, 0x480c87e8, 0x47f7c099,
-  0x47e2f682, 0x47ce29a7,
-  0x47b95a06, 0x47a487a2, 0x478fb27b, 0x477ada91, 0x4765ffe6, 0x4751227a,
-  0x473c424e, 0x47275f63,
-  0x471279ba, 0x46fd9154, 0x46e8a631, 0x46d3b852, 0x46bec7b8, 0x46a9d464,
-  0x4694de56, 0x467fe590,
-  0x466aea12, 0x4655ebdd, 0x4640eaf2, 0x462be751, 0x4616e0fc, 0x4601d7f3,
-  0x45eccc37, 0x45d7bdc9,
-  0x45c2acaa, 0x45ad98da, 0x4598825a, 0x4583692c, 0x456e4d4f, 0x45592ec6,
-  0x45440d90, 0x452ee9ae,
-  0x4519c321, 0x450499eb, 0x44ef6e0b, 0x44da3f83, 0x44c50e53, 0x44afda7d,
-  0x449aa400, 0x44856adf,
-  0x44702f19, 0x445af0b0, 0x4445afa4, 0x44306bf6, 0x441b25a8, 0x4405dcb9,
-  0x43f0912b, 0x43db42fe,
-  0x43c5f234, 0x43b09ecc, 0x439b48c9, 0x4385f02a, 0x437094f1, 0x435b371f,
-  0x4345d6b3, 0x433073b0,
-  0x431b0e15, 0x4305a5e5, 0x42f03b1e, 0x42dacdc3, 0x42c55dd4, 0x42afeb53,
-  0x429a763f, 0x4284fe99,
-  0x426f8463, 0x425a079e, 0x42448849, 0x422f0667, 0x421981f7, 0x4203fafb,
-  0x41ee7174, 0x41d8e561,
-  0x41c356c5, 0x41adc5a0, 0x419831f3, 0x41829bbe, 0x416d0302, 0x415767c1,
-  0x4141c9fb, 0x412c29b1,
-  0x411686e4, 0x4100e194, 0x40eb39c3, 0x40d58f71, 0x40bfe29f, 0x40aa334e,
-  0x4094817f, 0x407ecd32,
-  0x40691669, 0x40535d24, 0x403da165, 0x4027e32b, 0x40122278, 0x3ffc5f4d,
-  0x3fe699aa, 0x3fd0d191,
-  0x3fbb0702, 0x3fa539fd, 0x3f8f6a85, 0x3f799899, 0x3f63c43b, 0x3f4ded6b,
-  0x3f38142a, 0x3f22387a,
-  0x3f0c5a5a, 0x3ef679cc, 0x3ee096d1, 0x3ecab169, 0x3eb4c995, 0x3e9edf57,
-  0x3e88f2ae, 0x3e73039d,
-  0x3e5d1222, 0x3e471e41, 0x3e3127f9, 0x3e1b2f4a, 0x3e053437, 0x3def36c0,
-  0x3dd936e6, 0x3dc334a9,
-  0x3dad300b, 0x3d97290b, 0x3d811fac, 0x3d6b13ee, 0x3d5505d2, 0x3d3ef559,
-  0x3d28e282, 0x3d12cd51,
-  0x3cfcb5c4, 0x3ce69bde, 0x3cd07f9f, 0x3cba6107, 0x3ca44018, 0x3c8e1cd3,
-  0x3c77f737, 0x3c61cf48,
-  0x3c4ba504, 0x3c35786d, 0x3c1f4983, 0x3c091849, 0x3bf2e4be, 0x3bdcaee3,
-  0x3bc676b9, 0x3bb03c42,
-  0x3b99ff7d, 0x3b83c06c, 0x3b6d7f10, 0x3b573b69, 0x3b40f579, 0x3b2aad3f,
-  0x3b1462be, 0x3afe15f6,
-  0x3ae7c6e7, 0x3ad17593, 0x3abb21fb, 0x3aa4cc1e, 0x3a8e7400, 0x3a78199f,
-  0x3a61bcfd, 0x3a4b5e1b,
-  0x3a34fcf9, 0x3a1e9999, 0x3a0833fc, 0x39f1cc21, 0x39db620b, 0x39c4f5ba,
-  0x39ae872f, 0x3998166a,
-  0x3981a36d, 0x396b2e38, 0x3954b6cd, 0x393e3d2c, 0x3927c155, 0x3911434b,
-  0x38fac30e, 0x38e4409e,
-  0x38cdbbfc, 0x38b7352a, 0x38a0ac29, 0x388a20f8, 0x38739399, 0x385d040d,
-  0x38467255, 0x382fde72,
-  0x38194864, 0x3802b02c, 0x37ec15cb, 0x37d57943, 0x37beda93, 0x37a839be,
-  0x379196c3, 0x377af1a3,
-  0x37644a60, 0x374da0fa, 0x3736f573, 0x372047ca, 0x37099802, 0x36f2e61a,
-  0x36dc3214, 0x36c57bf0,
-  0x36aec3b0, 0x36980954, 0x36814cde, 0x366a8e4d, 0x3653cda3, 0x363d0ae2,
-  0x36264609, 0x360f7f19,
-  0x35f8b614, 0x35e1eafa, 0x35cb1dcc, 0x35b44e8c, 0x359d7d39, 0x3586a9d5,
-  0x356fd461, 0x3558fcde,
-  0x3542234c, 0x352b47ad, 0x35146a00, 0x34fd8a48, 0x34e6a885, 0x34cfc4b7,
-  0x34b8dee1, 0x34a1f702,
-  0x348b0d1c, 0x3474212f, 0x345d333c, 0x34464345, 0x342f5149, 0x34185d4b,
-  0x3401674a, 0x33ea6f48,
-  0x33d37546, 0x33bc7944, 0x33a57b44, 0x338e7b46, 0x3377794b, 0x33607554,
-  0x33496f62, 0x33326776,
-  0x331b5d91, 0x330451b3, 0x32ed43de, 0x32d63412, 0x32bf2250, 0x32a80e99,
-  0x3290f8ef, 0x3279e151,
-  0x3262c7c1, 0x324bac40, 0x32348ecf, 0x321d6f6e, 0x32064e1e, 0x31ef2ae1,
-  0x31d805b7, 0x31c0dea1,
-  0x31a9b5a0, 0x31928ab4, 0x317b5de0, 0x31642f23, 0x314cfe7f, 0x3135cbf4,
-  0x311e9783, 0x3107612e,
-  0x30f028f4, 0x30d8eed8, 0x30c1b2da, 0x30aa74fa, 0x3093353a, 0x307bf39b,
-  0x3064b01d, 0x304d6ac1,
-  0x30362389, 0x301eda75, 0x30078f86, 0x2ff042bd, 0x2fd8f41b, 0x2fc1a3a0,
-  0x2faa514f, 0x2f92fd26,
-  0x2f7ba729, 0x2f644f56, 0x2f4cf5b0, 0x2f359a37, 0x2f1e3ced, 0x2f06ddd1,
-  0x2eef7ce5, 0x2ed81a29,
-  0x2ec0b5a0, 0x2ea94f49, 0x2e91e725, 0x2e7a7d36, 0x2e63117c, 0x2e4ba3f8,
-  0x2e3434ac, 0x2e1cc397,
-  0x2e0550bb, 0x2deddc19, 0x2dd665b2, 0x2dbeed86, 0x2da77397, 0x2d8ff7e5,
-  0x2d787a72, 0x2d60fb3e,
-  0x2d497a4a, 0x2d31f797, 0x2d1a7325, 0x2d02ecf7, 0x2ceb650d, 0x2cd3db67,
-  0x2cbc5006, 0x2ca4c2ed,
-  0x2c8d341a, 0x2c75a390, 0x2c5e114f, 0x2c467d58, 0x2c2ee7ad, 0x2c17504d,
-  0x2bffb73a, 0x2be81c74,
-  0x2bd07ffe, 0x2bb8e1d7, 0x2ba14200, 0x2b89a07b, 0x2b71fd48, 0x2b5a5868,
-  0x2b42b1dd, 0x2b2b09a6,
-  0x2b135fc6, 0x2afbb43c, 0x2ae4070a, 0x2acc5831, 0x2ab4a7b1, 0x2a9cf58c,
-  0x2a8541c3, 0x2a6d8c55,
-  0x2a55d545, 0x2a3e1c93, 0x2a266240, 0x2a0ea64d, 0x29f6e8bb, 0x29df298b,
-  0x29c768be, 0x29afa654,
-  0x2997e24f, 0x29801caf, 0x29685576, 0x29508ca4, 0x2938c23a, 0x2920f63a,
-  0x290928a3, 0x28f15978,
-  0x28d988b8, 0x28c1b666, 0x28a9e281, 0x28920d0a, 0x287a3604, 0x28625d6d,
-  0x284a8349, 0x2832a796,
-  0x281aca57, 0x2802eb8c, 0x27eb0b36, 0x27d32956, 0x27bb45ed, 0x27a360fc,
-  0x278b7a84, 0x27739285,
-  0x275ba901, 0x2743bdf9, 0x272bd16d, 0x2713e35f, 0x26fbf3ce, 0x26e402bd,
-  0x26cc102d, 0x26b41c1d,
-  0x269c268f, 0x26842f84, 0x266c36fe, 0x26543cfb, 0x263c417f, 0x26244489,
-  0x260c461b, 0x25f44635,
-  0x25dc44d9, 0x25c44207, 0x25ac3dc0, 0x25943806, 0x257c30d8, 0x25642839,
-  0x254c1e28, 0x253412a8,
-  0x251c05b8, 0x2503f75a, 0x24ebe78f, 0x24d3d657, 0x24bbc3b4, 0x24a3afa6,
-  0x248b9a2f, 0x2473834f,
-  0x245b6b07, 0x24435158, 0x242b3644, 0x241319ca, 0x23fafbec, 0x23e2dcac,
-  0x23cabc09, 0x23b29a05,
-  0x239a76a0, 0x238251dd, 0x236a2bba, 0x2352043b, 0x2339db5e, 0x2321b126,
-  0x23098593, 0x22f158a7,
-  0x22d92a61, 0x22c0fac4, 0x22a8c9cf, 0x22909785, 0x227863e5, 0x22602ef1,
-  0x2247f8aa, 0x222fc111,
-  0x22178826, 0x21ff4dea, 0x21e71260, 0x21ced586, 0x21b6975f, 0x219e57eb,
-  0x2186172b, 0x216dd521,
-  0x215591cc, 0x213d4d2f, 0x21250749, 0x210cc01d, 0x20f477aa, 0x20dc2df2,
-  0x20c3e2f5, 0x20ab96b5,
-  0x20934933, 0x207afa6f, 0x2062aa6b, 0x204a5927, 0x203206a4, 0x2019b2e4,
-  0x20015de7, 0x1fe907ae,
-  0x1fd0b03a, 0x1fb8578b, 0x1f9ffda4, 0x1f87a285, 0x1f6f462f, 0x1f56e8a2,
-  0x1f3e89e0, 0x1f2629ea,
-  0x1f0dc8c0, 0x1ef56664, 0x1edd02d6, 0x1ec49e17, 0x1eac3829, 0x1e93d10c,
-  0x1e7b68c2, 0x1e62ff4a,
-  0x1e4a94a7, 0x1e3228d9, 0x1e19bbe0, 0x1e014dbf, 0x1de8de75, 0x1dd06e04,
-  0x1db7fc6d, 0x1d9f89b1,
-  0x1d8715d0, 0x1d6ea0cc, 0x1d562aa6, 0x1d3db35e, 0x1d253af5, 0x1d0cc16c,
-  0x1cf446c5, 0x1cdbcb00,
-  0x1cc34e1f, 0x1caad021, 0x1c925109, 0x1c79d0d6, 0x1c614f8b, 0x1c48cd27,
-  0x1c3049ac, 0x1c17c51b,
-  0x1bff3f75, 0x1be6b8ba, 0x1bce30ec, 0x1bb5a80c, 0x1b9d1e1a, 0x1b849317,
-  0x1b6c0705, 0x1b5379e5,
-  0x1b3aebb6, 0x1b225c7b, 0x1b09cc34, 0x1af13ae3, 0x1ad8a887, 0x1ac01522,
-  0x1aa780b6, 0x1a8eeb42,
-  0x1a7654c8, 0x1a5dbd49, 0x1a4524c6, 0x1a2c8b3f, 0x1a13f0b6, 0x19fb552c,
-  0x19e2b8a2, 0x19ca1b17,
-  0x19b17c8f, 0x1998dd09, 0x19803c86, 0x19679b07, 0x194ef88e, 0x1936551b,
-  0x191db0af, 0x19050b4b,
-  0x18ec64f0, 0x18d3bda0, 0x18bb155a, 0x18a26c20, 0x1889c1f3, 0x187116d4,
-  0x18586ac3, 0x183fbdc3,
-  0x18270fd3, 0x180e60f4, 0x17f5b129, 0x17dd0070, 0x17c44ecd, 0x17ab9c3e,
-  0x1792e8c6, 0x177a3466,
-  0x17617f1d, 0x1748c8ee, 0x173011d9, 0x171759df, 0x16fea102, 0x16e5e741,
-  0x16cd2c9f, 0x16b4711b,
-  0x169bb4b7, 0x1682f774, 0x166a3953, 0x16517a55, 0x1638ba7a, 0x161ff9c4,
-  0x16073834, 0x15ee75cb,
-  0x15d5b288, 0x15bcee6f, 0x15a4297f, 0x158b63b9, 0x15729d1f, 0x1559d5b1,
-  0x15410d70, 0x1528445d,
-  0x150f7a7a, 0x14f6afc7, 0x14dde445, 0x14c517f4, 0x14ac4ad7, 0x14937cee,
-  0x147aae3a, 0x1461debc,
-  0x14490e74, 0x14303d65, 0x14176b8e, 0x13fe98f1, 0x13e5c58e, 0x13ccf167,
-  0x13b41c7d, 0x139b46d0,
-  0x13827062, 0x13699933, 0x1350c144, 0x1337e897, 0x131f0f2c, 0x13063505,
-  0x12ed5a21, 0x12d47e83,
-  0x12bba22b, 0x12a2c51b, 0x1289e752, 0x127108d2, 0x1258299c, 0x123f49b2,
-  0x12266913, 0x120d87c1,
-  0x11f4a5bd, 0x11dbc307, 0x11c2dfa2, 0x11a9fb8d, 0x119116c9, 0x11783159,
-  0x115f4b3c, 0x11466473,
-  0x112d7d00, 0x111494e4, 0x10fbac1e, 0x10e2c2b2, 0x10c9d89e, 0x10b0ede5,
-  0x10980287, 0x107f1686,
-  0x106629e1, 0x104d3c9b, 0x10344eb4, 0x101b602d, 0x10027107, 0xfe98143,
-  0xfd090e1, 0xfb79fe4,
-  0xf9eae4c, 0xf85bc19, 0xf6cc94e, 0xf53d5ea, 0xf3ae1ee, 0xf21ed5d, 0xf08f836,
-  0xef0027b,
-  0xed70c2c, 0xebe154b, 0xea51dd8, 0xe8c25d5, 0xe732d42, 0xe5a3421, 0xe413a72,
-  0xe284036,
-  0xe0f456f, 0xdf64a1c, 0xddd4e40, 0xdc451dc, 0xdab54ef, 0xd92577b, 0xd795982,
-  0xd605b03,
-  0xd475c00, 0xd2e5c7b, 0xd155c73, 0xcfc5bea, 0xce35ae1, 0xcca5959, 0xcb15752,
-  0xc9854cf,
-  0xc7f51cf, 0xc664e53, 0xc4d4a5d, 0xc3445ee, 0xc1b4107, 0xc023ba7, 0xbe935d2,
-  0xbd02f87,
-  0xbb728c7, 0xb9e2193, 0xb8519ed, 0xb6c11d5, 0xb53094d, 0xb3a0055, 0xb20f6ee,
-  0xb07ed19,
-  0xaeee2d7, 0xad5d829, 0xabccd11, 0xaa3c18e, 0xa8ab5a2, 0xa71a94f, 0xa589c94,
-  0xa3f8f73,
-  0xa2681ed, 0xa0d7403, 0x9f465b5, 0x9db5706, 0x9c247f5, 0x9a93884, 0x99028b3,
-  0x9771884,
-  0x95e07f8, 0x944f70f, 0x92be5ca, 0x912d42c, 0x8f9c233, 0x8e0afe2, 0x8c79d3a,
-  0x8ae8a3a,
-  0x89576e5, 0x87c633c, 0x8634f3e, 0x84a3aee, 0x831264c, 0x8181159, 0x7fefc16,
-  0x7e5e685,
-  0x7ccd0a5, 0x7b3ba78, 0x79aa400, 0x7818d3c, 0x768762e, 0x74f5ed7, 0x7364738,
-  0x71d2f52,
-  0x7041726, 0x6eafeb4, 0x6d1e5fe, 0x6b8cd05, 0x69fb3c9, 0x6869a4c, 0x66d808f,
-  0x6546692,
-  0x63b4c57, 0x62231de, 0x6091729, 0x5effc38, 0x5d6e10c, 0x5bdc5a7, 0x5a4aa09,
-  0x58b8e34,
-  0x5727228, 0x55955e6, 0x540396f, 0x5271cc4, 0x50dffe7, 0x4f4e2d8, 0x4dbc597,
-  0x4c2a827,
-  0x4a98a88, 0x4906cbb, 0x4774ec1, 0x45e309a, 0x4451249, 0x42bf3cd, 0x412d528,
-  0x3f9b65b,
-  0x3e09767, 0x3c7784d, 0x3ae590d, 0x39539a9, 0x37c1a22, 0x362fa78, 0x349daac,
-  0x330bac1,
-  0x3179ab5, 0x2fe7a8c, 0x2e55a44, 0x2cc39e1, 0x2b31961, 0x299f8c7, 0x280d813,
-  0x267b747,
-  0x24e9662, 0x2357567, 0x21c5457, 0x2033331, 0x1ea11f7, 0x1d0f0ab, 0x1b7cf4d,
-  0x19eaddd,
-  0x1858c5e, 0x16c6ad0, 0x1534934, 0x13a278a, 0x12105d5, 0x107e414, 0xeec249,
-  0xd5a075,
-  0xbc7e99, 0xa35cb5, 0x8a3acb, 0x7118dc, 0x57f6e9, 0x3ed4f2, 0x25b2f8,
-  0xc90fe,
-
-};
-
-static const q31_t cos_factorsQ31_8192[8192] = {
-  0x7ffffff6, 0x7fffffa7, 0x7fffff09, 0x7ffffe1c, 0x7ffffce1, 0x7ffffb56,
-    0x7ffff97c, 0x7ffff753,
-  0x7ffff4dc, 0x7ffff215, 0x7fffef00, 0x7fffeb9b, 0x7fffe7e8, 0x7fffe3e5,
-    0x7fffdf94, 0x7fffdaf3,
-  0x7fffd604, 0x7fffd0c6, 0x7fffcb39, 0x7fffc55c, 0x7fffbf31, 0x7fffb8b7,
-    0x7fffb1ee, 0x7fffaad6,
-  0x7fffa36f, 0x7fff9bb9, 0x7fff93b4, 0x7fff8b61, 0x7fff82be, 0x7fff79cc,
-    0x7fff708b, 0x7fff66fc,
-  0x7fff5d1d, 0x7fff52ef, 0x7fff4873, 0x7fff3da8, 0x7fff328d, 0x7fff2724,
-    0x7fff1b6b, 0x7fff0f64,
-  0x7fff030e, 0x7ffef669, 0x7ffee975, 0x7ffedc31, 0x7ffece9f, 0x7ffec0be,
-    0x7ffeb28e, 0x7ffea40f,
-  0x7ffe9542, 0x7ffe8625, 0x7ffe76b9, 0x7ffe66fe, 0x7ffe56f5, 0x7ffe469c,
-    0x7ffe35f4, 0x7ffe24fe,
-  0x7ffe13b8, 0x7ffe0224, 0x7ffdf040, 0x7ffdde0e, 0x7ffdcb8d, 0x7ffdb8bc,
-    0x7ffda59d, 0x7ffd922f,
-  0x7ffd7e72, 0x7ffd6a66, 0x7ffd560b, 0x7ffd4161, 0x7ffd2c68, 0x7ffd1720,
-    0x7ffd0189, 0x7ffceba4,
-  0x7ffcd56f, 0x7ffcbeeb, 0x7ffca819, 0x7ffc90f7, 0x7ffc7987, 0x7ffc61c7,
-    0x7ffc49b9, 0x7ffc315b,
-  0x7ffc18af, 0x7ffbffb4, 0x7ffbe66a, 0x7ffbccd0, 0x7ffbb2e8, 0x7ffb98b1,
-    0x7ffb7e2b, 0x7ffb6356,
-  0x7ffb4833, 0x7ffb2cc0, 0x7ffb10fe, 0x7ffaf4ed, 0x7ffad88e, 0x7ffabbdf,
-    0x7ffa9ee2, 0x7ffa8195,
-  0x7ffa63fa, 0x7ffa460f, 0x7ffa27d6, 0x7ffa094e, 0x7ff9ea76, 0x7ff9cb50,
-    0x7ff9abdb, 0x7ff98c17,
-  0x7ff96c04, 0x7ff94ba2, 0x7ff92af1, 0x7ff909f2, 0x7ff8e8a3, 0x7ff8c705,
-    0x7ff8a519, 0x7ff882dd,
-  0x7ff86053, 0x7ff83d79, 0x7ff81a51, 0x7ff7f6da, 0x7ff7d313, 0x7ff7aefe,
-    0x7ff78a9a, 0x7ff765e7,
-  0x7ff740e5, 0x7ff71b94, 0x7ff6f5f4, 0x7ff6d005, 0x7ff6a9c8, 0x7ff6833b,
-    0x7ff65c5f, 0x7ff63535,
-  0x7ff60dbb, 0x7ff5e5f3, 0x7ff5bddc, 0x7ff59576, 0x7ff56cc0, 0x7ff543bc,
-    0x7ff51a69, 0x7ff4f0c7,
-  0x7ff4c6d6, 0x7ff49c96, 0x7ff47208, 0x7ff4472a, 0x7ff41bfd, 0x7ff3f082,
-    0x7ff3c4b7, 0x7ff3989e,
-  0x7ff36c36, 0x7ff33f7e, 0x7ff31278, 0x7ff2e523, 0x7ff2b77f, 0x7ff2898c,
-    0x7ff25b4a, 0x7ff22cb9,
-  0x7ff1fdd9, 0x7ff1ceab, 0x7ff19f2d, 0x7ff16f61, 0x7ff13f45, 0x7ff10edb,
-    0x7ff0de22, 0x7ff0ad19,
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-    0x7fef4d3e, 0x7fef19bf,
-  0x7feee5f0, 0x7feeb1d3, 0x7fee7d67, 0x7fee48ac, 0x7fee13a1, 0x7fedde48,
-    0x7feda8a0, 0x7fed72aa,
-  0x7fed3c64, 0x7fed05cf, 0x7fecceec, 0x7fec97b9, 0x7fec6038, 0x7fec2867,
-    0x7febf048, 0x7febb7da,
-  0x7feb7f1d, 0x7feb4611, 0x7feb0cb6, 0x7fead30c, 0x7fea9914, 0x7fea5ecc,
-    0x7fea2436, 0x7fe9e950,
-  0x7fe9ae1c, 0x7fe97299, 0x7fe936c7, 0x7fe8faa6, 0x7fe8be36, 0x7fe88177,
-    0x7fe84469, 0x7fe8070d,
-  0x7fe7c961, 0x7fe78b67, 0x7fe74d1e, 0x7fe70e85, 0x7fe6cf9e, 0x7fe69068,
-    0x7fe650e3, 0x7fe61110,
-  0x7fe5d0ed, 0x7fe5907b, 0x7fe54fbb, 0x7fe50eac, 0x7fe4cd4d, 0x7fe48ba0,
-    0x7fe449a4, 0x7fe40759,
-  0x7fe3c4bf, 0x7fe381d7, 0x7fe33e9f, 0x7fe2fb19, 0x7fe2b743, 0x7fe2731f,
-    0x7fe22eac, 0x7fe1e9ea,
-  0x7fe1a4d9, 0x7fe15f79, 0x7fe119cb, 0x7fe0d3cd, 0x7fe08d81, 0x7fe046e5,
-    0x7fdffffb, 0x7fdfb8c2,
-  0x7fdf713a, 0x7fdf2963, 0x7fdee13e, 0x7fde98c9, 0x7fde5006, 0x7fde06f3,
-    0x7fddbd92, 0x7fdd73e2,
-  0x7fdd29e3, 0x7fdcdf95, 0x7fdc94f9, 0x7fdc4a0d, 0x7fdbfed3, 0x7fdbb349,
-    0x7fdb6771, 0x7fdb1b4a,
-  0x7fdaced4, 0x7fda820f, 0x7fda34fc, 0x7fd9e799, 0x7fd999e8, 0x7fd94be8,
-    0x7fd8fd98, 0x7fd8aefa,
-  0x7fd8600e, 0x7fd810d2, 0x7fd7c147, 0x7fd7716e, 0x7fd72146, 0x7fd6d0cf,
-    0x7fd68009, 0x7fd62ef4,
-  0x7fd5dd90, 0x7fd58bdd, 0x7fd539dc, 0x7fd4e78c, 0x7fd494ed, 0x7fd441ff,
-    0x7fd3eec2, 0x7fd39b36,
-  0x7fd3475c, 0x7fd2f332, 0x7fd29eba, 0x7fd249f3, 0x7fd1f4dd, 0x7fd19f78,
-    0x7fd149c5, 0x7fd0f3c2,
-  0x7fd09d71, 0x7fd046d1, 0x7fcfefe2, 0x7fcf98a4, 0x7fcf4117, 0x7fcee93c,
-    0x7fce9112, 0x7fce3898,
-  0x7fcddfd0, 0x7fcd86b9, 0x7fcd2d54, 0x7fccd39f, 0x7fcc799c, 0x7fcc1f4a,
-    0x7fcbc4a9, 0x7fcb69b9,
-  0x7fcb0e7a, 0x7fcab2ed, 0x7fca5710, 0x7fc9fae5, 0x7fc99e6b, 0x7fc941a2,
-    0x7fc8e48b, 0x7fc88724,
-  0x7fc8296f, 0x7fc7cb6b, 0x7fc76d18, 0x7fc70e76, 0x7fc6af86, 0x7fc65046,
-    0x7fc5f0b8, 0x7fc590db,
-  0x7fc530af, 0x7fc4d035, 0x7fc46f6b, 0x7fc40e53, 0x7fc3acec, 0x7fc34b36,
-    0x7fc2e931, 0x7fc286de,
-  0x7fc2243b, 0x7fc1c14a, 0x7fc15e0a, 0x7fc0fa7b, 0x7fc0969e, 0x7fc03271,
-    0x7fbfcdf6, 0x7fbf692c,
-  0x7fbf0414, 0x7fbe9eac, 0x7fbe38f6, 0x7fbdd2f0, 0x7fbd6c9c, 0x7fbd05fa,
-    0x7fbc9f08, 0x7fbc37c8,
-  0x7fbbd039, 0x7fbb685b, 0x7fbb002e, 0x7fba97b2, 0x7fba2ee8, 0x7fb9c5cf,
-    0x7fb95c67, 0x7fb8f2b0,
-  0x7fb888ab, 0x7fb81e57, 0x7fb7b3b4, 0x7fb748c2, 0x7fb6dd81, 0x7fb671f2,
-    0x7fb60614, 0x7fb599e7,
-  0x7fb52d6b, 0x7fb4c0a1, 0x7fb45387, 0x7fb3e61f, 0x7fb37869, 0x7fb30a63,
-    0x7fb29c0f, 0x7fb22d6c,
-  0x7fb1be7a, 0x7fb14f39, 0x7fb0dfaa, 0x7fb06fcb, 0x7fafff9e, 0x7faf8f23,
-    0x7faf1e58, 0x7faead3f,
-  0x7fae3bd7, 0x7fadca20, 0x7fad581b, 0x7face5c6, 0x7fac7323, 0x7fac0031,
-    0x7fab8cf1, 0x7fab1962,
-  0x7faaa584, 0x7faa3157, 0x7fa9bcdb, 0x7fa94811, 0x7fa8d2f8, 0x7fa85d90,
-    0x7fa7e7d9, 0x7fa771d4,
-  0x7fa6fb80, 0x7fa684dd, 0x7fa60dec, 0x7fa596ac, 0x7fa51f1d, 0x7fa4a73f,
-    0x7fa42f12, 0x7fa3b697,
-  0x7fa33dcd, 0x7fa2c4b5, 0x7fa24b4d, 0x7fa1d197, 0x7fa15792, 0x7fa0dd3f,
-    0x7fa0629c, 0x7f9fe7ab,
-  0x7f9f6c6b, 0x7f9ef0dd, 0x7f9e7500, 0x7f9df8d4, 0x7f9d7c59, 0x7f9cff90,
-    0x7f9c8278, 0x7f9c0511,
-  0x7f9b875b, 0x7f9b0957, 0x7f9a8b04, 0x7f9a0c62, 0x7f998d72, 0x7f990e33,
-    0x7f988ea5, 0x7f980ec8,
-  0x7f978e9d, 0x7f970e23, 0x7f968d5b, 0x7f960c43, 0x7f958add, 0x7f950929,
-    0x7f948725, 0x7f9404d3,
-  0x7f938232, 0x7f92ff43, 0x7f927c04, 0x7f91f878, 0x7f91749c, 0x7f90f072,
-    0x7f906bf9, 0x7f8fe731,
-  0x7f8f621b, 0x7f8edcb6, 0x7f8e5702, 0x7f8dd0ff, 0x7f8d4aae, 0x7f8cc40f,
-    0x7f8c3d20, 0x7f8bb5e3,
-  0x7f8b2e57, 0x7f8aa67d, 0x7f8a1e54, 0x7f8995dc, 0x7f890d15, 0x7f888400,
-    0x7f87fa9c, 0x7f8770ea,
-  0x7f86e6e9, 0x7f865c99, 0x7f85d1fa, 0x7f85470d, 0x7f84bbd1, 0x7f843047,
-    0x7f83a46e, 0x7f831846,
-  0x7f828bcf, 0x7f81ff0a, 0x7f8171f6, 0x7f80e494, 0x7f8056e3, 0x7f7fc8e3,
-    0x7f7f3a95, 0x7f7eabf8,
-  0x7f7e1d0c, 0x7f7d8dd2, 0x7f7cfe49, 0x7f7c6e71, 0x7f7bde4b, 0x7f7b4dd6,
-    0x7f7abd13, 0x7f7a2c01,
-  0x7f799aa0, 0x7f7908f0, 0x7f7876f2, 0x7f77e4a6, 0x7f77520a, 0x7f76bf21,
-    0x7f762be8, 0x7f759861,
-  0x7f75048b, 0x7f747067, 0x7f73dbf4, 0x7f734732, 0x7f72b222, 0x7f721cc3,
-    0x7f718715, 0x7f70f119,
-  0x7f705ace, 0x7f6fc435, 0x7f6f2d4d, 0x7f6e9617, 0x7f6dfe91, 0x7f6d66be,
-    0x7f6cce9b, 0x7f6c362a,
-  0x7f6b9d6b, 0x7f6b045d, 0x7f6a6b00, 0x7f69d154, 0x7f69375a, 0x7f689d12,
-    0x7f68027b, 0x7f676795,
-  0x7f66cc61, 0x7f6630de, 0x7f65950c, 0x7f64f8ec, 0x7f645c7d, 0x7f63bfc0,
-    0x7f6322b4, 0x7f62855a,
-  0x7f61e7b1, 0x7f6149b9, 0x7f60ab73, 0x7f600cdf, 0x7f5f6dfb, 0x7f5ecec9,
-    0x7f5e2f49, 0x7f5d8f7a,
-  0x7f5cef5c, 0x7f5c4ef0, 0x7f5bae36, 0x7f5b0d2c, 0x7f5a6bd5, 0x7f59ca2e,
-    0x7f592839, 0x7f5885f6,
-  0x7f57e364, 0x7f574083, 0x7f569d54, 0x7f55f9d6, 0x7f55560a, 0x7f54b1ef,
-    0x7f540d86, 0x7f5368ce,
-  0x7f52c3c8, 0x7f521e73, 0x7f5178cf, 0x7f50d2dd, 0x7f502c9d, 0x7f4f860e,
-    0x7f4edf30, 0x7f4e3804,
-  0x7f4d9089, 0x7f4ce8c0, 0x7f4c40a8, 0x7f4b9842, 0x7f4aef8d, 0x7f4a468a,
-    0x7f499d38, 0x7f48f398,
-  0x7f4849a9, 0x7f479f6c, 0x7f46f4e0, 0x7f464a06, 0x7f459edd, 0x7f44f365,
-    0x7f44479f, 0x7f439b8b,
-  0x7f42ef28, 0x7f424277, 0x7f419577, 0x7f40e828, 0x7f403a8b, 0x7f3f8ca0,
-    0x7f3ede66, 0x7f3e2fde,
-  0x7f3d8107, 0x7f3cd1e2, 0x7f3c226e, 0x7f3b72ab, 0x7f3ac29b, 0x7f3a123b,
-    0x7f39618e, 0x7f38b091,
-  0x7f37ff47, 0x7f374dad, 0x7f369bc6, 0x7f35e990, 0x7f35370b, 0x7f348438,
-    0x7f33d116, 0x7f331da6,
-  0x7f3269e8, 0x7f31b5db, 0x7f31017f, 0x7f304cd6, 0x7f2f97dd, 0x7f2ee296,
-    0x7f2e2d01, 0x7f2d771e,
-  0x7f2cc0eb, 0x7f2c0a6b, 0x7f2b539c, 0x7f2a9c7e, 0x7f29e512, 0x7f292d58,
-    0x7f28754f, 0x7f27bcf8,
-  0x7f270452, 0x7f264b5e, 0x7f25921c, 0x7f24d88b, 0x7f241eab, 0x7f23647e,
-    0x7f22aa01, 0x7f21ef37,
-  0x7f21341e, 0x7f2078b6, 0x7f1fbd00, 0x7f1f00fc, 0x7f1e44a9, 0x7f1d8808,
-    0x7f1ccb18, 0x7f1c0dda,
-  0x7f1b504e, 0x7f1a9273, 0x7f19d44a, 0x7f1915d2, 0x7f18570c, 0x7f1797f8,
-    0x7f16d895, 0x7f1618e4,
-  0x7f1558e4, 0x7f149896, 0x7f13d7fa, 0x7f13170f, 0x7f1255d6, 0x7f11944f,
-    0x7f10d279, 0x7f101054,
-  0x7f0f4de2, 0x7f0e8b21, 0x7f0dc811, 0x7f0d04b3, 0x7f0c4107, 0x7f0b7d0d,
-    0x7f0ab8c4, 0x7f09f42d,
-  0x7f092f47, 0x7f086a13, 0x7f07a491, 0x7f06dec0, 0x7f0618a1, 0x7f055233,
-    0x7f048b78, 0x7f03c46d,
-  0x7f02fd15, 0x7f02356e, 0x7f016d79, 0x7f00a535, 0x7effdca4, 0x7eff13c3,
-    0x7efe4a95, 0x7efd8118,
-  0x7efcb74d, 0x7efbed33, 0x7efb22cb, 0x7efa5815, 0x7ef98d11, 0x7ef8c1be,
-    0x7ef7f61d, 0x7ef72a2d,
-  0x7ef65def, 0x7ef59163, 0x7ef4c489, 0x7ef3f760, 0x7ef329e9, 0x7ef25c24,
-    0x7ef18e10, 0x7ef0bfae,
-  0x7eeff0fe, 0x7eef21ff, 0x7eee52b2, 0x7eed8317, 0x7eecb32d, 0x7eebe2f6,
-    0x7eeb1270, 0x7eea419b,
-  0x7ee97079, 0x7ee89f08, 0x7ee7cd49, 0x7ee6fb3b, 0x7ee628df, 0x7ee55635,
-    0x7ee4833d, 0x7ee3aff6,
-  0x7ee2dc61, 0x7ee2087e, 0x7ee1344d, 0x7ee05fcd, 0x7edf8aff, 0x7edeb5e3,
-    0x7edde079, 0x7edd0ac0,
-  0x7edc34b9, 0x7edb5e64, 0x7eda87c0, 0x7ed9b0ce, 0x7ed8d98e, 0x7ed80200,
-    0x7ed72a24, 0x7ed651f9,
-  0x7ed57980, 0x7ed4a0b9, 0x7ed3c7a3, 0x7ed2ee40, 0x7ed2148e, 0x7ed13a8e,
-    0x7ed0603f, 0x7ecf85a3,
-  0x7eceaab8, 0x7ecdcf7f, 0x7eccf3f8, 0x7ecc1822, 0x7ecb3bff, 0x7eca5f8d,
-    0x7ec982cd, 0x7ec8a5bf,
-  0x7ec7c862, 0x7ec6eab7, 0x7ec60cbe, 0x7ec52e77, 0x7ec44fe2, 0x7ec370fe,
-    0x7ec291cd, 0x7ec1b24d,
-  0x7ec0d27f, 0x7ebff263, 0x7ebf11f8, 0x7ebe313f, 0x7ebd5039, 0x7ebc6ee4,
-    0x7ebb8d40, 0x7ebaab4f,
-  0x7eb9c910, 0x7eb8e682, 0x7eb803a6, 0x7eb7207c, 0x7eb63d04, 0x7eb5593d,
-    0x7eb47529, 0x7eb390c6,
-  0x7eb2ac15, 0x7eb1c716, 0x7eb0e1c9, 0x7eaffc2e, 0x7eaf1645, 0x7eae300d,
-    0x7ead4987, 0x7eac62b3,
-  0x7eab7b91, 0x7eaa9421, 0x7ea9ac63, 0x7ea8c457, 0x7ea7dbfc, 0x7ea6f353,
-    0x7ea60a5d, 0x7ea52118,
-  0x7ea43785, 0x7ea34da4, 0x7ea26374, 0x7ea178f7, 0x7ea08e2b, 0x7e9fa312,
-    0x7e9eb7aa, 0x7e9dcbf4,
-  0x7e9cdff0, 0x7e9bf39e, 0x7e9b06fe, 0x7e9a1a10, 0x7e992cd4, 0x7e983f49,
-    0x7e975171, 0x7e96634a,
-  0x7e9574d6, 0x7e948613, 0x7e939702, 0x7e92a7a3, 0x7e91b7f6, 0x7e90c7fb,
-    0x7e8fd7b2, 0x7e8ee71b,
-  0x7e8df636, 0x7e8d0502, 0x7e8c1381, 0x7e8b21b1, 0x7e8a2f94, 0x7e893d28,
-    0x7e884a6f, 0x7e875767,
-  0x7e866411, 0x7e85706d, 0x7e847c7c, 0x7e83883c, 0x7e8293ae, 0x7e819ed2,
-    0x7e80a9a8, 0x7e7fb430,
-  0x7e7ebe6a, 0x7e7dc856, 0x7e7cd1f4, 0x7e7bdb44, 0x7e7ae446, 0x7e79ecf9,
-    0x7e78f55f, 0x7e77fd77,
-  0x7e770541, 0x7e760cbd, 0x7e7513ea, 0x7e741aca, 0x7e73215c, 0x7e7227a0,
-    0x7e712d96, 0x7e70333d,
-  0x7e6f3897, 0x7e6e3da3, 0x7e6d4261, 0x7e6c46d1, 0x7e6b4af2, 0x7e6a4ec6,
-    0x7e69524c, 0x7e685584,
-  0x7e67586e, 0x7e665b0a, 0x7e655d58, 0x7e645f58, 0x7e63610a, 0x7e62626e,
-    0x7e616384, 0x7e60644c,
-  0x7e5f64c7, 0x7e5e64f3, 0x7e5d64d1, 0x7e5c6461, 0x7e5b63a4, 0x7e5a6298,
-    0x7e59613f, 0x7e585f97,
-  0x7e575da2, 0x7e565b5f, 0x7e5558ce, 0x7e5455ef, 0x7e5352c1, 0x7e524f46,
-    0x7e514b7e, 0x7e504767,
-  0x7e4f4302, 0x7e4e3e4f, 0x7e4d394f, 0x7e4c3400, 0x7e4b2e64, 0x7e4a287a,
-    0x7e492241, 0x7e481bbb,
-  0x7e4714e7, 0x7e460dc5, 0x7e450656, 0x7e43fe98, 0x7e42f68c, 0x7e41ee33,
-    0x7e40e58c, 0x7e3fdc97,
-  0x7e3ed353, 0x7e3dc9c3, 0x7e3cbfe4, 0x7e3bb5b7, 0x7e3aab3c, 0x7e39a074,
-    0x7e38955e, 0x7e3789fa,
-  0x7e367e48, 0x7e357248, 0x7e3465fa, 0x7e33595e, 0x7e324c75, 0x7e313f3e,
-    0x7e3031b9, 0x7e2f23e6,
-  0x7e2e15c5, 0x7e2d0756, 0x7e2bf89a, 0x7e2ae990, 0x7e29da38, 0x7e28ca92,
-    0x7e27ba9e, 0x7e26aa5d,
-  0x7e2599cd, 0x7e2488f0, 0x7e2377c5, 0x7e22664c, 0x7e215486, 0x7e204271,
-    0x7e1f300f, 0x7e1e1d5f,
-  0x7e1d0a61, 0x7e1bf716, 0x7e1ae37c, 0x7e19cf95, 0x7e18bb60, 0x7e17a6dd,
-    0x7e16920d, 0x7e157cee,
-  0x7e146782, 0x7e1351c9, 0x7e123bc1, 0x7e11256c, 0x7e100ec8, 0x7e0ef7d7,
-    0x7e0de099, 0x7e0cc90c,
-  0x7e0bb132, 0x7e0a990a, 0x7e098095, 0x7e0867d1, 0x7e074ec0, 0x7e063561,
-    0x7e051bb4, 0x7e0401ba,
-  0x7e02e772, 0x7e01ccdc, 0x7e00b1f9, 0x7dff96c7, 0x7dfe7b48, 0x7dfd5f7b,
-    0x7dfc4361, 0x7dfb26f9,
-  0x7dfa0a43, 0x7df8ed3f, 0x7df7cfee, 0x7df6b24f, 0x7df59462, 0x7df47628,
-    0x7df357a0, 0x7df238ca,
-  0x7df119a7, 0x7deffa35, 0x7deeda77, 0x7dedba6a, 0x7dec9a10, 0x7deb7968,
-    0x7dea5872, 0x7de9372f,
-  0x7de8159e, 0x7de6f3c0, 0x7de5d193, 0x7de4af1a, 0x7de38c52, 0x7de2693d,
-    0x7de145da, 0x7de02229,
-  0x7ddefe2b, 0x7dddd9e0, 0x7ddcb546, 0x7ddb905f, 0x7dda6b2a, 0x7dd945a8,
-    0x7dd81fd8, 0x7dd6f9ba,
-  0x7dd5d34f, 0x7dd4ac96, 0x7dd38590, 0x7dd25e3c, 0x7dd1369a, 0x7dd00eab,
-    0x7dcee66e, 0x7dcdbde3,
-  0x7dcc950b, 0x7dcb6be6, 0x7dca4272, 0x7dc918b1, 0x7dc7eea3, 0x7dc6c447,
-    0x7dc5999d, 0x7dc46ea6,
-  0x7dc34361, 0x7dc217cf, 0x7dc0ebef, 0x7dbfbfc1, 0x7dbe9346, 0x7dbd667d,
-    0x7dbc3967, 0x7dbb0c03,
-  0x7db9de52, 0x7db8b053, 0x7db78207, 0x7db6536d, 0x7db52485, 0x7db3f550,
-    0x7db2c5cd, 0x7db195fd,
-  0x7db065df, 0x7daf3574, 0x7dae04bb, 0x7dacd3b5, 0x7daba261, 0x7daa70c0,
-    0x7da93ed1, 0x7da80c95,
-  0x7da6da0b, 0x7da5a733, 0x7da4740e, 0x7da3409c, 0x7da20cdc, 0x7da0d8cf,
-    0x7d9fa474, 0x7d9e6fcb,
-  0x7d9d3ad6, 0x7d9c0592, 0x7d9ad001, 0x7d999a23, 0x7d9863f7, 0x7d972d7e,
-    0x7d95f6b7, 0x7d94bfa3,
-  0x7d938841, 0x7d925092, 0x7d911896, 0x7d8fe04c, 0x7d8ea7b4, 0x7d8d6ecf,
-    0x7d8c359d, 0x7d8afc1d,
-  0x7d89c250, 0x7d888835, 0x7d874dcd, 0x7d861317, 0x7d84d814, 0x7d839cc4,
-    0x7d826126, 0x7d81253a,
-  0x7d7fe902, 0x7d7eac7c, 0x7d7d6fa8, 0x7d7c3287, 0x7d7af519, 0x7d79b75d,
-    0x7d787954, 0x7d773afd,
-  0x7d75fc59, 0x7d74bd68, 0x7d737e29, 0x7d723e9d, 0x7d70fec4, 0x7d6fbe9d,
-    0x7d6e7e29, 0x7d6d3d67,
-  0x7d6bfc58, 0x7d6abafc, 0x7d697952, 0x7d68375b, 0x7d66f517, 0x7d65b285,
-    0x7d646fa6, 0x7d632c79,
-  0x7d61e8ff, 0x7d60a538, 0x7d5f6124, 0x7d5e1cc2, 0x7d5cd813, 0x7d5b9316,
-    0x7d5a4dcc, 0x7d590835,
-  0x7d57c251, 0x7d567c1f, 0x7d5535a0, 0x7d53eed3, 0x7d52a7ba, 0x7d516053,
-    0x7d50189e, 0x7d4ed09d,
-  0x7d4d884e, 0x7d4c3fb1, 0x7d4af6c8, 0x7d49ad91, 0x7d48640d, 0x7d471a3c,
-    0x7d45d01d, 0x7d4485b1,
-  0x7d433af8, 0x7d41eff1, 0x7d40a49e, 0x7d3f58fd, 0x7d3e0d0e, 0x7d3cc0d3,
-    0x7d3b744a, 0x7d3a2774,
-  0x7d38da51, 0x7d378ce0, 0x7d363f23, 0x7d34f118, 0x7d33a2bf, 0x7d32541a,
-    0x7d310527, 0x7d2fb5e7,
-  0x7d2e665a, 0x7d2d1680, 0x7d2bc659, 0x7d2a75e4, 0x7d292522, 0x7d27d413,
-    0x7d2682b6, 0x7d25310d,
-  0x7d23df16, 0x7d228cd2, 0x7d213a41, 0x7d1fe762, 0x7d1e9437, 0x7d1d40be,
-    0x7d1becf8, 0x7d1a98e5,
-  0x7d194485, 0x7d17efd8, 0x7d169add, 0x7d154595, 0x7d13f001, 0x7d129a1f,
-    0x7d1143ef, 0x7d0fed73,
-  0x7d0e96aa, 0x7d0d3f93, 0x7d0be82f, 0x7d0a907e, 0x7d093880, 0x7d07e035,
-    0x7d06879d, 0x7d052eb8,
-  0x7d03d585, 0x7d027c05, 0x7d012239, 0x7cffc81f, 0x7cfe6db8, 0x7cfd1304,
-    0x7cfbb803, 0x7cfa5cb4,
-  0x7cf90119, 0x7cf7a531, 0x7cf648fb, 0x7cf4ec79, 0x7cf38fa9, 0x7cf2328c,
-    0x7cf0d522, 0x7cef776b,
-  0x7cee1967, 0x7cecbb16, 0x7ceb5c78, 0x7ce9fd8d, 0x7ce89e55, 0x7ce73ed0,
-    0x7ce5defd, 0x7ce47ede,
-  0x7ce31e72, 0x7ce1bdb8, 0x7ce05cb2, 0x7cdefb5e, 0x7cdd99be, 0x7cdc37d0,
-    0x7cdad596, 0x7cd9730e,
-  0x7cd8103a, 0x7cd6ad18, 0x7cd549aa, 0x7cd3e5ee, 0x7cd281e5, 0x7cd11d90,
-    0x7ccfb8ed, 0x7cce53fe,
-  0x7ccceec1, 0x7ccb8937, 0x7cca2361, 0x7cc8bd3d, 0x7cc756cd, 0x7cc5f010,
-    0x7cc48905, 0x7cc321ae,
-  0x7cc1ba09, 0x7cc05218, 0x7cbee9da, 0x7cbd814f, 0x7cbc1877, 0x7cbaaf51,
-    0x7cb945df, 0x7cb7dc20,
-  0x7cb67215, 0x7cb507bc, 0x7cb39d16, 0x7cb23223, 0x7cb0c6e4, 0x7caf5b57,
-    0x7cadef7e, 0x7cac8358,
-  0x7cab16e4, 0x7ca9aa24, 0x7ca83d17, 0x7ca6cfbd, 0x7ca56216, 0x7ca3f423,
-    0x7ca285e2, 0x7ca11755,
-  0x7c9fa87a, 0x7c9e3953, 0x7c9cc9df, 0x7c9b5a1e, 0x7c99ea10, 0x7c9879b6,
-    0x7c97090e, 0x7c95981a,
-  0x7c9426d8, 0x7c92b54a, 0x7c91436f, 0x7c8fd148, 0x7c8e5ed3, 0x7c8cec12,
-    0x7c8b7903, 0x7c8a05a8,
-  0x7c889200, 0x7c871e0c, 0x7c85a9ca, 0x7c84353c, 0x7c82c060, 0x7c814b39,
-    0x7c7fd5c4, 0x7c7e6002,
-  0x7c7ce9f4, 0x7c7b7399, 0x7c79fcf1, 0x7c7885fc, 0x7c770eba, 0x7c75972c,
-    0x7c741f51, 0x7c72a729,
-  0x7c712eb5, 0x7c6fb5f3, 0x7c6e3ce5, 0x7c6cc38a, 0x7c6b49e3, 0x7c69cfee,
-    0x7c6855ad, 0x7c66db1f,
-  0x7c656045, 0x7c63e51e, 0x7c6269aa, 0x7c60ede9, 0x7c5f71db, 0x7c5df581,
-    0x7c5c78da, 0x7c5afbe6,
-  0x7c597ea6, 0x7c580119, 0x7c56833f, 0x7c550519, 0x7c5386a6, 0x7c5207e6,
-    0x7c5088d9, 0x7c4f0980,
-  0x7c4d89da, 0x7c4c09e8, 0x7c4a89a8, 0x7c49091c, 0x7c478844, 0x7c46071f,
-    0x7c4485ad, 0x7c4303ee,
-  0x7c4181e3, 0x7c3fff8b, 0x7c3e7ce7, 0x7c3cf9f5, 0x7c3b76b8, 0x7c39f32d,
-    0x7c386f56, 0x7c36eb33,
-  0x7c3566c2, 0x7c33e205, 0x7c325cfc, 0x7c30d7a6, 0x7c2f5203, 0x7c2dcc14,
-    0x7c2c45d8, 0x7c2abf4f,
-  0x7c29387a, 0x7c27b158, 0x7c2629ea, 0x7c24a22f, 0x7c231a28, 0x7c2191d4,
-    0x7c200933, 0x7c1e8046,
-  0x7c1cf70c, 0x7c1b6d86, 0x7c19e3b3, 0x7c185994, 0x7c16cf28, 0x7c15446f,
-    0x7c13b96a, 0x7c122e19,
-  0x7c10a27b, 0x7c0f1690, 0x7c0d8a59, 0x7c0bfdd5, 0x7c0a7105, 0x7c08e3e8,
-    0x7c07567f, 0x7c05c8c9,
-  0x7c043ac7, 0x7c02ac78, 0x7c011ddd, 0x7bff8ef5, 0x7bfdffc1, 0x7bfc7041,
-    0x7bfae073, 0x7bf9505a,
-  0x7bf7bff4, 0x7bf62f41, 0x7bf49e42, 0x7bf30cf6, 0x7bf17b5e, 0x7befe97a,
-    0x7bee5749, 0x7becc4cc,
-  0x7beb3202, 0x7be99eec, 0x7be80b89, 0x7be677da, 0x7be4e3df, 0x7be34f97,
-    0x7be1bb02, 0x7be02621,
-  0x7bde90f4, 0x7bdcfb7b, 0x7bdb65b5, 0x7bd9cfa2, 0x7bd83944, 0x7bd6a298,
-    0x7bd50ba1, 0x7bd3745d,
-  0x7bd1dccc, 0x7bd044f0, 0x7bceacc7, 0x7bcd1451, 0x7bcb7b8f, 0x7bc9e281,
-    0x7bc84927, 0x7bc6af80,
-  0x7bc5158c, 0x7bc37b4d, 0x7bc1e0c1, 0x7bc045e9, 0x7bbeaac4, 0x7bbd0f53,
-    0x7bbb7396, 0x7bb9d78c,
-  0x7bb83b36, 0x7bb69e94, 0x7bb501a5, 0x7bb3646a, 0x7bb1c6e3, 0x7bb02910,
-    0x7bae8af0, 0x7bacec84,
-  0x7bab4dcc, 0x7ba9aec7, 0x7ba80f76, 0x7ba66fd9, 0x7ba4cfef, 0x7ba32fba,
-    0x7ba18f38, 0x7b9fee69,
-  0x7b9e4d4f, 0x7b9cabe8, 0x7b9b0a35, 0x7b996836, 0x7b97c5ea, 0x7b962352,
-    0x7b94806e, 0x7b92dd3e,
-  0x7b9139c2, 0x7b8f95f9, 0x7b8df1e4, 0x7b8c4d83, 0x7b8aa8d6, 0x7b8903dc,
-    0x7b875e96, 0x7b85b904,
-  0x7b841326, 0x7b826cfc, 0x7b80c686, 0x7b7f1fc3, 0x7b7d78b4, 0x7b7bd159,
-    0x7b7a29b2, 0x7b7881be,
-  0x7b76d97f, 0x7b7530f3, 0x7b73881b, 0x7b71def7, 0x7b703587, 0x7b6e8bcb,
-    0x7b6ce1c2, 0x7b6b376e,
-  0x7b698ccd, 0x7b67e1e0, 0x7b6636a7, 0x7b648b22, 0x7b62df51, 0x7b613334,
-    0x7b5f86ca, 0x7b5dda15,
-  0x7b5c2d13, 0x7b5a7fc6, 0x7b58d22c, 0x7b572446, 0x7b557614, 0x7b53c796,
-    0x7b5218cc, 0x7b5069b6,
-  0x7b4eba53, 0x7b4d0aa5, 0x7b4b5aab, 0x7b49aa64, 0x7b47f9d2, 0x7b4648f3,
-    0x7b4497c9, 0x7b42e652,
-  0x7b413490, 0x7b3f8281, 0x7b3dd026, 0x7b3c1d80, 0x7b3a6a8d, 0x7b38b74e,
-    0x7b3703c3, 0x7b354fed,
-  0x7b339bca, 0x7b31e75b, 0x7b3032a0, 0x7b2e7d9a, 0x7b2cc847, 0x7b2b12a8,
-    0x7b295cbe, 0x7b27a687,
-  0x7b25f004, 0x7b243936, 0x7b22821b, 0x7b20cab5, 0x7b1f1302, 0x7b1d5b04,
-    0x7b1ba2b9, 0x7b19ea23,
-  0x7b183141, 0x7b167813, 0x7b14be99, 0x7b1304d3, 0x7b114ac1, 0x7b0f9063,
-    0x7b0dd5b9, 0x7b0c1ac4,
-  0x7b0a5f82, 0x7b08a3f5, 0x7b06e81b, 0x7b052bf6, 0x7b036f85, 0x7b01b2c8,
-    0x7afff5bf, 0x7afe386a,
-  0x7afc7aca, 0x7afabcdd, 0x7af8fea5, 0x7af74021, 0x7af58151, 0x7af3c235,
-    0x7af202cd, 0x7af0431a,
-  0x7aee831a, 0x7aecc2cf, 0x7aeb0238, 0x7ae94155, 0x7ae78026, 0x7ae5beac,
-    0x7ae3fce6, 0x7ae23ad4,
-  0x7ae07876, 0x7adeb5cc, 0x7adcf2d6, 0x7adb2f95, 0x7ad96c08, 0x7ad7a82f,
-    0x7ad5e40a, 0x7ad41f9a,
-  0x7ad25ade, 0x7ad095d6, 0x7aced082, 0x7acd0ae3, 0x7acb44f8, 0x7ac97ec1,
-    0x7ac7b83e, 0x7ac5f170,
-  0x7ac42a55, 0x7ac262ef, 0x7ac09b3e, 0x7abed341, 0x7abd0af7, 0x7abb4263,
-    0x7ab97982, 0x7ab7b056,
-  0x7ab5e6de, 0x7ab41d1b, 0x7ab2530b, 0x7ab088b0, 0x7aaebe0a, 0x7aacf318,
-    0x7aab27da, 0x7aa95c50,
-  0x7aa7907b, 0x7aa5c45a, 0x7aa3f7ed, 0x7aa22b35, 0x7aa05e31, 0x7a9e90e1,
-    0x7a9cc346, 0x7a9af55f,
-  0x7a99272d, 0x7a9758af, 0x7a9589e5, 0x7a93bad0, 0x7a91eb6f, 0x7a901bc2,
-    0x7a8e4bca, 0x7a8c7b87,
-  0x7a8aaaf7, 0x7a88da1c, 0x7a8708f6, 0x7a853784, 0x7a8365c6, 0x7a8193bd,
-    0x7a7fc168, 0x7a7deec8,
-  0x7a7c1bdc, 0x7a7a48a4, 0x7a787521, 0x7a76a153, 0x7a74cd38, 0x7a72f8d3,
-    0x7a712422, 0x7a6f4f25,
-  0x7a6d79dd, 0x7a6ba449, 0x7a69ce6a, 0x7a67f83f, 0x7a6621c9, 0x7a644b07,
-    0x7a6273fa, 0x7a609ca1,
-  0x7a5ec4fc, 0x7a5ced0d, 0x7a5b14d1, 0x7a593c4b, 0x7a576379, 0x7a558a5b,
-    0x7a53b0f2, 0x7a51d73d,
-  0x7a4ffd3d, 0x7a4e22f2, 0x7a4c485b, 0x7a4a6d78, 0x7a48924b, 0x7a46b6d1,
-    0x7a44db0d, 0x7a42fefd,
-  0x7a4122a1, 0x7a3f45fa, 0x7a3d6908, 0x7a3b8bca, 0x7a39ae41, 0x7a37d06d,
-    0x7a35f24d, 0x7a3413e2,
-  0x7a32352b, 0x7a305629, 0x7a2e76dc, 0x7a2c9743, 0x7a2ab75f, 0x7a28d72f,
-    0x7a26f6b4, 0x7a2515ee,
-  0x7a2334dd, 0x7a215380, 0x7a1f71d7, 0x7a1d8fe4, 0x7a1bada5, 0x7a19cb1b,
-    0x7a17e845, 0x7a160524,
-  0x7a1421b8, 0x7a123e01, 0x7a1059fe, 0x7a0e75b0, 0x7a0c9117, 0x7a0aac32,
-    0x7a08c702, 0x7a06e187,
-  0x7a04fbc1, 0x7a0315af, 0x7a012f52, 0x79ff48aa, 0x79fd61b6, 0x79fb7a77,
-    0x79f992ed, 0x79f7ab18,
-  0x79f5c2f8, 0x79f3da8c, 0x79f1f1d5, 0x79f008d3, 0x79ee1f86, 0x79ec35ed,
-    0x79ea4c09, 0x79e861da,
-  0x79e67760, 0x79e48c9b, 0x79e2a18a, 0x79e0b62e, 0x79deca87, 0x79dcde95,
-    0x79daf258, 0x79d905d0,
-  0x79d718fc, 0x79d52bdd, 0x79d33e73, 0x79d150be, 0x79cf62be, 0x79cd7473,
-    0x79cb85dc, 0x79c996fb,
-  0x79c7a7ce, 0x79c5b856, 0x79c3c893, 0x79c1d885, 0x79bfe82c, 0x79bdf788,
-    0x79bc0698, 0x79ba155e,
-  0x79b823d8, 0x79b63207, 0x79b43fec, 0x79b24d85, 0x79b05ad3, 0x79ae67d6,
-    0x79ac748e, 0x79aa80fb,
-  0x79a88d1d, 0x79a698f4, 0x79a4a480, 0x79a2afc1, 0x79a0bab6, 0x799ec561,
-    0x799ccfc1, 0x799ad9d5,
-  0x7998e39f, 0x7996ed1e, 0x7994f651, 0x7992ff3a, 0x799107d8, 0x798f102a,
-    0x798d1832, 0x798b1fef,
-  0x79892761, 0x79872e87, 0x79853563, 0x79833bf4, 0x7981423a, 0x797f4835,
-    0x797d4de5, 0x797b534a,
-  0x79795864, 0x79775d33, 0x797561b8, 0x797365f1, 0x797169df, 0x796f6d83,
-    0x796d70dc, 0x796b73e9,
-  0x796976ac, 0x79677924, 0x79657b51, 0x79637d33, 0x79617eca, 0x795f8017,
-    0x795d8118, 0x795b81cf,
-  0x7959823b, 0x7957825c, 0x79558232, 0x795381bd, 0x795180fe, 0x794f7ff3,
-    0x794d7e9e, 0x794b7cfe,
-  0x79497b13, 0x794778dd, 0x7945765d, 0x79437391, 0x7941707b, 0x793f6d1a,
-    0x793d696f, 0x793b6578,
-  0x79396137, 0x79375cab, 0x793557d4, 0x793352b2, 0x79314d46, 0x792f478f,
-    0x792d418d, 0x792b3b40,
-  0x792934a9, 0x79272dc7, 0x7925269a, 0x79231f22, 0x79211760, 0x791f0f53,
-    0x791d06fb, 0x791afe59,
-  0x7918f56c, 0x7916ec34, 0x7914e2b2, 0x7912d8e4, 0x7910cecc, 0x790ec46a,
-    0x790cb9bd, 0x790aaec5,
-  0x7908a382, 0x790697f5, 0x79048c1d, 0x79027ffa, 0x7900738d, 0x78fe66d5,
-    0x78fc59d3, 0x78fa4c86,
-  0x78f83eee, 0x78f6310c, 0x78f422df, 0x78f21467, 0x78f005a5, 0x78edf698,
-    0x78ebe741, 0x78e9d79f,
-  0x78e7c7b2, 0x78e5b77b, 0x78e3a6f9, 0x78e1962d, 0x78df8516, 0x78dd73b5,
-    0x78db6209, 0x78d95012,
-  0x78d73dd1, 0x78d52b46, 0x78d31870, 0x78d1054f, 0x78cef1e4, 0x78ccde2e,
-    0x78caca2e, 0x78c8b5e3,
-  0x78c6a14e, 0x78c48c6e, 0x78c27744, 0x78c061cf, 0x78be4c10, 0x78bc3606,
-    0x78ba1fb2, 0x78b80913,
-  0x78b5f22a, 0x78b3daf7, 0x78b1c379, 0x78afabb0, 0x78ad939d, 0x78ab7b40,
-    0x78a96298, 0x78a749a6,
-  0x78a53069, 0x78a316e2, 0x78a0fd11, 0x789ee2f5, 0x789cc88f, 0x789aadde,
-    0x789892e3, 0x7896779d,
-  0x78945c0d, 0x78924033, 0x7890240e, 0x788e07a0, 0x788beae6, 0x7889cde2,
-    0x7887b094, 0x788592fc,
-  0x78837519, 0x788156ec, 0x787f3875, 0x787d19b3, 0x787afaa7, 0x7878db50,
-    0x7876bbb0, 0x78749bc5,
-  0x78727b8f, 0x78705b10, 0x786e3a46, 0x786c1932, 0x7869f7d3, 0x7867d62a,
-    0x7865b437, 0x786391fa,
-  0x78616f72, 0x785f4ca1, 0x785d2984, 0x785b061e, 0x7858e26e, 0x7856be73,
-    0x78549a2e, 0x7852759e,
-  0x785050c5, 0x784e2ba1, 0x784c0633, 0x7849e07b, 0x7847ba79, 0x7845942c,
-    0x78436d96, 0x784146b5,
-  0x783f1f8a, 0x783cf815, 0x783ad055, 0x7838a84c, 0x78367ff8, 0x7834575a,
-    0x78322e72, 0x78300540,
-  0x782ddbc4, 0x782bb1fd, 0x782987ed, 0x78275d92, 0x782532ed, 0x782307fe,
-    0x7820dcc5, 0x781eb142,
-  0x781c8575, 0x781a595d, 0x78182cfc, 0x78160051, 0x7813d35b, 0x7811a61b,
-    0x780f7892, 0x780d4abe,
-  0x780b1ca0, 0x7808ee38, 0x7806bf86, 0x7804908a, 0x78026145, 0x780031b5,
-    0x77fe01db, 0x77fbd1b6,
-  0x77f9a148, 0x77f77090, 0x77f53f8e, 0x77f30e42, 0x77f0dcac, 0x77eeaacc,
-    0x77ec78a2, 0x77ea462e,
-  0x77e81370, 0x77e5e068, 0x77e3ad17, 0x77e1797b, 0x77df4595, 0x77dd1165,
-    0x77dadcec, 0x77d8a828,
-  0x77d6731a, 0x77d43dc3, 0x77d20822, 0x77cfd236, 0x77cd9c01, 0x77cb6582,
-    0x77c92eb9, 0x77c6f7a6,
-  0x77c4c04a, 0x77c288a3, 0x77c050b2, 0x77be1878, 0x77bbdff4, 0x77b9a726,
-    0x77b76e0e, 0x77b534ac,
-  0x77b2fb00, 0x77b0c10b, 0x77ae86cc, 0x77ac4c43, 0x77aa1170, 0x77a7d653,
-    0x77a59aec, 0x77a35f3c,
-  0x77a12342, 0x779ee6fe, 0x779caa70, 0x779a6d99, 0x77983077, 0x7795f30c,
-    0x7793b557, 0x77917759,
-  0x778f3910, 0x778cfa7e, 0x778abba2, 0x77887c7d, 0x77863d0d, 0x7783fd54,
-    0x7781bd52, 0x777f7d05,
-  0x777d3c6f, 0x777afb8f, 0x7778ba65, 0x777678f2, 0x77743735, 0x7771f52e,
-    0x776fb2de, 0x776d7044,
-  0x776b2d60, 0x7768ea33, 0x7766a6bc, 0x776462fb, 0x77621ef1, 0x775fda9d,
-    0x775d95ff, 0x775b5118,
-  0x77590be7, 0x7756c66c, 0x775480a8, 0x77523a9b, 0x774ff443, 0x774dada2,
-    0x774b66b8, 0x77491f84,
-  0x7746d806, 0x7744903f, 0x7742482e, 0x773fffd4, 0x773db730, 0x773b6e42,
-    0x7739250b, 0x7736db8b,
-  0x773491c0, 0x773247ad, 0x772ffd50, 0x772db2a9, 0x772b67b9, 0x77291c7f,
-    0x7726d0fc, 0x7724852f,
-  0x77223919, 0x771fecb9, 0x771da010, 0x771b531d, 0x771905e1, 0x7716b85b,
-    0x77146a8c, 0x77121c74,
-  0x770fce12, 0x770d7f66, 0x770b3072, 0x7708e133, 0x770691ab, 0x770441da,
-    0x7701f1c0, 0x76ffa15c,
-  0x76fd50ae, 0x76faffb8, 0x76f8ae78, 0x76f65cee, 0x76f40b1b, 0x76f1b8ff,
-    0x76ef6699, 0x76ed13ea,
-  0x76eac0f2, 0x76e86db0, 0x76e61a25, 0x76e3c650, 0x76e17233, 0x76df1dcb,
-    0x76dcc91b, 0x76da7421,
-  0x76d81ede, 0x76d5c952, 0x76d3737c, 0x76d11d5d, 0x76cec6f5, 0x76cc7043,
-    0x76ca1948, 0x76c7c204,
-  0x76c56a77, 0x76c312a0, 0x76c0ba80, 0x76be6217, 0x76bc0965, 0x76b9b069,
-    0x76b75724, 0x76b4fd96,
-  0x76b2a3bf, 0x76b0499e, 0x76adef34, 0x76ab9481, 0x76a93985, 0x76a6de40,
-    0x76a482b1, 0x76a226da,
-  0x769fcab9, 0x769d6e4f, 0x769b119b, 0x7698b49f, 0x76965759, 0x7693f9ca,
-    0x76919bf3, 0x768f3dd2,
-  0x768cdf67, 0x768a80b4, 0x768821b8, 0x7685c272, 0x768362e4, 0x7681030c,
-    0x767ea2eb, 0x767c4281,
-  0x7679e1ce, 0x767780d2, 0x76751f8d, 0x7672bdfe, 0x76705c27, 0x766dfa07,
-    0x766b979d, 0x766934eb,
-  0x7666d1ef, 0x76646eab, 0x76620b1d, 0x765fa747, 0x765d4327, 0x765adebe,
-    0x76587a0d, 0x76561512,
-  0x7653afce, 0x76514a42, 0x764ee46c, 0x764c7e4d, 0x764a17e6, 0x7647b135,
-    0x76454a3c, 0x7642e2f9,
-  0x76407b6e, 0x763e139a, 0x763bab7c, 0x76394316, 0x7636da67, 0x7634716f,
-    0x7632082e, 0x762f9ea4,
-  0x762d34d1, 0x762acab6, 0x76286051, 0x7625f5a3, 0x76238aad, 0x76211f6e,
-    0x761eb3e6, 0x761c4815,
-  0x7619dbfb, 0x76176f98, 0x761502ed, 0x761295f9, 0x761028bb, 0x760dbb35,
-    0x760b4d67, 0x7608df4f,
-  0x760670ee, 0x76040245, 0x76019353, 0x75ff2418, 0x75fcb495, 0x75fa44c8,
-    0x75f7d4b3, 0x75f56455,
-  0x75f2f3ae, 0x75f082bf, 0x75ee1187, 0x75eba006, 0x75e92e3c, 0x75e6bc2a,
-    0x75e449ce, 0x75e1d72b,
-  0x75df643e, 0x75dcf109, 0x75da7d8b, 0x75d809c4, 0x75d595b4, 0x75d3215c,
-    0x75d0acbc, 0x75ce37d2,
-  0x75cbc2a0, 0x75c94d25, 0x75c6d762, 0x75c46156, 0x75c1eb01, 0x75bf7464,
-    0x75bcfd7e, 0x75ba864f,
-  0x75b80ed8, 0x75b59718, 0x75b31f0f, 0x75b0a6be, 0x75ae2e25, 0x75abb542,
-    0x75a93c18, 0x75a6c2a4,
-  0x75a448e8, 0x75a1cee4, 0x759f5496, 0x759cda01, 0x759a5f22, 0x7597e3fc,
-    0x7595688c, 0x7592ecd4,
-  0x759070d4, 0x758df48b, 0x758b77fa, 0x7588fb20, 0x75867dfd, 0x75840093,
-    0x758182df, 0x757f04e3,
-  0x757c869f, 0x757a0812, 0x7577893d, 0x75750a1f, 0x75728ab9, 0x75700b0a,
-    0x756d8b13, 0x756b0ad3,
-  0x75688a4b, 0x7566097b, 0x75638862, 0x75610701, 0x755e8557, 0x755c0365,
-    0x7559812b, 0x7556fea8,
-  0x75547bdd, 0x7551f8c9, 0x754f756e, 0x754cf1c9, 0x754a6ddd, 0x7547e9a8,
-    0x7545652a, 0x7542e065,
-  0x75405b57, 0x753dd600, 0x753b5061, 0x7538ca7b, 0x7536444b, 0x7533bdd4,
-    0x75313714, 0x752eb00c,
-  0x752c28bb, 0x7529a122, 0x75271941, 0x75249118, 0x752208a7, 0x751f7fed,
-    0x751cf6eb, 0x751a6da0,
-  0x7517e40e, 0x75155a33, 0x7512d010, 0x751045a5, 0x750dbaf2, 0x750b2ff6,
-    0x7508a4b2, 0x75061926,
-  0x75038d52, 0x75010136, 0x74fe74d1, 0x74fbe825, 0x74f95b30, 0x74f6cdf3,
-    0x74f4406d, 0x74f1b2a0,
-  0x74ef248b, 0x74ec962d, 0x74ea0787, 0x74e7789a, 0x74e4e964, 0x74e259e6,
-    0x74dfca20, 0x74dd3a11,
-  0x74daa9bb, 0x74d8191d, 0x74d58836, 0x74d2f708, 0x74d06591, 0x74cdd3d2,
-    0x74cb41cc, 0x74c8af7d,
-  0x74c61ce6, 0x74c38a07, 0x74c0f6e0, 0x74be6372, 0x74bbcfbb, 0x74b93bbc,
-    0x74b6a775, 0x74b412e6,
-  0x74b17e0f, 0x74aee8f0, 0x74ac5389, 0x74a9bddb, 0x74a727e4, 0x74a491a5,
-    0x74a1fb1e, 0x749f6450,
-  0x749ccd39, 0x749a35db, 0x74979e34, 0x74950646, 0x74926e10, 0x748fd592,
-    0x748d3ccb, 0x748aa3be,
-  0x74880a68, 0x748570ca, 0x7482d6e4, 0x74803cb7, 0x747da242, 0x747b0784,
-    0x74786c7f, 0x7475d132,
-  0x7473359e, 0x747099c1, 0x746dfd9d, 0x746b6131, 0x7468c47c, 0x74662781,
-    0x74638a3d, 0x7460ecb2,
-  0x745e4ede, 0x745bb0c3, 0x74591261, 0x745673b6, 0x7453d4c4, 0x7451358a,
-    0x744e9608, 0x744bf63e,
-  0x7449562d, 0x7446b5d4, 0x74441533, 0x7441744b, 0x743ed31b, 0x743c31a3,
-    0x74398fe3, 0x7436eddc,
-  0x74344b8d, 0x7431a8f6, 0x742f0618, 0x742c62f2, 0x7429bf84, 0x74271bcf,
-    0x742477d2, 0x7421d38e,
-  0x741f2f01, 0x741c8a2d, 0x7419e512, 0x74173faf, 0x74149a04, 0x7411f412,
-    0x740f4dd8, 0x740ca756,
-  0x740a008d, 0x7407597d, 0x7404b224, 0x74020a85, 0x73ff629d, 0x73fcba6e,
-    0x73fa11f8, 0x73f7693a,
-  0x73f4c034, 0x73f216e7, 0x73ef6d53, 0x73ecc377, 0x73ea1953, 0x73e76ee8,
-    0x73e4c435, 0x73e2193b,
-  0x73df6df9, 0x73dcc270, 0x73da16a0, 0x73d76a88, 0x73d4be28, 0x73d21182,
-    0x73cf6493, 0x73ccb75d,
-  0x73ca09e0, 0x73c75c1c, 0x73c4ae10, 0x73c1ffbc, 0x73bf5121, 0x73bca23f,
-    0x73b9f315, 0x73b743a4,
-  0x73b493ec, 0x73b1e3ec, 0x73af33a5, 0x73ac8316, 0x73a9d240, 0x73a72123,
-    0x73a46fbf, 0x73a1be13,
-  0x739f0c20, 0x739c59e5, 0x7399a763, 0x7396f49a, 0x73944189, 0x73918e32,
-    0x738eda93, 0x738c26ac,
-  0x7389727f, 0x7386be0a, 0x7384094e, 0x7381544a, 0x737e9f00, 0x737be96e,
-    0x73793395, 0x73767d74,
-  0x7373c70d, 0x7371105e, 0x736e5968, 0x736ba22b, 0x7368eaa6, 0x736632db,
-    0x73637ac8, 0x7360c26e,
-  0x735e09cd, 0x735b50e4, 0x735897b5, 0x7355de3e, 0x73532481, 0x73506a7c,
-    0x734db030, 0x734af59d,
-  0x73483ac2, 0x73457fa1, 0x7342c438, 0x73400889, 0x733d4c92, 0x733a9054,
-    0x7337d3d0, 0x73351704,
-  0x733259f1, 0x732f9c97, 0x732cdef6, 0x732a210d, 0x732762de, 0x7324a468,
-    0x7321e5ab, 0x731f26a7,
-  0x731c675b, 0x7319a7c9, 0x7316e7f0, 0x731427cf, 0x73116768, 0x730ea6ba,
-    0x730be5c5, 0x73092489,
-  0x73066306, 0x7303a13b, 0x7300df2a, 0x72fe1cd2, 0x72fb5a34, 0x72f8974e,
-    0x72f5d421, 0x72f310ad,
-  0x72f04cf3, 0x72ed88f1, 0x72eac4a9, 0x72e8001a, 0x72e53b44, 0x72e27627,
-    0x72dfb0c3, 0x72dceb18,
-  0x72da2526, 0x72d75eee, 0x72d4986f, 0x72d1d1a9, 0x72cf0a9c, 0x72cc4348,
-    0x72c97bad, 0x72c6b3cc,
-  0x72c3eba4, 0x72c12335, 0x72be5a7f, 0x72bb9183, 0x72b8c83f, 0x72b5feb5,
-    0x72b334e4, 0x72b06acd,
-  0x72ada06f, 0x72aad5c9, 0x72a80ade, 0x72a53fab, 0x72a27432, 0x729fa872,
-    0x729cdc6b, 0x729a101e,
-  0x7297438a, 0x729476af, 0x7291a98e, 0x728edc26, 0x728c0e77, 0x72894082,
-    0x72867245, 0x7283a3c3,
-  0x7280d4f9, 0x727e05e9, 0x727b3693, 0x727866f6, 0x72759712, 0x7272c6e7,
-    0x726ff676, 0x726d25bf,
-  0x726a54c1, 0x7267837c, 0x7264b1f0, 0x7261e01e, 0x725f0e06, 0x725c3ba7,
-    0x72596901, 0x72569615,
-  0x7253c2e3, 0x7250ef6a, 0x724e1baa, 0x724b47a4, 0x72487357, 0x72459ec4,
-    0x7242c9ea, 0x723ff4ca,
-  0x723d1f63, 0x723a49b6, 0x723773c3, 0x72349d89, 0x7231c708, 0x722ef041,
-    0x722c1934, 0x722941e0,
-  0x72266a46, 0x72239266, 0x7220ba3f, 0x721de1d1, 0x721b091d, 0x72183023,
-    0x721556e3, 0x72127d5c,
-  0x720fa38e, 0x720cc97b, 0x7209ef21, 0x72071480, 0x7204399a, 0x72015e6d,
-    0x71fe82f9, 0x71fba740,
-  0x71f8cb40, 0x71f5eefa, 0x71f3126d, 0x71f0359a, 0x71ed5881, 0x71ea7b22,
-    0x71e79d7c, 0x71e4bf90,
-  0x71e1e15e, 0x71df02e5, 0x71dc2427, 0x71d94522, 0x71d665d6, 0x71d38645,
-    0x71d0a66d, 0x71cdc650,
-  0x71cae5ec, 0x71c80542, 0x71c52451, 0x71c2431b, 0x71bf619e, 0x71bc7fdb,
-    0x71b99dd2, 0x71b6bb83,
-  0x71b3d8ed, 0x71b0f612, 0x71ae12f0, 0x71ab2f89, 0x71a84bdb, 0x71a567e7,
-    0x71a283ad, 0x719f9f2c,
-  0x719cba66, 0x7199d55a, 0x7196f008, 0x71940a6f, 0x71912490, 0x718e3e6c,
-    0x718b5801, 0x71887151,
-  0x71858a5a, 0x7182a31d, 0x717fbb9a, 0x717cd3d2, 0x7179ebc3, 0x7177036e,
-    0x71741ad3, 0x717131f3,
-  0x716e48cc, 0x716b5f5f, 0x716875ad, 0x71658bb4, 0x7162a175, 0x715fb6f1,
-    0x715ccc26, 0x7159e116,
-  0x7156f5c0, 0x71540a24, 0x71511e42, 0x714e321a, 0x714b45ac, 0x714858f8,
-    0x71456bfe, 0x71427ebf,
-  0x713f9139, 0x713ca36e, 0x7139b55d, 0x7136c706, 0x7133d869, 0x7130e987,
-    0x712dfa5e, 0x712b0af0,
-  0x71281b3c, 0x71252b42, 0x71223b02, 0x711f4a7d, 0x711c59b2, 0x711968a1,
-    0x7116774a, 0x711385ad,
-  0x711093cb, 0x710da1a3, 0x710aaf35, 0x7107bc82, 0x7104c989, 0x7101d64a,
-    0x70fee2c5, 0x70fbeefb,
-  0x70f8faeb, 0x70f60695, 0x70f311fa, 0x70f01d19, 0x70ed27f2, 0x70ea3286,
-    0x70e73cd4, 0x70e446dc,
-  0x70e1509f, 0x70de5a1c, 0x70db6353, 0x70d86c45, 0x70d574f1, 0x70d27d58,
-    0x70cf8579, 0x70cc8d54,
-  0x70c994ea, 0x70c69c3a, 0x70c3a345, 0x70c0aa0a, 0x70bdb08a, 0x70bab6c4,
-    0x70b7bcb8, 0x70b4c267,
-  0x70b1c7d1, 0x70aeccf5, 0x70abd1d3, 0x70a8d66c, 0x70a5dac0, 0x70a2dece,
-    0x709fe296, 0x709ce619,
-  0x7099e957, 0x7096ec4f, 0x7093ef01, 0x7090f16e, 0x708df396, 0x708af579,
-    0x7087f715, 0x7084f86d,
-  0x7081f97f, 0x707efa4c, 0x707bfad3, 0x7078fb15, 0x7075fb11, 0x7072fac9,
-    0x706ffa3a, 0x706cf967,
-  0x7069f84e, 0x7066f6f0, 0x7063f54c, 0x7060f363, 0x705df135, 0x705aeec1,
-    0x7057ec08, 0x7054e90a,
-  0x7051e5c7, 0x704ee23e, 0x704bde70, 0x7048da5d, 0x7045d604, 0x7042d166,
-    0x703fcc83, 0x703cc75b,
-  0x7039c1ed, 0x7036bc3b, 0x7033b643, 0x7030b005, 0x702da983, 0x702aa2bb,
-    0x70279baf, 0x7024945d,
-  0x70218cc6, 0x701e84e9, 0x701b7cc8, 0x70187461, 0x70156bb5, 0x701262c4,
-    0x700f598e, 0x700c5013,
-  0x70094653, 0x70063c4e, 0x70033203, 0x70002774, 0x6ffd1c9f, 0x6ffa1185,
-    0x6ff70626, 0x6ff3fa82,
-  0x6ff0ee99, 0x6fede26b, 0x6fead5f8, 0x6fe7c940, 0x6fe4bc43, 0x6fe1af01,
-    0x6fdea17a, 0x6fdb93ae,
-  0x6fd8859d, 0x6fd57746, 0x6fd268ab, 0x6fcf59cb, 0x6fcc4aa6, 0x6fc93b3c,
-    0x6fc62b8d, 0x6fc31b99,
-  0x6fc00b60, 0x6fbcfae2, 0x6fb9ea20, 0x6fb6d918, 0x6fb3c7cb, 0x6fb0b63a,
-    0x6fada464, 0x6faa9248,
-  0x6fa77fe8, 0x6fa46d43, 0x6fa15a59, 0x6f9e472b, 0x6f9b33b7, 0x6f981fff,
-    0x6f950c01, 0x6f91f7bf,
-  0x6f8ee338, 0x6f8bce6c, 0x6f88b95c, 0x6f85a407, 0x6f828e6c, 0x6f7f788d,
-    0x6f7c626a, 0x6f794c01,
-  0x6f763554, 0x6f731e62, 0x6f70072b, 0x6f6cefb0, 0x6f69d7f0, 0x6f66bfeb,
-    0x6f63a7a1, 0x6f608f13,
-  0x6f5d7640, 0x6f5a5d28, 0x6f5743cb, 0x6f542a2a, 0x6f511044, 0x6f4df61a,
-    0x6f4adbab, 0x6f47c0f7,
-  0x6f44a5ff, 0x6f418ac2, 0x6f3e6f40, 0x6f3b537a, 0x6f38376f, 0x6f351b1f,
-    0x6f31fe8b, 0x6f2ee1b2,
-  0x6f2bc495, 0x6f28a733, 0x6f25898d, 0x6f226ba2, 0x6f1f4d72, 0x6f1c2efe,
-    0x6f191045, 0x6f15f148,
-  0x6f12d206, 0x6f0fb280, 0x6f0c92b6, 0x6f0972a6, 0x6f065253, 0x6f0331ba,
-    0x6f0010de, 0x6efcefbd,
-  0x6ef9ce57, 0x6ef6acad, 0x6ef38abe, 0x6ef0688b, 0x6eed4614, 0x6eea2358,
-    0x6ee70058, 0x6ee3dd13,
-  0x6ee0b98a, 0x6edd95bd, 0x6eda71ab, 0x6ed74d55, 0x6ed428ba, 0x6ed103db,
-    0x6ecddeb8, 0x6ecab950,
-  0x6ec793a4, 0x6ec46db4, 0x6ec1477f, 0x6ebe2106, 0x6ebafa49, 0x6eb7d347,
-    0x6eb4ac02, 0x6eb18477,
-  0x6eae5ca9, 0x6eab3496, 0x6ea80c3f, 0x6ea4e3a4, 0x6ea1bac4, 0x6e9e91a1,
-    0x6e9b6839, 0x6e983e8d,
-  0x6e95149c, 0x6e91ea67, 0x6e8ebfef, 0x6e8b9532, 0x6e886a30, 0x6e853eeb,
-    0x6e821361, 0x6e7ee794,
-  0x6e7bbb82, 0x6e788f2c, 0x6e756291, 0x6e7235b3, 0x6e6f0890, 0x6e6bdb2a,
-    0x6e68ad7f, 0x6e657f90,
-  0x6e62515d, 0x6e5f22e6, 0x6e5bf42b, 0x6e58c52c, 0x6e5595e9, 0x6e526662,
-    0x6e4f3696, 0x6e4c0687,
-  0x6e48d633, 0x6e45a59c, 0x6e4274c1, 0x6e3f43a1, 0x6e3c123e, 0x6e38e096,
-    0x6e35aeab, 0x6e327c7b,
-  0x6e2f4a08, 0x6e2c1750, 0x6e28e455, 0x6e25b115, 0x6e227d92, 0x6e1f49cb,
-    0x6e1c15c0, 0x6e18e171,
-  0x6e15acde, 0x6e127807, 0x6e0f42ec, 0x6e0c0d8e, 0x6e08d7eb, 0x6e05a205,
-    0x6e026bda, 0x6dff356c,
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-    0x6cc94e4b, 0x6cc5fe8f,
-  0x6cc2ae90, 0x6cbf5e4d, 0x6cbc0dc8, 0x6cb8bcff, 0x6cb56bf4, 0x6cb21aa5,
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-  0x6bb6605a, 0x6bb2fb3b, 0x6baf95d9, 0x6bac3034, 0x6ba8ca4e, 0x6ba56425,
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-  0x6b9b301b, 0x6b97c8e8, 0x6b946173, 0x6b90f9bc, 0x6b8d91c2, 0x6b8a2986,
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-  0x6b7fef43, 0x6b7c85fe, 0x6b791c76, 0x6b75b2ac, 0x6b7248a0, 0x6b6ede51,
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-  0x6b649dd8, 0x6b613280, 0x6b5dc6e6, 0x6b5a5b0a, 0x6b56eeec, 0x6b53828b,
-    0x6b5015e9, 0x6b4ca904,
-  0x6b493bdd, 0x6b45ce73, 0x6b4260c8, 0x6b3ef2da, 0x6b3b84ab, 0x6b381639,
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-  0x6b2dc956, 0x6b2a59dc, 0x6b26ea1f, 0x6b237a21, 0x6b2009e0, 0x6b1c995d,
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-  0x6b124648, 0x6b0ed4bd, 0x6b0b62f0, 0x6b07f0e1, 0x6b047e90, 0x6b010bfd,
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-  0x6af6b2b7, 0x6af33f1c, 0x6aefcb3f, 0x6aec5720, 0x6ae8e2bf, 0x6ae56e1c,
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-    0x6ac648cb, 0x6ac2d195,
-  0x6abf5a1e, 0x6abbe264, 0x6ab86a68, 0x6ab4f22b, 0x6ab179ac, 0x6aae00eb,
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-  0x6aa3951d, 0x6aa01b55, 0x6a9ca14b, 0x6a992700, 0x6a95ac72, 0x6a9231a3,
-    0x6a8eb692, 0x6a8b3b3f,
-  0x6a87bfab, 0x6a8443d5, 0x6a80c7bd, 0x6a7d4b64, 0x6a79cec8, 0x6a7651ec,
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-  0x6a6bd9cb, 0x6a685be8, 0x6a64ddc2, 0x6a615f5c, 0x6a5de0b3, 0x6a5a61c9,
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-  0x6a4fe382, 0x6a4c6391, 0x6a48e360, 0x6a4562ec, 0x6a41e237, 0x6a3e6140,
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-  0x6a33dcd4, 0x6a305ad7, 0x6a2cd899, 0x6a295619, 0x6a25d358, 0x6a225055,
-    0x6a1ecd11, 0x6a1b498c,
-  0x6a17c5c5, 0x6a1441bc, 0x6a10bd72, 0x6a0d38e7, 0x6a09b41a, 0x6a062f0c,
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-    0x69750433, 0x69717472,
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-  0x6918180c, 0x691481b2, 0x6910eb17, 0x690d543b, 0x6909bd1f, 0x690625c2,
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-  0x68de940f, 0x68daf9a9, 0x68d75f02, 0x68d3c41b, 0x68d028f2, 0x68cc8d8a,
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-  0x68c1b9cc, 0x68be1d61, 0x68ba80b5, 0x68b6e3c8, 0x68b3469b, 0x68afa92e,
-    0x68ac0b7f, 0x68a86d91,
-  0x68a4cf61, 0x68a130f1, 0x689d9241, 0x6899f350, 0x6896541f, 0x6892b4ad,
-    0x688f14fa, 0x688b7507,
-  0x6887d4d4, 0x68843460, 0x688093ab, 0x687cf2b6, 0x68795181, 0x6875b00b,
-    0x68720e55, 0x686e6c5e,
-  0x686aca27, 0x686727b0, 0x686384f8, 0x685fe200, 0x685c3ec7, 0x68589b4e,
-    0x6854f795, 0x6851539b,
-  0x684daf61, 0x684a0ae6, 0x6846662c, 0x6842c131, 0x683f1bf5, 0x683b7679,
-    0x6837d0bd, 0x68342ac1,
-  0x68308485, 0x682cde08, 0x6829374b, 0x6825904d, 0x6821e910, 0x681e4192,
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-  0x68134997, 0x680fa118, 0x680bf85a, 0x68084f5a, 0x6804a61b, 0x6800fc9c,
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-  0x67f5fe9d, 0x67f2541d, 0x67eea95d, 0x67eafe5d, 0x67e7531c, 0x67e3a79c,
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-  0x6744ecb2, 0x67413636, 0x673d7f7b, 0x6739c880, 0x67361145, 0x673259ca,
-    0x672ea210, 0x672aea17,
-  0x672731dd, 0x67237964, 0x671fc0ac, 0x671c07b4, 0x67184e7c, 0x67149504,
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-  0x66eb8c80, 0x66e7d00f, 0x66e4135d, 0x66e0566c, 0x66dc993c, 0x66d8dbcd,
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-  0x6618d6b9, 0x66150c73, 0x661141ed, 0x660d7729, 0x6609ac25, 0x6605e0e3,
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-  0x6561d4a4, 0x655dfe99, 0x655a2850, 0x655651c8, 0x65527b02, 0x654ea3fd,
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-  0x652456ad, 0x65207cbb, 0x651ca28a, 0x6518c81b, 0x6514ed6e, 0x65111283,
-    0x650d3759, 0x65095bf0,
-  0x6505804a, 0x6501a465, 0x64fdc841, 0x64f9ebe0, 0x64f60f40, 0x64f23262,
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-  0x64c7a4cb, 0x64c3c502, 0x64bfe4fc, 0x64bc04b6, 0x64b82433, 0x64b44372,
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-    0x649151bc, 0x648d6e8e,
-  0x64898b22, 0x6485a778, 0x6481c390, 0x647ddf6a, 0x6479fb06, 0x64761664,
-    0x64723184, 0x646e4c66,
-  0x646a670a, 0x64668170, 0x64629b98, 0x645eb582, 0x645acf2e, 0x6456e89d,
-    0x645301cd, 0x644f1ac0,
-  0x644b3375, 0x64474bec, 0x64436425, 0x643f7c20, 0x643b93dd, 0x6437ab5d,
-    0x6433c29f, 0x642fd9a3,
-  0x642bf069, 0x642806f1, 0x64241d3c, 0x64203348, 0x641c4917, 0x64185ea9,
-    0x641473fc, 0x64108912,
-  0x640c9dea, 0x6408b284, 0x6404c6e1, 0x6400db00, 0x63fceee1, 0x63f90285,
-    0x63f515eb, 0x63f12913,
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-    0x63d5a86f, 0x63d1b9aa,
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-    0x63b62b8e, 0x63b23add,
-  0x63ae49ee, 0x63aa58c2, 0x63a66759, 0x63a275b2, 0x639e83cd, 0x639a91ac,
-    0x63969f4c, 0x6392acaf,
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-    0x637703af, 0x63730f27,
-  0x636f1a62, 0x636b2560, 0x63673020, 0x63633aa3, 0x635f44e8, 0x635b4ef0,
-    0x635758bb, 0x63536249,
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-    0x63379e76, 0x6333a619,
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-    0x6317d4e3, 0x6313da9e,
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-    0x62f7fc08, 0x62f3ffda,
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-    0x62d813eb, 0x62d415d4,
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-    0x62b81c8f, 0x62b41c91,
-  0x62b01c57, 0x62ac1bdf, 0x62a81b2b, 0x62a41a3a, 0x62a0190c, 0x629c17a1,
-    0x629815fa, 0x62941415,
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-    0x62780030, 0x6273fc65,
-  0x626ff85e, 0x626bf41a, 0x6267ef99, 0x6263eadc, 0x625fe5e1, 0x625be0ab,
-    0x6257db37, 0x6253d587,
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-    0x6237a714, 0x62339f7e,
-  0x622f97ad, 0x622b8f9e, 0x62278754, 0x62237ecc, 0x621f7608, 0x621b6d08,
-    0x621763cb, 0x62135a51,
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-    0x61d6afdd, 0x61d2a29c,
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-    0x61b63f41, 0x61b2301e,
-  0x61ae20bf, 0x61aa1124, 0x61a6014d, 0x61a1f139, 0x619de0e9, 0x6199d05d,
-    0x6195bf94, 0x6191ae90,
-  0x618d9d4f, 0x61898bd2, 0x61857a19, 0x61816824, 0x617d55f2, 0x61794385,
-    0x617530db, 0x61711df5,
-  0x616d0ad3, 0x6168f775, 0x6164e3db, 0x6160d005, 0x615cbbf3, 0x6158a7a4,
-    0x6154931a, 0x61507e54,
-  0x614c6951, 0x61485413, 0x61443e98, 0x614028e2, 0x613c12f0, 0x6137fcc1,
-    0x6133e657, 0x612fcfb0,
-  0x612bb8ce, 0x6127a1b0, 0x61238a56, 0x611f72c0, 0x611b5aee, 0x611742e0,
-    0x61132a96, 0x610f1210,
-  0x610af94f, 0x6106e051, 0x6102c718, 0x60feada3, 0x60fa93f2, 0x60f67a05,
-    0x60f25fdd, 0x60ee4579,
-  0x60ea2ad8, 0x60e60ffd, 0x60e1f4e5, 0x60ddd991, 0x60d9be02, 0x60d5a237,
-    0x60d18631, 0x60cd69ee,
-  0x60c94d70, 0x60c530b6, 0x60c113c1, 0x60bcf690, 0x60b8d923, 0x60b4bb7a,
-    0x60b09d96, 0x60ac7f76,
-  0x60a8611b, 0x60a44284, 0x60a023b1, 0x609c04a3, 0x6097e559, 0x6093c5d3,
-    0x608fa612, 0x608b8616,
-  0x608765dd, 0x6083456a, 0x607f24ba, 0x607b03d0, 0x6076e2a9, 0x6072c148,
-    0x606e9faa, 0x606a7dd2,
-  0x60665bbd, 0x6062396e, 0x605e16e2, 0x6059f41c, 0x6055d11a, 0x6051addc,
-    0x604d8a63, 0x604966af,
-  0x604542bf, 0x60411e94, 0x603cfa2e, 0x6038d58c, 0x6034b0af, 0x60308b97,
-    0x602c6643, 0x602840b4,
-  0x60241ae9, 0x601ff4e3, 0x601bcea2, 0x6017a826, 0x6013816e, 0x600f5a7b,
-    0x600b334d, 0x60070be4,
-  0x6002e43f, 0x5ffebc5f, 0x5ffa9444, 0x5ff66bee, 0x5ff2435d, 0x5fee1a90,
-    0x5fe9f188, 0x5fe5c845,
-  0x5fe19ec7, 0x5fdd750e, 0x5fd94b19, 0x5fd520ea, 0x5fd0f67f, 0x5fcccbd9,
-    0x5fc8a0f8, 0x5fc475dc,
-  0x5fc04a85, 0x5fbc1ef3, 0x5fb7f326, 0x5fb3c71e, 0x5faf9adb, 0x5fab6e5d,
-    0x5fa741a3, 0x5fa314af,
-  0x5f9ee780, 0x5f9aba16, 0x5f968c70, 0x5f925e90, 0x5f8e3075, 0x5f8a021f,
-    0x5f85d38e, 0x5f81a4c2,
-  0x5f7d75bb, 0x5f794679, 0x5f7516fd, 0x5f70e745, 0x5f6cb753, 0x5f688726,
-    0x5f6456be, 0x5f60261b,
-  0x5f5bf53d, 0x5f57c424, 0x5f5392d1, 0x5f4f6143, 0x5f4b2f7a, 0x5f46fd76,
-    0x5f42cb37, 0x5f3e98be,
-  0x5f3a660a, 0x5f36331b, 0x5f31fff1, 0x5f2dcc8d, 0x5f2998ee, 0x5f256515,
-    0x5f213100, 0x5f1cfcb1,
-  0x5f18c827, 0x5f149363, 0x5f105e64, 0x5f0c292a, 0x5f07f3b6, 0x5f03be07,
-    0x5eff881d, 0x5efb51f9,
-  0x5ef71b9b, 0x5ef2e501, 0x5eeeae2d, 0x5eea771f, 0x5ee63fd6, 0x5ee20853,
-    0x5eddd094, 0x5ed9989c,
-  0x5ed56069, 0x5ed127fb, 0x5eccef53, 0x5ec8b671, 0x5ec47d54, 0x5ec043fc,
-    0x5ebc0a6a, 0x5eb7d09e,
-  0x5eb39697, 0x5eaf5c56, 0x5eab21da, 0x5ea6e724, 0x5ea2ac34, 0x5e9e7109,
-    0x5e9a35a4, 0x5e95fa05,
-  0x5e91be2b, 0x5e8d8217, 0x5e8945c8, 0x5e85093f, 0x5e80cc7c, 0x5e7c8f7f,
-    0x5e785247, 0x5e7414d5,
-  0x5e6fd729, 0x5e6b9943, 0x5e675b22, 0x5e631cc7, 0x5e5ede32, 0x5e5a9f62,
-    0x5e566059, 0x5e522115,
-  0x5e4de197, 0x5e49a1df, 0x5e4561ed, 0x5e4121c0, 0x5e3ce15a, 0x5e38a0b9,
-    0x5e345fde, 0x5e301ec9,
-  0x5e2bdd7a, 0x5e279bf1, 0x5e235a2e, 0x5e1f1830, 0x5e1ad5f9, 0x5e169388,
-    0x5e1250dc, 0x5e0e0df7,
-  0x5e09cad7, 0x5e05877e, 0x5e0143ea, 0x5dfd001d, 0x5df8bc15, 0x5df477d4,
-    0x5df03359, 0x5debeea3,
-  0x5de7a9b4, 0x5de3648b, 0x5ddf1f28, 0x5ddad98b, 0x5dd693b4, 0x5dd24da3,
-    0x5dce0759, 0x5dc9c0d4,
-  0x5dc57a16, 0x5dc1331d, 0x5dbcebeb, 0x5db8a480, 0x5db45cda, 0x5db014fa,
-    0x5dabcce1, 0x5da7848e,
-  0x5da33c01, 0x5d9ef33b, 0x5d9aaa3a, 0x5d966100, 0x5d92178d, 0x5d8dcddf,
-    0x5d8983f8, 0x5d8539d7,
-  0x5d80ef7c, 0x5d7ca4e8, 0x5d785a1a, 0x5d740f12, 0x5d6fc3d1, 0x5d6b7856,
-    0x5d672ca2, 0x5d62e0b4,
-  0x5d5e948c, 0x5d5a482a, 0x5d55fb90, 0x5d51aebb, 0x5d4d61ad, 0x5d491465,
-    0x5d44c6e4, 0x5d40792a,
-  0x5d3c2b35, 0x5d37dd08, 0x5d338ea0, 0x5d2f4000, 0x5d2af125, 0x5d26a212,
-    0x5d2252c5, 0x5d1e033e,
-  0x5d19b37e, 0x5d156385, 0x5d111352, 0x5d0cc2e5, 0x5d087240, 0x5d042161,
-    0x5cffd048, 0x5cfb7ef7,
-  0x5cf72d6b, 0x5cf2dba7, 0x5cee89a9, 0x5cea3772, 0x5ce5e501, 0x5ce19258,
-    0x5cdd3f75, 0x5cd8ec58,
-  0x5cd49903, 0x5cd04574, 0x5ccbf1ab, 0x5cc79daa, 0x5cc3496f, 0x5cbef4fc,
-    0x5cbaa04f, 0x5cb64b68,
-  0x5cb1f649, 0x5cada0f0, 0x5ca94b5e, 0x5ca4f594, 0x5ca09f8f, 0x5c9c4952,
-    0x5c97f2dc, 0x5c939c2c,
-  0x5c8f4544, 0x5c8aee22, 0x5c8696c7, 0x5c823f34, 0x5c7de767, 0x5c798f61,
-    0x5c753722, 0x5c70deaa,
-  0x5c6c85f9, 0x5c682d0f, 0x5c63d3eb, 0x5c5f7a8f, 0x5c5b20fa, 0x5c56c72c,
-    0x5c526d25, 0x5c4e12e5,
-  0x5c49b86d, 0x5c455dbb, 0x5c4102d0, 0x5c3ca7ad, 0x5c384c50, 0x5c33f0bb,
-    0x5c2f94ec, 0x5c2b38e5,
-  0x5c26dca5, 0x5c22802c, 0x5c1e237b, 0x5c19c690, 0x5c15696d, 0x5c110c11,
-    0x5c0cae7c, 0x5c0850ae,
-  0x5c03f2a8, 0x5bff9469, 0x5bfb35f1, 0x5bf6d740, 0x5bf27857, 0x5bee1935,
-    0x5be9b9da, 0x5be55a46,
-  0x5be0fa7a, 0x5bdc9a75, 0x5bd83a37, 0x5bd3d9c1, 0x5bcf7912, 0x5bcb182b,
-    0x5bc6b70b, 0x5bc255b2,
-  0x5bbdf421, 0x5bb99257, 0x5bb53054, 0x5bb0ce19, 0x5bac6ba6, 0x5ba808f9,
-    0x5ba3a615, 0x5b9f42f7,
-  0x5b9adfa2, 0x5b967c13, 0x5b92184d, 0x5b8db44d, 0x5b895016, 0x5b84eba6,
-    0x5b8086fd, 0x5b7c221c,
-  0x5b77bd02, 0x5b7357b0, 0x5b6ef226, 0x5b6a8c63, 0x5b662668, 0x5b61c035,
-    0x5b5d59c9, 0x5b58f324,
-  0x5b548c48, 0x5b502533, 0x5b4bbde6, 0x5b475660, 0x5b42eea2, 0x5b3e86ac,
-    0x5b3a1e7e, 0x5b35b617,
-  0x5b314d78, 0x5b2ce4a1, 0x5b287b91, 0x5b241249, 0x5b1fa8c9, 0x5b1b3f11,
-    0x5b16d521, 0x5b126af8,
-  0x5b0e0098, 0x5b0995ff, 0x5b052b2e, 0x5b00c025, 0x5afc54e3, 0x5af7e96a,
-    0x5af37db8, 0x5aef11cf,
-  0x5aeaa5ad, 0x5ae63953, 0x5ae1ccc1, 0x5add5ff7, 0x5ad8f2f5, 0x5ad485bb,
-    0x5ad01849, 0x5acbaa9f,
-  0x5ac73cbd, 0x5ac2cea3, 0x5abe6050, 0x5ab9f1c6, 0x5ab58304, 0x5ab1140a,
-    0x5aaca4d8, 0x5aa8356f,
-  0x5aa3c5cd, 0x5a9f55f3, 0x5a9ae5e2, 0x5a967598, 0x5a920517, 0x5a8d945d,
-    0x5a89236c, 0x5a84b243,
-  0x5a8040e3, 0x5a7bcf4a, 0x5a775d7a, 0x5a72eb71, 0x5a6e7931, 0x5a6a06ba,
-    0x5a65940a, 0x5a612123,
-  0x5a5cae04, 0x5a583aad, 0x5a53c71e, 0x5a4f5358, 0x5a4adf5a, 0x5a466b24,
-    0x5a41f6b7, 0x5a3d8212,
-  0x5a390d35, 0x5a349821, 0x5a3022d5, 0x5a2bad51, 0x5a273796, 0x5a22c1a3,
-    0x5a1e4b79, 0x5a19d517,
-  0x5a155e7d, 0x5a10e7ac, 0x5a0c70a3, 0x5a07f963, 0x5a0381eb, 0x59ff0a3c,
-    0x59fa9255, 0x59f61a36,
-  0x59f1a1e0, 0x59ed2953, 0x59e8b08e, 0x59e43792, 0x59dfbe5e, 0x59db44f3,
-    0x59d6cb50, 0x59d25176,
-  0x59cdd765, 0x59c95d1c, 0x59c4e29c, 0x59c067e4, 0x59bbecf5, 0x59b771cf,
-    0x59b2f671, 0x59ae7add,
-  0x59a9ff10, 0x59a5830d, 0x59a106d2, 0x599c8a60, 0x59980db6, 0x599390d5,
-    0x598f13bd, 0x598a966e,
-  0x598618e8, 0x59819b2a, 0x597d1d35, 0x59789f09, 0x597420a6, 0x596fa20b,
-    0x596b233a, 0x5966a431,
-  0x596224f1, 0x595da57a, 0x595925cc, 0x5954a5e6, 0x595025ca, 0x594ba576,
-    0x594724ec, 0x5942a42a,
-  0x593e2331, 0x5939a202, 0x5935209b, 0x59309efd, 0x592c1d28, 0x59279b1c,
-    0x592318d9, 0x591e9660,
-  0x591a13af, 0x591590c7, 0x59110da8, 0x590c8a53, 0x590806c6, 0x59038302,
-    0x58feff08, 0x58fa7ad7,
-  0x58f5f66e, 0x58f171cf, 0x58ececf9, 0x58e867ed, 0x58e3e2a9, 0x58df5d2e,
-    0x58dad77d, 0x58d65195,
-  0x58d1cb76, 0x58cd4520, 0x58c8be94, 0x58c437d1, 0x58bfb0d7, 0x58bb29a6,
-    0x58b6a23e, 0x58b21aa0,
-  0x58ad92cb, 0x58a90ac0, 0x58a4827d, 0x589ffa04, 0x589b7155, 0x5896e86f,
-    0x58925f52, 0x588dd5fe,
-  0x58894c74, 0x5884c2b3, 0x588038bb, 0x587bae8d, 0x58772429, 0x5872998e,
-    0x586e0ebc, 0x586983b4,
-  0x5864f875, 0x58606d00, 0x585be154, 0x58575571, 0x5852c958, 0x584e3d09,
-    0x5849b083, 0x584523c7,
-  0x584096d4, 0x583c09ab, 0x58377c4c, 0x5832eeb6, 0x582e60e9, 0x5829d2e6,
-    0x582544ad, 0x5820b63e,
-  0x581c2798, 0x581798bb, 0x581309a9, 0x580e7a60, 0x5809eae1, 0x58055b2b,
-    0x5800cb3f, 0x57fc3b1d,
-  0x57f7aac5, 0x57f31a36, 0x57ee8971, 0x57e9f876, 0x57e56744, 0x57e0d5dd,
-    0x57dc443f, 0x57d7b26b,
-  0x57d32061, 0x57ce8e20, 0x57c9fbaa, 0x57c568fd, 0x57c0d61a, 0x57bc4301,
-    0x57b7afb2, 0x57b31c2d,
-  0x57ae8872, 0x57a9f480, 0x57a56059, 0x57a0cbfb, 0x579c3768, 0x5797a29e,
-    0x57930d9e, 0x578e7869,
-  0x5789e2fd, 0x57854d5b, 0x5780b784, 0x577c2176, 0x57778b32, 0x5772f4b9,
-    0x576e5e09, 0x5769c724,
-  0x57653009, 0x576098b7, 0x575c0130, 0x57576973, 0x5752d180, 0x574e3957,
-    0x5749a0f9, 0x57450864,
-  0x57406f9a, 0x573bd69a, 0x57373d64, 0x5732a3f8, 0x572e0a56, 0x5729707f,
-    0x5724d672, 0x57203c2f,
-  0x571ba1b7, 0x57170708, 0x57126c24, 0x570dd10a, 0x570935bb, 0x57049a36,
-    0x56fffe7b, 0x56fb628b,
-  0x56f6c664, 0x56f22a09, 0x56ed8d77, 0x56e8f0b0, 0x56e453b4, 0x56dfb681,
-    0x56db1919, 0x56d67b7c,
-  0x56d1dda9, 0x56cd3fa1, 0x56c8a162, 0x56c402ef, 0x56bf6446, 0x56bac567,
-    0x56b62653, 0x56b18709,
-  0x56ace78a, 0x56a847d6, 0x56a3a7ec, 0x569f07cc, 0x569a6777, 0x5695c6ed,
-    0x5691262d, 0x568c8538,
-  0x5687e40e, 0x568342ae, 0x567ea118, 0x5679ff4e, 0x56755d4e, 0x5670bb19,
-    0x566c18ae, 0x5667760e,
-  0x5662d339, 0x565e302e, 0x56598cee, 0x5654e979, 0x565045cf, 0x564ba1f0,
-    0x5646fddb, 0x56425991,
-  0x563db512, 0x5639105d, 0x56346b74, 0x562fc655, 0x562b2101, 0x56267b78,
-    0x5621d5ba, 0x561d2fc6,
-  0x5618899e, 0x5613e340, 0x560f3cae, 0x560a95e6, 0x5605eee9, 0x560147b7,
-    0x55fca050, 0x55f7f8b4,
-  0x55f350e3, 0x55eea8dd, 0x55ea00a2, 0x55e55832, 0x55e0af8d, 0x55dc06b3,
-    0x55d75da4, 0x55d2b460,
-  0x55ce0ae7, 0x55c96139, 0x55c4b757, 0x55c00d3f, 0x55bb62f3, 0x55b6b871,
-    0x55b20dbb, 0x55ad62d0,
-  0x55a8b7b0, 0x55a40c5b, 0x559f60d1, 0x559ab513, 0x55960920, 0x55915cf8,
-    0x558cb09b, 0x55880409,
-  0x55835743, 0x557eaa48, 0x5579fd18, 0x55754fb3, 0x5570a21a, 0x556bf44c,
-    0x55674649, 0x55629812,
-  0x555de9a6, 0x55593b05, 0x55548c30, 0x554fdd26, 0x554b2de7, 0x55467e74,
-    0x5541cecc, 0x553d1ef0,
-  0x55386edf, 0x5533be99, 0x552f0e1f, 0x552a5d70, 0x5525ac8d, 0x5520fb75,
-    0x551c4a29, 0x551798a8,
-  0x5512e6f3, 0x550e3509, 0x550982eb, 0x5504d099, 0x55001e12, 0x54fb6b56,
-    0x54f6b866, 0x54f20542,
-  0x54ed51e9, 0x54e89e5c, 0x54e3ea9a, 0x54df36a5, 0x54da827a, 0x54d5ce1c,
-    0x54d11989, 0x54cc64c2,
-  0x54c7afc6, 0x54c2fa96, 0x54be4532, 0x54b98f9a, 0x54b4d9cd, 0x54b023cc,
-    0x54ab6d97, 0x54a6b72e,
-  0x54a20090, 0x549d49bf, 0x549892b9, 0x5493db7f, 0x548f2410, 0x548a6c6e,
-    0x5485b497, 0x5480fc8c,
-  0x547c444d, 0x54778bda, 0x5472d333, 0x546e1a58, 0x54696149, 0x5464a805,
-    0x545fee8e, 0x545b34e3,
-  0x54567b03, 0x5451c0f0, 0x544d06a8, 0x54484c2d, 0x5443917d, 0x543ed699,
-    0x543a1b82, 0x54356037,
-  0x5430a4b7, 0x542be904, 0x54272d1d, 0x54227102, 0x541db4b3, 0x5418f830,
-    0x54143b79, 0x540f7e8e,
-  0x540ac170, 0x5406041d, 0x54014697, 0x53fc88dd, 0x53f7caef, 0x53f30cce,
-    0x53ee4e78, 0x53e98fef,
-  0x53e4d132, 0x53e01242, 0x53db531d, 0x53d693c5, 0x53d1d439, 0x53cd147a,
-    0x53c85486, 0x53c3945f,
-  0x53bed405, 0x53ba1377, 0x53b552b5, 0x53b091bf, 0x53abd096, 0x53a70f39,
-    0x53a24da9, 0x539d8be5,
-  0x5398c9ed, 0x539407c2, 0x538f4564, 0x538a82d1, 0x5385c00c, 0x5380fd12,
-    0x537c39e6, 0x53777685,
-  0x5372b2f2, 0x536def2a, 0x53692b30, 0x53646701, 0x535fa2a0, 0x535ade0b,
-    0x53561942, 0x53515447,
-  0x534c8f17, 0x5347c9b5, 0x5343041f, 0x533e3e55, 0x53397859, 0x5334b229,
-    0x532febc5, 0x532b252f,
-  0x53265e65, 0x53219767, 0x531cd037, 0x531808d3, 0x5313413c, 0x530e7972,
-    0x5309b174, 0x5304e943,
-  0x530020df, 0x52fb5848, 0x52f68f7e, 0x52f1c680, 0x52ecfd4f, 0x52e833ec,
-    0x52e36a55, 0x52dea08a,
-  0x52d9d68d, 0x52d50c5d, 0x52d041f9, 0x52cb7763, 0x52c6ac99, 0x52c1e19d,
-    0x52bd166d, 0x52b84b0a,
-  0x52b37f74, 0x52aeb3ac, 0x52a9e7b0, 0x52a51b81, 0x52a04f1f, 0x529b828a,
-    0x5296b5c3, 0x5291e8c8,
-  0x528d1b9b, 0x52884e3a, 0x528380a7, 0x527eb2e0, 0x5279e4e7, 0x527516bb,
-    0x5270485c, 0x526b79ca,
-  0x5266ab06, 0x5261dc0e, 0x525d0ce4, 0x52583d87, 0x52536df7, 0x524e9e34,
-    0x5249ce3f, 0x5244fe17,
-  0x52402dbc, 0x523b5d2e, 0x52368c6e, 0x5231bb7b, 0x522cea55, 0x522818fc,
-    0x52234771, 0x521e75b3,
-  0x5219a3c3, 0x5214d1a0, 0x520fff4a, 0x520b2cc2, 0x52065a07, 0x52018719,
-    0x51fcb3f9, 0x51f7e0a6,
-  0x51f30d21, 0x51ee3969, 0x51e9657e, 0x51e49162, 0x51dfbd12, 0x51dae890,
-    0x51d613dc, 0x51d13ef5,
-  0x51cc69db, 0x51c79490, 0x51c2bf11, 0x51bde960, 0x51b9137d, 0x51b43d68,
-    0x51af6720, 0x51aa90a5,
-  0x51a5b9f9, 0x51a0e31a, 0x519c0c08, 0x519734c4, 0x51925d4e, 0x518d85a6,
-    0x5188adcb, 0x5183d5be,
-  0x517efd7f, 0x517a250d, 0x51754c69, 0x51707393, 0x516b9a8b, 0x5166c150,
-    0x5161e7e4, 0x515d0e45,
-  0x51583473, 0x51535a70, 0x514e803b, 0x5149a5d3, 0x5144cb39, 0x513ff06d,
-    0x513b156f, 0x51363a3f,
-  0x51315edd, 0x512c8348, 0x5127a782, 0x5122cb8a, 0x511def5f, 0x51191302,
-    0x51143674, 0x510f59b3,
-  0x510a7cc1, 0x51059f9c, 0x5100c246, 0x50fbe4bd, 0x50f70703, 0x50f22916,
-    0x50ed4af8, 0x50e86ca8,
-  0x50e38e25, 0x50deaf71, 0x50d9d08b, 0x50d4f173, 0x50d0122a, 0x50cb32ae,
-    0x50c65301, 0x50c17322,
-  0x50bc9311, 0x50b7b2ce, 0x50b2d259, 0x50adf1b3, 0x50a910db, 0x50a42fd1,
-    0x509f4e95, 0x509a6d28,
-  0x50958b88, 0x5090a9b8, 0x508bc7b5, 0x5086e581, 0x5082031b, 0x507d2083,
-    0x50783dba, 0x50735abf,
-  0x506e7793, 0x50699435, 0x5064b0a5, 0x505fcce4, 0x505ae8f1, 0x505604cd,
-    0x50512077, 0x504c3bef,
-  0x50475736, 0x5042724c, 0x503d8d30, 0x5038a7e2, 0x5033c263, 0x502edcb2,
-    0x5029f6d1, 0x502510bd,
-  0x50202a78, 0x501b4402, 0x50165d5a, 0x50117681, 0x500c8f77, 0x5007a83b,
-    0x5002c0cd, 0x4ffdd92f,
-  0x4ff8f15f, 0x4ff4095e, 0x4fef212b, 0x4fea38c7, 0x4fe55032, 0x4fe0676c,
-    0x4fdb7e74, 0x4fd6954b,
-  0x4fd1abf0, 0x4fccc265, 0x4fc7d8a8, 0x4fc2eeba, 0x4fbe049b, 0x4fb91a4b,
-    0x4fb42fc9, 0x4faf4517,
-  0x4faa5a33, 0x4fa56f1e, 0x4fa083d8, 0x4f9b9861, 0x4f96acb8, 0x4f91c0df,
-    0x4f8cd4d4, 0x4f87e899,
-  0x4f82fc2c, 0x4f7e0f8f, 0x4f7922c0, 0x4f7435c0, 0x4f6f488f, 0x4f6a5b2e,
-    0x4f656d9b, 0x4f607fd7,
-  0x4f5b91e3, 0x4f56a3bd, 0x4f51b566, 0x4f4cc6df, 0x4f47d827, 0x4f42e93d,
-    0x4f3dfa23, 0x4f390ad8,
-  0x4f341b5c, 0x4f2f2baf, 0x4f2a3bd2, 0x4f254bc3, 0x4f205b84, 0x4f1b6b14,
-    0x4f167a73, 0x4f1189a1,
-  0x4f0c989f, 0x4f07a76b, 0x4f02b608, 0x4efdc473, 0x4ef8d2ad, 0x4ef3e0b7,
-    0x4eeeee90, 0x4ee9fc39,
-  0x4ee509b1, 0x4ee016f8, 0x4edb240e, 0x4ed630f4, 0x4ed13da9, 0x4ecc4a2e,
-    0x4ec75682, 0x4ec262a5,
-  0x4ebd6e98, 0x4eb87a5a, 0x4eb385ec, 0x4eae914d, 0x4ea99c7d, 0x4ea4a77d,
-    0x4e9fb24d, 0x4e9abcec,
-  0x4e95c75b, 0x4e90d199, 0x4e8bdba6, 0x4e86e583, 0x4e81ef30, 0x4e7cf8ac,
-    0x4e7801f8, 0x4e730b14,
-  0x4e6e13ff, 0x4e691cba, 0x4e642544, 0x4e5f2d9e, 0x4e5a35c7, 0x4e553dc1,
-    0x4e50458a, 0x4e4b4d22,
-  0x4e46548b, 0x4e415bc3, 0x4e3c62cb, 0x4e3769a2, 0x4e32704a, 0x4e2d76c1,
-    0x4e287d08, 0x4e23831e,
-  0x4e1e8905, 0x4e198ebb, 0x4e149441, 0x4e0f9997, 0x4e0a9ebd, 0x4e05a3b2,
-    0x4e00a878, 0x4dfbad0d,
-  0x4df6b173, 0x4df1b5a8, 0x4decb9ad, 0x4de7bd82, 0x4de2c127, 0x4dddc49c,
-    0x4dd8c7e1, 0x4dd3caf6,
-  0x4dcecdda, 0x4dc9d08f, 0x4dc4d314, 0x4dbfd569, 0x4dbad78e, 0x4db5d983,
-    0x4db0db48, 0x4dabdcdd,
-  0x4da6de43, 0x4da1df78, 0x4d9ce07d, 0x4d97e153, 0x4d92e1f9, 0x4d8de26f,
-    0x4d88e2b5, 0x4d83e2cb,
-  0x4d7ee2b1, 0x4d79e268, 0x4d74e1ef, 0x4d6fe146, 0x4d6ae06d, 0x4d65df64,
-    0x4d60de2c, 0x4d5bdcc4,
-  0x4d56db2d, 0x4d51d965, 0x4d4cd76e, 0x4d47d547, 0x4d42d2f1, 0x4d3dd06b,
-    0x4d38cdb5, 0x4d33cad0,
-  0x4d2ec7bb, 0x4d29c476, 0x4d24c102, 0x4d1fbd5e, 0x4d1ab98b, 0x4d15b588,
-    0x4d10b155, 0x4d0bacf3,
-  0x4d06a862, 0x4d01a3a0, 0x4cfc9eb0, 0x4cf79990, 0x4cf29440, 0x4ced8ec1,
-    0x4ce88913, 0x4ce38335,
-  0x4cde7d28, 0x4cd976eb, 0x4cd4707f, 0x4ccf69e3, 0x4cca6318, 0x4cc55c1e,
-    0x4cc054f4, 0x4cbb4d9b,
-  0x4cb64613, 0x4cb13e5b, 0x4cac3674, 0x4ca72e5e, 0x4ca22619, 0x4c9d1da4,
-    0x4c981500, 0x4c930c2d,
-  0x4c8e032a, 0x4c88f9f8, 0x4c83f097, 0x4c7ee707, 0x4c79dd48, 0x4c74d359,
-    0x4c6fc93b, 0x4c6abeef,
-  0x4c65b473, 0x4c60a9c8, 0x4c5b9eed, 0x4c5693e4, 0x4c5188ac, 0x4c4c7d44,
-    0x4c4771ae, 0x4c4265e8,
-  0x4c3d59f3, 0x4c384dd0, 0x4c33417d, 0x4c2e34fb, 0x4c29284b, 0x4c241b6b,
-    0x4c1f0e5c, 0x4c1a011f,
-  0x4c14f3b2, 0x4c0fe617, 0x4c0ad84c, 0x4c05ca53, 0x4c00bc2b, 0x4bfbadd4,
-    0x4bf69f4e, 0x4bf19099,
-  0x4bec81b5, 0x4be772a3, 0x4be26362, 0x4bdd53f2, 0x4bd84453, 0x4bd33485,
-    0x4bce2488, 0x4bc9145d,
-  0x4bc40403, 0x4bbef37b, 0x4bb9e2c3, 0x4bb4d1dd, 0x4bafc0c8, 0x4baaaf85,
-    0x4ba59e12, 0x4ba08c72,
-  0x4b9b7aa2, 0x4b9668a4, 0x4b915677, 0x4b8c441c, 0x4b873192, 0x4b821ed9,
-    0x4b7d0bf2, 0x4b77f8dc,
-  0x4b72e598, 0x4b6dd225, 0x4b68be84, 0x4b63aab4, 0x4b5e96b6, 0x4b598289,
-    0x4b546e2d, 0x4b4f59a4,
-  0x4b4a44eb, 0x4b453005, 0x4b401aef, 0x4b3b05ac, 0x4b35f03a, 0x4b30da9a,
-    0x4b2bc4cb, 0x4b26aece,
-  0x4b2198a2, 0x4b1c8248, 0x4b176bc0, 0x4b12550a, 0x4b0d3e25, 0x4b082712,
-    0x4b030fd1, 0x4afdf861,
-  0x4af8e0c3, 0x4af3c8f7, 0x4aeeb0fd, 0x4ae998d4, 0x4ae4807d, 0x4adf67f8,
-    0x4ada4f45, 0x4ad53664,
-  0x4ad01d54, 0x4acb0417, 0x4ac5eaab, 0x4ac0d111, 0x4abbb749, 0x4ab69d53,
-    0x4ab1832f, 0x4aac68dc,
-  0x4aa74e5c, 0x4aa233ae, 0x4a9d18d1, 0x4a97fdc7, 0x4a92e28e, 0x4a8dc728,
-    0x4a88ab93, 0x4a838fd1,
-  0x4a7e73e0, 0x4a7957c2, 0x4a743b76, 0x4a6f1efc, 0x4a6a0253, 0x4a64e57d,
-    0x4a5fc879, 0x4a5aab48,
-  0x4a558de8, 0x4a50705a, 0x4a4b529f, 0x4a4634b6, 0x4a41169f, 0x4a3bf85a,
-    0x4a36d9e7, 0x4a31bb47,
-  0x4a2c9c79, 0x4a277d7d, 0x4a225e53, 0x4a1d3efc, 0x4a181f77, 0x4a12ffc4,
-    0x4a0ddfe4, 0x4a08bfd5,
-  0x4a039f9a, 0x49fe7f30, 0x49f95e99, 0x49f43dd4, 0x49ef1ce2, 0x49e9fbc2,
-    0x49e4da74, 0x49dfb8f9,
-  0x49da9750, 0x49d5757a, 0x49d05376, 0x49cb3145, 0x49c60ee6, 0x49c0ec59,
-    0x49bbc9a0, 0x49b6a6b8,
-  0x49b183a3, 0x49ac6061, 0x49a73cf1, 0x49a21954, 0x499cf589, 0x4997d191,
-    0x4992ad6c, 0x498d8919,
-  0x49886499, 0x49833fec, 0x497e1b11, 0x4978f609, 0x4973d0d3, 0x496eab70,
-    0x496985e0, 0x49646023,
-  0x495f3a38, 0x495a1420, 0x4954eddb, 0x494fc768, 0x494aa0c9, 0x494579fc,
-    0x49405302, 0x493b2bdb,
-  0x49360486, 0x4930dd05, 0x492bb556, 0x49268d7a, 0x49216571, 0x491c3d3b,
-    0x491714d8, 0x4911ec47,
-  0x490cc38a, 0x49079aa0, 0x49027188, 0x48fd4844, 0x48f81ed2, 0x48f2f534,
-    0x48edcb68, 0x48e8a170,
-  0x48e3774a, 0x48de4cf8, 0x48d92278, 0x48d3f7cc, 0x48ceccf3, 0x48c9a1ed,
-    0x48c476b9, 0x48bf4b59,
-  0x48ba1fcd, 0x48b4f413, 0x48afc82c, 0x48aa9c19, 0x48a56fd9, 0x48a0436c,
-    0x489b16d2, 0x4895ea0b,
-  0x4890bd18, 0x488b8ff8, 0x488662ab, 0x48813531, 0x487c078b, 0x4876d9b8,
-    0x4871abb8, 0x486c7d8c,
-  0x48674f33, 0x486220ad, 0x485cf1fa, 0x4857c31b, 0x48529410, 0x484d64d7,
-    0x48483572, 0x484305e1,
-  0x483dd623, 0x4838a638, 0x48337621, 0x482e45dd, 0x4829156d, 0x4823e4d0,
-    0x481eb407, 0x48198311,
-  0x481451ef, 0x480f20a0, 0x4809ef25, 0x4804bd7e, 0x47ff8baa, 0x47fa59a9,
-    0x47f5277d, 0x47eff523,
-  0x47eac29e, 0x47e58fec, 0x47e05d0e, 0x47db2a03, 0x47d5f6cc, 0x47d0c369,
-    0x47cb8fd9, 0x47c65c1d,
-  0x47c12835, 0x47bbf421, 0x47b6bfe0, 0x47b18b74, 0x47ac56da, 0x47a72215,
-    0x47a1ed24, 0x479cb806,
-  0x479782bc, 0x47924d46, 0x478d17a4, 0x4787e1d6, 0x4782abdb, 0x477d75b5,
-    0x47783f62, 0x477308e3,
-  0x476dd239, 0x47689b62, 0x4763645f, 0x475e2d30, 0x4758f5d5, 0x4753be4e,
-    0x474e869b, 0x47494ebc,
-  0x474416b1, 0x473ede7a, 0x4739a617, 0x47346d89, 0x472f34ce, 0x4729fbe7,
-    0x4724c2d5, 0x471f8996,
-  0x471a502c, 0x47151696, 0x470fdcd4, 0x470aa2e6, 0x470568cd, 0x47002e87,
-    0x46faf416, 0x46f5b979,
-  0x46f07eb0, 0x46eb43bc, 0x46e6089b, 0x46e0cd4f, 0x46db91d8, 0x46d65634,
-    0x46d11a65, 0x46cbde6a,
-  0x46c6a244, 0x46c165f1, 0x46bc2974, 0x46b6ecca, 0x46b1aff5, 0x46ac72f4,
-    0x46a735c8, 0x46a1f870,
-  0x469cbaed, 0x46977d3e, 0x46923f63, 0x468d015d, 0x4687c32c, 0x468284cf,
-    0x467d4646, 0x46780792,
-  0x4672c8b3, 0x466d89a8, 0x46684a71, 0x46630b0f, 0x465dcb82, 0x46588bc9,
-    0x46534be5, 0x464e0bd6,
-  0x4648cb9b, 0x46438b35, 0x463e4aa3, 0x463909e7, 0x4633c8fe, 0x462e87eb,
-    0x462946ac, 0x46240542,
-  0x461ec3ad, 0x461981ec, 0x46144001, 0x460efde9, 0x4609bba7, 0x4604793a,
-    0x45ff36a1, 0x45f9f3dd,
-  0x45f4b0ee, 0x45ef6dd4, 0x45ea2a8f, 0x45e4e71f, 0x45dfa383, 0x45da5fbc,
-    0x45d51bcb, 0x45cfd7ae,
-  0x45ca9366, 0x45c54ef3, 0x45c00a55, 0x45bac58c, 0x45b58098, 0x45b03b79,
-    0x45aaf630, 0x45a5b0bb,
-  0x45a06b1b, 0x459b2550, 0x4595df5a, 0x45909939, 0x458b52ee, 0x45860c77,
-    0x4580c5d6, 0x457b7f0a,
-  0x45763813, 0x4570f0f1, 0x456ba9a4, 0x4566622c, 0x45611a8a, 0x455bd2bc,
-    0x45568ac4, 0x455142a2,
-  0x454bfa54, 0x4546b1dc, 0x45416939, 0x453c206b, 0x4536d773, 0x45318e4f,
-    0x452c4502, 0x4526fb89,
-  0x4521b1e6, 0x451c6818, 0x45171e20, 0x4511d3fd, 0x450c89af, 0x45073f37,
-    0x4501f494, 0x44fca9c6,
-  0x44f75ecf, 0x44f213ac, 0x44ecc85f, 0x44e77ce7, 0x44e23145, 0x44dce579,
-    0x44d79982, 0x44d24d60,
-  0x44cd0114, 0x44c7b49e, 0x44c267fd, 0x44bd1b32, 0x44b7ce3c, 0x44b2811c,
-    0x44ad33d2, 0x44a7e65d,
-  0x44a298be, 0x449d4af5, 0x4497fd01, 0x4492aee3, 0x448d609b, 0x44881228,
-    0x4482c38b, 0x447d74c4,
-  0x447825d2, 0x4472d6b7, 0x446d8771, 0x44683801, 0x4462e866, 0x445d98a2,
-    0x445848b3, 0x4452f89b,
-  0x444da858, 0x444857ea, 0x44430753, 0x443db692, 0x443865a7, 0x44331491,
-    0x442dc351, 0x442871e8,
-  0x44232054, 0x441dce96, 0x44187caf, 0x44132a9d, 0x440dd861, 0x440885fc,
-    0x4403336c, 0x43fde0b2,
-  0x43f88dcf, 0x43f33ac1, 0x43ede78a, 0x43e89429, 0x43e3409d, 0x43ddece8,
-    0x43d8990a, 0x43d34501,
-  0x43cdf0ce, 0x43c89c72, 0x43c347eb, 0x43bdf33b, 0x43b89e62, 0x43b3495e,
-    0x43adf431, 0x43a89ed9,
-  0x43a34959, 0x439df3ae, 0x43989dda, 0x439347dc, 0x438df1b4, 0x43889b63,
-    0x438344e8, 0x437dee43,
-  0x43789775, 0x4373407d, 0x436de95b, 0x43689210, 0x43633a9c, 0x435de2fd,
-    0x43588b36, 0x43533344,
-  0x434ddb29, 0x434882e5, 0x43432a77, 0x433dd1e0, 0x4338791f, 0x43332035,
-    0x432dc721, 0x43286de4,
-  0x4323147d, 0x431dbaed, 0x43186133, 0x43130751, 0x430dad44, 0x4308530f,
-    0x4302f8b0, 0x42fd9e28,
-  0x42f84376, 0x42f2e89b, 0x42ed8d97, 0x42e83269, 0x42e2d713, 0x42dd7b93,
-    0x42d81fe9, 0x42d2c417,
-  0x42cd681b, 0x42c80bf6, 0x42c2afa8, 0x42bd5331, 0x42b7f690, 0x42b299c7,
-    0x42ad3cd4, 0x42a7dfb8,
-  0x42a28273, 0x429d2505, 0x4297c76e, 0x429269ae, 0x428d0bc4, 0x4287adb2,
-    0x42824f76, 0x427cf112,
-  0x42779285, 0x427233ce, 0x426cd4ef, 0x426775e6, 0x426216b5, 0x425cb75a,
-    0x425757d7, 0x4251f82b,
-  0x424c9856, 0x42473858, 0x4241d831, 0x423c77e1, 0x42371769, 0x4231b6c7,
-    0x422c55fd, 0x4226f50a,
-  0x422193ee, 0x421c32a9, 0x4216d13c, 0x42116fa5, 0x420c0de6, 0x4206abfe,
-    0x420149ee, 0x41fbe7b5,
-  0x41f68553, 0x41f122c8, 0x41ebc015, 0x41e65d39, 0x41e0fa35, 0x41db9707,
-    0x41d633b1, 0x41d0d033,
-  0x41cb6c8c, 0x41c608bc, 0x41c0a4c4, 0x41bb40a3, 0x41b5dc5a, 0x41b077e8,
-    0x41ab134e, 0x41a5ae8b,
-  0x41a049a0, 0x419ae48c, 0x41957f4f, 0x419019eb, 0x418ab45d, 0x41854ea8,
-    0x417fe8ca, 0x417a82c3,
-  0x41751c94, 0x416fb63d, 0x416a4fbd, 0x4164e916, 0x415f8245, 0x415a1b4d,
-    0x4154b42c, 0x414f4ce2,
-  0x4149e571, 0x41447dd7, 0x413f1615, 0x4139ae2b, 0x41344618, 0x412edddd,
-    0x4129757b, 0x41240cef,
-  0x411ea43c, 0x41193b61, 0x4113d25d, 0x410e6931, 0x4108ffdd, 0x41039661,
-    0x40fe2cbd, 0x40f8c2f1,
-  0x40f358fc, 0x40edeee0, 0x40e8849b, 0x40e31a2f, 0x40ddaf9b, 0x40d844de,
-    0x40d2d9f9, 0x40cd6eed,
-  0x40c803b8, 0x40c2985c, 0x40bd2cd8, 0x40b7c12b, 0x40b25557, 0x40ace95b,
-    0x40a77d37, 0x40a210eb,
-  0x409ca477, 0x409737dc, 0x4091cb18, 0x408c5e2d, 0x4086f11a, 0x408183df,
-    0x407c167c, 0x4076a8f1,
-  0x40713b3f, 0x406bcd65, 0x40665f63, 0x4060f13a, 0x405b82e9, 0x40561470,
-    0x4050a5cf, 0x404b3707,
-  0x4045c817, 0x404058ff, 0x403ae9c0, 0x40357a59, 0x40300acb, 0x402a9b15,
-    0x40252b37, 0x401fbb32,
-  0x401a4b05, 0x4014dab1, 0x400f6a35, 0x4009f992, 0x400488c7, 0x3fff17d5,
-    0x3ff9a6bb, 0x3ff4357a,
-  0x3feec411, 0x3fe95281, 0x3fe3e0c9, 0x3fde6eeb, 0x3fd8fce4, 0x3fd38ab6,
-    0x3fce1861, 0x3fc8a5e5,
-  0x3fc33341, 0x3fbdc076, 0x3fb84d83, 0x3fb2da6a, 0x3fad6729, 0x3fa7f3c0,
-    0x3fa28031, 0x3f9d0c7a,
-  0x3f97989c, 0x3f922496, 0x3f8cb06a, 0x3f873c16, 0x3f81c79b, 0x3f7c52f9,
-    0x3f76de30, 0x3f71693f,
-  0x3f6bf428, 0x3f667ee9, 0x3f610983, 0x3f5b93f6, 0x3f561e42, 0x3f50a867,
-    0x3f4b3265, 0x3f45bc3c,
-  0x3f4045ec, 0x3f3acf75, 0x3f3558d7, 0x3f2fe211, 0x3f2a6b25, 0x3f24f412,
-    0x3f1f7cd8, 0x3f1a0577,
-  0x3f148def, 0x3f0f1640, 0x3f099e6b, 0x3f04266e, 0x3efeae4a, 0x3ef93600,
-    0x3ef3bd8f, 0x3eee44f7,
-  0x3ee8cc38, 0x3ee35352, 0x3eddda46, 0x3ed86113, 0x3ed2e7b9, 0x3ecd6e38,
-    0x3ec7f491, 0x3ec27ac2,
-  0x3ebd00cd, 0x3eb786b2, 0x3eb20c6f, 0x3eac9206, 0x3ea71777, 0x3ea19cc1,
-    0x3e9c21e4, 0x3e96a6e0,
-  0x3e912bb6, 0x3e8bb065, 0x3e8634ee, 0x3e80b950, 0x3e7b3d8c, 0x3e75c1a1,
-    0x3e70458f, 0x3e6ac957,
-  0x3e654cf8, 0x3e5fd073, 0x3e5a53c8, 0x3e54d6f6, 0x3e4f59fe, 0x3e49dcdf,
-    0x3e445f99, 0x3e3ee22e,
-  0x3e39649c, 0x3e33e6e3, 0x3e2e6904, 0x3e28eaff, 0x3e236cd4, 0x3e1dee82,
-    0x3e18700a, 0x3e12f16b,
-  0x3e0d72a6, 0x3e07f3bb, 0x3e0274aa, 0x3dfcf572, 0x3df77615, 0x3df1f691,
-    0x3dec76e6, 0x3de6f716,
-  0x3de1771f, 0x3ddbf703, 0x3dd676c0, 0x3dd0f656, 0x3dcb75c7, 0x3dc5f512,
-    0x3dc07436, 0x3dbaf335,
-  0x3db5720d, 0x3daff0c0, 0x3daa6f4c, 0x3da4edb2, 0x3d9f6bf2, 0x3d99ea0d,
-    0x3d946801, 0x3d8ee5cf,
-  0x3d896377, 0x3d83e0f9, 0x3d7e5e56, 0x3d78db8c, 0x3d73589d, 0x3d6dd587,
-    0x3d68524c, 0x3d62ceeb,
-  0x3d5d4b64, 0x3d57c7b7, 0x3d5243e4, 0x3d4cbfeb, 0x3d473bcd, 0x3d41b789,
-    0x3d3c331f, 0x3d36ae8f,
-  0x3d3129da, 0x3d2ba4fe, 0x3d261ffd, 0x3d209ad7, 0x3d1b158a, 0x3d159018,
-    0x3d100a80, 0x3d0a84c3,
-  0x3d04fee0, 0x3cff78d7, 0x3cf9f2a9, 0x3cf46c55, 0x3ceee5db, 0x3ce95f3c,
-    0x3ce3d877, 0x3cde518d,
-  0x3cd8ca7d, 0x3cd34347, 0x3ccdbbed, 0x3cc8346c, 0x3cc2acc6, 0x3cbd24fb,
-    0x3cb79d0a, 0x3cb214f4,
-  0x3cac8cb8, 0x3ca70457, 0x3ca17bd0, 0x3c9bf324, 0x3c966a53, 0x3c90e15c,
-    0x3c8b5840, 0x3c85cefe,
-  0x3c804598, 0x3c7abc0c, 0x3c75325a, 0x3c6fa883, 0x3c6a1e87, 0x3c649466,
-    0x3c5f0a20, 0x3c597fb4,
-  0x3c53f523, 0x3c4e6a6d, 0x3c48df91, 0x3c435491, 0x3c3dc96b, 0x3c383e20,
-    0x3c32b2b0, 0x3c2d271b,
-  0x3c279b61, 0x3c220f81, 0x3c1c837d, 0x3c16f753, 0x3c116b04, 0x3c0bde91,
-    0x3c0651f8, 0x3c00c53a,
-  0x3bfb3857, 0x3bf5ab50, 0x3bf01e23, 0x3bea90d1, 0x3be5035a, 0x3bdf75bf,
-    0x3bd9e7fe, 0x3bd45a19,
-  0x3bcecc0e, 0x3bc93ddf, 0x3bc3af8b, 0x3bbe2112, 0x3bb89274, 0x3bb303b1,
-    0x3bad74c9, 0x3ba7e5bd,
-  0x3ba2568c, 0x3b9cc736, 0x3b9737bb, 0x3b91a81c, 0x3b8c1857, 0x3b86886e,
-    0x3b80f861, 0x3b7b682e,
-  0x3b75d7d7, 0x3b70475c, 0x3b6ab6bb, 0x3b6525f6, 0x3b5f950c, 0x3b5a03fe,
-    0x3b5472cb, 0x3b4ee173,
-  0x3b494ff7, 0x3b43be57, 0x3b3e2c91, 0x3b389aa8, 0x3b330899, 0x3b2d7666,
-    0x3b27e40f, 0x3b225193,
-  0x3b1cbef3, 0x3b172c2e, 0x3b119945, 0x3b0c0637, 0x3b067305, 0x3b00dfaf,
-    0x3afb4c34, 0x3af5b894,
-  0x3af024d1, 0x3aea90e9, 0x3ae4fcdc, 0x3adf68ac, 0x3ad9d457, 0x3ad43fdd,
-    0x3aceab40, 0x3ac9167e,
-  0x3ac38198, 0x3abdec8d, 0x3ab8575f, 0x3ab2c20c, 0x3aad2c95, 0x3aa796fa,
-    0x3aa2013a, 0x3a9c6b57,
-  0x3a96d54f, 0x3a913f23, 0x3a8ba8d3, 0x3a86125f, 0x3a807bc7, 0x3a7ae50a,
-    0x3a754e2a, 0x3a6fb726,
-  0x3a6a1ffd, 0x3a6488b1, 0x3a5ef140, 0x3a5959ab, 0x3a53c1f3, 0x3a4e2a16,
-    0x3a489216, 0x3a42f9f2,
-  0x3a3d61a9, 0x3a37c93d, 0x3a3230ad, 0x3a2c97f9, 0x3a26ff21, 0x3a216625,
-    0x3a1bcd05, 0x3a1633c1,
-  0x3a109a5a, 0x3a0b00cf, 0x3a056720, 0x39ffcd4d, 0x39fa3356, 0x39f4993c,
-    0x39eefefe, 0x39e9649c,
-  0x39e3ca17, 0x39de2f6d, 0x39d894a0, 0x39d2f9b0, 0x39cd5e9b, 0x39c7c363,
-    0x39c22808, 0x39bc8c89,
-  0x39b6f0e6, 0x39b1551f, 0x39abb935, 0x39a61d28, 0x39a080f6, 0x399ae4a2,
-    0x39954829, 0x398fab8e,
-  0x398a0ece, 0x398471ec, 0x397ed4e5, 0x397937bc, 0x39739a6e, 0x396dfcfe,
-    0x39685f6a, 0x3962c1b2,
-  0x395d23d7, 0x395785d9, 0x3951e7b8, 0x394c4973, 0x3946ab0a, 0x39410c7f,
-    0x393b6dd0, 0x3935cefd,
-  0x39303008, 0x392a90ef, 0x3924f1b3, 0x391f5254, 0x3919b2d1, 0x3914132b,
-    0x390e7362, 0x3908d376,
-  0x39033367, 0x38fd9334, 0x38f7f2de, 0x38f25266, 0x38ecb1ca, 0x38e7110a,
-    0x38e17028, 0x38dbcf23,
-  0x38d62dfb, 0x38d08caf, 0x38caeb41, 0x38c549af, 0x38bfa7fb, 0x38ba0623,
-    0x38b46429, 0x38aec20b,
-  0x38a91fcb, 0x38a37d67, 0x389ddae1, 0x38983838, 0x3892956c, 0x388cf27d,
-    0x38874f6b, 0x3881ac36,
-  0x387c08de, 0x38766564, 0x3870c1c6, 0x386b1e06, 0x38657a23, 0x385fd61d,
-    0x385a31f5, 0x38548daa,
-  0x384ee93b, 0x384944ab, 0x38439ff7, 0x383dfb21, 0x38385628, 0x3832b10d,
-    0x382d0bce, 0x3827666d,
-  0x3821c0ea, 0x381c1b44, 0x3816757b, 0x3810cf90, 0x380b2982, 0x38058351,
-    0x37ffdcfe, 0x37fa3688,
-  0x37f48ff0, 0x37eee936, 0x37e94259, 0x37e39b59, 0x37ddf437, 0x37d84cf2,
-    0x37d2a58b, 0x37ccfe02,
-  0x37c75656, 0x37c1ae87, 0x37bc0697, 0x37b65e84, 0x37b0b64e, 0x37ab0df6,
-    0x37a5657c, 0x379fbce0,
-  0x379a1421, 0x37946b40, 0x378ec23d, 0x37891917, 0x37836fcf, 0x377dc665,
-    0x37781cd9, 0x3772732a,
-  0x376cc959, 0x37671f66, 0x37617551, 0x375bcb1a, 0x375620c1, 0x37507645,
-    0x374acba7, 0x374520e7,
-  0x373f7606, 0x3739cb02, 0x37341fdc, 0x372e7493, 0x3728c929, 0x37231d9d,
-    0x371d71ef, 0x3717c61f,
-  0x37121a2d, 0x370c6e19, 0x3706c1e2, 0x3701158a, 0x36fb6910, 0x36f5bc75,
-    0x36f00fb7, 0x36ea62d7,
-  0x36e4b5d6, 0x36df08b2, 0x36d95b6d, 0x36d3ae06, 0x36ce007d, 0x36c852d2,
-    0x36c2a506, 0x36bcf718,
-  0x36b74908, 0x36b19ad6, 0x36abec82, 0x36a63e0d, 0x36a08f76, 0x369ae0bd,
-    0x369531e3, 0x368f82e7,
-  0x3689d3c9, 0x3684248a, 0x367e7529, 0x3678c5a7, 0x36731602, 0x366d663d,
-    0x3667b655, 0x3662064c,
-  0x365c5622, 0x3656a5d6, 0x3650f569, 0x364b44da, 0x36459429, 0x363fe357,
-    0x363a3264, 0x3634814f,
-  0x362ed019, 0x36291ec1, 0x36236d48, 0x361dbbad, 0x361809f1, 0x36125814,
-    0x360ca615, 0x3606f3f5,
-  0x360141b4, 0x35fb8f52, 0x35f5dcce, 0x35f02a28, 0x35ea7762, 0x35e4c47a,
-    0x35df1171, 0x35d95e47,
-  0x35d3aafc, 0x35cdf78f, 0x35c84401, 0x35c29052, 0x35bcdc82, 0x35b72891,
-    0x35b1747e, 0x35abc04b,
-  0x35a60bf6, 0x35a05781, 0x359aa2ea, 0x3594ee32, 0x358f3959, 0x3589845f,
-    0x3583cf44, 0x357e1a08,
-  0x357864ab, 0x3572af2d, 0x356cf98e, 0x356743ce, 0x35618ded, 0x355bd7eb,
-    0x355621c9, 0x35506b85,
-  0x354ab520, 0x3544fe9b, 0x353f47f5, 0x3539912e, 0x3533da46, 0x352e233d,
-    0x35286c14, 0x3522b4c9,
-  0x351cfd5e, 0x351745d2, 0x35118e26, 0x350bd658, 0x35061e6a, 0x3500665c,
-    0x34faae2c, 0x34f4f5dc,
-  0x34ef3d6b, 0x34e984da, 0x34e3cc28, 0x34de1355, 0x34d85a62, 0x34d2a14e,
-    0x34cce819, 0x34c72ec4,
-  0x34c1754e, 0x34bbbbb8, 0x34b60202, 0x34b0482a, 0x34aa8e33, 0x34a4d41a,
-    0x349f19e2, 0x34995f88,
-  0x3493a50f, 0x348dea75, 0x34882fba, 0x348274e0, 0x347cb9e4, 0x3476fec9,
-    0x3471438d, 0x346b8830,
-  0x3465ccb4, 0x34601117, 0x345a5559, 0x3454997c, 0x344edd7e, 0x34492160,
-    0x34436521, 0x343da8c3,
-  0x3437ec44, 0x34322fa5, 0x342c72e6, 0x3426b606, 0x3420f907, 0x341b3be7,
-    0x34157ea7, 0x340fc147,
-  0x340a03c7, 0x34044626, 0x33fe8866, 0x33f8ca86, 0x33f30c85, 0x33ed4e65,
-    0x33e79024, 0x33e1d1c4,
-  0x33dc1343, 0x33d654a2, 0x33d095e2, 0x33cad701, 0x33c51801, 0x33bf58e1,
-    0x33b999a0, 0x33b3da40,
-  0x33ae1ac0, 0x33a85b20, 0x33a29b60, 0x339cdb81, 0x33971b81, 0x33915b62,
-    0x338b9b22, 0x3385dac4,
-  0x33801a45, 0x337a59a6, 0x337498e8, 0x336ed80a, 0x3369170c, 0x336355ef,
-    0x335d94b2, 0x3357d355,
-  0x335211d8, 0x334c503c, 0x33468e80, 0x3340cca5, 0x333b0aaa, 0x3335488f,
-    0x332f8655, 0x3329c3fb,
-  0x33240182, 0x331e3ee9, 0x33187c31, 0x3312b959, 0x330cf661, 0x3307334a,
-    0x33017014, 0x32fbacbe,
-  0x32f5e948, 0x32f025b4, 0x32ea61ff, 0x32e49e2c, 0x32deda39, 0x32d91626,
-    0x32d351f5, 0x32cd8da4,
-  0x32c7c933, 0x32c204a3, 0x32bc3ff4, 0x32b67b26, 0x32b0b638, 0x32aaf12b,
-    0x32a52bff, 0x329f66b4,
-  0x3299a149, 0x3293dbbf, 0x328e1616, 0x3288504e, 0x32828a67, 0x327cc460,
-    0x3276fe3a, 0x327137f6,
-  0x326b7192, 0x3265ab0f, 0x325fe46c, 0x325a1dab, 0x325456cb, 0x324e8fcc,
-    0x3248c8ad, 0x32430170,
-  0x323d3a14, 0x32377298, 0x3231aafe, 0x322be345, 0x32261b6c, 0x32205375,
-    0x321a8b5f, 0x3214c32a,
-  0x320efad6, 0x32093263, 0x320369d2, 0x31fda121, 0x31f7d852, 0x31f20f64,
-    0x31ec4657, 0x31e67d2b,
-  0x31e0b3e0, 0x31daea77, 0x31d520ef, 0x31cf5748, 0x31c98d83, 0x31c3c39e,
-    0x31bdf99b, 0x31b82f7a,
-  0x31b2653a, 0x31ac9adb, 0x31a6d05d, 0x31a105c1, 0x319b3b06, 0x3195702d,
-    0x318fa535, 0x3189da1e,
-  0x31840ee9, 0x317e4395, 0x31787823, 0x3172ac92, 0x316ce0e3, 0x31671515,
-    0x31614929, 0x315b7d1e,
-  0x3155b0f5, 0x314fe4ae, 0x314a1848, 0x31444bc3, 0x313e7f21, 0x3138b260,
-    0x3132e580, 0x312d1882,
-  0x31274b66, 0x31217e2c, 0x311bb0d3, 0x3115e35c, 0x311015c6, 0x310a4813,
-    0x31047a41, 0x30feac51,
-  0x30f8de42, 0x30f31016, 0x30ed41cb, 0x30e77362, 0x30e1a4db, 0x30dbd636,
-    0x30d60772, 0x30d03891,
-  0x30ca6991, 0x30c49a74, 0x30becb38, 0x30b8fbde, 0x30b32c66, 0x30ad5cd0,
-    0x30a78d1c, 0x30a1bd4a,
-  0x309bed5a, 0x30961d4c, 0x30904d20, 0x308a7cd6, 0x3084ac6e, 0x307edbe9,
-    0x30790b45, 0x30733a83,
-  0x306d69a4, 0x306798a7, 0x3061c78b, 0x305bf652, 0x305624fb, 0x30505387,
-    0x304a81f4, 0x3044b044,
-  0x303ede76, 0x30390c8a, 0x30333a80, 0x302d6859, 0x30279614, 0x3021c3b1,
-    0x301bf131, 0x30161e93,
-  0x30104bd7, 0x300a78fe, 0x3004a607, 0x2ffed2f2, 0x2ff8ffc0, 0x2ff32c70,
-    0x2fed5902, 0x2fe78577,
-  0x2fe1b1cf, 0x2fdbde09, 0x2fd60a25, 0x2fd03624, 0x2fca6206, 0x2fc48dc9,
-    0x2fbeb970, 0x2fb8e4f9,
-  0x2fb31064, 0x2fad3bb3, 0x2fa766e3, 0x2fa191f7, 0x2f9bbced, 0x2f95e7c5,
-    0x2f901280, 0x2f8a3d1e,
-  0x2f84679f, 0x2f7e9202, 0x2f78bc48, 0x2f72e671, 0x2f6d107c, 0x2f673a6a,
-    0x2f61643b, 0x2f5b8def,
-  0x2f55b785, 0x2f4fe0ff, 0x2f4a0a5b, 0x2f44339a, 0x2f3e5cbb, 0x2f3885c0,
-    0x2f32aea8, 0x2f2cd772,
-  0x2f27001f, 0x2f2128af, 0x2f1b5122, 0x2f157979, 0x2f0fa1b2, 0x2f09c9ce,
-    0x2f03f1cd, 0x2efe19ae,
-  0x2ef84173, 0x2ef2691b, 0x2eec90a7, 0x2ee6b815, 0x2ee0df66, 0x2edb069a,
-    0x2ed52db1, 0x2ecf54ac,
-  0x2ec97b89, 0x2ec3a24a, 0x2ebdc8ee, 0x2eb7ef75, 0x2eb215df, 0x2eac3c2d,
-    0x2ea6625d, 0x2ea08871,
-  0x2e9aae68, 0x2e94d443, 0x2e8efa00, 0x2e891fa1, 0x2e834525, 0x2e7d6a8d,
-    0x2e778fd8, 0x2e71b506,
-  0x2e6bda17, 0x2e65ff0c, 0x2e6023e5, 0x2e5a48a0, 0x2e546d3f, 0x2e4e91c2,
-    0x2e48b628, 0x2e42da71,
-  0x2e3cfe9e, 0x2e3722ae, 0x2e3146a2, 0x2e2b6a79, 0x2e258e34, 0x2e1fb1d3,
-    0x2e19d554, 0x2e13f8ba,
-  0x2e0e1c03, 0x2e083f30, 0x2e026240, 0x2dfc8534, 0x2df6a80b, 0x2df0cac6,
-    0x2deaed65, 0x2de50fe8,
-  0x2ddf324e, 0x2dd95498, 0x2dd376c5, 0x2dcd98d7, 0x2dc7bacc, 0x2dc1dca4,
-    0x2dbbfe61, 0x2db62001,
-  0x2db04186, 0x2daa62ee, 0x2da4843a, 0x2d9ea569, 0x2d98c67d, 0x2d92e774,
-    0x2d8d084f, 0x2d87290f,
-  0x2d8149b2, 0x2d7b6a39, 0x2d758aa4, 0x2d6faaf3, 0x2d69cb26, 0x2d63eb3d,
-    0x2d5e0b38, 0x2d582b17,
-  0x2d524ada, 0x2d4c6a81, 0x2d468a0c, 0x2d40a97b, 0x2d3ac8ce, 0x2d34e805,
-    0x2d2f0721, 0x2d292620,
-  0x2d234504, 0x2d1d63cc, 0x2d178278, 0x2d11a108, 0x2d0bbf7d, 0x2d05ddd5,
-    0x2cfffc12, 0x2cfa1a33,
-  0x2cf43839, 0x2cee5622, 0x2ce873f0, 0x2ce291a2, 0x2cdcaf39, 0x2cd6ccb4,
-    0x2cd0ea13, 0x2ccb0756,
-  0x2cc5247e, 0x2cbf418b, 0x2cb95e7b, 0x2cb37b51, 0x2cad980a, 0x2ca7b4a8,
-    0x2ca1d12a, 0x2c9bed91,
-  0x2c9609dd, 0x2c90260d, 0x2c8a4221, 0x2c845e1a, 0x2c7e79f7, 0x2c7895b9,
-    0x2c72b160, 0x2c6ccceb,
-  0x2c66e85b, 0x2c6103af, 0x2c5b1ee8, 0x2c553a06, 0x2c4f5508, 0x2c496fef,
-    0x2c438abb, 0x2c3da56b,
-  0x2c37c000, 0x2c31da7a, 0x2c2bf4d8, 0x2c260f1c, 0x2c202944, 0x2c1a4351,
-    0x2c145d42, 0x2c0e7719,
-  0x2c0890d4, 0x2c02aa74, 0x2bfcc3f9, 0x2bf6dd63, 0x2bf0f6b1, 0x2beb0fe5,
-    0x2be528fd, 0x2bdf41fb,
-  0x2bd95add, 0x2bd373a4, 0x2bcd8c51, 0x2bc7a4e2, 0x2bc1bd58, 0x2bbbd5b3,
-    0x2bb5edf4, 0x2bb00619,
-  0x2baa1e23, 0x2ba43613, 0x2b9e4de7, 0x2b9865a1, 0x2b927d3f, 0x2b8c94c3,
-    0x2b86ac2c, 0x2b80c37a,
-  0x2b7adaae, 0x2b74f1c6, 0x2b6f08c4, 0x2b691fa6, 0x2b63366f, 0x2b5d4d1c,
-    0x2b5763ae, 0x2b517a26,
-  0x2b4b9083, 0x2b45a6c6, 0x2b3fbced, 0x2b39d2fa, 0x2b33e8ed, 0x2b2dfec5,
-    0x2b281482, 0x2b222a24,
-  0x2b1c3fac, 0x2b165519, 0x2b106a6c, 0x2b0a7fa4, 0x2b0494c2, 0x2afea9c5,
-    0x2af8bead, 0x2af2d37b,
-  0x2aece82f, 0x2ae6fcc8, 0x2ae11146, 0x2adb25aa, 0x2ad539f4, 0x2acf4e23,
-    0x2ac96238, 0x2ac37633,
-  0x2abd8a13, 0x2ab79dd8, 0x2ab1b184, 0x2aabc515, 0x2aa5d88b, 0x2a9febe8,
-    0x2a99ff2a, 0x2a941252,
-  0x2a8e255f, 0x2a883853, 0x2a824b2c, 0x2a7c5deb, 0x2a76708f, 0x2a70831a,
-    0x2a6a958a, 0x2a64a7e0,
-  0x2a5eba1c, 0x2a58cc3e, 0x2a52de46, 0x2a4cf033, 0x2a470207, 0x2a4113c0,
-    0x2a3b2560, 0x2a3536e5,
-  0x2a2f4850, 0x2a2959a1, 0x2a236ad9, 0x2a1d7bf6, 0x2a178cf9, 0x2a119de2,
-    0x2a0baeb2, 0x2a05bf67,
-  0x29ffd003, 0x29f9e084, 0x29f3f0ec, 0x29ee013a, 0x29e8116e, 0x29e22188,
-    0x29dc3188, 0x29d6416f,
-  0x29d0513b, 0x29ca60ee, 0x29c47087, 0x29be8007, 0x29b88f6c, 0x29b29eb8,
-    0x29acadea, 0x29a6bd02,
-  0x29a0cc01, 0x299adae6, 0x2994e9b1, 0x298ef863, 0x298906fb, 0x2983157a,
-    0x297d23df, 0x2977322a,
-  0x2971405b, 0x296b4e74, 0x29655c72, 0x295f6a57, 0x29597823, 0x295385d5,
-    0x294d936d, 0x2947a0ec,
-  0x2941ae52, 0x293bbb9e, 0x2935c8d1, 0x292fd5ea, 0x2929e2ea, 0x2923efd0,
-    0x291dfc9d, 0x29180951,
-  0x291215eb, 0x290c226c, 0x29062ed4, 0x29003b23, 0x28fa4758, 0x28f45374,
-    0x28ee5f76, 0x28e86b5f,
-  0x28e27730, 0x28dc82e6, 0x28d68e84, 0x28d09a09, 0x28caa574, 0x28c4b0c6,
-    0x28bebbff, 0x28b8c71f,
-  0x28b2d226, 0x28acdd13, 0x28a6e7e8, 0x28a0f2a3, 0x289afd46, 0x289507cf,
-    0x288f123f, 0x28891c97,
-  0x288326d5, 0x287d30fa, 0x28773b07, 0x287144fa, 0x286b4ed5, 0x28655896,
-    0x285f623f, 0x28596bce,
-  0x28537545, 0x284d7ea3, 0x284787e8, 0x28419114, 0x283b9a28, 0x2835a322,
-    0x282fac04, 0x2829b4cd,
-  0x2823bd7d, 0x281dc615, 0x2817ce93, 0x2811d6f9, 0x280bdf46, 0x2805e77b,
-    0x27ffef97, 0x27f9f79a,
-  0x27f3ff85, 0x27ee0756, 0x27e80f10, 0x27e216b0, 0x27dc1e38, 0x27d625a8,
-    0x27d02cff, 0x27ca343d,
-  0x27c43b63, 0x27be4270, 0x27b84965, 0x27b25041, 0x27ac5705, 0x27a65db0,
-    0x27a06443, 0x279a6abd,
-  0x2794711f, 0x278e7768, 0x27887d99, 0x278283b2, 0x277c89b3, 0x27768f9b,
-    0x2770956a, 0x276a9b21,
-  0x2764a0c0, 0x275ea647, 0x2758abb6, 0x2752b10c, 0x274cb64a, 0x2746bb6f,
-    0x2740c07d, 0x273ac572,
-  0x2734ca4f, 0x272ecf14, 0x2728d3c0, 0x2722d855, 0x271cdcd1, 0x2716e136,
-    0x2710e582, 0x270ae9b6,
-  0x2704edd2, 0x26fef1d5, 0x26f8f5c1, 0x26f2f995, 0x26ecfd51, 0x26e700f5,
-    0x26e10480, 0x26db07f4,
-  0x26d50b50, 0x26cf0e94, 0x26c911c0, 0x26c314d4, 0x26bd17d0, 0x26b71ab4,
-    0x26b11d80, 0x26ab2034,
-  0x26a522d1, 0x269f2556, 0x269927c3, 0x26932a18, 0x268d2c55, 0x26872e7b,
-    0x26813088, 0x267b327e,
-  0x2675345d, 0x266f3623, 0x266937d2, 0x26633969, 0x265d3ae9, 0x26573c50,
-    0x26513da1, 0x264b3ed9,
-  0x26453ffa, 0x263f4103, 0x263941f5, 0x263342cf, 0x262d4392, 0x2627443d,
-    0x262144d0, 0x261b454c,
-  0x261545b0, 0x260f45fd, 0x26094633, 0x26034651, 0x25fd4657, 0x25f74646,
-    0x25f1461e, 0x25eb45de,
-  0x25e54587, 0x25df4519, 0x25d94493, 0x25d343f6, 0x25cd4341, 0x25c74276,
-    0x25c14192, 0x25bb4098,
-  0x25b53f86, 0x25af3e5d, 0x25a93d1d, 0x25a33bc6, 0x259d3a57, 0x259738d1,
-    0x25913734, 0x258b3580,
-  0x258533b5, 0x257f31d2, 0x25792fd8, 0x25732dc8, 0x256d2ba0, 0x25672961,
-    0x2561270b, 0x255b249e,
-  0x2555221a, 0x254f1f7e, 0x25491ccc, 0x25431a03, 0x253d1723, 0x2537142c,
-    0x2531111e, 0x252b0df9,
-  0x25250abd, 0x251f076a, 0x25190400, 0x25130080, 0x250cfce8, 0x2506f93a,
-    0x2500f574, 0x24faf198,
-  0x24f4eda6, 0x24eee99c, 0x24e8e57c, 0x24e2e144, 0x24dcdcf6, 0x24d6d892,
-    0x24d0d416, 0x24cacf84,
-  0x24c4cadb, 0x24bec61c, 0x24b8c146, 0x24b2bc59, 0x24acb756, 0x24a6b23b,
-    0x24a0ad0b, 0x249aa7c4,
-  0x2494a266, 0x248e9cf1, 0x24889766, 0x248291c5, 0x247c8c0d, 0x2476863e,
-    0x24708059, 0x246a7a5e,
-  0x2464744c, 0x245e6e23, 0x245867e4, 0x2452618f, 0x244c5b24, 0x244654a1,
-    0x24404e09, 0x243a475a,
-  0x24344095, 0x242e39ba, 0x242832c8, 0x24222bc0, 0x241c24a1, 0x24161d6d,
-    0x24101622, 0x240a0ec1,
-  0x24040749, 0x23fdffbc, 0x23f7f818, 0x23f1f05e, 0x23ebe88e, 0x23e5e0a7,
-    0x23dfd8ab, 0x23d9d098,
-  0x23d3c86f, 0x23cdc031, 0x23c7b7dc, 0x23c1af71, 0x23bba6f0, 0x23b59e59,
-    0x23af95ac, 0x23a98ce8,
-  0x23a3840f, 0x239d7b20, 0x2397721b, 0x23916900, 0x238b5fcf, 0x23855688,
-    0x237f4d2b, 0x237943b9,
-  0x23733a30, 0x236d3092, 0x236726dd, 0x23611d13, 0x235b1333, 0x2355093e,
-    0x234eff32, 0x2348f511,
-  0x2342eada, 0x233ce08d, 0x2336d62a, 0x2330cbb2, 0x232ac124, 0x2324b680,
-    0x231eabc7, 0x2318a0f8,
-  0x23129613, 0x230c8b19, 0x23068009, 0x230074e3, 0x22fa69a8, 0x22f45e57,
-    0x22ee52f1, 0x22e84775,
-  0x22e23be4, 0x22dc303d, 0x22d62480, 0x22d018ae, 0x22ca0cc7, 0x22c400ca,
-    0x22bdf4b8, 0x22b7e890,
-  0x22b1dc53, 0x22abd001, 0x22a5c399, 0x229fb71b, 0x2299aa89, 0x22939de1,
-    0x228d9123, 0x22878451,
-  0x22817769, 0x227b6a6c, 0x22755d59, 0x226f5032, 0x226942f5, 0x226335a2,
-    0x225d283b, 0x22571abe,
-  0x22510d2d, 0x224aff86, 0x2244f1c9, 0x223ee3f8, 0x2238d612, 0x2232c816,
-    0x222cba06, 0x2226abe0,
-  0x22209da5, 0x221a8f56, 0x221480f1, 0x220e7277, 0x220863e8, 0x22025544,
-    0x21fc468b, 0x21f637be,
-  0x21f028db, 0x21ea19e3, 0x21e40ad7, 0x21ddfbb5, 0x21d7ec7f, 0x21d1dd34,
-    0x21cbcdd3, 0x21c5be5e,
-  0x21bfaed5, 0x21b99f36, 0x21b38f83, 0x21ad7fba, 0x21a76fdd, 0x21a15fec,
-    0x219b4fe5, 0x21953fca,
-  0x218f2f9a, 0x21891f55, 0x21830efc, 0x217cfe8e, 0x2176ee0b, 0x2170dd74,
-    0x216accc8, 0x2164bc08,
-  0x215eab33, 0x21589a49, 0x2152894b, 0x214c7838, 0x21466710, 0x214055d4,
-    0x213a4484, 0x2134331f,
-  0x212e21a6, 0x21281018, 0x2121fe76, 0x211becbf, 0x2115daf4, 0x210fc914,
-    0x2109b720, 0x2103a518,
-  0x20fd92fb, 0x20f780ca, 0x20f16e84, 0x20eb5c2b, 0x20e549bd, 0x20df373a,
-    0x20d924a4, 0x20d311f9,
-  0x20ccff3a, 0x20c6ec66, 0x20c0d97f, 0x20bac683, 0x20b4b373, 0x20aea04f,
-    0x20a88d17, 0x20a279ca,
-  0x209c666a, 0x209652f5, 0x20903f6c, 0x208a2bcf, 0x2084181e, 0x207e0459,
-    0x2077f080, 0x2071dc93,
-  0x206bc892, 0x2065b47d, 0x205fa054, 0x20598c17, 0x205377c6, 0x204d6361,
-    0x20474ee8, 0x20413a5b,
-  0x203b25bb, 0x20351106, 0x202efc3e, 0x2028e761, 0x2022d271, 0x201cbd6d,
-    0x2016a856, 0x2010932a,
-  0x200a7deb, 0x20046898, 0x1ffe5331, 0x1ff83db6, 0x1ff22828, 0x1fec1286,
-    0x1fe5fcd0, 0x1fdfe707,
-  0x1fd9d12a, 0x1fd3bb39, 0x1fcda535, 0x1fc78f1d, 0x1fc178f1, 0x1fbb62b2,
-    0x1fb54c60, 0x1faf35f9,
-  0x1fa91f80, 0x1fa308f2, 0x1f9cf252, 0x1f96db9d, 0x1f90c4d5, 0x1f8aadfa,
-    0x1f84970b, 0x1f7e8009,
-  0x1f7868f4, 0x1f7251ca, 0x1f6c3a8e, 0x1f66233e, 0x1f600bdb, 0x1f59f465,
-    0x1f53dcdb, 0x1f4dc53d,
-  0x1f47ad8d, 0x1f4195c9, 0x1f3b7df2, 0x1f356608, 0x1f2f4e0a, 0x1f2935f9,
-    0x1f231dd5, 0x1f1d059e,
-  0x1f16ed54, 0x1f10d4f6, 0x1f0abc85, 0x1f04a401, 0x1efe8b6a, 0x1ef872c0,
-    0x1ef25a03, 0x1eec4132,
-  0x1ee6284f, 0x1ee00f58, 0x1ed9f64f, 0x1ed3dd32, 0x1ecdc402, 0x1ec7aac0,
-    0x1ec1916a, 0x1ebb7802,
-  0x1eb55e86, 0x1eaf44f8, 0x1ea92b56, 0x1ea311a2, 0x1e9cf7db, 0x1e96de01,
-    0x1e90c414, 0x1e8aaa14,
-  0x1e849001, 0x1e7e75dc, 0x1e785ba3, 0x1e724158, 0x1e6c26fa, 0x1e660c8a,
-    0x1e5ff206, 0x1e59d770,
-  0x1e53bcc7, 0x1e4da20c, 0x1e47873d, 0x1e416c5d, 0x1e3b5169, 0x1e353663,
-    0x1e2f1b4a, 0x1e29001e,
-  0x1e22e4e0, 0x1e1cc990, 0x1e16ae2c, 0x1e1092b6, 0x1e0a772e, 0x1e045b93,
-    0x1dfe3fe6, 0x1df82426,
-  0x1df20853, 0x1debec6f, 0x1de5d077, 0x1ddfb46e, 0x1dd99851, 0x1dd37c23,
-    0x1dcd5fe2, 0x1dc7438e,
-  0x1dc12729, 0x1dbb0ab0, 0x1db4ee26, 0x1daed189, 0x1da8b4da, 0x1da29819,
-    0x1d9c7b45, 0x1d965e5f,
-  0x1d904167, 0x1d8a245c, 0x1d840740, 0x1d7dea11, 0x1d77ccd0, 0x1d71af7d,
-    0x1d6b9217, 0x1d6574a0,
-  0x1d5f5716, 0x1d59397a, 0x1d531bcc, 0x1d4cfe0d, 0x1d46e03a, 0x1d40c256,
-    0x1d3aa460, 0x1d348658,
-  0x1d2e683e, 0x1d284a12, 0x1d222bd3, 0x1d1c0d83, 0x1d15ef21, 0x1d0fd0ad,
-    0x1d09b227, 0x1d03938f,
-  0x1cfd74e5, 0x1cf7562a, 0x1cf1375c, 0x1ceb187d, 0x1ce4f98c, 0x1cdeda89,
-    0x1cd8bb74, 0x1cd29c4d,
-  0x1ccc7d15, 0x1cc65dca, 0x1cc03e6e, 0x1cba1f01, 0x1cb3ff81, 0x1caddff0,
-    0x1ca7c04d, 0x1ca1a099,
-  0x1c9b80d3, 0x1c9560fb, 0x1c8f4112, 0x1c892117, 0x1c83010a, 0x1c7ce0ec,
-    0x1c76c0bc, 0x1c70a07b,
-  0x1c6a8028, 0x1c645fc3, 0x1c5e3f4d, 0x1c581ec6, 0x1c51fe2d, 0x1c4bdd83,
-    0x1c45bcc7, 0x1c3f9bf9,
-  0x1c397b1b, 0x1c335a2b, 0x1c2d3929, 0x1c271816, 0x1c20f6f2, 0x1c1ad5bc,
-    0x1c14b475, 0x1c0e931d,
-  0x1c0871b4, 0x1c025039, 0x1bfc2ead, 0x1bf60d0f, 0x1befeb60, 0x1be9c9a1,
-    0x1be3a7cf, 0x1bdd85ed,
-  0x1bd763fa, 0x1bd141f5, 0x1bcb1fdf, 0x1bc4fdb8, 0x1bbedb80, 0x1bb8b937,
-    0x1bb296dc, 0x1bac7471,
-  0x1ba651f5, 0x1ba02f67, 0x1b9a0cc8, 0x1b93ea19, 0x1b8dc758, 0x1b87a487,
-    0x1b8181a4, 0x1b7b5eb0,
-  0x1b753bac, 0x1b6f1897, 0x1b68f570, 0x1b62d239, 0x1b5caef1, 0x1b568b98,
-    0x1b50682e, 0x1b4a44b3,
-  0x1b442127, 0x1b3dfd8b, 0x1b37d9de, 0x1b31b620, 0x1b2b9251, 0x1b256e71,
-    0x1b1f4a81, 0x1b192680,
-  0x1b13026e, 0x1b0cde4c, 0x1b06ba19, 0x1b0095d5, 0x1afa7180, 0x1af44d1b,
-    0x1aee28a6, 0x1ae8041f,
-  0x1ae1df88, 0x1adbbae1, 0x1ad59629, 0x1acf7160, 0x1ac94c87, 0x1ac3279d,
-    0x1abd02a3, 0x1ab6dd98,
-  0x1ab0b87d, 0x1aaa9352, 0x1aa46e16, 0x1a9e48c9, 0x1a98236c, 0x1a91fdff,
-    0x1a8bd881, 0x1a85b2f3,
-  0x1a7f8d54, 0x1a7967a6, 0x1a7341e6, 0x1a6d1c17, 0x1a66f637, 0x1a60d047,
-    0x1a5aaa47, 0x1a548436,
-  0x1a4e5e15, 0x1a4837e4, 0x1a4211a3, 0x1a3beb52, 0x1a35c4f0, 0x1a2f9e7e,
-    0x1a2977fc, 0x1a23516a,
-  0x1a1d2ac8, 0x1a170416, 0x1a10dd53, 0x1a0ab681, 0x1a048f9e, 0x19fe68ac,
-    0x19f841a9, 0x19f21a96,
-  0x19ebf374, 0x19e5cc41, 0x19dfa4fe, 0x19d97dac, 0x19d35649, 0x19cd2ed7,
-    0x19c70754, 0x19c0dfc2,
-  0x19bab820, 0x19b4906e, 0x19ae68ac, 0x19a840da, 0x19a218f9, 0x199bf107,
-    0x1995c906, 0x198fa0f5,
-  0x198978d4, 0x198350a4, 0x197d2864, 0x19770014, 0x1970d7b4, 0x196aaf45,
-    0x196486c6, 0x195e5e37,
-  0x19583599, 0x19520ceb, 0x194be42d, 0x1945bb60, 0x193f9283, 0x19396997,
-    0x1933409b, 0x192d178f,
-  0x1926ee74, 0x1920c54a, 0x191a9c10, 0x191472c6, 0x190e496d, 0x19082005,
-    0x1901f68d, 0x18fbcd06,
-  0x18f5a36f, 0x18ef79c9, 0x18e95014, 0x18e3264f, 0x18dcfc7b, 0x18d6d297,
-    0x18d0a8a4, 0x18ca7ea2,
-  0x18c45491, 0x18be2a70, 0x18b80040, 0x18b1d601, 0x18ababb2, 0x18a58154,
-    0x189f56e8, 0x18992c6b,
-  0x189301e0, 0x188cd746, 0x1886ac9c, 0x188081e4, 0x187a571c, 0x18742c45,
-    0x186e015f, 0x1867d66a,
-  0x1861ab66, 0x185b8053, 0x18555530, 0x184f29ff, 0x1848febf, 0x1842d370,
-    0x183ca812, 0x18367ca5,
-  0x18305129, 0x182a259e, 0x1823fa04, 0x181dce5b, 0x1817a2a4, 0x181176dd,
-    0x180b4b08, 0x18051f24,
-  0x17fef331, 0x17f8c72f, 0x17f29b1e, 0x17ec6eff, 0x17e642d1, 0x17e01694,
-    0x17d9ea49, 0x17d3bdee,
-  0x17cd9186, 0x17c7650e, 0x17c13888, 0x17bb0bf3, 0x17b4df4f, 0x17aeb29d,
-    0x17a885dc, 0x17a2590d,
-  0x179c2c2f, 0x1795ff42, 0x178fd247, 0x1789a53d, 0x17837825, 0x177d4afe,
-    0x17771dc9, 0x1770f086,
-  0x176ac333, 0x176495d3, 0x175e6864, 0x17583ae7, 0x17520d5b, 0x174bdfc1,
-    0x1745b218, 0x173f8461,
-  0x1739569c, 0x173328c8, 0x172cfae6, 0x1726ccf6, 0x17209ef8, 0x171a70eb,
-    0x171442d0, 0x170e14a7,
-  0x1707e670, 0x1701b82a, 0x16fb89d6, 0x16f55b74, 0x16ef2d04, 0x16e8fe86,
-    0x16e2cff9, 0x16dca15f,
-  0x16d672b6, 0x16d043ff, 0x16ca153a, 0x16c3e667, 0x16bdb787, 0x16b78898,
-    0x16b1599b, 0x16ab2a90,
-  0x16a4fb77, 0x169ecc50, 0x16989d1b, 0x16926dd8, 0x168c3e87, 0x16860f29,
-    0x167fdfbc, 0x1679b042,
-  0x167380ba, 0x166d5123, 0x1667217f, 0x1660f1ce, 0x165ac20e, 0x16549241,
-    0x164e6266, 0x1648327d,
-  0x16420286, 0x163bd282, 0x1635a270, 0x162f7250, 0x16294222, 0x162311e7,
-    0x161ce19e, 0x1616b148,
-  0x161080e4, 0x160a5072, 0x16041ff3, 0x15fdef66, 0x15f7becc, 0x15f18e24,
-    0x15eb5d6e, 0x15e52cab,
-  0x15defbdb, 0x15d8cafd, 0x15d29a11, 0x15cc6918, 0x15c63812, 0x15c006fe,
-    0x15b9d5dd, 0x15b3a4ae,
-  0x15ad7372, 0x15a74228, 0x15a110d2, 0x159adf6e, 0x1594adfc, 0x158e7c7d,
-    0x15884af1, 0x15821958,
-  0x157be7b1, 0x1575b5fe, 0x156f843c, 0x1569526e, 0x15632093, 0x155ceeaa,
-    0x1556bcb4, 0x15508ab1,
-  0x154a58a1, 0x15442683, 0x153df459, 0x1537c221, 0x15318fdd, 0x152b5d8b,
-    0x15252b2c, 0x151ef8c0,
-  0x1518c648, 0x151293c2, 0x150c612f, 0x15062e8f, 0x14fffbe2, 0x14f9c928,
-    0x14f39662, 0x14ed638e,
-  0x14e730ae, 0x14e0fdc0, 0x14dacac6, 0x14d497bf, 0x14ce64ab, 0x14c8318a,
-    0x14c1fe5c, 0x14bbcb22,
-  0x14b597da, 0x14af6486, 0x14a93125, 0x14a2fdb8, 0x149cca3e, 0x149696b7,
-    0x14906323, 0x148a2f82,
-  0x1483fbd5, 0x147dc81c, 0x14779455, 0x14716082, 0x146b2ca3, 0x1464f8b7,
-    0x145ec4be, 0x145890b9,
-  0x14525ca7, 0x144c2888, 0x1445f45d, 0x143fc026, 0x14398be2, 0x14335792,
-    0x142d2335, 0x1426eecb,
-  0x1420ba56, 0x141a85d3, 0x14145145, 0x140e1caa, 0x1407e803, 0x1401b34f,
-    0x13fb7e8f, 0x13f549c3,
-  0x13ef14ea, 0x13e8e005, 0x13e2ab14, 0x13dc7616, 0x13d6410d, 0x13d00bf7,
-    0x13c9d6d4, 0x13c3a1a6,
-  0x13bd6c6b, 0x13b73725, 0x13b101d2, 0x13aacc73, 0x13a49707, 0x139e6190,
-    0x13982c0d, 0x1391f67d,
-  0x138bc0e1, 0x13858b3a, 0x137f5586, 0x13791fc6, 0x1372e9fb, 0x136cb423,
-    0x13667e3f, 0x13604850,
-  0x135a1254, 0x1353dc4c, 0x134da639, 0x1347701a, 0x134139ee, 0x133b03b7,
-    0x1334cd74, 0x132e9725,
-  0x132860ca, 0x13222a64, 0x131bf3f2, 0x1315bd73, 0x130f86ea, 0x13095054,
-    0x130319b3, 0x12fce305,
-  0x12f6ac4d, 0x12f07588, 0x12ea3eb8, 0x12e407dc, 0x12ddd0f4, 0x12d79a01,
-    0x12d16303, 0x12cb2bf8,
-  0x12c4f4e2, 0x12bebdc1, 0x12b88693, 0x12b24f5b, 0x12ac1817, 0x12a5e0c7,
-    0x129fa96c, 0x12997205,
-  0x12933a93, 0x128d0315, 0x1286cb8c, 0x128093f7, 0x127a5c57, 0x127424ac,
-    0x126decf5, 0x1267b533,
-  0x12617d66, 0x125b458d, 0x12550da9, 0x124ed5ba, 0x12489dbf, 0x124265b9,
-    0x123c2da8, 0x1235f58b,
-  0x122fbd63, 0x12298530, 0x12234cf2, 0x121d14a9, 0x1216dc54, 0x1210a3f5,
-    0x120a6b8a, 0x12043314,
-  0x11fdfa93, 0x11f7c207, 0x11f18970, 0x11eb50cd, 0x11e51820, 0x11dedf68,
-    0x11d8a6a4, 0x11d26dd6,
-  0x11cc34fc, 0x11c5fc18, 0x11bfc329, 0x11b98a2e, 0x11b35129, 0x11ad1819,
-    0x11a6defe, 0x11a0a5d8,
-  0x119a6ca7, 0x1194336b, 0x118dfa25, 0x1187c0d3, 0x11818777, 0x117b4e10,
-    0x1175149e, 0x116edb22,
-  0x1168a19b, 0x11626809, 0x115c2e6c, 0x1155f4c4, 0x114fbb12, 0x11498156,
-    0x1143478e, 0x113d0dbc,
-  0x1136d3df, 0x113099f8, 0x112a6006, 0x11242609, 0x111dec02, 0x1117b1f0,
-    0x111177d4, 0x110b3dad,
-  0x1105037c, 0x10fec940, 0x10f88efa, 0x10f254a9, 0x10ec1a4e, 0x10e5dfe8,
-    0x10dfa578, 0x10d96afe,
-  0x10d33079, 0x10ccf5ea, 0x10c6bb50, 0x10c080ac, 0x10ba45fe, 0x10b40b45,
-    0x10add082, 0x10a795b5,
-  0x10a15ade, 0x109b1ffc, 0x1094e510, 0x108eaa1a, 0x10886f19, 0x1082340f,
-    0x107bf8fa, 0x1075bddb,
-  0x106f82b2, 0x1069477f, 0x10630c41, 0x105cd0fa, 0x105695a8, 0x10505a4d,
-    0x104a1ee7, 0x1043e377,
-  0x103da7fd, 0x10376c79, 0x103130ec, 0x102af554, 0x1024b9b2, 0x101e7e06,
-    0x10184251, 0x10120691,
-  0x100bcac7, 0x10058ef4, 0xfff5317, 0xff91730, 0xff2db3e, 0xfec9f44,
-    0xfe6633f, 0xfe02730,
-  0xfd9eb18, 0xfd3aef6, 0xfcd72ca, 0xfc73695, 0xfc0fa55, 0xfbabe0c, 0xfb481ba,
-    0xfae455d,
-  0xfa808f7, 0xfa1cc87, 0xf9b900e, 0xf95538b, 0xf8f16fe, 0xf88da68, 0xf829dc8,
-    0xf7c611f,
-  0xf76246c, 0xf6fe7af, 0xf69aae9, 0xf636e1a, 0xf5d3141, 0xf56f45e, 0xf50b773,
-    0xf4a7a7d,
-  0xf443d7e, 0xf3e0076, 0xf37c365, 0xf318649, 0xf2b4925, 0xf250bf7, 0xf1ecec0,
-    0xf189180,
-  0xf125436, 0xf0c16e3, 0xf05d987, 0xeff9c21, 0xef95eb2, 0xef3213a, 0xeece3b9,
-    0xee6a62f,
-  0xee0689b, 0xeda2afe, 0xed3ed58, 0xecdafa9, 0xec771f1, 0xec1342f, 0xebaf665,
-    0xeb4b891,
-  0xeae7ab4, 0xea83ccf, 0xea1fee0, 0xe9bc0e8, 0xe9582e7, 0xe8f44dd, 0xe8906cb,
-    0xe82c8af,
-  0xe7c8a8a, 0xe764c5c, 0xe700e26, 0xe69cfe6, 0xe63919e, 0xe5d534d, 0xe5714f3,
-    0xe50d690,
-  0xe4a9824, 0xe4459af, 0xe3e1b32, 0xe37dcac, 0xe319e1d, 0xe2b5f85, 0xe2520e5,
-    0xe1ee23c,
-  0xe18a38a, 0xe1264cf, 0xe0c260c, 0xe05e740, 0xdffa86b, 0xdf9698e, 0xdf32aa8,
-    0xdecebba,
-  0xde6acc3, 0xde06dc3, 0xdda2ebb, 0xdd3efab, 0xdcdb091, 0xdc77170, 0xdc13245,
-    0xdbaf313,
-  0xdb4b3d7, 0xdae7494, 0xda83548, 0xda1f5f3, 0xd9bb696, 0xd957731, 0xd8f37c3,
-    0xd88f84d,
-  0xd82b8cf, 0xd7c7948, 0xd7639b9, 0xd6ffa22, 0xd69ba82, 0xd637ada, 0xd5d3b2a,
-    0xd56fb71,
-  0xd50bbb1, 0xd4a7be8, 0xd443c17, 0xd3dfc3e, 0xd37bc5c, 0xd317c73, 0xd2b3c81,
-    0xd24fc87,
-  0xd1ebc85, 0xd187c7b, 0xd123c69, 0xd0bfc4f, 0xd05bc2d, 0xcff7c02, 0xcf93bd0,
-    0xcf2fb96,
-  0xcecbb53, 0xce67b09, 0xce03ab7, 0xcd9fa5d, 0xcd3b9fb, 0xccd7991, 0xcc7391f,
-    0xcc0f8a5,
-  0xcbab824, 0xcb4779a, 0xcae3709, 0xca7f670, 0xca1b5cf, 0xc9b7526, 0xc953475,
-    0xc8ef3bd,
-  0xc88b2fd, 0xc827235, 0xc7c3166, 0xc75f08f, 0xc6fafb0, 0xc696ec9, 0xc632ddb,
-    0xc5cece5,
-  0xc56abe8, 0xc506ae3, 0xc4a29d6, 0xc43e8c2, 0xc3da7a6, 0xc376683, 0xc312558,
-    0xc2ae425,
-  0xc24a2eb, 0xc1e61aa, 0xc182061, 0xc11df11, 0xc0b9db9, 0xc055c5a, 0xbff1af3,
-    0xbf8d985,
-  0xbf29810, 0xbec5693, 0xbe6150f, 0xbdfd383, 0xbd991f0, 0xbd35056, 0xbcd0eb5,
-    0xbc6cd0c,
-  0xbc08b5c, 0xbba49a5, 0xbb407e7, 0xbadc621, 0xba78454, 0xba14280, 0xb9b00a5,
-    0xb94bec2,
-  0xb8e7cd9, 0xb883ae8, 0xb81f8f0, 0xb7bb6f2, 0xb7574ec, 0xb6f32df, 0xb68f0cb,
-    0xb62aeaf,
-  0xb5c6c8d, 0xb562a64, 0xb4fe834, 0xb49a5fd, 0xb4363bf, 0xb3d217a, 0xb36df2e,
-    0xb309cdb,
-  0xb2a5a81, 0xb241820, 0xb1dd5b9, 0xb17934b, 0xb1150d5, 0xb0b0e59, 0xb04cbd6,
-    0xafe894d,
-  0xaf846bc, 0xaf20425, 0xaebc187, 0xae57ee2, 0xadf3c37, 0xad8f985, 0xad2b6cc,
-    0xacc740c,
-  0xac63146, 0xabfee79, 0xab9aba6, 0xab368cc, 0xaad25eb, 0xaa6e304, 0xaa0a016,
-    0xa9a5d22,
-  0xa941a27, 0xa8dd725, 0xa87941d, 0xa81510f, 0xa7b0dfa, 0xa74cadf, 0xa6e87bd,
-    0xa684495,
-  0xa620166, 0xa5bbe31, 0xa557af5, 0xa4f37b3, 0xa48f46b, 0xa42b11d, 0xa3c6dc8,
-    0xa362a6d,
-  0xa2fe70b, 0xa29a3a3, 0xa236035, 0xa1d1cc1, 0xa16d946, 0xa1095c6, 0xa0a523f,
-    0xa040eb1,
-  0x9fdcb1e, 0x9f78784, 0x9f143e5, 0x9eb003f, 0x9e4bc93, 0x9de78e1, 0x9d83529,
-    0x9d1f16b,
-  0x9cbada7, 0x9c569dc, 0x9bf260c, 0x9b8e236, 0x9b29e59, 0x9ac5a77, 0x9a6168f,
-    0x99fd2a0,
-  0x9998eac, 0x9934ab2, 0x98d06b2, 0x986c2ac, 0x9807ea1, 0x97a3a8f, 0x973f678,
-    0x96db25a,
-  0x9676e37, 0x9612a0e, 0x95ae5e0, 0x954a1ab, 0x94e5d71, 0x9481931, 0x941d4eb,
-    0x93b90a0,
-  0x9354c4f, 0x92f07f8, 0x928c39b, 0x9227f39, 0x91c3ad2, 0x915f664, 0x90fb1f1,
-    0x9096d79,
-  0x90328fb, 0x8fce477, 0x8f69fee, 0x8f05b5f, 0x8ea16cb, 0x8e3d231, 0x8dd8d92,
-    0x8d748ed,
-  0x8d10443, 0x8cabf93, 0x8c47ade, 0x8be3624, 0x8b7f164, 0x8b1ac9f, 0x8ab67d4,
-    0x8a52304,
-  0x89ede2f, 0x8989955, 0x8925475, 0x88c0f90, 0x885caa5, 0x87f85b5, 0x87940c1,
-    0x872fbc6,
-  0x86cb6c7, 0x86671c2, 0x8602cb9, 0x859e7aa, 0x853a296, 0x84d5d7d, 0x847185e,
-    0x840d33b,
-  0x83a8e12, 0x83448e5, 0x82e03b2, 0x827be7a, 0x821793e, 0x81b33fc, 0x814eeb5,
-    0x80ea969,
-  0x8086419, 0x8021ec3, 0x7fbd968, 0x7f59409, 0x7ef4ea4, 0x7e9093b, 0x7e2c3cd,
-    0x7dc7e5a,
-  0x7d638e2, 0x7cff365, 0x7c9ade4, 0x7c3685d, 0x7bd22d2, 0x7b6dd42, 0x7b097ad,
-    0x7aa5214,
-  0x7a40c76, 0x79dc6d3, 0x797812b, 0x7913b7f, 0x78af5ce, 0x784b019, 0x77e6a5e,
-    0x77824a0,
-  0x771dedc, 0x76b9914, 0x7655347, 0x75f0d76, 0x758c7a1, 0x75281c6, 0x74c3be7,
-    0x745f604,
-  0x73fb01c, 0x7396a30, 0x733243f, 0x72cde4a, 0x7269851, 0x7205253, 0x71a0c50,
-    0x713c64a,
-  0x70d803f, 0x7073a2f, 0x700f41b, 0x6faae03, 0x6f467e7, 0x6ee21c6, 0x6e7dba1,
-    0x6e19578,
-  0x6db4f4a, 0x6d50919, 0x6cec2e3, 0x6c87ca9, 0x6c2366a, 0x6bbf028, 0x6b5a9e1,
-    0x6af6396,
-  0x6a91d47, 0x6a2d6f4, 0x69c909d, 0x6964a42, 0x69003e3, 0x689bd80, 0x6837718,
-    0x67d30ad,
-  0x676ea3d, 0x670a3ca, 0x66a5d53, 0x66416d8, 0x65dd058, 0x65789d5, 0x651434e,
-    0x64afcc3,
-  0x644b634, 0x63e6fa2, 0x638290b, 0x631e271, 0x62b9bd3, 0x6255531, 0x61f0e8b,
-    0x618c7e1,
-  0x6128134, 0x60c3a83, 0x605f3ce, 0x5ffad15, 0x5f96659, 0x5f31f99, 0x5ecd8d6,
-    0x5e6920e,
-  0x5e04b43, 0x5da0475, 0x5d3bda3, 0x5cd76cd, 0x5c72ff4, 0x5c0e917, 0x5baa237,
-    0x5b45b53,
-  0x5ae146b, 0x5a7cd80, 0x5a18692, 0x59b3fa0, 0x594f8aa, 0x58eb1b2, 0x5886ab5,
-    0x58223b6,
-  0x57bdcb3, 0x57595ac, 0x56f4ea2, 0x5690795, 0x562c085, 0x55c7971, 0x556325a,
-    0x54feb3f,
-  0x549a422, 0x5435d01, 0x53d15dd, 0x536ceb5, 0x530878a, 0x52a405d, 0x523f92c,
-    0x51db1f7,
-  0x5176ac0, 0x5112385, 0x50adc48, 0x5049507, 0x4fe4dc3, 0x4f8067c, 0x4f1bf32,
-    0x4eb77e5,
-  0x4e53095, 0x4dee942, 0x4d8a1ec, 0x4d25a93, 0x4cc1337, 0x4c5cbd8, 0x4bf8476,
-    0x4b93d11,
-  0x4b2f5a9, 0x4acae3e, 0x4a666d1, 0x4a01f60, 0x499d7ed, 0x4939077, 0x48d48fe,
-    0x4870182,
-  0x480ba04, 0x47a7282, 0x4742afe, 0x46de377, 0x4679bee, 0x4615461, 0x45b0cd2,
-    0x454c541,
-  0x44e7dac, 0x4483615, 0x441ee7c, 0x43ba6df, 0x4355f40, 0x42f179f, 0x428cffb,
-    0x4228854,
-  0x41c40ab, 0x415f8ff, 0x40fb151, 0x40969a0, 0x40321ed, 0x3fcda37, 0x3f6927f,
-    0x3f04ac4,
-  0x3ea0307, 0x3e3bb48, 0x3dd7386, 0x3d72bc2, 0x3d0e3fb, 0x3ca9c32, 0x3c45467,
-    0x3be0c99,
-  0x3b7c4c9, 0x3b17cf7, 0x3ab3523, 0x3a4ed4c, 0x39ea573, 0x3985d97, 0x39215ba,
-    0x38bcdda,
-  0x38585f8, 0x37f3e14, 0x378f62e, 0x372ae46, 0x36c665b, 0x3661e6f, 0x35fd680,
-    0x3598e8f,
-  0x353469c, 0x34cfea8, 0x346b6b1, 0x3406eb8, 0x33a26bd, 0x333dec0, 0x32d96c1,
-    0x3274ec0,
-  0x32106bd, 0x31abeb9, 0x31476b2, 0x30e2ea9, 0x307e69f, 0x3019e93, 0x2fb5684,
-    0x2f50e74,
-  0x2eec663, 0x2e87e4f, 0x2e2363a, 0x2dbee22, 0x2d5a609, 0x2cf5def, 0x2c915d2,
-    0x2c2cdb4,
-  0x2bc8594, 0x2b63d73, 0x2aff54f, 0x2a9ad2a, 0x2a36504, 0x29d1cdc, 0x296d4b2,
-    0x2908c87,
-  0x28a445a, 0x283fc2b, 0x27db3fb, 0x2776bc9, 0x2712396, 0x26adb62, 0x264932b,
-    0x25e4af4,
-  0x25802bb, 0x251ba80, 0x24b7244, 0x2452a07, 0x23ee1c8, 0x2389988, 0x2325147,
-    0x22c0904,
-  0x225c0bf, 0x21f787a, 0x2193033, 0x212e7eb, 0x20c9fa1, 0x2065757, 0x2000f0b,
-    0x1f9c6be,
-  0x1f37e6f, 0x1ed3620, 0x1e6edcf, 0x1e0a57d, 0x1da5d2a, 0x1d414d6, 0x1cdcc80,
-    0x1c7842a,
-  0x1c13bd2, 0x1baf37a, 0x1b4ab20, 0x1ae62c5, 0x1a81a69, 0x1a1d20c, 0x19b89ae,
-    0x1954150,
-  0x18ef8f0, 0x188b08f, 0x182682d, 0x17c1fcb, 0x175d767, 0x16f8f03, 0x169469d,
-    0x162fe37,
-  0x15cb5d0, 0x1566d68, 0x15024ff, 0x149dc96, 0x143942b, 0x13d4bc0, 0x1370354,
-    0x130bae7,
-  0x12a727a, 0x1242a0c, 0x11de19d, 0x117992e, 0x11150be, 0x10b084d, 0x104bfdb,
-    0xfe7769,
-  0xf82ef6, 0xf1e683, 0xeb9e0f, 0xe5559b, 0xdf0d26, 0xd8c4b0, 0xd27c3a,
-    0xcc33c3,
-  0xc5eb4c, 0xbfa2d5, 0xb95a5d, 0xb311e4, 0xacc96b, 0xa680f2, 0xa03878,
-    0x99effe,
-  0x93a784, 0x8d5f09, 0x87168e, 0x80ce12, 0x7a8597, 0x743d1a, 0x6df49e,
-    0x67ac21,
-  0x6163a5, 0x5b1b27, 0x54d2aa, 0x4e8a2c, 0x4841af, 0x41f931, 0x3bb0b3,
-    0x356835,
-  0x2f1fb6, 0x28d738, 0x228eb9, 0x1c463b, 0x15fdbc, 0xfb53d, 0x96cbe, 0x3243f,
-
-};
-
-/**    
- * @brief  Initialization function for the Q31 DCT4/IDCT4.   
- * @param[in,out] *S         points to an instance of Q31 DCT4/IDCT4 structure.   
- * @param[in]     *S_RFFT    points to an instance of Q31 RFFT/RIFFT structure   
- * @param[in]     *S_CFFT    points to an instance of Q31 CFFT/CIFFT structure   
- * @param[in]     N          length of the DCT4.   
- * @param[in]     Nby2       half of the length of the DCT4.   
- * @param[in]     normalize  normalizing factor.   
- * @return		  arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.   
- * \par Normalizing factor:    
- * The normalizing factor is sqrt(2/N), which depends on the size of transform N.    
- * Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:    
- * \image html dct4NormalizingQ31Table.gif    
- */
-
-arm_status arm_dct4_init_q31(
-  arm_dct4_instance_q31 * S,
-  arm_rfft_instance_q31 * S_RFFT,
-  arm_cfft_radix4_instance_q31 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q31_t normalize)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  q31_t *twiddlePtr[4] = { (q31_t *) WeightsQ31_128, (q31_t *) WeightsQ31_512,
-    (q31_t *) WeightsQ31_2048, (q31_t *) WeightsQ31_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  q31_t *pCosFactor[4] =
-    { (q31_t *) cos_factorsQ31_128, (q31_t *) cos_factorsQ31_512,
-    (q31_t *) cos_factorsQ31_2048, (q31_t *) cos_factorsQ31_8192
-  };
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-    /* Initialize the table modifier values */
-  case 8192u:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
-    break;
-  case 2048u:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
-    break;
-  case 512u:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
-    break;
-  case 128u:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
-    break;
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT Function */
-  arm_rfft_init_q31(S->pRfft, S->pCfft, S->N, 0, 1);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c
deleted file mode 100644
index ac3f691ecd..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c
+++ /dev/null
@@ -1,386 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_q15.c    
-*    
-* Description:	Processing function of DCT4 & IDCT4 Q15.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 DCT4/IDCT4.   
- * @param[in]       *S             points to an instance of the Q15 DCT4 structure.   
- * @param[in]       *pState        points to state buffer.   
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.   
- * @return none.   
- *     
- * \par Input an output formats:    
- * Internally inputs are downscaled in the RFFT process function to avoid overflows.    
- * Number of bits downscaled, depends on the size of the transform.    
- * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:     
- *    
- * \image html dct4FormatsQ15Table.gif    
- */
-
-void arm_dct4_q15(
-  const arm_dct4_instance_q15 * S,
-  q15_t * pState,
-  q15_t * pInlineBuffer)
-{
-  uint32_t i;                                    /* Loop counter */
-  q15_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
-  q15_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
-  q15_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
-  q15_t in;                                      /* Temporary variable */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)    
-   * along with some pre-processing and post-processing.    
-   * Computational procedure is explained as follows:    
-   * (a) Pre-processing involves multiplying input with cos factor,    
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))    
-   *              where,    
-   *                 r(n) -- output of preprocessing    
-   *                 u(n) -- input to preprocessing(actual Source buffer)    
-   * (b) Calculation of DCT2 using FFT is divided into three steps:    
-   *                  Step1: Re-ordering of even and odd elements of input.    
-   *                  Step2: Calculating FFT of the re-ordered input.    
-   *                  Step3: Taking the real part of the product of FFT output and weights.    
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:    
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *                        where,    
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output    
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).    
-   */
-
-        /*-------- Pre-processing ------------*/
-  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_mult_q15(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-  arm_shift_q15(pInlineBuffer, 1, pInlineBuffer, S->N);
-
-  /* ----------------------------------------------------------------    
-   * Step1: Re-ordering of even and odd elements as    
-   *             pState[i] =  pInlineBuffer[2*i] and    
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2    
-   ---------------------------------------------------------------------*/
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = (uint32_t) S->Nby2 >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.    
-   * Compute 4 outputs at a time */
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
-
- /*----------------------------------------------------------------------    
-  *  Step3: Multiply the FFT output with the weights.    
-  *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.13 format.    
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
-  arm_shift_q15(pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = ((uint32_t) S->N - 1u) >> 2u;
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  i = ((uint32_t) S->N - 1u) % 0x4u;
-
-  while(i > 0u)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-   /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initializing the loop counter to N/2 */
-  i = (uint32_t) S->Nby2;
-
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
-
- /*----------------------------------------------------------------------    
-  *  Step3: Multiply the FFT output with the weights.    
-  *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.13 format.    
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
-  arm_shift_q15(pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter */
-  i = ((uint32_t) S->N - 1u);
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-   /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c
deleted file mode 100644
index a8c3678779..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c
+++ /dev/null
@@ -1,387 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_q31.c    
-*    
-* Description:	Processing function of DCT4 & IDCT4 Q31.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 DCT4/IDCT4.   
- * @param[in]       *S             points to an instance of the Q31 DCT4 structure.   
- * @param[in]       *pState        points to state buffer.   
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.   
- * @return none.   
- * \par Input an output formats:    
- * Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process,    
- * as the conversion from DCT2 to DCT4 involves one subtraction.    
- * Internally inputs are downscaled in the RFFT process function to avoid overflows.    
- * Number of bits downscaled, depends on the size of the transform.    
- * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:     
- *    
- * \image html dct4FormatsQ31Table.gif    
- */
-
-void arm_dct4_q31(
-  const arm_dct4_instance_q31 * S,
-  q31_t * pState,
-  q31_t * pInlineBuffer)
-{
-  uint16_t i;                                    /* Loop counter */
-  q31_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
-  q31_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
-  q31_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
-  q31_t in;                                      /* Temporary variable */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)    
-   * along with some pre-processing and post-processing.    
-   * Computational procedure is explained as follows:    
-   * (a) Pre-processing involves multiplying input with cos factor,    
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))    
-   *              where,    
-   *                 r(n) -- output of preprocessing    
-   *                 u(n) -- input to preprocessing(actual Source buffer)    
-   * (b) Calculation of DCT2 using FFT is divided into three steps:    
-   *                  Step1: Re-ordering of even and odd elements of input.    
-   *                  Step2: Calculating FFT of the re-ordered input.    
-   *                  Step3: Taking the real part of the product of FFT output and weights.    
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:    
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *                        where,    
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output    
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).    
-   */
-
-        /*-------- Pre-processing ------------*/
-  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_mult_q31(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-  arm_shift_q31(pInlineBuffer, 1, pInlineBuffer, S->N);
-
-  /* ----------------------------------------------------------------    
-   * Step1: Re-ordering of even and odd elements as    
-   *             pState[i] =  pInlineBuffer[2*i] and    
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2    
-   ---------------------------------------------------------------------*/
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = S->Nby2 >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2u;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.    
-   * Compute 4 outputs at a time */
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
-
-  /*----------------------------------------------------------------------    
-   *  Step3: Multiply the FFT output with the weights.    
-   *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.29 format.    
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
-  arm_shift_q31(pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = (S->N - 1u) >> 2u;
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  i = (S->N - 1u) % 0x4u;
-
-  while(i > 0u)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2u;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initializing the loop counter to N/2 */
-  i = S->Nby2;
-
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter */
-  i = S->N;
-
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
-
-  /*----------------------------------------------------------------------    
-   *  Step3: Multiply the FFT output with the weights.    
-   *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.29 format.    
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
-  arm_shift_q31(pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* Initializing the loop counter */
-  i = (S->N - 1u);
-
-  while(i > 0u)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter */
-  i = S->N;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c
deleted file mode 100644
index a3a2d23aa5..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c
+++ /dev/null
@@ -1,382 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_f32.c    
-*    
-* Description:	RFFT & RIFFT Floating point process function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @defgroup RFFT_RIFFT Real FFT Functions    
- *    
- * \par    
- * Complex FFT/IFFT typically assumes complex input and output. However many applications use real valued data in time domain.     
- * Real FFT/IFFT efficiently process real valued sequences with the advantage of requirement of low memory and with less complexity.    
- *    
- * \par    
- * This set of functions implements Real Fast Fourier Transforms(RFFT) and Real Inverse Fast Fourier Transform(RIFFT)    
- * for Q15, Q31, and floating-point data types.      
- *    
- *    
- * \par Algorithm:    
- *    
- * Real Fast Fourier Transform:    
- * \par    
- * Real FFT of N-point is calculated using CFFT of N/2-point and Split RFFT process as shown below figure.    
- * \par    
- * \image html RFFT.gif "Real Fast Fourier Transform"    
- * \par    
- * The RFFT functions operate on blocks of input and output data and each call to the function processes    
- * fftLenR samples through the transform.  pSrc  points to input array containing fftLenR values.    
- * pDst  points to output array containing 2*fftLenR values. \n   
- * Input for real FFT is in the order of     
- * 
{real[0], real[1], real[2], real[3], ..}
    
- * Output for real FFT is complex and are in the order of    
- * 
{real(0), imag(0), real(1), imag(1), ...}
     
- *    
- * Real Inverse Fast Fourier Transform:    
- * \par    
- * Real IFFT of N-point is calculated using Split RIFFT process and CFFT of N/2-point as shown below figure.    
- * \par    
- * \image html RIFFT.gif "Real Inverse Fast Fourier Transform"    
- * \par    
- * The RIFFT functions operate on blocks of input and output data and each call to the function processes    
- * 2*fftLenR samples through the transform.  pSrc  points to input array containing 2*fftLenR values.    
- * pDst  points to output array containing fftLenR values. \n    
- * Input for real IFFT is complex and are in the order of   
- * 
{real(0), imag(0), real(1), imag(1), ...}
   
- *  Output for real IFFT is real and in the order of     
- * 
{real[0], real[1], real[2], real[3], ..}
   
- *    
- * \par Lengths supported by the transform:   
- * \par    
- * Real FFT/IFFT supports the lengths [128, 512, 2048], as it internally uses CFFT/CIFFT.    
- *    
- * \par Instance Structure    
- * A separate instance structure must be defined for each Instance but the twiddle factors can be reused.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Initializes twiddle factor tables.   
- * - Initializes CFFT data structure fields.     
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Manually initialize the instance structure as follows:    
- * 
    
- *arm_rfft_instance_f32 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- *arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- *arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- * 
    
- * where fftLenReal length of RFFT/RIFFT; fftLenBy2 length of CFFT/CIFFT.     
- * ifftFlagR Flag for selection of RFFT or RIFFT(Set ifftFlagR to calculate RIFFT otherwise calculates RFFT);    
- * bitReverseFlagR Flag for selection of output order(Set bitReverseFlagR to output in normal order otherwise output in bit reversed order);     
- * twidCoefRModifier modifier for twiddle factor table which supports 128, 512, 2048 RFFT lengths with same table;    
- * pTwiddleARealpoints to A array of twiddle coefficients; pTwiddleBRealpoints to B array of twiddle coefficients;    
- * pCfft points to the CFFT Instance structure. The CFFT structure also needs to be initialized, refer to arm_cfft_radix4_f32() for details regarding    
- * static initialization of cfft structure.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the RFFT/RIFFT function.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/*--------------------------------------------------------------------    
- *		Internal functions prototypes    
- *--------------------------------------------------------------------*/
-
-void arm_split_rfft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier);
-void arm_split_rifft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier);
-
-/**    
- * @addtogroup RFFT_RIFFT    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point RFFT/RIFFT.   
- * @param[in]  *S    points to an instance of the floating-point RFFT/RIFFT structure.   
- * @param[in]  *pSrc points to the input buffer.   
- * @param[out] *pDst points to the output buffer.   
- * @return none.   
- */
-
-void arm_rfft_f32(
-  const arm_rfft_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst)
-{
-  const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;
-
-
-  /* Calculation of Real IFFT of input */
-  if(S->ifftFlagR == 1u)
-  {
-    /*  Real IFFT core process */
-    arm_split_rifft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-
-
-    /* Complex radix-4 IFFT process */
-    arm_radix4_butterfly_inverse_f32(pDst, S_CFFT->fftLen,
-                                     S_CFFT->pTwiddle,
-                                     S_CFFT->twidCoefModifier,
-                                     S_CFFT->onebyfftLen);
-
-    /* Bit reversal process */
-    if(S->bitReverseFlagR == 1u)
-    {
-      arm_bitreversal_f32(pDst, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-  }
-  else
-  {
-
-    /* Calculation of RFFT of input */
-
-    /* Complex radix-4 FFT process */
-    arm_radix4_butterfly_f32(pSrc, S_CFFT->fftLen,
-                             S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
-
-    /* Bit reversal process */
-    if(S->bitReverseFlagR == 1u)
-    {
-      arm_bitreversal_f32(pSrc, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-
-
-    /*  Real FFT core process */
-    arm_split_rfft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                       S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-  }
-
-}
-
-/**    
-   * @} end of RFFT_RIFFT group    
-   */
-
-/**    
- * @brief  Core Real FFT process    
- * @param[in]   *pSrc 				points to the input buffer.    
- * @param[in]   fftLen  			length of FFT.    
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.    
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
- * @param[out]  *pDst 				points to the output buffer.    
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.    
- */
-
-void arm_split_rfft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier)
-{
-  uint32_t i;                                    /* Loop Counter */
-  float32_t outR, outI;                          /* Temporary variables for output */
-  float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
-  float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
-  float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4u * fftLen) - 1u];      /* temp pointers for output buffer */
-  float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2u * fftLen) - 1u];      /* temp pointers for input buffer */
-
-  /* Init coefficient pointers */
-  pCoefA = &pATable[modifier * 2u];
-  pCoefB = &pBTable[modifier * 2u];
-
-  i = fftLen - 1u;
-
-  while(i > 0u)
-  {
-    /*    
-       outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-       + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-       pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-     */
-
-    /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
-
-    /* read pATable[2 * i] */
-    CoefA1 = *pCoefA++;
-    /* pATable[2 * i + 1] */
-    CoefA2 = *pCoefA;
-
-    /* pSrc[2 * i] * pATable[2 * i] */
-    outR = *pSrc1 * CoefA1;
-    /* pSrc[2 * i] * CoefA2 */
-    outI = *pSrc1++ * CoefA2;
-
-    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
-    outR -= (*pSrc1 + *pSrc2) * CoefA2;
-    /* pSrc[2 * i + 1] * CoefA1 */
-    outI += *pSrc1++ * CoefA1;
-
-    CoefB1 = *pCoefB;
-
-    /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
-    outI -= *pSrc2-- * CoefB1;
-    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
-    outI -= *pSrc2 * CoefA2;
-
-    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
-    outR += *pSrc2-- * CoefB1;
-
-    /* write output */
-    *pDst1++ = outR;
-    *pDst1++ = outI;
-
-    /* write complex conjugate output */
-    *pDst2-- = -outI;
-    *pDst2-- = outR;
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (modifier * 2u);
-    pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-    i--;
-
-  }
-
-  pDst[2u * fftLen] = pSrc[0] - pSrc[1];
-  pDst[(2u * fftLen) + 1u] = 0.0f;
-
-  pDst[0] = pSrc[0] + pSrc[1];
-  pDst[1] = 0.0f;
-
-}
-
-
-/**    
- * @brief  Core Real IFFT process    
- * @param[in]   *pSrc 				points to the input buffer.    
- * @param[in]   fftLen  			length of FFT.   
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.   
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.   
- * @param[out]  *pDst 				points to the output buffer.   
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.    
- * @return none.    
- */
-
-void arm_split_rifft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier)
-{
-  float32_t outR, outI;                          /* Temporary variables for output */
-  float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
-  float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
-  float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2u * fftLen) + 1u];
-
-  pCoefA = &pATable[0];
-  pCoefB = &pBTable[0];
-
-  while(fftLen > 0u)
-  {
-    /*    
-       outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-
-       outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);    
-
-     */
-
-    CoefA1 = *pCoefA++;
-    CoefA2 = *pCoefA;
-
-    /* outR = (pSrc[2 * i] * CoefA1 */
-    outR = *pSrc1 * CoefA1;
-
-    /* - pSrc[2 * i] * CoefA2 */
-    outI = -(*pSrc1++) * CoefA2;
-
-    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
-    outR += (*pSrc1 + *pSrc2) * CoefA2;
-
-    /* pSrc[2 * i + 1] * CoefA1 */
-    outI += (*pSrc1++) * CoefA1;
-
-    CoefB1 = *pCoefB;
-
-    /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
-    outI -= *pSrc2-- * CoefB1;
-
-    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
-    outR += *pSrc2 * CoefB1;
-
-    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
-    outI += *pSrc2-- * CoefA2;
-
-    /* write output */
-    *pDst++ = outR;
-    *pDst++ = outI;
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (modifier * 2u);
-    pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-    /* Decrement loop count */
-    fftLen--;
-  }
-
-}
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c
deleted file mode 100644
index 0133ae511c..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c
+++ /dev/null
@@ -1,8369 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_init_f32.c    
-*    
-* Description:	RFFT & RIFFT Floating point initialisation function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup RFFT_RIFFT    
- * @{    
- */
-
-/**    
-* \par    
-* Generation of realCoefA array:    
-* \par    
-* 	n = 4096    
-* 
for (i = 0; i < n; i++)    
-*  {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
    
-*/
-
-
-
-static const float32_t realCoefA[8192] = {
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-    -0.499999850988388f,
-  0.499233007431030f, -0.499999403953552f, 0.498849511146545f,
-    -0.499998688697815f,
-  0.498466014862061f, -0.499997645616531f, 0.498082518577576f,
-    -0.499996334314346f,
-  0.497699022293091f, -0.499994695186615f, 0.497315555810928f,
-    -0.499992787837982f,
-  0.496932059526443f, -0.499990582466125f, 0.496548563241959f,
-    -0.499988079071045f,
-  0.496165096759796f, -0.499985307455063f, 0.495781600475311f,
-    -0.499982208013535f,
-  0.495398133993149f, -0.499978810548782f, 0.495014637708664f,
-    -0.499975144863129f,
-  0.494631171226501f, -0.499971181154251f, 0.494247704744339f,
-    -0.499966919422150f,
-  0.493864238262177f, -0.499962359666824f, 0.493480771780014f,
-    -0.499957501888275f,
-  0.493097305297852f, -0.499952346086502f, 0.492713838815689f,
-    -0.499946922063828f,
-  0.492330402135849f, -0.499941170215607f, 0.491946935653687f,
-    -0.499935150146484f,
-  0.491563498973846f, -0.499928832054138f, 0.491180062294006f,
-    -0.499922215938568f,
-  0.490796625614166f, -0.499915301799774f, 0.490413218736649f,
-    -0.499908089637756f,
-  0.490029782056808f, -0.499900579452515f, 0.489646375179291f,
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-    -0.499819844961166f,
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-    -0.499798685312271f,
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-    -0.499776333570480f,
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-    -0.499752789735794f,
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-    -0.499702215194702f,
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-    -0.499675154685974f,
-  0.481596380472183f, -0.499661177396774f, 0.481213152408600f,
-    -0.499646931886673f,
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-    -0.499617516994476f,
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-    -0.499586939811707f,
-  0.479297190904617f, -0.499571204185486f, 0.478914022445679f,
-    -0.499555170536041f,
-  0.478530883789063f, -0.499538868665695f, 0.478147745132446f,
-    -0.499522238969803f,
-  0.477764606475830f, -0.499505341053009f, 0.477381497621536f,
-    -0.499488145112991f,
-  0.476998418569565f, -0.499470651149750f, 0.476615339517593f,
-    -0.499452859163284f,
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-    -0.499416410923004f,
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-    -0.499378770589828f,
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-    -0.499339967966080f,
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-    -0.499299973249435f,
-  0.473168224096298f, -0.499279528856277f, 0.472785294055939f,
-    -0.499258816242218f,
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-    -0.499216467142105f,
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-    -0.499172955751419f,
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-    -0.499128282070160f,
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-    -0.499082416296005f,
-  0.469339638948441f, -0.499059051275253f, 0.468956857919693f,
-    -0.499035388231277f,
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-    -0.498937815427780f,
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-    -0.498616874217987f,
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-    -0.498559266328812f,
-  0.461688071489334f, -0.498530030250549f, 0.461305707693100f,
-    -0.498500496149063f,
-  0.460923373699188f, -0.498470664024353f, 0.460541069507599f,
-    -0.498440563678741f,
-  0.460158795118332f, -0.498410135507584f, 0.459776520729065f,
-    -0.498379439115524f,
-  0.459394276142120f, -0.498348444700241f, 0.459012061357498f,
-    -0.498317152261734f,
-  0.458629876375198f, -0.498285561800003f, 0.458247691392899f,
-    -0.498253703117371f,
-  0.457865566015244f, -0.498221516609192f, 0.457483440637589f,
-    -0.498189061880112f,
-  0.457101345062256f, -0.498156309127808f, 0.456719279289246f,
-    -0.498123258352280f,
-  0.456337243318558f, -0.498089909553528f, 0.455955207347870f,
-    -0.498056292533875f,
-  0.455573230981827f, -0.498022347688675f, 0.455191254615784f,
-    -0.497988134622574f,
-  0.454809308052063f, -0.497953623533249f, 0.454427421092987f,
-    -0.497918814420700f,
-  0.454045534133911f, -0.497883707284927f, 0.453663676977158f,
-    -0.497848302125931f,
-  0.453281819820404f, -0.497812628746033f, 0.452900022268295f,
-    -0.497776657342911f,
-  0.452518254518509f, -0.497740387916565f, 0.452136516571045f,
-    -0.497703820466995f,
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-    -0.497629791498184f,
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-    -0.497554630041122f,
-  0.450228184461594f, -0.497516602277756f, 0.449846625328064f,
-    -0.497478276491165f,
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-    -0.497161179780960f,
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-    -0.497078984975815f,
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-    -0.496561229228973f,
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-    -0.496286571025848f,
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-    -0.496192663908005f,
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-    -0.496097624301910f,
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-    -0.496001392602921f,
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-    -0.495903998613358f,
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-    -0.495805442333221f,
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-    -0.495705723762512f,
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-    -0.495604842901230f,
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-    -0.495502769947052f,
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-    -0.495399564504623f,
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-    -0.495295166969299f,
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-    -0.495189607143402f,
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-    -0.495082914829254f,
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-  0.403959810733795f, 0.490689605474472f, 0.404336184263229f,
-    0.490763127803802f,
-  0.404712617397308f, 0.490836352109909f, 0.405089110136032f,
-    0.490909278392792f,
-  0.405465662479401f, 0.490981936454773f, 0.405842274427414f,
-    0.491054296493530f,
-  0.406218945980072f, 0.491126358509064f, 0.406595647335052f,
-    0.491198152303696f,
-  0.406972438097000f, 0.491269648075104f, 0.407349258661270f,
-    0.491340845823288f,
-  0.407726138830185f, 0.491411775350571f, 0.408103078603745f,
-    0.491482406854630f,
-  0.408480048179626f, 0.491552740335464f, 0.408857107162476f,
-    0.491622805595398f,
-  0.409234195947647f, 0.491692543029785f, 0.409611344337463f,
-    0.491762012243271f,
-  0.409988552331924f, 0.491831213235855f, 0.410365819931030f,
-    0.491900116205215f,
-  0.410743117332459f, 0.491968721151352f, 0.411120474338531f,
-    0.492037028074265f,
-  0.411497890949249f, 0.492105036973953f, 0.411875367164612f,
-    0.492172777652740f,
-  0.412252873182297f, 0.492240220308304f, 0.412630438804626f,
-    0.492307394742966f,
-  0.413008064031601f, 0.492374241352081f, 0.413385748863220f,
-    0.492440819740295f,
-  0.413763463497162f, 0.492507129907608f, 0.414141237735748f,
-    0.492573112249374f,
-  0.414519041776657f, 0.492638826370239f, 0.414896935224533f,
-    0.492704242467880f,
-  0.415274858474731f, 0.492769360542297f, 0.415652841329575f,
-    0.492834210395813f,
-  0.416030853986740f, 0.492898762226105f, 0.416408926248550f,
-    0.492963016033173f,
-  0.416787058115005f, 0.493026971817017f, 0.417165219783783f,
-    0.493090659379959f,
-  0.417543441057205f, 0.493154048919678f, 0.417921721935272f,
-    0.493217140436172f,
-  0.418300032615662f, 0.493279963731766f, 0.418678402900696f,
-    0.493342459201813f,
-  0.419056802988052f, 0.493404686450958f, 0.419435262680054f,
-    0.493466645479202f,
-  0.419813781976700f, 0.493528276681900f, 0.420192331075668f,
-    0.493589639663696f,
-  0.420570939779282f, 0.493650704622269f, 0.420949578285217f,
-    0.493711471557617f,
-  0.421328276395798f, 0.493771970272064f, 0.421707004308701f,
-    0.493832170963287f,
-  0.422085791826248f, 0.493892073631287f, 0.422464638948441f,
-    0.493951678276062f,
-  0.422843515872955f, 0.494011014699936f, 0.423222452402115f,
-    0.494070053100586f,
-  0.423601418733597f, 0.494128793478012f, 0.423980414867401f,
-    0.494187235832214f,
-  0.424359470605850f, 0.494245409965515f, 0.424738585948944f,
-    0.494303256273270f,
-  0.425117731094360f, 0.494360834360123f, 0.425496935844421f,
-    0.494418144226074f,
-  0.425876170396805f, 0.494475126266479f, 0.426255434751511f,
-    0.494531840085983f,
-  0.426634758710861f, 0.494588255882263f, 0.427014142274857f,
-    0.494644373655319f,
-  0.427393525838852f, 0.494700223207474f, 0.427772998809814f,
-    0.494755744934082f,
-  0.428152471780777f, 0.494810998439789f, 0.428532034158707f,
-    0.494865983724594f,
-  0.428911596536636f, 0.494920641183853f, 0.429291218519211f,
-    0.494975030422211f,
-  0.429670870304108f, 0.495029091835022f, 0.430050581693649f,
-    0.495082914829254f,
-  0.430430322885513f, 0.495136409997940f, 0.430810123682022f,
-    0.495189607143402f,
-  0.431189924478531f, 0.495242536067963f, 0.431569814682007f,
-    0.495295166969299f,
-  0.431949704885483f, 0.495347499847412f, 0.432329654693604f,
-    0.495399564504623f,
-  0.432709634304047f, 0.495451331138611f, 0.433089673519135f,
-    0.495502769947052f,
-  0.433469742536545f, 0.495553970336914f, 0.433849841356277f,
-    0.495604842901230f,
-  0.434229999780655f, 0.495655417442322f, 0.434610158205032f,
-    0.495705723762512f,
-  0.434990376234055f, 0.495755732059479f, 0.435370653867722f,
-    0.495805442333221f,
-  0.435750931501389f, 0.495854884386063f, 0.436131268739700f,
-    0.495903998613358f,
-  0.436511665582657f, 0.495952844619751f, 0.436892062425613f,
-    0.496001392602921f,
-  0.437272518873215f, 0.496049642562866f, 0.437653005123138f,
-    0.496097624301910f,
-  0.438033521175385f, 0.496145308017731f, 0.438414067029953f,
-    0.496192663908005f,
-  0.438794672489166f, 0.496239781379700f, 0.439175277948380f,
-    0.496286571025848f,
-  0.439555943012238f, 0.496333062648773f, 0.439936667680740f,
-    0.496379286050797f,
-  0.440317392349243f, 0.496425211429596f, 0.440698176622391f,
-    0.496470838785172f,
-  0.441078960895538f, 0.496516168117523f, 0.441459804773331f,
-    0.496561229228973f,
-  0.441840678453445f, 0.496605962514877f, 0.442221581935883f,
-    0.496650427579880f,
-  0.442602545022964f, 0.496694594621658f, 0.442983508110046f,
-    0.496738493442535f,
-  0.443364530801773f, 0.496782064437866f, 0.443745553493500f,
-    0.496825367212296f,
-  0.444126635789871f, 0.496868371963501f, 0.444507747888565f,
-    0.496911078691483f,
-  0.444888889789581f, 0.496953487396240f, 0.445270061492920f,
-    0.496995598077774f,
-  0.445651292800903f, 0.497037440538406f, 0.446032524108887f,
-    0.497078984975815f,
-  0.446413785219193f, 0.497120231389999f, 0.446795076131821f,
-    0.497161179780960f,
-  0.447176426649094f, 0.497201830148697f, 0.447557777166367f,
-    0.497242212295532f,
-  0.447939187288284f, 0.497282296419144f, 0.448320597410202f,
-    0.497322082519531f,
-  0.448702067136765f, 0.497361570596695f, 0.449083566665649f,
-    0.497400760650635f,
-  0.449465066194534f, 0.497439652681351f, 0.449846625328064f,
-    0.497478276491165f,
-  0.450228184461594f, 0.497516602277756f, 0.450609803199768f,
-    0.497554630041122f,
-  0.450991421937943f, 0.497592359781265f, 0.451373100280762f,
-    0.497629791498184f,
-  0.451754778623581f, 0.497666954994202f, 0.452136516571045f,
-    0.497703820466995f,
-  0.452518254518509f, 0.497740387916565f, 0.452900022268295f,
-    0.497776657342911f,
-  0.453281819820404f, 0.497812628746033f, 0.453663676977158f,
-    0.497848302125931f,
-  0.454045534133911f, 0.497883707284927f, 0.454427421092987f,
-    0.497918814420700f,
-  0.454809308052063f, 0.497953623533249f, 0.455191254615784f,
-    0.497988134622574f,
-  0.455573230981827f, 0.498022347688675f, 0.455955207347870f,
-    0.498056292533875f,
-  0.456337243318558f, 0.498089909553528f, 0.456719279289246f,
-    0.498123258352280f,
-  0.457101345062256f, 0.498156309127808f, 0.457483440637589f,
-    0.498189061880112f,
-  0.457865566015244f, 0.498221516609192f, 0.458247691392899f,
-    0.498253703117371f,
-  0.458629876375198f, 0.498285561800003f, 0.459012061357498f,
-    0.498317152261734f,
-  0.459394276142120f, 0.498348444700241f, 0.459776520729065f,
-    0.498379439115524f,
-  0.460158795118332f, 0.498410135507584f, 0.460541069507599f,
-    0.498440563678741f,
-  0.460923373699188f, 0.498470664024353f, 0.461305707693100f,
-    0.498500496149063f,
-  0.461688071489334f, 0.498530030250549f, 0.462070435285568f,
-    0.498559266328812f,
-  0.462452858686447f, 0.498588204383850f, 0.462835282087326f,
-    0.498616874217987f,
-  0.463217705488205f, 0.498645216226578f, 0.463600188493729f,
-    0.498673290014267f,
-  0.463982671499252f, 0.498701065778732f, 0.464365184307098f,
-    0.498728543519974f,
-  0.464747726917267f, 0.498755723237991f, 0.465130269527435f,
-    0.498782604932785f,
-  0.465512841939926f, 0.498809218406677f, 0.465895414352417f,
-    0.498835533857346f,
-  0.466278046369553f, 0.498861521482468f, 0.466660678386688f,
-    0.498887240886688f,
-  0.467043310403824f, 0.498912662267685f, 0.467426002025604f,
-    0.498937815427780f,
-  0.467808693647385f, 0.498962640762329f, 0.468191385269165f,
-    0.498987197875977f,
-  0.468574106693268f, 0.499011427164078f, 0.468956857919693f,
-    0.499035388231277f,
-  0.469339638948441f, 0.499059051275253f, 0.469722419977188f,
-    0.499082416296005f,
-  0.470105201005936f, 0.499105513095856f, 0.470488041639328f,
-    0.499128282070160f,
-  0.470870882272720f, 0.499150782823563f, 0.471253722906113f,
-    0.499172955751419f,
-  0.471636593341827f, 0.499194860458374f, 0.472019463777542f,
-    0.499216467142105f,
-  0.472402364015579f, 0.499237775802612f, 0.472785294055939f,
-    0.499258816242218f,
-  0.473168224096298f, 0.499279528856277f, 0.473551183938980f,
-    0.499299973249435f,
-  0.473934143781662f, 0.499320119619370f, 0.474317133426666f,
-    0.499339967966080f,
-  0.474700123071671f, 0.499359518289566f, 0.475083142518997f,
-    0.499378770589828f,
-  0.475466161966324f, 0.499397724866867f, 0.475849211215973f,
-    0.499416410923004f,
-  0.476232260465622f, 0.499434769153595f, 0.476615339517593f,
-    0.499452859163284f,
-  0.476998418569565f, 0.499470651149750f, 0.477381497621536f,
-    0.499488145112991f,
-  0.477764606475830f, 0.499505341053009f, 0.478147745132446f,
-    0.499522238969803f,
-  0.478530883789063f, 0.499538868665695f, 0.478914022445679f,
-    0.499555170536041f,
-  0.479297190904617f, 0.499571204185486f, 0.479680359363556f,
-    0.499586939811707f,
-  0.480063527822495f, 0.499602377414703f, 0.480446726083755f,
-    0.499617516994476f,
-  0.480829954147339f, 0.499632388353348f, 0.481213152408600f,
-    0.499646931886673f,
-  0.481596380472183f, 0.499661177396774f, 0.481979638338089f,
-    0.499675154685974f,
-  0.482362866401672f, 0.499688833951950f, 0.482746154069901f,
-    0.499702215194702f,
-  0.483129411935806f, 0.499715298414230f, 0.483512699604034f,
-    0.499728083610535f,
-  0.483895987272263f, 0.499740600585938f, 0.484279274940491f,
-    0.499752789735794f,
-  0.484662592411041f, 0.499764710664749f, 0.485045909881592f,
-    0.499776333570480f,
-  0.485429257154465f, 0.499787658452988f, 0.485812574625015f,
-    0.499798685312271f,
-  0.486195921897888f, 0.499809414148331f, 0.486579269170761f,
-    0.499819844961166f,
-  0.486962646245956f, 0.499830007553101f, 0.487346023321152f,
-    0.499839842319489f,
-  0.487729400396347f, 0.499849408864975f, 0.488112777471542f,
-    0.499858677387238f,
-  0.488496154546738f, 0.499867647886276f, 0.488879561424255f,
-    0.499876320362091f,
-  0.489262968301773f, 0.499884694814682f, 0.489646375179291f,
-    0.499892801046371f,
-  0.490029782056808f, 0.499900579452515f, 0.490413218736649f,
-    0.499908089637756f,
-  0.490796625614166f, 0.499915301799774f, 0.491180062294006f,
-    0.499922215938568f,
-  0.491563498973846f, 0.499928832054138f, 0.491946935653687f,
-    0.499935150146484f,
-  0.492330402135849f, 0.499941170215607f, 0.492713838815689f,
-    0.499946922063828f,
-  0.493097305297852f, 0.499952346086502f, 0.493480771780014f,
-    0.499957501888275f,
-  0.493864238262177f, 0.499962359666824f, 0.494247704744339f,
-    0.499966919422150f,
-  0.494631171226501f, 0.499971181154251f, 0.495014637708664f,
-    0.499975144863129f,
-  0.495398133993149f, 0.499978810548782f, 0.495781600475311f,
-    0.499982208013535f,
-  0.496165096759796f, 0.499985307455063f, 0.496548563241959f,
-    0.499988079071045f,
-  0.496932059526443f, 0.499990582466125f, 0.497315555810928f,
-    0.499992787837982f,
-  0.497699022293091f, 0.499994695186615f, 0.498082518577576f,
-    0.499996334314346f,
-  0.498466014862061f, 0.499997645616531f, 0.498849511146545f,
-    0.499998688697815f,
-  0.499233007431030f, 0.499999403953552f, 0.499616503715515f,
-    0.499999850988388f,
-};
-
-
-/**    
-* \par   
-* Generation of realCoefB array:    
-* \par   
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-* {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
    
-*    
-*/
-static const float32_t realCoefB[8192] = {
-  0.500000000000000f, 0.500000000000000f, 0.500383496284485f,
-    0.499999850988388f,
-  0.500766992568970f, 0.499999403953552f, 0.501150488853455f,
-    0.499998688697815f,
-  0.501533985137939f, 0.499997645616531f, 0.501917481422424f,
-    0.499996334314346f,
-  0.502300977706909f, 0.499994695186615f, 0.502684473991394f,
-    0.499992787837982f,
-  0.503067970275879f, 0.499990582466125f, 0.503451406955719f,
-    0.499988079071045f,
-  0.503834903240204f, 0.499985307455063f, 0.504218399524689f,
-    0.499982208013535f,
-  0.504601895809174f, 0.499978810548782f, 0.504985332489014f,
-    0.499975144863129f,
-  0.505368828773499f, 0.499971181154251f, 0.505752325057983f,
-    0.499966919422150f,
-  0.506135761737823f, 0.499962359666824f, 0.506519258022308f,
-    0.499957501888275f,
-  0.506902694702148f, 0.499952346086502f, 0.507286131381989f,
-    0.499946922063828f,
-  0.507669627666473f, 0.499941170215607f, 0.508053064346313f,
-    0.499935150146484f,
-  0.508436501026154f, 0.499928832054138f, 0.508819937705994f,
-    0.499922215938568f,
-  0.509203374385834f, 0.499915301799774f, 0.509586811065674f,
-    0.499908089637756f,
-  0.509970188140869f, 0.499900579452515f, 0.510353624820709f,
-    0.499892801046371f,
-  0.510737061500549f, 0.499884694814682f, 0.511120438575745f,
-    0.499876320362091f,
-  0.511503815650940f, 0.499867647886276f, 0.511887252330780f,
-    0.499858677387238f,
-  0.512270629405975f, 0.499849408864975f, 0.512654006481171f,
-    0.499839842319489f,
-  0.513037383556366f, 0.499830007553101f, 0.513420701026917f,
-    0.499819844961166f,
-  0.513804078102112f, 0.499809414148331f, 0.514187395572662f,
-    0.499798685312271f,
-  0.514570772647858f, 0.499787658452988f, 0.514954090118408f,
-    0.499776333570480f,
-  0.515337407588959f, 0.499764710664749f, 0.515720725059509f,
-    0.499752789735794f,
-  0.516103982925415f, 0.499740600585938f, 0.516487300395966f,
-    0.499728083610535f,
-  0.516870558261871f, 0.499715298414230f, 0.517253875732422f,
-    0.499702215194702f,
-  0.517637133598328f, 0.499688833951950f, 0.518020391464233f,
-    0.499675154685974f,
-  0.518403589725494f, 0.499661177396774f, 0.518786847591400f,
-    0.499646931886673f,
-  0.519170045852661f, 0.499632388353348f, 0.519553244113922f,
-    0.499617516994476f,
-  0.519936442375183f, 0.499602377414703f, 0.520319640636444f,
-    0.499586939811707f,
-  0.520702838897705f, 0.499571204185486f, 0.521085977554321f,
-    0.499555170536041f,
-  0.521469116210938f, 0.499538868665695f, 0.521852254867554f,
-    0.499522238969803f,
-  0.522235393524170f, 0.499505341053009f, 0.522618472576141f,
-    0.499488145112991f,
-  0.523001611232758f, 0.499470651149750f, 0.523384690284729f,
-    0.499452859163284f,
-  0.523767769336700f, 0.499434769153595f, 0.524150788784027f,
-    0.499416410923004f,
-  0.524533808231354f, 0.499397724866867f, 0.524916887283325f,
-    0.499378770589828f,
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-  0.570329129695892f, -0.495029091835022f, 0.569949388504028f,
-    -0.495082914829254f,
-  0.569569647312164f, -0.495136409997940f, 0.569189906120300f,
-    -0.495189607143402f,
-  0.568810045719147f, -0.495242536067963f, 0.568430185317993f,
-    -0.495295166969299f,
-  0.568050265312195f, -0.495347499847412f, 0.567670345306396f,
-    -0.495399564504623f,
-  0.567290365695953f, -0.495451331138611f, 0.566910326480865f,
-    -0.495502769947052f,
-  0.566530287265778f, -0.495553970336914f, 0.566150128841400f,
-    -0.495604842901230f,
-  0.565770030021667f, -0.495655417442322f, 0.565389811992645f,
-    -0.495705723762512f,
-  0.565009593963623f, -0.495755732059479f, 0.564629375934601f,
-    -0.495805442333221f,
-  0.564249038696289f, -0.495854884386063f, 0.563868701457977f,
-    -0.495903998613358f,
-  0.563488364219666f, -0.495952844619751f, 0.563107967376709f,
-    -0.496001392602921f,
-  0.562727510929108f, -0.496049642562866f, 0.562346994876862f,
-    -0.496097624301910f,
-  0.561966478824615f, -0.496145308017731f, 0.561585903167725f,
-    -0.496192663908005f,
-  0.561205327510834f, -0.496239781379700f, 0.560824692249298f,
-    -0.496286571025848f,
-  0.560444056987762f, -0.496333062648773f, 0.560063362121582f,
-    -0.496379286050797f,
-  0.559682607650757f, -0.496425211429596f, 0.559301853179932f,
-    -0.496470838785172f,
-  0.558921039104462f, -0.496516168117523f, 0.558540165424347f,
-    -0.496561229228973f,
-  0.558159291744232f, -0.496605962514877f, 0.557778418064117f,
-    -0.496650427579880f,
-  0.557397484779358f, -0.496694594621658f, 0.557016491889954f,
-    -0.496738493442535f,
-  0.556635499000549f, -0.496782064437866f, 0.556254446506500f,
-    -0.496825367212296f,
-  0.555873334407806f, -0.496868371963501f, 0.555492222309113f,
-    -0.496911078691483f,
-  0.555111110210419f, -0.496953487396240f, 0.554729938507080f,
-    -0.496995598077774f,
-  0.554348707199097f, -0.497037440538406f, 0.553967475891113f,
-    -0.497078984975815f,
-  0.553586184978485f, -0.497120231389999f, 0.553204894065857f,
-    -0.497161179780960f,
-  0.552823603153229f, -0.497201830148697f, 0.552442193031311f,
-    -0.497242212295532f,
-  0.552060842514038f, -0.497282296419144f, 0.551679372787476f,
-    -0.497322082519531f,
-  0.551297962665558f, -0.497361570596695f, 0.550916433334351f,
-    -0.497400760650635f,
-  0.550534904003143f, -0.497439652681351f, 0.550153374671936f,
-    -0.497478276491165f,
-  0.549771785736084f, -0.497516602277756f, 0.549390196800232f,
-    -0.497554630041122f,
-  0.549008548259735f, -0.497592359781265f, 0.548626899719238f,
-    -0.497629791498184f,
-  0.548245191574097f, -0.497666954994202f, 0.547863483428955f,
-    -0.497703820466995f,
-  0.547481775283813f, -0.497740387916565f, 0.547099947929382f,
-    -0.497776657342911f,
-  0.546718180179596f, -0.497812628746033f, 0.546336352825165f,
-    -0.497848302125931f,
-  0.545954465866089f, -0.497883707284927f, 0.545572578907013f,
-    -0.497918814420700f,
-  0.545190691947937f, -0.497953623533249f, 0.544808745384216f,
-    -0.497988134622574f,
-  0.544426798820496f, -0.498022347688675f, 0.544044792652130f,
-    -0.498056292533875f,
-  0.543662786483765f, -0.498089909553528f, 0.543280720710754f,
-    -0.498123258352280f,
-  0.542898654937744f, -0.498156309127808f, 0.542516589164734f,
-    -0.498189061880112f,
-  0.542134463787079f, -0.498221516609192f, 0.541752278804779f,
-    -0.498253703117371f,
-  0.541370153427124f, -0.498285561800003f, 0.540987968444824f,
-    -0.498317152261734f,
-  0.540605723857880f, -0.498348444700241f, 0.540223479270935f,
-    -0.498379439115524f,
-  0.539841234683990f, -0.498410135507584f, 0.539458930492401f,
-    -0.498440563678741f,
-  0.539076626300812f, -0.498470664024353f, 0.538694262504578f,
-    -0.498500496149063f,
-  0.538311958312988f, -0.498530030250549f, 0.537929534912109f,
-    -0.498559266328812f,
-  0.537547171115875f, -0.498588204383850f, 0.537164747714996f,
-    -0.498616874217987f,
-  0.536782264709473f, -0.498645216226578f, 0.536399841308594f,
-    -0.498673290014267f,
-  0.536017298698425f, -0.498701065778732f, 0.535634815692902f,
-    -0.498728543519974f,
-  0.535252273082733f, -0.498755723237991f, 0.534869730472565f,
-    -0.498782604932785f,
-  0.534487187862396f, -0.498809218406677f, 0.534104585647583f,
-    -0.498835533857346f,
-  0.533721983432770f, -0.498861521482468f, 0.533339321613312f,
-    -0.498887240886688f,
-  0.532956659793854f, -0.498912662267685f, 0.532573997974396f,
-    -0.498937815427780f,
-  0.532191336154938f, -0.498962640762329f, 0.531808614730835f,
-    -0.498987197875977f,
-  0.531425893306732f, -0.499011427164078f, 0.531043112277985f,
-    -0.499035388231277f,
-  0.530660390853882f, -0.499059051275253f, 0.530277609825134f,
-    -0.499082416296005f,
-  0.529894769191742f, -0.499105513095856f, 0.529511988162994f,
-    -0.499128282070160f,
-  0.529129147529602f, -0.499150782823563f, 0.528746306896210f,
-    -0.499172955751419f,
-  0.528363406658173f, -0.499194860458374f, 0.527980506420136f,
-    -0.499216467142105f,
-  0.527597606182098f, -0.499237775802612f, 0.527214705944061f,
-    -0.499258816242218f,
-  0.526831746101379f, -0.499279528856277f, 0.526448845863342f,
-    -0.499299973249435f,
-  0.526065826416016f, -0.499320119619370f, 0.525682866573334f,
-    -0.499339967966080f,
-  0.525299847126007f, -0.499359518289566f, 0.524916887283325f,
-    -0.499378770589828f,
-  0.524533808231354f, -0.499397724866867f, 0.524150788784027f,
-    -0.499416410923004f,
-  0.523767769336700f, -0.499434769153595f, 0.523384690284729f,
-    -0.499452859163284f,
-  0.523001611232758f, -0.499470651149750f, 0.522618472576141f,
-    -0.499488145112991f,
-  0.522235393524170f, -0.499505341053009f, 0.521852254867554f,
-    -0.499522238969803f,
-  0.521469116210938f, -0.499538868665695f, 0.521085977554321f,
-    -0.499555170536041f,
-  0.520702838897705f, -0.499571204185486f, 0.520319640636444f,
-    -0.499586939811707f,
-  0.519936442375183f, -0.499602377414703f, 0.519553244113922f,
-    -0.499617516994476f,
-  0.519170045852661f, -0.499632388353348f, 0.518786847591400f,
-    -0.499646931886673f,
-  0.518403589725494f, -0.499661177396774f, 0.518020391464233f,
-    -0.499675154685974f,
-  0.517637133598328f, -0.499688833951950f, 0.517253875732422f,
-    -0.499702215194702f,
-  0.516870558261871f, -0.499715298414230f, 0.516487300395966f,
-    -0.499728083610535f,
-  0.516103982925415f, -0.499740600585938f, 0.515720725059509f,
-    -0.499752789735794f,
-  0.515337407588959f, -0.499764710664749f, 0.514954090118408f,
-    -0.499776333570480f,
-  0.514570772647858f, -0.499787658452988f, 0.514187395572662f,
-    -0.499798685312271f,
-  0.513804078102112f, -0.499809414148331f, 0.513420701026917f,
-    -0.499819844961166f,
-  0.513037383556366f, -0.499830007553101f, 0.512654006481171f,
-    -0.499839842319489f,
-  0.512270629405975f, -0.499849408864975f, 0.511887252330780f,
-    -0.499858677387238f,
-  0.511503815650940f, -0.499867647886276f, 0.511120438575745f,
-    -0.499876320362091f,
-  0.510737061500549f, -0.499884694814682f, 0.510353624820709f,
-    -0.499892801046371f,
-  0.509970188140869f, -0.499900579452515f, 0.509586811065674f,
-    -0.499908089637756f,
-  0.509203374385834f, -0.499915301799774f, 0.508819937705994f,
-    -0.499922215938568f,
-  0.508436501026154f, -0.499928832054138f, 0.508053064346313f,
-    -0.499935150146484f,
-  0.507669627666473f, -0.499941170215607f, 0.507286131381989f,
-    -0.499946922063828f,
-  0.506902694702148f, -0.499952346086502f, 0.506519258022308f,
-    -0.499957501888275f,
-  0.506135761737823f, -0.499962359666824f, 0.505752325057983f,
-    -0.499966919422150f,
-  0.505368828773499f, -0.499971181154251f, 0.504985332489014f,
-    -0.499975144863129f,
-  0.504601895809174f, -0.499978810548782f, 0.504218399524689f,
-    -0.499982208013535f,
-  0.503834903240204f, -0.499985307455063f, 0.503451406955719f,
-    -0.499988079071045f,
-  0.503067970275879f, -0.499990582466125f, 0.502684473991394f,
-    -0.499992787837982f,
-  0.502300977706909f, -0.499994695186615f, 0.501917481422424f,
-    -0.499996334314346f,
-  0.501533985137939f, -0.499997645616531f, 0.501150488853455f,
-    -0.499998688697815f,
-  0.500766992568970f, -0.499999403953552f, 0.500383496284485f,
-    -0.499999850988388f,
-};
-
-
-
-/**    
-* @brief  Initialization function for the floating-point RFFT/RIFFT.   
-* @param[in,out] *S             points to an instance of the floating-point RFFT/RIFFT structure.   
-* @param[in,out] *S_CFFT        points to an instance of the floating-point CFFT/CIFFT structure.   
-* @param[in]     fftLenReal     length of the FFT.   
-* @param[in]     ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.   
-*    
-* \par Description:   
-* \par   
-* The parameter fftLenReal	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
-* \par    
-* The parameter ifftFlagR controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par    
-* This function also initializes Twiddle factor table.     
-*/
-
-arm_status arm_rfft_init_f32(
-  arm_rfft_instance_f32 * S,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag)
-{
-
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialize the Real FFT length */
-  S->fftLenReal = (uint16_t) fftLenReal;
-
-  /*  Initialize the Complex FFT length */
-  S->fftLenBy2 = (uint16_t) fftLenReal / 2u;
-
-  /*  Initialize the Twiddle coefficientA pointer */
-  S->pTwiddleAReal = (float32_t *) realCoefA;
-
-  /*  Initialize the Twiddle coefficientB pointer */
-  S->pTwiddleBReal = (float32_t *) realCoefB;
-
-  /*  Initialize the Flag for selection of RFFT or RIFFT */
-  S->ifftFlagR = (uint8_t) ifftFlagR;
-
-  /*  Initialize the Flag for calculation Bit reversal or not */
-  S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLenReal)
-  {
-    /* Init table modifier value */
-  case 8192u:
-    S->twidCoefRModifier = 1u;
-    break;
-  case 2048u:
-    S->twidCoefRModifier = 4u;
-    break;
-  case 512u:
-    S->twidCoefRModifier = 16u;
-    break;
-  case 128u:
-    S->twidCoefRModifier = 64u;
-    break;
-  default:
-    /*  Reporting argument error if rfftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  /* Init Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  if(S->ifftFlagR)
-  {
-    /* Initializes the CIFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 1u, 0u);
-  }
-  else
-  {
-    /* Initializes the CFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 0u, 0u);
-  }
-
-  /* return the status of RFFT Init function */
-  return (status);
-
-}
-
-  /**    
-   * @} end of RFFT_RIFFT group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c
deleted file mode 100644
index 144b2d0c61..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c
+++ /dev/null
@@ -1,2229 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_init_q15.c    
-*    
-* Description:	RFFT & RIFFT Q15 initialisation function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup RFFT_RIFFT    
- * @{    
- */
-
-
-
-/**    
-* \par    
-* Generation floating point real_CoefA array:    
-* \par    
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-*  {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
    
-* \par    
-* Convert to fixed point Q15 format    
-*       round(pATable[i] * pow(2, 15))    
-*/
-
-
-static const q15_t ALIGN4 realCoefAQ15[8192] = {
-  0x4000, 0xc000, 0x3ff3, 0xc000, 0x3fe7, 0xc000, 0x3fda, 0xc000,
-  0x3fce, 0xc000, 0x3fc1, 0xc000, 0x3fb5, 0xc000, 0x3fa8, 0xc000,
-  0x3f9b, 0xc000, 0x3f8f, 0xc000, 0x3f82, 0xc000, 0x3f76, 0xc001,
-  0x3f69, 0xc001, 0x3f5d, 0xc001, 0x3f50, 0xc001, 0x3f44, 0xc001,
-  0x3f37, 0xc001, 0x3f2a, 0xc001, 0x3f1e, 0xc002, 0x3f11, 0xc002,
-  0x3f05, 0xc002, 0x3ef8, 0xc002, 0x3eec, 0xc002, 0x3edf, 0xc003,
-  0x3ed2, 0xc003, 0x3ec6, 0xc003, 0x3eb9, 0xc003, 0x3ead, 0xc004,
-  0x3ea0, 0xc004, 0x3e94, 0xc004, 0x3e87, 0xc004, 0x3e7a, 0xc005,
-  0x3e6e, 0xc005, 0x3e61, 0xc005, 0x3e55, 0xc006, 0x3e48, 0xc006,
-  0x3e3c, 0xc006, 0x3e2f, 0xc007, 0x3e23, 0xc007, 0x3e16, 0xc007,
-  0x3e09, 0xc008, 0x3dfd, 0xc008, 0x3df0, 0xc009, 0x3de4, 0xc009,
-  0x3dd7, 0xc009, 0x3dcb, 0xc00a, 0x3dbe, 0xc00a, 0x3db2, 0xc00b,
-  0x3da5, 0xc00b, 0x3d98, 0xc00c, 0x3d8c, 0xc00c, 0x3d7f, 0xc00d,
-  0x3d73, 0xc00d, 0x3d66, 0xc00e, 0x3d5a, 0xc00e, 0x3d4d, 0xc00f,
-  0x3d40, 0xc00f, 0x3d34, 0xc010, 0x3d27, 0xc010, 0x3d1b, 0xc011,
-  0x3d0e, 0xc011, 0x3d02, 0xc012, 0x3cf5, 0xc013, 0x3ce9, 0xc013,
-  0x3cdc, 0xc014, 0x3cd0, 0xc014, 0x3cc3, 0xc015, 0x3cb6, 0xc016,
-  0x3caa, 0xc016, 0x3c9d, 0xc017, 0x3c91, 0xc018, 0x3c84, 0xc018,
-  0x3c78, 0xc019, 0x3c6b, 0xc01a, 0x3c5f, 0xc01a, 0x3c52, 0xc01b,
-  0x3c45, 0xc01c, 0x3c39, 0xc01d, 0x3c2c, 0xc01d, 0x3c20, 0xc01e,
-  0x3c13, 0xc01f, 0x3c07, 0xc020, 0x3bfa, 0xc020, 0x3bee, 0xc021,
-  0x3be1, 0xc022, 0x3bd5, 0xc023, 0x3bc8, 0xc024, 0x3bbc, 0xc024,
-  0x3baf, 0xc025, 0x3ba2, 0xc026, 0x3b96, 0xc027, 0x3b89, 0xc028,
-  0x3b7d, 0xc029, 0x3b70, 0xc02a, 0x3b64, 0xc02b, 0x3b57, 0xc02b,
-  0x3b4b, 0xc02c, 0x3b3e, 0xc02d, 0x3b32, 0xc02e, 0x3b25, 0xc02f,
-  0x3b19, 0xc030, 0x3b0c, 0xc031, 0x3b00, 0xc032, 0x3af3, 0xc033,
-  0x3ae6, 0xc034, 0x3ada, 0xc035, 0x3acd, 0xc036, 0x3ac1, 0xc037,
-  0x3ab4, 0xc038, 0x3aa8, 0xc039, 0x3a9b, 0xc03a, 0x3a8f, 0xc03b,
-  0x3a82, 0xc03c, 0x3a76, 0xc03d, 0x3a69, 0xc03f, 0x3a5d, 0xc040,
-  0x3a50, 0xc041, 0x3a44, 0xc042, 0x3a37, 0xc043, 0x3a2b, 0xc044,
-  0x3a1e, 0xc045, 0x3a12, 0xc047, 0x3a05, 0xc048, 0x39f9, 0xc049,
-  0x39ec, 0xc04a, 0x39e0, 0xc04b, 0x39d3, 0xc04c, 0x39c7, 0xc04e,
-  0x39ba, 0xc04f, 0x39ae, 0xc050, 0x39a1, 0xc051, 0x3995, 0xc053,
-  0x3988, 0xc054, 0x397c, 0xc055, 0x396f, 0xc056, 0x3963, 0xc058,
-  0x3956, 0xc059, 0x394a, 0xc05a, 0x393d, 0xc05c, 0x3931, 0xc05d,
-  0x3924, 0xc05e, 0x3918, 0xc060, 0x390b, 0xc061, 0x38ff, 0xc062,
-  0x38f2, 0xc064, 0x38e6, 0xc065, 0x38d9, 0xc067, 0x38cd, 0xc068,
-  0x38c0, 0xc069, 0x38b4, 0xc06b, 0x38a7, 0xc06c, 0x389b, 0xc06e,
-  0x388e, 0xc06f, 0x3882, 0xc071, 0x3875, 0xc072, 0x3869, 0xc074,
-  0x385c, 0xc075, 0x3850, 0xc077, 0x3843, 0xc078, 0x3837, 0xc07a,
-  0x382a, 0xc07b, 0x381e, 0xc07d, 0x3811, 0xc07e, 0x3805, 0xc080,
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-  0x3795, 0xc08e, 0x3788, 0xc090, 0x377c, 0xc092, 0x376f, 0xc093,
-  0x3763, 0xc095, 0x3757, 0xc097, 0x374a, 0xc098, 0x373e, 0xc09a,
-  0x3731, 0xc09c, 0x3725, 0xc09e, 0x3718, 0xc09f, 0x370c, 0xc0a1,
-  0x36ff, 0xc0a3, 0x36f3, 0xc0a5, 0x36e7, 0xc0a6, 0x36da, 0xc0a8,
-  0x36ce, 0xc0aa, 0x36c1, 0xc0ac, 0x36b5, 0xc0ae, 0x36a8, 0xc0af,
-  0x369c, 0xc0b1, 0x3690, 0xc0b3, 0x3683, 0xc0b5, 0x3677, 0xc0b7,
-  0x366a, 0xc0b9, 0x365e, 0xc0bb, 0x3651, 0xc0bd, 0x3645, 0xc0be,
-  0x3639, 0xc0c0, 0x362c, 0xc0c2, 0x3620, 0xc0c4, 0x3613, 0xc0c6,
-  0x3607, 0xc0c8, 0x35fa, 0xc0ca, 0x35ee, 0xc0cc, 0x35e2, 0xc0ce,
-  0x35d5, 0xc0d0, 0x35c9, 0xc0d2, 0x35bc, 0xc0d4, 0x35b0, 0xc0d6,
-  0x35a4, 0xc0d8, 0x3597, 0xc0da, 0x358b, 0xc0dc, 0x357e, 0xc0de,
-  0x3572, 0xc0e0, 0x3566, 0xc0e2, 0x3559, 0xc0e4, 0x354d, 0xc0e7,
-  0x3540, 0xc0e9, 0x3534, 0xc0eb, 0x3528, 0xc0ed, 0x351b, 0xc0ef,
-  0x350f, 0xc0f1, 0x3503, 0xc0f3, 0x34f6, 0xc0f6, 0x34ea, 0xc0f8,
-  0x34dd, 0xc0fa, 0x34d1, 0xc0fc, 0x34c5, 0xc0fe, 0x34b8, 0xc100,
-  0x34ac, 0xc103, 0x34a0, 0xc105, 0x3493, 0xc107, 0x3487, 0xc109,
-  0x347b, 0xc10c, 0x346e, 0xc10e, 0x3462, 0xc110, 0x3455, 0xc113,
-  0x3449, 0xc115, 0x343d, 0xc117, 0x3430, 0xc119, 0x3424, 0xc11c,
-  0x3418, 0xc11e, 0x340b, 0xc120, 0x33ff, 0xc123, 0x33f3, 0xc125,
-  0x33e6, 0xc128, 0x33da, 0xc12a, 0x33ce, 0xc12c, 0x33c1, 0xc12f,
-  0x33b5, 0xc131, 0x33a9, 0xc134, 0x339c, 0xc136, 0x3390, 0xc138,
-  0x3384, 0xc13b, 0x3377, 0xc13d, 0x336b, 0xc140, 0x335f, 0xc142,
-  0x3352, 0xc145, 0x3346, 0xc147, 0x333a, 0xc14a, 0x332d, 0xc14c,
-  0x3321, 0xc14f, 0x3315, 0xc151, 0x3308, 0xc154, 0x32fc, 0xc156,
-  0x32f0, 0xc159, 0x32e4, 0xc15b, 0x32d7, 0xc15e, 0x32cb, 0xc161,
-  0x32bf, 0xc163, 0x32b2, 0xc166, 0x32a6, 0xc168, 0x329a, 0xc16b,
-  0x328e, 0xc16e, 0x3281, 0xc170, 0x3275, 0xc173, 0x3269, 0xc176,
-  0x325c, 0xc178, 0x3250, 0xc17b, 0x3244, 0xc17e, 0x3238, 0xc180,
-  0x322b, 0xc183, 0x321f, 0xc186, 0x3213, 0xc189, 0x3207, 0xc18b,
-  0x31fa, 0xc18e, 0x31ee, 0xc191, 0x31e2, 0xc194, 0x31d5, 0xc196,
-  0x31c9, 0xc199, 0x31bd, 0xc19c, 0x31b1, 0xc19f, 0x31a4, 0xc1a2,
-  0x3198, 0xc1a4, 0x318c, 0xc1a7, 0x3180, 0xc1aa, 0x3174, 0xc1ad,
-  0x3167, 0xc1b0, 0x315b, 0xc1b3, 0x314f, 0xc1b6, 0x3143, 0xc1b8,
-  0x3136, 0xc1bb, 0x312a, 0xc1be, 0x311e, 0xc1c1, 0x3112, 0xc1c4,
-  0x3105, 0xc1c7, 0x30f9, 0xc1ca, 0x30ed, 0xc1cd, 0x30e1, 0xc1d0,
-  0x30d5, 0xc1d3, 0x30c8, 0xc1d6, 0x30bc, 0xc1d9, 0x30b0, 0xc1dc,
-  0x30a4, 0xc1df, 0x3098, 0xc1e2, 0x308b, 0xc1e5, 0x307f, 0xc1e8,
-  0x3073, 0xc1eb, 0x3067, 0xc1ee, 0x305b, 0xc1f1, 0x304e, 0xc1f4,
-  0x3042, 0xc1f7, 0x3036, 0xc1fa, 0x302a, 0xc1fd, 0x301e, 0xc201,
-  0x3012, 0xc204, 0x3005, 0xc207, 0x2ff9, 0xc20a, 0x2fed, 0xc20d,
-  0x2fe1, 0xc210, 0x2fd5, 0xc213, 0x2fc9, 0xc217, 0x2fbc, 0xc21a,
-  0x2fb0, 0xc21d, 0x2fa4, 0xc220, 0x2f98, 0xc223, 0x2f8c, 0xc227,
-  0x2f80, 0xc22a, 0x2f74, 0xc22d, 0x2f67, 0xc230, 0x2f5b, 0xc234,
-  0x2f4f, 0xc237, 0x2f43, 0xc23a, 0x2f37, 0xc23e, 0x2f2b, 0xc241,
-  0x2f1f, 0xc244, 0x2f13, 0xc247, 0x2f06, 0xc24b, 0x2efa, 0xc24e,
-  0x2eee, 0xc251, 0x2ee2, 0xc255, 0x2ed6, 0xc258, 0x2eca, 0xc25c,
-  0x2ebe, 0xc25f, 0x2eb2, 0xc262, 0x2ea6, 0xc266, 0x2e99, 0xc269,
-  0x2e8d, 0xc26d, 0x2e81, 0xc270, 0x2e75, 0xc273, 0x2e69, 0xc277,
-  0x2e5d, 0xc27a, 0x2e51, 0xc27e, 0x2e45, 0xc281, 0x2e39, 0xc285,
-  0x2e2d, 0xc288, 0x2e21, 0xc28c, 0x2e15, 0xc28f, 0x2e09, 0xc293,
-  0x2dfc, 0xc296, 0x2df0, 0xc29a, 0x2de4, 0xc29d, 0x2dd8, 0xc2a1,
-  0x2dcc, 0xc2a5, 0x2dc0, 0xc2a8, 0x2db4, 0xc2ac, 0x2da8, 0xc2af,
-  0x2d9c, 0xc2b3, 0x2d90, 0xc2b7, 0x2d84, 0xc2ba, 0x2d78, 0xc2be,
-  0x2d6c, 0xc2c1, 0x2d60, 0xc2c5, 0x2d54, 0xc2c9, 0x2d48, 0xc2cc,
-  0x2d3c, 0xc2d0, 0x2d30, 0xc2d4, 0x2d24, 0xc2d8, 0x2d18, 0xc2db,
-  0x2d0c, 0xc2df, 0x2d00, 0xc2e3, 0x2cf4, 0xc2e6, 0x2ce8, 0xc2ea,
-  0x2cdc, 0xc2ee, 0x2cd0, 0xc2f2, 0x2cc4, 0xc2f5, 0x2cb8, 0xc2f9,
-  0x2cac, 0xc2fd, 0x2ca0, 0xc301, 0x2c94, 0xc305, 0x2c88, 0xc308,
-  0x2c7c, 0xc30c, 0x2c70, 0xc310, 0x2c64, 0xc314, 0x2c58, 0xc318,
-  0x2c4c, 0xc31c, 0x2c40, 0xc320, 0x2c34, 0xc323, 0x2c28, 0xc327,
-  0x2c1c, 0xc32b, 0x2c10, 0xc32f, 0x2c05, 0xc333, 0x2bf9, 0xc337,
-  0x2bed, 0xc33b, 0x2be1, 0xc33f, 0x2bd5, 0xc343, 0x2bc9, 0xc347,
-  0x2bbd, 0xc34b, 0x2bb1, 0xc34f, 0x2ba5, 0xc353, 0x2b99, 0xc357,
-  0x2b8d, 0xc35b, 0x2b81, 0xc35f, 0x2b75, 0xc363, 0x2b6a, 0xc367,
-  0x2b5e, 0xc36b, 0x2b52, 0xc36f, 0x2b46, 0xc373, 0x2b3a, 0xc377,
-  0x2b2e, 0xc37b, 0x2b22, 0xc37f, 0x2b16, 0xc383, 0x2b0a, 0xc387,
-  0x2aff, 0xc38c, 0x2af3, 0xc390, 0x2ae7, 0xc394, 0x2adb, 0xc398,
-  0x2acf, 0xc39c, 0x2ac3, 0xc3a0, 0x2ab7, 0xc3a5, 0x2aac, 0xc3a9,
-  0x2aa0, 0xc3ad, 0x2a94, 0xc3b1, 0x2a88, 0xc3b5, 0x2a7c, 0xc3ba,
-  0x2a70, 0xc3be, 0x2a65, 0xc3c2, 0x2a59, 0xc3c6, 0x2a4d, 0xc3ca,
-  0x2a41, 0xc3cf, 0x2a35, 0xc3d3, 0x2a29, 0xc3d7, 0x2a1e, 0xc3dc,
-  0x2a12, 0xc3e0, 0x2a06, 0xc3e4, 0x29fa, 0xc3e9, 0x29ee, 0xc3ed,
-  0x29e3, 0xc3f1, 0x29d7, 0xc3f6, 0x29cb, 0xc3fa, 0x29bf, 0xc3fe,
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-  0x289a, 0xc46e, 0x288e, 0xc473, 0x2882, 0xc478, 0x2877, 0xc47c,
-  0x286b, 0xc481, 0x285f, 0xc485, 0x2854, 0xc48a, 0x2848, 0xc48f,
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-  0x27b1, 0xc4cc, 0x27a5, 0xc4d1, 0x2799, 0xc4d6, 0x278e, 0xc4da,
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-  0x222d, 0xc75f, 0x2222, 0xc765, 0x2217, 0xc76b, 0x220c, 0xc771,
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-  0x21a8, 0xc7a6, 0x219d, 0xc7ac, 0x2192, 0xc7b2, 0x2187, 0xc7b8,
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-  0x2150, 0xc7d6, 0x2145, 0xc7dc, 0x213a, 0xc7e2, 0x212f, 0xc7e8,
-  0x2124, 0xc7ee, 0x2119, 0xc7f5, 0x210e, 0xc7fb, 0x2103, 0xc801,
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-  0x20cc, 0xc81f, 0x20c1, 0xc825, 0x20b6, 0xc82b, 0x20ab, 0xc832,
-  0x20a0, 0xc838, 0x2095, 0xc83e, 0x208a, 0xc844, 0x207f, 0xc84a,
-  0x2074, 0xc850, 0x2069, 0xc857, 0x205e, 0xc85d, 0x2054, 0xc863,
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-  0x1fc6, 0xc8b5, 0x1fbb, 0xc8bb, 0x1fb0, 0xc8c1, 0x1fa5, 0xc8c8,
-  0x1f9b, 0xc8ce, 0x1f90, 0xc8d4, 0x1f85, 0xc8db, 0x1f7a, 0xc8e1,
-  0x1f6f, 0xc8e8, 0x1f65, 0xc8ee, 0x1f5a, 0xc8f4, 0x1f4f, 0xc8fb,
-  0x1f44, 0xc901, 0x1f39, 0xc908, 0x1f2f, 0xc90e, 0x1f24, 0xc915,
-  0x1f19, 0xc91b, 0x1f0e, 0xc921, 0x1f03, 0xc928, 0x1ef9, 0xc92e,
-  0x1eee, 0xc935, 0x1ee3, 0xc93b, 0x1ed8, 0xc942, 0x1ece, 0xc948,
-  0x1ec3, 0xc94f, 0x1eb8, 0xc955, 0x1ead, 0xc95c, 0x1ea3, 0xc963,
-  0x1e98, 0xc969, 0x1e8d, 0xc970, 0x1e83, 0xc976, 0x1e78, 0xc97d,
-  0x1e6d, 0xc983, 0x1e62, 0xc98a, 0x1e58, 0xc991, 0x1e4d, 0xc997,
-  0x1e42, 0xc99e, 0x1e38, 0xc9a4, 0x1e2d, 0xc9ab, 0x1e22, 0xc9b2,
-  0x1e18, 0xc9b8, 0x1e0d, 0xc9bf, 0x1e02, 0xc9c6, 0x1df8, 0xc9cc,
-  0x1ded, 0xc9d3, 0x1de2, 0xc9da, 0x1dd8, 0xc9e0, 0x1dcd, 0xc9e7,
-  0x1dc3, 0xc9ee, 0x1db8, 0xc9f5, 0x1dad, 0xc9fb, 0x1da3, 0xca02,
-  0x1d98, 0xca09, 0x1d8e, 0xca10, 0x1d83, 0xca16, 0x1d78, 0xca1d,
-  0x1d6e, 0xca24, 0x1d63, 0xca2b, 0x1d59, 0xca32, 0x1d4e, 0xca38,
-  0x1d44, 0xca3f, 0x1d39, 0xca46, 0x1d2e, 0xca4d, 0x1d24, 0xca54,
-  0x1d19, 0xca5b, 0x1d0f, 0xca61, 0x1d04, 0xca68, 0x1cfa, 0xca6f,
-  0x1cef, 0xca76, 0x1ce5, 0xca7d, 0x1cda, 0xca84, 0x1cd0, 0xca8b,
-  0x1cc5, 0xca92, 0x1cbb, 0xca99, 0x1cb0, 0xca9f, 0x1ca6, 0xcaa6,
-  0x1c9b, 0xcaad, 0x1c91, 0xcab4, 0x1c86, 0xcabb, 0x1c7c, 0xcac2,
-  0x1c72, 0xcac9, 0x1c67, 0xcad0, 0x1c5d, 0xcad7, 0x1c52, 0xcade,
-  0x1c48, 0xcae5, 0x1c3d, 0xcaec, 0x1c33, 0xcaf3, 0x1c29, 0xcafa,
-  0x1c1e, 0xcb01, 0x1c14, 0xcb08, 0x1c09, 0xcb0f, 0x1bff, 0xcb16,
-  0x1bf5, 0xcb1e, 0x1bea, 0xcb25, 0x1be0, 0xcb2c, 0x1bd5, 0xcb33,
-  0x1bcb, 0xcb3a, 0x1bc1, 0xcb41, 0x1bb6, 0xcb48, 0x1bac, 0xcb4f,
-  0x1ba2, 0xcb56, 0x1b97, 0xcb5e, 0x1b8d, 0xcb65, 0x1b83, 0xcb6c,
-  0x1b78, 0xcb73, 0x1b6e, 0xcb7a, 0x1b64, 0xcb81, 0x1b59, 0xcb89,
-  0x1b4f, 0xcb90, 0x1b45, 0xcb97, 0x1b3b, 0xcb9e, 0x1b30, 0xcba5,
-  0x1b26, 0xcbad, 0x1b1c, 0xcbb4, 0x1b11, 0xcbbb, 0x1b07, 0xcbc2,
-  0x1afd, 0xcbca, 0x1af3, 0xcbd1, 0x1ae8, 0xcbd8, 0x1ade, 0xcbe0,
-  0x1ad4, 0xcbe7, 0x1aca, 0xcbee, 0x1abf, 0xcbf5, 0x1ab5, 0xcbfd,
-  0x1aab, 0xcc04, 0x1aa1, 0xcc0b, 0x1a97, 0xcc13, 0x1a8c, 0xcc1a,
-  0x1a82, 0xcc21, 0x1a78, 0xcc29, 0x1a6e, 0xcc30, 0x1a64, 0xcc38,
-  0x1a5a, 0xcc3f, 0x1a4f, 0xcc46, 0x1a45, 0xcc4e, 0x1a3b, 0xcc55,
-  0x1a31, 0xcc5d, 0x1a27, 0xcc64, 0x1a1d, 0xcc6b, 0x1a13, 0xcc73,
-  0x1a08, 0xcc7a, 0x19fe, 0xcc82, 0x19f4, 0xcc89, 0x19ea, 0xcc91,
-  0x19e0, 0xcc98, 0x19d6, 0xcca0, 0x19cc, 0xcca7, 0x19c2, 0xccaf,
-  0x19b8, 0xccb6, 0x19ae, 0xccbe, 0x19a4, 0xccc5, 0x199a, 0xcccd,
-  0x198f, 0xccd4, 0x1985, 0xccdc, 0x197b, 0xcce3, 0x1971, 0xcceb,
-  0x1967, 0xccf3, 0x195d, 0xccfa, 0x1953, 0xcd02, 0x1949, 0xcd09,
-  0x193f, 0xcd11, 0x1935, 0xcd19, 0x192b, 0xcd20, 0x1921, 0xcd28,
-  0x1917, 0xcd30, 0x190d, 0xcd37, 0x1903, 0xcd3f, 0x18f9, 0xcd46,
-  0x18ef, 0xcd4e, 0x18e6, 0xcd56, 0x18dc, 0xcd5d, 0x18d2, 0xcd65,
-  0x18c8, 0xcd6d, 0x18be, 0xcd75, 0x18b4, 0xcd7c, 0x18aa, 0xcd84,
-  0x18a0, 0xcd8c, 0x1896, 0xcd93, 0x188c, 0xcd9b, 0x1882, 0xcda3,
-  0x1878, 0xcdab, 0x186f, 0xcdb2, 0x1865, 0xcdba, 0x185b, 0xcdc2,
-  0x1851, 0xcdca, 0x1847, 0xcdd2, 0x183d, 0xcdd9, 0x1833, 0xcde1,
-  0x182a, 0xcde9, 0x1820, 0xcdf1, 0x1816, 0xcdf9, 0x180c, 0xce01,
-  0x1802, 0xce08, 0x17f8, 0xce10, 0x17ef, 0xce18, 0x17e5, 0xce20,
-  0x17db, 0xce28, 0x17d1, 0xce30, 0x17c8, 0xce38, 0x17be, 0xce40,
-  0x17b4, 0xce47, 0x17aa, 0xce4f, 0x17a0, 0xce57, 0x1797, 0xce5f,
-  0x178d, 0xce67, 0x1783, 0xce6f, 0x177a, 0xce77, 0x1770, 0xce7f,
-  0x1766, 0xce87, 0x175c, 0xce8f, 0x1753, 0xce97, 0x1749, 0xce9f,
-  0x173f, 0xcea7, 0x1736, 0xceaf, 0x172c, 0xceb7, 0x1722, 0xcebf,
-  0x1719, 0xcec7, 0x170f, 0xcecf, 0x1705, 0xced7, 0x16fc, 0xcedf,
-  0x16f2, 0xcee7, 0x16e8, 0xceef, 0x16df, 0xcef7, 0x16d5, 0xceff,
-  0x16cb, 0xcf07, 0x16c2, 0xcf10, 0x16b8, 0xcf18, 0x16af, 0xcf20,
-  0x16a5, 0xcf28, 0x169b, 0xcf30, 0x1692, 0xcf38, 0x1688, 0xcf40,
-  0x167f, 0xcf48, 0x1675, 0xcf51, 0x166c, 0xcf59, 0x1662, 0xcf61,
-  0x1659, 0xcf69, 0x164f, 0xcf71, 0x1645, 0xcf79, 0x163c, 0xcf82,
-  0x1632, 0xcf8a, 0x1629, 0xcf92, 0x161f, 0xcf9a, 0x1616, 0xcfa3,
-  0x160c, 0xcfab, 0x1603, 0xcfb3, 0x15f9, 0xcfbb, 0x15f0, 0xcfc4,
-  0x15e6, 0xcfcc, 0x15dd, 0xcfd4, 0x15d4, 0xcfdc, 0x15ca, 0xcfe5,
-  0x15c1, 0xcfed, 0x15b7, 0xcff5, 0x15ae, 0xcffe, 0x15a4, 0xd006,
-  0x159b, 0xd00e, 0x1592, 0xd016, 0x1588, 0xd01f, 0x157f, 0xd027,
-  0x1575, 0xd030, 0x156c, 0xd038, 0x1563, 0xd040, 0x1559, 0xd049,
-  0x1550, 0xd051, 0x1547, 0xd059, 0x153d, 0xd062, 0x1534, 0xd06a,
-  0x152a, 0xd073, 0x1521, 0xd07b, 0x1518, 0xd083, 0x150e, 0xd08c,
-  0x1505, 0xd094, 0x14fc, 0xd09d, 0x14f3, 0xd0a5, 0x14e9, 0xd0ae,
-  0x14e0, 0xd0b6, 0x14d7, 0xd0bf, 0x14cd, 0xd0c7, 0x14c4, 0xd0d0,
-  0x14bb, 0xd0d8, 0x14b2, 0xd0e0, 0x14a8, 0xd0e9, 0x149f, 0xd0f2,
-  0x1496, 0xd0fa, 0x148d, 0xd103, 0x1483, 0xd10b, 0x147a, 0xd114,
-  0x1471, 0xd11c, 0x1468, 0xd125, 0x145f, 0xd12d, 0x1455, 0xd136,
-  0x144c, 0xd13e, 0x1443, 0xd147, 0x143a, 0xd150, 0x1431, 0xd158,
-  0x1428, 0xd161, 0x141e, 0xd169, 0x1415, 0xd172, 0x140c, 0xd17b,
-  0x1403, 0xd183, 0x13fa, 0xd18c, 0x13f1, 0xd195, 0x13e8, 0xd19d,
-  0x13df, 0xd1a6, 0x13d5, 0xd1af, 0x13cc, 0xd1b7, 0x13c3, 0xd1c0,
-  0x13ba, 0xd1c9, 0x13b1, 0xd1d1, 0x13a8, 0xd1da, 0x139f, 0xd1e3,
-  0x1396, 0xd1eb, 0x138d, 0xd1f4, 0x1384, 0xd1fd, 0x137b, 0xd206,
-  0x1372, 0xd20e, 0x1369, 0xd217, 0x1360, 0xd220, 0x1357, 0xd229,
-  0x134e, 0xd231, 0x1345, 0xd23a, 0x133c, 0xd243, 0x1333, 0xd24c,
-  0x132a, 0xd255, 0x1321, 0xd25d, 0x1318, 0xd266, 0x130f, 0xd26f,
-  0x1306, 0xd278, 0x12fd, 0xd281, 0x12f4, 0xd28a, 0x12eb, 0xd292,
-  0x12e2, 0xd29b, 0x12d9, 0xd2a4, 0x12d1, 0xd2ad, 0x12c8, 0xd2b6,
-  0x12bf, 0xd2bf, 0x12b6, 0xd2c8, 0x12ad, 0xd2d1, 0x12a4, 0xd2d9,
-  0x129b, 0xd2e2, 0x1292, 0xd2eb, 0x128a, 0xd2f4, 0x1281, 0xd2fd,
-  0x1278, 0xd306, 0x126f, 0xd30f, 0x1266, 0xd318, 0x125d, 0xd321,
-  0x1255, 0xd32a, 0x124c, 0xd333, 0x1243, 0xd33c, 0x123a, 0xd345,
-  0x1231, 0xd34e, 0x1229, 0xd357, 0x1220, 0xd360, 0x1217, 0xd369,
-  0x120e, 0xd372, 0x1206, 0xd37b, 0x11fd, 0xd384, 0x11f4, 0xd38d,
-  0x11eb, 0xd396, 0x11e3, 0xd39f, 0x11da, 0xd3a8, 0x11d1, 0xd3b1,
-  0x11c9, 0xd3ba, 0x11c0, 0xd3c3, 0x11b7, 0xd3cc, 0x11af, 0xd3d5,
-  0x11a6, 0xd3df, 0x119d, 0xd3e8, 0x1195, 0xd3f1, 0x118c, 0xd3fa,
-  0x1183, 0xd403, 0x117b, 0xd40c, 0x1172, 0xd415, 0x1169, 0xd41e,
-  0x1161, 0xd428, 0x1158, 0xd431, 0x1150, 0xd43a, 0x1147, 0xd443,
-  0x113e, 0xd44c, 0x1136, 0xd455, 0x112d, 0xd45f, 0x1125, 0xd468,
-  0x111c, 0xd471, 0x1114, 0xd47a, 0x110b, 0xd483, 0x1103, 0xd48d,
-  0x10fa, 0xd496, 0x10f2, 0xd49f, 0x10e9, 0xd4a8, 0x10e0, 0xd4b2,
-  0x10d8, 0xd4bb, 0x10d0, 0xd4c4, 0x10c7, 0xd4cd, 0x10bf, 0xd4d7,
-  0x10b6, 0xd4e0, 0x10ae, 0xd4e9, 0x10a5, 0xd4f3, 0x109d, 0xd4fc,
-  0x1094, 0xd505, 0x108c, 0xd50e, 0x1083, 0xd518, 0x107b, 0xd521,
-  0x1073, 0xd52a, 0x106a, 0xd534, 0x1062, 0xd53d, 0x1059, 0xd547,
-  0x1051, 0xd550, 0x1049, 0xd559, 0x1040, 0xd563, 0x1038, 0xd56c,
-  0x1030, 0xd575, 0x1027, 0xd57f, 0x101f, 0xd588, 0x1016, 0xd592,
-  0x100e, 0xd59b, 0x1006, 0xd5a4, 0xffe, 0xd5ae, 0xff5, 0xd5b7,
-  0xfed, 0xd5c1, 0xfe5, 0xd5ca, 0xfdc, 0xd5d4, 0xfd4, 0xd5dd,
-  0xfcc, 0xd5e6, 0xfc4, 0xd5f0, 0xfbb, 0xd5f9, 0xfb3, 0xd603,
-  0xfab, 0xd60c, 0xfa3, 0xd616, 0xf9a, 0xd61f, 0xf92, 0xd629,
-  0xf8a, 0xd632, 0xf82, 0xd63c, 0xf79, 0xd645, 0xf71, 0xd64f,
-  0xf69, 0xd659, 0xf61, 0xd662, 0xf59, 0xd66c, 0xf51, 0xd675,
-  0xf48, 0xd67f, 0xf40, 0xd688, 0xf38, 0xd692, 0xf30, 0xd69b,
-  0xf28, 0xd6a5, 0xf20, 0xd6af, 0xf18, 0xd6b8, 0xf10, 0xd6c2,
-  0xf07, 0xd6cb, 0xeff, 0xd6d5, 0xef7, 0xd6df, 0xeef, 0xd6e8,
-  0xee7, 0xd6f2, 0xedf, 0xd6fc, 0xed7, 0xd705, 0xecf, 0xd70f,
-  0xec7, 0xd719, 0xebf, 0xd722, 0xeb7, 0xd72c, 0xeaf, 0xd736,
-  0xea7, 0xd73f, 0xe9f, 0xd749, 0xe97, 0xd753, 0xe8f, 0xd75c,
-  0xe87, 0xd766, 0xe7f, 0xd770, 0xe77, 0xd77a, 0xe6f, 0xd783,
-  0xe67, 0xd78d, 0xe5f, 0xd797, 0xe57, 0xd7a0, 0xe4f, 0xd7aa,
-  0xe47, 0xd7b4, 0xe40, 0xd7be, 0xe38, 0xd7c8, 0xe30, 0xd7d1,
-  0xe28, 0xd7db, 0xe20, 0xd7e5, 0xe18, 0xd7ef, 0xe10, 0xd7f8,
-  0xe08, 0xd802, 0xe01, 0xd80c, 0xdf9, 0xd816, 0xdf1, 0xd820,
-  0xde9, 0xd82a, 0xde1, 0xd833, 0xdd9, 0xd83d, 0xdd2, 0xd847,
-  0xdca, 0xd851, 0xdc2, 0xd85b, 0xdba, 0xd865, 0xdb2, 0xd86f,
-  0xdab, 0xd878, 0xda3, 0xd882, 0xd9b, 0xd88c, 0xd93, 0xd896,
-  0xd8c, 0xd8a0, 0xd84, 0xd8aa, 0xd7c, 0xd8b4, 0xd75, 0xd8be,
-  0xd6d, 0xd8c8, 0xd65, 0xd8d2, 0xd5d, 0xd8dc, 0xd56, 0xd8e6,
-  0xd4e, 0xd8ef, 0xd46, 0xd8f9, 0xd3f, 0xd903, 0xd37, 0xd90d,
-  0xd30, 0xd917, 0xd28, 0xd921, 0xd20, 0xd92b, 0xd19, 0xd935,
-  0xd11, 0xd93f, 0xd09, 0xd949, 0xd02, 0xd953, 0xcfa, 0xd95d,
-  0xcf3, 0xd967, 0xceb, 0xd971, 0xce3, 0xd97b, 0xcdc, 0xd985,
-  0xcd4, 0xd98f, 0xccd, 0xd99a, 0xcc5, 0xd9a4, 0xcbe, 0xd9ae,
-  0xcb6, 0xd9b8, 0xcaf, 0xd9c2, 0xca7, 0xd9cc, 0xca0, 0xd9d6,
-  0xc98, 0xd9e0, 0xc91, 0xd9ea, 0xc89, 0xd9f4, 0xc82, 0xd9fe,
-  0xc7a, 0xda08, 0xc73, 0xda13, 0xc6b, 0xda1d, 0xc64, 0xda27,
-  0xc5d, 0xda31, 0xc55, 0xda3b, 0xc4e, 0xda45, 0xc46, 0xda4f,
-  0xc3f, 0xda5a, 0xc38, 0xda64, 0xc30, 0xda6e, 0xc29, 0xda78,
-  0xc21, 0xda82, 0xc1a, 0xda8c, 0xc13, 0xda97, 0xc0b, 0xdaa1,
-  0xc04, 0xdaab, 0xbfd, 0xdab5, 0xbf5, 0xdabf, 0xbee, 0xdaca,
-  0xbe7, 0xdad4, 0xbe0, 0xdade, 0xbd8, 0xdae8, 0xbd1, 0xdaf3,
-  0xbca, 0xdafd, 0xbc2, 0xdb07, 0xbbb, 0xdb11, 0xbb4, 0xdb1c,
-  0xbad, 0xdb26, 0xba5, 0xdb30, 0xb9e, 0xdb3b, 0xb97, 0xdb45,
-  0xb90, 0xdb4f, 0xb89, 0xdb59, 0xb81, 0xdb64, 0xb7a, 0xdb6e,
-  0xb73, 0xdb78, 0xb6c, 0xdb83, 0xb65, 0xdb8d, 0xb5e, 0xdb97,
-  0xb56, 0xdba2, 0xb4f, 0xdbac, 0xb48, 0xdbb6, 0xb41, 0xdbc1,
-  0xb3a, 0xdbcb, 0xb33, 0xdbd5, 0xb2c, 0xdbe0, 0xb25, 0xdbea,
-  0xb1e, 0xdbf5, 0xb16, 0xdbff, 0xb0f, 0xdc09, 0xb08, 0xdc14,
-  0xb01, 0xdc1e, 0xafa, 0xdc29, 0xaf3, 0xdc33, 0xaec, 0xdc3d,
-  0xae5, 0xdc48, 0xade, 0xdc52, 0xad7, 0xdc5d, 0xad0, 0xdc67,
-  0xac9, 0xdc72, 0xac2, 0xdc7c, 0xabb, 0xdc86, 0xab4, 0xdc91,
-  0xaad, 0xdc9b, 0xaa6, 0xdca6, 0xa9f, 0xdcb0, 0xa99, 0xdcbb,
-  0xa92, 0xdcc5, 0xa8b, 0xdcd0, 0xa84, 0xdcda, 0xa7d, 0xdce5,
-  0xa76, 0xdcef, 0xa6f, 0xdcfa, 0xa68, 0xdd04, 0xa61, 0xdd0f,
-  0xa5b, 0xdd19, 0xa54, 0xdd24, 0xa4d, 0xdd2e, 0xa46, 0xdd39,
-  0xa3f, 0xdd44, 0xa38, 0xdd4e, 0xa32, 0xdd59, 0xa2b, 0xdd63,
-  0xa24, 0xdd6e, 0xa1d, 0xdd78, 0xa16, 0xdd83, 0xa10, 0xdd8e,
-  0xa09, 0xdd98, 0xa02, 0xdda3, 0x9fb, 0xddad, 0x9f5, 0xddb8,
-  0x9ee, 0xddc3, 0x9e7, 0xddcd, 0x9e0, 0xddd8, 0x9da, 0xdde2,
-  0x9d3, 0xdded, 0x9cc, 0xddf8, 0x9c6, 0xde02, 0x9bf, 0xde0d,
-  0x9b8, 0xde18, 0x9b2, 0xde22, 0x9ab, 0xde2d, 0x9a4, 0xde38,
-  0x99e, 0xde42, 0x997, 0xde4d, 0x991, 0xde58, 0x98a, 0xde62,
-  0x983, 0xde6d, 0x97d, 0xde78, 0x976, 0xde83, 0x970, 0xde8d,
-  0x969, 0xde98, 0x963, 0xdea3, 0x95c, 0xdead, 0x955, 0xdeb8,
-  0x94f, 0xdec3, 0x948, 0xdece, 0x942, 0xded8, 0x93b, 0xdee3,
-  0x935, 0xdeee, 0x92e, 0xdef9, 0x928, 0xdf03, 0x921, 0xdf0e,
-  0x91b, 0xdf19, 0x915, 0xdf24, 0x90e, 0xdf2f, 0x908, 0xdf39,
-  0x901, 0xdf44, 0x8fb, 0xdf4f, 0x8f4, 0xdf5a, 0x8ee, 0xdf65,
-  0x8e8, 0xdf6f, 0x8e1, 0xdf7a, 0x8db, 0xdf85, 0x8d4, 0xdf90,
-  0x8ce, 0xdf9b, 0x8c8, 0xdfa5, 0x8c1, 0xdfb0, 0x8bb, 0xdfbb,
-  0x8b5, 0xdfc6, 0x8ae, 0xdfd1, 0x8a8, 0xdfdc, 0x8a2, 0xdfe7,
-  0x89b, 0xdff1, 0x895, 0xdffc, 0x88f, 0xe007, 0x889, 0xe012,
-  0x882, 0xe01d, 0x87c, 0xe028, 0x876, 0xe033, 0x870, 0xe03e,
-  0x869, 0xe049, 0x863, 0xe054, 0x85d, 0xe05e, 0x857, 0xe069,
-  0x850, 0xe074, 0x84a, 0xe07f, 0x844, 0xe08a, 0x83e, 0xe095,
-  0x838, 0xe0a0, 0x832, 0xe0ab, 0x82b, 0xe0b6, 0x825, 0xe0c1,
-  0x81f, 0xe0cc, 0x819, 0xe0d7, 0x813, 0xe0e2, 0x80d, 0xe0ed,
-  0x807, 0xe0f8, 0x801, 0xe103, 0x7fb, 0xe10e, 0x7f5, 0xe119,
-  0x7ee, 0xe124, 0x7e8, 0xe12f, 0x7e2, 0xe13a, 0x7dc, 0xe145,
-  0x7d6, 0xe150, 0x7d0, 0xe15b, 0x7ca, 0xe166, 0x7c4, 0xe171,
-  0x7be, 0xe17c, 0x7b8, 0xe187, 0x7b2, 0xe192, 0x7ac, 0xe19d,
-  0x7a6, 0xe1a8, 0x7a0, 0xe1b3, 0x79a, 0xe1be, 0x795, 0xe1ca,
-  0x78f, 0xe1d5, 0x789, 0xe1e0, 0x783, 0xe1eb, 0x77d, 0xe1f6,
-  0x777, 0xe201, 0x771, 0xe20c, 0x76b, 0xe217, 0x765, 0xe222,
-  0x75f, 0xe22d, 0x75a, 0xe239, 0x754, 0xe244, 0x74e, 0xe24f,
-  0x748, 0xe25a, 0x742, 0xe265, 0x73d, 0xe270, 0x737, 0xe27b,
-  0x731, 0xe287, 0x72b, 0xe292, 0x725, 0xe29d, 0x720, 0xe2a8,
-  0x71a, 0xe2b3, 0x714, 0xe2be, 0x70e, 0xe2ca, 0x709, 0xe2d5,
-  0x703, 0xe2e0, 0x6fd, 0xe2eb, 0x6f7, 0xe2f6, 0x6f2, 0xe301,
-  0x6ec, 0xe30d, 0x6e6, 0xe318, 0x6e1, 0xe323, 0x6db, 0xe32e,
-  0x6d5, 0xe33a, 0x6d0, 0xe345, 0x6ca, 0xe350, 0x6c5, 0xe35b,
-  0x6bf, 0xe367, 0x6b9, 0xe372, 0x6b4, 0xe37d, 0x6ae, 0xe388,
-  0x6a8, 0xe394, 0x6a3, 0xe39f, 0x69d, 0xe3aa, 0x698, 0xe3b5,
-  0x692, 0xe3c1, 0x68d, 0xe3cc, 0x687, 0xe3d7, 0x682, 0xe3e2,
-  0x67c, 0xe3ee, 0x677, 0xe3f9, 0x671, 0xe404, 0x66c, 0xe410,
-  0x666, 0xe41b, 0x661, 0xe426, 0x65b, 0xe432, 0x656, 0xe43d,
-  0x650, 0xe448, 0x64b, 0xe454, 0x645, 0xe45f, 0x640, 0xe46a,
-  0x63b, 0xe476, 0x635, 0xe481, 0x630, 0xe48c, 0x62a, 0xe498,
-  0x625, 0xe4a3, 0x620, 0xe4ae, 0x61a, 0xe4ba, 0x615, 0xe4c5,
-  0x610, 0xe4d0, 0x60a, 0xe4dc, 0x605, 0xe4e7, 0x600, 0xe4f3,
-  0x5fa, 0xe4fe, 0x5f5, 0xe509, 0x5f0, 0xe515, 0x5ea, 0xe520,
-  0x5e5, 0xe52c, 0x5e0, 0xe537, 0x5db, 0xe542, 0x5d5, 0xe54e,
-  0x5d0, 0xe559, 0x5cb, 0xe565, 0x5c6, 0xe570, 0x5c1, 0xe57c,
-  0x5bb, 0xe587, 0x5b6, 0xe592, 0x5b1, 0xe59e, 0x5ac, 0xe5a9,
-  0x5a7, 0xe5b5, 0x5a1, 0xe5c0, 0x59c, 0xe5cc, 0x597, 0xe5d7,
-  0x592, 0xe5e3, 0x58d, 0xe5ee, 0x588, 0xe5fa, 0x583, 0xe605,
-  0x57e, 0xe611, 0x578, 0xe61c, 0x573, 0xe628, 0x56e, 0xe633,
-  0x569, 0xe63f, 0x564, 0xe64a, 0x55f, 0xe656, 0x55a, 0xe661,
-  0x555, 0xe66d, 0x550, 0xe678, 0x54b, 0xe684, 0x546, 0xe68f,
-  0x541, 0xe69b, 0x53c, 0xe6a6, 0x537, 0xe6b2, 0x532, 0xe6bd,
-  0x52d, 0xe6c9, 0x528, 0xe6d4, 0x523, 0xe6e0, 0x51e, 0xe6ec,
-  0x51a, 0xe6f7, 0x515, 0xe703, 0x510, 0xe70e, 0x50b, 0xe71a,
-  0x506, 0xe725, 0x501, 0xe731, 0x4fc, 0xe73d, 0x4f7, 0xe748,
-  0x4f2, 0xe754, 0x4ee, 0xe75f, 0x4e9, 0xe76b, 0x4e4, 0xe777,
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-  0x2cdc, 0x3d12, 0x2ce8, 0x3d16, 0x2cf4, 0x3d1a, 0x2d00, 0x3d1d,
-  0x2d0c, 0x3d21, 0x2d18, 0x3d25, 0x2d24, 0x3d28, 0x2d30, 0x3d2c,
-  0x2d3c, 0x3d30, 0x2d48, 0x3d34, 0x2d54, 0x3d37, 0x2d60, 0x3d3b,
-  0x2d6c, 0x3d3f, 0x2d78, 0x3d42, 0x2d84, 0x3d46, 0x2d90, 0x3d49,
-  0x2d9c, 0x3d4d, 0x2da8, 0x3d51, 0x2db4, 0x3d54, 0x2dc0, 0x3d58,
-  0x2dcc, 0x3d5b, 0x2dd8, 0x3d5f, 0x2de4, 0x3d63, 0x2df0, 0x3d66,
-  0x2dfc, 0x3d6a, 0x2e09, 0x3d6d, 0x2e15, 0x3d71, 0x2e21, 0x3d74,
-  0x2e2d, 0x3d78, 0x2e39, 0x3d7b, 0x2e45, 0x3d7f, 0x2e51, 0x3d82,
-  0x2e5d, 0x3d86, 0x2e69, 0x3d89, 0x2e75, 0x3d8d, 0x2e81, 0x3d90,
-  0x2e8d, 0x3d93, 0x2e99, 0x3d97, 0x2ea6, 0x3d9a, 0x2eb2, 0x3d9e,
-  0x2ebe, 0x3da1, 0x2eca, 0x3da4, 0x2ed6, 0x3da8, 0x2ee2, 0x3dab,
-  0x2eee, 0x3daf, 0x2efa, 0x3db2, 0x2f06, 0x3db5, 0x2f13, 0x3db9,
-  0x2f1f, 0x3dbc, 0x2f2b, 0x3dbf, 0x2f37, 0x3dc2, 0x2f43, 0x3dc6,
-  0x2f4f, 0x3dc9, 0x2f5b, 0x3dcc, 0x2f67, 0x3dd0, 0x2f74, 0x3dd3,
-  0x2f80, 0x3dd6, 0x2f8c, 0x3dd9, 0x2f98, 0x3ddd, 0x2fa4, 0x3de0,
-  0x2fb0, 0x3de3, 0x2fbc, 0x3de6, 0x2fc9, 0x3de9, 0x2fd5, 0x3ded,
-  0x2fe1, 0x3df0, 0x2fed, 0x3df3, 0x2ff9, 0x3df6, 0x3005, 0x3df9,
-  0x3012, 0x3dfc, 0x301e, 0x3dff, 0x302a, 0x3e03, 0x3036, 0x3e06,
-  0x3042, 0x3e09, 0x304e, 0x3e0c, 0x305b, 0x3e0f, 0x3067, 0x3e12,
-  0x3073, 0x3e15, 0x307f, 0x3e18, 0x308b, 0x3e1b, 0x3098, 0x3e1e,
-  0x30a4, 0x3e21, 0x30b0, 0x3e24, 0x30bc, 0x3e27, 0x30c8, 0x3e2a,
-  0x30d5, 0x3e2d, 0x30e1, 0x3e30, 0x30ed, 0x3e33, 0x30f9, 0x3e36,
-  0x3105, 0x3e39, 0x3112, 0x3e3c, 0x311e, 0x3e3f, 0x312a, 0x3e42,
-  0x3136, 0x3e45, 0x3143, 0x3e48, 0x314f, 0x3e4a, 0x315b, 0x3e4d,
-  0x3167, 0x3e50, 0x3174, 0x3e53, 0x3180, 0x3e56, 0x318c, 0x3e59,
-  0x3198, 0x3e5c, 0x31a4, 0x3e5e, 0x31b1, 0x3e61, 0x31bd, 0x3e64,
-  0x31c9, 0x3e67, 0x31d5, 0x3e6a, 0x31e2, 0x3e6c, 0x31ee, 0x3e6f,
-  0x31fa, 0x3e72, 0x3207, 0x3e75, 0x3213, 0x3e77, 0x321f, 0x3e7a,
-  0x322b, 0x3e7d, 0x3238, 0x3e80, 0x3244, 0x3e82, 0x3250, 0x3e85,
-  0x325c, 0x3e88, 0x3269, 0x3e8a, 0x3275, 0x3e8d, 0x3281, 0x3e90,
-  0x328e, 0x3e92, 0x329a, 0x3e95, 0x32a6, 0x3e98, 0x32b2, 0x3e9a,
-  0x32bf, 0x3e9d, 0x32cb, 0x3e9f, 0x32d7, 0x3ea2, 0x32e4, 0x3ea5,
-  0x32f0, 0x3ea7, 0x32fc, 0x3eaa, 0x3308, 0x3eac, 0x3315, 0x3eaf,
-  0x3321, 0x3eb1, 0x332d, 0x3eb4, 0x333a, 0x3eb6, 0x3346, 0x3eb9,
-  0x3352, 0x3ebb, 0x335f, 0x3ebe, 0x336b, 0x3ec0, 0x3377, 0x3ec3,
-  0x3384, 0x3ec5, 0x3390, 0x3ec8, 0x339c, 0x3eca, 0x33a9, 0x3ecc,
-  0x33b5, 0x3ecf, 0x33c1, 0x3ed1, 0x33ce, 0x3ed4, 0x33da, 0x3ed6,
-  0x33e6, 0x3ed8, 0x33f3, 0x3edb, 0x33ff, 0x3edd, 0x340b, 0x3ee0,
-  0x3418, 0x3ee2, 0x3424, 0x3ee4, 0x3430, 0x3ee7, 0x343d, 0x3ee9,
-  0x3449, 0x3eeb, 0x3455, 0x3eed, 0x3462, 0x3ef0, 0x346e, 0x3ef2,
-  0x347b, 0x3ef4, 0x3487, 0x3ef7, 0x3493, 0x3ef9, 0x34a0, 0x3efb,
-  0x34ac, 0x3efd, 0x34b8, 0x3f00, 0x34c5, 0x3f02, 0x34d1, 0x3f04,
-  0x34dd, 0x3f06, 0x34ea, 0x3f08, 0x34f6, 0x3f0a, 0x3503, 0x3f0d,
-  0x350f, 0x3f0f, 0x351b, 0x3f11, 0x3528, 0x3f13, 0x3534, 0x3f15,
-  0x3540, 0x3f17, 0x354d, 0x3f19, 0x3559, 0x3f1c, 0x3566, 0x3f1e,
-  0x3572, 0x3f20, 0x357e, 0x3f22, 0x358b, 0x3f24, 0x3597, 0x3f26,
-  0x35a4, 0x3f28, 0x35b0, 0x3f2a, 0x35bc, 0x3f2c, 0x35c9, 0x3f2e,
-  0x35d5, 0x3f30, 0x35e2, 0x3f32, 0x35ee, 0x3f34, 0x35fa, 0x3f36,
-  0x3607, 0x3f38, 0x3613, 0x3f3a, 0x3620, 0x3f3c, 0x362c, 0x3f3e,
-  0x3639, 0x3f40, 0x3645, 0x3f42, 0x3651, 0x3f43, 0x365e, 0x3f45,
-  0x366a, 0x3f47, 0x3677, 0x3f49, 0x3683, 0x3f4b, 0x3690, 0x3f4d,
-  0x369c, 0x3f4f, 0x36a8, 0x3f51, 0x36b5, 0x3f52, 0x36c1, 0x3f54,
-  0x36ce, 0x3f56, 0x36da, 0x3f58, 0x36e7, 0x3f5a, 0x36f3, 0x3f5b,
-  0x36ff, 0x3f5d, 0x370c, 0x3f5f, 0x3718, 0x3f61, 0x3725, 0x3f62,
-  0x3731, 0x3f64, 0x373e, 0x3f66, 0x374a, 0x3f68, 0x3757, 0x3f69,
-  0x3763, 0x3f6b, 0x376f, 0x3f6d, 0x377c, 0x3f6e, 0x3788, 0x3f70,
-  0x3795, 0x3f72, 0x37a1, 0x3f73, 0x37ae, 0x3f75, 0x37ba, 0x3f77,
-  0x37c7, 0x3f78, 0x37d3, 0x3f7a, 0x37e0, 0x3f7b, 0x37ec, 0x3f7d,
-  0x37f9, 0x3f7f, 0x3805, 0x3f80, 0x3811, 0x3f82, 0x381e, 0x3f83,
-  0x382a, 0x3f85, 0x3837, 0x3f86, 0x3843, 0x3f88, 0x3850, 0x3f89,
-  0x385c, 0x3f8b, 0x3869, 0x3f8c, 0x3875, 0x3f8e, 0x3882, 0x3f8f,
-  0x388e, 0x3f91, 0x389b, 0x3f92, 0x38a7, 0x3f94, 0x38b4, 0x3f95,
-  0x38c0, 0x3f97, 0x38cd, 0x3f98, 0x38d9, 0x3f99, 0x38e6, 0x3f9b,
-  0x38f2, 0x3f9c, 0x38ff, 0x3f9e, 0x390b, 0x3f9f, 0x3918, 0x3fa0,
-  0x3924, 0x3fa2, 0x3931, 0x3fa3, 0x393d, 0x3fa4, 0x394a, 0x3fa6,
-  0x3956, 0x3fa7, 0x3963, 0x3fa8, 0x396f, 0x3faa, 0x397c, 0x3fab,
-  0x3988, 0x3fac, 0x3995, 0x3fad, 0x39a1, 0x3faf, 0x39ae, 0x3fb0,
-  0x39ba, 0x3fb1, 0x39c7, 0x3fb2, 0x39d3, 0x3fb4, 0x39e0, 0x3fb5,
-  0x39ec, 0x3fb6, 0x39f9, 0x3fb7, 0x3a05, 0x3fb8, 0x3a12, 0x3fb9,
-  0x3a1e, 0x3fbb, 0x3a2b, 0x3fbc, 0x3a37, 0x3fbd, 0x3a44, 0x3fbe,
-  0x3a50, 0x3fbf, 0x3a5d, 0x3fc0, 0x3a69, 0x3fc1, 0x3a76, 0x3fc3,
-  0x3a82, 0x3fc4, 0x3a8f, 0x3fc5, 0x3a9b, 0x3fc6, 0x3aa8, 0x3fc7,
-  0x3ab4, 0x3fc8, 0x3ac1, 0x3fc9, 0x3acd, 0x3fca, 0x3ada, 0x3fcb,
-  0x3ae6, 0x3fcc, 0x3af3, 0x3fcd, 0x3b00, 0x3fce, 0x3b0c, 0x3fcf,
-  0x3b19, 0x3fd0, 0x3b25, 0x3fd1, 0x3b32, 0x3fd2, 0x3b3e, 0x3fd3,
-  0x3b4b, 0x3fd4, 0x3b57, 0x3fd5, 0x3b64, 0x3fd5, 0x3b70, 0x3fd6,
-  0x3b7d, 0x3fd7, 0x3b89, 0x3fd8, 0x3b96, 0x3fd9, 0x3ba2, 0x3fda,
-  0x3baf, 0x3fdb, 0x3bbc, 0x3fdc, 0x3bc8, 0x3fdc, 0x3bd5, 0x3fdd,
-  0x3be1, 0x3fde, 0x3bee, 0x3fdf, 0x3bfa, 0x3fe0, 0x3c07, 0x3fe0,
-  0x3c13, 0x3fe1, 0x3c20, 0x3fe2, 0x3c2c, 0x3fe3, 0x3c39, 0x3fe3,
-  0x3c45, 0x3fe4, 0x3c52, 0x3fe5, 0x3c5f, 0x3fe6, 0x3c6b, 0x3fe6,
-  0x3c78, 0x3fe7, 0x3c84, 0x3fe8, 0x3c91, 0x3fe8, 0x3c9d, 0x3fe9,
-  0x3caa, 0x3fea, 0x3cb6, 0x3fea, 0x3cc3, 0x3feb, 0x3cd0, 0x3fec,
-  0x3cdc, 0x3fec, 0x3ce9, 0x3fed, 0x3cf5, 0x3fed, 0x3d02, 0x3fee,
-  0x3d0e, 0x3fef, 0x3d1b, 0x3fef, 0x3d27, 0x3ff0, 0x3d34, 0x3ff0,
-  0x3d40, 0x3ff1, 0x3d4d, 0x3ff1, 0x3d5a, 0x3ff2, 0x3d66, 0x3ff2,
-  0x3d73, 0x3ff3, 0x3d7f, 0x3ff3, 0x3d8c, 0x3ff4, 0x3d98, 0x3ff4,
-  0x3da5, 0x3ff5, 0x3db2, 0x3ff5, 0x3dbe, 0x3ff6, 0x3dcb, 0x3ff6,
-  0x3dd7, 0x3ff7, 0x3de4, 0x3ff7, 0x3df0, 0x3ff7, 0x3dfd, 0x3ff8,
-  0x3e09, 0x3ff8, 0x3e16, 0x3ff9, 0x3e23, 0x3ff9, 0x3e2f, 0x3ff9,
-  0x3e3c, 0x3ffa, 0x3e48, 0x3ffa, 0x3e55, 0x3ffa, 0x3e61, 0x3ffb,
-  0x3e6e, 0x3ffb, 0x3e7a, 0x3ffb, 0x3e87, 0x3ffc, 0x3e94, 0x3ffc,
-  0x3ea0, 0x3ffc, 0x3ead, 0x3ffc, 0x3eb9, 0x3ffd, 0x3ec6, 0x3ffd,
-  0x3ed2, 0x3ffd, 0x3edf, 0x3ffd, 0x3eec, 0x3ffe, 0x3ef8, 0x3ffe,
-  0x3f05, 0x3ffe, 0x3f11, 0x3ffe, 0x3f1e, 0x3ffe, 0x3f2a, 0x3fff,
-  0x3f37, 0x3fff, 0x3f44, 0x3fff, 0x3f50, 0x3fff, 0x3f5d, 0x3fff,
-  0x3f69, 0x3fff, 0x3f76, 0x3fff, 0x3f82, 0x4000, 0x3f8f, 0x4000,
-  0x3f9b, 0x4000, 0x3fa8, 0x4000, 0x3fb5, 0x4000, 0x3fc1, 0x4000,
-  0x3fce, 0x4000, 0x3fda, 0x4000, 0x3fe7, 0x4000, 0x3ff3, 0x4000,
-};
-
-/**    
-* \par   
-* Generation of real_CoefB array:    
-* \par    
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-*  {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
   
-* \par    
-* Convert to fixed point Q15 format    
-*       round(pBTable[i] * pow(2, 15))    
-*    
-*/
-
-static const q15_t ALIGN4 realCoefBQ15[8192] = {
-  0x4000, 0x4000, 0x400d, 0x4000, 0x4019, 0x4000, 0x4026, 0x4000,
-  0x4032, 0x4000, 0x403f, 0x4000, 0x404b, 0x4000, 0x4058, 0x4000,
-  0x4065, 0x4000, 0x4071, 0x4000, 0x407e, 0x4000, 0x408a, 0x3fff,
-  0x4097, 0x3fff, 0x40a3, 0x3fff, 0x40b0, 0x3fff, 0x40bc, 0x3fff,
-  0x40c9, 0x3fff, 0x40d6, 0x3fff, 0x40e2, 0x3ffe, 0x40ef, 0x3ffe,
-  0x40fb, 0x3ffe, 0x4108, 0x3ffe, 0x4114, 0x3ffe, 0x4121, 0x3ffd,
-  0x412e, 0x3ffd, 0x413a, 0x3ffd, 0x4147, 0x3ffd, 0x4153, 0x3ffc,
-  0x4160, 0x3ffc, 0x416c, 0x3ffc, 0x4179, 0x3ffc, 0x4186, 0x3ffb,
-  0x4192, 0x3ffb, 0x419f, 0x3ffb, 0x41ab, 0x3ffa, 0x41b8, 0x3ffa,
-  0x41c4, 0x3ffa, 0x41d1, 0x3ff9, 0x41dd, 0x3ff9, 0x41ea, 0x3ff9,
-  0x41f7, 0x3ff8, 0x4203, 0x3ff8, 0x4210, 0x3ff7, 0x421c, 0x3ff7,
-  0x4229, 0x3ff7, 0x4235, 0x3ff6, 0x4242, 0x3ff6, 0x424e, 0x3ff5,
-  0x425b, 0x3ff5, 0x4268, 0x3ff4, 0x4274, 0x3ff4, 0x4281, 0x3ff3,
-  0x428d, 0x3ff3, 0x429a, 0x3ff2, 0x42a6, 0x3ff2, 0x42b3, 0x3ff1,
-  0x42c0, 0x3ff1, 0x42cc, 0x3ff0, 0x42d9, 0x3ff0, 0x42e5, 0x3fef,
-  0x42f2, 0x3fef, 0x42fe, 0x3fee, 0x430b, 0x3fed, 0x4317, 0x3fed,
-  0x4324, 0x3fec, 0x4330, 0x3fec, 0x433d, 0x3feb, 0x434a, 0x3fea,
-  0x4356, 0x3fea, 0x4363, 0x3fe9, 0x436f, 0x3fe8, 0x437c, 0x3fe8,
-  0x4388, 0x3fe7, 0x4395, 0x3fe6, 0x43a1, 0x3fe6, 0x43ae, 0x3fe5,
-  0x43bb, 0x3fe4, 0x43c7, 0x3fe3, 0x43d4, 0x3fe3, 0x43e0, 0x3fe2,
-  0x43ed, 0x3fe1, 0x43f9, 0x3fe0, 0x4406, 0x3fe0, 0x4412, 0x3fdf,
-  0x441f, 0x3fde, 0x442b, 0x3fdd, 0x4438, 0x3fdc, 0x4444, 0x3fdc,
-  0x4451, 0x3fdb, 0x445e, 0x3fda, 0x446a, 0x3fd9, 0x4477, 0x3fd8,
-  0x4483, 0x3fd7, 0x4490, 0x3fd6, 0x449c, 0x3fd5, 0x44a9, 0x3fd5,
-  0x44b5, 0x3fd4, 0x44c2, 0x3fd3, 0x44ce, 0x3fd2, 0x44db, 0x3fd1,
-  0x44e7, 0x3fd0, 0x44f4, 0x3fcf, 0x4500, 0x3fce, 0x450d, 0x3fcd,
-  0x451a, 0x3fcc, 0x4526, 0x3fcb, 0x4533, 0x3fca, 0x453f, 0x3fc9,
-  0x454c, 0x3fc8, 0x4558, 0x3fc7, 0x4565, 0x3fc6, 0x4571, 0x3fc5,
-  0x457e, 0x3fc4, 0x458a, 0x3fc3, 0x4597, 0x3fc1, 0x45a3, 0x3fc0,
-  0x45b0, 0x3fbf, 0x45bc, 0x3fbe, 0x45c9, 0x3fbd, 0x45d5, 0x3fbc,
-  0x45e2, 0x3fbb, 0x45ee, 0x3fb9, 0x45fb, 0x3fb8, 0x4607, 0x3fb7,
-  0x4614, 0x3fb6, 0x4620, 0x3fb5, 0x462d, 0x3fb4, 0x4639, 0x3fb2,
-  0x4646, 0x3fb1, 0x4652, 0x3fb0, 0x465f, 0x3faf, 0x466b, 0x3fad,
-  0x4678, 0x3fac, 0x4684, 0x3fab, 0x4691, 0x3faa, 0x469d, 0x3fa8,
-  0x46aa, 0x3fa7, 0x46b6, 0x3fa6, 0x46c3, 0x3fa4, 0x46cf, 0x3fa3,
-  0x46dc, 0x3fa2, 0x46e8, 0x3fa0, 0x46f5, 0x3f9f, 0x4701, 0x3f9e,
-  0x470e, 0x3f9c, 0x471a, 0x3f9b, 0x4727, 0x3f99, 0x4733, 0x3f98,
-  0x4740, 0x3f97, 0x474c, 0x3f95, 0x4759, 0x3f94, 0x4765, 0x3f92,
-  0x4772, 0x3f91, 0x477e, 0x3f8f, 0x478b, 0x3f8e, 0x4797, 0x3f8c,
-  0x47a4, 0x3f8b, 0x47b0, 0x3f89, 0x47bd, 0x3f88, 0x47c9, 0x3f86,
-  0x47d6, 0x3f85, 0x47e2, 0x3f83, 0x47ef, 0x3f82, 0x47fb, 0x3f80,
-  0x4807, 0x3f7f, 0x4814, 0x3f7d, 0x4820, 0x3f7b, 0x482d, 0x3f7a,
-  0x4839, 0x3f78, 0x4846, 0x3f77, 0x4852, 0x3f75, 0x485f, 0x3f73,
-  0x486b, 0x3f72, 0x4878, 0x3f70, 0x4884, 0x3f6e, 0x4891, 0x3f6d,
-  0x489d, 0x3f6b, 0x48a9, 0x3f69, 0x48b6, 0x3f68, 0x48c2, 0x3f66,
-  0x48cf, 0x3f64, 0x48db, 0x3f62, 0x48e8, 0x3f61, 0x48f4, 0x3f5f,
-  0x4901, 0x3f5d, 0x490d, 0x3f5b, 0x4919, 0x3f5a, 0x4926, 0x3f58,
-  0x4932, 0x3f56, 0x493f, 0x3f54, 0x494b, 0x3f52, 0x4958, 0x3f51,
-  0x4964, 0x3f4f, 0x4970, 0x3f4d, 0x497d, 0x3f4b, 0x4989, 0x3f49,
-  0x4996, 0x3f47, 0x49a2, 0x3f45, 0x49af, 0x3f43, 0x49bb, 0x3f42,
-  0x49c7, 0x3f40, 0x49d4, 0x3f3e, 0x49e0, 0x3f3c, 0x49ed, 0x3f3a,
-  0x49f9, 0x3f38, 0x4a06, 0x3f36, 0x4a12, 0x3f34, 0x4a1e, 0x3f32,
-  0x4a2b, 0x3f30, 0x4a37, 0x3f2e, 0x4a44, 0x3f2c, 0x4a50, 0x3f2a,
-  0x4a5c, 0x3f28, 0x4a69, 0x3f26, 0x4a75, 0x3f24, 0x4a82, 0x3f22,
-  0x4a8e, 0x3f20, 0x4a9a, 0x3f1e, 0x4aa7, 0x3f1c, 0x4ab3, 0x3f19,
-  0x4ac0, 0x3f17, 0x4acc, 0x3f15, 0x4ad8, 0x3f13, 0x4ae5, 0x3f11,
-  0x4af1, 0x3f0f, 0x4afd, 0x3f0d, 0x4b0a, 0x3f0a, 0x4b16, 0x3f08,
-  0x4b23, 0x3f06, 0x4b2f, 0x3f04, 0x4b3b, 0x3f02, 0x4b48, 0x3f00,
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-  0x72d0, 0xd917, 0x72c9, 0xd90d, 0x72c1, 0xd903, 0x72ba, 0xd8f9,
-  0x72b2, 0xd8ef, 0x72aa, 0xd8e6, 0x72a3, 0xd8dc, 0x729b, 0xd8d2,
-  0x7293, 0xd8c8, 0x728b, 0xd8be, 0x7284, 0xd8b4, 0x727c, 0xd8aa,
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-  0x7236, 0xd851, 0x722e, 0xd847, 0x7227, 0xd83d, 0x721f, 0xd833,
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-  0x71f8, 0xd802, 0x71f0, 0xd7f8, 0x71e8, 0xd7ef, 0x71e0, 0xd7e5,
-  0x71d8, 0xd7db, 0x71d0, 0xd7d1, 0x71c8, 0xd7c8, 0x71c0, 0xd7be,
-  0x71b9, 0xd7b4, 0x71b1, 0xd7aa, 0x71a9, 0xd7a0, 0x71a1, 0xd797,
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-  0x7159, 0xd73f, 0x7151, 0xd736, 0x7149, 0xd72c, 0x7141, 0xd722,
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-  0x7119, 0xd6f2, 0x7111, 0xd6e8, 0x7109, 0xd6df, 0x7101, 0xd6d5,
-  0x70f9, 0xd6cb, 0x70f0, 0xd6c2, 0x70e8, 0xd6b8, 0x70e0, 0xd6af,
-  0x70d8, 0xd6a5, 0x70d0, 0xd69b, 0x70c8, 0xd692, 0x70c0, 0xd688,
-  0x70b8, 0xd67f, 0x70af, 0xd675, 0x70a7, 0xd66c, 0x709f, 0xd662,
-  0x7097, 0xd659, 0x708f, 0xd64f, 0x7087, 0xd645, 0x707e, 0xd63c,
-  0x7076, 0xd632, 0x706e, 0xd629, 0x7066, 0xd61f, 0x705d, 0xd616,
-  0x7055, 0xd60c, 0x704d, 0xd603, 0x7045, 0xd5f9, 0x703c, 0xd5f0,
-  0x7034, 0xd5e6, 0x702c, 0xd5dd, 0x7024, 0xd5d4, 0x701b, 0xd5ca,
-  0x7013, 0xd5c1, 0x700b, 0xd5b7, 0x7002, 0xd5ae, 0x6ffa, 0xd5a4,
-  0x6ff2, 0xd59b, 0x6fea, 0xd592, 0x6fe1, 0xd588, 0x6fd9, 0xd57f,
-  0x6fd0, 0xd575, 0x6fc8, 0xd56c, 0x6fc0, 0xd563, 0x6fb7, 0xd559,
-  0x6faf, 0xd550, 0x6fa7, 0xd547, 0x6f9e, 0xd53d, 0x6f96, 0xd534,
-  0x6f8d, 0xd52a, 0x6f85, 0xd521, 0x6f7d, 0xd518, 0x6f74, 0xd50e,
-  0x6f6c, 0xd505, 0x6f63, 0xd4fc, 0x6f5b, 0xd4f3, 0x6f52, 0xd4e9,
-  0x6f4a, 0xd4e0, 0x6f41, 0xd4d7, 0x6f39, 0xd4cd, 0x6f30, 0xd4c4,
-  0x6f28, 0xd4bb, 0x6f20, 0xd4b2, 0x6f17, 0xd4a8, 0x6f0e, 0xd49f,
-  0x6f06, 0xd496, 0x6efd, 0xd48d, 0x6ef5, 0xd483, 0x6eec, 0xd47a,
-  0x6ee4, 0xd471, 0x6edb, 0xd468, 0x6ed3, 0xd45f, 0x6eca, 0xd455,
-  0x6ec2, 0xd44c, 0x6eb9, 0xd443, 0x6eb0, 0xd43a, 0x6ea8, 0xd431,
-  0x6e9f, 0xd428, 0x6e97, 0xd41e, 0x6e8e, 0xd415, 0x6e85, 0xd40c,
-  0x6e7d, 0xd403, 0x6e74, 0xd3fa, 0x6e6b, 0xd3f1, 0x6e63, 0xd3e8,
-  0x6e5a, 0xd3df, 0x6e51, 0xd3d5, 0x6e49, 0xd3cc, 0x6e40, 0xd3c3,
-  0x6e37, 0xd3ba, 0x6e2f, 0xd3b1, 0x6e26, 0xd3a8, 0x6e1d, 0xd39f,
-  0x6e15, 0xd396, 0x6e0c, 0xd38d, 0x6e03, 0xd384, 0x6dfa, 0xd37b,
-  0x6df2, 0xd372, 0x6de9, 0xd369, 0x6de0, 0xd360, 0x6dd7, 0xd357,
-  0x6dcf, 0xd34e, 0x6dc6, 0xd345, 0x6dbd, 0xd33c, 0x6db4, 0xd333,
-  0x6dab, 0xd32a, 0x6da3, 0xd321, 0x6d9a, 0xd318, 0x6d91, 0xd30f,
-  0x6d88, 0xd306, 0x6d7f, 0xd2fd, 0x6d76, 0xd2f4, 0x6d6e, 0xd2eb,
-  0x6d65, 0xd2e2, 0x6d5c, 0xd2d9, 0x6d53, 0xd2d1, 0x6d4a, 0xd2c8,
-  0x6d41, 0xd2bf, 0x6d38, 0xd2b6, 0x6d2f, 0xd2ad, 0x6d27, 0xd2a4,
-  0x6d1e, 0xd29b, 0x6d15, 0xd292, 0x6d0c, 0xd28a, 0x6d03, 0xd281,
-  0x6cfa, 0xd278, 0x6cf1, 0xd26f, 0x6ce8, 0xd266, 0x6cdf, 0xd25d,
-  0x6cd6, 0xd255, 0x6ccd, 0xd24c, 0x6cc4, 0xd243, 0x6cbb, 0xd23a,
-  0x6cb2, 0xd231, 0x6ca9, 0xd229, 0x6ca0, 0xd220, 0x6c97, 0xd217,
-  0x6c8e, 0xd20e, 0x6c85, 0xd206, 0x6c7c, 0xd1fd, 0x6c73, 0xd1f4,
-  0x6c6a, 0xd1eb, 0x6c61, 0xd1e3, 0x6c58, 0xd1da, 0x6c4f, 0xd1d1,
-  0x6c46, 0xd1c9, 0x6c3d, 0xd1c0, 0x6c34, 0xd1b7, 0x6c2b, 0xd1af,
-  0x6c21, 0xd1a6, 0x6c18, 0xd19d, 0x6c0f, 0xd195, 0x6c06, 0xd18c,
-  0x6bfd, 0xd183, 0x6bf4, 0xd17b, 0x6beb, 0xd172, 0x6be2, 0xd169,
-  0x6bd8, 0xd161, 0x6bcf, 0xd158, 0x6bc6, 0xd150, 0x6bbd, 0xd147,
-  0x6bb4, 0xd13e, 0x6bab, 0xd136, 0x6ba1, 0xd12d, 0x6b98, 0xd125,
-  0x6b8f, 0xd11c, 0x6b86, 0xd114, 0x6b7d, 0xd10b, 0x6b73, 0xd103,
-  0x6b6a, 0xd0fa, 0x6b61, 0xd0f2, 0x6b58, 0xd0e9, 0x6b4e, 0xd0e0,
-  0x6b45, 0xd0d8, 0x6b3c, 0xd0d0, 0x6b33, 0xd0c7, 0x6b29, 0xd0bf,
-  0x6b20, 0xd0b6, 0x6b17, 0xd0ae, 0x6b0d, 0xd0a5, 0x6b04, 0xd09d,
-  0x6afb, 0xd094, 0x6af2, 0xd08c, 0x6ae8, 0xd083, 0x6adf, 0xd07b,
-  0x6ad6, 0xd073, 0x6acc, 0xd06a, 0x6ac3, 0xd062, 0x6ab9, 0xd059,
-  0x6ab0, 0xd051, 0x6aa7, 0xd049, 0x6a9d, 0xd040, 0x6a94, 0xd038,
-  0x6a8b, 0xd030, 0x6a81, 0xd027, 0x6a78, 0xd01f, 0x6a6e, 0xd016,
-  0x6a65, 0xd00e, 0x6a5c, 0xd006, 0x6a52, 0xcffe, 0x6a49, 0xcff5,
-  0x6a3f, 0xcfed, 0x6a36, 0xcfe5, 0x6a2c, 0xcfdc, 0x6a23, 0xcfd4,
-  0x6a1a, 0xcfcc, 0x6a10, 0xcfc4, 0x6a07, 0xcfbb, 0x69fd, 0xcfb3,
-  0x69f4, 0xcfab, 0x69ea, 0xcfa3, 0x69e1, 0xcf9a, 0x69d7, 0xcf92,
-  0x69ce, 0xcf8a, 0x69c4, 0xcf82, 0x69bb, 0xcf79, 0x69b1, 0xcf71,
-  0x69a7, 0xcf69, 0x699e, 0xcf61, 0x6994, 0xcf59, 0x698b, 0xcf51,
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-  0x6935, 0xcf07, 0x692b, 0xceff, 0x6921, 0xcef7, 0x6918, 0xceef,
-  0x690e, 0xcee7, 0x6904, 0xcedf, 0x68fb, 0xced7, 0x68f1, 0xcecf,
-  0x68e7, 0xcec7, 0x68de, 0xcebf, 0x68d4, 0xceb7, 0x68ca, 0xceaf,
-  0x68c1, 0xcea7, 0x68b7, 0xce9f, 0x68ad, 0xce97, 0x68a4, 0xce8f,
-  0x689a, 0xce87, 0x6890, 0xce7f, 0x6886, 0xce77, 0x687d, 0xce6f,
-  0x6873, 0xce67, 0x6869, 0xce5f, 0x6860, 0xce57, 0x6856, 0xce4f,
-  0x684c, 0xce47, 0x6842, 0xce40, 0x6838, 0xce38, 0x682f, 0xce30,
-  0x6825, 0xce28, 0x681b, 0xce20, 0x6811, 0xce18, 0x6808, 0xce10,
-  0x67fe, 0xce08, 0x67f4, 0xce01, 0x67ea, 0xcdf9, 0x67e0, 0xcdf1,
-  0x67d6, 0xcde9, 0x67cd, 0xcde1, 0x67c3, 0xcdd9, 0x67b9, 0xcdd2,
-  0x67af, 0xcdca, 0x67a5, 0xcdc2, 0x679b, 0xcdba, 0x6791, 0xcdb2,
-  0x6788, 0xcdab, 0x677e, 0xcda3, 0x6774, 0xcd9b, 0x676a, 0xcd93,
-  0x6760, 0xcd8c, 0x6756, 0xcd84, 0x674c, 0xcd7c, 0x6742, 0xcd75,
-  0x6738, 0xcd6d, 0x672e, 0xcd65, 0x6724, 0xcd5d, 0x671a, 0xcd56,
-  0x6711, 0xcd4e, 0x6707, 0xcd46, 0x66fd, 0xcd3f, 0x66f3, 0xcd37,
-  0x66e9, 0xcd30, 0x66df, 0xcd28, 0x66d5, 0xcd20, 0x66cb, 0xcd19,
-  0x66c1, 0xcd11, 0x66b7, 0xcd09, 0x66ad, 0xcd02, 0x66a3, 0xccfa,
-  0x6699, 0xccf3, 0x668f, 0xcceb, 0x6685, 0xcce3, 0x667b, 0xccdc,
-  0x6671, 0xccd4, 0x6666, 0xcccd, 0x665c, 0xccc5, 0x6652, 0xccbe,
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-  0x6620, 0xcc98, 0x6616, 0xcc91, 0x660c, 0xcc89, 0x6602, 0xcc82,
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-  0x65cf, 0xcc5d, 0x65c5, 0xcc55, 0x65bb, 0xcc4e, 0x65b1, 0xcc46,
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-  0x6555, 0xcc04, 0x654b, 0xcbfd, 0x6541, 0xcbf5, 0x6536, 0xcbee,
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-  0x638e, 0xcac9, 0x6384, 0xcac2, 0x637a, 0xcabb, 0x636f, 0xcab4,
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-  0x6311, 0xca76, 0x6306, 0xca6f, 0x62fc, 0xca68, 0x62f1, 0xca61,
-  0x62e7, 0xca5b, 0x62dc, 0xca54, 0x62d2, 0xca4d, 0x62c7, 0xca46,
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-  0x623d, 0xc9ee, 0x6233, 0xc9e7, 0x6228, 0xc9e0, 0x621e, 0xc9da,
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-  0x61e8, 0xc9b8, 0x61de, 0xc9b2, 0x61d3, 0xc9ab, 0x61c8, 0xc9a4,
-  0x61be, 0xc99e, 0x61b3, 0xc997, 0x61a8, 0xc991, 0x619e, 0xc98a,
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-  0x60e7, 0xc91b, 0x60dc, 0xc915, 0x60d1, 0xc90e, 0x60c7, 0xc908,
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-  0x6091, 0xc8e8, 0x6086, 0xc8e1, 0x607b, 0xc8db, 0x6070, 0xc8d4,
-  0x6065, 0xc8ce, 0x605b, 0xc8c8, 0x6050, 0xc8c1, 0x6045, 0xc8bb,
-  0x603a, 0xc8b5, 0x602f, 0xc8ae, 0x6024, 0xc8a8, 0x6019, 0xc8a2,
-  0x600f, 0xc89b, 0x6004, 0xc895, 0x5ff9, 0xc88f, 0x5fee, 0xc889,
-  0x5fe3, 0xc882, 0x5fd8, 0xc87c, 0x5fcd, 0xc876, 0x5fc2, 0xc870,
-  0x5fb7, 0xc869, 0x5fac, 0xc863, 0x5fa2, 0xc85d, 0x5f97, 0xc857,
-  0x5f8c, 0xc850, 0x5f81, 0xc84a, 0x5f76, 0xc844, 0x5f6b, 0xc83e,
-  0x5f60, 0xc838, 0x5f55, 0xc832, 0x5f4a, 0xc82b, 0x5f3f, 0xc825,
-  0x5f34, 0xc81f, 0x5f29, 0xc819, 0x5f1e, 0xc813, 0x5f13, 0xc80d,
-  0x5f08, 0xc807, 0x5efd, 0xc801, 0x5ef2, 0xc7fb, 0x5ee7, 0xc7f5,
-  0x5edc, 0xc7ee, 0x5ed1, 0xc7e8, 0x5ec6, 0xc7e2, 0x5ebb, 0xc7dc,
-  0x5eb0, 0xc7d6, 0x5ea5, 0xc7d0, 0x5e9a, 0xc7ca, 0x5e8f, 0xc7c4,
-  0x5e84, 0xc7be, 0x5e79, 0xc7b8, 0x5e6e, 0xc7b2, 0x5e63, 0xc7ac,
-  0x5e58, 0xc7a6, 0x5e4d, 0xc7a0, 0x5e42, 0xc79a, 0x5e36, 0xc795,
-  0x5e2b, 0xc78f, 0x5e20, 0xc789, 0x5e15, 0xc783, 0x5e0a, 0xc77d,
-  0x5dff, 0xc777, 0x5df4, 0xc771, 0x5de9, 0xc76b, 0x5dde, 0xc765,
-  0x5dd3, 0xc75f, 0x5dc7, 0xc75a, 0x5dbc, 0xc754, 0x5db1, 0xc74e,
-  0x5da6, 0xc748, 0x5d9b, 0xc742, 0x5d90, 0xc73d, 0x5d85, 0xc737,
-  0x5d79, 0xc731, 0x5d6e, 0xc72b, 0x5d63, 0xc725, 0x5d58, 0xc720,
-  0x5d4d, 0xc71a, 0x5d42, 0xc714, 0x5d36, 0xc70e, 0x5d2b, 0xc709,
-  0x5d20, 0xc703, 0x5d15, 0xc6fd, 0x5d0a, 0xc6f7, 0x5cff, 0xc6f2,
-  0x5cf3, 0xc6ec, 0x5ce8, 0xc6e6, 0x5cdd, 0xc6e1, 0x5cd2, 0xc6db,
-  0x5cc6, 0xc6d5, 0x5cbb, 0xc6d0, 0x5cb0, 0xc6ca, 0x5ca5, 0xc6c5,
-  0x5c99, 0xc6bf, 0x5c8e, 0xc6b9, 0x5c83, 0xc6b4, 0x5c78, 0xc6ae,
-  0x5c6c, 0xc6a8, 0x5c61, 0xc6a3, 0x5c56, 0xc69d, 0x5c4b, 0xc698,
-  0x5c3f, 0xc692, 0x5c34, 0xc68d, 0x5c29, 0xc687, 0x5c1e, 0xc682,
-  0x5c12, 0xc67c, 0x5c07, 0xc677, 0x5bfc, 0xc671, 0x5bf0, 0xc66c,
-  0x5be5, 0xc666, 0x5bda, 0xc661, 0x5bce, 0xc65b, 0x5bc3, 0xc656,
-  0x5bb8, 0xc650, 0x5bac, 0xc64b, 0x5ba1, 0xc645, 0x5b96, 0xc640,
-  0x5b8a, 0xc63b, 0x5b7f, 0xc635, 0x5b74, 0xc630, 0x5b68, 0xc62a,
-  0x5b5d, 0xc625, 0x5b52, 0xc620, 0x5b46, 0xc61a, 0x5b3b, 0xc615,
-  0x5b30, 0xc610, 0x5b24, 0xc60a, 0x5b19, 0xc605, 0x5b0d, 0xc600,
-  0x5b02, 0xc5fa, 0x5af7, 0xc5f5, 0x5aeb, 0xc5f0, 0x5ae0, 0xc5ea,
-  0x5ad4, 0xc5e5, 0x5ac9, 0xc5e0, 0x5abe, 0xc5db, 0x5ab2, 0xc5d5,
-  0x5aa7, 0xc5d0, 0x5a9b, 0xc5cb, 0x5a90, 0xc5c6, 0x5a84, 0xc5c1,
-  0x5a79, 0xc5bb, 0x5a6e, 0xc5b6, 0x5a62, 0xc5b1, 0x5a57, 0xc5ac,
-  0x5a4b, 0xc5a7, 0x5a40, 0xc5a1, 0x5a34, 0xc59c, 0x5a29, 0xc597,
-  0x5a1d, 0xc592, 0x5a12, 0xc58d, 0x5a06, 0xc588, 0x59fb, 0xc583,
-  0x59ef, 0xc57e, 0x59e4, 0xc578, 0x59d8, 0xc573, 0x59cd, 0xc56e,
-  0x59c1, 0xc569, 0x59b6, 0xc564, 0x59aa, 0xc55f, 0x599f, 0xc55a,
-  0x5993, 0xc555, 0x5988, 0xc550, 0x597c, 0xc54b, 0x5971, 0xc546,
-  0x5965, 0xc541, 0x595a, 0xc53c, 0x594e, 0xc537, 0x5943, 0xc532,
-  0x5937, 0xc52d, 0x592c, 0xc528, 0x5920, 0xc523, 0x5914, 0xc51e,
-  0x5909, 0xc51a, 0x58fd, 0xc515, 0x58f2, 0xc510, 0x58e6, 0xc50b,
-  0x58db, 0xc506, 0x58cf, 0xc501, 0x58c3, 0xc4fc, 0x58b8, 0xc4f7,
-  0x58ac, 0xc4f2, 0x58a1, 0xc4ee, 0x5895, 0xc4e9, 0x5889, 0xc4e4,
-  0x587e, 0xc4df, 0x5872, 0xc4da, 0x5867, 0xc4d6, 0x585b, 0xc4d1,
-  0x584f, 0xc4cc, 0x5844, 0xc4c7, 0x5838, 0xc4c2, 0x582d, 0xc4be,
-  0x5821, 0xc4b9, 0x5815, 0xc4b4, 0x580a, 0xc4b0, 0x57fe, 0xc4ab,
-  0x57f2, 0xc4a6, 0x57e7, 0xc4a1, 0x57db, 0xc49d, 0x57cf, 0xc498,
-  0x57c4, 0xc493, 0x57b8, 0xc48f, 0x57ac, 0xc48a, 0x57a1, 0xc485,
-  0x5795, 0xc481, 0x5789, 0xc47c, 0x577e, 0xc478, 0x5772, 0xc473,
-  0x5766, 0xc46e, 0x575b, 0xc46a, 0x574f, 0xc465, 0x5743, 0xc461,
-  0x5737, 0xc45c, 0x572c, 0xc457, 0x5720, 0xc453, 0x5714, 0xc44e,
-  0x5709, 0xc44a, 0x56fd, 0xc445, 0x56f1, 0xc441, 0x56e5, 0xc43c,
-  0x56da, 0xc438, 0x56ce, 0xc433, 0x56c2, 0xc42f, 0x56b6, 0xc42a,
-  0x56ab, 0xc426, 0x569f, 0xc422, 0x5693, 0xc41d, 0x5687, 0xc419,
-  0x567c, 0xc414, 0x5670, 0xc410, 0x5664, 0xc40b, 0x5658, 0xc407,
-  0x564c, 0xc403, 0x5641, 0xc3fe, 0x5635, 0xc3fa, 0x5629, 0xc3f6,
-  0x561d, 0xc3f1, 0x5612, 0xc3ed, 0x5606, 0xc3e9, 0x55fa, 0xc3e4,
-  0x55ee, 0xc3e0, 0x55e2, 0xc3dc, 0x55d7, 0xc3d7, 0x55cb, 0xc3d3,
-  0x55bf, 0xc3cf, 0x55b3, 0xc3ca, 0x55a7, 0xc3c6, 0x559b, 0xc3c2,
-  0x5590, 0xc3be, 0x5584, 0xc3ba, 0x5578, 0xc3b5, 0x556c, 0xc3b1,
-  0x5560, 0xc3ad, 0x5554, 0xc3a9, 0x5549, 0xc3a5, 0x553d, 0xc3a0,
-  0x5531, 0xc39c, 0x5525, 0xc398, 0x5519, 0xc394, 0x550d, 0xc390,
-  0x5501, 0xc38c, 0x54f6, 0xc387, 0x54ea, 0xc383, 0x54de, 0xc37f,
-  0x54d2, 0xc37b, 0x54c6, 0xc377, 0x54ba, 0xc373, 0x54ae, 0xc36f,
-  0x54a2, 0xc36b, 0x5496, 0xc367, 0x548b, 0xc363, 0x547f, 0xc35f,
-  0x5473, 0xc35b, 0x5467, 0xc357, 0x545b, 0xc353, 0x544f, 0xc34f,
-  0x5443, 0xc34b, 0x5437, 0xc347, 0x542b, 0xc343, 0x541f, 0xc33f,
-  0x5413, 0xc33b, 0x5407, 0xc337, 0x53fb, 0xc333, 0x53f0, 0xc32f,
-  0x53e4, 0xc32b, 0x53d8, 0xc327, 0x53cc, 0xc323, 0x53c0, 0xc320,
-  0x53b4, 0xc31c, 0x53a8, 0xc318, 0x539c, 0xc314, 0x5390, 0xc310,
-  0x5384, 0xc30c, 0x5378, 0xc308, 0x536c, 0xc305, 0x5360, 0xc301,
-  0x5354, 0xc2fd, 0x5348, 0xc2f9, 0x533c, 0xc2f5, 0x5330, 0xc2f2,
-  0x5324, 0xc2ee, 0x5318, 0xc2ea, 0x530c, 0xc2e6, 0x5300, 0xc2e3,
-  0x52f4, 0xc2df, 0x52e8, 0xc2db, 0x52dc, 0xc2d8, 0x52d0, 0xc2d4,
-  0x52c4, 0xc2d0, 0x52b8, 0xc2cc, 0x52ac, 0xc2c9, 0x52a0, 0xc2c5,
-  0x5294, 0xc2c1, 0x5288, 0xc2be, 0x527c, 0xc2ba, 0x5270, 0xc2b7,
-  0x5264, 0xc2b3, 0x5258, 0xc2af, 0x524c, 0xc2ac, 0x5240, 0xc2a8,
-  0x5234, 0xc2a5, 0x5228, 0xc2a1, 0x521c, 0xc29d, 0x5210, 0xc29a,
-  0x5204, 0xc296, 0x51f7, 0xc293, 0x51eb, 0xc28f, 0x51df, 0xc28c,
-  0x51d3, 0xc288, 0x51c7, 0xc285, 0x51bb, 0xc281, 0x51af, 0xc27e,
-  0x51a3, 0xc27a, 0x5197, 0xc277, 0x518b, 0xc273, 0x517f, 0xc270,
-  0x5173, 0xc26d, 0x5167, 0xc269, 0x515a, 0xc266, 0x514e, 0xc262,
-  0x5142, 0xc25f, 0x5136, 0xc25c, 0x512a, 0xc258, 0x511e, 0xc255,
-  0x5112, 0xc251, 0x5106, 0xc24e, 0x50fa, 0xc24b, 0x50ed, 0xc247,
-  0x50e1, 0xc244, 0x50d5, 0xc241, 0x50c9, 0xc23e, 0x50bd, 0xc23a,
-  0x50b1, 0xc237, 0x50a5, 0xc234, 0x5099, 0xc230, 0x508c, 0xc22d,
-  0x5080, 0xc22a, 0x5074, 0xc227, 0x5068, 0xc223, 0x505c, 0xc220,
-  0x5050, 0xc21d, 0x5044, 0xc21a, 0x5037, 0xc217, 0x502b, 0xc213,
-  0x501f, 0xc210, 0x5013, 0xc20d, 0x5007, 0xc20a, 0x4ffb, 0xc207,
-  0x4fee, 0xc204, 0x4fe2, 0xc201, 0x4fd6, 0xc1fd, 0x4fca, 0xc1fa,
-  0x4fbe, 0xc1f7, 0x4fb2, 0xc1f4, 0x4fa5, 0xc1f1, 0x4f99, 0xc1ee,
-  0x4f8d, 0xc1eb, 0x4f81, 0xc1e8, 0x4f75, 0xc1e5, 0x4f68, 0xc1e2,
-  0x4f5c, 0xc1df, 0x4f50, 0xc1dc, 0x4f44, 0xc1d9, 0x4f38, 0xc1d6,
-  0x4f2b, 0xc1d3, 0x4f1f, 0xc1d0, 0x4f13, 0xc1cd, 0x4f07, 0xc1ca,
-  0x4efb, 0xc1c7, 0x4eee, 0xc1c4, 0x4ee2, 0xc1c1, 0x4ed6, 0xc1be,
-  0x4eca, 0xc1bb, 0x4ebd, 0xc1b8, 0x4eb1, 0xc1b6, 0x4ea5, 0xc1b3,
-  0x4e99, 0xc1b0, 0x4e8c, 0xc1ad, 0x4e80, 0xc1aa, 0x4e74, 0xc1a7,
-  0x4e68, 0xc1a4, 0x4e5c, 0xc1a2, 0x4e4f, 0xc19f, 0x4e43, 0xc19c,
-  0x4e37, 0xc199, 0x4e2b, 0xc196, 0x4e1e, 0xc194, 0x4e12, 0xc191,
-  0x4e06, 0xc18e, 0x4df9, 0xc18b, 0x4ded, 0xc189, 0x4de1, 0xc186,
-  0x4dd5, 0xc183, 0x4dc8, 0xc180, 0x4dbc, 0xc17e, 0x4db0, 0xc17b,
-  0x4da4, 0xc178, 0x4d97, 0xc176, 0x4d8b, 0xc173, 0x4d7f, 0xc170,
-  0x4d72, 0xc16e, 0x4d66, 0xc16b, 0x4d5a, 0xc168, 0x4d4e, 0xc166,
-  0x4d41, 0xc163, 0x4d35, 0xc161, 0x4d29, 0xc15e, 0x4d1c, 0xc15b,
-  0x4d10, 0xc159, 0x4d04, 0xc156, 0x4cf8, 0xc154, 0x4ceb, 0xc151,
-  0x4cdf, 0xc14f, 0x4cd3, 0xc14c, 0x4cc6, 0xc14a, 0x4cba, 0xc147,
-  0x4cae, 0xc145, 0x4ca1, 0xc142, 0x4c95, 0xc140, 0x4c89, 0xc13d,
-  0x4c7c, 0xc13b, 0x4c70, 0xc138, 0x4c64, 0xc136, 0x4c57, 0xc134,
-  0x4c4b, 0xc131, 0x4c3f, 0xc12f, 0x4c32, 0xc12c, 0x4c26, 0xc12a,
-  0x4c1a, 0xc128, 0x4c0d, 0xc125, 0x4c01, 0xc123, 0x4bf5, 0xc120,
-  0x4be8, 0xc11e, 0x4bdc, 0xc11c, 0x4bd0, 0xc119, 0x4bc3, 0xc117,
-  0x4bb7, 0xc115, 0x4bab, 0xc113, 0x4b9e, 0xc110, 0x4b92, 0xc10e,
-  0x4b85, 0xc10c, 0x4b79, 0xc109, 0x4b6d, 0xc107, 0x4b60, 0xc105,
-  0x4b54, 0xc103, 0x4b48, 0xc100, 0x4b3b, 0xc0fe, 0x4b2f, 0xc0fc,
-  0x4b23, 0xc0fa, 0x4b16, 0xc0f8, 0x4b0a, 0xc0f6, 0x4afd, 0xc0f3,
-  0x4af1, 0xc0f1, 0x4ae5, 0xc0ef, 0x4ad8, 0xc0ed, 0x4acc, 0xc0eb,
-  0x4ac0, 0xc0e9, 0x4ab3, 0xc0e7, 0x4aa7, 0xc0e4, 0x4a9a, 0xc0e2,
-  0x4a8e, 0xc0e0, 0x4a82, 0xc0de, 0x4a75, 0xc0dc, 0x4a69, 0xc0da,
-  0x4a5c, 0xc0d8, 0x4a50, 0xc0d6, 0x4a44, 0xc0d4, 0x4a37, 0xc0d2,
-  0x4a2b, 0xc0d0, 0x4a1e, 0xc0ce, 0x4a12, 0xc0cc, 0x4a06, 0xc0ca,
-  0x49f9, 0xc0c8, 0x49ed, 0xc0c6, 0x49e0, 0xc0c4, 0x49d4, 0xc0c2,
-  0x49c7, 0xc0c0, 0x49bb, 0xc0be, 0x49af, 0xc0bd, 0x49a2, 0xc0bb,
-  0x4996, 0xc0b9, 0x4989, 0xc0b7, 0x497d, 0xc0b5, 0x4970, 0xc0b3,
-  0x4964, 0xc0b1, 0x4958, 0xc0af, 0x494b, 0xc0ae, 0x493f, 0xc0ac,
-  0x4932, 0xc0aa, 0x4926, 0xc0a8, 0x4919, 0xc0a6, 0x490d, 0xc0a5,
-  0x4901, 0xc0a3, 0x48f4, 0xc0a1, 0x48e8, 0xc09f, 0x48db, 0xc09e,
-  0x48cf, 0xc09c, 0x48c2, 0xc09a, 0x48b6, 0xc098, 0x48a9, 0xc097,
-  0x489d, 0xc095, 0x4891, 0xc093, 0x4884, 0xc092, 0x4878, 0xc090,
-  0x486b, 0xc08e, 0x485f, 0xc08d, 0x4852, 0xc08b, 0x4846, 0xc089,
-  0x4839, 0xc088, 0x482d, 0xc086, 0x4820, 0xc085, 0x4814, 0xc083,
-  0x4807, 0xc081, 0x47fb, 0xc080, 0x47ef, 0xc07e, 0x47e2, 0xc07d,
-  0x47d6, 0xc07b, 0x47c9, 0xc07a, 0x47bd, 0xc078, 0x47b0, 0xc077,
-  0x47a4, 0xc075, 0x4797, 0xc074, 0x478b, 0xc072, 0x477e, 0xc071,
-  0x4772, 0xc06f, 0x4765, 0xc06e, 0x4759, 0xc06c, 0x474c, 0xc06b,
-  0x4740, 0xc069, 0x4733, 0xc068, 0x4727, 0xc067, 0x471a, 0xc065,
-  0x470e, 0xc064, 0x4701, 0xc062, 0x46f5, 0xc061, 0x46e8, 0xc060,
-  0x46dc, 0xc05e, 0x46cf, 0xc05d, 0x46c3, 0xc05c, 0x46b6, 0xc05a,
-  0x46aa, 0xc059, 0x469d, 0xc058, 0x4691, 0xc056, 0x4684, 0xc055,
-  0x4678, 0xc054, 0x466b, 0xc053, 0x465f, 0xc051, 0x4652, 0xc050,
-  0x4646, 0xc04f, 0x4639, 0xc04e, 0x462d, 0xc04c, 0x4620, 0xc04b,
-  0x4614, 0xc04a, 0x4607, 0xc049, 0x45fb, 0xc048, 0x45ee, 0xc047,
-  0x45e2, 0xc045, 0x45d5, 0xc044, 0x45c9, 0xc043, 0x45bc, 0xc042,
-  0x45b0, 0xc041, 0x45a3, 0xc040, 0x4597, 0xc03f, 0x458a, 0xc03d,
-  0x457e, 0xc03c, 0x4571, 0xc03b, 0x4565, 0xc03a, 0x4558, 0xc039,
-  0x454c, 0xc038, 0x453f, 0xc037, 0x4533, 0xc036, 0x4526, 0xc035,
-  0x451a, 0xc034, 0x450d, 0xc033, 0x4500, 0xc032, 0x44f4, 0xc031,
-  0x44e7, 0xc030, 0x44db, 0xc02f, 0x44ce, 0xc02e, 0x44c2, 0xc02d,
-  0x44b5, 0xc02c, 0x44a9, 0xc02b, 0x449c, 0xc02b, 0x4490, 0xc02a,
-  0x4483, 0xc029, 0x4477, 0xc028, 0x446a, 0xc027, 0x445e, 0xc026,
-  0x4451, 0xc025, 0x4444, 0xc024, 0x4438, 0xc024, 0x442b, 0xc023,
-  0x441f, 0xc022, 0x4412, 0xc021, 0x4406, 0xc020, 0x43f9, 0xc020,
-  0x43ed, 0xc01f, 0x43e0, 0xc01e, 0x43d4, 0xc01d, 0x43c7, 0xc01d,
-  0x43bb, 0xc01c, 0x43ae, 0xc01b, 0x43a1, 0xc01a, 0x4395, 0xc01a,
-  0x4388, 0xc019, 0x437c, 0xc018, 0x436f, 0xc018, 0x4363, 0xc017,
-  0x4356, 0xc016, 0x434a, 0xc016, 0x433d, 0xc015, 0x4330, 0xc014,
-  0x4324, 0xc014, 0x4317, 0xc013, 0x430b, 0xc013, 0x42fe, 0xc012,
-  0x42f2, 0xc011, 0x42e5, 0xc011, 0x42d9, 0xc010, 0x42cc, 0xc010,
-  0x42c0, 0xc00f, 0x42b3, 0xc00f, 0x42a6, 0xc00e, 0x429a, 0xc00e,
-  0x428d, 0xc00d, 0x4281, 0xc00d, 0x4274, 0xc00c, 0x4268, 0xc00c,
-  0x425b, 0xc00b, 0x424e, 0xc00b, 0x4242, 0xc00a, 0x4235, 0xc00a,
-  0x4229, 0xc009, 0x421c, 0xc009, 0x4210, 0xc009, 0x4203, 0xc008,
-  0x41f7, 0xc008, 0x41ea, 0xc007, 0x41dd, 0xc007, 0x41d1, 0xc007,
-  0x41c4, 0xc006, 0x41b8, 0xc006, 0x41ab, 0xc006, 0x419f, 0xc005,
-  0x4192, 0xc005, 0x4186, 0xc005, 0x4179, 0xc004, 0x416c, 0xc004,
-  0x4160, 0xc004, 0x4153, 0xc004, 0x4147, 0xc003, 0x413a, 0xc003,
-  0x412e, 0xc003, 0x4121, 0xc003, 0x4114, 0xc002, 0x4108, 0xc002,
-  0x40fb, 0xc002, 0x40ef, 0xc002, 0x40e2, 0xc002, 0x40d6, 0xc001,
-  0x40c9, 0xc001, 0x40bc, 0xc001, 0x40b0, 0xc001, 0x40a3, 0xc001,
-  0x4097, 0xc001, 0x408a, 0xc001, 0x407e, 0xc000, 0x4071, 0xc000,
-  0x4065, 0xc000, 0x4058, 0xc000, 0x404b, 0xc000, 0x403f, 0xc000,
-  0x4032, 0xc000, 0x4026, 0xc000, 0x4019, 0xc000, 0x400d, 0xc000,
-};
-
-/**    
-* @brief  Initialization function for the Q15 RFFT/RIFFT.   
-* @param[in, out] *S             points to an instance of the Q15 RFFT/RIFFT structure.   
-* @param[in]      *S_CFFT        points to an instance of the Q15 CFFT/CIFFT structure.   
-* @param[in]      fftLenReal     length of the FFT.   
-* @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
-* @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.   
-*    
-* \par Description:   
-* \par   
-* The parameter fftLenReal	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
-* \par    
-* The parameter ifftFlagR controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par    
-* This function also initializes Twiddle factor table.     
-*/
-
-arm_status arm_rfft_init_q15(
-  arm_rfft_instance_q15 * S,
-  arm_cfft_radix4_instance_q15 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag)
-{
-
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialize the Real FFT length */
-  S->fftLenReal = (uint16_t) fftLenReal;
-
-  /*  Initialize the Complex FFT length */
-  S->fftLenBy2 = (uint16_t) fftLenReal / 2u;
-
-  /*  Initialize the Twiddle coefficientA pointer */
-  S->pTwiddleAReal = (q15_t *) realCoefAQ15;
-
-  /*  Initialize the Twiddle coefficientB pointer */
-  S->pTwiddleBReal = (q15_t *) realCoefBQ15;
-
-  /*  Initialize the Flag for selection of RFFT or RIFFT */
-  S->ifftFlagR = (uint8_t) ifftFlagR;
-
-  /*  Initialize the Flag for calculation Bit reversal or not */
-  S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-  /*  Initialization of coef modifier depending on the FFT length */
-  switch (S->fftLenReal)
-  {
-  case 8192:
-    S->twidCoefRModifier = 1u;
-    break;
-  case 2048u:
-    S->twidCoefRModifier = 4u;
-    break;
-  case 512u:
-    S->twidCoefRModifier = 16u;
-    break;
-  case 128u:
-    S->twidCoefRModifier = 64u;
-    break;
-  default:
-    /*  Reporting argument error if rfftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  /* Init Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  if(S->ifftFlagR)
-  {
-    /* Initializes the CIFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_q15(S->pCfft, S->fftLenBy2, 1u, 1u);
-  }
-  else
-  {
-    /* Initializes the CFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_q15(S->pCfft, S->fftLenBy2, 0u, 1u);
-  }
-
-  /* return the status of RFFT Init function */
-  return (status);
-
-}
-
-  /**    
-   * @} end of RFFT_RIFFT group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c
deleted file mode 100644
index f2f82f73b4..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c
+++ /dev/null
@@ -1,4274 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_init_q31.c    
-*    
-* Description:	RFFT & RIFFT Q31 initialisation function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup RFFT_RIFFT    
- * @{    
- */
-
-/**    
-* \par    
-* Generation floating point realCoefAQ31 array:    
-* \par    
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-* {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-* }
    
-* \par    
-* Convert to fixed point Q31 format    
-*     round(pATable[i] * pow(2, 31))    
-*/
-
-
-static const q31_t realCoefAQ31[8192] = {
-  0x40000000, 0xc0000000, 0x3ff36f02, 0xc000013c,
-  0x3fe6de05, 0xc00004ef, 0x3fda4d09, 0xc0000b1a,
-  0x3fcdbc0f, 0xc00013bd, 0x3fc12b16, 0xc0001ed8,
-  0x3fb49a1f, 0xc0002c6a, 0x3fa8092c, 0xc0003c74,
-  0x3f9b783c, 0xc0004ef5, 0x3f8ee750, 0xc00063ee,
-  0x3f825668, 0xc0007b5f, 0x3f75c585, 0xc0009547,
-  0x3f6934a8, 0xc000b1a7, 0x3f5ca3d0, 0xc000d07e,
-  0x3f5012fe, 0xc000f1ce, 0x3f438234, 0xc0011594,
-  0x3f36f170, 0xc0013bd3, 0x3f2a60b4, 0xc0016489,
-  0x3f1dd001, 0xc0018fb6, 0x3f113f56, 0xc001bd5c,
-  0x3f04aeb5, 0xc001ed78, 0x3ef81e1d, 0xc002200d,
-  0x3eeb8d8f, 0xc0025519, 0x3edefd0c, 0xc0028c9c,
-  0x3ed26c94, 0xc002c697, 0x3ec5dc28, 0xc003030a,
-  0x3eb94bc8, 0xc00341f4, 0x3eacbb74, 0xc0038356,
-  0x3ea02b2e, 0xc003c72f, 0x3e939af5, 0xc0040d80,
-  0x3e870aca, 0xc0045648, 0x3e7a7aae, 0xc004a188,
-  0x3e6deaa1, 0xc004ef3f, 0x3e615aa3, 0xc0053f6e,
-  0x3e54cab5, 0xc0059214, 0x3e483ad8, 0xc005e731,
-  0x3e3bab0b, 0xc0063ec6, 0x3e2f1b50, 0xc00698d3,
-  0x3e228ba7, 0xc006f556, 0x3e15fc11, 0xc0075452,
-  0x3e096c8d, 0xc007b5c4, 0x3dfcdd1d, 0xc00819ae,
-  0x3df04dc0, 0xc008800f, 0x3de3be78, 0xc008e8e8,
-  0x3dd72f45, 0xc0095438, 0x3dcaa027, 0xc009c1ff,
-  0x3dbe111e, 0xc00a323d, 0x3db1822c, 0xc00aa4f3,
-  0x3da4f351, 0xc00b1a20, 0x3d98648d, 0xc00b91c4,
-  0x3d8bd5e1, 0xc00c0be0, 0x3d7f474d, 0xc00c8872,
-  0x3d72b8d2, 0xc00d077c, 0x3d662a70, 0xc00d88fd,
-  0x3d599c28, 0xc00e0cf5, 0x3d4d0df9, 0xc00e9364,
-  0x3d407fe6, 0xc00f1c4a, 0x3d33f1ed, 0xc00fa7a8,
-  0x3d276410, 0xc010357c, 0x3d1ad650, 0xc010c5c7,
-  0x3d0e48ab, 0xc011588a, 0x3d01bb24, 0xc011edc3,
-  0x3cf52dbb, 0xc0128574, 0x3ce8a06f, 0xc0131f9b,
-  0x3cdc1342, 0xc013bc39, 0x3ccf8634, 0xc0145b4e,
-  0x3cc2f945, 0xc014fcda, 0x3cb66c77, 0xc015a0dd,
-  0x3ca9dfc8, 0xc0164757, 0x3c9d533b, 0xc016f047,
-  0x3c90c6cf, 0xc0179bae, 0x3c843a85, 0xc018498c,
-  0x3c77ae5e, 0xc018f9e1, 0x3c6b2259, 0xc019acac,
-  0x3c5e9678, 0xc01a61ee, 0x3c520aba, 0xc01b19a7,
-  0x3c457f21, 0xc01bd3d6, 0x3c38f3ac, 0xc01c907c,
-  0x3c2c685d, 0xc01d4f99, 0x3c1fdd34, 0xc01e112b,
-  0x3c135231, 0xc01ed535, 0x3c06c754, 0xc01f9bb5,
-  0x3bfa3c9f, 0xc02064ab, 0x3bedb212, 0xc0213018,
-  0x3be127ac, 0xc021fdfb, 0x3bd49d70, 0xc022ce54,
-  0x3bc8135c, 0xc023a124, 0x3bbb8973, 0xc024766a,
-  0x3baeffb3, 0xc0254e27, 0x3ba2761e, 0xc0262859,
-  0x3b95ecb4, 0xc0270502, 0x3b896375, 0xc027e421,
-  0x3b7cda63, 0xc028c5b6, 0x3b70517d, 0xc029a9c1,
-  0x3b63c8c4, 0xc02a9042, 0x3b574039, 0xc02b7939,
-  0x3b4ab7db, 0xc02c64a6, 0x3b3e2fac, 0xc02d5289,
-  0x3b31a7ac, 0xc02e42e2, 0x3b251fdc, 0xc02f35b1,
-  0x3b18983b, 0xc0302af5, 0x3b0c10cb, 0xc03122b0,
-  0x3aff898c, 0xc0321ce0, 0x3af3027e, 0xc0331986,
-  0x3ae67ba2, 0xc03418a2, 0x3ad9f4f8, 0xc0351a33,
-  0x3acd6e81, 0xc0361e3a, 0x3ac0e83d, 0xc03724b6,
-  0x3ab4622d, 0xc0382da8, 0x3aa7dc52, 0xc0393910,
-  0x3a9b56ab, 0xc03a46ed, 0x3a8ed139, 0xc03b573f,
-  0x3a824bfd, 0xc03c6a07, 0x3a75c6f8, 0xc03d7f44,
-  0x3a694229, 0xc03e96f6, 0x3a5cbd91, 0xc03fb11d,
-  0x3a503930, 0xc040cdba, 0x3a43b508, 0xc041eccc,
-  0x3a373119, 0xc0430e53, 0x3a2aad62, 0xc044324f,
-  0x3a1e29e5, 0xc04558c0, 0x3a11a6a3, 0xc04681a6,
-  0x3a05239a, 0xc047ad01, 0x39f8a0cd, 0xc048dad1,
-  0x39ec1e3b, 0xc04a0b16, 0x39df9be6, 0xc04b3dcf,
-  0x39d319cc, 0xc04c72fe, 0x39c697f0, 0xc04daaa1,
-  0x39ba1651, 0xc04ee4b8, 0x39ad94f0, 0xc0502145,
-  0x39a113cd, 0xc0516045, 0x399492ea, 0xc052a1bb,
-  0x39881245, 0xc053e5a5, 0x397b91e1, 0xc0552c03,
-  0x396f11bc, 0xc05674d6, 0x396291d9, 0xc057c01d,
-  0x39561237, 0xc0590dd8, 0x394992d7, 0xc05a5e07,
-  0x393d13b8, 0xc05bb0ab, 0x393094dd, 0xc05d05c3,
-  0x39241645, 0xc05e5d4e, 0x391797f0, 0xc05fb74e,
-  0x390b19e0, 0xc06113c2, 0x38fe9c15, 0xc06272aa,
-  0x38f21e8e, 0xc063d405, 0x38e5a14d, 0xc06537d4,
-  0x38d92452, 0xc0669e18, 0x38cca79e, 0xc06806ce,
-  0x38c02b31, 0xc06971f9, 0x38b3af0c, 0xc06adf97,
-  0x38a7332e, 0xc06c4fa8, 0x389ab799, 0xc06dc22e,
-  0x388e3c4d, 0xc06f3726, 0x3881c14b, 0xc070ae92,
-  0x38754692, 0xc0722871, 0x3868cc24, 0xc073a4c3,
-  0x385c5201, 0xc0752389, 0x384fd829, 0xc076a4c2,
-  0x38435e9d, 0xc078286e, 0x3836e55d, 0xc079ae8c,
-  0x382a6c6a, 0xc07b371e, 0x381df3c5, 0xc07cc223,
-  0x38117b6d, 0xc07e4f9b, 0x38050364, 0xc07fdf85,
-  0x37f88ba9, 0xc08171e2, 0x37ec143e, 0xc08306b2,
-  0x37df9d22, 0xc0849df4, 0x37d32657, 0xc08637a9,
-  0x37c6afdc, 0xc087d3d0, 0x37ba39b3, 0xc089726a,
-  0x37adc3db, 0xc08b1376, 0x37a14e55, 0xc08cb6f5,
-  0x3794d922, 0xc08e5ce5, 0x37886442, 0xc0900548,
-  0x377befb5, 0xc091b01d, 0x376f7b7d, 0xc0935d64,
-  0x37630799, 0xc0950d1d, 0x3756940a, 0xc096bf48,
-  0x374a20d0, 0xc09873e4, 0x373daded, 0xc09a2af3,
-  0x37313b60, 0xc09be473, 0x3724c92a, 0xc09da065,
-  0x3718574b, 0xc09f5ec8, 0x370be5c4, 0xc0a11f9d,
-  0x36ff7496, 0xc0a2e2e3, 0x36f303c0, 0xc0a4a89b,
-  0x36e69344, 0xc0a670c4, 0x36da2321, 0xc0a83b5e,
-  0x36cdb359, 0xc0aa086a, 0x36c143ec, 0xc0abd7e6,
-  0x36b4d4d9, 0xc0ada9d4, 0x36a86623, 0xc0af7e33,
-  0x369bf7c9, 0xc0b15502, 0x368f89cb, 0xc0b32e42,
-  0x36831c2b, 0xc0b509f3, 0x3676aee8, 0xc0b6e815,
-  0x366a4203, 0xc0b8c8a7, 0x365dd57d, 0xc0baabaa,
-  0x36516956, 0xc0bc911d, 0x3644fd8f, 0xc0be7901,
-  0x36389228, 0xc0c06355, 0x362c2721, 0xc0c25019,
-  0x361fbc7b, 0xc0c43f4d, 0x36135237, 0xc0c630f2,
-  0x3606e854, 0xc0c82506, 0x35fa7ed4, 0xc0ca1b8a,
-  0x35ee15b7, 0xc0cc147f, 0x35e1acfd, 0xc0ce0fe3,
-  0x35d544a7, 0xc0d00db6, 0x35c8dcb6, 0xc0d20dfa,
-  0x35bc7529, 0xc0d410ad, 0x35b00e02, 0xc0d615cf,
-  0x35a3a740, 0xc0d81d61, 0x359740e5, 0xc0da2762,
-  0x358adaf0, 0xc0dc33d2, 0x357e7563, 0xc0de42b2,
-  0x3572103d, 0xc0e05401, 0x3565ab80, 0xc0e267be,
-  0x3559472b, 0xc0e47deb, 0x354ce33f, 0xc0e69686,
-  0x35407fbd, 0xc0e8b190, 0x35341ca5, 0xc0eacf09,
-  0x3527b9f7, 0xc0eceef1, 0x351b57b5, 0xc0ef1147,
-  0x350ef5de, 0xc0f1360b, 0x35029473, 0xc0f35d3e,
-  0x34f63374, 0xc0f586df, 0x34e9d2e3, 0xc0f7b2ee,
-  0x34dd72be, 0xc0f9e16b, 0x34d11308, 0xc0fc1257,
-  0x34c4b3c0, 0xc0fe45b0, 0x34b854e7, 0xc1007b77,
-  0x34abf67e, 0xc102b3ac, 0x349f9884, 0xc104ee4f,
-  0x34933afa, 0xc1072b5f, 0x3486dde1, 0xc1096add,
-  0x347a8139, 0xc10bacc8, 0x346e2504, 0xc10df120,
-  0x3461c940, 0xc11037e6, 0x34556def, 0xc1128119,
-  0x34491311, 0xc114ccb9, 0x343cb8a7, 0xc1171ac6,
-  0x34305eb0, 0xc1196b3f, 0x3424052f, 0xc11bbe26,
-  0x3417ac22, 0xc11e1379, 0x340b538b, 0xc1206b39,
-  0x33fefb6a, 0xc122c566, 0x33f2a3bf, 0xc12521ff,
-  0x33e64c8c, 0xc1278104, 0x33d9f5cf, 0xc129e276,
-  0x33cd9f8b, 0xc12c4653, 0x33c149bf, 0xc12eac9d,
-  0x33b4f46c, 0xc1311553, 0x33a89f92, 0xc1338075,
-  0x339c4b32, 0xc135ee02, 0x338ff74d, 0xc1385dfb,
-  0x3383a3e2, 0xc13ad060, 0x337750f2, 0xc13d4530,
-  0x336afe7e, 0xc13fbc6c, 0x335eac86, 0xc1423613,
-  0x33525b0b, 0xc144b225, 0x33460a0d, 0xc14730a3,
-  0x3339b98d, 0xc149b18b, 0x332d698a, 0xc14c34df,
-  0x33211a07, 0xc14eba9d, 0x3314cb02, 0xc15142c6,
-  0x33087c7d, 0xc153cd5a, 0x32fc2e77, 0xc1565a58,
-  0x32efe0f2, 0xc158e9c1, 0x32e393ef, 0xc15b7b94,
-  0x32d7476c, 0xc15e0fd1, 0x32cafb6b, 0xc160a678,
-  0x32beafed, 0xc1633f8a, 0x32b264f2, 0xc165db05,
-  0x32a61a7a, 0xc16878eb, 0x3299d085, 0xc16b193a,
-  0x328d8715, 0xc16dbbf3, 0x32813e2a, 0xc1706115,
-  0x3274f5c3, 0xc17308a1, 0x3268ade3, 0xc175b296,
-  0x325c6688, 0xc1785ef4, 0x32501fb5, 0xc17b0dbb,
-  0x3243d968, 0xc17dbeec, 0x323793a3, 0xc1807285,
-  0x322b4e66, 0xc1832888, 0x321f09b1, 0xc185e0f3,
-  0x3212c585, 0xc1889bc6, 0x320681e3, 0xc18b5903,
-  0x31fa3ecb, 0xc18e18a7, 0x31edfc3d, 0xc190dab4,
-  0x31e1ba3a, 0xc1939f29, 0x31d578c2, 0xc1966606,
-  0x31c937d6, 0xc1992f4c, 0x31bcf777, 0xc19bfaf9,
-  0x31b0b7a4, 0xc19ec90d, 0x31a4785e, 0xc1a1998a,
-  0x319839a6, 0xc1a46c6e, 0x318bfb7d, 0xc1a741b9,
-  0x317fbde2, 0xc1aa196c, 0x317380d6, 0xc1acf386,
-  0x31674459, 0xc1afd007, 0x315b086d, 0xc1b2aef0,
-  0x314ecd11, 0xc1b5903f, 0x31429247, 0xc1b873f5,
-  0x3136580d, 0xc1bb5a11, 0x312a1e66, 0xc1be4294,
-  0x311de551, 0xc1c12d7e, 0x3111accf, 0xc1c41ace,
-  0x310574e0, 0xc1c70a84, 0x30f93d86, 0xc1c9fca0,
-  0x30ed06bf, 0xc1ccf122, 0x30e0d08d, 0xc1cfe80a,
-  0x30d49af1, 0xc1d2e158, 0x30c865ea, 0xc1d5dd0c,
-  0x30bc317a, 0xc1d8db25, 0x30affda0, 0xc1dbdba3,
-  0x30a3ca5d, 0xc1dede87, 0x309797b2, 0xc1e1e3d0,
-  0x308b659f, 0xc1e4eb7e, 0x307f3424, 0xc1e7f591,
-  0x30730342, 0xc1eb0209, 0x3066d2fa, 0xc1ee10e5,
-  0x305aa34c, 0xc1f12227, 0x304e7438, 0xc1f435cc,
-  0x304245c0, 0xc1f74bd6, 0x303617e2, 0xc1fa6445,
-  0x3029eaa1, 0xc1fd7f17, 0x301dbdfb, 0xc2009c4e,
-  0x301191f3, 0xc203bbe8, 0x30056687, 0xc206dde6,
-  0x2ff93bba, 0xc20a0248, 0x2fed118a, 0xc20d290d,
-  0x2fe0e7f9, 0xc2105236, 0x2fd4bf08, 0xc2137dc2,
-  0x2fc896b5, 0xc216abb1, 0x2fbc6f03, 0xc219dc03,
-  0x2fb047f2, 0xc21d0eb8, 0x2fa42181, 0xc22043d0,
-  0x2f97fbb2, 0xc2237b4b, 0x2f8bd685, 0xc226b528,
-  0x2f7fb1fa, 0xc229f167, 0x2f738e12, 0xc22d3009,
-  0x2f676ace, 0xc230710d, 0x2f5b482d, 0xc233b473,
-  0x2f4f2630, 0xc236fa3b, 0x2f4304d8, 0xc23a4265,
-  0x2f36e426, 0xc23d8cf1, 0x2f2ac419, 0xc240d9de,
-  0x2f1ea4b2, 0xc244292c, 0x2f1285f2, 0xc2477adc,
-  0x2f0667d9, 0xc24aceed, 0x2efa4a67, 0xc24e255e,
-  0x2eee2d9d, 0xc2517e31, 0x2ee2117c, 0xc254d965,
-  0x2ed5f604, 0xc25836f9, 0x2ec9db35, 0xc25b96ee,
-  0x2ebdc110, 0xc25ef943, 0x2eb1a796, 0xc2625df8,
-  0x2ea58ec6, 0xc265c50e, 0x2e9976a1, 0xc2692e83,
-  0x2e8d5f29, 0xc26c9a58, 0x2e81485c, 0xc270088e,
-  0x2e75323c, 0xc2737922, 0x2e691cc9, 0xc276ec16,
-  0x2e5d0804, 0xc27a616a, 0x2e50f3ed, 0xc27dd91c,
-  0x2e44e084, 0xc281532e, 0x2e38cdcb, 0xc284cf9f,
-  0x2e2cbbc1, 0xc2884e6e, 0x2e20aa67, 0xc28bcf9c,
-  0x2e1499bd, 0xc28f5329, 0x2e0889c4, 0xc292d914,
-  0x2dfc7a7c, 0xc296615d, 0x2df06be6, 0xc299ec05,
-  0x2de45e03, 0xc29d790a, 0x2dd850d2, 0xc2a1086d,
-  0x2dcc4454, 0xc2a49a2e, 0x2dc0388a, 0xc2a82e4d,
-  0x2db42d74, 0xc2abc4c9, 0x2da82313, 0xc2af5da2,
-  0x2d9c1967, 0xc2b2f8d8, 0x2d901070, 0xc2b6966c,
-  0x2d84082f, 0xc2ba365c, 0x2d7800a5, 0xc2bdd8a9,
-  0x2d6bf9d1, 0xc2c17d52, 0x2d5ff3b5, 0xc2c52459,
-  0x2d53ee51, 0xc2c8cdbb, 0x2d47e9a5, 0xc2cc7979,
-  0x2d3be5b1, 0xc2d02794, 0x2d2fe277, 0xc2d3d80a,
-  0x2d23dff7, 0xc2d78add, 0x2d17de31, 0xc2db400a,
-  0x2d0bdd25, 0xc2def794, 0x2cffdcd4, 0xc2e2b178,
-  0x2cf3dd3f, 0xc2e66db8, 0x2ce7de66, 0xc2ea2c53,
-  0x2cdbe04a, 0xc2eded49, 0x2ccfe2ea, 0xc2f1b099,
-  0x2cc3e648, 0xc2f57644, 0x2cb7ea63, 0xc2f93e4a,
-  0x2cabef3d, 0xc2fd08a9, 0x2c9ff4d6, 0xc300d563,
-  0x2c93fb2e, 0xc304a477, 0x2c880245, 0xc30875e5,
-  0x2c7c0a1d, 0xc30c49ad, 0x2c7012b5, 0xc3101fce,
-  0x2c641c0e, 0xc313f848, 0x2c582629, 0xc317d31c,
-  0x2c4c3106, 0xc31bb049, 0x2c403ca5, 0xc31f8fcf,
-  0x2c344908, 0xc32371ae, 0x2c28562d, 0xc32755e5,
-  0x2c1c6417, 0xc32b3c75, 0x2c1072c4, 0xc32f255e,
-  0x2c048237, 0xc333109e, 0x2bf8926f, 0xc336fe37,
-  0x2beca36c, 0xc33aee27, 0x2be0b52f, 0xc33ee070,
-  0x2bd4c7ba, 0xc342d510, 0x2bc8db0b, 0xc346cc07,
-  0x2bbcef23, 0xc34ac556, 0x2bb10404, 0xc34ec0fc,
-  0x2ba519ad, 0xc352bef9, 0x2b99301f, 0xc356bf4d,
-  0x2b8d475b, 0xc35ac1f7, 0x2b815f60, 0xc35ec6f8,
-  0x2b75782f, 0xc362ce50, 0x2b6991ca, 0xc366d7fd,
-  0x2b5dac2f, 0xc36ae401, 0x2b51c760, 0xc36ef25b,
-  0x2b45e35d, 0xc373030a, 0x2b3a0027, 0xc377160f,
-  0x2b2e1dbe, 0xc37b2b6a, 0x2b223c22, 0xc37f4319,
-  0x2b165b54, 0xc3835d1e, 0x2b0a7b54, 0xc3877978,
-  0x2afe9c24, 0xc38b9827, 0x2af2bdc3, 0xc38fb92a,
-  0x2ae6e031, 0xc393dc82, 0x2adb0370, 0xc398022f,
-  0x2acf277f, 0xc39c2a2f, 0x2ac34c60, 0xc3a05484,
-  0x2ab77212, 0xc3a4812c, 0x2aab9896, 0xc3a8b028,
-  0x2a9fbfed, 0xc3ace178, 0x2a93e817, 0xc3b1151b,
-  0x2a881114, 0xc3b54b11, 0x2a7c3ae5, 0xc3b9835a,
-  0x2a70658a, 0xc3bdbdf6, 0x2a649105, 0xc3c1fae5,
-  0x2a58bd54, 0xc3c63a26, 0x2a4cea79, 0xc3ca7bba,
-  0x2a411874, 0xc3cebfa0, 0x2a354746, 0xc3d305d8,
-  0x2a2976ef, 0xc3d74e62, 0x2a1da770, 0xc3db993e,
-  0x2a11d8c8, 0xc3dfe66c, 0x2a060af9, 0xc3e435ea,
-  0x29fa3e03, 0xc3e887bb, 0x29ee71e6, 0xc3ecdbdc,
-  0x29e2a6a3, 0xc3f1324e, 0x29d6dc3b, 0xc3f58b10,
-  0x29cb12ad, 0xc3f9e624, 0x29bf49fa, 0xc3fe4388,
-  0x29b38223, 0xc402a33c, 0x29a7bb28, 0xc4070540,
-  0x299bf509, 0xc40b6994, 0x29902fc7, 0xc40fd037,
-  0x29846b63, 0xc414392b, 0x2978a7dd, 0xc418a46d,
-  0x296ce535, 0xc41d11ff, 0x2961236c, 0xc42181e0,
-  0x29556282, 0xc425f410, 0x2949a278, 0xc42a688f,
-  0x293de34e, 0xc42edf5c, 0x29322505, 0xc4335877,
-  0x2926679c, 0xc437d3e1, 0x291aab16, 0xc43c5199,
-  0x290eef71, 0xc440d19e, 0x290334af, 0xc44553f2,
-  0x28f77acf, 0xc449d892, 0x28ebc1d3, 0xc44e5f80,
-  0x28e009ba, 0xc452e8bc, 0x28d45286, 0xc4577444,
-  0x28c89c37, 0xc45c0219, 0x28bce6cd, 0xc460923b,
-  0x28b13248, 0xc46524a9, 0x28a57ea9, 0xc469b963,
-  0x2899cbf1, 0xc46e5069, 0x288e1a20, 0xc472e9bc,
-  0x28826936, 0xc477855a, 0x2876b934, 0xc47c2344,
-  0x286b0a1a, 0xc480c379, 0x285f5be9, 0xc48565f9,
-  0x2853aea1, 0xc48a0ac4, 0x28480243, 0xc48eb1db,
-  0x283c56cf, 0xc4935b3c, 0x2830ac45, 0xc49806e7,
-  0x282502a7, 0xc49cb4dd, 0x281959f4, 0xc4a1651c,
-  0x280db22d, 0xc4a617a6, 0x28020b52, 0xc4aacc7a,
-  0x27f66564, 0xc4af8397, 0x27eac063, 0xc4b43cfd,
-  0x27df1c50, 0xc4b8f8ad, 0x27d3792b, 0xc4bdb6a6,
-  0x27c7d6f4, 0xc4c276e8, 0x27bc35ad, 0xc4c73972,
-  0x27b09555, 0xc4cbfe45, 0x27a4f5ed, 0xc4d0c560,
-  0x27995776, 0xc4d58ec3, 0x278db9ef, 0xc4da5a6f,
-  0x27821d59, 0xc4df2862, 0x277681b6, 0xc4e3f89c,
-  0x276ae704, 0xc4e8cb1e, 0x275f4d45, 0xc4ed9fe7,
-  0x2753b479, 0xc4f276f7, 0x27481ca1, 0xc4f7504e,
-  0x273c85bc, 0xc4fc2bec, 0x2730efcc, 0xc50109d0,
-  0x27255ad1, 0xc505e9fb, 0x2719c6cb, 0xc50acc6b,
-  0x270e33bb, 0xc50fb121, 0x2702a1a1, 0xc514981d,
-  0x26f7107e, 0xc519815f, 0x26eb8052, 0xc51e6ce6,
-  0x26dff11d, 0xc5235ab2, 0x26d462e1, 0xc5284ac3,
-  0x26c8d59c, 0xc52d3d18, 0x26bd4951, 0xc53231b3,
-  0x26b1bdff, 0xc5372891, 0x26a633a6, 0xc53c21b4,
-  0x269aaa48, 0xc5411d1b, 0x268f21e5, 0xc5461ac6,
-  0x26839a7c, 0xc54b1ab4, 0x26781410, 0xc5501ce5,
-  0x266c8e9f, 0xc555215a, 0x26610a2a, 0xc55a2812,
-  0x265586b3, 0xc55f310d, 0x264a0438, 0xc5643c4a,
-  0x263e82bc, 0xc56949ca, 0x2633023e, 0xc56e598c,
-  0x262782be, 0xc5736b90, 0x261c043d, 0xc5787fd6,
-  0x261086bc, 0xc57d965d, 0x26050a3b, 0xc582af26,
-  0x25f98ebb, 0xc587ca31, 0x25ee143b, 0xc58ce77c,
-  0x25e29abc, 0xc5920708, 0x25d72240, 0xc59728d5,
-  0x25cbaac5, 0xc59c4ce3, 0x25c0344d, 0xc5a17330,
-  0x25b4bed8, 0xc5a69bbe, 0x25a94a67, 0xc5abc68c,
-  0x259dd6f9, 0xc5b0f399, 0x25926490, 0xc5b622e6,
-  0x2586f32c, 0xc5bb5472, 0x257b82cd, 0xc5c0883d,
-  0x25701374, 0xc5c5be47, 0x2564a521, 0xc5caf690,
-  0x255937d5, 0xc5d03118, 0x254dcb8f, 0xc5d56ddd,
-  0x25426051, 0xc5daace1, 0x2536f61b, 0xc5dfee22,
-  0x252b8cee, 0xc5e531a1, 0x252024c9, 0xc5ea775e,
-  0x2514bdad, 0xc5efbf58, 0x2509579b, 0xc5f5098f,
-  0x24fdf294, 0xc5fa5603, 0x24f28e96, 0xc5ffa4b3,
-  0x24e72ba4, 0xc604f5a0, 0x24dbc9bd, 0xc60a48c9,
-  0x24d068e2, 0xc60f9e2e, 0x24c50914, 0xc614f5cf,
-  0x24b9aa52, 0xc61a4fac, 0x24ae4c9d, 0xc61fabc4,
-  0x24a2eff6, 0xc6250a18, 0x2497945d, 0xc62a6aa6,
-  0x248c39d3, 0xc62fcd6f, 0x2480e057, 0xc6353273,
-  0x247587eb, 0xc63a99b1, 0x246a308f, 0xc6400329,
-  0x245eda43, 0xc6456edb, 0x24538507, 0xc64adcc7,
-  0x244830dd, 0xc6504ced, 0x243cddc4, 0xc655bf4c,
-  0x24318bbe, 0xc65b33e4, 0x24263ac9, 0xc660aab5,
-  0x241aeae8, 0xc66623be, 0x240f9c1a, 0xc66b9f01,
-  0x24044e60, 0xc6711c7b, 0x23f901ba, 0xc6769c2e,
-  0x23edb628, 0xc67c1e18, 0x23e26bac, 0xc681a23a,
-  0x23d72245, 0xc6872894, 0x23cbd9f4, 0xc68cb124,
-  0x23c092b9, 0xc6923bec, 0x23b54c95, 0xc697c8eb,
-  0x23aa0788, 0xc69d5820, 0x239ec393, 0xc6a2e98b,
-  0x239380b6, 0xc6a87d2d, 0x23883ef2, 0xc6ae1304,
-  0x237cfe47, 0xc6b3ab12, 0x2371beb5, 0xc6b94554,
-  0x2366803c, 0xc6bee1cd, 0x235b42df, 0xc6c4807a,
-  0x2350069b, 0xc6ca215c, 0x2344cb73, 0xc6cfc472,
-  0x23399167, 0xc6d569be, 0x232e5876, 0xc6db113d,
-  0x232320a2, 0xc6e0baf0, 0x2317e9eb, 0xc6e666d7,
-  0x230cb451, 0xc6ec14f2, 0x23017fd5, 0xc6f1c540,
-  0x22f64c77, 0xc6f777c1, 0x22eb1a37, 0xc6fd2c75,
-  0x22dfe917, 0xc702e35c, 0x22d4b916, 0xc7089c75,
-  0x22c98a35, 0xc70e57c0, 0x22be5c74, 0xc714153e,
-  0x22b32fd4, 0xc719d4ed, 0x22a80456, 0xc71f96ce,
-  0x229cd9f8, 0xc7255ae0, 0x2291b0bd, 0xc72b2123,
-  0x228688a4, 0xc730e997, 0x227b61af, 0xc736b43c,
-  0x22703bdc, 0xc73c8111, 0x2265172e, 0xc7425016,
-  0x2259f3a3, 0xc748214c, 0x224ed13d, 0xc74df4b1,
-  0x2243affc, 0xc753ca46, 0x22388fe1, 0xc759a20a,
-  0x222d70eb, 0xc75f7bfe, 0x2222531c, 0xc7655820,
-  0x22173674, 0xc76b3671, 0x220c1af3, 0xc77116f0,
-  0x22010099, 0xc776f99d, 0x21f5e768, 0xc77cde79,
-  0x21eacf5f, 0xc782c582, 0x21dfb87f, 0xc788aeb9,
-  0x21d4a2c8, 0xc78e9a1d, 0x21c98e3b, 0xc79487ae,
-  0x21be7ad8, 0xc79a776c, 0x21b368a0, 0xc7a06957,
-  0x21a85793, 0xc7a65d6e, 0x219d47b1, 0xc7ac53b1,
-  0x219238fb, 0xc7b24c20, 0x21872b72, 0xc7b846ba,
-  0x217c1f15, 0xc7be4381, 0x217113e5, 0xc7c44272,
-  0x216609e3, 0xc7ca438f, 0x215b0110, 0xc7d046d6,
-  0x214ff96a, 0xc7d64c47, 0x2144f2f3, 0xc7dc53e3,
-  0x2139edac, 0xc7e25daa, 0x212ee995, 0xc7e8699a,
-  0x2123e6ad, 0xc7ee77b3, 0x2118e4f6, 0xc7f487f6,
-  0x210de470, 0xc7fa9a62, 0x2102e51c, 0xc800aef7,
-  0x20f7e6f9, 0xc806c5b5, 0x20ecea09, 0xc80cde9b,
-  0x20e1ee4b, 0xc812f9a9, 0x20d6f3c1, 0xc81916df,
-  0x20cbfa6a, 0xc81f363d, 0x20c10247, 0xc82557c3,
-  0x20b60b58, 0xc82b7b70, 0x20ab159e, 0xc831a143,
-  0x20a0211a, 0xc837c93e, 0x20952dcb, 0xc83df35f,
-  0x208a3bb2, 0xc8441fa6, 0x207f4acf, 0xc84a4e14,
-  0x20745b24, 0xc8507ea7, 0x20696cb0, 0xc856b160,
-  0x205e7f74, 0xc85ce63e, 0x2053936f, 0xc8631d42,
-  0x2048a8a4, 0xc869566a, 0x203dbf11, 0xc86f91b7,
-  0x2032d6b8, 0xc875cf28, 0x2027ef99, 0xc87c0ebd,
-  0x201d09b4, 0xc8825077, 0x2012250a, 0xc8889454,
-  0x2007419b, 0xc88eda54, 0x1ffc5f67, 0xc8952278,
-  0x1ff17e70, 0xc89b6cbf, 0x1fe69eb4, 0xc8a1b928,
-  0x1fdbc036, 0xc8a807b4, 0x1fd0e2f5, 0xc8ae5862,
-  0x1fc606f1, 0xc8b4ab32, 0x1fbb2c2c, 0xc8bb0023,
-  0x1fb052a5, 0xc8c15736, 0x1fa57a5d, 0xc8c7b06b,
-  0x1f9aa354, 0xc8ce0bc0, 0x1f8fcd8b, 0xc8d46936,
-  0x1f84f902, 0xc8dac8cd, 0x1f7a25ba, 0xc8e12a84,
-  0x1f6f53b3, 0xc8e78e5b, 0x1f6482ed, 0xc8edf452,
-  0x1f59b369, 0xc8f45c68, 0x1f4ee527, 0xc8fac69e,
-  0x1f441828, 0xc90132f2, 0x1f394c6b, 0xc907a166,
-  0x1f2e81f3, 0xc90e11f7, 0x1f23b8be, 0xc91484a8,
-  0x1f18f0ce, 0xc91af976, 0x1f0e2a22, 0xc9217062,
-  0x1f0364bc, 0xc927e96b, 0x1ef8a09b, 0xc92e6492,
-  0x1eedddc0, 0xc934e1d6, 0x1ee31c2b, 0xc93b6137,
-  0x1ed85bdd, 0xc941e2b4, 0x1ecd9cd7, 0xc948664d,
-  0x1ec2df18, 0xc94eec03, 0x1eb822a1, 0xc95573d4,
-  0x1ead6773, 0xc95bfdc1, 0x1ea2ad8d, 0xc96289c9,
-  0x1e97f4f1, 0xc96917ec, 0x1e8d3d9e, 0xc96fa82a,
-  0x1e828796, 0xc9763a83, 0x1e77d2d8, 0xc97ccef5,
-  0x1e6d1f65, 0xc9836582, 0x1e626d3e, 0xc989fe29,
-  0x1e57bc62, 0xc99098e9, 0x1e4d0cd2, 0xc99735c2,
-  0x1e425e8f, 0xc99dd4b4, 0x1e37b199, 0xc9a475bf,
-  0x1e2d05f1, 0xc9ab18e3, 0x1e225b96, 0xc9b1be1e,
-  0x1e17b28a, 0xc9b86572, 0x1e0d0acc, 0xc9bf0edd,
-  0x1e02645d, 0xc9c5ba60, 0x1df7bf3e, 0xc9cc67fa,
-  0x1ded1b6e, 0xc9d317ab, 0x1de278ef, 0xc9d9c973,
-  0x1dd7d7c1, 0xc9e07d51, 0x1dcd37e4, 0xc9e73346,
-  0x1dc29958, 0xc9edeb50, 0x1db7fc1e, 0xc9f4a570,
-  0x1dad6036, 0xc9fb61a5, 0x1da2c5a2, 0xca021fef,
-  0x1d982c60, 0xca08e04f, 0x1d8d9472, 0xca0fa2c3,
-  0x1d82fdd8, 0xca16674b, 0x1d786892, 0xca1d2de7,
-  0x1d6dd4a2, 0xca23f698, 0x1d634206, 0xca2ac15b,
-  0x1d58b0c0, 0xca318e32, 0x1d4e20d0, 0xca385d1d,
-  0x1d439236, 0xca3f2e19, 0x1d3904f4, 0xca460129,
-  0x1d2e7908, 0xca4cd64b, 0x1d23ee74, 0xca53ad7e,
-  0x1d196538, 0xca5a86c4, 0x1d0edd55, 0xca61621b,
-  0x1d0456ca, 0xca683f83, 0x1cf9d199, 0xca6f1efc,
-  0x1cef4dc2, 0xca760086, 0x1ce4cb44, 0xca7ce420,
-  0x1cda4a21, 0xca83c9ca, 0x1ccfca59, 0xca8ab184,
-  0x1cc54bec, 0xca919b4e, 0x1cbacedb, 0xca988727,
-  0x1cb05326, 0xca9f750f, 0x1ca5d8cd, 0xcaa66506,
-  0x1c9b5fd2, 0xcaad570c, 0x1c90e834, 0xcab44b1f,
-  0x1c8671f3, 0xcabb4141, 0x1c7bfd11, 0xcac23971,
-  0x1c71898d, 0xcac933ae, 0x1c671768, 0xcad02ff8,
-  0x1c5ca6a2, 0xcad72e4f, 0x1c52373c, 0xcade2eb3,
-  0x1c47c936, 0xcae53123, 0x1c3d5c91, 0xcaec35a0,
-  0x1c32f14d, 0xcaf33c28, 0x1c28876a, 0xcafa44bc,
-  0x1c1e1ee9, 0xcb014f5b, 0x1c13b7c9, 0xcb085c05,
-  0x1c09520d, 0xcb0f6aba, 0x1bfeedb3, 0xcb167b79,
-  0x1bf48abd, 0xcb1d8e43, 0x1bea292b, 0xcb24a316,
-  0x1bdfc8fc, 0xcb2bb9f4, 0x1bd56a32, 0xcb32d2da,
-  0x1bcb0cce, 0xcb39edca, 0x1bc0b0ce, 0xcb410ac3,
-  0x1bb65634, 0xcb4829c4, 0x1babfd01, 0xcb4f4acd,
-  0x1ba1a534, 0xcb566ddf, 0x1b974ece, 0xcb5d92f8,
-  0x1b8cf9cf, 0xcb64ba19, 0x1b82a638, 0xcb6be341,
-  0x1b785409, 0xcb730e70, 0x1b6e0342, 0xcb7a3ba5,
-  0x1b63b3e5, 0xcb816ae1, 0x1b5965f1, 0xcb889c23,
-  0x1b4f1967, 0xcb8fcf6b, 0x1b44ce46, 0xcb9704b9,
-  0x1b3a8491, 0xcb9e3c0b, 0x1b303c46, 0xcba57563,
-  0x1b25f566, 0xcbacb0bf, 0x1b1baff2, 0xcbb3ee20,
-  0x1b116beb, 0xcbbb2d85, 0x1b072950, 0xcbc26eee,
-  0x1afce821, 0xcbc9b25a, 0x1af2a860, 0xcbd0f7ca,
-  0x1ae86a0d, 0xcbd83f3d, 0x1ade2d28, 0xcbdf88b3,
-  0x1ad3f1b1, 0xcbe6d42b, 0x1ac9b7a9, 0xcbee21a5,
-  0x1abf7f11, 0xcbf57121, 0x1ab547e8, 0xcbfcc29f,
-  0x1aab122f, 0xcc04161e, 0x1aa0dde7, 0xcc0b6b9e,
-  0x1a96ab0f, 0xcc12c31f, 0x1a8c79a9, 0xcc1a1ca0,
-  0x1a8249b4, 0xcc217822, 0x1a781b31, 0xcc28d5a3,
-  0x1a6dee21, 0xcc303524, 0x1a63c284, 0xcc3796a5,
-  0x1a599859, 0xcc3efa25, 0x1a4f6fa3, 0xcc465fa3,
-  0x1a454860, 0xcc4dc720, 0x1a3b2292, 0xcc55309b,
-  0x1a30fe38, 0xcc5c9c14, 0x1a26db54, 0xcc64098b,
-  0x1a1cb9e5, 0xcc6b78ff, 0x1a1299ec, 0xcc72ea70,
-  0x1a087b69, 0xcc7a5dde, 0x19fe5e5e, 0xcc81d349,
-  0x19f442c9, 0xcc894aaf, 0x19ea28ac, 0xcc90c412,
-  0x19e01006, 0xcc983f70, 0x19d5f8d9, 0xcc9fbcca,
-  0x19cbe325, 0xcca73c1e, 0x19c1cee9, 0xccaebd6e,
-  0x19b7bc27, 0xccb640b8, 0x19adaadf, 0xccbdc5fc,
-  0x19a39b11, 0xccc54d3a, 0x19998cbe, 0xccccd671,
-  0x198f7fe6, 0xccd461a2, 0x19857489, 0xccdbeecc,
-  0x197b6aa8, 0xcce37def, 0x19716243, 0xcceb0f0a,
-  0x19675b5a, 0xccf2a21d, 0x195d55ef, 0xccfa3729,
-  0x19535201, 0xcd01ce2b, 0x19494f90, 0xcd096725,
-  0x193f4e9e, 0xcd110216, 0x19354f2a, 0xcd189efe,
-  0x192b5135, 0xcd203ddc, 0x192154bf, 0xcd27deb0,
-  0x191759c9, 0xcd2f817b, 0x190d6053, 0xcd37263a,
-  0x1903685d, 0xcd3eccef, 0x18f971e8, 0xcd467599,
-  0x18ef7cf4, 0xcd4e2037, 0x18e58982, 0xcd55ccca,
-  0x18db9792, 0xcd5d7b50, 0x18d1a724, 0xcd652bcb,
-  0x18c7b838, 0xcd6cde39, 0x18bdcad0, 0xcd74929a,
-  0x18b3deeb, 0xcd7c48ee, 0x18a9f48a, 0xcd840134,
-  0x18a00bae, 0xcd8bbb6d, 0x18962456, 0xcd937798,
-  0x188c3e83, 0xcd9b35b4, 0x18825a35, 0xcda2f5c2,
-  0x1878776d, 0xcdaab7c0, 0x186e962b, 0xcdb27bb0,
-  0x1864b670, 0xcdba4190, 0x185ad83c, 0xcdc20960,
-  0x1850fb8e, 0xcdc9d320, 0x18472069, 0xcdd19ed0,
-  0x183d46cc, 0xcdd96c6f, 0x18336eb7, 0xcde13bfd,
-  0x1829982b, 0xcde90d79, 0x181fc328, 0xcdf0e0e4,
-  0x1815efae, 0xcdf8b63d, 0x180c1dbf, 0xce008d84,
-  0x18024d59, 0xce0866b8, 0x17f87e7f, 0xce1041d9,
-  0x17eeb130, 0xce181ee8, 0x17e4e56c, 0xce1ffde2,
-  0x17db1b34, 0xce27dec9, 0x17d15288, 0xce2fc19c,
-  0x17c78b68, 0xce37a65b, 0x17bdc5d6, 0xce3f8d05,
-  0x17b401d1, 0xce47759a, 0x17aa3f5a, 0xce4f6019,
-  0x17a07e70, 0xce574c84, 0x1796bf16, 0xce5f3ad8,
-  0x178d014a, 0xce672b16, 0x1783450d, 0xce6f1d3d,
-  0x17798a60, 0xce77114e, 0x176fd143, 0xce7f0748,
-  0x176619b6, 0xce86ff2a, 0x175c63ba, 0xce8ef8f4,
-  0x1752af4f, 0xce96f4a7, 0x1748fc75, 0xce9ef241,
-  0x173f4b2e, 0xcea6f1c2, 0x17359b78, 0xceaef32b,
-  0x172bed55, 0xceb6f67a, 0x172240c5, 0xcebefbb0,
-  0x171895c9, 0xcec702cb, 0x170eec60, 0xcecf0bcd,
-  0x1705448b, 0xced716b4, 0x16fb9e4b, 0xcedf2380,
-  0x16f1f99f, 0xcee73231, 0x16e85689, 0xceef42c7,
-  0x16deb508, 0xcef75541, 0x16d5151d, 0xceff699f,
-  0x16cb76c9, 0xcf077fe1, 0x16c1da0b, 0xcf0f9805,
-  0x16b83ee4, 0xcf17b20d, 0x16aea555, 0xcf1fcdf8,
-  0x16a50d5d, 0xcf27ebc5, 0x169b76fe, 0xcf300b74,
-  0x1691e237, 0xcf382d05, 0x16884f09, 0xcf405077,
-  0x167ebd74, 0xcf4875ca, 0x16752d79, 0xcf509cfe,
-  0x166b9f18, 0xcf58c613, 0x16621251, 0xcf60f108,
-  0x16588725, 0xcf691ddd, 0x164efd94, 0xcf714c91,
-  0x1645759f, 0xcf797d24, 0x163bef46, 0xcf81af97,
-  0x16326a88, 0xcf89e3e8, 0x1628e767, 0xcf921a17,
-  0x161f65e4, 0xcf9a5225, 0x1615e5fd, 0xcfa28c10,
-  0x160c67b4, 0xcfaac7d8, 0x1602eb0a, 0xcfb3057d,
-  0x15f96ffd, 0xcfbb4500, 0x15eff690, 0xcfc3865e,
-  0x15e67ec1, 0xcfcbc999, 0x15dd0892, 0xcfd40eaf,
-  0x15d39403, 0xcfdc55a1, 0x15ca2115, 0xcfe49e6d,
-  0x15c0afc6, 0xcfece915, 0x15b74019, 0xcff53597,
-  0x15add20d, 0xcffd83f4, 0x15a465a3, 0xd005d42a,
-  0x159afadb, 0xd00e2639, 0x159191b5, 0xd0167a22,
-  0x15882a32, 0xd01ecfe4, 0x157ec452, 0xd027277e,
-  0x15756016, 0xd02f80f1, 0x156bfd7d, 0xd037dc3b,
-  0x15629c89, 0xd040395d, 0x15593d3a, 0xd0489856,
-  0x154fdf8f, 0xd050f926, 0x15468389, 0xd0595bcd,
-  0x153d292a, 0xd061c04a, 0x1533d070, 0xd06a269d,
-  0x152a795d, 0xd0728ec6, 0x152123f0, 0xd07af8c4,
-  0x1517d02b, 0xd0836497, 0x150e7e0d, 0xd08bd23f,
-  0x15052d97, 0xd09441bb, 0x14fbdec9, 0xd09cb30b,
-  0x14f291a4, 0xd0a5262f, 0x14e94627, 0xd0ad9b26,
-  0x14dffc54, 0xd0b611f1, 0x14d6b42b, 0xd0be8a8d,
-  0x14cd6dab, 0xd0c704fd, 0x14c428d6, 0xd0cf813e,
-  0x14bae5ab, 0xd0d7ff51, 0x14b1a42c, 0xd0e07f36,
-  0x14a86458, 0xd0e900ec, 0x149f2630, 0xd0f18472,
-  0x1495e9b3, 0xd0fa09c9, 0x148caee4, 0xd10290f0,
-  0x148375c1, 0xd10b19e7, 0x147a3e4b, 0xd113a4ad,
-  0x14710883, 0xd11c3142, 0x1467d469, 0xd124bfa6,
-  0x145ea1fd, 0xd12d4fd9, 0x14557140, 0xd135e1d9,
-  0x144c4232, 0xd13e75a8, 0x144314d3, 0xd1470b44,
-  0x1439e923, 0xd14fa2ad, 0x1430bf24, 0xd1583be2,
-  0x142796d5, 0xd160d6e5, 0x141e7037, 0xd16973b3,
-  0x14154b4a, 0xd172124d, 0x140c280e, 0xd17ab2b3,
-  0x14030684, 0xd18354e4, 0x13f9e6ad, 0xd18bf8e0,
-  0x13f0c887, 0xd1949ea6, 0x13e7ac15, 0xd19d4636,
-  0x13de9156, 0xd1a5ef90, 0x13d5784a, 0xd1ae9ab4,
-  0x13cc60f2, 0xd1b747a0, 0x13c34b4f, 0xd1bff656,
-  0x13ba3760, 0xd1c8a6d4, 0x13b12526, 0xd1d1591a,
-  0x13a814a2, 0xd1da0d28, 0x139f05d3, 0xd1e2c2fd,
-  0x1395f8ba, 0xd1eb7a9a, 0x138ced57, 0xd1f433fd,
-  0x1383e3ab, 0xd1fcef27, 0x137adbb6, 0xd205ac17,
-  0x1371d579, 0xd20e6acc, 0x1368d0f3, 0xd2172b48,
-  0x135fce26, 0xd21fed88, 0x1356cd11, 0xd228b18d,
-  0x134dcdb4, 0xd2317756, 0x1344d011, 0xd23a3ee4,
-  0x133bd427, 0xd2430835, 0x1332d9f7, 0xd24bd34a,
-  0x1329e181, 0xd254a021, 0x1320eac6, 0xd25d6ebc,
-  0x1317f5c6, 0xd2663f19, 0x130f0280, 0xd26f1138,
-  0x130610f7, 0xd277e518, 0x12fd2129, 0xd280babb,
-  0x12f43318, 0xd289921e, 0x12eb46c3, 0xd2926b41,
-  0x12e25c2b, 0xd29b4626, 0x12d97350, 0xd2a422ca,
-  0x12d08c33, 0xd2ad012e, 0x12c7a6d4, 0xd2b5e151,
-  0x12bec333, 0xd2bec333, 0x12b5e151, 0xd2c7a6d4,
-  0x12ad012e, 0xd2d08c33, 0x12a422ca, 0xd2d97350,
-  0x129b4626, 0xd2e25c2b, 0x12926b41, 0xd2eb46c3,
-  0x1289921e, 0xd2f43318, 0x1280babb, 0xd2fd2129,
-  0x1277e518, 0xd30610f7, 0x126f1138, 0xd30f0280,
-  0x12663f19, 0xd317f5c6, 0x125d6ebc, 0xd320eac6,
-  0x1254a021, 0xd329e181, 0x124bd34a, 0xd332d9f7,
-  0x12430835, 0xd33bd427, 0x123a3ee4, 0xd344d011,
-  0x12317756, 0xd34dcdb4, 0x1228b18d, 0xd356cd11,
-  0x121fed88, 0xd35fce26, 0x12172b48, 0xd368d0f3,
-  0x120e6acc, 0xd371d579, 0x1205ac17, 0xd37adbb6,
-  0x11fcef27, 0xd383e3ab, 0x11f433fd, 0xd38ced57,
-  0x11eb7a9a, 0xd395f8ba, 0x11e2c2fd, 0xd39f05d3,
-  0x11da0d28, 0xd3a814a2, 0x11d1591a, 0xd3b12526,
-  0x11c8a6d4, 0xd3ba3760, 0x11bff656, 0xd3c34b4f,
-  0x11b747a0, 0xd3cc60f2, 0x11ae9ab4, 0xd3d5784a,
-  0x11a5ef90, 0xd3de9156, 0x119d4636, 0xd3e7ac15,
-  0x11949ea6, 0xd3f0c887, 0x118bf8e0, 0xd3f9e6ad,
-  0x118354e4, 0xd4030684, 0x117ab2b3, 0xd40c280e,
-  0x1172124d, 0xd4154b4a, 0x116973b3, 0xd41e7037,
-  0x1160d6e5, 0xd42796d5, 0x11583be2, 0xd430bf24,
-  0x114fa2ad, 0xd439e923, 0x11470b44, 0xd44314d3,
-  0x113e75a8, 0xd44c4232, 0x1135e1d9, 0xd4557140,
-  0x112d4fd9, 0xd45ea1fd, 0x1124bfa6, 0xd467d469,
-  0x111c3142, 0xd4710883, 0x1113a4ad, 0xd47a3e4b,
-  0x110b19e7, 0xd48375c1, 0x110290f0, 0xd48caee4,
-  0x10fa09c9, 0xd495e9b3, 0x10f18472, 0xd49f2630,
-  0x10e900ec, 0xd4a86458, 0x10e07f36, 0xd4b1a42c,
-  0x10d7ff51, 0xd4bae5ab, 0x10cf813e, 0xd4c428d6,
-  0x10c704fd, 0xd4cd6dab, 0x10be8a8d, 0xd4d6b42b,
-  0x10b611f1, 0xd4dffc54, 0x10ad9b26, 0xd4e94627,
-  0x10a5262f, 0xd4f291a4, 0x109cb30b, 0xd4fbdec9,
-  0x109441bb, 0xd5052d97, 0x108bd23f, 0xd50e7e0d,
-  0x10836497, 0xd517d02b, 0x107af8c4, 0xd52123f0,
-  0x10728ec6, 0xd52a795d, 0x106a269d, 0xd533d070,
-  0x1061c04a, 0xd53d292a, 0x10595bcd, 0xd5468389,
-  0x1050f926, 0xd54fdf8f, 0x10489856, 0xd5593d3a,
-  0x1040395d, 0xd5629c89, 0x1037dc3b, 0xd56bfd7d,
-  0x102f80f1, 0xd5756016, 0x1027277e, 0xd57ec452,
-  0x101ecfe4, 0xd5882a32, 0x10167a22, 0xd59191b5,
-  0x100e2639, 0xd59afadb, 0x1005d42a, 0xd5a465a3,
-  0xffd83f4, 0xd5add20d, 0xff53597, 0xd5b74019,
-  0xfece915, 0xd5c0afc6, 0xfe49e6d, 0xd5ca2115,
-  0xfdc55a1, 0xd5d39403, 0xfd40eaf, 0xd5dd0892,
-  0xfcbc999, 0xd5e67ec1, 0xfc3865e, 0xd5eff690,
-  0xfbb4500, 0xd5f96ffd, 0xfb3057d, 0xd602eb0a,
-  0xfaac7d8, 0xd60c67b4, 0xfa28c10, 0xd615e5fd,
-  0xf9a5225, 0xd61f65e4, 0xf921a17, 0xd628e767,
-  0xf89e3e8, 0xd6326a88, 0xf81af97, 0xd63bef46,
-  0xf797d24, 0xd645759f, 0xf714c91, 0xd64efd94,
-  0xf691ddd, 0xd6588725, 0xf60f108, 0xd6621251,
-  0xf58c613, 0xd66b9f18, 0xf509cfe, 0xd6752d79,
-  0xf4875ca, 0xd67ebd74, 0xf405077, 0xd6884f09,
-  0xf382d05, 0xd691e237, 0xf300b74, 0xd69b76fe,
-  0xf27ebc5, 0xd6a50d5d, 0xf1fcdf8, 0xd6aea555,
-  0xf17b20d, 0xd6b83ee4, 0xf0f9805, 0xd6c1da0b,
-  0xf077fe1, 0xd6cb76c9, 0xeff699f, 0xd6d5151d,
-  0xef75541, 0xd6deb508, 0xeef42c7, 0xd6e85689,
-  0xee73231, 0xd6f1f99f, 0xedf2380, 0xd6fb9e4b,
-  0xed716b4, 0xd705448b, 0xecf0bcd, 0xd70eec60,
-  0xec702cb, 0xd71895c9, 0xebefbb0, 0xd72240c5,
-  0xeb6f67a, 0xd72bed55, 0xeaef32b, 0xd7359b78,
-  0xea6f1c2, 0xd73f4b2e, 0xe9ef241, 0xd748fc75,
-  0xe96f4a7, 0xd752af4f, 0xe8ef8f4, 0xd75c63ba,
-  0xe86ff2a, 0xd76619b6, 0xe7f0748, 0xd76fd143,
-  0xe77114e, 0xd7798a60, 0xe6f1d3d, 0xd783450d,
-  0xe672b16, 0xd78d014a, 0xe5f3ad8, 0xd796bf16,
-  0xe574c84, 0xd7a07e70, 0xe4f6019, 0xd7aa3f5a,
-  0xe47759a, 0xd7b401d1, 0xe3f8d05, 0xd7bdc5d6,
-  0xe37a65b, 0xd7c78b68, 0xe2fc19c, 0xd7d15288,
-  0xe27dec9, 0xd7db1b34, 0xe1ffde2, 0xd7e4e56c,
-  0xe181ee8, 0xd7eeb130, 0xe1041d9, 0xd7f87e7f,
-  0xe0866b8, 0xd8024d59, 0xe008d84, 0xd80c1dbf,
-  0xdf8b63d, 0xd815efae, 0xdf0e0e4, 0xd81fc328,
-  0xde90d79, 0xd829982b, 0xde13bfd, 0xd8336eb7,
-  0xdd96c6f, 0xd83d46cc, 0xdd19ed0, 0xd8472069,
-  0xdc9d320, 0xd850fb8e, 0xdc20960, 0xd85ad83c,
-  0xdba4190, 0xd864b670, 0xdb27bb0, 0xd86e962b,
-  0xdaab7c0, 0xd878776d, 0xda2f5c2, 0xd8825a35,
-  0xd9b35b4, 0xd88c3e83, 0xd937798, 0xd8962456,
-  0xd8bbb6d, 0xd8a00bae, 0xd840134, 0xd8a9f48a,
-  0xd7c48ee, 0xd8b3deeb, 0xd74929a, 0xd8bdcad0,
-  0xd6cde39, 0xd8c7b838, 0xd652bcb, 0xd8d1a724,
-  0xd5d7b50, 0xd8db9792, 0xd55ccca, 0xd8e58982,
-  0xd4e2037, 0xd8ef7cf4, 0xd467599, 0xd8f971e8,
-  0xd3eccef, 0xd903685d, 0xd37263a, 0xd90d6053,
-  0xd2f817b, 0xd91759c9, 0xd27deb0, 0xd92154bf,
-  0xd203ddc, 0xd92b5135, 0xd189efe, 0xd9354f2a,
-  0xd110216, 0xd93f4e9e, 0xd096725, 0xd9494f90,
-  0xd01ce2b, 0xd9535201, 0xcfa3729, 0xd95d55ef,
-  0xcf2a21d, 0xd9675b5a, 0xceb0f0a, 0xd9716243,
-  0xce37def, 0xd97b6aa8, 0xcdbeecc, 0xd9857489,
-  0xcd461a2, 0xd98f7fe6, 0xcccd671, 0xd9998cbe,
-  0xcc54d3a, 0xd9a39b11, 0xcbdc5fc, 0xd9adaadf,
-  0xcb640b8, 0xd9b7bc27, 0xcaebd6e, 0xd9c1cee9,
-  0xca73c1e, 0xd9cbe325, 0xc9fbcca, 0xd9d5f8d9,
-  0xc983f70, 0xd9e01006, 0xc90c412, 0xd9ea28ac,
-  0xc894aaf, 0xd9f442c9, 0xc81d349, 0xd9fe5e5e,
-  0xc7a5dde, 0xda087b69, 0xc72ea70, 0xda1299ec,
-  0xc6b78ff, 0xda1cb9e5, 0xc64098b, 0xda26db54,
-  0xc5c9c14, 0xda30fe38, 0xc55309b, 0xda3b2292,
-  0xc4dc720, 0xda454860, 0xc465fa3, 0xda4f6fa3,
-  0xc3efa25, 0xda599859, 0xc3796a5, 0xda63c284,
-  0xc303524, 0xda6dee21, 0xc28d5a3, 0xda781b31,
-  0xc217822, 0xda8249b4, 0xc1a1ca0, 0xda8c79a9,
-  0xc12c31f, 0xda96ab0f, 0xc0b6b9e, 0xdaa0dde7,
-  0xc04161e, 0xdaab122f, 0xbfcc29f, 0xdab547e8,
-  0xbf57121, 0xdabf7f11, 0xbee21a5, 0xdac9b7a9,
-  0xbe6d42b, 0xdad3f1b1, 0xbdf88b3, 0xdade2d28,
-  0xbd83f3d, 0xdae86a0d, 0xbd0f7ca, 0xdaf2a860,
-  0xbc9b25a, 0xdafce821, 0xbc26eee, 0xdb072950,
-  0xbbb2d85, 0xdb116beb, 0xbb3ee20, 0xdb1baff2,
-  0xbacb0bf, 0xdb25f566, 0xba57563, 0xdb303c46,
-  0xb9e3c0b, 0xdb3a8491, 0xb9704b9, 0xdb44ce46,
-  0xb8fcf6b, 0xdb4f1967, 0xb889c23, 0xdb5965f1,
-  0xb816ae1, 0xdb63b3e5, 0xb7a3ba5, 0xdb6e0342,
-  0xb730e70, 0xdb785409, 0xb6be341, 0xdb82a638,
-  0xb64ba19, 0xdb8cf9cf, 0xb5d92f8, 0xdb974ece,
-  0xb566ddf, 0xdba1a534, 0xb4f4acd, 0xdbabfd01,
-  0xb4829c4, 0xdbb65634, 0xb410ac3, 0xdbc0b0ce,
-  0xb39edca, 0xdbcb0cce, 0xb32d2da, 0xdbd56a32,
-  0xb2bb9f4, 0xdbdfc8fc, 0xb24a316, 0xdbea292b,
-  0xb1d8e43, 0xdbf48abd, 0xb167b79, 0xdbfeedb3,
-  0xb0f6aba, 0xdc09520d, 0xb085c05, 0xdc13b7c9,
-  0xb014f5b, 0xdc1e1ee9, 0xafa44bc, 0xdc28876a,
-  0xaf33c28, 0xdc32f14d, 0xaec35a0, 0xdc3d5c91,
-  0xae53123, 0xdc47c936, 0xade2eb3, 0xdc52373c,
-  0xad72e4f, 0xdc5ca6a2, 0xad02ff8, 0xdc671768,
-  0xac933ae, 0xdc71898d, 0xac23971, 0xdc7bfd11,
-  0xabb4141, 0xdc8671f3, 0xab44b1f, 0xdc90e834,
-  0xaad570c, 0xdc9b5fd2, 0xaa66506, 0xdca5d8cd,
-  0xa9f750f, 0xdcb05326, 0xa988727, 0xdcbacedb,
-  0xa919b4e, 0xdcc54bec, 0xa8ab184, 0xdccfca59,
-  0xa83c9ca, 0xdcda4a21, 0xa7ce420, 0xdce4cb44,
-  0xa760086, 0xdcef4dc2, 0xa6f1efc, 0xdcf9d199,
-  0xa683f83, 0xdd0456ca, 0xa61621b, 0xdd0edd55,
-  0xa5a86c4, 0xdd196538, 0xa53ad7e, 0xdd23ee74,
-  0xa4cd64b, 0xdd2e7908, 0xa460129, 0xdd3904f4,
-  0xa3f2e19, 0xdd439236, 0xa385d1d, 0xdd4e20d0,
-  0xa318e32, 0xdd58b0c0, 0xa2ac15b, 0xdd634206,
-  0xa23f698, 0xdd6dd4a2, 0xa1d2de7, 0xdd786892,
-  0xa16674b, 0xdd82fdd8, 0xa0fa2c3, 0xdd8d9472,
-  0xa08e04f, 0xdd982c60, 0xa021fef, 0xdda2c5a2,
-  0x9fb61a5, 0xddad6036, 0x9f4a570, 0xddb7fc1e,
-  0x9edeb50, 0xddc29958, 0x9e73346, 0xddcd37e4,
-  0x9e07d51, 0xddd7d7c1, 0x9d9c973, 0xdde278ef,
-  0x9d317ab, 0xdded1b6e, 0x9cc67fa, 0xddf7bf3e,
-  0x9c5ba60, 0xde02645d, 0x9bf0edd, 0xde0d0acc,
-  0x9b86572, 0xde17b28a, 0x9b1be1e, 0xde225b96,
-  0x9ab18e3, 0xde2d05f1, 0x9a475bf, 0xde37b199,
-  0x99dd4b4, 0xde425e8f, 0x99735c2, 0xde4d0cd2,
-  0x99098e9, 0xde57bc62, 0x989fe29, 0xde626d3e,
-  0x9836582, 0xde6d1f65, 0x97ccef5, 0xde77d2d8,
-  0x9763a83, 0xde828796, 0x96fa82a, 0xde8d3d9e,
-  0x96917ec, 0xde97f4f1, 0x96289c9, 0xdea2ad8d,
-  0x95bfdc1, 0xdead6773, 0x95573d4, 0xdeb822a1,
-  0x94eec03, 0xdec2df18, 0x948664d, 0xdecd9cd7,
-  0x941e2b4, 0xded85bdd, 0x93b6137, 0xdee31c2b,
-  0x934e1d6, 0xdeedddc0, 0x92e6492, 0xdef8a09b,
-  0x927e96b, 0xdf0364bc, 0x9217062, 0xdf0e2a22,
-  0x91af976, 0xdf18f0ce, 0x91484a8, 0xdf23b8be,
-  0x90e11f7, 0xdf2e81f3, 0x907a166, 0xdf394c6b,
-  0x90132f2, 0xdf441828, 0x8fac69e, 0xdf4ee527,
-  0x8f45c68, 0xdf59b369, 0x8edf452, 0xdf6482ed,
-  0x8e78e5b, 0xdf6f53b3, 0x8e12a84, 0xdf7a25ba,
-  0x8dac8cd, 0xdf84f902, 0x8d46936, 0xdf8fcd8b,
-  0x8ce0bc0, 0xdf9aa354, 0x8c7b06b, 0xdfa57a5d,
-  0x8c15736, 0xdfb052a5, 0x8bb0023, 0xdfbb2c2c,
-  0x8b4ab32, 0xdfc606f1, 0x8ae5862, 0xdfd0e2f5,
-  0x8a807b4, 0xdfdbc036, 0x8a1b928, 0xdfe69eb4,
-  0x89b6cbf, 0xdff17e70, 0x8952278, 0xdffc5f67,
-  0x88eda54, 0xe007419b, 0x8889454, 0xe012250a,
-  0x8825077, 0xe01d09b4, 0x87c0ebd, 0xe027ef99,
-  0x875cf28, 0xe032d6b8, 0x86f91b7, 0xe03dbf11,
-  0x869566a, 0xe048a8a4, 0x8631d42, 0xe053936f,
-  0x85ce63e, 0xe05e7f74, 0x856b160, 0xe0696cb0,
-  0x8507ea7, 0xe0745b24, 0x84a4e14, 0xe07f4acf,
-  0x8441fa6, 0xe08a3bb2, 0x83df35f, 0xe0952dcb,
-  0x837c93e, 0xe0a0211a, 0x831a143, 0xe0ab159e,
-  0x82b7b70, 0xe0b60b58, 0x82557c3, 0xe0c10247,
-  0x81f363d, 0xe0cbfa6a, 0x81916df, 0xe0d6f3c1,
-  0x812f9a9, 0xe0e1ee4b, 0x80cde9b, 0xe0ecea09,
-  0x806c5b5, 0xe0f7e6f9, 0x800aef7, 0xe102e51c,
-  0x7fa9a62, 0xe10de470, 0x7f487f6, 0xe118e4f6,
-  0x7ee77b3, 0xe123e6ad, 0x7e8699a, 0xe12ee995,
-  0x7e25daa, 0xe139edac, 0x7dc53e3, 0xe144f2f3,
-  0x7d64c47, 0xe14ff96a, 0x7d046d6, 0xe15b0110,
-  0x7ca438f, 0xe16609e3, 0x7c44272, 0xe17113e5,
-  0x7be4381, 0xe17c1f15, 0x7b846ba, 0xe1872b72,
-  0x7b24c20, 0xe19238fb, 0x7ac53b1, 0xe19d47b1,
-  0x7a65d6e, 0xe1a85793, 0x7a06957, 0xe1b368a0,
-  0x79a776c, 0xe1be7ad8, 0x79487ae, 0xe1c98e3b,
-  0x78e9a1d, 0xe1d4a2c8, 0x788aeb9, 0xe1dfb87f,
-  0x782c582, 0xe1eacf5f, 0x77cde79, 0xe1f5e768,
-  0x776f99d, 0xe2010099, 0x77116f0, 0xe20c1af3,
-  0x76b3671, 0xe2173674, 0x7655820, 0xe222531c,
-  0x75f7bfe, 0xe22d70eb, 0x759a20a, 0xe2388fe1,
-  0x753ca46, 0xe243affc, 0x74df4b1, 0xe24ed13d,
-  0x748214c, 0xe259f3a3, 0x7425016, 0xe265172e,
-  0x73c8111, 0xe2703bdc, 0x736b43c, 0xe27b61af,
-  0x730e997, 0xe28688a4, 0x72b2123, 0xe291b0bd,
-  0x7255ae0, 0xe29cd9f8, 0x71f96ce, 0xe2a80456,
-  0x719d4ed, 0xe2b32fd4, 0x714153e, 0xe2be5c74,
-  0x70e57c0, 0xe2c98a35, 0x7089c75, 0xe2d4b916,
-  0x702e35c, 0xe2dfe917, 0x6fd2c75, 0xe2eb1a37,
-  0x6f777c1, 0xe2f64c77, 0x6f1c540, 0xe3017fd5,
-  0x6ec14f2, 0xe30cb451, 0x6e666d7, 0xe317e9eb,
-  0x6e0baf0, 0xe32320a2, 0x6db113d, 0xe32e5876,
-  0x6d569be, 0xe3399167, 0x6cfc472, 0xe344cb73,
-  0x6ca215c, 0xe350069b, 0x6c4807a, 0xe35b42df,
-  0x6bee1cd, 0xe366803c, 0x6b94554, 0xe371beb5,
-  0x6b3ab12, 0xe37cfe47, 0x6ae1304, 0xe3883ef2,
-  0x6a87d2d, 0xe39380b6, 0x6a2e98b, 0xe39ec393,
-  0x69d5820, 0xe3aa0788, 0x697c8eb, 0xe3b54c95,
-  0x6923bec, 0xe3c092b9, 0x68cb124, 0xe3cbd9f4,
-  0x6872894, 0xe3d72245, 0x681a23a, 0xe3e26bac,
-  0x67c1e18, 0xe3edb628, 0x6769c2e, 0xe3f901ba,
-  0x6711c7b, 0xe4044e60, 0x66b9f01, 0xe40f9c1a,
-  0x66623be, 0xe41aeae8, 0x660aab5, 0xe4263ac9,
-  0x65b33e4, 0xe4318bbe, 0x655bf4c, 0xe43cddc4,
-  0x6504ced, 0xe44830dd, 0x64adcc7, 0xe4538507,
-  0x6456edb, 0xe45eda43, 0x6400329, 0xe46a308f,
-  0x63a99b1, 0xe47587eb, 0x6353273, 0xe480e057,
-  0x62fcd6f, 0xe48c39d3, 0x62a6aa6, 0xe497945d,
-  0x6250a18, 0xe4a2eff6, 0x61fabc4, 0xe4ae4c9d,
-  0x61a4fac, 0xe4b9aa52, 0x614f5cf, 0xe4c50914,
-  0x60f9e2e, 0xe4d068e2, 0x60a48c9, 0xe4dbc9bd,
-  0x604f5a0, 0xe4e72ba4, 0x5ffa4b3, 0xe4f28e96,
-  0x5fa5603, 0xe4fdf294, 0x5f5098f, 0xe509579b,
-  0x5efbf58, 0xe514bdad, 0x5ea775e, 0xe52024c9,
-  0x5e531a1, 0xe52b8cee, 0x5dfee22, 0xe536f61b,
-  0x5daace1, 0xe5426051, 0x5d56ddd, 0xe54dcb8f,
-  0x5d03118, 0xe55937d5, 0x5caf690, 0xe564a521,
-  0x5c5be47, 0xe5701374, 0x5c0883d, 0xe57b82cd,
-  0x5bb5472, 0xe586f32c, 0x5b622e6, 0xe5926490,
-  0x5b0f399, 0xe59dd6f9, 0x5abc68c, 0xe5a94a67,
-  0x5a69bbe, 0xe5b4bed8, 0x5a17330, 0xe5c0344d,
-  0x59c4ce3, 0xe5cbaac5, 0x59728d5, 0xe5d72240,
-  0x5920708, 0xe5e29abc, 0x58ce77c, 0xe5ee143b,
-  0x587ca31, 0xe5f98ebb, 0x582af26, 0xe6050a3b,
-  0x57d965d, 0xe61086bc, 0x5787fd6, 0xe61c043d,
-  0x5736b90, 0xe62782be, 0x56e598c, 0xe633023e,
-  0x56949ca, 0xe63e82bc, 0x5643c4a, 0xe64a0438,
-  0x55f310d, 0xe65586b3, 0x55a2812, 0xe6610a2a,
-  0x555215a, 0xe66c8e9f, 0x5501ce5, 0xe6781410,
-  0x54b1ab4, 0xe6839a7c, 0x5461ac6, 0xe68f21e5,
-  0x5411d1b, 0xe69aaa48, 0x53c21b4, 0xe6a633a6,
-  0x5372891, 0xe6b1bdff, 0x53231b3, 0xe6bd4951,
-  0x52d3d18, 0xe6c8d59c, 0x5284ac3, 0xe6d462e1,
-  0x5235ab2, 0xe6dff11d, 0x51e6ce6, 0xe6eb8052,
-  0x519815f, 0xe6f7107e, 0x514981d, 0xe702a1a1,
-  0x50fb121, 0xe70e33bb, 0x50acc6b, 0xe719c6cb,
-  0x505e9fb, 0xe7255ad1, 0x50109d0, 0xe730efcc,
-  0x4fc2bec, 0xe73c85bc, 0x4f7504e, 0xe7481ca1,
-  0x4f276f7, 0xe753b479, 0x4ed9fe7, 0xe75f4d45,
-  0x4e8cb1e, 0xe76ae704, 0x4e3f89c, 0xe77681b6,
-  0x4df2862, 0xe7821d59, 0x4da5a6f, 0xe78db9ef,
-  0x4d58ec3, 0xe7995776, 0x4d0c560, 0xe7a4f5ed,
-  0x4cbfe45, 0xe7b09555, 0x4c73972, 0xe7bc35ad,
-  0x4c276e8, 0xe7c7d6f4, 0x4bdb6a6, 0xe7d3792b,
-  0x4b8f8ad, 0xe7df1c50, 0x4b43cfd, 0xe7eac063,
-  0x4af8397, 0xe7f66564, 0x4aacc7a, 0xe8020b52,
-  0x4a617a6, 0xe80db22d, 0x4a1651c, 0xe81959f4,
-  0x49cb4dd, 0xe82502a7, 0x49806e7, 0xe830ac45,
-  0x4935b3c, 0xe83c56cf, 0x48eb1db, 0xe8480243,
-  0x48a0ac4, 0xe853aea1, 0x48565f9, 0xe85f5be9,
-  0x480c379, 0xe86b0a1a, 0x47c2344, 0xe876b934,
-  0x477855a, 0xe8826936, 0x472e9bc, 0xe88e1a20,
-  0x46e5069, 0xe899cbf1, 0x469b963, 0xe8a57ea9,
-  0x46524a9, 0xe8b13248, 0x460923b, 0xe8bce6cd,
-  0x45c0219, 0xe8c89c37, 0x4577444, 0xe8d45286,
-  0x452e8bc, 0xe8e009ba, 0x44e5f80, 0xe8ebc1d3,
-  0x449d892, 0xe8f77acf, 0x44553f2, 0xe90334af,
-  0x440d19e, 0xe90eef71, 0x43c5199, 0xe91aab16,
-  0x437d3e1, 0xe926679c, 0x4335877, 0xe9322505,
-  0x42edf5c, 0xe93de34e, 0x42a688f, 0xe949a278,
-  0x425f410, 0xe9556282, 0x42181e0, 0xe961236c,
-  0x41d11ff, 0xe96ce535, 0x418a46d, 0xe978a7dd,
-  0x414392b, 0xe9846b63, 0x40fd037, 0xe9902fc7,
-  0x40b6994, 0xe99bf509, 0x4070540, 0xe9a7bb28,
-  0x402a33c, 0xe9b38223, 0x3fe4388, 0xe9bf49fa,
-  0x3f9e624, 0xe9cb12ad, 0x3f58b10, 0xe9d6dc3b,
-  0x3f1324e, 0xe9e2a6a3, 0x3ecdbdc, 0xe9ee71e6,
-  0x3e887bb, 0xe9fa3e03, 0x3e435ea, 0xea060af9,
-  0x3dfe66c, 0xea11d8c8, 0x3db993e, 0xea1da770,
-  0x3d74e62, 0xea2976ef, 0x3d305d8, 0xea354746,
-  0x3cebfa0, 0xea411874, 0x3ca7bba, 0xea4cea79,
-  0x3c63a26, 0xea58bd54, 0x3c1fae5, 0xea649105,
-  0x3bdbdf6, 0xea70658a, 0x3b9835a, 0xea7c3ae5,
-  0x3b54b11, 0xea881114, 0x3b1151b, 0xea93e817,
-  0x3ace178, 0xea9fbfed, 0x3a8b028, 0xeaab9896,
-  0x3a4812c, 0xeab77212, 0x3a05484, 0xeac34c60,
-  0x39c2a2f, 0xeacf277f, 0x398022f, 0xeadb0370,
-  0x393dc82, 0xeae6e031, 0x38fb92a, 0xeaf2bdc3,
-  0x38b9827, 0xeafe9c24, 0x3877978, 0xeb0a7b54,
-  0x3835d1e, 0xeb165b54, 0x37f4319, 0xeb223c22,
-  0x37b2b6a, 0xeb2e1dbe, 0x377160f, 0xeb3a0027,
-  0x373030a, 0xeb45e35d, 0x36ef25b, 0xeb51c760,
-  0x36ae401, 0xeb5dac2f, 0x366d7fd, 0xeb6991ca,
-  0x362ce50, 0xeb75782f, 0x35ec6f8, 0xeb815f60,
-  0x35ac1f7, 0xeb8d475b, 0x356bf4d, 0xeb99301f,
-  0x352bef9, 0xeba519ad, 0x34ec0fc, 0xebb10404,
-  0x34ac556, 0xebbcef23, 0x346cc07, 0xebc8db0b,
-  0x342d510, 0xebd4c7ba, 0x33ee070, 0xebe0b52f,
-  0x33aee27, 0xebeca36c, 0x336fe37, 0xebf8926f,
-  0x333109e, 0xec048237, 0x32f255e, 0xec1072c4,
-  0x32b3c75, 0xec1c6417, 0x32755e5, 0xec28562d,
-  0x32371ae, 0xec344908, 0x31f8fcf, 0xec403ca5,
-  0x31bb049, 0xec4c3106, 0x317d31c, 0xec582629,
-  0x313f848, 0xec641c0e, 0x3101fce, 0xec7012b5,
-  0x30c49ad, 0xec7c0a1d, 0x30875e5, 0xec880245,
-  0x304a477, 0xec93fb2e, 0x300d563, 0xec9ff4d6,
-  0x2fd08a9, 0xecabef3d, 0x2f93e4a, 0xecb7ea63,
-  0x2f57644, 0xecc3e648, 0x2f1b099, 0xeccfe2ea,
-  0x2eded49, 0xecdbe04a, 0x2ea2c53, 0xece7de66,
-  0x2e66db8, 0xecf3dd3f, 0x2e2b178, 0xecffdcd4,
-  0x2def794, 0xed0bdd25, 0x2db400a, 0xed17de31,
-  0x2d78add, 0xed23dff7, 0x2d3d80a, 0xed2fe277,
-  0x2d02794, 0xed3be5b1, 0x2cc7979, 0xed47e9a5,
-  0x2c8cdbb, 0xed53ee51, 0x2c52459, 0xed5ff3b5,
-  0x2c17d52, 0xed6bf9d1, 0x2bdd8a9, 0xed7800a5,
-  0x2ba365c, 0xed84082f, 0x2b6966c, 0xed901070,
-  0x2b2f8d8, 0xed9c1967, 0x2af5da2, 0xeda82313,
-  0x2abc4c9, 0xedb42d74, 0x2a82e4d, 0xedc0388a,
-  0x2a49a2e, 0xedcc4454, 0x2a1086d, 0xedd850d2,
-  0x29d790a, 0xede45e03, 0x299ec05, 0xedf06be6,
-  0x296615d, 0xedfc7a7c, 0x292d914, 0xee0889c4,
-  0x28f5329, 0xee1499bd, 0x28bcf9c, 0xee20aa67,
-  0x2884e6e, 0xee2cbbc1, 0x284cf9f, 0xee38cdcb,
-  0x281532e, 0xee44e084, 0x27dd91c, 0xee50f3ed,
-  0x27a616a, 0xee5d0804, 0x276ec16, 0xee691cc9,
-  0x2737922, 0xee75323c, 0x270088e, 0xee81485c,
-  0x26c9a58, 0xee8d5f29, 0x2692e83, 0xee9976a1,
-  0x265c50e, 0xeea58ec6, 0x2625df8, 0xeeb1a796,
-  0x25ef943, 0xeebdc110, 0x25b96ee, 0xeec9db35,
-  0x25836f9, 0xeed5f604, 0x254d965, 0xeee2117c,
-  0x2517e31, 0xeeee2d9d, 0x24e255e, 0xeefa4a67,
-  0x24aceed, 0xef0667d9, 0x2477adc, 0xef1285f2,
-  0x244292c, 0xef1ea4b2, 0x240d9de, 0xef2ac419,
-  0x23d8cf1, 0xef36e426, 0x23a4265, 0xef4304d8,
-  0x236fa3b, 0xef4f2630, 0x233b473, 0xef5b482d,
-  0x230710d, 0xef676ace, 0x22d3009, 0xef738e12,
-  0x229f167, 0xef7fb1fa, 0x226b528, 0xef8bd685,
-  0x2237b4b, 0xef97fbb2, 0x22043d0, 0xefa42181,
-  0x21d0eb8, 0xefb047f2, 0x219dc03, 0xefbc6f03,
-  0x216abb1, 0xefc896b5, 0x2137dc2, 0xefd4bf08,
-  0x2105236, 0xefe0e7f9, 0x20d290d, 0xefed118a,
-  0x20a0248, 0xeff93bba, 0x206dde6, 0xf0056687,
-  0x203bbe8, 0xf01191f3, 0x2009c4e, 0xf01dbdfb,
-  0x1fd7f17, 0xf029eaa1, 0x1fa6445, 0xf03617e2,
-  0x1f74bd6, 0xf04245c0, 0x1f435cc, 0xf04e7438,
-  0x1f12227, 0xf05aa34c, 0x1ee10e5, 0xf066d2fa,
-  0x1eb0209, 0xf0730342, 0x1e7f591, 0xf07f3424,
-  0x1e4eb7e, 0xf08b659f, 0x1e1e3d0, 0xf09797b2,
-  0x1dede87, 0xf0a3ca5d, 0x1dbdba3, 0xf0affda0,
-  0x1d8db25, 0xf0bc317a, 0x1d5dd0c, 0xf0c865ea,
-  0x1d2e158, 0xf0d49af1, 0x1cfe80a, 0xf0e0d08d,
-  0x1ccf122, 0xf0ed06bf, 0x1c9fca0, 0xf0f93d86,
-  0x1c70a84, 0xf10574e0, 0x1c41ace, 0xf111accf,
-  0x1c12d7e, 0xf11de551, 0x1be4294, 0xf12a1e66,
-  0x1bb5a11, 0xf136580d, 0x1b873f5, 0xf1429247,
-  0x1b5903f, 0xf14ecd11, 0x1b2aef0, 0xf15b086d,
-  0x1afd007, 0xf1674459, 0x1acf386, 0xf17380d6,
-  0x1aa196c, 0xf17fbde2, 0x1a741b9, 0xf18bfb7d,
-  0x1a46c6e, 0xf19839a6, 0x1a1998a, 0xf1a4785e,
-  0x19ec90d, 0xf1b0b7a4, 0x19bfaf9, 0xf1bcf777,
-  0x1992f4c, 0xf1c937d6, 0x1966606, 0xf1d578c2,
-  0x1939f29, 0xf1e1ba3a, 0x190dab4, 0xf1edfc3d,
-  0x18e18a7, 0xf1fa3ecb, 0x18b5903, 0xf20681e3,
-  0x1889bc6, 0xf212c585, 0x185e0f3, 0xf21f09b1,
-  0x1832888, 0xf22b4e66, 0x1807285, 0xf23793a3,
-  0x17dbeec, 0xf243d968, 0x17b0dbb, 0xf2501fb5,
-  0x1785ef4, 0xf25c6688, 0x175b296, 0xf268ade3,
-  0x17308a1, 0xf274f5c3, 0x1706115, 0xf2813e2a,
-  0x16dbbf3, 0xf28d8715, 0x16b193a, 0xf299d085,
-  0x16878eb, 0xf2a61a7a, 0x165db05, 0xf2b264f2,
-  0x1633f8a, 0xf2beafed, 0x160a678, 0xf2cafb6b,
-  0x15e0fd1, 0xf2d7476c, 0x15b7b94, 0xf2e393ef,
-  0x158e9c1, 0xf2efe0f2, 0x1565a58, 0xf2fc2e77,
-  0x153cd5a, 0xf3087c7d, 0x15142c6, 0xf314cb02,
-  0x14eba9d, 0xf3211a07, 0x14c34df, 0xf32d698a,
-  0x149b18b, 0xf339b98d, 0x14730a3, 0xf3460a0d,
-  0x144b225, 0xf3525b0b, 0x1423613, 0xf35eac86,
-  0x13fbc6c, 0xf36afe7e, 0x13d4530, 0xf37750f2,
-  0x13ad060, 0xf383a3e2, 0x1385dfb, 0xf38ff74d,
-  0x135ee02, 0xf39c4b32, 0x1338075, 0xf3a89f92,
-  0x1311553, 0xf3b4f46c, 0x12eac9d, 0xf3c149bf,
-  0x12c4653, 0xf3cd9f8b, 0x129e276, 0xf3d9f5cf,
-  0x1278104, 0xf3e64c8c, 0x12521ff, 0xf3f2a3bf,
-  0x122c566, 0xf3fefb6a, 0x1206b39, 0xf40b538b,
-  0x11e1379, 0xf417ac22, 0x11bbe26, 0xf424052f,
-  0x1196b3f, 0xf4305eb0, 0x1171ac6, 0xf43cb8a7,
-  0x114ccb9, 0xf4491311, 0x1128119, 0xf4556def,
-  0x11037e6, 0xf461c940, 0x10df120, 0xf46e2504,
-  0x10bacc8, 0xf47a8139, 0x1096add, 0xf486dde1,
-  0x1072b5f, 0xf4933afa, 0x104ee4f, 0xf49f9884,
-  0x102b3ac, 0xf4abf67e, 0x1007b77, 0xf4b854e7,
-  0xfe45b0, 0xf4c4b3c0, 0xfc1257, 0xf4d11308,
-  0xf9e16b, 0xf4dd72be, 0xf7b2ee, 0xf4e9d2e3,
-  0xf586df, 0xf4f63374, 0xf35d3e, 0xf5029473,
-  0xf1360b, 0xf50ef5de, 0xef1147, 0xf51b57b5,
-  0xeceef1, 0xf527b9f7, 0xeacf09, 0xf5341ca5,
-  0xe8b190, 0xf5407fbd, 0xe69686, 0xf54ce33f,
-  0xe47deb, 0xf559472b, 0xe267be, 0xf565ab80,
-  0xe05401, 0xf572103d, 0xde42b2, 0xf57e7563,
-  0xdc33d2, 0xf58adaf0, 0xda2762, 0xf59740e5,
-  0xd81d61, 0xf5a3a740, 0xd615cf, 0xf5b00e02,
-  0xd410ad, 0xf5bc7529, 0xd20dfa, 0xf5c8dcb6,
-  0xd00db6, 0xf5d544a7, 0xce0fe3, 0xf5e1acfd,
-  0xcc147f, 0xf5ee15b7, 0xca1b8a, 0xf5fa7ed4,
-  0xc82506, 0xf606e854, 0xc630f2, 0xf6135237,
-  0xc43f4d, 0xf61fbc7b, 0xc25019, 0xf62c2721,
-  0xc06355, 0xf6389228, 0xbe7901, 0xf644fd8f,
-  0xbc911d, 0xf6516956, 0xbaabaa, 0xf65dd57d,
-  0xb8c8a7, 0xf66a4203, 0xb6e815, 0xf676aee8,
-  0xb509f3, 0xf6831c2b, 0xb32e42, 0xf68f89cb,
-  0xb15502, 0xf69bf7c9, 0xaf7e33, 0xf6a86623,
-  0xada9d4, 0xf6b4d4d9, 0xabd7e6, 0xf6c143ec,
-  0xaa086a, 0xf6cdb359, 0xa83b5e, 0xf6da2321,
-  0xa670c4, 0xf6e69344, 0xa4a89b, 0xf6f303c0,
-  0xa2e2e3, 0xf6ff7496, 0xa11f9d, 0xf70be5c4,
-  0x9f5ec8, 0xf718574b, 0x9da065, 0xf724c92a,
-  0x9be473, 0xf7313b60, 0x9a2af3, 0xf73daded,
-  0x9873e4, 0xf74a20d0, 0x96bf48, 0xf756940a,
-  0x950d1d, 0xf7630799, 0x935d64, 0xf76f7b7d,
-  0x91b01d, 0xf77befb5, 0x900548, 0xf7886442,
-  0x8e5ce5, 0xf794d922, 0x8cb6f5, 0xf7a14e55,
-  0x8b1376, 0xf7adc3db, 0x89726a, 0xf7ba39b3,
-  0x87d3d0, 0xf7c6afdc, 0x8637a9, 0xf7d32657,
-  0x849df4, 0xf7df9d22, 0x8306b2, 0xf7ec143e,
-  0x8171e2, 0xf7f88ba9, 0x7fdf85, 0xf8050364,
-  0x7e4f9b, 0xf8117b6d, 0x7cc223, 0xf81df3c5,
-  0x7b371e, 0xf82a6c6a, 0x79ae8c, 0xf836e55d,
-  0x78286e, 0xf8435e9d, 0x76a4c2, 0xf84fd829,
-  0x752389, 0xf85c5201, 0x73a4c3, 0xf868cc24,
-  0x722871, 0xf8754692, 0x70ae92, 0xf881c14b,
-  0x6f3726, 0xf88e3c4d, 0x6dc22e, 0xf89ab799,
-  0x6c4fa8, 0xf8a7332e, 0x6adf97, 0xf8b3af0c,
-  0x6971f9, 0xf8c02b31, 0x6806ce, 0xf8cca79e,
-  0x669e18, 0xf8d92452, 0x6537d4, 0xf8e5a14d,
-  0x63d405, 0xf8f21e8e, 0x6272aa, 0xf8fe9c15,
-  0x6113c2, 0xf90b19e0, 0x5fb74e, 0xf91797f0,
-  0x5e5d4e, 0xf9241645, 0x5d05c3, 0xf93094dd,
-  0x5bb0ab, 0xf93d13b8, 0x5a5e07, 0xf94992d7,
-  0x590dd8, 0xf9561237, 0x57c01d, 0xf96291d9,
-  0x5674d6, 0xf96f11bc, 0x552c03, 0xf97b91e1,
-  0x53e5a5, 0xf9881245, 0x52a1bb, 0xf99492ea,
-  0x516045, 0xf9a113cd, 0x502145, 0xf9ad94f0,
-  0x4ee4b8, 0xf9ba1651, 0x4daaa1, 0xf9c697f0,
-  0x4c72fe, 0xf9d319cc, 0x4b3dcf, 0xf9df9be6,
-  0x4a0b16, 0xf9ec1e3b, 0x48dad1, 0xf9f8a0cd,
-  0x47ad01, 0xfa05239a, 0x4681a6, 0xfa11a6a3,
-  0x4558c0, 0xfa1e29e5, 0x44324f, 0xfa2aad62,
-  0x430e53, 0xfa373119, 0x41eccc, 0xfa43b508,
-  0x40cdba, 0xfa503930, 0x3fb11d, 0xfa5cbd91,
-  0x3e96f6, 0xfa694229, 0x3d7f44, 0xfa75c6f8,
-  0x3c6a07, 0xfa824bfd, 0x3b573f, 0xfa8ed139,
-  0x3a46ed, 0xfa9b56ab, 0x393910, 0xfaa7dc52,
-  0x382da8, 0xfab4622d, 0x3724b6, 0xfac0e83d,
-  0x361e3a, 0xfacd6e81, 0x351a33, 0xfad9f4f8,
-  0x3418a2, 0xfae67ba2, 0x331986, 0xfaf3027e,
-  0x321ce0, 0xfaff898c, 0x3122b0, 0xfb0c10cb,
-  0x302af5, 0xfb18983b, 0x2f35b1, 0xfb251fdc,
-  0x2e42e2, 0xfb31a7ac, 0x2d5289, 0xfb3e2fac,
-  0x2c64a6, 0xfb4ab7db, 0x2b7939, 0xfb574039,
-  0x2a9042, 0xfb63c8c4, 0x29a9c1, 0xfb70517d,
-  0x28c5b6, 0xfb7cda63, 0x27e421, 0xfb896375,
-  0x270502, 0xfb95ecb4, 0x262859, 0xfba2761e,
-  0x254e27, 0xfbaeffb3, 0x24766a, 0xfbbb8973,
-  0x23a124, 0xfbc8135c, 0x22ce54, 0xfbd49d70,
-  0x21fdfb, 0xfbe127ac, 0x213018, 0xfbedb212,
-  0x2064ab, 0xfbfa3c9f, 0x1f9bb5, 0xfc06c754,
-  0x1ed535, 0xfc135231, 0x1e112b, 0xfc1fdd34,
-  0x1d4f99, 0xfc2c685d, 0x1c907c, 0xfc38f3ac,
-  0x1bd3d6, 0xfc457f21, 0x1b19a7, 0xfc520aba,
-  0x1a61ee, 0xfc5e9678, 0x19acac, 0xfc6b2259,
-  0x18f9e1, 0xfc77ae5e, 0x18498c, 0xfc843a85,
-  0x179bae, 0xfc90c6cf, 0x16f047, 0xfc9d533b,
-  0x164757, 0xfca9dfc8, 0x15a0dd, 0xfcb66c77,
-  0x14fcda, 0xfcc2f945, 0x145b4e, 0xfccf8634,
-  0x13bc39, 0xfcdc1342, 0x131f9b, 0xfce8a06f,
-  0x128574, 0xfcf52dbb, 0x11edc3, 0xfd01bb24,
-  0x11588a, 0xfd0e48ab, 0x10c5c7, 0xfd1ad650,
-  0x10357c, 0xfd276410, 0xfa7a8, 0xfd33f1ed,
-  0xf1c4a, 0xfd407fe6, 0xe9364, 0xfd4d0df9,
-  0xe0cf5, 0xfd599c28, 0xd88fd, 0xfd662a70,
-  0xd077c, 0xfd72b8d2, 0xc8872, 0xfd7f474d,
-  0xc0be0, 0xfd8bd5e1, 0xb91c4, 0xfd98648d,
-  0xb1a20, 0xfda4f351, 0xaa4f3, 0xfdb1822c,
-  0xa323d, 0xfdbe111e, 0x9c1ff, 0xfdcaa027,
-  0x95438, 0xfdd72f45, 0x8e8e8, 0xfde3be78,
-  0x8800f, 0xfdf04dc0, 0x819ae, 0xfdfcdd1d,
-  0x7b5c4, 0xfe096c8d, 0x75452, 0xfe15fc11,
-  0x6f556, 0xfe228ba7, 0x698d3, 0xfe2f1b50,
-  0x63ec6, 0xfe3bab0b, 0x5e731, 0xfe483ad8,
-  0x59214, 0xfe54cab5, 0x53f6e, 0xfe615aa3,
-  0x4ef3f, 0xfe6deaa1, 0x4a188, 0xfe7a7aae,
-  0x45648, 0xfe870aca, 0x40d80, 0xfe939af5,
-  0x3c72f, 0xfea02b2e, 0x38356, 0xfeacbb74,
-  0x341f4, 0xfeb94bc8, 0x3030a, 0xfec5dc28,
-  0x2c697, 0xfed26c94, 0x28c9c, 0xfedefd0c,
-  0x25519, 0xfeeb8d8f, 0x2200d, 0xfef81e1d,
-  0x1ed78, 0xff04aeb5, 0x1bd5c, 0xff113f56,
-  0x18fb6, 0xff1dd001, 0x16489, 0xff2a60b4,
-  0x13bd3, 0xff36f170, 0x11594, 0xff438234,
-  0xf1ce, 0xff5012fe, 0xd07e, 0xff5ca3d0,
-  0xb1a7, 0xff6934a8, 0x9547, 0xff75c585,
-  0x7b5f, 0xff825668, 0x63ee, 0xff8ee750,
-  0x4ef5, 0xff9b783c, 0x3c74, 0xffa8092c,
-  0x2c6a, 0xffb49a1f, 0x1ed8, 0xffc12b16,
-  0x13bd, 0xffcdbc0f, 0xb1a, 0xffda4d09,
-  0x4ef, 0xffe6de05, 0x13c, 0xfff36f02,
-  0x0, 0x0, 0x13c, 0xc90fe,
-  0x4ef, 0x1921fb, 0xb1a, 0x25b2f7,
-  0x13bd, 0x3243f1, 0x1ed8, 0x3ed4ea,
-  0x2c6a, 0x4b65e1, 0x3c74, 0x57f6d4,
-  0x4ef5, 0x6487c4, 0x63ee, 0x7118b0,
-  0x7b5f, 0x7da998, 0x9547, 0x8a3a7b,
-  0xb1a7, 0x96cb58, 0xd07e, 0xa35c30,
-  0xf1ce, 0xafed02, 0x11594, 0xbc7dcc,
-  0x13bd3, 0xc90e90, 0x16489, 0xd59f4c,
-  0x18fb6, 0xe22fff, 0x1bd5c, 0xeec0aa,
-  0x1ed78, 0xfb514b, 0x2200d, 0x107e1e3,
-  0x25519, 0x1147271, 0x28c9c, 0x12102f4,
-  0x2c697, 0x12d936c, 0x3030a, 0x13a23d8,
-  0x341f4, 0x146b438, 0x38356, 0x153448c,
-  0x3c72f, 0x15fd4d2, 0x40d80, 0x16c650b,
-  0x45648, 0x178f536, 0x4a188, 0x1858552,
-  0x4ef3f, 0x192155f, 0x53f6e, 0x19ea55d,
-  0x59214, 0x1ab354b, 0x5e731, 0x1b7c528,
-  0x63ec6, 0x1c454f5, 0x698d3, 0x1d0e4b0,
-  0x6f556, 0x1dd7459, 0x75452, 0x1ea03ef,
-  0x7b5c4, 0x1f69373, 0x819ae, 0x20322e3,
-  0x8800f, 0x20fb240, 0x8e8e8, 0x21c4188,
-  0x95438, 0x228d0bb, 0x9c1ff, 0x2355fd9,
-  0xa323d, 0x241eee2, 0xaa4f3, 0x24e7dd4,
-  0xb1a20, 0x25b0caf, 0xb91c4, 0x2679b73,
-  0xc0be0, 0x2742a1f, 0xc8872, 0x280b8b3,
-  0xd077c, 0x28d472e, 0xd88fd, 0x299d590,
-  0xe0cf5, 0x2a663d8, 0xe9364, 0x2b2f207,
-  0xf1c4a, 0x2bf801a, 0xfa7a8, 0x2cc0e13,
-  0x10357c, 0x2d89bf0, 0x10c5c7, 0x2e529b0,
-  0x11588a, 0x2f1b755, 0x11edc3, 0x2fe44dc,
-  0x128574, 0x30ad245, 0x131f9b, 0x3175f91,
-  0x13bc39, 0x323ecbe, 0x145b4e, 0x33079cc,
-  0x14fcda, 0x33d06bb, 0x15a0dd, 0x3499389,
-  0x164757, 0x3562038, 0x16f047, 0x362acc5,
-  0x179bae, 0x36f3931, 0x18498c, 0x37bc57b,
-  0x18f9e1, 0x38851a2, 0x19acac, 0x394dda7,
-  0x1a61ee, 0x3a16988, 0x1b19a7, 0x3adf546,
-  0x1bd3d6, 0x3ba80df, 0x1c907c, 0x3c70c54,
-  0x1d4f99, 0x3d397a3, 0x1e112b, 0x3e022cc,
-  0x1ed535, 0x3ecadcf, 0x1f9bb5, 0x3f938ac,
-  0x2064ab, 0x405c361, 0x213018, 0x4124dee,
-  0x21fdfb, 0x41ed854, 0x22ce54, 0x42b6290,
-  0x23a124, 0x437eca4, 0x24766a, 0x444768d,
-  0x254e27, 0x451004d, 0x262859, 0x45d89e2,
-  0x270502, 0x46a134c, 0x27e421, 0x4769c8b,
-  0x28c5b6, 0x483259d, 0x29a9c1, 0x48fae83,
-  0x2a9042, 0x49c373c, 0x2b7939, 0x4a8bfc7,
-  0x2c64a6, 0x4b54825, 0x2d5289, 0x4c1d054,
-  0x2e42e2, 0x4ce5854, 0x2f35b1, 0x4dae024,
-  0x302af5, 0x4e767c5, 0x3122b0, 0x4f3ef35,
-  0x321ce0, 0x5007674, 0x331986, 0x50cfd82,
-  0x3418a2, 0x519845e, 0x351a33, 0x5260b08,
-  0x361e3a, 0x532917f, 0x3724b6, 0x53f17c3,
-  0x382da8, 0x54b9dd3, 0x393910, 0x55823ae,
-  0x3a46ed, 0x564a955, 0x3b573f, 0x5712ec7,
-  0x3c6a07, 0x57db403, 0x3d7f44, 0x58a3908,
-  0x3e96f6, 0x596bdd7, 0x3fb11d, 0x5a3426f,
-  0x40cdba, 0x5afc6d0, 0x41eccc, 0x5bc4af8,
-  0x430e53, 0x5c8cee7, 0x44324f, 0x5d5529e,
-  0x4558c0, 0x5e1d61b, 0x4681a6, 0x5ee595d,
-  0x47ad01, 0x5fadc66, 0x48dad1, 0x6075f33,
-  0x4a0b16, 0x613e1c5, 0x4b3dcf, 0x620641a,
-  0x4c72fe, 0x62ce634, 0x4daaa1, 0x6396810,
-  0x4ee4b8, 0x645e9af, 0x502145, 0x6526b10,
-  0x516045, 0x65eec33, 0x52a1bb, 0x66b6d16,
-  0x53e5a5, 0x677edbb, 0x552c03, 0x6846e1f,
-  0x5674d6, 0x690ee44, 0x57c01d, 0x69d6e27,
-  0x590dd8, 0x6a9edc9, 0x5a5e07, 0x6b66d29,
-  0x5bb0ab, 0x6c2ec48, 0x5d05c3, 0x6cf6b23,
-  0x5e5d4e, 0x6dbe9bb, 0x5fb74e, 0x6e86810,
-  0x6113c2, 0x6f4e620, 0x6272aa, 0x70163eb,
-  0x63d405, 0x70de172, 0x6537d4, 0x71a5eb3,
-  0x669e18, 0x726dbae, 0x6806ce, 0x7335862,
-  0x6971f9, 0x73fd4cf, 0x6adf97, 0x74c50f4,
-  0x6c4fa8, 0x758ccd2, 0x6dc22e, 0x7654867,
-  0x6f3726, 0x771c3b3, 0x70ae92, 0x77e3eb5,
-  0x722871, 0x78ab96e, 0x73a4c3, 0x79733dc,
-  0x752389, 0x7a3adff, 0x76a4c2, 0x7b027d7,
-  0x78286e, 0x7bca163, 0x79ae8c, 0x7c91aa3,
-  0x7b371e, 0x7d59396, 0x7cc223, 0x7e20c3b,
-  0x7e4f9b, 0x7ee8493, 0x7fdf85, 0x7fafc9c,
-  0x8171e2, 0x8077457, 0x8306b2, 0x813ebc2,
-  0x849df4, 0x82062de, 0x8637a9, 0x82cd9a9,
-  0x87d3d0, 0x8395024, 0x89726a, 0x845c64d,
-  0x8b1376, 0x8523c25, 0x8cb6f5, 0x85eb1ab,
-  0x8e5ce5, 0x86b26de, 0x900548, 0x8779bbe,
-  0x91b01d, 0x884104b, 0x935d64, 0x8908483,
-  0x950d1d, 0x89cf867, 0x96bf48, 0x8a96bf6,
-  0x9873e4, 0x8b5df30, 0x9a2af3, 0x8c25213,
-  0x9be473, 0x8cec4a0, 0x9da065, 0x8db36d6,
-  0x9f5ec8, 0x8e7a8b5, 0xa11f9d, 0x8f41a3c,
-  0xa2e2e3, 0x9008b6a, 0xa4a89b, 0x90cfc40,
-  0xa670c4, 0x9196cbc, 0xa83b5e, 0x925dcdf,
-  0xaa086a, 0x9324ca7, 0xabd7e6, 0x93ebc14,
-  0xada9d4, 0x94b2b27, 0xaf7e33, 0x95799dd,
-  0xb15502, 0x9640837, 0xb32e42, 0x9707635,
-  0xb509f3, 0x97ce3d5, 0xb6e815, 0x9895118,
-  0xb8c8a7, 0x995bdfd, 0xbaabaa, 0x9a22a83,
-  0xbc911d, 0x9ae96aa, 0xbe7901, 0x9bb0271,
-  0xc06355, 0x9c76dd8, 0xc25019, 0x9d3d8df,
-  0xc43f4d, 0x9e04385, 0xc630f2, 0x9ecadc9,
-  0xc82506, 0x9f917ac, 0xca1b8a, 0xa05812c,
-  0xcc147f, 0xa11ea49, 0xce0fe3, 0xa1e5303,
-  0xd00db6, 0xa2abb59, 0xd20dfa, 0xa37234a,
-  0xd410ad, 0xa438ad7, 0xd615cf, 0xa4ff1fe,
-  0xd81d61, 0xa5c58c0, 0xda2762, 0xa68bf1b,
-  0xdc33d2, 0xa752510, 0xde42b2, 0xa818a9d,
-  0xe05401, 0xa8defc3, 0xe267be, 0xa9a5480,
-  0xe47deb, 0xaa6b8d5, 0xe69686, 0xab31cc1,
-  0xe8b190, 0xabf8043, 0xeacf09, 0xacbe35b,
-  0xeceef1, 0xad84609, 0xef1147, 0xae4a84b,
-  0xf1360b, 0xaf10a22, 0xf35d3e, 0xafd6b8d,
-  0xf586df, 0xb09cc8c, 0xf7b2ee, 0xb162d1d,
-  0xf9e16b, 0xb228d42, 0xfc1257, 0xb2eecf8,
-  0xfe45b0, 0xb3b4c40, 0x1007b77, 0xb47ab19,
-  0x102b3ac, 0xb540982, 0x104ee4f, 0xb60677c,
-  0x1072b5f, 0xb6cc506, 0x1096add, 0xb79221f,
-  0x10bacc8, 0xb857ec7, 0x10df120, 0xb91dafc,
-  0x11037e6, 0xb9e36c0, 0x1128119, 0xbaa9211,
-  0x114ccb9, 0xbb6ecef, 0x1171ac6, 0xbc34759,
-  0x1196b3f, 0xbcfa150, 0x11bbe26, 0xbdbfad1,
-  0x11e1379, 0xbe853de, 0x1206b39, 0xbf4ac75,
-  0x122c566, 0xc010496, 0x12521ff, 0xc0d5c41,
-  0x1278104, 0xc19b374, 0x129e276, 0xc260a31,
-  0x12c4653, 0xc326075, 0x12eac9d, 0xc3eb641,
-  0x1311553, 0xc4b0b94, 0x1338075, 0xc57606e,
-  0x135ee02, 0xc63b4ce, 0x1385dfb, 0xc7008b3,
-  0x13ad060, 0xc7c5c1e, 0x13d4530, 0xc88af0e,
-  0x13fbc6c, 0xc950182, 0x1423613, 0xca1537a,
-  0x144b225, 0xcada4f5, 0x14730a3, 0xcb9f5f3,
-  0x149b18b, 0xcc64673, 0x14c34df, 0xcd29676,
-  0x14eba9d, 0xcdee5f9, 0x15142c6, 0xceb34fe,
-  0x153cd5a, 0xcf78383, 0x1565a58, 0xd03d189,
-  0x158e9c1, 0xd101f0e, 0x15b7b94, 0xd1c6c11,
-  0x15e0fd1, 0xd28b894, 0x160a678, 0xd350495,
-  0x1633f8a, 0xd415013, 0x165db05, 0xd4d9b0e,
-  0x16878eb, 0xd59e586, 0x16b193a, 0xd662f7b,
-  0x16dbbf3, 0xd7278eb, 0x1706115, 0xd7ec1d6,
-  0x17308a1, 0xd8b0a3d, 0x175b296, 0xd97521d,
-  0x1785ef4, 0xda39978, 0x17b0dbb, 0xdafe04b,
-  0x17dbeec, 0xdbc2698, 0x1807285, 0xdc86c5d,
-  0x1832888, 0xdd4b19a, 0x185e0f3, 0xde0f64f,
-  0x1889bc6, 0xded3a7b, 0x18b5903, 0xdf97e1d,
-  0x18e18a7, 0xe05c135, 0x190dab4, 0xe1203c3,
-  0x1939f29, 0xe1e45c6, 0x1966606, 0xe2a873e,
-  0x1992f4c, 0xe36c82a, 0x19bfaf9, 0xe430889,
-  0x19ec90d, 0xe4f485c, 0x1a1998a, 0xe5b87a2,
-  0x1a46c6e, 0xe67c65a, 0x1a741b9, 0xe740483,
-  0x1aa196c, 0xe80421e, 0x1acf386, 0xe8c7f2a,
-  0x1afd007, 0xe98bba7, 0x1b2aef0, 0xea4f793,
-  0x1b5903f, 0xeb132ef, 0x1b873f5, 0xebd6db9,
-  0x1bb5a11, 0xec9a7f3, 0x1be4294, 0xed5e19a,
-  0x1c12d7e, 0xee21aaf, 0x1c41ace, 0xeee5331,
-  0x1c70a84, 0xefa8b20, 0x1c9fca0, 0xf06c27a,
-  0x1ccf122, 0xf12f941, 0x1cfe80a, 0xf1f2f73,
-  0x1d2e158, 0xf2b650f, 0x1d5dd0c, 0xf379a16,
-  0x1d8db25, 0xf43ce86, 0x1dbdba3, 0xf500260,
-  0x1dede87, 0xf5c35a3, 0x1e1e3d0, 0xf68684e,
-  0x1e4eb7e, 0xf749a61, 0x1e7f591, 0xf80cbdc,
-  0x1eb0209, 0xf8cfcbe, 0x1ee10e5, 0xf992d06,
-  0x1f12227, 0xfa55cb4, 0x1f435cc, 0xfb18bc8,
-  0x1f74bd6, 0xfbdba40, 0x1fa6445, 0xfc9e81e,
-  0x1fd7f17, 0xfd6155f, 0x2009c4e, 0xfe24205,
-  0x203bbe8, 0xfee6e0d, 0x206dde6, 0xffa9979,
-  0x20a0248, 0x1006c446, 0x20d290d, 0x1012ee76,
-  0x2105236, 0x101f1807, 0x2137dc2, 0x102b40f8,
-  0x216abb1, 0x1037694b, 0x219dc03, 0x104390fd,
-  0x21d0eb8, 0x104fb80e, 0x22043d0, 0x105bde7f,
-  0x2237b4b, 0x1068044e, 0x226b528, 0x1074297b,
-  0x229f167, 0x10804e06, 0x22d3009, 0x108c71ee,
-  0x230710d, 0x10989532, 0x233b473, 0x10a4b7d3,
-  0x236fa3b, 0x10b0d9d0, 0x23a4265, 0x10bcfb28,
-  0x23d8cf1, 0x10c91bda, 0x240d9de, 0x10d53be7,
-  0x244292c, 0x10e15b4e, 0x2477adc, 0x10ed7a0e,
-  0x24aceed, 0x10f99827, 0x24e255e, 0x1105b599,
-  0x2517e31, 0x1111d263, 0x254d965, 0x111dee84,
-  0x25836f9, 0x112a09fc, 0x25b96ee, 0x113624cb,
-  0x25ef943, 0x11423ef0, 0x2625df8, 0x114e586a,
-  0x265c50e, 0x115a713a, 0x2692e83, 0x1166895f,
-  0x26c9a58, 0x1172a0d7, 0x270088e, 0x117eb7a4,
-  0x2737922, 0x118acdc4, 0x276ec16, 0x1196e337,
-  0x27a616a, 0x11a2f7fc, 0x27dd91c, 0x11af0c13,
-  0x281532e, 0x11bb1f7c, 0x284cf9f, 0x11c73235,
-  0x2884e6e, 0x11d3443f, 0x28bcf9c, 0x11df5599,
-  0x28f5329, 0x11eb6643, 0x292d914, 0x11f7763c,
-  0x296615d, 0x12038584, 0x299ec05, 0x120f941a,
-  0x29d790a, 0x121ba1fd, 0x2a1086d, 0x1227af2e,
-  0x2a49a2e, 0x1233bbac, 0x2a82e4d, 0x123fc776,
-  0x2abc4c9, 0x124bd28c, 0x2af5da2, 0x1257dced,
-  0x2b2f8d8, 0x1263e699, 0x2b6966c, 0x126fef90,
-  0x2ba365c, 0x127bf7d1, 0x2bdd8a9, 0x1287ff5b,
-  0x2c17d52, 0x1294062f, 0x2c52459, 0x12a00c4b,
-  0x2c8cdbb, 0x12ac11af, 0x2cc7979, 0x12b8165b,
-  0x2d02794, 0x12c41a4f, 0x2d3d80a, 0x12d01d89,
-  0x2d78add, 0x12dc2009, 0x2db400a, 0x12e821cf,
-  0x2def794, 0x12f422db, 0x2e2b178, 0x1300232c,
-  0x2e66db8, 0x130c22c1, 0x2ea2c53, 0x1318219a,
-  0x2eded49, 0x13241fb6, 0x2f1b099, 0x13301d16,
-  0x2f57644, 0x133c19b8, 0x2f93e4a, 0x1348159d,
-  0x2fd08a9, 0x135410c3, 0x300d563, 0x13600b2a,
-  0x304a477, 0x136c04d2, 0x30875e5, 0x1377fdbb,
-  0x30c49ad, 0x1383f5e3, 0x3101fce, 0x138fed4b,
-  0x313f848, 0x139be3f2, 0x317d31c, 0x13a7d9d7,
-  0x31bb049, 0x13b3cefa, 0x31f8fcf, 0x13bfc35b,
-  0x32371ae, 0x13cbb6f8, 0x32755e5, 0x13d7a9d3,
-  0x32b3c75, 0x13e39be9, 0x32f255e, 0x13ef8d3c,
-  0x333109e, 0x13fb7dc9, 0x336fe37, 0x14076d91,
-  0x33aee27, 0x14135c94, 0x33ee070, 0x141f4ad1,
-  0x342d510, 0x142b3846, 0x346cc07, 0x143724f5,
-  0x34ac556, 0x144310dd, 0x34ec0fc, 0x144efbfc,
-  0x352bef9, 0x145ae653, 0x356bf4d, 0x1466cfe1,
-  0x35ac1f7, 0x1472b8a5, 0x35ec6f8, 0x147ea0a0,
-  0x362ce50, 0x148a87d1, 0x366d7fd, 0x14966e36,
-  0x36ae401, 0x14a253d1, 0x36ef25b, 0x14ae38a0,
-  0x373030a, 0x14ba1ca3, 0x377160f, 0x14c5ffd9,
-  0x37b2b6a, 0x14d1e242, 0x37f4319, 0x14ddc3de,
-  0x3835d1e, 0x14e9a4ac, 0x3877978, 0x14f584ac,
-  0x38b9827, 0x150163dc, 0x38fb92a, 0x150d423d,
-  0x393dc82, 0x15191fcf, 0x398022f, 0x1524fc90,
-  0x39c2a2f, 0x1530d881, 0x3a05484, 0x153cb3a0,
-  0x3a4812c, 0x15488dee, 0x3a8b028, 0x1554676a,
-  0x3ace178, 0x15604013, 0x3b1151b, 0x156c17e9,
-  0x3b54b11, 0x1577eeec, 0x3b9835a, 0x1583c51b,
-  0x3bdbdf6, 0x158f9a76, 0x3c1fae5, 0x159b6efb,
-  0x3c63a26, 0x15a742ac, 0x3ca7bba, 0x15b31587,
-  0x3cebfa0, 0x15bee78c, 0x3d305d8, 0x15cab8ba,
-  0x3d74e62, 0x15d68911, 0x3db993e, 0x15e25890,
-  0x3dfe66c, 0x15ee2738, 0x3e435ea, 0x15f9f507,
-  0x3e887bb, 0x1605c1fd, 0x3ecdbdc, 0x16118e1a,
-  0x3f1324e, 0x161d595d, 0x3f58b10, 0x162923c5,
-  0x3f9e624, 0x1634ed53, 0x3fe4388, 0x1640b606,
-  0x402a33c, 0x164c7ddd, 0x4070540, 0x165844d8,
-  0x40b6994, 0x16640af7, 0x40fd037, 0x166fd039,
-  0x414392b, 0x167b949d, 0x418a46d, 0x16875823,
-  0x41d11ff, 0x16931acb, 0x42181e0, 0x169edc94,
-  0x425f410, 0x16aa9d7e, 0x42a688f, 0x16b65d88,
-  0x42edf5c, 0x16c21cb2, 0x4335877, 0x16cddafb,
-  0x437d3e1, 0x16d99864, 0x43c5199, 0x16e554ea,
-  0x440d19e, 0x16f1108f, 0x44553f2, 0x16fccb51,
-  0x449d892, 0x17088531, 0x44e5f80, 0x17143e2d,
-  0x452e8bc, 0x171ff646, 0x4577444, 0x172bad7a,
-  0x45c0219, 0x173763c9, 0x460923b, 0x17431933,
-  0x46524a9, 0x174ecdb8, 0x469b963, 0x175a8157,
-  0x46e5069, 0x1766340f, 0x472e9bc, 0x1771e5e0,
-  0x477855a, 0x177d96ca, 0x47c2344, 0x178946cc,
-  0x480c379, 0x1794f5e6, 0x48565f9, 0x17a0a417,
-  0x48a0ac4, 0x17ac515f, 0x48eb1db, 0x17b7fdbd,
-  0x4935b3c, 0x17c3a931, 0x49806e7, 0x17cf53bb,
-  0x49cb4dd, 0x17dafd59, 0x4a1651c, 0x17e6a60c,
-  0x4a617a6, 0x17f24dd3, 0x4aacc7a, 0x17fdf4ae,
-  0x4af8397, 0x18099a9c, 0x4b43cfd, 0x18153f9d,
-  0x4b8f8ad, 0x1820e3b0, 0x4bdb6a6, 0x182c86d5,
-  0x4c276e8, 0x1838290c, 0x4c73972, 0x1843ca53,
-  0x4cbfe45, 0x184f6aab, 0x4d0c560, 0x185b0a13,
-  0x4d58ec3, 0x1866a88a, 0x4da5a6f, 0x18724611,
-  0x4df2862, 0x187de2a7, 0x4e3f89c, 0x18897e4a,
-  0x4e8cb1e, 0x189518fc, 0x4ed9fe7, 0x18a0b2bb,
-  0x4f276f7, 0x18ac4b87, 0x4f7504e, 0x18b7e35f,
-  0x4fc2bec, 0x18c37a44, 0x50109d0, 0x18cf1034,
-  0x505e9fb, 0x18daa52f, 0x50acc6b, 0x18e63935,
-  0x50fb121, 0x18f1cc45, 0x514981d, 0x18fd5e5f,
-  0x519815f, 0x1908ef82, 0x51e6ce6, 0x19147fae,
-  0x5235ab2, 0x19200ee3, 0x5284ac3, 0x192b9d1f,
-  0x52d3d18, 0x19372a64, 0x53231b3, 0x1942b6af,
-  0x5372891, 0x194e4201, 0x53c21b4, 0x1959cc5a,
-  0x5411d1b, 0x196555b8, 0x5461ac6, 0x1970de1b,
-  0x54b1ab4, 0x197c6584, 0x5501ce5, 0x1987ebf0,
-  0x555215a, 0x19937161, 0x55a2812, 0x199ef5d6,
-  0x55f310d, 0x19aa794d, 0x5643c4a, 0x19b5fbc8,
-  0x56949ca, 0x19c17d44, 0x56e598c, 0x19ccfdc2,
-  0x5736b90, 0x19d87d42, 0x5787fd6, 0x19e3fbc3,
-  0x57d965d, 0x19ef7944, 0x582af26, 0x19faf5c5,
-  0x587ca31, 0x1a067145, 0x58ce77c, 0x1a11ebc5,
-  0x5920708, 0x1a1d6544, 0x59728d5, 0x1a28ddc0,
-  0x59c4ce3, 0x1a34553b, 0x5a17330, 0x1a3fcbb3,
-  0x5a69bbe, 0x1a4b4128, 0x5abc68c, 0x1a56b599,
-  0x5b0f399, 0x1a622907, 0x5b622e6, 0x1a6d9b70,
-  0x5bb5472, 0x1a790cd4, 0x5c0883d, 0x1a847d33,
-  0x5c5be47, 0x1a8fec8c, 0x5caf690, 0x1a9b5adf,
-  0x5d03118, 0x1aa6c82b, 0x5d56ddd, 0x1ab23471,
-  0x5daace1, 0x1abd9faf, 0x5dfee22, 0x1ac909e5,
-  0x5e531a1, 0x1ad47312, 0x5ea775e, 0x1adfdb37,
-  0x5efbf58, 0x1aeb4253, 0x5f5098f, 0x1af6a865,
-  0x5fa5603, 0x1b020d6c, 0x5ffa4b3, 0x1b0d716a,
-  0x604f5a0, 0x1b18d45c, 0x60a48c9, 0x1b243643,
-  0x60f9e2e, 0x1b2f971e, 0x614f5cf, 0x1b3af6ec,
-  0x61a4fac, 0x1b4655ae, 0x61fabc4, 0x1b51b363,
-  0x6250a18, 0x1b5d100a, 0x62a6aa6, 0x1b686ba3,
-  0x62fcd6f, 0x1b73c62d, 0x6353273, 0x1b7f1fa9,
-  0x63a99b1, 0x1b8a7815, 0x6400329, 0x1b95cf71,
-  0x6456edb, 0x1ba125bd, 0x64adcc7, 0x1bac7af9,
-  0x6504ced, 0x1bb7cf23, 0x655bf4c, 0x1bc3223c,
-  0x65b33e4, 0x1bce7442, 0x660aab5, 0x1bd9c537,
-  0x66623be, 0x1be51518, 0x66b9f01, 0x1bf063e6,
-  0x6711c7b, 0x1bfbb1a0, 0x6769c2e, 0x1c06fe46,
-  0x67c1e18, 0x1c1249d8, 0x681a23a, 0x1c1d9454,
-  0x6872894, 0x1c28ddbb, 0x68cb124, 0x1c34260c,
-  0x6923bec, 0x1c3f6d47, 0x697c8eb, 0x1c4ab36b,
-  0x69d5820, 0x1c55f878, 0x6a2e98b, 0x1c613c6d,
-  0x6a87d2d, 0x1c6c7f4a, 0x6ae1304, 0x1c77c10e,
-  0x6b3ab12, 0x1c8301b9, 0x6b94554, 0x1c8e414b,
-  0x6bee1cd, 0x1c997fc4, 0x6c4807a, 0x1ca4bd21,
-  0x6ca215c, 0x1caff965, 0x6cfc472, 0x1cbb348d,
-  0x6d569be, 0x1cc66e99, 0x6db113d, 0x1cd1a78a,
-  0x6e0baf0, 0x1cdcdf5e, 0x6e666d7, 0x1ce81615,
-  0x6ec14f2, 0x1cf34baf, 0x6f1c540, 0x1cfe802b,
-  0x6f777c1, 0x1d09b389, 0x6fd2c75, 0x1d14e5c9,
-  0x702e35c, 0x1d2016e9, 0x7089c75, 0x1d2b46ea,
-  0x70e57c0, 0x1d3675cb, 0x714153e, 0x1d41a38c,
-  0x719d4ed, 0x1d4cd02c, 0x71f96ce, 0x1d57fbaa,
-  0x7255ae0, 0x1d632608, 0x72b2123, 0x1d6e4f43,
-  0x730e997, 0x1d79775c, 0x736b43c, 0x1d849e51,
-  0x73c8111, 0x1d8fc424, 0x7425016, 0x1d9ae8d2,
-  0x748214c, 0x1da60c5d, 0x74df4b1, 0x1db12ec3,
-  0x753ca46, 0x1dbc5004, 0x759a20a, 0x1dc7701f,
-  0x75f7bfe, 0x1dd28f15, 0x7655820, 0x1dddace4,
-  0x76b3671, 0x1de8c98c, 0x77116f0, 0x1df3e50d,
-  0x776f99d, 0x1dfeff67, 0x77cde79, 0x1e0a1898,
-  0x782c582, 0x1e1530a1, 0x788aeb9, 0x1e204781,
-  0x78e9a1d, 0x1e2b5d38, 0x79487ae, 0x1e3671c5,
-  0x79a776c, 0x1e418528, 0x7a06957, 0x1e4c9760,
-  0x7a65d6e, 0x1e57a86d, 0x7ac53b1, 0x1e62b84f,
-  0x7b24c20, 0x1e6dc705, 0x7b846ba, 0x1e78d48e,
-  0x7be4381, 0x1e83e0eb, 0x7c44272, 0x1e8eec1b,
-  0x7ca438f, 0x1e99f61d, 0x7d046d6, 0x1ea4fef0,
-  0x7d64c47, 0x1eb00696, 0x7dc53e3, 0x1ebb0d0d,
-  0x7e25daa, 0x1ec61254, 0x7e8699a, 0x1ed1166b,
-  0x7ee77b3, 0x1edc1953, 0x7f487f6, 0x1ee71b0a,
-  0x7fa9a62, 0x1ef21b90, 0x800aef7, 0x1efd1ae4,
-  0x806c5b5, 0x1f081907, 0x80cde9b, 0x1f1315f7,
-  0x812f9a9, 0x1f1e11b5, 0x81916df, 0x1f290c3f,
-  0x81f363d, 0x1f340596, 0x82557c3, 0x1f3efdb9,
-  0x82b7b70, 0x1f49f4a8, 0x831a143, 0x1f54ea62,
-  0x837c93e, 0x1f5fdee6, 0x83df35f, 0x1f6ad235,
-  0x8441fa6, 0x1f75c44e, 0x84a4e14, 0x1f80b531,
-  0x8507ea7, 0x1f8ba4dc, 0x856b160, 0x1f969350,
-  0x85ce63e, 0x1fa1808c, 0x8631d42, 0x1fac6c91,
-  0x869566a, 0x1fb7575c, 0x86f91b7, 0x1fc240ef,
-  0x875cf28, 0x1fcd2948, 0x87c0ebd, 0x1fd81067,
-  0x8825077, 0x1fe2f64c, 0x8889454, 0x1feddaf6,
-  0x88eda54, 0x1ff8be65, 0x8952278, 0x2003a099,
-  0x89b6cbf, 0x200e8190, 0x8a1b928, 0x2019614c,
-  0x8a807b4, 0x20243fca, 0x8ae5862, 0x202f1d0b,
-  0x8b4ab32, 0x2039f90f, 0x8bb0023, 0x2044d3d4,
-  0x8c15736, 0x204fad5b, 0x8c7b06b, 0x205a85a3,
-  0x8ce0bc0, 0x20655cac, 0x8d46936, 0x20703275,
-  0x8dac8cd, 0x207b06fe, 0x8e12a84, 0x2085da46,
-  0x8e78e5b, 0x2090ac4d, 0x8edf452, 0x209b7d13,
-  0x8f45c68, 0x20a64c97, 0x8fac69e, 0x20b11ad9,
-  0x90132f2, 0x20bbe7d8, 0x907a166, 0x20c6b395,
-  0x90e11f7, 0x20d17e0d, 0x91484a8, 0x20dc4742,
-  0x91af976, 0x20e70f32, 0x9217062, 0x20f1d5de,
-  0x927e96b, 0x20fc9b44, 0x92e6492, 0x21075f65,
-  0x934e1d6, 0x21122240, 0x93b6137, 0x211ce3d5,
-  0x941e2b4, 0x2127a423, 0x948664d, 0x21326329,
-  0x94eec03, 0x213d20e8, 0x95573d4, 0x2147dd5f,
-  0x95bfdc1, 0x2152988d, 0x96289c9, 0x215d5273,
-  0x96917ec, 0x21680b0f, 0x96fa82a, 0x2172c262,
-  0x9763a83, 0x217d786a, 0x97ccef5, 0x21882d28,
-  0x9836582, 0x2192e09b, 0x989fe29, 0x219d92c2,
-  0x99098e9, 0x21a8439e, 0x99735c2, 0x21b2f32e,
-  0x99dd4b4, 0x21bda171, 0x9a475bf, 0x21c84e67,
-  0x9ab18e3, 0x21d2fa0f, 0x9b1be1e, 0x21dda46a,
-  0x9b86572, 0x21e84d76, 0x9bf0edd, 0x21f2f534,
-  0x9c5ba60, 0x21fd9ba3, 0x9cc67fa, 0x220840c2,
-  0x9d317ab, 0x2212e492, 0x9d9c973, 0x221d8711,
-  0x9e07d51, 0x2228283f, 0x9e73346, 0x2232c81c,
-  0x9edeb50, 0x223d66a8, 0x9f4a570, 0x224803e2,
-  0x9fb61a5, 0x22529fca, 0xa021fef, 0x225d3a5e,
-  0xa08e04f, 0x2267d3a0, 0xa0fa2c3, 0x22726b8e,
-  0xa16674b, 0x227d0228, 0xa1d2de7, 0x2287976e,
-  0xa23f698, 0x22922b5e, 0xa2ac15b, 0x229cbdfa,
-  0xa318e32, 0x22a74f40, 0xa385d1d, 0x22b1df30,
-  0xa3f2e19, 0x22bc6dca, 0xa460129, 0x22c6fb0c,
-  0xa4cd64b, 0x22d186f8, 0xa53ad7e, 0x22dc118c,
-  0xa5a86c4, 0x22e69ac8, 0xa61621b, 0x22f122ab,
-  0xa683f83, 0x22fba936, 0xa6f1efc, 0x23062e67,
-  0xa760086, 0x2310b23e, 0xa7ce420, 0x231b34bc,
-  0xa83c9ca, 0x2325b5df, 0xa8ab184, 0x233035a7,
-  0xa919b4e, 0x233ab414, 0xa988727, 0x23453125,
-  0xa9f750f, 0x234facda, 0xaa66506, 0x235a2733,
-  0xaad570c, 0x2364a02e, 0xab44b1f, 0x236f17cc,
-  0xabb4141, 0x23798e0d, 0xac23971, 0x238402ef,
-  0xac933ae, 0x238e7673, 0xad02ff8, 0x2398e898,
-  0xad72e4f, 0x23a3595e, 0xade2eb3, 0x23adc8c4,
-  0xae53123, 0x23b836ca, 0xaec35a0, 0x23c2a36f,
-  0xaf33c28, 0x23cd0eb3, 0xafa44bc, 0x23d77896,
-  0xb014f5b, 0x23e1e117, 0xb085c05, 0x23ec4837,
-  0xb0f6aba, 0x23f6adf3, 0xb167b79, 0x2401124d,
-  0xb1d8e43, 0x240b7543, 0xb24a316, 0x2415d6d5,
-  0xb2bb9f4, 0x24203704, 0xb32d2da, 0x242a95ce,
-  0xb39edca, 0x2434f332, 0xb410ac3, 0x243f4f32,
-  0xb4829c4, 0x2449a9cc, 0xb4f4acd, 0x245402ff,
-  0xb566ddf, 0x245e5acc, 0xb5d92f8, 0x2468b132,
-  0xb64ba19, 0x24730631, 0xb6be341, 0x247d59c8,
-  0xb730e70, 0x2487abf7, 0xb7a3ba5, 0x2491fcbe,
-  0xb816ae1, 0x249c4c1b, 0xb889c23, 0x24a69a0f,
-  0xb8fcf6b, 0x24b0e699, 0xb9704b9, 0x24bb31ba,
-  0xb9e3c0b, 0x24c57b6f, 0xba57563, 0x24cfc3ba,
-  0xbacb0bf, 0x24da0a9a, 0xbb3ee20, 0x24e4500e,
-  0xbbb2d85, 0x24ee9415, 0xbc26eee, 0x24f8d6b0,
-  0xbc9b25a, 0x250317df, 0xbd0f7ca, 0x250d57a0,
-  0xbd83f3d, 0x251795f3, 0xbdf88b3, 0x2521d2d8,
-  0xbe6d42b, 0x252c0e4f, 0xbee21a5, 0x25364857,
-  0xbf57121, 0x254080ef, 0xbfcc29f, 0x254ab818,
-  0xc04161e, 0x2554edd1, 0xc0b6b9e, 0x255f2219,
-  0xc12c31f, 0x256954f1, 0xc1a1ca0, 0x25738657,
-  0xc217822, 0x257db64c, 0xc28d5a3, 0x2587e4cf,
-  0xc303524, 0x259211df, 0xc3796a5, 0x259c3d7c,
-  0xc3efa25, 0x25a667a7, 0xc465fa3, 0x25b0905d,
-  0xc4dc720, 0x25bab7a0, 0xc55309b, 0x25c4dd6e,
-  0xc5c9c14, 0x25cf01c8, 0xc64098b, 0x25d924ac,
-  0xc6b78ff, 0x25e3461b, 0xc72ea70, 0x25ed6614,
-  0xc7a5dde, 0x25f78497, 0xc81d349, 0x2601a1a2,
-  0xc894aaf, 0x260bbd37, 0xc90c412, 0x2615d754,
-  0xc983f70, 0x261feffa, 0xc9fbcca, 0x262a0727,
-  0xca73c1e, 0x26341cdb, 0xcaebd6e, 0x263e3117,
-  0xcb640b8, 0x264843d9, 0xcbdc5fc, 0x26525521,
-  0xcc54d3a, 0x265c64ef, 0xcccd671, 0x26667342,
-  0xcd461a2, 0x2670801a, 0xcdbeecc, 0x267a8b77,
-  0xce37def, 0x26849558, 0xceb0f0a, 0x268e9dbd,
-  0xcf2a21d, 0x2698a4a6, 0xcfa3729, 0x26a2aa11,
-  0xd01ce2b, 0x26acadff, 0xd096725, 0x26b6b070,
-  0xd110216, 0x26c0b162, 0xd189efe, 0x26cab0d6,
-  0xd203ddc, 0x26d4aecb, 0xd27deb0, 0x26deab41,
-  0xd2f817b, 0x26e8a637, 0xd37263a, 0x26f29fad,
-  0xd3eccef, 0x26fc97a3, 0xd467599, 0x27068e18,
-  0xd4e2037, 0x2710830c, 0xd55ccca, 0x271a767e,
-  0xd5d7b50, 0x2724686e, 0xd652bcb, 0x272e58dc,
-  0xd6cde39, 0x273847c8, 0xd74929a, 0x27423530,
-  0xd7c48ee, 0x274c2115, 0xd840134, 0x27560b76,
-  0xd8bbb6d, 0x275ff452, 0xd937798, 0x2769dbaa,
-  0xd9b35b4, 0x2773c17d, 0xda2f5c2, 0x277da5cb,
-  0xdaab7c0, 0x27878893, 0xdb27bb0, 0x279169d5,
-  0xdba4190, 0x279b4990, 0xdc20960, 0x27a527c4,
-  0xdc9d320, 0x27af0472, 0xdd19ed0, 0x27b8df97,
-  0xdd96c6f, 0x27c2b934, 0xde13bfd, 0x27cc9149,
-  0xde90d79, 0x27d667d5, 0xdf0e0e4, 0x27e03cd8,
-  0xdf8b63d, 0x27ea1052, 0xe008d84, 0x27f3e241,
-  0xe0866b8, 0x27fdb2a7, 0xe1041d9, 0x28078181,
-  0xe181ee8, 0x28114ed0, 0xe1ffde2, 0x281b1a94,
-  0xe27dec9, 0x2824e4cc, 0xe2fc19c, 0x282ead78,
-  0xe37a65b, 0x28387498, 0xe3f8d05, 0x28423a2a,
-  0xe47759a, 0x284bfe2f, 0xe4f6019, 0x2855c0a6,
-  0xe574c84, 0x285f8190, 0xe5f3ad8, 0x286940ea,
-  0xe672b16, 0x2872feb6, 0xe6f1d3d, 0x287cbaf3,
-  0xe77114e, 0x288675a0, 0xe7f0748, 0x28902ebd,
-  0xe86ff2a, 0x2899e64a, 0xe8ef8f4, 0x28a39c46,
-  0xe96f4a7, 0x28ad50b1, 0xe9ef241, 0x28b7038b,
-  0xea6f1c2, 0x28c0b4d2, 0xeaef32b, 0x28ca6488,
-  0xeb6f67a, 0x28d412ab, 0xebefbb0, 0x28ddbf3b,
-  0xec702cb, 0x28e76a37, 0xecf0bcd, 0x28f113a0,
-  0xed716b4, 0x28fabb75, 0xedf2380, 0x290461b5,
-  0xee73231, 0x290e0661, 0xeef42c7, 0x2917a977,
-  0xef75541, 0x29214af8, 0xeff699f, 0x292aeae3,
-  0xf077fe1, 0x29348937, 0xf0f9805, 0x293e25f5,
-  0xf17b20d, 0x2947c11c, 0xf1fcdf8, 0x29515aab,
-  0xf27ebc5, 0x295af2a3, 0xf300b74, 0x29648902,
-  0xf382d05, 0x296e1dc9, 0xf405077, 0x2977b0f7,
-  0xf4875ca, 0x2981428c, 0xf509cfe, 0x298ad287,
-  0xf58c613, 0x299460e8, 0xf60f108, 0x299dedaf,
-  0xf691ddd, 0x29a778db, 0xf714c91, 0x29b1026c,
-  0xf797d24, 0x29ba8a61, 0xf81af97, 0x29c410ba,
-  0xf89e3e8, 0x29cd9578, 0xf921a17, 0x29d71899,
-  0xf9a5225, 0x29e09a1c, 0xfa28c10, 0x29ea1a03,
-  0xfaac7d8, 0x29f3984c, 0xfb3057d, 0x29fd14f6,
-  0xfbb4500, 0x2a069003, 0xfc3865e, 0x2a100970,
-  0xfcbc999, 0x2a19813f, 0xfd40eaf, 0x2a22f76e,
-  0xfdc55a1, 0x2a2c6bfd, 0xfe49e6d, 0x2a35deeb,
-  0xfece915, 0x2a3f503a, 0xff53597, 0x2a48bfe7,
-  0xffd83f4, 0x2a522df3, 0x1005d42a, 0x2a5b9a5d,
-  0x100e2639, 0x2a650525, 0x10167a22, 0x2a6e6e4b,
-  0x101ecfe4, 0x2a77d5ce, 0x1027277e, 0x2a813bae,
-  0x102f80f1, 0x2a8a9fea, 0x1037dc3b, 0x2a940283,
-  0x1040395d, 0x2a9d6377, 0x10489856, 0x2aa6c2c6,
-  0x1050f926, 0x2ab02071, 0x10595bcd, 0x2ab97c77,
-  0x1061c04a, 0x2ac2d6d6, 0x106a269d, 0x2acc2f90,
-  0x10728ec6, 0x2ad586a3, 0x107af8c4, 0x2adedc10,
-  0x10836497, 0x2ae82fd5, 0x108bd23f, 0x2af181f3,
-  0x109441bb, 0x2afad269, 0x109cb30b, 0x2b042137,
-  0x10a5262f, 0x2b0d6e5c, 0x10ad9b26, 0x2b16b9d9,
-  0x10b611f1, 0x2b2003ac, 0x10be8a8d, 0x2b294bd5,
-  0x10c704fd, 0x2b329255, 0x10cf813e, 0x2b3bd72a,
-  0x10d7ff51, 0x2b451a55, 0x10e07f36, 0x2b4e5bd4,
-  0x10e900ec, 0x2b579ba8, 0x10f18472, 0x2b60d9d0,
-  0x10fa09c9, 0x2b6a164d, 0x110290f0, 0x2b73511c,
-  0x110b19e7, 0x2b7c8a3f, 0x1113a4ad, 0x2b85c1b5,
-  0x111c3142, 0x2b8ef77d, 0x1124bfa6, 0x2b982b97,
-  0x112d4fd9, 0x2ba15e03, 0x1135e1d9, 0x2baa8ec0,
-  0x113e75a8, 0x2bb3bdce, 0x11470b44, 0x2bbceb2d,
-  0x114fa2ad, 0x2bc616dd, 0x11583be2, 0x2bcf40dc,
-  0x1160d6e5, 0x2bd8692b, 0x116973b3, 0x2be18fc9,
-  0x1172124d, 0x2beab4b6, 0x117ab2b3, 0x2bf3d7f2,
-  0x118354e4, 0x2bfcf97c, 0x118bf8e0, 0x2c061953,
-  0x11949ea6, 0x2c0f3779, 0x119d4636, 0x2c1853eb,
-  0x11a5ef90, 0x2c216eaa, 0x11ae9ab4, 0x2c2a87b6,
-  0x11b747a0, 0x2c339f0e, 0x11bff656, 0x2c3cb4b1,
-  0x11c8a6d4, 0x2c45c8a0, 0x11d1591a, 0x2c4edada,
-  0x11da0d28, 0x2c57eb5e, 0x11e2c2fd, 0x2c60fa2d,
-  0x11eb7a9a, 0x2c6a0746, 0x11f433fd, 0x2c7312a9,
-  0x11fcef27, 0x2c7c1c55, 0x1205ac17, 0x2c85244a,
-  0x120e6acc, 0x2c8e2a87, 0x12172b48, 0x2c972f0d,
-  0x121fed88, 0x2ca031da, 0x1228b18d, 0x2ca932ef,
-  0x12317756, 0x2cb2324c, 0x123a3ee4, 0x2cbb2fef,
-  0x12430835, 0x2cc42bd9, 0x124bd34a, 0x2ccd2609,
-  0x1254a021, 0x2cd61e7f, 0x125d6ebc, 0x2cdf153a,
-  0x12663f19, 0x2ce80a3a, 0x126f1138, 0x2cf0fd80,
-  0x1277e518, 0x2cf9ef09, 0x1280babb, 0x2d02ded7,
-  0x1289921e, 0x2d0bcce8, 0x12926b41, 0x2d14b93d,
-  0x129b4626, 0x2d1da3d5, 0x12a422ca, 0x2d268cb0,
-  0x12ad012e, 0x2d2f73cd, 0x12b5e151, 0x2d38592c,
-  0x12bec333, 0x2d413ccd, 0x12c7a6d4, 0x2d4a1eaf,
-  0x12d08c33, 0x2d52fed2, 0x12d97350, 0x2d5bdd36,
-  0x12e25c2b, 0x2d64b9da, 0x12eb46c3, 0x2d6d94bf,
-  0x12f43318, 0x2d766de2, 0x12fd2129, 0x2d7f4545,
-  0x130610f7, 0x2d881ae8, 0x130f0280, 0x2d90eec8,
-  0x1317f5c6, 0x2d99c0e7, 0x1320eac6, 0x2da29144,
-  0x1329e181, 0x2dab5fdf, 0x1332d9f7, 0x2db42cb6,
-  0x133bd427, 0x2dbcf7cb, 0x1344d011, 0x2dc5c11c,
-  0x134dcdb4, 0x2dce88aa, 0x1356cd11, 0x2dd74e73,
-  0x135fce26, 0x2de01278, 0x1368d0f3, 0x2de8d4b8,
-  0x1371d579, 0x2df19534, 0x137adbb6, 0x2dfa53e9,
-  0x1383e3ab, 0x2e0310d9, 0x138ced57, 0x2e0bcc03,
-  0x1395f8ba, 0x2e148566, 0x139f05d3, 0x2e1d3d03,
-  0x13a814a2, 0x2e25f2d8, 0x13b12526, 0x2e2ea6e6,
-  0x13ba3760, 0x2e37592c, 0x13c34b4f, 0x2e4009aa,
-  0x13cc60f2, 0x2e48b860, 0x13d5784a, 0x2e51654c,
-  0x13de9156, 0x2e5a1070, 0x13e7ac15, 0x2e62b9ca,
-  0x13f0c887, 0x2e6b615a, 0x13f9e6ad, 0x2e740720,
-  0x14030684, 0x2e7cab1c, 0x140c280e, 0x2e854d4d,
-  0x14154b4a, 0x2e8dedb3, 0x141e7037, 0x2e968c4d,
-  0x142796d5, 0x2e9f291b, 0x1430bf24, 0x2ea7c41e,
-  0x1439e923, 0x2eb05d53, 0x144314d3, 0x2eb8f4bc,
-  0x144c4232, 0x2ec18a58, 0x14557140, 0x2eca1e27,
-  0x145ea1fd, 0x2ed2b027, 0x1467d469, 0x2edb405a,
-  0x14710883, 0x2ee3cebe, 0x147a3e4b, 0x2eec5b53,
-  0x148375c1, 0x2ef4e619, 0x148caee4, 0x2efd6f10,
-  0x1495e9b3, 0x2f05f637, 0x149f2630, 0x2f0e7b8e,
-  0x14a86458, 0x2f16ff14, 0x14b1a42c, 0x2f1f80ca,
-  0x14bae5ab, 0x2f2800af, 0x14c428d6, 0x2f307ec2,
-  0x14cd6dab, 0x2f38fb03, 0x14d6b42b, 0x2f417573,
-  0x14dffc54, 0x2f49ee0f, 0x14e94627, 0x2f5264da,
-  0x14f291a4, 0x2f5ad9d1, 0x14fbdec9, 0x2f634cf5,
-  0x15052d97, 0x2f6bbe45, 0x150e7e0d, 0x2f742dc1,
-  0x1517d02b, 0x2f7c9b69, 0x152123f0, 0x2f85073c,
-  0x152a795d, 0x2f8d713a, 0x1533d070, 0x2f95d963,
-  0x153d292a, 0x2f9e3fb6, 0x15468389, 0x2fa6a433,
-  0x154fdf8f, 0x2faf06da, 0x15593d3a, 0x2fb767aa,
-  0x15629c89, 0x2fbfc6a3, 0x156bfd7d, 0x2fc823c5,
-  0x15756016, 0x2fd07f0f, 0x157ec452, 0x2fd8d882,
-  0x15882a32, 0x2fe1301c, 0x159191b5, 0x2fe985de,
-  0x159afadb, 0x2ff1d9c7, 0x15a465a3, 0x2ffa2bd6,
-  0x15add20d, 0x30027c0c, 0x15b74019, 0x300aca69,
-  0x15c0afc6, 0x301316eb, 0x15ca2115, 0x301b6193,
-  0x15d39403, 0x3023aa5f, 0x15dd0892, 0x302bf151,
-  0x15e67ec1, 0x30343667, 0x15eff690, 0x303c79a2,
-  0x15f96ffd, 0x3044bb00, 0x1602eb0a, 0x304cfa83,
-  0x160c67b4, 0x30553828, 0x1615e5fd, 0x305d73f0,
-  0x161f65e4, 0x3065addb, 0x1628e767, 0x306de5e9,
-  0x16326a88, 0x30761c18, 0x163bef46, 0x307e5069,
-  0x1645759f, 0x308682dc, 0x164efd94, 0x308eb36f,
-  0x16588725, 0x3096e223, 0x16621251, 0x309f0ef8,
-  0x166b9f18, 0x30a739ed, 0x16752d79, 0x30af6302,
-  0x167ebd74, 0x30b78a36, 0x16884f09, 0x30bfaf89,
-  0x1691e237, 0x30c7d2fb, 0x169b76fe, 0x30cff48c,
-  0x16a50d5d, 0x30d8143b, 0x16aea555, 0x30e03208,
-  0x16b83ee4, 0x30e84df3, 0x16c1da0b, 0x30f067fb,
-  0x16cb76c9, 0x30f8801f, 0x16d5151d, 0x31009661,
-  0x16deb508, 0x3108aabf, 0x16e85689, 0x3110bd39,
-  0x16f1f99f, 0x3118cdcf, 0x16fb9e4b, 0x3120dc80,
-  0x1705448b, 0x3128e94c, 0x170eec60, 0x3130f433,
-  0x171895c9, 0x3138fd35, 0x172240c5, 0x31410450,
-  0x172bed55, 0x31490986, 0x17359b78, 0x31510cd5,
-  0x173f4b2e, 0x31590e3e, 0x1748fc75, 0x31610dbf,
-  0x1752af4f, 0x31690b59, 0x175c63ba, 0x3171070c,
-  0x176619b6, 0x317900d6, 0x176fd143, 0x3180f8b8,
-  0x17798a60, 0x3188eeb2, 0x1783450d, 0x3190e2c3,
-  0x178d014a, 0x3198d4ea, 0x1796bf16, 0x31a0c528,
-  0x17a07e70, 0x31a8b37c, 0x17aa3f5a, 0x31b09fe7,
-  0x17b401d1, 0x31b88a66, 0x17bdc5d6, 0x31c072fb,
-  0x17c78b68, 0x31c859a5, 0x17d15288, 0x31d03e64,
-  0x17db1b34, 0x31d82137, 0x17e4e56c, 0x31e0021e,
-  0x17eeb130, 0x31e7e118, 0x17f87e7f, 0x31efbe27,
-  0x18024d59, 0x31f79948, 0x180c1dbf, 0x31ff727c,
-  0x1815efae, 0x320749c3, 0x181fc328, 0x320f1f1c,
-  0x1829982b, 0x3216f287, 0x18336eb7, 0x321ec403,
-  0x183d46cc, 0x32269391, 0x18472069, 0x322e6130,
-  0x1850fb8e, 0x32362ce0, 0x185ad83c, 0x323df6a0,
-  0x1864b670, 0x3245be70, 0x186e962b, 0x324d8450,
-  0x1878776d, 0x32554840, 0x18825a35, 0x325d0a3e,
-  0x188c3e83, 0x3264ca4c, 0x18962456, 0x326c8868,
-  0x18a00bae, 0x32744493, 0x18a9f48a, 0x327bfecc,
-  0x18b3deeb, 0x3283b712, 0x18bdcad0, 0x328b6d66,
-  0x18c7b838, 0x329321c7, 0x18d1a724, 0x329ad435,
-  0x18db9792, 0x32a284b0, 0x18e58982, 0x32aa3336,
-  0x18ef7cf4, 0x32b1dfc9, 0x18f971e8, 0x32b98a67,
-  0x1903685d, 0x32c13311, 0x190d6053, 0x32c8d9c6,
-  0x191759c9, 0x32d07e85, 0x192154bf, 0x32d82150,
-  0x192b5135, 0x32dfc224, 0x19354f2a, 0x32e76102,
-  0x193f4e9e, 0x32eefdea, 0x19494f90, 0x32f698db,
-  0x19535201, 0x32fe31d5, 0x195d55ef, 0x3305c8d7,
-  0x19675b5a, 0x330d5de3, 0x19716243, 0x3314f0f6,
-  0x197b6aa8, 0x331c8211, 0x19857489, 0x33241134,
-  0x198f7fe6, 0x332b9e5e, 0x19998cbe, 0x3333298f,
-  0x19a39b11, 0x333ab2c6, 0x19adaadf, 0x33423a04,
-  0x19b7bc27, 0x3349bf48, 0x19c1cee9, 0x33514292,
-  0x19cbe325, 0x3358c3e2, 0x19d5f8d9, 0x33604336,
-  0x19e01006, 0x3367c090, 0x19ea28ac, 0x336f3bee,
-  0x19f442c9, 0x3376b551, 0x19fe5e5e, 0x337e2cb7,
-  0x1a087b69, 0x3385a222, 0x1a1299ec, 0x338d1590,
-  0x1a1cb9e5, 0x33948701, 0x1a26db54, 0x339bf675,
-  0x1a30fe38, 0x33a363ec, 0x1a3b2292, 0x33aacf65,
-  0x1a454860, 0x33b238e0, 0x1a4f6fa3, 0x33b9a05d,
-  0x1a599859, 0x33c105db, 0x1a63c284, 0x33c8695b,
-  0x1a6dee21, 0x33cfcadc, 0x1a781b31, 0x33d72a5d,
-  0x1a8249b4, 0x33de87de, 0x1a8c79a9, 0x33e5e360,
-  0x1a96ab0f, 0x33ed3ce1, 0x1aa0dde7, 0x33f49462,
-  0x1aab122f, 0x33fbe9e2, 0x1ab547e8, 0x34033d61,
-  0x1abf7f11, 0x340a8edf, 0x1ac9b7a9, 0x3411de5b,
-  0x1ad3f1b1, 0x34192bd5, 0x1ade2d28, 0x3420774d,
-  0x1ae86a0d, 0x3427c0c3, 0x1af2a860, 0x342f0836,
-  0x1afce821, 0x34364da6, 0x1b072950, 0x343d9112,
-  0x1b116beb, 0x3444d27b, 0x1b1baff2, 0x344c11e0,
-  0x1b25f566, 0x34534f41, 0x1b303c46, 0x345a8a9d,
-  0x1b3a8491, 0x3461c3f5, 0x1b44ce46, 0x3468fb47,
-  0x1b4f1967, 0x34703095, 0x1b5965f1, 0x347763dd,
-  0x1b63b3e5, 0x347e951f, 0x1b6e0342, 0x3485c45b,
-  0x1b785409, 0x348cf190, 0x1b82a638, 0x34941cbf,
-  0x1b8cf9cf, 0x349b45e7, 0x1b974ece, 0x34a26d08,
-  0x1ba1a534, 0x34a99221, 0x1babfd01, 0x34b0b533,
-  0x1bb65634, 0x34b7d63c, 0x1bc0b0ce, 0x34bef53d,
-  0x1bcb0cce, 0x34c61236, 0x1bd56a32, 0x34cd2d26,
-  0x1bdfc8fc, 0x34d4460c, 0x1bea292b, 0x34db5cea,
-  0x1bf48abd, 0x34e271bd, 0x1bfeedb3, 0x34e98487,
-  0x1c09520d, 0x34f09546, 0x1c13b7c9, 0x34f7a3fb,
-  0x1c1e1ee9, 0x34feb0a5, 0x1c28876a, 0x3505bb44,
-  0x1c32f14d, 0x350cc3d8, 0x1c3d5c91, 0x3513ca60,
-  0x1c47c936, 0x351acedd, 0x1c52373c, 0x3521d14d,
-  0x1c5ca6a2, 0x3528d1b1, 0x1c671768, 0x352fd008,
-  0x1c71898d, 0x3536cc52, 0x1c7bfd11, 0x353dc68f,
-  0x1c8671f3, 0x3544bebf, 0x1c90e834, 0x354bb4e1,
-  0x1c9b5fd2, 0x3552a8f4, 0x1ca5d8cd, 0x35599afa,
-  0x1cb05326, 0x35608af1, 0x1cbacedb, 0x356778d9,
-  0x1cc54bec, 0x356e64b2, 0x1ccfca59, 0x35754e7c,
-  0x1cda4a21, 0x357c3636, 0x1ce4cb44, 0x35831be0,
-  0x1cef4dc2, 0x3589ff7a, 0x1cf9d199, 0x3590e104,
-  0x1d0456ca, 0x3597c07d, 0x1d0edd55, 0x359e9de5,
-  0x1d196538, 0x35a5793c, 0x1d23ee74, 0x35ac5282,
-  0x1d2e7908, 0x35b329b5, 0x1d3904f4, 0x35b9fed7,
-  0x1d439236, 0x35c0d1e7, 0x1d4e20d0, 0x35c7a2e3,
-  0x1d58b0c0, 0x35ce71ce, 0x1d634206, 0x35d53ea5,
-  0x1d6dd4a2, 0x35dc0968, 0x1d786892, 0x35e2d219,
-  0x1d82fdd8, 0x35e998b5, 0x1d8d9472, 0x35f05d3d,
-  0x1d982c60, 0x35f71fb1, 0x1da2c5a2, 0x35fde011,
-  0x1dad6036, 0x36049e5b, 0x1db7fc1e, 0x360b5a90,
-  0x1dc29958, 0x361214b0, 0x1dcd37e4, 0x3618ccba,
-  0x1dd7d7c1, 0x361f82af, 0x1de278ef, 0x3626368d,
-  0x1ded1b6e, 0x362ce855, 0x1df7bf3e, 0x36339806,
-  0x1e02645d, 0x363a45a0, 0x1e0d0acc, 0x3640f123,
-  0x1e17b28a, 0x36479a8e, 0x1e225b96, 0x364e41e2,
-  0x1e2d05f1, 0x3654e71d, 0x1e37b199, 0x365b8a41,
-  0x1e425e8f, 0x36622b4c, 0x1e4d0cd2, 0x3668ca3e,
-  0x1e57bc62, 0x366f6717, 0x1e626d3e, 0x367601d7,
-  0x1e6d1f65, 0x367c9a7e, 0x1e77d2d8, 0x3683310b,
-  0x1e828796, 0x3689c57d, 0x1e8d3d9e, 0x369057d6,
-  0x1e97f4f1, 0x3696e814, 0x1ea2ad8d, 0x369d7637,
-  0x1ead6773, 0x36a4023f, 0x1eb822a1, 0x36aa8c2c,
-  0x1ec2df18, 0x36b113fd, 0x1ecd9cd7, 0x36b799b3,
-  0x1ed85bdd, 0x36be1d4c, 0x1ee31c2b, 0x36c49ec9,
-  0x1eedddc0, 0x36cb1e2a, 0x1ef8a09b, 0x36d19b6e,
-  0x1f0364bc, 0x36d81695, 0x1f0e2a22, 0x36de8f9e,
-  0x1f18f0ce, 0x36e5068a, 0x1f23b8be, 0x36eb7b58,
-  0x1f2e81f3, 0x36f1ee09, 0x1f394c6b, 0x36f85e9a,
-  0x1f441828, 0x36fecd0e, 0x1f4ee527, 0x37053962,
-  0x1f59b369, 0x370ba398, 0x1f6482ed, 0x37120bae,
-  0x1f6f53b3, 0x371871a5, 0x1f7a25ba, 0x371ed57c,
-  0x1f84f902, 0x37253733, 0x1f8fcd8b, 0x372b96ca,
-  0x1f9aa354, 0x3731f440, 0x1fa57a5d, 0x37384f95,
-  0x1fb052a5, 0x373ea8ca, 0x1fbb2c2c, 0x3744ffdd,
-  0x1fc606f1, 0x374b54ce, 0x1fd0e2f5, 0x3751a79e,
-  0x1fdbc036, 0x3757f84c, 0x1fe69eb4, 0x375e46d8,
-  0x1ff17e70, 0x37649341, 0x1ffc5f67, 0x376add88,
-  0x2007419b, 0x377125ac, 0x2012250a, 0x37776bac,
-  0x201d09b4, 0x377daf89, 0x2027ef99, 0x3783f143,
-  0x2032d6b8, 0x378a30d8, 0x203dbf11, 0x37906e49,
-  0x2048a8a4, 0x3796a996, 0x2053936f, 0x379ce2be,
-  0x205e7f74, 0x37a319c2, 0x20696cb0, 0x37a94ea0,
-  0x20745b24, 0x37af8159, 0x207f4acf, 0x37b5b1ec,
-  0x208a3bb2, 0x37bbe05a, 0x20952dcb, 0x37c20ca1,
-  0x20a0211a, 0x37c836c2, 0x20ab159e, 0x37ce5ebd,
-  0x20b60b58, 0x37d48490, 0x20c10247, 0x37daa83d,
-  0x20cbfa6a, 0x37e0c9c3, 0x20d6f3c1, 0x37e6e921,
-  0x20e1ee4b, 0x37ed0657, 0x20ecea09, 0x37f32165,
-  0x20f7e6f9, 0x37f93a4b, 0x2102e51c, 0x37ff5109,
-  0x210de470, 0x3805659e, 0x2118e4f6, 0x380b780a,
-  0x2123e6ad, 0x3811884d, 0x212ee995, 0x38179666,
-  0x2139edac, 0x381da256, 0x2144f2f3, 0x3823ac1d,
-  0x214ff96a, 0x3829b3b9, 0x215b0110, 0x382fb92a,
-  0x216609e3, 0x3835bc71, 0x217113e5, 0x383bbd8e,
-  0x217c1f15, 0x3841bc7f, 0x21872b72, 0x3847b946,
-  0x219238fb, 0x384db3e0, 0x219d47b1, 0x3853ac4f,
-  0x21a85793, 0x3859a292, 0x21b368a0, 0x385f96a9,
-  0x21be7ad8, 0x38658894, 0x21c98e3b, 0x386b7852,
-  0x21d4a2c8, 0x387165e3, 0x21dfb87f, 0x38775147,
-  0x21eacf5f, 0x387d3a7e, 0x21f5e768, 0x38832187,
-  0x22010099, 0x38890663, 0x220c1af3, 0x388ee910,
-  0x22173674, 0x3894c98f, 0x2222531c, 0x389aa7e0,
-  0x222d70eb, 0x38a08402, 0x22388fe1, 0x38a65df6,
-  0x2243affc, 0x38ac35ba, 0x224ed13d, 0x38b20b4f,
-  0x2259f3a3, 0x38b7deb4, 0x2265172e, 0x38bdafea,
-  0x22703bdc, 0x38c37eef, 0x227b61af, 0x38c94bc4,
-  0x228688a4, 0x38cf1669, 0x2291b0bd, 0x38d4dedd,
-  0x229cd9f8, 0x38daa520, 0x22a80456, 0x38e06932,
-  0x22b32fd4, 0x38e62b13, 0x22be5c74, 0x38ebeac2,
-  0x22c98a35, 0x38f1a840, 0x22d4b916, 0x38f7638b,
-  0x22dfe917, 0x38fd1ca4, 0x22eb1a37, 0x3902d38b,
-  0x22f64c77, 0x3908883f, 0x23017fd5, 0x390e3ac0,
-  0x230cb451, 0x3913eb0e, 0x2317e9eb, 0x39199929,
-  0x232320a2, 0x391f4510, 0x232e5876, 0x3924eec3,
-  0x23399167, 0x392a9642, 0x2344cb73, 0x39303b8e,
-  0x2350069b, 0x3935dea4, 0x235b42df, 0x393b7f86,
-  0x2366803c, 0x39411e33, 0x2371beb5, 0x3946baac,
-  0x237cfe47, 0x394c54ee, 0x23883ef2, 0x3951ecfc,
-  0x239380b6, 0x395782d3, 0x239ec393, 0x395d1675,
-  0x23aa0788, 0x3962a7e0, 0x23b54c95, 0x39683715,
-  0x23c092b9, 0x396dc414, 0x23cbd9f4, 0x39734edc,
-  0x23d72245, 0x3978d76c, 0x23e26bac, 0x397e5dc6,
-  0x23edb628, 0x3983e1e8, 0x23f901ba, 0x398963d2,
-  0x24044e60, 0x398ee385, 0x240f9c1a, 0x399460ff,
-  0x241aeae8, 0x3999dc42, 0x24263ac9, 0x399f554b,
-  0x24318bbe, 0x39a4cc1c, 0x243cddc4, 0x39aa40b4,
-  0x244830dd, 0x39afb313, 0x24538507, 0x39b52339,
-  0x245eda43, 0x39ba9125, 0x246a308f, 0x39bffcd7,
-  0x247587eb, 0x39c5664f, 0x2480e057, 0x39cacd8d,
-  0x248c39d3, 0x39d03291, 0x2497945d, 0x39d5955a,
-  0x24a2eff6, 0x39daf5e8, 0x24ae4c9d, 0x39e0543c,
-  0x24b9aa52, 0x39e5b054, 0x24c50914, 0x39eb0a31,
-  0x24d068e2, 0x39f061d2, 0x24dbc9bd, 0x39f5b737,
-  0x24e72ba4, 0x39fb0a60, 0x24f28e96, 0x3a005b4d,
-  0x24fdf294, 0x3a05a9fd, 0x2509579b, 0x3a0af671,
-  0x2514bdad, 0x3a1040a8, 0x252024c9, 0x3a1588a2,
-  0x252b8cee, 0x3a1ace5f, 0x2536f61b, 0x3a2011de,
-  0x25426051, 0x3a25531f, 0x254dcb8f, 0x3a2a9223,
-  0x255937d5, 0x3a2fcee8, 0x2564a521, 0x3a350970,
-  0x25701374, 0x3a3a41b9, 0x257b82cd, 0x3a3f77c3,
-  0x2586f32c, 0x3a44ab8e, 0x25926490, 0x3a49dd1a,
-  0x259dd6f9, 0x3a4f0c67, 0x25a94a67, 0x3a543974,
-  0x25b4bed8, 0x3a596442, 0x25c0344d, 0x3a5e8cd0,
-  0x25cbaac5, 0x3a63b31d, 0x25d72240, 0x3a68d72b,
-  0x25e29abc, 0x3a6df8f8, 0x25ee143b, 0x3a731884,
-  0x25f98ebb, 0x3a7835cf, 0x26050a3b, 0x3a7d50da,
-  0x261086bc, 0x3a8269a3, 0x261c043d, 0x3a87802a,
-  0x262782be, 0x3a8c9470, 0x2633023e, 0x3a91a674,
-  0x263e82bc, 0x3a96b636, 0x264a0438, 0x3a9bc3b6,
-  0x265586b3, 0x3aa0cef3, 0x26610a2a, 0x3aa5d7ee,
-  0x266c8e9f, 0x3aaadea6, 0x26781410, 0x3aafe31b,
-  0x26839a7c, 0x3ab4e54c, 0x268f21e5, 0x3ab9e53a,
-  0x269aaa48, 0x3abee2e5, 0x26a633a6, 0x3ac3de4c,
-  0x26b1bdff, 0x3ac8d76f, 0x26bd4951, 0x3acdce4d,
-  0x26c8d59c, 0x3ad2c2e8, 0x26d462e1, 0x3ad7b53d,
-  0x26dff11d, 0x3adca54e, 0x26eb8052, 0x3ae1931a,
-  0x26f7107e, 0x3ae67ea1, 0x2702a1a1, 0x3aeb67e3,
-  0x270e33bb, 0x3af04edf, 0x2719c6cb, 0x3af53395,
-  0x27255ad1, 0x3afa1605, 0x2730efcc, 0x3afef630,
-  0x273c85bc, 0x3b03d414, 0x27481ca1, 0x3b08afb2,
-  0x2753b479, 0x3b0d8909, 0x275f4d45, 0x3b126019,
-  0x276ae704, 0x3b1734e2, 0x277681b6, 0x3b1c0764,
-  0x27821d59, 0x3b20d79e, 0x278db9ef, 0x3b25a591,
-  0x27995776, 0x3b2a713d, 0x27a4f5ed, 0x3b2f3aa0,
-  0x27b09555, 0x3b3401bb, 0x27bc35ad, 0x3b38c68e,
-  0x27c7d6f4, 0x3b3d8918, 0x27d3792b, 0x3b42495a,
-  0x27df1c50, 0x3b470753, 0x27eac063, 0x3b4bc303,
-  0x27f66564, 0x3b507c69, 0x28020b52, 0x3b553386,
-  0x280db22d, 0x3b59e85a, 0x281959f4, 0x3b5e9ae4,
-  0x282502a7, 0x3b634b23, 0x2830ac45, 0x3b67f919,
-  0x283c56cf, 0x3b6ca4c4, 0x28480243, 0x3b714e25,
-  0x2853aea1, 0x3b75f53c, 0x285f5be9, 0x3b7a9a07,
-  0x286b0a1a, 0x3b7f3c87, 0x2876b934, 0x3b83dcbc,
-  0x28826936, 0x3b887aa6, 0x288e1a20, 0x3b8d1644,
-  0x2899cbf1, 0x3b91af97, 0x28a57ea9, 0x3b96469d,
-  0x28b13248, 0x3b9adb57, 0x28bce6cd, 0x3b9f6dc5,
-  0x28c89c37, 0x3ba3fde7, 0x28d45286, 0x3ba88bbc,
-  0x28e009ba, 0x3bad1744, 0x28ebc1d3, 0x3bb1a080,
-  0x28f77acf, 0x3bb6276e, 0x290334af, 0x3bbaac0e,
-  0x290eef71, 0x3bbf2e62, 0x291aab16, 0x3bc3ae67,
-  0x2926679c, 0x3bc82c1f, 0x29322505, 0x3bcca789,
-  0x293de34e, 0x3bd120a4, 0x2949a278, 0x3bd59771,
-  0x29556282, 0x3bda0bf0, 0x2961236c, 0x3bde7e20,
-  0x296ce535, 0x3be2ee01, 0x2978a7dd, 0x3be75b93,
-  0x29846b63, 0x3bebc6d5, 0x29902fc7, 0x3bf02fc9,
-  0x299bf509, 0x3bf4966c, 0x29a7bb28, 0x3bf8fac0,
-  0x29b38223, 0x3bfd5cc4, 0x29bf49fa, 0x3c01bc78,
-  0x29cb12ad, 0x3c0619dc, 0x29d6dc3b, 0x3c0a74f0,
-  0x29e2a6a3, 0x3c0ecdb2, 0x29ee71e6, 0x3c132424,
-  0x29fa3e03, 0x3c177845, 0x2a060af9, 0x3c1bca16,
-  0x2a11d8c8, 0x3c201994, 0x2a1da770, 0x3c2466c2,
-  0x2a2976ef, 0x3c28b19e, 0x2a354746, 0x3c2cfa28,
-  0x2a411874, 0x3c314060, 0x2a4cea79, 0x3c358446,
-  0x2a58bd54, 0x3c39c5da, 0x2a649105, 0x3c3e051b,
-  0x2a70658a, 0x3c42420a, 0x2a7c3ae5, 0x3c467ca6,
-  0x2a881114, 0x3c4ab4ef, 0x2a93e817, 0x3c4eeae5,
-  0x2a9fbfed, 0x3c531e88, 0x2aab9896, 0x3c574fd8,
-  0x2ab77212, 0x3c5b7ed4, 0x2ac34c60, 0x3c5fab7c,
-  0x2acf277f, 0x3c63d5d1, 0x2adb0370, 0x3c67fdd1,
-  0x2ae6e031, 0x3c6c237e, 0x2af2bdc3, 0x3c7046d6,
-  0x2afe9c24, 0x3c7467d9, 0x2b0a7b54, 0x3c788688,
-  0x2b165b54, 0x3c7ca2e2, 0x2b223c22, 0x3c80bce7,
-  0x2b2e1dbe, 0x3c84d496, 0x2b3a0027, 0x3c88e9f1,
-  0x2b45e35d, 0x3c8cfcf6, 0x2b51c760, 0x3c910da5,
-  0x2b5dac2f, 0x3c951bff, 0x2b6991ca, 0x3c992803,
-  0x2b75782f, 0x3c9d31b0, 0x2b815f60, 0x3ca13908,
-  0x2b8d475b, 0x3ca53e09, 0x2b99301f, 0x3ca940b3,
-  0x2ba519ad, 0x3cad4107, 0x2bb10404, 0x3cb13f04,
-  0x2bbcef23, 0x3cb53aaa, 0x2bc8db0b, 0x3cb933f9,
-  0x2bd4c7ba, 0x3cbd2af0, 0x2be0b52f, 0x3cc11f90,
-  0x2beca36c, 0x3cc511d9, 0x2bf8926f, 0x3cc901c9,
-  0x2c048237, 0x3cccef62, 0x2c1072c4, 0x3cd0daa2,
-  0x2c1c6417, 0x3cd4c38b, 0x2c28562d, 0x3cd8aa1b,
-  0x2c344908, 0x3cdc8e52, 0x2c403ca5, 0x3ce07031,
-  0x2c4c3106, 0x3ce44fb7, 0x2c582629, 0x3ce82ce4,
-  0x2c641c0e, 0x3cec07b8, 0x2c7012b5, 0x3cefe032,
-  0x2c7c0a1d, 0x3cf3b653, 0x2c880245, 0x3cf78a1b,
-  0x2c93fb2e, 0x3cfb5b89, 0x2c9ff4d6, 0x3cff2a9d,
-  0x2cabef3d, 0x3d02f757, 0x2cb7ea63, 0x3d06c1b6,
-  0x2cc3e648, 0x3d0a89bc, 0x2ccfe2ea, 0x3d0e4f67,
-  0x2cdbe04a, 0x3d1212b7, 0x2ce7de66, 0x3d15d3ad,
-  0x2cf3dd3f, 0x3d199248, 0x2cffdcd4, 0x3d1d4e88,
-  0x2d0bdd25, 0x3d21086c, 0x2d17de31, 0x3d24bff6,
-  0x2d23dff7, 0x3d287523, 0x2d2fe277, 0x3d2c27f6,
-  0x2d3be5b1, 0x3d2fd86c, 0x2d47e9a5, 0x3d338687,
-  0x2d53ee51, 0x3d373245, 0x2d5ff3b5, 0x3d3adba7,
-  0x2d6bf9d1, 0x3d3e82ae, 0x2d7800a5, 0x3d422757,
-  0x2d84082f, 0x3d45c9a4, 0x2d901070, 0x3d496994,
-  0x2d9c1967, 0x3d4d0728, 0x2da82313, 0x3d50a25e,
-  0x2db42d74, 0x3d543b37, 0x2dc0388a, 0x3d57d1b3,
-  0x2dcc4454, 0x3d5b65d2, 0x2dd850d2, 0x3d5ef793,
-  0x2de45e03, 0x3d6286f6, 0x2df06be6, 0x3d6613fb,
-  0x2dfc7a7c, 0x3d699ea3, 0x2e0889c4, 0x3d6d26ec,
-  0x2e1499bd, 0x3d70acd7, 0x2e20aa67, 0x3d743064,
-  0x2e2cbbc1, 0x3d77b192, 0x2e38cdcb, 0x3d7b3061,
-  0x2e44e084, 0x3d7eacd2, 0x2e50f3ed, 0x3d8226e4,
-  0x2e5d0804, 0x3d859e96, 0x2e691cc9, 0x3d8913ea,
-  0x2e75323c, 0x3d8c86de, 0x2e81485c, 0x3d8ff772,
-  0x2e8d5f29, 0x3d9365a8, 0x2e9976a1, 0x3d96d17d,
-  0x2ea58ec6, 0x3d9a3af2, 0x2eb1a796, 0x3d9da208,
-  0x2ebdc110, 0x3da106bd, 0x2ec9db35, 0x3da46912,
-  0x2ed5f604, 0x3da7c907, 0x2ee2117c, 0x3dab269b,
-  0x2eee2d9d, 0x3dae81cf, 0x2efa4a67, 0x3db1daa2,
-  0x2f0667d9, 0x3db53113, 0x2f1285f2, 0x3db88524,
-  0x2f1ea4b2, 0x3dbbd6d4, 0x2f2ac419, 0x3dbf2622,
-  0x2f36e426, 0x3dc2730f, 0x2f4304d8, 0x3dc5bd9b,
-  0x2f4f2630, 0x3dc905c5, 0x2f5b482d, 0x3dcc4b8d,
-  0x2f676ace, 0x3dcf8ef3, 0x2f738e12, 0x3dd2cff7,
-  0x2f7fb1fa, 0x3dd60e99, 0x2f8bd685, 0x3dd94ad8,
-  0x2f97fbb2, 0x3ddc84b5, 0x2fa42181, 0x3ddfbc30,
-  0x2fb047f2, 0x3de2f148, 0x2fbc6f03, 0x3de623fd,
-  0x2fc896b5, 0x3de9544f, 0x2fd4bf08, 0x3dec823e,
-  0x2fe0e7f9, 0x3defadca, 0x2fed118a, 0x3df2d6f3,
-  0x2ff93bba, 0x3df5fdb8, 0x30056687, 0x3df9221a,
-  0x301191f3, 0x3dfc4418, 0x301dbdfb, 0x3dff63b2,
-  0x3029eaa1, 0x3e0280e9, 0x303617e2, 0x3e059bbb,
-  0x304245c0, 0x3e08b42a, 0x304e7438, 0x3e0bca34,
-  0x305aa34c, 0x3e0eddd9, 0x3066d2fa, 0x3e11ef1b,
-  0x30730342, 0x3e14fdf7, 0x307f3424, 0x3e180a6f,
-  0x308b659f, 0x3e1b1482, 0x309797b2, 0x3e1e1c30,
-  0x30a3ca5d, 0x3e212179, 0x30affda0, 0x3e24245d,
-  0x30bc317a, 0x3e2724db, 0x30c865ea, 0x3e2a22f4,
-  0x30d49af1, 0x3e2d1ea8, 0x30e0d08d, 0x3e3017f6,
-  0x30ed06bf, 0x3e330ede, 0x30f93d86, 0x3e360360,
-  0x310574e0, 0x3e38f57c, 0x3111accf, 0x3e3be532,
-  0x311de551, 0x3e3ed282, 0x312a1e66, 0x3e41bd6c,
-  0x3136580d, 0x3e44a5ef, 0x31429247, 0x3e478c0b,
-  0x314ecd11, 0x3e4a6fc1, 0x315b086d, 0x3e4d5110,
-  0x31674459, 0x3e502ff9, 0x317380d6, 0x3e530c7a,
-  0x317fbde2, 0x3e55e694, 0x318bfb7d, 0x3e58be47,
-  0x319839a6, 0x3e5b9392, 0x31a4785e, 0x3e5e6676,
-  0x31b0b7a4, 0x3e6136f3, 0x31bcf777, 0x3e640507,
-  0x31c937d6, 0x3e66d0b4, 0x31d578c2, 0x3e6999fa,
-  0x31e1ba3a, 0x3e6c60d7, 0x31edfc3d, 0x3e6f254c,
-  0x31fa3ecb, 0x3e71e759, 0x320681e3, 0x3e74a6fd,
-  0x3212c585, 0x3e77643a, 0x321f09b1, 0x3e7a1f0d,
-  0x322b4e66, 0x3e7cd778, 0x323793a3, 0x3e7f8d7b,
-  0x3243d968, 0x3e824114, 0x32501fb5, 0x3e84f245,
-  0x325c6688, 0x3e87a10c, 0x3268ade3, 0x3e8a4d6a,
-  0x3274f5c3, 0x3e8cf75f, 0x32813e2a, 0x3e8f9eeb,
-  0x328d8715, 0x3e92440d, 0x3299d085, 0x3e94e6c6,
-  0x32a61a7a, 0x3e978715, 0x32b264f2, 0x3e9a24fb,
-  0x32beafed, 0x3e9cc076, 0x32cafb6b, 0x3e9f5988,
-  0x32d7476c, 0x3ea1f02f, 0x32e393ef, 0x3ea4846c,
-  0x32efe0f2, 0x3ea7163f, 0x32fc2e77, 0x3ea9a5a8,
-  0x33087c7d, 0x3eac32a6, 0x3314cb02, 0x3eaebd3a,
-  0x33211a07, 0x3eb14563, 0x332d698a, 0x3eb3cb21,
-  0x3339b98d, 0x3eb64e75, 0x33460a0d, 0x3eb8cf5d,
-  0x33525b0b, 0x3ebb4ddb, 0x335eac86, 0x3ebdc9ed,
-  0x336afe7e, 0x3ec04394, 0x337750f2, 0x3ec2bad0,
-  0x3383a3e2, 0x3ec52fa0, 0x338ff74d, 0x3ec7a205,
-  0x339c4b32, 0x3eca11fe, 0x33a89f92, 0x3ecc7f8b,
-  0x33b4f46c, 0x3eceeaad, 0x33c149bf, 0x3ed15363,
-  0x33cd9f8b, 0x3ed3b9ad, 0x33d9f5cf, 0x3ed61d8a,
-  0x33e64c8c, 0x3ed87efc, 0x33f2a3bf, 0x3edade01,
-  0x33fefb6a, 0x3edd3a9a, 0x340b538b, 0x3edf94c7,
-  0x3417ac22, 0x3ee1ec87, 0x3424052f, 0x3ee441da,
-  0x34305eb0, 0x3ee694c1, 0x343cb8a7, 0x3ee8e53a,
-  0x34491311, 0x3eeb3347, 0x34556def, 0x3eed7ee7,
-  0x3461c940, 0x3eefc81a, 0x346e2504, 0x3ef20ee0,
-  0x347a8139, 0x3ef45338, 0x3486dde1, 0x3ef69523,
-  0x34933afa, 0x3ef8d4a1, 0x349f9884, 0x3efb11b1,
-  0x34abf67e, 0x3efd4c54, 0x34b854e7, 0x3eff8489,
-  0x34c4b3c0, 0x3f01ba50, 0x34d11308, 0x3f03eda9,
-  0x34dd72be, 0x3f061e95, 0x34e9d2e3, 0x3f084d12,
-  0x34f63374, 0x3f0a7921, 0x35029473, 0x3f0ca2c2,
-  0x350ef5de, 0x3f0ec9f5, 0x351b57b5, 0x3f10eeb9,
-  0x3527b9f7, 0x3f13110f, 0x35341ca5, 0x3f1530f7,
-  0x35407fbd, 0x3f174e70, 0x354ce33f, 0x3f19697a,
-  0x3559472b, 0x3f1b8215, 0x3565ab80, 0x3f1d9842,
-  0x3572103d, 0x3f1fabff, 0x357e7563, 0x3f21bd4e,
-  0x358adaf0, 0x3f23cc2e, 0x359740e5, 0x3f25d89e,
-  0x35a3a740, 0x3f27e29f, 0x35b00e02, 0x3f29ea31,
-  0x35bc7529, 0x3f2bef53, 0x35c8dcb6, 0x3f2df206,
-  0x35d544a7, 0x3f2ff24a, 0x35e1acfd, 0x3f31f01d,
-  0x35ee15b7, 0x3f33eb81, 0x35fa7ed4, 0x3f35e476,
-  0x3606e854, 0x3f37dafa, 0x36135237, 0x3f39cf0e,
-  0x361fbc7b, 0x3f3bc0b3, 0x362c2721, 0x3f3dafe7,
-  0x36389228, 0x3f3f9cab, 0x3644fd8f, 0x3f4186ff,
-  0x36516956, 0x3f436ee3, 0x365dd57d, 0x3f455456,
-  0x366a4203, 0x3f473759, 0x3676aee8, 0x3f4917eb,
-  0x36831c2b, 0x3f4af60d, 0x368f89cb, 0x3f4cd1be,
-  0x369bf7c9, 0x3f4eaafe, 0x36a86623, 0x3f5081cd,
-  0x36b4d4d9, 0x3f52562c, 0x36c143ec, 0x3f54281a,
-  0x36cdb359, 0x3f55f796, 0x36da2321, 0x3f57c4a2,
-  0x36e69344, 0x3f598f3c, 0x36f303c0, 0x3f5b5765,
-  0x36ff7496, 0x3f5d1d1d, 0x370be5c4, 0x3f5ee063,
-  0x3718574b, 0x3f60a138, 0x3724c92a, 0x3f625f9b,
-  0x37313b60, 0x3f641b8d, 0x373daded, 0x3f65d50d,
-  0x374a20d0, 0x3f678c1c, 0x3756940a, 0x3f6940b8,
-  0x37630799, 0x3f6af2e3, 0x376f7b7d, 0x3f6ca29c,
-  0x377befb5, 0x3f6e4fe3, 0x37886442, 0x3f6ffab8,
-  0x3794d922, 0x3f71a31b, 0x37a14e55, 0x3f73490b,
-  0x37adc3db, 0x3f74ec8a, 0x37ba39b3, 0x3f768d96,
-  0x37c6afdc, 0x3f782c30, 0x37d32657, 0x3f79c857,
-  0x37df9d22, 0x3f7b620c, 0x37ec143e, 0x3f7cf94e,
-  0x37f88ba9, 0x3f7e8e1e, 0x38050364, 0x3f80207b,
-  0x38117b6d, 0x3f81b065, 0x381df3c5, 0x3f833ddd,
-  0x382a6c6a, 0x3f84c8e2, 0x3836e55d, 0x3f865174,
-  0x38435e9d, 0x3f87d792, 0x384fd829, 0x3f895b3e,
-  0x385c5201, 0x3f8adc77, 0x3868cc24, 0x3f8c5b3d,
-  0x38754692, 0x3f8dd78f, 0x3881c14b, 0x3f8f516e,
-  0x388e3c4d, 0x3f90c8da, 0x389ab799, 0x3f923dd2,
-  0x38a7332e, 0x3f93b058, 0x38b3af0c, 0x3f952069,
-  0x38c02b31, 0x3f968e07, 0x38cca79e, 0x3f97f932,
-  0x38d92452, 0x3f9961e8, 0x38e5a14d, 0x3f9ac82c,
-  0x38f21e8e, 0x3f9c2bfb, 0x38fe9c15, 0x3f9d8d56,
-  0x390b19e0, 0x3f9eec3e, 0x391797f0, 0x3fa048b2,
-  0x39241645, 0x3fa1a2b2, 0x393094dd, 0x3fa2fa3d,
-  0x393d13b8, 0x3fa44f55, 0x394992d7, 0x3fa5a1f9,
-  0x39561237, 0x3fa6f228, 0x396291d9, 0x3fa83fe3,
-  0x396f11bc, 0x3fa98b2a, 0x397b91e1, 0x3faad3fd,
-  0x39881245, 0x3fac1a5b, 0x399492ea, 0x3fad5e45,
-  0x39a113cd, 0x3fae9fbb, 0x39ad94f0, 0x3fafdebb,
-  0x39ba1651, 0x3fb11b48, 0x39c697f0, 0x3fb2555f,
-  0x39d319cc, 0x3fb38d02, 0x39df9be6, 0x3fb4c231,
-  0x39ec1e3b, 0x3fb5f4ea, 0x39f8a0cd, 0x3fb7252f,
-  0x3a05239a, 0x3fb852ff, 0x3a11a6a3, 0x3fb97e5a,
-  0x3a1e29e5, 0x3fbaa740, 0x3a2aad62, 0x3fbbcdb1,
-  0x3a373119, 0x3fbcf1ad, 0x3a43b508, 0x3fbe1334,
-  0x3a503930, 0x3fbf3246, 0x3a5cbd91, 0x3fc04ee3,
-  0x3a694229, 0x3fc1690a, 0x3a75c6f8, 0x3fc280bc,
-  0x3a824bfd, 0x3fc395f9, 0x3a8ed139, 0x3fc4a8c1,
-  0x3a9b56ab, 0x3fc5b913, 0x3aa7dc52, 0x3fc6c6f0,
-  0x3ab4622d, 0x3fc7d258, 0x3ac0e83d, 0x3fc8db4a,
-  0x3acd6e81, 0x3fc9e1c6, 0x3ad9f4f8, 0x3fcae5cd,
-  0x3ae67ba2, 0x3fcbe75e, 0x3af3027e, 0x3fcce67a,
-  0x3aff898c, 0x3fcde320, 0x3b0c10cb, 0x3fcedd50,
-  0x3b18983b, 0x3fcfd50b, 0x3b251fdc, 0x3fd0ca4f,
-  0x3b31a7ac, 0x3fd1bd1e, 0x3b3e2fac, 0x3fd2ad77,
-  0x3b4ab7db, 0x3fd39b5a, 0x3b574039, 0x3fd486c7,
-  0x3b63c8c4, 0x3fd56fbe, 0x3b70517d, 0x3fd6563f,
-  0x3b7cda63, 0x3fd73a4a, 0x3b896375, 0x3fd81bdf,
-  0x3b95ecb4, 0x3fd8fafe, 0x3ba2761e, 0x3fd9d7a7,
-  0x3baeffb3, 0x3fdab1d9, 0x3bbb8973, 0x3fdb8996,
-  0x3bc8135c, 0x3fdc5edc, 0x3bd49d70, 0x3fdd31ac,
-  0x3be127ac, 0x3fde0205, 0x3bedb212, 0x3fdecfe8,
-  0x3bfa3c9f, 0x3fdf9b55, 0x3c06c754, 0x3fe0644b,
-  0x3c135231, 0x3fe12acb, 0x3c1fdd34, 0x3fe1eed5,
-  0x3c2c685d, 0x3fe2b067, 0x3c38f3ac, 0x3fe36f84,
-  0x3c457f21, 0x3fe42c2a, 0x3c520aba, 0x3fe4e659,
-  0x3c5e9678, 0x3fe59e12, 0x3c6b2259, 0x3fe65354,
-  0x3c77ae5e, 0x3fe7061f, 0x3c843a85, 0x3fe7b674,
-  0x3c90c6cf, 0x3fe86452, 0x3c9d533b, 0x3fe90fb9,
-  0x3ca9dfc8, 0x3fe9b8a9, 0x3cb66c77, 0x3fea5f23,
-  0x3cc2f945, 0x3feb0326, 0x3ccf8634, 0x3feba4b2,
-  0x3cdc1342, 0x3fec43c7, 0x3ce8a06f, 0x3fece065,
-  0x3cf52dbb, 0x3fed7a8c, 0x3d01bb24, 0x3fee123d,
-  0x3d0e48ab, 0x3feea776, 0x3d1ad650, 0x3fef3a39,
-  0x3d276410, 0x3fefca84, 0x3d33f1ed, 0x3ff05858,
-  0x3d407fe6, 0x3ff0e3b6, 0x3d4d0df9, 0x3ff16c9c,
-  0x3d599c28, 0x3ff1f30b, 0x3d662a70, 0x3ff27703,
-  0x3d72b8d2, 0x3ff2f884, 0x3d7f474d, 0x3ff3778e,
-  0x3d8bd5e1, 0x3ff3f420, 0x3d98648d, 0x3ff46e3c,
-  0x3da4f351, 0x3ff4e5e0, 0x3db1822c, 0x3ff55b0d,
-  0x3dbe111e, 0x3ff5cdc3, 0x3dcaa027, 0x3ff63e01,
-  0x3dd72f45, 0x3ff6abc8, 0x3de3be78, 0x3ff71718,
-  0x3df04dc0, 0x3ff77ff1, 0x3dfcdd1d, 0x3ff7e652,
-  0x3e096c8d, 0x3ff84a3c, 0x3e15fc11, 0x3ff8abae,
-  0x3e228ba7, 0x3ff90aaa, 0x3e2f1b50, 0x3ff9672d,
-  0x3e3bab0b, 0x3ff9c13a, 0x3e483ad8, 0x3ffa18cf,
-  0x3e54cab5, 0x3ffa6dec, 0x3e615aa3, 0x3ffac092,
-  0x3e6deaa1, 0x3ffb10c1, 0x3e7a7aae, 0x3ffb5e78,
-  0x3e870aca, 0x3ffba9b8, 0x3e939af5, 0x3ffbf280,
-  0x3ea02b2e, 0x3ffc38d1, 0x3eacbb74, 0x3ffc7caa,
-  0x3eb94bc8, 0x3ffcbe0c, 0x3ec5dc28, 0x3ffcfcf6,
-  0x3ed26c94, 0x3ffd3969, 0x3edefd0c, 0x3ffd7364,
-  0x3eeb8d8f, 0x3ffdaae7, 0x3ef81e1d, 0x3ffddff3,
-  0x3f04aeb5, 0x3ffe1288, 0x3f113f56, 0x3ffe42a4,
-  0x3f1dd001, 0x3ffe704a, 0x3f2a60b4, 0x3ffe9b77,
-  0x3f36f170, 0x3ffec42d, 0x3f438234, 0x3ffeea6c,
-  0x3f5012fe, 0x3fff0e32, 0x3f5ca3d0, 0x3fff2f82,
-  0x3f6934a8, 0x3fff4e59, 0x3f75c585, 0x3fff6ab9,
-  0x3f825668, 0x3fff84a1, 0x3f8ee750, 0x3fff9c12,
-  0x3f9b783c, 0x3fffb10b, 0x3fa8092c, 0x3fffc38c,
-  0x3fb49a1f, 0x3fffd396, 0x3fc12b16, 0x3fffe128,
-  0x3fcdbc0f, 0x3fffec43, 0x3fda4d09, 0x3ffff4e6,
-  0x3fe6de05, 0x3ffffb11, 0x3ff36f02, 0x3ffffec4,
-};
-
-
-/**    
-* \par   
-* Generation of realCoefBQ31 array:    
-* \par    
-*  n = 4096        
-* 
for (i = 0; i < n; i++)    
-* {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-* } 
    
-* \par    
-* Convert to fixed point Q31 format    
-*     round(pBTable[i] * pow(2, 31))    
-*    
-*/
-
-static const q31_t realCoefBQ31[8192] = {
-  0x40000000, 0x40000000, 0x400c90fe, 0x3ffffec4,
-  0x401921fb, 0x3ffffb11, 0x4025b2f7, 0x3ffff4e6,
-  0x403243f1, 0x3fffec43, 0x403ed4ea, 0x3fffe128,
-  0x404b65e1, 0x3fffd396, 0x4057f6d4, 0x3fffc38c,
-  0x406487c4, 0x3fffb10b, 0x407118b0, 0x3fff9c12,
-  0x407da998, 0x3fff84a1, 0x408a3a7b, 0x3fff6ab9,
-  0x4096cb58, 0x3fff4e59, 0x40a35c30, 0x3fff2f82,
-  0x40afed02, 0x3fff0e32, 0x40bc7dcc, 0x3ffeea6c,
-  0x40c90e90, 0x3ffec42d, 0x40d59f4c, 0x3ffe9b77,
-  0x40e22fff, 0x3ffe704a, 0x40eec0aa, 0x3ffe42a4,
-  0x40fb514b, 0x3ffe1288, 0x4107e1e3, 0x3ffddff3,
-  0x41147271, 0x3ffdaae7, 0x412102f4, 0x3ffd7364,
-  0x412d936c, 0x3ffd3969, 0x413a23d8, 0x3ffcfcf6,
-  0x4146b438, 0x3ffcbe0c, 0x4153448c, 0x3ffc7caa,
-  0x415fd4d2, 0x3ffc38d1, 0x416c650b, 0x3ffbf280,
-  0x4178f536, 0x3ffba9b8, 0x41858552, 0x3ffb5e78,
-  0x4192155f, 0x3ffb10c1, 0x419ea55d, 0x3ffac092,
-  0x41ab354b, 0x3ffa6dec, 0x41b7c528, 0x3ffa18cf,
-  0x41c454f5, 0x3ff9c13a, 0x41d0e4b0, 0x3ff9672d,
-  0x41dd7459, 0x3ff90aaa, 0x41ea03ef, 0x3ff8abae,
-  0x41f69373, 0x3ff84a3c, 0x420322e3, 0x3ff7e652,
-  0x420fb240, 0x3ff77ff1, 0x421c4188, 0x3ff71718,
-  0x4228d0bb, 0x3ff6abc8, 0x42355fd9, 0x3ff63e01,
-  0x4241eee2, 0x3ff5cdc3, 0x424e7dd4, 0x3ff55b0d,
-  0x425b0caf, 0x3ff4e5e0, 0x42679b73, 0x3ff46e3c,
-  0x42742a1f, 0x3ff3f420, 0x4280b8b3, 0x3ff3778e,
-  0x428d472e, 0x3ff2f884, 0x4299d590, 0x3ff27703,
-  0x42a663d8, 0x3ff1f30b, 0x42b2f207, 0x3ff16c9c,
-  0x42bf801a, 0x3ff0e3b6, 0x42cc0e13, 0x3ff05858,
-  0x42d89bf0, 0x3fefca84, 0x42e529b0, 0x3fef3a39,
-  0x42f1b755, 0x3feea776, 0x42fe44dc, 0x3fee123d,
-  0x430ad245, 0x3fed7a8c, 0x43175f91, 0x3fece065,
-  0x4323ecbe, 0x3fec43c7, 0x433079cc, 0x3feba4b2,
-  0x433d06bb, 0x3feb0326, 0x43499389, 0x3fea5f23,
-  0x43562038, 0x3fe9b8a9, 0x4362acc5, 0x3fe90fb9,
-  0x436f3931, 0x3fe86452, 0x437bc57b, 0x3fe7b674,
-  0x438851a2, 0x3fe7061f, 0x4394dda7, 0x3fe65354,
-  0x43a16988, 0x3fe59e12, 0x43adf546, 0x3fe4e659,
-  0x43ba80df, 0x3fe42c2a, 0x43c70c54, 0x3fe36f84,
-  0x43d397a3, 0x3fe2b067, 0x43e022cc, 0x3fe1eed5,
-  0x43ecadcf, 0x3fe12acb, 0x43f938ac, 0x3fe0644b,
-  0x4405c361, 0x3fdf9b55, 0x44124dee, 0x3fdecfe8,
-  0x441ed854, 0x3fde0205, 0x442b6290, 0x3fdd31ac,
-  0x4437eca4, 0x3fdc5edc, 0x4444768d, 0x3fdb8996,
-  0x4451004d, 0x3fdab1d9, 0x445d89e2, 0x3fd9d7a7,
-  0x446a134c, 0x3fd8fafe, 0x44769c8b, 0x3fd81bdf,
-  0x4483259d, 0x3fd73a4a, 0x448fae83, 0x3fd6563f,
-  0x449c373c, 0x3fd56fbe, 0x44a8bfc7, 0x3fd486c7,
-  0x44b54825, 0x3fd39b5a, 0x44c1d054, 0x3fd2ad77,
-  0x44ce5854, 0x3fd1bd1e, 0x44dae024, 0x3fd0ca4f,
-  0x44e767c5, 0x3fcfd50b, 0x44f3ef35, 0x3fcedd50,
-  0x45007674, 0x3fcde320, 0x450cfd82, 0x3fcce67a,
-  0x4519845e, 0x3fcbe75e, 0x45260b08, 0x3fcae5cd,
-  0x4532917f, 0x3fc9e1c6, 0x453f17c3, 0x3fc8db4a,
-  0x454b9dd3, 0x3fc7d258, 0x455823ae, 0x3fc6c6f0,
-  0x4564a955, 0x3fc5b913, 0x45712ec7, 0x3fc4a8c1,
-  0x457db403, 0x3fc395f9, 0x458a3908, 0x3fc280bc,
-  0x4596bdd7, 0x3fc1690a, 0x45a3426f, 0x3fc04ee3,
-  0x45afc6d0, 0x3fbf3246, 0x45bc4af8, 0x3fbe1334,
-  0x45c8cee7, 0x3fbcf1ad, 0x45d5529e, 0x3fbbcdb1,
-  0x45e1d61b, 0x3fbaa740, 0x45ee595d, 0x3fb97e5a,
-  0x45fadc66, 0x3fb852ff, 0x46075f33, 0x3fb7252f,
-  0x4613e1c5, 0x3fb5f4ea, 0x4620641a, 0x3fb4c231,
-  0x462ce634, 0x3fb38d02, 0x46396810, 0x3fb2555f,
-  0x4645e9af, 0x3fb11b48, 0x46526b10, 0x3fafdebb,
-  0x465eec33, 0x3fae9fbb, 0x466b6d16, 0x3fad5e45,
-  0x4677edbb, 0x3fac1a5b, 0x46846e1f, 0x3faad3fd,
-  0x4690ee44, 0x3fa98b2a, 0x469d6e27, 0x3fa83fe3,
-  0x46a9edc9, 0x3fa6f228, 0x46b66d29, 0x3fa5a1f9,
-  0x46c2ec48, 0x3fa44f55, 0x46cf6b23, 0x3fa2fa3d,
-  0x46dbe9bb, 0x3fa1a2b2, 0x46e86810, 0x3fa048b2,
-  0x46f4e620, 0x3f9eec3e, 0x470163eb, 0x3f9d8d56,
-  0x470de172, 0x3f9c2bfb, 0x471a5eb3, 0x3f9ac82c,
-  0x4726dbae, 0x3f9961e8, 0x47335862, 0x3f97f932,
-  0x473fd4cf, 0x3f968e07, 0x474c50f4, 0x3f952069,
-  0x4758ccd2, 0x3f93b058, 0x47654867, 0x3f923dd2,
-  0x4771c3b3, 0x3f90c8da, 0x477e3eb5, 0x3f8f516e,
-  0x478ab96e, 0x3f8dd78f, 0x479733dc, 0x3f8c5b3d,
-  0x47a3adff, 0x3f8adc77, 0x47b027d7, 0x3f895b3e,
-  0x47bca163, 0x3f87d792, 0x47c91aa3, 0x3f865174,
-  0x47d59396, 0x3f84c8e2, 0x47e20c3b, 0x3f833ddd,
-  0x47ee8493, 0x3f81b065, 0x47fafc9c, 0x3f80207b,
-  0x48077457, 0x3f7e8e1e, 0x4813ebc2, 0x3f7cf94e,
-  0x482062de, 0x3f7b620c, 0x482cd9a9, 0x3f79c857,
-  0x48395024, 0x3f782c30, 0x4845c64d, 0x3f768d96,
-  0x48523c25, 0x3f74ec8a, 0x485eb1ab, 0x3f73490b,
-  0x486b26de, 0x3f71a31b, 0x48779bbe, 0x3f6ffab8,
-  0x4884104b, 0x3f6e4fe3, 0x48908483, 0x3f6ca29c,
-  0x489cf867, 0x3f6af2e3, 0x48a96bf6, 0x3f6940b8,
-  0x48b5df30, 0x3f678c1c, 0x48c25213, 0x3f65d50d,
-  0x48cec4a0, 0x3f641b8d, 0x48db36d6, 0x3f625f9b,
-  0x48e7a8b5, 0x3f60a138, 0x48f41a3c, 0x3f5ee063,
-  0x49008b6a, 0x3f5d1d1d, 0x490cfc40, 0x3f5b5765,
-  0x49196cbc, 0x3f598f3c, 0x4925dcdf, 0x3f57c4a2,
-  0x49324ca7, 0x3f55f796, 0x493ebc14, 0x3f54281a,
-  0x494b2b27, 0x3f52562c, 0x495799dd, 0x3f5081cd,
-  0x49640837, 0x3f4eaafe, 0x49707635, 0x3f4cd1be,
-  0x497ce3d5, 0x3f4af60d, 0x49895118, 0x3f4917eb,
-  0x4995bdfd, 0x3f473759, 0x49a22a83, 0x3f455456,
-  0x49ae96aa, 0x3f436ee3, 0x49bb0271, 0x3f4186ff,
-  0x49c76dd8, 0x3f3f9cab, 0x49d3d8df, 0x3f3dafe7,
-  0x49e04385, 0x3f3bc0b3, 0x49ecadc9, 0x3f39cf0e,
-  0x49f917ac, 0x3f37dafa, 0x4a05812c, 0x3f35e476,
-  0x4a11ea49, 0x3f33eb81, 0x4a1e5303, 0x3f31f01d,
-  0x4a2abb59, 0x3f2ff24a, 0x4a37234a, 0x3f2df206,
-  0x4a438ad7, 0x3f2bef53, 0x4a4ff1fe, 0x3f29ea31,
-  0x4a5c58c0, 0x3f27e29f, 0x4a68bf1b, 0x3f25d89e,
-  0x4a752510, 0x3f23cc2e, 0x4a818a9d, 0x3f21bd4e,
-  0x4a8defc3, 0x3f1fabff, 0x4a9a5480, 0x3f1d9842,
-  0x4aa6b8d5, 0x3f1b8215, 0x4ab31cc1, 0x3f19697a,
-  0x4abf8043, 0x3f174e70, 0x4acbe35b, 0x3f1530f7,
-  0x4ad84609, 0x3f13110f, 0x4ae4a84b, 0x3f10eeb9,
-  0x4af10a22, 0x3f0ec9f5, 0x4afd6b8d, 0x3f0ca2c2,
-  0x4b09cc8c, 0x3f0a7921, 0x4b162d1d, 0x3f084d12,
-  0x4b228d42, 0x3f061e95, 0x4b2eecf8, 0x3f03eda9,
-  0x4b3b4c40, 0x3f01ba50, 0x4b47ab19, 0x3eff8489,
-  0x4b540982, 0x3efd4c54, 0x4b60677c, 0x3efb11b1,
-  0x4b6cc506, 0x3ef8d4a1, 0x4b79221f, 0x3ef69523,
-  0x4b857ec7, 0x3ef45338, 0x4b91dafc, 0x3ef20ee0,
-  0x4b9e36c0, 0x3eefc81a, 0x4baa9211, 0x3eed7ee7,
-  0x4bb6ecef, 0x3eeb3347, 0x4bc34759, 0x3ee8e53a,
-  0x4bcfa150, 0x3ee694c1, 0x4bdbfad1, 0x3ee441da,
-  0x4be853de, 0x3ee1ec87, 0x4bf4ac75, 0x3edf94c7,
-  0x4c010496, 0x3edd3a9a, 0x4c0d5c41, 0x3edade01,
-  0x4c19b374, 0x3ed87efc, 0x4c260a31, 0x3ed61d8a,
-  0x4c326075, 0x3ed3b9ad, 0x4c3eb641, 0x3ed15363,
-  0x4c4b0b94, 0x3eceeaad, 0x4c57606e, 0x3ecc7f8b,
-  0x4c63b4ce, 0x3eca11fe, 0x4c7008b3, 0x3ec7a205,
-  0x4c7c5c1e, 0x3ec52fa0, 0x4c88af0e, 0x3ec2bad0,
-  0x4c950182, 0x3ec04394, 0x4ca1537a, 0x3ebdc9ed,
-  0x4cada4f5, 0x3ebb4ddb, 0x4cb9f5f3, 0x3eb8cf5d,
-  0x4cc64673, 0x3eb64e75, 0x4cd29676, 0x3eb3cb21,
-  0x4cdee5f9, 0x3eb14563, 0x4ceb34fe, 0x3eaebd3a,
-  0x4cf78383, 0x3eac32a6, 0x4d03d189, 0x3ea9a5a8,
-  0x4d101f0e, 0x3ea7163f, 0x4d1c6c11, 0x3ea4846c,
-  0x4d28b894, 0x3ea1f02f, 0x4d350495, 0x3e9f5988,
-  0x4d415013, 0x3e9cc076, 0x4d4d9b0e, 0x3e9a24fb,
-  0x4d59e586, 0x3e978715, 0x4d662f7b, 0x3e94e6c6,
-  0x4d7278eb, 0x3e92440d, 0x4d7ec1d6, 0x3e8f9eeb,
-  0x4d8b0a3d, 0x3e8cf75f, 0x4d97521d, 0x3e8a4d6a,
-  0x4da39978, 0x3e87a10c, 0x4dafe04b, 0x3e84f245,
-  0x4dbc2698, 0x3e824114, 0x4dc86c5d, 0x3e7f8d7b,
-  0x4dd4b19a, 0x3e7cd778, 0x4de0f64f, 0x3e7a1f0d,
-  0x4ded3a7b, 0x3e77643a, 0x4df97e1d, 0x3e74a6fd,
-  0x4e05c135, 0x3e71e759, 0x4e1203c3, 0x3e6f254c,
-  0x4e1e45c6, 0x3e6c60d7, 0x4e2a873e, 0x3e6999fa,
-  0x4e36c82a, 0x3e66d0b4, 0x4e430889, 0x3e640507,
-  0x4e4f485c, 0x3e6136f3, 0x4e5b87a2, 0x3e5e6676,
-  0x4e67c65a, 0x3e5b9392, 0x4e740483, 0x3e58be47,
-  0x4e80421e, 0x3e55e694, 0x4e8c7f2a, 0x3e530c7a,
-  0x4e98bba7, 0x3e502ff9, 0x4ea4f793, 0x3e4d5110,
-  0x4eb132ef, 0x3e4a6fc1, 0x4ebd6db9, 0x3e478c0b,
-  0x4ec9a7f3, 0x3e44a5ef, 0x4ed5e19a, 0x3e41bd6c,
-  0x4ee21aaf, 0x3e3ed282, 0x4eee5331, 0x3e3be532,
-  0x4efa8b20, 0x3e38f57c, 0x4f06c27a, 0x3e360360,
-  0x4f12f941, 0x3e330ede, 0x4f1f2f73, 0x3e3017f6,
-  0x4f2b650f, 0x3e2d1ea8, 0x4f379a16, 0x3e2a22f4,
-  0x4f43ce86, 0x3e2724db, 0x4f500260, 0x3e24245d,
-  0x4f5c35a3, 0x3e212179, 0x4f68684e, 0x3e1e1c30,
-  0x4f749a61, 0x3e1b1482, 0x4f80cbdc, 0x3e180a6f,
-  0x4f8cfcbe, 0x3e14fdf7, 0x4f992d06, 0x3e11ef1b,
-  0x4fa55cb4, 0x3e0eddd9, 0x4fb18bc8, 0x3e0bca34,
-  0x4fbdba40, 0x3e08b42a, 0x4fc9e81e, 0x3e059bbb,
-  0x4fd6155f, 0x3e0280e9, 0x4fe24205, 0x3dff63b2,
-  0x4fee6e0d, 0x3dfc4418, 0x4ffa9979, 0x3df9221a,
-  0x5006c446, 0x3df5fdb8, 0x5012ee76, 0x3df2d6f3,
-  0x501f1807, 0x3defadca, 0x502b40f8, 0x3dec823e,
-  0x5037694b, 0x3de9544f, 0x504390fd, 0x3de623fd,
-  0x504fb80e, 0x3de2f148, 0x505bde7f, 0x3ddfbc30,
-  0x5068044e, 0x3ddc84b5, 0x5074297b, 0x3dd94ad8,
-  0x50804e06, 0x3dd60e99, 0x508c71ee, 0x3dd2cff7,
-  0x50989532, 0x3dcf8ef3, 0x50a4b7d3, 0x3dcc4b8d,
-  0x50b0d9d0, 0x3dc905c5, 0x50bcfb28, 0x3dc5bd9b,
-  0x50c91bda, 0x3dc2730f, 0x50d53be7, 0x3dbf2622,
-  0x50e15b4e, 0x3dbbd6d4, 0x50ed7a0e, 0x3db88524,
-  0x50f99827, 0x3db53113, 0x5105b599, 0x3db1daa2,
-  0x5111d263, 0x3dae81cf, 0x511dee84, 0x3dab269b,
-  0x512a09fc, 0x3da7c907, 0x513624cb, 0x3da46912,
-  0x51423ef0, 0x3da106bd, 0x514e586a, 0x3d9da208,
-  0x515a713a, 0x3d9a3af2, 0x5166895f, 0x3d96d17d,
-  0x5172a0d7, 0x3d9365a8, 0x517eb7a4, 0x3d8ff772,
-  0x518acdc4, 0x3d8c86de, 0x5196e337, 0x3d8913ea,
-  0x51a2f7fc, 0x3d859e96, 0x51af0c13, 0x3d8226e4,
-  0x51bb1f7c, 0x3d7eacd2, 0x51c73235, 0x3d7b3061,
-  0x51d3443f, 0x3d77b192, 0x51df5599, 0x3d743064,
-  0x51eb6643, 0x3d70acd7, 0x51f7763c, 0x3d6d26ec,
-  0x52038584, 0x3d699ea3, 0x520f941a, 0x3d6613fb,
-  0x521ba1fd, 0x3d6286f6, 0x5227af2e, 0x3d5ef793,
-  0x5233bbac, 0x3d5b65d2, 0x523fc776, 0x3d57d1b3,
-  0x524bd28c, 0x3d543b37, 0x5257dced, 0x3d50a25e,
-  0x5263e699, 0x3d4d0728, 0x526fef90, 0x3d496994,
-  0x527bf7d1, 0x3d45c9a4, 0x5287ff5b, 0x3d422757,
-  0x5294062f, 0x3d3e82ae, 0x52a00c4b, 0x3d3adba7,
-  0x52ac11af, 0x3d373245, 0x52b8165b, 0x3d338687,
-  0x52c41a4f, 0x3d2fd86c, 0x52d01d89, 0x3d2c27f6,
-  0x52dc2009, 0x3d287523, 0x52e821cf, 0x3d24bff6,
-  0x52f422db, 0x3d21086c, 0x5300232c, 0x3d1d4e88,
-  0x530c22c1, 0x3d199248, 0x5318219a, 0x3d15d3ad,
-  0x53241fb6, 0x3d1212b7, 0x53301d16, 0x3d0e4f67,
-  0x533c19b8, 0x3d0a89bc, 0x5348159d, 0x3d06c1b6,
-  0x535410c3, 0x3d02f757, 0x53600b2a, 0x3cff2a9d,
-  0x536c04d2, 0x3cfb5b89, 0x5377fdbb, 0x3cf78a1b,
-  0x5383f5e3, 0x3cf3b653, 0x538fed4b, 0x3cefe032,
-  0x539be3f2, 0x3cec07b8, 0x53a7d9d7, 0x3ce82ce4,
-  0x53b3cefa, 0x3ce44fb7, 0x53bfc35b, 0x3ce07031,
-  0x53cbb6f8, 0x3cdc8e52, 0x53d7a9d3, 0x3cd8aa1b,
-  0x53e39be9, 0x3cd4c38b, 0x53ef8d3c, 0x3cd0daa2,
-  0x53fb7dc9, 0x3cccef62, 0x54076d91, 0x3cc901c9,
-  0x54135c94, 0x3cc511d9, 0x541f4ad1, 0x3cc11f90,
-  0x542b3846, 0x3cbd2af0, 0x543724f5, 0x3cb933f9,
-  0x544310dd, 0x3cb53aaa, 0x544efbfc, 0x3cb13f04,
-  0x545ae653, 0x3cad4107, 0x5466cfe1, 0x3ca940b3,
-  0x5472b8a5, 0x3ca53e09, 0x547ea0a0, 0x3ca13908,
-  0x548a87d1, 0x3c9d31b0, 0x54966e36, 0x3c992803,
-  0x54a253d1, 0x3c951bff, 0x54ae38a0, 0x3c910da5,
-  0x54ba1ca3, 0x3c8cfcf6, 0x54c5ffd9, 0x3c88e9f1,
-  0x54d1e242, 0x3c84d496, 0x54ddc3de, 0x3c80bce7,
-  0x54e9a4ac, 0x3c7ca2e2, 0x54f584ac, 0x3c788688,
-  0x550163dc, 0x3c7467d9, 0x550d423d, 0x3c7046d6,
-  0x55191fcf, 0x3c6c237e, 0x5524fc90, 0x3c67fdd1,
-  0x5530d881, 0x3c63d5d1, 0x553cb3a0, 0x3c5fab7c,
-  0x55488dee, 0x3c5b7ed4, 0x5554676a, 0x3c574fd8,
-  0x55604013, 0x3c531e88, 0x556c17e9, 0x3c4eeae5,
-  0x5577eeec, 0x3c4ab4ef, 0x5583c51b, 0x3c467ca6,
-  0x558f9a76, 0x3c42420a, 0x559b6efb, 0x3c3e051b,
-  0x55a742ac, 0x3c39c5da, 0x55b31587, 0x3c358446,
-  0x55bee78c, 0x3c314060, 0x55cab8ba, 0x3c2cfa28,
-  0x55d68911, 0x3c28b19e, 0x55e25890, 0x3c2466c2,
-  0x55ee2738, 0x3c201994, 0x55f9f507, 0x3c1bca16,
-  0x5605c1fd, 0x3c177845, 0x56118e1a, 0x3c132424,
-  0x561d595d, 0x3c0ecdb2, 0x562923c5, 0x3c0a74f0,
-  0x5634ed53, 0x3c0619dc, 0x5640b606, 0x3c01bc78,
-  0x564c7ddd, 0x3bfd5cc4, 0x565844d8, 0x3bf8fac0,
-  0x56640af7, 0x3bf4966c, 0x566fd039, 0x3bf02fc9,
-  0x567b949d, 0x3bebc6d5, 0x56875823, 0x3be75b93,
-  0x56931acb, 0x3be2ee01, 0x569edc94, 0x3bde7e20,
-  0x56aa9d7e, 0x3bda0bf0, 0x56b65d88, 0x3bd59771,
-  0x56c21cb2, 0x3bd120a4, 0x56cddafb, 0x3bcca789,
-  0x56d99864, 0x3bc82c1f, 0x56e554ea, 0x3bc3ae67,
-  0x56f1108f, 0x3bbf2e62, 0x56fccb51, 0x3bbaac0e,
-  0x57088531, 0x3bb6276e, 0x57143e2d, 0x3bb1a080,
-  0x571ff646, 0x3bad1744, 0x572bad7a, 0x3ba88bbc,
-  0x573763c9, 0x3ba3fde7, 0x57431933, 0x3b9f6dc5,
-  0x574ecdb8, 0x3b9adb57, 0x575a8157, 0x3b96469d,
-  0x5766340f, 0x3b91af97, 0x5771e5e0, 0x3b8d1644,
-  0x577d96ca, 0x3b887aa6, 0x578946cc, 0x3b83dcbc,
-  0x5794f5e6, 0x3b7f3c87, 0x57a0a417, 0x3b7a9a07,
-  0x57ac515f, 0x3b75f53c, 0x57b7fdbd, 0x3b714e25,
-  0x57c3a931, 0x3b6ca4c4, 0x57cf53bb, 0x3b67f919,
-  0x57dafd59, 0x3b634b23, 0x57e6a60c, 0x3b5e9ae4,
-  0x57f24dd3, 0x3b59e85a, 0x57fdf4ae, 0x3b553386,
-  0x58099a9c, 0x3b507c69, 0x58153f9d, 0x3b4bc303,
-  0x5820e3b0, 0x3b470753, 0x582c86d5, 0x3b42495a,
-  0x5838290c, 0x3b3d8918, 0x5843ca53, 0x3b38c68e,
-  0x584f6aab, 0x3b3401bb, 0x585b0a13, 0x3b2f3aa0,
-  0x5866a88a, 0x3b2a713d, 0x58724611, 0x3b25a591,
-  0x587de2a7, 0x3b20d79e, 0x58897e4a, 0x3b1c0764,
-  0x589518fc, 0x3b1734e2, 0x58a0b2bb, 0x3b126019,
-  0x58ac4b87, 0x3b0d8909, 0x58b7e35f, 0x3b08afb2,
-  0x58c37a44, 0x3b03d414, 0x58cf1034, 0x3afef630,
-  0x58daa52f, 0x3afa1605, 0x58e63935, 0x3af53395,
-  0x58f1cc45, 0x3af04edf, 0x58fd5e5f, 0x3aeb67e3,
-  0x5908ef82, 0x3ae67ea1, 0x59147fae, 0x3ae1931a,
-  0x59200ee3, 0x3adca54e, 0x592b9d1f, 0x3ad7b53d,
-  0x59372a64, 0x3ad2c2e8, 0x5942b6af, 0x3acdce4d,
-  0x594e4201, 0x3ac8d76f, 0x5959cc5a, 0x3ac3de4c,
-  0x596555b8, 0x3abee2e5, 0x5970de1b, 0x3ab9e53a,
-  0x597c6584, 0x3ab4e54c, 0x5987ebf0, 0x3aafe31b,
-  0x59937161, 0x3aaadea6, 0x599ef5d6, 0x3aa5d7ee,
-  0x59aa794d, 0x3aa0cef3, 0x59b5fbc8, 0x3a9bc3b6,
-  0x59c17d44, 0x3a96b636, 0x59ccfdc2, 0x3a91a674,
-  0x59d87d42, 0x3a8c9470, 0x59e3fbc3, 0x3a87802a,
-  0x59ef7944, 0x3a8269a3, 0x59faf5c5, 0x3a7d50da,
-  0x5a067145, 0x3a7835cf, 0x5a11ebc5, 0x3a731884,
-  0x5a1d6544, 0x3a6df8f8, 0x5a28ddc0, 0x3a68d72b,
-  0x5a34553b, 0x3a63b31d, 0x5a3fcbb3, 0x3a5e8cd0,
-  0x5a4b4128, 0x3a596442, 0x5a56b599, 0x3a543974,
-  0x5a622907, 0x3a4f0c67, 0x5a6d9b70, 0x3a49dd1a,
-  0x5a790cd4, 0x3a44ab8e, 0x5a847d33, 0x3a3f77c3,
-  0x5a8fec8c, 0x3a3a41b9, 0x5a9b5adf, 0x3a350970,
-  0x5aa6c82b, 0x3a2fcee8, 0x5ab23471, 0x3a2a9223,
-  0x5abd9faf, 0x3a25531f, 0x5ac909e5, 0x3a2011de,
-  0x5ad47312, 0x3a1ace5f, 0x5adfdb37, 0x3a1588a2,
-  0x5aeb4253, 0x3a1040a8, 0x5af6a865, 0x3a0af671,
-  0x5b020d6c, 0x3a05a9fd, 0x5b0d716a, 0x3a005b4d,
-  0x5b18d45c, 0x39fb0a60, 0x5b243643, 0x39f5b737,
-  0x5b2f971e, 0x39f061d2, 0x5b3af6ec, 0x39eb0a31,
-  0x5b4655ae, 0x39e5b054, 0x5b51b363, 0x39e0543c,
-  0x5b5d100a, 0x39daf5e8, 0x5b686ba3, 0x39d5955a,
-  0x5b73c62d, 0x39d03291, 0x5b7f1fa9, 0x39cacd8d,
-  0x5b8a7815, 0x39c5664f, 0x5b95cf71, 0x39bffcd7,
-  0x5ba125bd, 0x39ba9125, 0x5bac7af9, 0x39b52339,
-  0x5bb7cf23, 0x39afb313, 0x5bc3223c, 0x39aa40b4,
-  0x5bce7442, 0x39a4cc1c, 0x5bd9c537, 0x399f554b,
-  0x5be51518, 0x3999dc42, 0x5bf063e6, 0x399460ff,
-  0x5bfbb1a0, 0x398ee385, 0x5c06fe46, 0x398963d2,
-  0x5c1249d8, 0x3983e1e8, 0x5c1d9454, 0x397e5dc6,
-  0x5c28ddbb, 0x3978d76c, 0x5c34260c, 0x39734edc,
-  0x5c3f6d47, 0x396dc414, 0x5c4ab36b, 0x39683715,
-  0x5c55f878, 0x3962a7e0, 0x5c613c6d, 0x395d1675,
-  0x5c6c7f4a, 0x395782d3, 0x5c77c10e, 0x3951ecfc,
-  0x5c8301b9, 0x394c54ee, 0x5c8e414b, 0x3946baac,
-  0x5c997fc4, 0x39411e33, 0x5ca4bd21, 0x393b7f86,
-  0x5caff965, 0x3935dea4, 0x5cbb348d, 0x39303b8e,
-  0x5cc66e99, 0x392a9642, 0x5cd1a78a, 0x3924eec3,
-  0x5cdcdf5e, 0x391f4510, 0x5ce81615, 0x39199929,
-  0x5cf34baf, 0x3913eb0e, 0x5cfe802b, 0x390e3ac0,
-  0x5d09b389, 0x3908883f, 0x5d14e5c9, 0x3902d38b,
-  0x5d2016e9, 0x38fd1ca4, 0x5d2b46ea, 0x38f7638b,
-  0x5d3675cb, 0x38f1a840, 0x5d41a38c, 0x38ebeac2,
-  0x5d4cd02c, 0x38e62b13, 0x5d57fbaa, 0x38e06932,
-  0x5d632608, 0x38daa520, 0x5d6e4f43, 0x38d4dedd,
-  0x5d79775c, 0x38cf1669, 0x5d849e51, 0x38c94bc4,
-  0x5d8fc424, 0x38c37eef, 0x5d9ae8d2, 0x38bdafea,
-  0x5da60c5d, 0x38b7deb4, 0x5db12ec3, 0x38b20b4f,
-  0x5dbc5004, 0x38ac35ba, 0x5dc7701f, 0x38a65df6,
-  0x5dd28f15, 0x38a08402, 0x5dddace4, 0x389aa7e0,
-  0x5de8c98c, 0x3894c98f, 0x5df3e50d, 0x388ee910,
-  0x5dfeff67, 0x38890663, 0x5e0a1898, 0x38832187,
-  0x5e1530a1, 0x387d3a7e, 0x5e204781, 0x38775147,
-  0x5e2b5d38, 0x387165e3, 0x5e3671c5, 0x386b7852,
-  0x5e418528, 0x38658894, 0x5e4c9760, 0x385f96a9,
-  0x5e57a86d, 0x3859a292, 0x5e62b84f, 0x3853ac4f,
-  0x5e6dc705, 0x384db3e0, 0x5e78d48e, 0x3847b946,
-  0x5e83e0eb, 0x3841bc7f, 0x5e8eec1b, 0x383bbd8e,
-  0x5e99f61d, 0x3835bc71, 0x5ea4fef0, 0x382fb92a,
-  0x5eb00696, 0x3829b3b9, 0x5ebb0d0d, 0x3823ac1d,
-  0x5ec61254, 0x381da256, 0x5ed1166b, 0x38179666,
-  0x5edc1953, 0x3811884d, 0x5ee71b0a, 0x380b780a,
-  0x5ef21b90, 0x3805659e, 0x5efd1ae4, 0x37ff5109,
-  0x5f081907, 0x37f93a4b, 0x5f1315f7, 0x37f32165,
-  0x5f1e11b5, 0x37ed0657, 0x5f290c3f, 0x37e6e921,
-  0x5f340596, 0x37e0c9c3, 0x5f3efdb9, 0x37daa83d,
-  0x5f49f4a8, 0x37d48490, 0x5f54ea62, 0x37ce5ebd,
-  0x5f5fdee6, 0x37c836c2, 0x5f6ad235, 0x37c20ca1,
-  0x5f75c44e, 0x37bbe05a, 0x5f80b531, 0x37b5b1ec,
-  0x5f8ba4dc, 0x37af8159, 0x5f969350, 0x37a94ea0,
-  0x5fa1808c, 0x37a319c2, 0x5fac6c91, 0x379ce2be,
-  0x5fb7575c, 0x3796a996, 0x5fc240ef, 0x37906e49,
-  0x5fcd2948, 0x378a30d8, 0x5fd81067, 0x3783f143,
-  0x5fe2f64c, 0x377daf89, 0x5feddaf6, 0x37776bac,
-  0x5ff8be65, 0x377125ac, 0x6003a099, 0x376add88,
-  0x600e8190, 0x37649341, 0x6019614c, 0x375e46d8,
-  0x60243fca, 0x3757f84c, 0x602f1d0b, 0x3751a79e,
-  0x6039f90f, 0x374b54ce, 0x6044d3d4, 0x3744ffdd,
-  0x604fad5b, 0x373ea8ca, 0x605a85a3, 0x37384f95,
-  0x60655cac, 0x3731f440, 0x60703275, 0x372b96ca,
-  0x607b06fe, 0x37253733, 0x6085da46, 0x371ed57c,
-  0x6090ac4d, 0x371871a5, 0x609b7d13, 0x37120bae,
-  0x60a64c97, 0x370ba398, 0x60b11ad9, 0x37053962,
-  0x60bbe7d8, 0x36fecd0e, 0x60c6b395, 0x36f85e9a,
-  0x60d17e0d, 0x36f1ee09, 0x60dc4742, 0x36eb7b58,
-  0x60e70f32, 0x36e5068a, 0x60f1d5de, 0x36de8f9e,
-  0x60fc9b44, 0x36d81695, 0x61075f65, 0x36d19b6e,
-  0x61122240, 0x36cb1e2a, 0x611ce3d5, 0x36c49ec9,
-  0x6127a423, 0x36be1d4c, 0x61326329, 0x36b799b3,
-  0x613d20e8, 0x36b113fd, 0x6147dd5f, 0x36aa8c2c,
-  0x6152988d, 0x36a4023f, 0x615d5273, 0x369d7637,
-  0x61680b0f, 0x3696e814, 0x6172c262, 0x369057d6,
-  0x617d786a, 0x3689c57d, 0x61882d28, 0x3683310b,
-  0x6192e09b, 0x367c9a7e, 0x619d92c2, 0x367601d7,
-  0x61a8439e, 0x366f6717, 0x61b2f32e, 0x3668ca3e,
-  0x61bda171, 0x36622b4c, 0x61c84e67, 0x365b8a41,
-  0x61d2fa0f, 0x3654e71d, 0x61dda46a, 0x364e41e2,
-  0x61e84d76, 0x36479a8e, 0x61f2f534, 0x3640f123,
-  0x61fd9ba3, 0x363a45a0, 0x620840c2, 0x36339806,
-  0x6212e492, 0x362ce855, 0x621d8711, 0x3626368d,
-  0x6228283f, 0x361f82af, 0x6232c81c, 0x3618ccba,
-  0x623d66a8, 0x361214b0, 0x624803e2, 0x360b5a90,
-  0x62529fca, 0x36049e5b, 0x625d3a5e, 0x35fde011,
-  0x6267d3a0, 0x35f71fb1, 0x62726b8e, 0x35f05d3d,
-  0x627d0228, 0x35e998b5, 0x6287976e, 0x35e2d219,
-  0x62922b5e, 0x35dc0968, 0x629cbdfa, 0x35d53ea5,
-  0x62a74f40, 0x35ce71ce, 0x62b1df30, 0x35c7a2e3,
-  0x62bc6dca, 0x35c0d1e7, 0x62c6fb0c, 0x35b9fed7,
-  0x62d186f8, 0x35b329b5, 0x62dc118c, 0x35ac5282,
-  0x62e69ac8, 0x35a5793c, 0x62f122ab, 0x359e9de5,
-  0x62fba936, 0x3597c07d, 0x63062e67, 0x3590e104,
-  0x6310b23e, 0x3589ff7a, 0x631b34bc, 0x35831be0,
-  0x6325b5df, 0x357c3636, 0x633035a7, 0x35754e7c,
-  0x633ab414, 0x356e64b2, 0x63453125, 0x356778d9,
-  0x634facda, 0x35608af1, 0x635a2733, 0x35599afa,
-  0x6364a02e, 0x3552a8f4, 0x636f17cc, 0x354bb4e1,
-  0x63798e0d, 0x3544bebf, 0x638402ef, 0x353dc68f,
-  0x638e7673, 0x3536cc52, 0x6398e898, 0x352fd008,
-  0x63a3595e, 0x3528d1b1, 0x63adc8c4, 0x3521d14d,
-  0x63b836ca, 0x351acedd, 0x63c2a36f, 0x3513ca60,
-  0x63cd0eb3, 0x350cc3d8, 0x63d77896, 0x3505bb44,
-  0x63e1e117, 0x34feb0a5, 0x63ec4837, 0x34f7a3fb,
-  0x63f6adf3, 0x34f09546, 0x6401124d, 0x34e98487,
-  0x640b7543, 0x34e271bd, 0x6415d6d5, 0x34db5cea,
-  0x64203704, 0x34d4460c, 0x642a95ce, 0x34cd2d26,
-  0x6434f332, 0x34c61236, 0x643f4f32, 0x34bef53d,
-  0x6449a9cc, 0x34b7d63c, 0x645402ff, 0x34b0b533,
-  0x645e5acc, 0x34a99221, 0x6468b132, 0x34a26d08,
-  0x64730631, 0x349b45e7, 0x647d59c8, 0x34941cbf,
-  0x6487abf7, 0x348cf190, 0x6491fcbe, 0x3485c45b,
-  0x649c4c1b, 0x347e951f, 0x64a69a0f, 0x347763dd,
-  0x64b0e699, 0x34703095, 0x64bb31ba, 0x3468fb47,
-  0x64c57b6f, 0x3461c3f5, 0x64cfc3ba, 0x345a8a9d,
-  0x64da0a9a, 0x34534f41, 0x64e4500e, 0x344c11e0,
-  0x64ee9415, 0x3444d27b, 0x64f8d6b0, 0x343d9112,
-  0x650317df, 0x34364da6, 0x650d57a0, 0x342f0836,
-  0x651795f3, 0x3427c0c3, 0x6521d2d8, 0x3420774d,
-  0x652c0e4f, 0x34192bd5, 0x65364857, 0x3411de5b,
-  0x654080ef, 0x340a8edf, 0x654ab818, 0x34033d61,
-  0x6554edd1, 0x33fbe9e2, 0x655f2219, 0x33f49462,
-  0x656954f1, 0x33ed3ce1, 0x65738657, 0x33e5e360,
-  0x657db64c, 0x33de87de, 0x6587e4cf, 0x33d72a5d,
-  0x659211df, 0x33cfcadc, 0x659c3d7c, 0x33c8695b,
-  0x65a667a7, 0x33c105db, 0x65b0905d, 0x33b9a05d,
-  0x65bab7a0, 0x33b238e0, 0x65c4dd6e, 0x33aacf65,
-  0x65cf01c8, 0x33a363ec, 0x65d924ac, 0x339bf675,
-  0x65e3461b, 0x33948701, 0x65ed6614, 0x338d1590,
-  0x65f78497, 0x3385a222, 0x6601a1a2, 0x337e2cb7,
-  0x660bbd37, 0x3376b551, 0x6615d754, 0x336f3bee,
-  0x661feffa, 0x3367c090, 0x662a0727, 0x33604336,
-  0x66341cdb, 0x3358c3e2, 0x663e3117, 0x33514292,
-  0x664843d9, 0x3349bf48, 0x66525521, 0x33423a04,
-  0x665c64ef, 0x333ab2c6, 0x66667342, 0x3333298f,
-  0x6670801a, 0x332b9e5e, 0x667a8b77, 0x33241134,
-  0x66849558, 0x331c8211, 0x668e9dbd, 0x3314f0f6,
-  0x6698a4a6, 0x330d5de3, 0x66a2aa11, 0x3305c8d7,
-  0x66acadff, 0x32fe31d5, 0x66b6b070, 0x32f698db,
-  0x66c0b162, 0x32eefdea, 0x66cab0d6, 0x32e76102,
-  0x66d4aecb, 0x32dfc224, 0x66deab41, 0x32d82150,
-  0x66e8a637, 0x32d07e85, 0x66f29fad, 0x32c8d9c6,
-  0x66fc97a3, 0x32c13311, 0x67068e18, 0x32b98a67,
-  0x6710830c, 0x32b1dfc9, 0x671a767e, 0x32aa3336,
-  0x6724686e, 0x32a284b0, 0x672e58dc, 0x329ad435,
-  0x673847c8, 0x329321c7, 0x67423530, 0x328b6d66,
-  0x674c2115, 0x3283b712, 0x67560b76, 0x327bfecc,
-  0x675ff452, 0x32744493, 0x6769dbaa, 0x326c8868,
-  0x6773c17d, 0x3264ca4c, 0x677da5cb, 0x325d0a3e,
-  0x67878893, 0x32554840, 0x679169d5, 0x324d8450,
-  0x679b4990, 0x3245be70, 0x67a527c4, 0x323df6a0,
-  0x67af0472, 0x32362ce0, 0x67b8df97, 0x322e6130,
-  0x67c2b934, 0x32269391, 0x67cc9149, 0x321ec403,
-  0x67d667d5, 0x3216f287, 0x67e03cd8, 0x320f1f1c,
-  0x67ea1052, 0x320749c3, 0x67f3e241, 0x31ff727c,
-  0x67fdb2a7, 0x31f79948, 0x68078181, 0x31efbe27,
-  0x68114ed0, 0x31e7e118, 0x681b1a94, 0x31e0021e,
-  0x6824e4cc, 0x31d82137, 0x682ead78, 0x31d03e64,
-  0x68387498, 0x31c859a5, 0x68423a2a, 0x31c072fb,
-  0x684bfe2f, 0x31b88a66, 0x6855c0a6, 0x31b09fe7,
-  0x685f8190, 0x31a8b37c, 0x686940ea, 0x31a0c528,
-  0x6872feb6, 0x3198d4ea, 0x687cbaf3, 0x3190e2c3,
-  0x688675a0, 0x3188eeb2, 0x68902ebd, 0x3180f8b8,
-  0x6899e64a, 0x317900d6, 0x68a39c46, 0x3171070c,
-  0x68ad50b1, 0x31690b59, 0x68b7038b, 0x31610dbf,
-  0x68c0b4d2, 0x31590e3e, 0x68ca6488, 0x31510cd5,
-  0x68d412ab, 0x31490986, 0x68ddbf3b, 0x31410450,
-  0x68e76a37, 0x3138fd35, 0x68f113a0, 0x3130f433,
-  0x68fabb75, 0x3128e94c, 0x690461b5, 0x3120dc80,
-  0x690e0661, 0x3118cdcf, 0x6917a977, 0x3110bd39,
-  0x69214af8, 0x3108aabf, 0x692aeae3, 0x31009661,
-  0x69348937, 0x30f8801f, 0x693e25f5, 0x30f067fb,
-  0x6947c11c, 0x30e84df3, 0x69515aab, 0x30e03208,
-  0x695af2a3, 0x30d8143b, 0x69648902, 0x30cff48c,
-  0x696e1dc9, 0x30c7d2fb, 0x6977b0f7, 0x30bfaf89,
-  0x6981428c, 0x30b78a36, 0x698ad287, 0x30af6302,
-  0x699460e8, 0x30a739ed, 0x699dedaf, 0x309f0ef8,
-  0x69a778db, 0x3096e223, 0x69b1026c, 0x308eb36f,
-  0x69ba8a61, 0x308682dc, 0x69c410ba, 0x307e5069,
-  0x69cd9578, 0x30761c18, 0x69d71899, 0x306de5e9,
-  0x69e09a1c, 0x3065addb, 0x69ea1a03, 0x305d73f0,
-  0x69f3984c, 0x30553828, 0x69fd14f6, 0x304cfa83,
-  0x6a069003, 0x3044bb00, 0x6a100970, 0x303c79a2,
-  0x6a19813f, 0x30343667, 0x6a22f76e, 0x302bf151,
-  0x6a2c6bfd, 0x3023aa5f, 0x6a35deeb, 0x301b6193,
-  0x6a3f503a, 0x301316eb, 0x6a48bfe7, 0x300aca69,
-  0x6a522df3, 0x30027c0c, 0x6a5b9a5d, 0x2ffa2bd6,
-  0x6a650525, 0x2ff1d9c7, 0x6a6e6e4b, 0x2fe985de,
-  0x6a77d5ce, 0x2fe1301c, 0x6a813bae, 0x2fd8d882,
-  0x6a8a9fea, 0x2fd07f0f, 0x6a940283, 0x2fc823c5,
-  0x6a9d6377, 0x2fbfc6a3, 0x6aa6c2c6, 0x2fb767aa,
-  0x6ab02071, 0x2faf06da, 0x6ab97c77, 0x2fa6a433,
-  0x6ac2d6d6, 0x2f9e3fb6, 0x6acc2f90, 0x2f95d963,
-  0x6ad586a3, 0x2f8d713a, 0x6adedc10, 0x2f85073c,
-  0x6ae82fd5, 0x2f7c9b69, 0x6af181f3, 0x2f742dc1,
-  0x6afad269, 0x2f6bbe45, 0x6b042137, 0x2f634cf5,
-  0x6b0d6e5c, 0x2f5ad9d1, 0x6b16b9d9, 0x2f5264da,
-  0x6b2003ac, 0x2f49ee0f, 0x6b294bd5, 0x2f417573,
-  0x6b329255, 0x2f38fb03, 0x6b3bd72a, 0x2f307ec2,
-  0x6b451a55, 0x2f2800af, 0x6b4e5bd4, 0x2f1f80ca,
-  0x6b579ba8, 0x2f16ff14, 0x6b60d9d0, 0x2f0e7b8e,
-  0x6b6a164d, 0x2f05f637, 0x6b73511c, 0x2efd6f10,
-  0x6b7c8a3f, 0x2ef4e619, 0x6b85c1b5, 0x2eec5b53,
-  0x6b8ef77d, 0x2ee3cebe, 0x6b982b97, 0x2edb405a,
-  0x6ba15e03, 0x2ed2b027, 0x6baa8ec0, 0x2eca1e27,
-  0x6bb3bdce, 0x2ec18a58, 0x6bbceb2d, 0x2eb8f4bc,
-  0x6bc616dd, 0x2eb05d53, 0x6bcf40dc, 0x2ea7c41e,
-  0x6bd8692b, 0x2e9f291b, 0x6be18fc9, 0x2e968c4d,
-  0x6beab4b6, 0x2e8dedb3, 0x6bf3d7f2, 0x2e854d4d,
-  0x6bfcf97c, 0x2e7cab1c, 0x6c061953, 0x2e740720,
-  0x6c0f3779, 0x2e6b615a, 0x6c1853eb, 0x2e62b9ca,
-  0x6c216eaa, 0x2e5a1070, 0x6c2a87b6, 0x2e51654c,
-  0x6c339f0e, 0x2e48b860, 0x6c3cb4b1, 0x2e4009aa,
-  0x6c45c8a0, 0x2e37592c, 0x6c4edada, 0x2e2ea6e6,
-  0x6c57eb5e, 0x2e25f2d8, 0x6c60fa2d, 0x2e1d3d03,
-  0x6c6a0746, 0x2e148566, 0x6c7312a9, 0x2e0bcc03,
-  0x6c7c1c55, 0x2e0310d9, 0x6c85244a, 0x2dfa53e9,
-  0x6c8e2a87, 0x2df19534, 0x6c972f0d, 0x2de8d4b8,
-  0x6ca031da, 0x2de01278, 0x6ca932ef, 0x2dd74e73,
-  0x6cb2324c, 0x2dce88aa, 0x6cbb2fef, 0x2dc5c11c,
-  0x6cc42bd9, 0x2dbcf7cb, 0x6ccd2609, 0x2db42cb6,
-  0x6cd61e7f, 0x2dab5fdf, 0x6cdf153a, 0x2da29144,
-  0x6ce80a3a, 0x2d99c0e7, 0x6cf0fd80, 0x2d90eec8,
-  0x6cf9ef09, 0x2d881ae8, 0x6d02ded7, 0x2d7f4545,
-  0x6d0bcce8, 0x2d766de2, 0x6d14b93d, 0x2d6d94bf,
-  0x6d1da3d5, 0x2d64b9da, 0x6d268cb0, 0x2d5bdd36,
-  0x6d2f73cd, 0x2d52fed2, 0x6d38592c, 0x2d4a1eaf,
-  0x6d413ccd, 0x2d413ccd, 0x6d4a1eaf, 0x2d38592c,
-  0x6d52fed2, 0x2d2f73cd, 0x6d5bdd36, 0x2d268cb0,
-  0x6d64b9da, 0x2d1da3d5, 0x6d6d94bf, 0x2d14b93d,
-  0x6d766de2, 0x2d0bcce8, 0x6d7f4545, 0x2d02ded7,
-  0x6d881ae8, 0x2cf9ef09, 0x6d90eec8, 0x2cf0fd80,
-  0x6d99c0e7, 0x2ce80a3a, 0x6da29144, 0x2cdf153a,
-  0x6dab5fdf, 0x2cd61e7f, 0x6db42cb6, 0x2ccd2609,
-  0x6dbcf7cb, 0x2cc42bd9, 0x6dc5c11c, 0x2cbb2fef,
-  0x6dce88aa, 0x2cb2324c, 0x6dd74e73, 0x2ca932ef,
-  0x6de01278, 0x2ca031da, 0x6de8d4b8, 0x2c972f0d,
-  0x6df19534, 0x2c8e2a87, 0x6dfa53e9, 0x2c85244a,
-  0x6e0310d9, 0x2c7c1c55, 0x6e0bcc03, 0x2c7312a9,
-  0x6e148566, 0x2c6a0746, 0x6e1d3d03, 0x2c60fa2d,
-  0x6e25f2d8, 0x2c57eb5e, 0x6e2ea6e6, 0x2c4edada,
-  0x6e37592c, 0x2c45c8a0, 0x6e4009aa, 0x2c3cb4b1,
-  0x6e48b860, 0x2c339f0e, 0x6e51654c, 0x2c2a87b6,
-  0x6e5a1070, 0x2c216eaa, 0x6e62b9ca, 0x2c1853eb,
-  0x6e6b615a, 0x2c0f3779, 0x6e740720, 0x2c061953,
-  0x6e7cab1c, 0x2bfcf97c, 0x6e854d4d, 0x2bf3d7f2,
-  0x6e8dedb3, 0x2beab4b6, 0x6e968c4d, 0x2be18fc9,
-  0x6e9f291b, 0x2bd8692b, 0x6ea7c41e, 0x2bcf40dc,
-  0x6eb05d53, 0x2bc616dd, 0x6eb8f4bc, 0x2bbceb2d,
-  0x6ec18a58, 0x2bb3bdce, 0x6eca1e27, 0x2baa8ec0,
-  0x6ed2b027, 0x2ba15e03, 0x6edb405a, 0x2b982b97,
-  0x6ee3cebe, 0x2b8ef77d, 0x6eec5b53, 0x2b85c1b5,
-  0x6ef4e619, 0x2b7c8a3f, 0x6efd6f10, 0x2b73511c,
-  0x6f05f637, 0x2b6a164d, 0x6f0e7b8e, 0x2b60d9d0,
-  0x6f16ff14, 0x2b579ba8, 0x6f1f80ca, 0x2b4e5bd4,
-  0x6f2800af, 0x2b451a55, 0x6f307ec2, 0x2b3bd72a,
-  0x6f38fb03, 0x2b329255, 0x6f417573, 0x2b294bd5,
-  0x6f49ee0f, 0x2b2003ac, 0x6f5264da, 0x2b16b9d9,
-  0x6f5ad9d1, 0x2b0d6e5c, 0x6f634cf5, 0x2b042137,
-  0x6f6bbe45, 0x2afad269, 0x6f742dc1, 0x2af181f3,
-  0x6f7c9b69, 0x2ae82fd5, 0x6f85073c, 0x2adedc10,
-  0x6f8d713a, 0x2ad586a3, 0x6f95d963, 0x2acc2f90,
-  0x6f9e3fb6, 0x2ac2d6d6, 0x6fa6a433, 0x2ab97c77,
-  0x6faf06da, 0x2ab02071, 0x6fb767aa, 0x2aa6c2c6,
-  0x6fbfc6a3, 0x2a9d6377, 0x6fc823c5, 0x2a940283,
-  0x6fd07f0f, 0x2a8a9fea, 0x6fd8d882, 0x2a813bae,
-  0x6fe1301c, 0x2a77d5ce, 0x6fe985de, 0x2a6e6e4b,
-  0x6ff1d9c7, 0x2a650525, 0x6ffa2bd6, 0x2a5b9a5d,
-  0x70027c0c, 0x2a522df3, 0x700aca69, 0x2a48bfe7,
-  0x701316eb, 0x2a3f503a, 0x701b6193, 0x2a35deeb,
-  0x7023aa5f, 0x2a2c6bfd, 0x702bf151, 0x2a22f76e,
-  0x70343667, 0x2a19813f, 0x703c79a2, 0x2a100970,
-  0x7044bb00, 0x2a069003, 0x704cfa83, 0x29fd14f6,
-  0x70553828, 0x29f3984c, 0x705d73f0, 0x29ea1a03,
-  0x7065addb, 0x29e09a1c, 0x706de5e9, 0x29d71899,
-  0x70761c18, 0x29cd9578, 0x707e5069, 0x29c410ba,
-  0x708682dc, 0x29ba8a61, 0x708eb36f, 0x29b1026c,
-  0x7096e223, 0x29a778db, 0x709f0ef8, 0x299dedaf,
-  0x70a739ed, 0x299460e8, 0x70af6302, 0x298ad287,
-  0x70b78a36, 0x2981428c, 0x70bfaf89, 0x2977b0f7,
-  0x70c7d2fb, 0x296e1dc9, 0x70cff48c, 0x29648902,
-  0x70d8143b, 0x295af2a3, 0x70e03208, 0x29515aab,
-  0x70e84df3, 0x2947c11c, 0x70f067fb, 0x293e25f5,
-  0x70f8801f, 0x29348937, 0x71009661, 0x292aeae3,
-  0x7108aabf, 0x29214af8, 0x7110bd39, 0x2917a977,
-  0x7118cdcf, 0x290e0661, 0x7120dc80, 0x290461b5,
-  0x7128e94c, 0x28fabb75, 0x7130f433, 0x28f113a0,
-  0x7138fd35, 0x28e76a37, 0x71410450, 0x28ddbf3b,
-  0x71490986, 0x28d412ab, 0x71510cd5, 0x28ca6488,
-  0x71590e3e, 0x28c0b4d2, 0x71610dbf, 0x28b7038b,
-  0x71690b59, 0x28ad50b1, 0x7171070c, 0x28a39c46,
-  0x717900d6, 0x2899e64a, 0x7180f8b8, 0x28902ebd,
-  0x7188eeb2, 0x288675a0, 0x7190e2c3, 0x287cbaf3,
-  0x7198d4ea, 0x2872feb6, 0x71a0c528, 0x286940ea,
-  0x71a8b37c, 0x285f8190, 0x71b09fe7, 0x2855c0a6,
-  0x71b88a66, 0x284bfe2f, 0x71c072fb, 0x28423a2a,
-  0x71c859a5, 0x28387498, 0x71d03e64, 0x282ead78,
-  0x71d82137, 0x2824e4cc, 0x71e0021e, 0x281b1a94,
-  0x71e7e118, 0x28114ed0, 0x71efbe27, 0x28078181,
-  0x71f79948, 0x27fdb2a7, 0x71ff727c, 0x27f3e241,
-  0x720749c3, 0x27ea1052, 0x720f1f1c, 0x27e03cd8,
-  0x7216f287, 0x27d667d5, 0x721ec403, 0x27cc9149,
-  0x72269391, 0x27c2b934, 0x722e6130, 0x27b8df97,
-  0x72362ce0, 0x27af0472, 0x723df6a0, 0x27a527c4,
-  0x7245be70, 0x279b4990, 0x724d8450, 0x279169d5,
-  0x72554840, 0x27878893, 0x725d0a3e, 0x277da5cb,
-  0x7264ca4c, 0x2773c17d, 0x726c8868, 0x2769dbaa,
-  0x72744493, 0x275ff452, 0x727bfecc, 0x27560b76,
-  0x7283b712, 0x274c2115, 0x728b6d66, 0x27423530,
-  0x729321c7, 0x273847c8, 0x729ad435, 0x272e58dc,
-  0x72a284b0, 0x2724686e, 0x72aa3336, 0x271a767e,
-  0x72b1dfc9, 0x2710830c, 0x72b98a67, 0x27068e18,
-  0x72c13311, 0x26fc97a3, 0x72c8d9c6, 0x26f29fad,
-  0x72d07e85, 0x26e8a637, 0x72d82150, 0x26deab41,
-  0x72dfc224, 0x26d4aecb, 0x72e76102, 0x26cab0d6,
-  0x72eefdea, 0x26c0b162, 0x72f698db, 0x26b6b070,
-  0x72fe31d5, 0x26acadff, 0x7305c8d7, 0x26a2aa11,
-  0x730d5de3, 0x2698a4a6, 0x7314f0f6, 0x268e9dbd,
-  0x731c8211, 0x26849558, 0x73241134, 0x267a8b77,
-  0x732b9e5e, 0x2670801a, 0x7333298f, 0x26667342,
-  0x733ab2c6, 0x265c64ef, 0x73423a04, 0x26525521,
-  0x7349bf48, 0x264843d9, 0x73514292, 0x263e3117,
-  0x7358c3e2, 0x26341cdb, 0x73604336, 0x262a0727,
-  0x7367c090, 0x261feffa, 0x736f3bee, 0x2615d754,
-  0x7376b551, 0x260bbd37, 0x737e2cb7, 0x2601a1a2,
-  0x7385a222, 0x25f78497, 0x738d1590, 0x25ed6614,
-  0x73948701, 0x25e3461b, 0x739bf675, 0x25d924ac,
-  0x73a363ec, 0x25cf01c8, 0x73aacf65, 0x25c4dd6e,
-  0x73b238e0, 0x25bab7a0, 0x73b9a05d, 0x25b0905d,
-  0x73c105db, 0x25a667a7, 0x73c8695b, 0x259c3d7c,
-  0x73cfcadc, 0x259211df, 0x73d72a5d, 0x2587e4cf,
-  0x73de87de, 0x257db64c, 0x73e5e360, 0x25738657,
-  0x73ed3ce1, 0x256954f1, 0x73f49462, 0x255f2219,
-  0x73fbe9e2, 0x2554edd1, 0x74033d61, 0x254ab818,
-  0x740a8edf, 0x254080ef, 0x7411de5b, 0x25364857,
-  0x74192bd5, 0x252c0e4f, 0x7420774d, 0x2521d2d8,
-  0x7427c0c3, 0x251795f3, 0x742f0836, 0x250d57a0,
-  0x74364da6, 0x250317df, 0x743d9112, 0x24f8d6b0,
-  0x7444d27b, 0x24ee9415, 0x744c11e0, 0x24e4500e,
-  0x74534f41, 0x24da0a9a, 0x745a8a9d, 0x24cfc3ba,
-  0x7461c3f5, 0x24c57b6f, 0x7468fb47, 0x24bb31ba,
-  0x74703095, 0x24b0e699, 0x747763dd, 0x24a69a0f,
-  0x747e951f, 0x249c4c1b, 0x7485c45b, 0x2491fcbe,
-  0x748cf190, 0x2487abf7, 0x74941cbf, 0x247d59c8,
-  0x749b45e7, 0x24730631, 0x74a26d08, 0x2468b132,
-  0x74a99221, 0x245e5acc, 0x74b0b533, 0x245402ff,
-  0x74b7d63c, 0x2449a9cc, 0x74bef53d, 0x243f4f32,
-  0x74c61236, 0x2434f332, 0x74cd2d26, 0x242a95ce,
-  0x74d4460c, 0x24203704, 0x74db5cea, 0x2415d6d5,
-  0x74e271bd, 0x240b7543, 0x74e98487, 0x2401124d,
-  0x74f09546, 0x23f6adf3, 0x74f7a3fb, 0x23ec4837,
-  0x74feb0a5, 0x23e1e117, 0x7505bb44, 0x23d77896,
-  0x750cc3d8, 0x23cd0eb3, 0x7513ca60, 0x23c2a36f,
-  0x751acedd, 0x23b836ca, 0x7521d14d, 0x23adc8c4,
-  0x7528d1b1, 0x23a3595e, 0x752fd008, 0x2398e898,
-  0x7536cc52, 0x238e7673, 0x753dc68f, 0x238402ef,
-  0x7544bebf, 0x23798e0d, 0x754bb4e1, 0x236f17cc,
-  0x7552a8f4, 0x2364a02e, 0x75599afa, 0x235a2733,
-  0x75608af1, 0x234facda, 0x756778d9, 0x23453125,
-  0x756e64b2, 0x233ab414, 0x75754e7c, 0x233035a7,
-  0x757c3636, 0x2325b5df, 0x75831be0, 0x231b34bc,
-  0x7589ff7a, 0x2310b23e, 0x7590e104, 0x23062e67,
-  0x7597c07d, 0x22fba936, 0x759e9de5, 0x22f122ab,
-  0x75a5793c, 0x22e69ac8, 0x75ac5282, 0x22dc118c,
-  0x75b329b5, 0x22d186f8, 0x75b9fed7, 0x22c6fb0c,
-  0x75c0d1e7, 0x22bc6dca, 0x75c7a2e3, 0x22b1df30,
-  0x75ce71ce, 0x22a74f40, 0x75d53ea5, 0x229cbdfa,
-  0x75dc0968, 0x22922b5e, 0x75e2d219, 0x2287976e,
-  0x75e998b5, 0x227d0228, 0x75f05d3d, 0x22726b8e,
-  0x75f71fb1, 0x2267d3a0, 0x75fde011, 0x225d3a5e,
-  0x76049e5b, 0x22529fca, 0x760b5a90, 0x224803e2,
-  0x761214b0, 0x223d66a8, 0x7618ccba, 0x2232c81c,
-  0x761f82af, 0x2228283f, 0x7626368d, 0x221d8711,
-  0x762ce855, 0x2212e492, 0x76339806, 0x220840c2,
-  0x763a45a0, 0x21fd9ba3, 0x7640f123, 0x21f2f534,
-  0x76479a8e, 0x21e84d76, 0x764e41e2, 0x21dda46a,
-  0x7654e71d, 0x21d2fa0f, 0x765b8a41, 0x21c84e67,
-  0x76622b4c, 0x21bda171, 0x7668ca3e, 0x21b2f32e,
-  0x766f6717, 0x21a8439e, 0x767601d7, 0x219d92c2,
-  0x767c9a7e, 0x2192e09b, 0x7683310b, 0x21882d28,
-  0x7689c57d, 0x217d786a, 0x769057d6, 0x2172c262,
-  0x7696e814, 0x21680b0f, 0x769d7637, 0x215d5273,
-  0x76a4023f, 0x2152988d, 0x76aa8c2c, 0x2147dd5f,
-  0x76b113fd, 0x213d20e8, 0x76b799b3, 0x21326329,
-  0x76be1d4c, 0x2127a423, 0x76c49ec9, 0x211ce3d5,
-  0x76cb1e2a, 0x21122240, 0x76d19b6e, 0x21075f65,
-  0x76d81695, 0x20fc9b44, 0x76de8f9e, 0x20f1d5de,
-  0x76e5068a, 0x20e70f32, 0x76eb7b58, 0x20dc4742,
-  0x76f1ee09, 0x20d17e0d, 0x76f85e9a, 0x20c6b395,
-  0x76fecd0e, 0x20bbe7d8, 0x77053962, 0x20b11ad9,
-  0x770ba398, 0x20a64c97, 0x77120bae, 0x209b7d13,
-  0x771871a5, 0x2090ac4d, 0x771ed57c, 0x2085da46,
-  0x77253733, 0x207b06fe, 0x772b96ca, 0x20703275,
-  0x7731f440, 0x20655cac, 0x77384f95, 0x205a85a3,
-  0x773ea8ca, 0x204fad5b, 0x7744ffdd, 0x2044d3d4,
-  0x774b54ce, 0x2039f90f, 0x7751a79e, 0x202f1d0b,
-  0x7757f84c, 0x20243fca, 0x775e46d8, 0x2019614c,
-  0x77649341, 0x200e8190, 0x776add88, 0x2003a099,
-  0x777125ac, 0x1ff8be65, 0x77776bac, 0x1feddaf6,
-  0x777daf89, 0x1fe2f64c, 0x7783f143, 0x1fd81067,
-  0x778a30d8, 0x1fcd2948, 0x77906e49, 0x1fc240ef,
-  0x7796a996, 0x1fb7575c, 0x779ce2be, 0x1fac6c91,
-  0x77a319c2, 0x1fa1808c, 0x77a94ea0, 0x1f969350,
-  0x77af8159, 0x1f8ba4dc, 0x77b5b1ec, 0x1f80b531,
-  0x77bbe05a, 0x1f75c44e, 0x77c20ca1, 0x1f6ad235,
-  0x77c836c2, 0x1f5fdee6, 0x77ce5ebd, 0x1f54ea62,
-  0x77d48490, 0x1f49f4a8, 0x77daa83d, 0x1f3efdb9,
-  0x77e0c9c3, 0x1f340596, 0x77e6e921, 0x1f290c3f,
-  0x77ed0657, 0x1f1e11b5, 0x77f32165, 0x1f1315f7,
-  0x77f93a4b, 0x1f081907, 0x77ff5109, 0x1efd1ae4,
-  0x7805659e, 0x1ef21b90, 0x780b780a, 0x1ee71b0a,
-  0x7811884d, 0x1edc1953, 0x78179666, 0x1ed1166b,
-  0x781da256, 0x1ec61254, 0x7823ac1d, 0x1ebb0d0d,
-  0x7829b3b9, 0x1eb00696, 0x782fb92a, 0x1ea4fef0,
-  0x7835bc71, 0x1e99f61d, 0x783bbd8e, 0x1e8eec1b,
-  0x7841bc7f, 0x1e83e0eb, 0x7847b946, 0x1e78d48e,
-  0x784db3e0, 0x1e6dc705, 0x7853ac4f, 0x1e62b84f,
-  0x7859a292, 0x1e57a86d, 0x785f96a9, 0x1e4c9760,
-  0x78658894, 0x1e418528, 0x786b7852, 0x1e3671c5,
-  0x787165e3, 0x1e2b5d38, 0x78775147, 0x1e204781,
-  0x787d3a7e, 0x1e1530a1, 0x78832187, 0x1e0a1898,
-  0x78890663, 0x1dfeff67, 0x788ee910, 0x1df3e50d,
-  0x7894c98f, 0x1de8c98c, 0x789aa7e0, 0x1dddace4,
-  0x78a08402, 0x1dd28f15, 0x78a65df6, 0x1dc7701f,
-  0x78ac35ba, 0x1dbc5004, 0x78b20b4f, 0x1db12ec3,
-  0x78b7deb4, 0x1da60c5d, 0x78bdafea, 0x1d9ae8d2,
-  0x78c37eef, 0x1d8fc424, 0x78c94bc4, 0x1d849e51,
-  0x78cf1669, 0x1d79775c, 0x78d4dedd, 0x1d6e4f43,
-  0x78daa520, 0x1d632608, 0x78e06932, 0x1d57fbaa,
-  0x78e62b13, 0x1d4cd02c, 0x78ebeac2, 0x1d41a38c,
-  0x78f1a840, 0x1d3675cb, 0x78f7638b, 0x1d2b46ea,
-  0x78fd1ca4, 0x1d2016e9, 0x7902d38b, 0x1d14e5c9,
-  0x7908883f, 0x1d09b389, 0x790e3ac0, 0x1cfe802b,
-  0x7913eb0e, 0x1cf34baf, 0x79199929, 0x1ce81615,
-  0x791f4510, 0x1cdcdf5e, 0x7924eec3, 0x1cd1a78a,
-  0x792a9642, 0x1cc66e99, 0x79303b8e, 0x1cbb348d,
-  0x7935dea4, 0x1caff965, 0x793b7f86, 0x1ca4bd21,
-  0x79411e33, 0x1c997fc4, 0x7946baac, 0x1c8e414b,
-  0x794c54ee, 0x1c8301b9, 0x7951ecfc, 0x1c77c10e,
-  0x795782d3, 0x1c6c7f4a, 0x795d1675, 0x1c613c6d,
-  0x7962a7e0, 0x1c55f878, 0x79683715, 0x1c4ab36b,
-  0x796dc414, 0x1c3f6d47, 0x79734edc, 0x1c34260c,
-  0x7978d76c, 0x1c28ddbb, 0x797e5dc6, 0x1c1d9454,
-  0x7983e1e8, 0x1c1249d8, 0x798963d2, 0x1c06fe46,
-  0x798ee385, 0x1bfbb1a0, 0x799460ff, 0x1bf063e6,
-  0x7999dc42, 0x1be51518, 0x799f554b, 0x1bd9c537,
-  0x79a4cc1c, 0x1bce7442, 0x79aa40b4, 0x1bc3223c,
-  0x79afb313, 0x1bb7cf23, 0x79b52339, 0x1bac7af9,
-  0x79ba9125, 0x1ba125bd, 0x79bffcd7, 0x1b95cf71,
-  0x79c5664f, 0x1b8a7815, 0x79cacd8d, 0x1b7f1fa9,
-  0x79d03291, 0x1b73c62d, 0x79d5955a, 0x1b686ba3,
-  0x79daf5e8, 0x1b5d100a, 0x79e0543c, 0x1b51b363,
-  0x79e5b054, 0x1b4655ae, 0x79eb0a31, 0x1b3af6ec,
-  0x79f061d2, 0x1b2f971e, 0x79f5b737, 0x1b243643,
-  0x79fb0a60, 0x1b18d45c, 0x7a005b4d, 0x1b0d716a,
-  0x7a05a9fd, 0x1b020d6c, 0x7a0af671, 0x1af6a865,
-  0x7a1040a8, 0x1aeb4253, 0x7a1588a2, 0x1adfdb37,
-  0x7a1ace5f, 0x1ad47312, 0x7a2011de, 0x1ac909e5,
-  0x7a25531f, 0x1abd9faf, 0x7a2a9223, 0x1ab23471,
-  0x7a2fcee8, 0x1aa6c82b, 0x7a350970, 0x1a9b5adf,
-  0x7a3a41b9, 0x1a8fec8c, 0x7a3f77c3, 0x1a847d33,
-  0x7a44ab8e, 0x1a790cd4, 0x7a49dd1a, 0x1a6d9b70,
-  0x7a4f0c67, 0x1a622907, 0x7a543974, 0x1a56b599,
-  0x7a596442, 0x1a4b4128, 0x7a5e8cd0, 0x1a3fcbb3,
-  0x7a63b31d, 0x1a34553b, 0x7a68d72b, 0x1a28ddc0,
-  0x7a6df8f8, 0x1a1d6544, 0x7a731884, 0x1a11ebc5,
-  0x7a7835cf, 0x1a067145, 0x7a7d50da, 0x19faf5c5,
-  0x7a8269a3, 0x19ef7944, 0x7a87802a, 0x19e3fbc3,
-  0x7a8c9470, 0x19d87d42, 0x7a91a674, 0x19ccfdc2,
-  0x7a96b636, 0x19c17d44, 0x7a9bc3b6, 0x19b5fbc8,
-  0x7aa0cef3, 0x19aa794d, 0x7aa5d7ee, 0x199ef5d6,
-  0x7aaadea6, 0x19937161, 0x7aafe31b, 0x1987ebf0,
-  0x7ab4e54c, 0x197c6584, 0x7ab9e53a, 0x1970de1b,
-  0x7abee2e5, 0x196555b8, 0x7ac3de4c, 0x1959cc5a,
-  0x7ac8d76f, 0x194e4201, 0x7acdce4d, 0x1942b6af,
-  0x7ad2c2e8, 0x19372a64, 0x7ad7b53d, 0x192b9d1f,
-  0x7adca54e, 0x19200ee3, 0x7ae1931a, 0x19147fae,
-  0x7ae67ea1, 0x1908ef82, 0x7aeb67e3, 0x18fd5e5f,
-  0x7af04edf, 0x18f1cc45, 0x7af53395, 0x18e63935,
-  0x7afa1605, 0x18daa52f, 0x7afef630, 0x18cf1034,
-  0x7b03d414, 0x18c37a44, 0x7b08afb2, 0x18b7e35f,
-  0x7b0d8909, 0x18ac4b87, 0x7b126019, 0x18a0b2bb,
-  0x7b1734e2, 0x189518fc, 0x7b1c0764, 0x18897e4a,
-  0x7b20d79e, 0x187de2a7, 0x7b25a591, 0x18724611,
-  0x7b2a713d, 0x1866a88a, 0x7b2f3aa0, 0x185b0a13,
-  0x7b3401bb, 0x184f6aab, 0x7b38c68e, 0x1843ca53,
-  0x7b3d8918, 0x1838290c, 0x7b42495a, 0x182c86d5,
-  0x7b470753, 0x1820e3b0, 0x7b4bc303, 0x18153f9d,
-  0x7b507c69, 0x18099a9c, 0x7b553386, 0x17fdf4ae,
-  0x7b59e85a, 0x17f24dd3, 0x7b5e9ae4, 0x17e6a60c,
-  0x7b634b23, 0x17dafd59, 0x7b67f919, 0x17cf53bb,
-  0x7b6ca4c4, 0x17c3a931, 0x7b714e25, 0x17b7fdbd,
-  0x7b75f53c, 0x17ac515f, 0x7b7a9a07, 0x17a0a417,
-  0x7b7f3c87, 0x1794f5e6, 0x7b83dcbc, 0x178946cc,
-  0x7b887aa6, 0x177d96ca, 0x7b8d1644, 0x1771e5e0,
-  0x7b91af97, 0x1766340f, 0x7b96469d, 0x175a8157,
-  0x7b9adb57, 0x174ecdb8, 0x7b9f6dc5, 0x17431933,
-  0x7ba3fde7, 0x173763c9, 0x7ba88bbc, 0x172bad7a,
-  0x7bad1744, 0x171ff646, 0x7bb1a080, 0x17143e2d,
-  0x7bb6276e, 0x17088531, 0x7bbaac0e, 0x16fccb51,
-  0x7bbf2e62, 0x16f1108f, 0x7bc3ae67, 0x16e554ea,
-  0x7bc82c1f, 0x16d99864, 0x7bcca789, 0x16cddafb,
-  0x7bd120a4, 0x16c21cb2, 0x7bd59771, 0x16b65d88,
-  0x7bda0bf0, 0x16aa9d7e, 0x7bde7e20, 0x169edc94,
-  0x7be2ee01, 0x16931acb, 0x7be75b93, 0x16875823,
-  0x7bebc6d5, 0x167b949d, 0x7bf02fc9, 0x166fd039,
-  0x7bf4966c, 0x16640af7, 0x7bf8fac0, 0x165844d8,
-  0x7bfd5cc4, 0x164c7ddd, 0x7c01bc78, 0x1640b606,
-  0x7c0619dc, 0x1634ed53, 0x7c0a74f0, 0x162923c5,
-  0x7c0ecdb2, 0x161d595d, 0x7c132424, 0x16118e1a,
-  0x7c177845, 0x1605c1fd, 0x7c1bca16, 0x15f9f507,
-  0x7c201994, 0x15ee2738, 0x7c2466c2, 0x15e25890,
-  0x7c28b19e, 0x15d68911, 0x7c2cfa28, 0x15cab8ba,
-  0x7c314060, 0x15bee78c, 0x7c358446, 0x15b31587,
-  0x7c39c5da, 0x15a742ac, 0x7c3e051b, 0x159b6efb,
-  0x7c42420a, 0x158f9a76, 0x7c467ca6, 0x1583c51b,
-  0x7c4ab4ef, 0x1577eeec, 0x7c4eeae5, 0x156c17e9,
-  0x7c531e88, 0x15604013, 0x7c574fd8, 0x1554676a,
-  0x7c5b7ed4, 0x15488dee, 0x7c5fab7c, 0x153cb3a0,
-  0x7c63d5d1, 0x1530d881, 0x7c67fdd1, 0x1524fc90,
-  0x7c6c237e, 0x15191fcf, 0x7c7046d6, 0x150d423d,
-  0x7c7467d9, 0x150163dc, 0x7c788688, 0x14f584ac,
-  0x7c7ca2e2, 0x14e9a4ac, 0x7c80bce7, 0x14ddc3de,
-  0x7c84d496, 0x14d1e242, 0x7c88e9f1, 0x14c5ffd9,
-  0x7c8cfcf6, 0x14ba1ca3, 0x7c910da5, 0x14ae38a0,
-  0x7c951bff, 0x14a253d1, 0x7c992803, 0x14966e36,
-  0x7c9d31b0, 0x148a87d1, 0x7ca13908, 0x147ea0a0,
-  0x7ca53e09, 0x1472b8a5, 0x7ca940b3, 0x1466cfe1,
-  0x7cad4107, 0x145ae653, 0x7cb13f04, 0x144efbfc,
-  0x7cb53aaa, 0x144310dd, 0x7cb933f9, 0x143724f5,
-  0x7cbd2af0, 0x142b3846, 0x7cc11f90, 0x141f4ad1,
-  0x7cc511d9, 0x14135c94, 0x7cc901c9, 0x14076d91,
-  0x7cccef62, 0x13fb7dc9, 0x7cd0daa2, 0x13ef8d3c,
-  0x7cd4c38b, 0x13e39be9, 0x7cd8aa1b, 0x13d7a9d3,
-  0x7cdc8e52, 0x13cbb6f8, 0x7ce07031, 0x13bfc35b,
-  0x7ce44fb7, 0x13b3cefa, 0x7ce82ce4, 0x13a7d9d7,
-  0x7cec07b8, 0x139be3f2, 0x7cefe032, 0x138fed4b,
-  0x7cf3b653, 0x1383f5e3, 0x7cf78a1b, 0x1377fdbb,
-  0x7cfb5b89, 0x136c04d2, 0x7cff2a9d, 0x13600b2a,
-  0x7d02f757, 0x135410c3, 0x7d06c1b6, 0x1348159d,
-  0x7d0a89bc, 0x133c19b8, 0x7d0e4f67, 0x13301d16,
-  0x7d1212b7, 0x13241fb6, 0x7d15d3ad, 0x1318219a,
-  0x7d199248, 0x130c22c1, 0x7d1d4e88, 0x1300232c,
-  0x7d21086c, 0x12f422db, 0x7d24bff6, 0x12e821cf,
-  0x7d287523, 0x12dc2009, 0x7d2c27f6, 0x12d01d89,
-  0x7d2fd86c, 0x12c41a4f, 0x7d338687, 0x12b8165b,
-  0x7d373245, 0x12ac11af, 0x7d3adba7, 0x12a00c4b,
-  0x7d3e82ae, 0x1294062f, 0x7d422757, 0x1287ff5b,
-  0x7d45c9a4, 0x127bf7d1, 0x7d496994, 0x126fef90,
-  0x7d4d0728, 0x1263e699, 0x7d50a25e, 0x1257dced,
-  0x7d543b37, 0x124bd28c, 0x7d57d1b3, 0x123fc776,
-  0x7d5b65d2, 0x1233bbac, 0x7d5ef793, 0x1227af2e,
-  0x7d6286f6, 0x121ba1fd, 0x7d6613fb, 0x120f941a,
-  0x7d699ea3, 0x12038584, 0x7d6d26ec, 0x11f7763c,
-  0x7d70acd7, 0x11eb6643, 0x7d743064, 0x11df5599,
-  0x7d77b192, 0x11d3443f, 0x7d7b3061, 0x11c73235,
-  0x7d7eacd2, 0x11bb1f7c, 0x7d8226e4, 0x11af0c13,
-  0x7d859e96, 0x11a2f7fc, 0x7d8913ea, 0x1196e337,
-  0x7d8c86de, 0x118acdc4, 0x7d8ff772, 0x117eb7a4,
-  0x7d9365a8, 0x1172a0d7, 0x7d96d17d, 0x1166895f,
-  0x7d9a3af2, 0x115a713a, 0x7d9da208, 0x114e586a,
-  0x7da106bd, 0x11423ef0, 0x7da46912, 0x113624cb,
-  0x7da7c907, 0x112a09fc, 0x7dab269b, 0x111dee84,
-  0x7dae81cf, 0x1111d263, 0x7db1daa2, 0x1105b599,
-  0x7db53113, 0x10f99827, 0x7db88524, 0x10ed7a0e,
-  0x7dbbd6d4, 0x10e15b4e, 0x7dbf2622, 0x10d53be7,
-  0x7dc2730f, 0x10c91bda, 0x7dc5bd9b, 0x10bcfb28,
-  0x7dc905c5, 0x10b0d9d0, 0x7dcc4b8d, 0x10a4b7d3,
-  0x7dcf8ef3, 0x10989532, 0x7dd2cff7, 0x108c71ee,
-  0x7dd60e99, 0x10804e06, 0x7dd94ad8, 0x1074297b,
-  0x7ddc84b5, 0x1068044e, 0x7ddfbc30, 0x105bde7f,
-  0x7de2f148, 0x104fb80e, 0x7de623fd, 0x104390fd,
-  0x7de9544f, 0x1037694b, 0x7dec823e, 0x102b40f8,
-  0x7defadca, 0x101f1807, 0x7df2d6f3, 0x1012ee76,
-  0x7df5fdb8, 0x1006c446, 0x7df9221a, 0xffa9979,
-  0x7dfc4418, 0xfee6e0d, 0x7dff63b2, 0xfe24205,
-  0x7e0280e9, 0xfd6155f, 0x7e059bbb, 0xfc9e81e,
-  0x7e08b42a, 0xfbdba40, 0x7e0bca34, 0xfb18bc8,
-  0x7e0eddd9, 0xfa55cb4, 0x7e11ef1b, 0xf992d06,
-  0x7e14fdf7, 0xf8cfcbe, 0x7e180a6f, 0xf80cbdc,
-  0x7e1b1482, 0xf749a61, 0x7e1e1c30, 0xf68684e,
-  0x7e212179, 0xf5c35a3, 0x7e24245d, 0xf500260,
-  0x7e2724db, 0xf43ce86, 0x7e2a22f4, 0xf379a16,
-  0x7e2d1ea8, 0xf2b650f, 0x7e3017f6, 0xf1f2f73,
-  0x7e330ede, 0xf12f941, 0x7e360360, 0xf06c27a,
-  0x7e38f57c, 0xefa8b20, 0x7e3be532, 0xeee5331,
-  0x7e3ed282, 0xee21aaf, 0x7e41bd6c, 0xed5e19a,
-  0x7e44a5ef, 0xec9a7f3, 0x7e478c0b, 0xebd6db9,
-  0x7e4a6fc1, 0xeb132ef, 0x7e4d5110, 0xea4f793,
-  0x7e502ff9, 0xe98bba7, 0x7e530c7a, 0xe8c7f2a,
-  0x7e55e694, 0xe80421e, 0x7e58be47, 0xe740483,
-  0x7e5b9392, 0xe67c65a, 0x7e5e6676, 0xe5b87a2,
-  0x7e6136f3, 0xe4f485c, 0x7e640507, 0xe430889,
-  0x7e66d0b4, 0xe36c82a, 0x7e6999fa, 0xe2a873e,
-  0x7e6c60d7, 0xe1e45c6, 0x7e6f254c, 0xe1203c3,
-  0x7e71e759, 0xe05c135, 0x7e74a6fd, 0xdf97e1d,
-  0x7e77643a, 0xded3a7b, 0x7e7a1f0d, 0xde0f64f,
-  0x7e7cd778, 0xdd4b19a, 0x7e7f8d7b, 0xdc86c5d,
-  0x7e824114, 0xdbc2698, 0x7e84f245, 0xdafe04b,
-  0x7e87a10c, 0xda39978, 0x7e8a4d6a, 0xd97521d,
-  0x7e8cf75f, 0xd8b0a3d, 0x7e8f9eeb, 0xd7ec1d6,
-  0x7e92440d, 0xd7278eb, 0x7e94e6c6, 0xd662f7b,
-  0x7e978715, 0xd59e586, 0x7e9a24fb, 0xd4d9b0e,
-  0x7e9cc076, 0xd415013, 0x7e9f5988, 0xd350495,
-  0x7ea1f02f, 0xd28b894, 0x7ea4846c, 0xd1c6c11,
-  0x7ea7163f, 0xd101f0e, 0x7ea9a5a8, 0xd03d189,
-  0x7eac32a6, 0xcf78383, 0x7eaebd3a, 0xceb34fe,
-  0x7eb14563, 0xcdee5f9, 0x7eb3cb21, 0xcd29676,
-  0x7eb64e75, 0xcc64673, 0x7eb8cf5d, 0xcb9f5f3,
-  0x7ebb4ddb, 0xcada4f5, 0x7ebdc9ed, 0xca1537a,
-  0x7ec04394, 0xc950182, 0x7ec2bad0, 0xc88af0e,
-  0x7ec52fa0, 0xc7c5c1e, 0x7ec7a205, 0xc7008b3,
-  0x7eca11fe, 0xc63b4ce, 0x7ecc7f8b, 0xc57606e,
-  0x7eceeaad, 0xc4b0b94, 0x7ed15363, 0xc3eb641,
-  0x7ed3b9ad, 0xc326075, 0x7ed61d8a, 0xc260a31,
-  0x7ed87efc, 0xc19b374, 0x7edade01, 0xc0d5c41,
-  0x7edd3a9a, 0xc010496, 0x7edf94c7, 0xbf4ac75,
-  0x7ee1ec87, 0xbe853de, 0x7ee441da, 0xbdbfad1,
-  0x7ee694c1, 0xbcfa150, 0x7ee8e53a, 0xbc34759,
-  0x7eeb3347, 0xbb6ecef, 0x7eed7ee7, 0xbaa9211,
-  0x7eefc81a, 0xb9e36c0, 0x7ef20ee0, 0xb91dafc,
-  0x7ef45338, 0xb857ec7, 0x7ef69523, 0xb79221f,
-  0x7ef8d4a1, 0xb6cc506, 0x7efb11b1, 0xb60677c,
-  0x7efd4c54, 0xb540982, 0x7eff8489, 0xb47ab19,
-  0x7f01ba50, 0xb3b4c40, 0x7f03eda9, 0xb2eecf8,
-  0x7f061e95, 0xb228d42, 0x7f084d12, 0xb162d1d,
-  0x7f0a7921, 0xb09cc8c, 0x7f0ca2c2, 0xafd6b8d,
-  0x7f0ec9f5, 0xaf10a22, 0x7f10eeb9, 0xae4a84b,
-  0x7f13110f, 0xad84609, 0x7f1530f7, 0xacbe35b,
-  0x7f174e70, 0xabf8043, 0x7f19697a, 0xab31cc1,
-  0x7f1b8215, 0xaa6b8d5, 0x7f1d9842, 0xa9a5480,
-  0x7f1fabff, 0xa8defc3, 0x7f21bd4e, 0xa818a9d,
-  0x7f23cc2e, 0xa752510, 0x7f25d89e, 0xa68bf1b,
-  0x7f27e29f, 0xa5c58c0, 0x7f29ea31, 0xa4ff1fe,
-  0x7f2bef53, 0xa438ad7, 0x7f2df206, 0xa37234a,
-  0x7f2ff24a, 0xa2abb59, 0x7f31f01d, 0xa1e5303,
-  0x7f33eb81, 0xa11ea49, 0x7f35e476, 0xa05812c,
-  0x7f37dafa, 0x9f917ac, 0x7f39cf0e, 0x9ecadc9,
-  0x7f3bc0b3, 0x9e04385, 0x7f3dafe7, 0x9d3d8df,
-  0x7f3f9cab, 0x9c76dd8, 0x7f4186ff, 0x9bb0271,
-  0x7f436ee3, 0x9ae96aa, 0x7f455456, 0x9a22a83,
-  0x7f473759, 0x995bdfd, 0x7f4917eb, 0x9895118,
-  0x7f4af60d, 0x97ce3d5, 0x7f4cd1be, 0x9707635,
-  0x7f4eaafe, 0x9640837, 0x7f5081cd, 0x95799dd,
-  0x7f52562c, 0x94b2b27, 0x7f54281a, 0x93ebc14,
-  0x7f55f796, 0x9324ca7, 0x7f57c4a2, 0x925dcdf,
-  0x7f598f3c, 0x9196cbc, 0x7f5b5765, 0x90cfc40,
-  0x7f5d1d1d, 0x9008b6a, 0x7f5ee063, 0x8f41a3c,
-  0x7f60a138, 0x8e7a8b5, 0x7f625f9b, 0x8db36d6,
-  0x7f641b8d, 0x8cec4a0, 0x7f65d50d, 0x8c25213,
-  0x7f678c1c, 0x8b5df30, 0x7f6940b8, 0x8a96bf6,
-  0x7f6af2e3, 0x89cf867, 0x7f6ca29c, 0x8908483,
-  0x7f6e4fe3, 0x884104b, 0x7f6ffab8, 0x8779bbe,
-  0x7f71a31b, 0x86b26de, 0x7f73490b, 0x85eb1ab,
-  0x7f74ec8a, 0x8523c25, 0x7f768d96, 0x845c64d,
-  0x7f782c30, 0x8395024, 0x7f79c857, 0x82cd9a9,
-  0x7f7b620c, 0x82062de, 0x7f7cf94e, 0x813ebc2,
-  0x7f7e8e1e, 0x8077457, 0x7f80207b, 0x7fafc9c,
-  0x7f81b065, 0x7ee8493, 0x7f833ddd, 0x7e20c3b,
-  0x7f84c8e2, 0x7d59396, 0x7f865174, 0x7c91aa3,
-  0x7f87d792, 0x7bca163, 0x7f895b3e, 0x7b027d7,
-  0x7f8adc77, 0x7a3adff, 0x7f8c5b3d, 0x79733dc,
-  0x7f8dd78f, 0x78ab96e, 0x7f8f516e, 0x77e3eb5,
-  0x7f90c8da, 0x771c3b3, 0x7f923dd2, 0x7654867,
-  0x7f93b058, 0x758ccd2, 0x7f952069, 0x74c50f4,
-  0x7f968e07, 0x73fd4cf, 0x7f97f932, 0x7335862,
-  0x7f9961e8, 0x726dbae, 0x7f9ac82c, 0x71a5eb3,
-  0x7f9c2bfb, 0x70de172, 0x7f9d8d56, 0x70163eb,
-  0x7f9eec3e, 0x6f4e620, 0x7fa048b2, 0x6e86810,
-  0x7fa1a2b2, 0x6dbe9bb, 0x7fa2fa3d, 0x6cf6b23,
-  0x7fa44f55, 0x6c2ec48, 0x7fa5a1f9, 0x6b66d29,
-  0x7fa6f228, 0x6a9edc9, 0x7fa83fe3, 0x69d6e27,
-  0x7fa98b2a, 0x690ee44, 0x7faad3fd, 0x6846e1f,
-  0x7fac1a5b, 0x677edbb, 0x7fad5e45, 0x66b6d16,
-  0x7fae9fbb, 0x65eec33, 0x7fafdebb, 0x6526b10,
-  0x7fb11b48, 0x645e9af, 0x7fb2555f, 0x6396810,
-  0x7fb38d02, 0x62ce634, 0x7fb4c231, 0x620641a,
-  0x7fb5f4ea, 0x613e1c5, 0x7fb7252f, 0x6075f33,
-  0x7fb852ff, 0x5fadc66, 0x7fb97e5a, 0x5ee595d,
-  0x7fbaa740, 0x5e1d61b, 0x7fbbcdb1, 0x5d5529e,
-  0x7fbcf1ad, 0x5c8cee7, 0x7fbe1334, 0x5bc4af8,
-  0x7fbf3246, 0x5afc6d0, 0x7fc04ee3, 0x5a3426f,
-  0x7fc1690a, 0x596bdd7, 0x7fc280bc, 0x58a3908,
-  0x7fc395f9, 0x57db403, 0x7fc4a8c1, 0x5712ec7,
-  0x7fc5b913, 0x564a955, 0x7fc6c6f0, 0x55823ae,
-  0x7fc7d258, 0x54b9dd3, 0x7fc8db4a, 0x53f17c3,
-  0x7fc9e1c6, 0x532917f, 0x7fcae5cd, 0x5260b08,
-  0x7fcbe75e, 0x519845e, 0x7fcce67a, 0x50cfd82,
-  0x7fcde320, 0x5007674, 0x7fcedd50, 0x4f3ef35,
-  0x7fcfd50b, 0x4e767c5, 0x7fd0ca4f, 0x4dae024,
-  0x7fd1bd1e, 0x4ce5854, 0x7fd2ad77, 0x4c1d054,
-  0x7fd39b5a, 0x4b54825, 0x7fd486c7, 0x4a8bfc7,
-  0x7fd56fbe, 0x49c373c, 0x7fd6563f, 0x48fae83,
-  0x7fd73a4a, 0x483259d, 0x7fd81bdf, 0x4769c8b,
-  0x7fd8fafe, 0x46a134c, 0x7fd9d7a7, 0x45d89e2,
-  0x7fdab1d9, 0x451004d, 0x7fdb8996, 0x444768d,
-  0x7fdc5edc, 0x437eca4, 0x7fdd31ac, 0x42b6290,
-  0x7fde0205, 0x41ed854, 0x7fdecfe8, 0x4124dee,
-  0x7fdf9b55, 0x405c361, 0x7fe0644b, 0x3f938ac,
-  0x7fe12acb, 0x3ecadcf, 0x7fe1eed5, 0x3e022cc,
-  0x7fe2b067, 0x3d397a3, 0x7fe36f84, 0x3c70c54,
-  0x7fe42c2a, 0x3ba80df, 0x7fe4e659, 0x3adf546,
-  0x7fe59e12, 0x3a16988, 0x7fe65354, 0x394dda7,
-  0x7fe7061f, 0x38851a2, 0x7fe7b674, 0x37bc57b,
-  0x7fe86452, 0x36f3931, 0x7fe90fb9, 0x362acc5,
-  0x7fe9b8a9, 0x3562038, 0x7fea5f23, 0x3499389,
-  0x7feb0326, 0x33d06bb, 0x7feba4b2, 0x33079cc,
-  0x7fec43c7, 0x323ecbe, 0x7fece065, 0x3175f91,
-  0x7fed7a8c, 0x30ad245, 0x7fee123d, 0x2fe44dc,
-  0x7feea776, 0x2f1b755, 0x7fef3a39, 0x2e529b0,
-  0x7fefca84, 0x2d89bf0, 0x7ff05858, 0x2cc0e13,
-  0x7ff0e3b6, 0x2bf801a, 0x7ff16c9c, 0x2b2f207,
-  0x7ff1f30b, 0x2a663d8, 0x7ff27703, 0x299d590,
-  0x7ff2f884, 0x28d472e, 0x7ff3778e, 0x280b8b3,
-  0x7ff3f420, 0x2742a1f, 0x7ff46e3c, 0x2679b73,
-  0x7ff4e5e0, 0x25b0caf, 0x7ff55b0d, 0x24e7dd4,
-  0x7ff5cdc3, 0x241eee2, 0x7ff63e01, 0x2355fd9,
-  0x7ff6abc8, 0x228d0bb, 0x7ff71718, 0x21c4188,
-  0x7ff77ff1, 0x20fb240, 0x7ff7e652, 0x20322e3,
-  0x7ff84a3c, 0x1f69373, 0x7ff8abae, 0x1ea03ef,
-  0x7ff90aaa, 0x1dd7459, 0x7ff9672d, 0x1d0e4b0,
-  0x7ff9c13a, 0x1c454f5, 0x7ffa18cf, 0x1b7c528,
-  0x7ffa6dec, 0x1ab354b, 0x7ffac092, 0x19ea55d,
-  0x7ffb10c1, 0x192155f, 0x7ffb5e78, 0x1858552,
-  0x7ffba9b8, 0x178f536, 0x7ffbf280, 0x16c650b,
-  0x7ffc38d1, 0x15fd4d2, 0x7ffc7caa, 0x153448c,
-  0x7ffcbe0c, 0x146b438, 0x7ffcfcf6, 0x13a23d8,
-  0x7ffd3969, 0x12d936c, 0x7ffd7364, 0x12102f4,
-  0x7ffdaae7, 0x1147271, 0x7ffddff3, 0x107e1e3,
-  0x7ffe1288, 0xfb514b, 0x7ffe42a4, 0xeec0aa,
-  0x7ffe704a, 0xe22fff, 0x7ffe9b77, 0xd59f4c,
-  0x7ffec42d, 0xc90e90, 0x7ffeea6c, 0xbc7dcc,
-  0x7fff0e32, 0xafed02, 0x7fff2f82, 0xa35c30,
-  0x7fff4e59, 0x96cb58, 0x7fff6ab9, 0x8a3a7b,
-  0x7fff84a1, 0x7da998, 0x7fff9c12, 0x7118b0,
-  0x7fffb10b, 0x6487c4, 0x7fffc38c, 0x57f6d4,
-  0x7fffd396, 0x4b65e1, 0x7fffe128, 0x3ed4ea,
-  0x7fffec43, 0x3243f1, 0x7ffff4e6, 0x25b2f7,
-  0x7ffffb11, 0x1921fb, 0x7ffffec4, 0xc90fe,
-  0x7fffffff, 0x0, 0x7ffffec4, 0xfff36f02,
-  0x7ffffb11, 0xffe6de05, 0x7ffff4e6, 0xffda4d09,
-  0x7fffec43, 0xffcdbc0f, 0x7fffe128, 0xffc12b16,
-  0x7fffd396, 0xffb49a1f, 0x7fffc38c, 0xffa8092c,
-  0x7fffb10b, 0xff9b783c, 0x7fff9c12, 0xff8ee750,
-  0x7fff84a1, 0xff825668, 0x7fff6ab9, 0xff75c585,
-  0x7fff4e59, 0xff6934a8, 0x7fff2f82, 0xff5ca3d0,
-  0x7fff0e32, 0xff5012fe, 0x7ffeea6c, 0xff438234,
-  0x7ffec42d, 0xff36f170, 0x7ffe9b77, 0xff2a60b4,
-  0x7ffe704a, 0xff1dd001, 0x7ffe42a4, 0xff113f56,
-  0x7ffe1288, 0xff04aeb5, 0x7ffddff3, 0xfef81e1d,
-  0x7ffdaae7, 0xfeeb8d8f, 0x7ffd7364, 0xfedefd0c,
-  0x7ffd3969, 0xfed26c94, 0x7ffcfcf6, 0xfec5dc28,
-  0x7ffcbe0c, 0xfeb94bc8, 0x7ffc7caa, 0xfeacbb74,
-  0x7ffc38d1, 0xfea02b2e, 0x7ffbf280, 0xfe939af5,
-  0x7ffba9b8, 0xfe870aca, 0x7ffb5e78, 0xfe7a7aae,
-  0x7ffb10c1, 0xfe6deaa1, 0x7ffac092, 0xfe615aa3,
-  0x7ffa6dec, 0xfe54cab5, 0x7ffa18cf, 0xfe483ad8,
-  0x7ff9c13a, 0xfe3bab0b, 0x7ff9672d, 0xfe2f1b50,
-  0x7ff90aaa, 0xfe228ba7, 0x7ff8abae, 0xfe15fc11,
-  0x7ff84a3c, 0xfe096c8d, 0x7ff7e652, 0xfdfcdd1d,
-  0x7ff77ff1, 0xfdf04dc0, 0x7ff71718, 0xfde3be78,
-  0x7ff6abc8, 0xfdd72f45, 0x7ff63e01, 0xfdcaa027,
-  0x7ff5cdc3, 0xfdbe111e, 0x7ff55b0d, 0xfdb1822c,
-  0x7ff4e5e0, 0xfda4f351, 0x7ff46e3c, 0xfd98648d,
-  0x7ff3f420, 0xfd8bd5e1, 0x7ff3778e, 0xfd7f474d,
-  0x7ff2f884, 0xfd72b8d2, 0x7ff27703, 0xfd662a70,
-  0x7ff1f30b, 0xfd599c28, 0x7ff16c9c, 0xfd4d0df9,
-  0x7ff0e3b6, 0xfd407fe6, 0x7ff05858, 0xfd33f1ed,
-  0x7fefca84, 0xfd276410, 0x7fef3a39, 0xfd1ad650,
-  0x7feea776, 0xfd0e48ab, 0x7fee123d, 0xfd01bb24,
-  0x7fed7a8c, 0xfcf52dbb, 0x7fece065, 0xfce8a06f,
-  0x7fec43c7, 0xfcdc1342, 0x7feba4b2, 0xfccf8634,
-  0x7feb0326, 0xfcc2f945, 0x7fea5f23, 0xfcb66c77,
-  0x7fe9b8a9, 0xfca9dfc8, 0x7fe90fb9, 0xfc9d533b,
-  0x7fe86452, 0xfc90c6cf, 0x7fe7b674, 0xfc843a85,
-  0x7fe7061f, 0xfc77ae5e, 0x7fe65354, 0xfc6b2259,
-  0x7fe59e12, 0xfc5e9678, 0x7fe4e659, 0xfc520aba,
-  0x7fe42c2a, 0xfc457f21, 0x7fe36f84, 0xfc38f3ac,
-  0x7fe2b067, 0xfc2c685d, 0x7fe1eed5, 0xfc1fdd34,
-  0x7fe12acb, 0xfc135231, 0x7fe0644b, 0xfc06c754,
-  0x7fdf9b55, 0xfbfa3c9f, 0x7fdecfe8, 0xfbedb212,
-  0x7fde0205, 0xfbe127ac, 0x7fdd31ac, 0xfbd49d70,
-  0x7fdc5edc, 0xfbc8135c, 0x7fdb8996, 0xfbbb8973,
-  0x7fdab1d9, 0xfbaeffb3, 0x7fd9d7a7, 0xfba2761e,
-  0x7fd8fafe, 0xfb95ecb4, 0x7fd81bdf, 0xfb896375,
-  0x7fd73a4a, 0xfb7cda63, 0x7fd6563f, 0xfb70517d,
-  0x7fd56fbe, 0xfb63c8c4, 0x7fd486c7, 0xfb574039,
-  0x7fd39b5a, 0xfb4ab7db, 0x7fd2ad77, 0xfb3e2fac,
-  0x7fd1bd1e, 0xfb31a7ac, 0x7fd0ca4f, 0xfb251fdc,
-  0x7fcfd50b, 0xfb18983b, 0x7fcedd50, 0xfb0c10cb,
-  0x7fcde320, 0xfaff898c, 0x7fcce67a, 0xfaf3027e,
-  0x7fcbe75e, 0xfae67ba2, 0x7fcae5cd, 0xfad9f4f8,
-  0x7fc9e1c6, 0xfacd6e81, 0x7fc8db4a, 0xfac0e83d,
-  0x7fc7d258, 0xfab4622d, 0x7fc6c6f0, 0xfaa7dc52,
-  0x7fc5b913, 0xfa9b56ab, 0x7fc4a8c1, 0xfa8ed139,
-  0x7fc395f9, 0xfa824bfd, 0x7fc280bc, 0xfa75c6f8,
-  0x7fc1690a, 0xfa694229, 0x7fc04ee3, 0xfa5cbd91,
-  0x7fbf3246, 0xfa503930, 0x7fbe1334, 0xfa43b508,
-  0x7fbcf1ad, 0xfa373119, 0x7fbbcdb1, 0xfa2aad62,
-  0x7fbaa740, 0xfa1e29e5, 0x7fb97e5a, 0xfa11a6a3,
-  0x7fb852ff, 0xfa05239a, 0x7fb7252f, 0xf9f8a0cd,
-  0x7fb5f4ea, 0xf9ec1e3b, 0x7fb4c231, 0xf9df9be6,
-  0x7fb38d02, 0xf9d319cc, 0x7fb2555f, 0xf9c697f0,
-  0x7fb11b48, 0xf9ba1651, 0x7fafdebb, 0xf9ad94f0,
-  0x7fae9fbb, 0xf9a113cd, 0x7fad5e45, 0xf99492ea,
-  0x7fac1a5b, 0xf9881245, 0x7faad3fd, 0xf97b91e1,
-  0x7fa98b2a, 0xf96f11bc, 0x7fa83fe3, 0xf96291d9,
-  0x7fa6f228, 0xf9561237, 0x7fa5a1f9, 0xf94992d7,
-  0x7fa44f55, 0xf93d13b8, 0x7fa2fa3d, 0xf93094dd,
-  0x7fa1a2b2, 0xf9241645, 0x7fa048b2, 0xf91797f0,
-  0x7f9eec3e, 0xf90b19e0, 0x7f9d8d56, 0xf8fe9c15,
-  0x7f9c2bfb, 0xf8f21e8e, 0x7f9ac82c, 0xf8e5a14d,
-  0x7f9961e8, 0xf8d92452, 0x7f97f932, 0xf8cca79e,
-  0x7f968e07, 0xf8c02b31, 0x7f952069, 0xf8b3af0c,
-  0x7f93b058, 0xf8a7332e, 0x7f923dd2, 0xf89ab799,
-  0x7f90c8da, 0xf88e3c4d, 0x7f8f516e, 0xf881c14b,
-  0x7f8dd78f, 0xf8754692, 0x7f8c5b3d, 0xf868cc24,
-  0x7f8adc77, 0xf85c5201, 0x7f895b3e, 0xf84fd829,
-  0x7f87d792, 0xf8435e9d, 0x7f865174, 0xf836e55d,
-  0x7f84c8e2, 0xf82a6c6a, 0x7f833ddd, 0xf81df3c5,
-  0x7f81b065, 0xf8117b6d, 0x7f80207b, 0xf8050364,
-  0x7f7e8e1e, 0xf7f88ba9, 0x7f7cf94e, 0xf7ec143e,
-  0x7f7b620c, 0xf7df9d22, 0x7f79c857, 0xf7d32657,
-  0x7f782c30, 0xf7c6afdc, 0x7f768d96, 0xf7ba39b3,
-  0x7f74ec8a, 0xf7adc3db, 0x7f73490b, 0xf7a14e55,
-  0x7f71a31b, 0xf794d922, 0x7f6ffab8, 0xf7886442,
-  0x7f6e4fe3, 0xf77befb5, 0x7f6ca29c, 0xf76f7b7d,
-  0x7f6af2e3, 0xf7630799, 0x7f6940b8, 0xf756940a,
-  0x7f678c1c, 0xf74a20d0, 0x7f65d50d, 0xf73daded,
-  0x7f641b8d, 0xf7313b60, 0x7f625f9b, 0xf724c92a,
-  0x7f60a138, 0xf718574b, 0x7f5ee063, 0xf70be5c4,
-  0x7f5d1d1d, 0xf6ff7496, 0x7f5b5765, 0xf6f303c0,
-  0x7f598f3c, 0xf6e69344, 0x7f57c4a2, 0xf6da2321,
-  0x7f55f796, 0xf6cdb359, 0x7f54281a, 0xf6c143ec,
-  0x7f52562c, 0xf6b4d4d9, 0x7f5081cd, 0xf6a86623,
-  0x7f4eaafe, 0xf69bf7c9, 0x7f4cd1be, 0xf68f89cb,
-  0x7f4af60d, 0xf6831c2b, 0x7f4917eb, 0xf676aee8,
-  0x7f473759, 0xf66a4203, 0x7f455456, 0xf65dd57d,
-  0x7f436ee3, 0xf6516956, 0x7f4186ff, 0xf644fd8f,
-  0x7f3f9cab, 0xf6389228, 0x7f3dafe7, 0xf62c2721,
-  0x7f3bc0b3, 0xf61fbc7b, 0x7f39cf0e, 0xf6135237,
-  0x7f37dafa, 0xf606e854, 0x7f35e476, 0xf5fa7ed4,
-  0x7f33eb81, 0xf5ee15b7, 0x7f31f01d, 0xf5e1acfd,
-  0x7f2ff24a, 0xf5d544a7, 0x7f2df206, 0xf5c8dcb6,
-  0x7f2bef53, 0xf5bc7529, 0x7f29ea31, 0xf5b00e02,
-  0x7f27e29f, 0xf5a3a740, 0x7f25d89e, 0xf59740e5,
-  0x7f23cc2e, 0xf58adaf0, 0x7f21bd4e, 0xf57e7563,
-  0x7f1fabff, 0xf572103d, 0x7f1d9842, 0xf565ab80,
-  0x7f1b8215, 0xf559472b, 0x7f19697a, 0xf54ce33f,
-  0x7f174e70, 0xf5407fbd, 0x7f1530f7, 0xf5341ca5,
-  0x7f13110f, 0xf527b9f7, 0x7f10eeb9, 0xf51b57b5,
-  0x7f0ec9f5, 0xf50ef5de, 0x7f0ca2c2, 0xf5029473,
-  0x7f0a7921, 0xf4f63374, 0x7f084d12, 0xf4e9d2e3,
-  0x7f061e95, 0xf4dd72be, 0x7f03eda9, 0xf4d11308,
-  0x7f01ba50, 0xf4c4b3c0, 0x7eff8489, 0xf4b854e7,
-  0x7efd4c54, 0xf4abf67e, 0x7efb11b1, 0xf49f9884,
-  0x7ef8d4a1, 0xf4933afa, 0x7ef69523, 0xf486dde1,
-  0x7ef45338, 0xf47a8139, 0x7ef20ee0, 0xf46e2504,
-  0x7eefc81a, 0xf461c940, 0x7eed7ee7, 0xf4556def,
-  0x7eeb3347, 0xf4491311, 0x7ee8e53a, 0xf43cb8a7,
-  0x7ee694c1, 0xf4305eb0, 0x7ee441da, 0xf424052f,
-  0x7ee1ec87, 0xf417ac22, 0x7edf94c7, 0xf40b538b,
-  0x7edd3a9a, 0xf3fefb6a, 0x7edade01, 0xf3f2a3bf,
-  0x7ed87efc, 0xf3e64c8c, 0x7ed61d8a, 0xf3d9f5cf,
-  0x7ed3b9ad, 0xf3cd9f8b, 0x7ed15363, 0xf3c149bf,
-  0x7eceeaad, 0xf3b4f46c, 0x7ecc7f8b, 0xf3a89f92,
-  0x7eca11fe, 0xf39c4b32, 0x7ec7a205, 0xf38ff74d,
-  0x7ec52fa0, 0xf383a3e2, 0x7ec2bad0, 0xf37750f2,
-  0x7ec04394, 0xf36afe7e, 0x7ebdc9ed, 0xf35eac86,
-  0x7ebb4ddb, 0xf3525b0b, 0x7eb8cf5d, 0xf3460a0d,
-  0x7eb64e75, 0xf339b98d, 0x7eb3cb21, 0xf32d698a,
-  0x7eb14563, 0xf3211a07, 0x7eaebd3a, 0xf314cb02,
-  0x7eac32a6, 0xf3087c7d, 0x7ea9a5a8, 0xf2fc2e77,
-  0x7ea7163f, 0xf2efe0f2, 0x7ea4846c, 0xf2e393ef,
-  0x7ea1f02f, 0xf2d7476c, 0x7e9f5988, 0xf2cafb6b,
-  0x7e9cc076, 0xf2beafed, 0x7e9a24fb, 0xf2b264f2,
-  0x7e978715, 0xf2a61a7a, 0x7e94e6c6, 0xf299d085,
-  0x7e92440d, 0xf28d8715, 0x7e8f9eeb, 0xf2813e2a,
-  0x7e8cf75f, 0xf274f5c3, 0x7e8a4d6a, 0xf268ade3,
-  0x7e87a10c, 0xf25c6688, 0x7e84f245, 0xf2501fb5,
-  0x7e824114, 0xf243d968, 0x7e7f8d7b, 0xf23793a3,
-  0x7e7cd778, 0xf22b4e66, 0x7e7a1f0d, 0xf21f09b1,
-  0x7e77643a, 0xf212c585, 0x7e74a6fd, 0xf20681e3,
-  0x7e71e759, 0xf1fa3ecb, 0x7e6f254c, 0xf1edfc3d,
-  0x7e6c60d7, 0xf1e1ba3a, 0x7e6999fa, 0xf1d578c2,
-  0x7e66d0b4, 0xf1c937d6, 0x7e640507, 0xf1bcf777,
-  0x7e6136f3, 0xf1b0b7a4, 0x7e5e6676, 0xf1a4785e,
-  0x7e5b9392, 0xf19839a6, 0x7e58be47, 0xf18bfb7d,
-  0x7e55e694, 0xf17fbde2, 0x7e530c7a, 0xf17380d6,
-  0x7e502ff9, 0xf1674459, 0x7e4d5110, 0xf15b086d,
-  0x7e4a6fc1, 0xf14ecd11, 0x7e478c0b, 0xf1429247,
-  0x7e44a5ef, 0xf136580d, 0x7e41bd6c, 0xf12a1e66,
-  0x7e3ed282, 0xf11de551, 0x7e3be532, 0xf111accf,
-  0x7e38f57c, 0xf10574e0, 0x7e360360, 0xf0f93d86,
-  0x7e330ede, 0xf0ed06bf, 0x7e3017f6, 0xf0e0d08d,
-  0x7e2d1ea8, 0xf0d49af1, 0x7e2a22f4, 0xf0c865ea,
-  0x7e2724db, 0xf0bc317a, 0x7e24245d, 0xf0affda0,
-  0x7e212179, 0xf0a3ca5d, 0x7e1e1c30, 0xf09797b2,
-  0x7e1b1482, 0xf08b659f, 0x7e180a6f, 0xf07f3424,
-  0x7e14fdf7, 0xf0730342, 0x7e11ef1b, 0xf066d2fa,
-  0x7e0eddd9, 0xf05aa34c, 0x7e0bca34, 0xf04e7438,
-  0x7e08b42a, 0xf04245c0, 0x7e059bbb, 0xf03617e2,
-  0x7e0280e9, 0xf029eaa1, 0x7dff63b2, 0xf01dbdfb,
-  0x7dfc4418, 0xf01191f3, 0x7df9221a, 0xf0056687,
-  0x7df5fdb8, 0xeff93bba, 0x7df2d6f3, 0xefed118a,
-  0x7defadca, 0xefe0e7f9, 0x7dec823e, 0xefd4bf08,
-  0x7de9544f, 0xefc896b5, 0x7de623fd, 0xefbc6f03,
-  0x7de2f148, 0xefb047f2, 0x7ddfbc30, 0xefa42181,
-  0x7ddc84b5, 0xef97fbb2, 0x7dd94ad8, 0xef8bd685,
-  0x7dd60e99, 0xef7fb1fa, 0x7dd2cff7, 0xef738e12,
-  0x7dcf8ef3, 0xef676ace, 0x7dcc4b8d, 0xef5b482d,
-  0x7dc905c5, 0xef4f2630, 0x7dc5bd9b, 0xef4304d8,
-  0x7dc2730f, 0xef36e426, 0x7dbf2622, 0xef2ac419,
-  0x7dbbd6d4, 0xef1ea4b2, 0x7db88524, 0xef1285f2,
-  0x7db53113, 0xef0667d9, 0x7db1daa2, 0xeefa4a67,
-  0x7dae81cf, 0xeeee2d9d, 0x7dab269b, 0xeee2117c,
-  0x7da7c907, 0xeed5f604, 0x7da46912, 0xeec9db35,
-  0x7da106bd, 0xeebdc110, 0x7d9da208, 0xeeb1a796,
-  0x7d9a3af2, 0xeea58ec6, 0x7d96d17d, 0xee9976a1,
-  0x7d9365a8, 0xee8d5f29, 0x7d8ff772, 0xee81485c,
-  0x7d8c86de, 0xee75323c, 0x7d8913ea, 0xee691cc9,
-  0x7d859e96, 0xee5d0804, 0x7d8226e4, 0xee50f3ed,
-  0x7d7eacd2, 0xee44e084, 0x7d7b3061, 0xee38cdcb,
-  0x7d77b192, 0xee2cbbc1, 0x7d743064, 0xee20aa67,
-  0x7d70acd7, 0xee1499bd, 0x7d6d26ec, 0xee0889c4,
-  0x7d699ea3, 0xedfc7a7c, 0x7d6613fb, 0xedf06be6,
-  0x7d6286f6, 0xede45e03, 0x7d5ef793, 0xedd850d2,
-  0x7d5b65d2, 0xedcc4454, 0x7d57d1b3, 0xedc0388a,
-  0x7d543b37, 0xedb42d74, 0x7d50a25e, 0xeda82313,
-  0x7d4d0728, 0xed9c1967, 0x7d496994, 0xed901070,
-  0x7d45c9a4, 0xed84082f, 0x7d422757, 0xed7800a5,
-  0x7d3e82ae, 0xed6bf9d1, 0x7d3adba7, 0xed5ff3b5,
-  0x7d373245, 0xed53ee51, 0x7d338687, 0xed47e9a5,
-  0x7d2fd86c, 0xed3be5b1, 0x7d2c27f6, 0xed2fe277,
-  0x7d287523, 0xed23dff7, 0x7d24bff6, 0xed17de31,
-  0x7d21086c, 0xed0bdd25, 0x7d1d4e88, 0xecffdcd4,
-  0x7d199248, 0xecf3dd3f, 0x7d15d3ad, 0xece7de66,
-  0x7d1212b7, 0xecdbe04a, 0x7d0e4f67, 0xeccfe2ea,
-  0x7d0a89bc, 0xecc3e648, 0x7d06c1b6, 0xecb7ea63,
-  0x7d02f757, 0xecabef3d, 0x7cff2a9d, 0xec9ff4d6,
-  0x7cfb5b89, 0xec93fb2e, 0x7cf78a1b, 0xec880245,
-  0x7cf3b653, 0xec7c0a1d, 0x7cefe032, 0xec7012b5,
-  0x7cec07b8, 0xec641c0e, 0x7ce82ce4, 0xec582629,
-  0x7ce44fb7, 0xec4c3106, 0x7ce07031, 0xec403ca5,
-  0x7cdc8e52, 0xec344908, 0x7cd8aa1b, 0xec28562d,
-  0x7cd4c38b, 0xec1c6417, 0x7cd0daa2, 0xec1072c4,
-  0x7cccef62, 0xec048237, 0x7cc901c9, 0xebf8926f,
-  0x7cc511d9, 0xebeca36c, 0x7cc11f90, 0xebe0b52f,
-  0x7cbd2af0, 0xebd4c7ba, 0x7cb933f9, 0xebc8db0b,
-  0x7cb53aaa, 0xebbcef23, 0x7cb13f04, 0xebb10404,
-  0x7cad4107, 0xeba519ad, 0x7ca940b3, 0xeb99301f,
-  0x7ca53e09, 0xeb8d475b, 0x7ca13908, 0xeb815f60,
-  0x7c9d31b0, 0xeb75782f, 0x7c992803, 0xeb6991ca,
-  0x7c951bff, 0xeb5dac2f, 0x7c910da5, 0xeb51c760,
-  0x7c8cfcf6, 0xeb45e35d, 0x7c88e9f1, 0xeb3a0027,
-  0x7c84d496, 0xeb2e1dbe, 0x7c80bce7, 0xeb223c22,
-  0x7c7ca2e2, 0xeb165b54, 0x7c788688, 0xeb0a7b54,
-  0x7c7467d9, 0xeafe9c24, 0x7c7046d6, 0xeaf2bdc3,
-  0x7c6c237e, 0xeae6e031, 0x7c67fdd1, 0xeadb0370,
-  0x7c63d5d1, 0xeacf277f, 0x7c5fab7c, 0xeac34c60,
-  0x7c5b7ed4, 0xeab77212, 0x7c574fd8, 0xeaab9896,
-  0x7c531e88, 0xea9fbfed, 0x7c4eeae5, 0xea93e817,
-  0x7c4ab4ef, 0xea881114, 0x7c467ca6, 0xea7c3ae5,
-  0x7c42420a, 0xea70658a, 0x7c3e051b, 0xea649105,
-  0x7c39c5da, 0xea58bd54, 0x7c358446, 0xea4cea79,
-  0x7c314060, 0xea411874, 0x7c2cfa28, 0xea354746,
-  0x7c28b19e, 0xea2976ef, 0x7c2466c2, 0xea1da770,
-  0x7c201994, 0xea11d8c8, 0x7c1bca16, 0xea060af9,
-  0x7c177845, 0xe9fa3e03, 0x7c132424, 0xe9ee71e6,
-  0x7c0ecdb2, 0xe9e2a6a3, 0x7c0a74f0, 0xe9d6dc3b,
-  0x7c0619dc, 0xe9cb12ad, 0x7c01bc78, 0xe9bf49fa,
-  0x7bfd5cc4, 0xe9b38223, 0x7bf8fac0, 0xe9a7bb28,
-  0x7bf4966c, 0xe99bf509, 0x7bf02fc9, 0xe9902fc7,
-  0x7bebc6d5, 0xe9846b63, 0x7be75b93, 0xe978a7dd,
-  0x7be2ee01, 0xe96ce535, 0x7bde7e20, 0xe961236c,
-  0x7bda0bf0, 0xe9556282, 0x7bd59771, 0xe949a278,
-  0x7bd120a4, 0xe93de34e, 0x7bcca789, 0xe9322505,
-  0x7bc82c1f, 0xe926679c, 0x7bc3ae67, 0xe91aab16,
-  0x7bbf2e62, 0xe90eef71, 0x7bbaac0e, 0xe90334af,
-  0x7bb6276e, 0xe8f77acf, 0x7bb1a080, 0xe8ebc1d3,
-  0x7bad1744, 0xe8e009ba, 0x7ba88bbc, 0xe8d45286,
-  0x7ba3fde7, 0xe8c89c37, 0x7b9f6dc5, 0xe8bce6cd,
-  0x7b9adb57, 0xe8b13248, 0x7b96469d, 0xe8a57ea9,
-  0x7b91af97, 0xe899cbf1, 0x7b8d1644, 0xe88e1a20,
-  0x7b887aa6, 0xe8826936, 0x7b83dcbc, 0xe876b934,
-  0x7b7f3c87, 0xe86b0a1a, 0x7b7a9a07, 0xe85f5be9,
-  0x7b75f53c, 0xe853aea1, 0x7b714e25, 0xe8480243,
-  0x7b6ca4c4, 0xe83c56cf, 0x7b67f919, 0xe830ac45,
-  0x7b634b23, 0xe82502a7, 0x7b5e9ae4, 0xe81959f4,
-  0x7b59e85a, 0xe80db22d, 0x7b553386, 0xe8020b52,
-  0x7b507c69, 0xe7f66564, 0x7b4bc303, 0xe7eac063,
-  0x7b470753, 0xe7df1c50, 0x7b42495a, 0xe7d3792b,
-  0x7b3d8918, 0xe7c7d6f4, 0x7b38c68e, 0xe7bc35ad,
-  0x7b3401bb, 0xe7b09555, 0x7b2f3aa0, 0xe7a4f5ed,
-  0x7b2a713d, 0xe7995776, 0x7b25a591, 0xe78db9ef,
-  0x7b20d79e, 0xe7821d59, 0x7b1c0764, 0xe77681b6,
-  0x7b1734e2, 0xe76ae704, 0x7b126019, 0xe75f4d45,
-  0x7b0d8909, 0xe753b479, 0x7b08afb2, 0xe7481ca1,
-  0x7b03d414, 0xe73c85bc, 0x7afef630, 0xe730efcc,
-  0x7afa1605, 0xe7255ad1, 0x7af53395, 0xe719c6cb,
-  0x7af04edf, 0xe70e33bb, 0x7aeb67e3, 0xe702a1a1,
-  0x7ae67ea1, 0xe6f7107e, 0x7ae1931a, 0xe6eb8052,
-  0x7adca54e, 0xe6dff11d, 0x7ad7b53d, 0xe6d462e1,
-  0x7ad2c2e8, 0xe6c8d59c, 0x7acdce4d, 0xe6bd4951,
-  0x7ac8d76f, 0xe6b1bdff, 0x7ac3de4c, 0xe6a633a6,
-  0x7abee2e5, 0xe69aaa48, 0x7ab9e53a, 0xe68f21e5,
-  0x7ab4e54c, 0xe6839a7c, 0x7aafe31b, 0xe6781410,
-  0x7aaadea6, 0xe66c8e9f, 0x7aa5d7ee, 0xe6610a2a,
-  0x7aa0cef3, 0xe65586b3, 0x7a9bc3b6, 0xe64a0438,
-  0x7a96b636, 0xe63e82bc, 0x7a91a674, 0xe633023e,
-  0x7a8c9470, 0xe62782be, 0x7a87802a, 0xe61c043d,
-  0x7a8269a3, 0xe61086bc, 0x7a7d50da, 0xe6050a3b,
-  0x7a7835cf, 0xe5f98ebb, 0x7a731884, 0xe5ee143b,
-  0x7a6df8f8, 0xe5e29abc, 0x7a68d72b, 0xe5d72240,
-  0x7a63b31d, 0xe5cbaac5, 0x7a5e8cd0, 0xe5c0344d,
-  0x7a596442, 0xe5b4bed8, 0x7a543974, 0xe5a94a67,
-  0x7a4f0c67, 0xe59dd6f9, 0x7a49dd1a, 0xe5926490,
-  0x7a44ab8e, 0xe586f32c, 0x7a3f77c3, 0xe57b82cd,
-  0x7a3a41b9, 0xe5701374, 0x7a350970, 0xe564a521,
-  0x7a2fcee8, 0xe55937d5, 0x7a2a9223, 0xe54dcb8f,
-  0x7a25531f, 0xe5426051, 0x7a2011de, 0xe536f61b,
-  0x7a1ace5f, 0xe52b8cee, 0x7a1588a2, 0xe52024c9,
-  0x7a1040a8, 0xe514bdad, 0x7a0af671, 0xe509579b,
-  0x7a05a9fd, 0xe4fdf294, 0x7a005b4d, 0xe4f28e96,
-  0x79fb0a60, 0xe4e72ba4, 0x79f5b737, 0xe4dbc9bd,
-  0x79f061d2, 0xe4d068e2, 0x79eb0a31, 0xe4c50914,
-  0x79e5b054, 0xe4b9aa52, 0x79e0543c, 0xe4ae4c9d,
-  0x79daf5e8, 0xe4a2eff6, 0x79d5955a, 0xe497945d,
-  0x79d03291, 0xe48c39d3, 0x79cacd8d, 0xe480e057,
-  0x79c5664f, 0xe47587eb, 0x79bffcd7, 0xe46a308f,
-  0x79ba9125, 0xe45eda43, 0x79b52339, 0xe4538507,
-  0x79afb313, 0xe44830dd, 0x79aa40b4, 0xe43cddc4,
-  0x79a4cc1c, 0xe4318bbe, 0x799f554b, 0xe4263ac9,
-  0x7999dc42, 0xe41aeae8, 0x799460ff, 0xe40f9c1a,
-  0x798ee385, 0xe4044e60, 0x798963d2, 0xe3f901ba,
-  0x7983e1e8, 0xe3edb628, 0x797e5dc6, 0xe3e26bac,
-  0x7978d76c, 0xe3d72245, 0x79734edc, 0xe3cbd9f4,
-  0x796dc414, 0xe3c092b9, 0x79683715, 0xe3b54c95,
-  0x7962a7e0, 0xe3aa0788, 0x795d1675, 0xe39ec393,
-  0x795782d3, 0xe39380b6, 0x7951ecfc, 0xe3883ef2,
-  0x794c54ee, 0xe37cfe47, 0x7946baac, 0xe371beb5,
-  0x79411e33, 0xe366803c, 0x793b7f86, 0xe35b42df,
-  0x7935dea4, 0xe350069b, 0x79303b8e, 0xe344cb73,
-  0x792a9642, 0xe3399167, 0x7924eec3, 0xe32e5876,
-  0x791f4510, 0xe32320a2, 0x79199929, 0xe317e9eb,
-  0x7913eb0e, 0xe30cb451, 0x790e3ac0, 0xe3017fd5,
-  0x7908883f, 0xe2f64c77, 0x7902d38b, 0xe2eb1a37,
-  0x78fd1ca4, 0xe2dfe917, 0x78f7638b, 0xe2d4b916,
-  0x78f1a840, 0xe2c98a35, 0x78ebeac2, 0xe2be5c74,
-  0x78e62b13, 0xe2b32fd4, 0x78e06932, 0xe2a80456,
-  0x78daa520, 0xe29cd9f8, 0x78d4dedd, 0xe291b0bd,
-  0x78cf1669, 0xe28688a4, 0x78c94bc4, 0xe27b61af,
-  0x78c37eef, 0xe2703bdc, 0x78bdafea, 0xe265172e,
-  0x78b7deb4, 0xe259f3a3, 0x78b20b4f, 0xe24ed13d,
-  0x78ac35ba, 0xe243affc, 0x78a65df6, 0xe2388fe1,
-  0x78a08402, 0xe22d70eb, 0x789aa7e0, 0xe222531c,
-  0x7894c98f, 0xe2173674, 0x788ee910, 0xe20c1af3,
-  0x78890663, 0xe2010099, 0x78832187, 0xe1f5e768,
-  0x787d3a7e, 0xe1eacf5f, 0x78775147, 0xe1dfb87f,
-  0x787165e3, 0xe1d4a2c8, 0x786b7852, 0xe1c98e3b,
-  0x78658894, 0xe1be7ad8, 0x785f96a9, 0xe1b368a0,
-  0x7859a292, 0xe1a85793, 0x7853ac4f, 0xe19d47b1,
-  0x784db3e0, 0xe19238fb, 0x7847b946, 0xe1872b72,
-  0x7841bc7f, 0xe17c1f15, 0x783bbd8e, 0xe17113e5,
-  0x7835bc71, 0xe16609e3, 0x782fb92a, 0xe15b0110,
-  0x7829b3b9, 0xe14ff96a, 0x7823ac1d, 0xe144f2f3,
-  0x781da256, 0xe139edac, 0x78179666, 0xe12ee995,
-  0x7811884d, 0xe123e6ad, 0x780b780a, 0xe118e4f6,
-  0x7805659e, 0xe10de470, 0x77ff5109, 0xe102e51c,
-  0x77f93a4b, 0xe0f7e6f9, 0x77f32165, 0xe0ecea09,
-  0x77ed0657, 0xe0e1ee4b, 0x77e6e921, 0xe0d6f3c1,
-  0x77e0c9c3, 0xe0cbfa6a, 0x77daa83d, 0xe0c10247,
-  0x77d48490, 0xe0b60b58, 0x77ce5ebd, 0xe0ab159e,
-  0x77c836c2, 0xe0a0211a, 0x77c20ca1, 0xe0952dcb,
-  0x77bbe05a, 0xe08a3bb2, 0x77b5b1ec, 0xe07f4acf,
-  0x77af8159, 0xe0745b24, 0x77a94ea0, 0xe0696cb0,
-  0x77a319c2, 0xe05e7f74, 0x779ce2be, 0xe053936f,
-  0x7796a996, 0xe048a8a4, 0x77906e49, 0xe03dbf11,
-  0x778a30d8, 0xe032d6b8, 0x7783f143, 0xe027ef99,
-  0x777daf89, 0xe01d09b4, 0x77776bac, 0xe012250a,
-  0x777125ac, 0xe007419b, 0x776add88, 0xdffc5f67,
-  0x77649341, 0xdff17e70, 0x775e46d8, 0xdfe69eb4,
-  0x7757f84c, 0xdfdbc036, 0x7751a79e, 0xdfd0e2f5,
-  0x774b54ce, 0xdfc606f1, 0x7744ffdd, 0xdfbb2c2c,
-  0x773ea8ca, 0xdfb052a5, 0x77384f95, 0xdfa57a5d,
-  0x7731f440, 0xdf9aa354, 0x772b96ca, 0xdf8fcd8b,
-  0x77253733, 0xdf84f902, 0x771ed57c, 0xdf7a25ba,
-  0x771871a5, 0xdf6f53b3, 0x77120bae, 0xdf6482ed,
-  0x770ba398, 0xdf59b369, 0x77053962, 0xdf4ee527,
-  0x76fecd0e, 0xdf441828, 0x76f85e9a, 0xdf394c6b,
-  0x76f1ee09, 0xdf2e81f3, 0x76eb7b58, 0xdf23b8be,
-  0x76e5068a, 0xdf18f0ce, 0x76de8f9e, 0xdf0e2a22,
-  0x76d81695, 0xdf0364bc, 0x76d19b6e, 0xdef8a09b,
-  0x76cb1e2a, 0xdeedddc0, 0x76c49ec9, 0xdee31c2b,
-  0x76be1d4c, 0xded85bdd, 0x76b799b3, 0xdecd9cd7,
-  0x76b113fd, 0xdec2df18, 0x76aa8c2c, 0xdeb822a1,
-  0x76a4023f, 0xdead6773, 0x769d7637, 0xdea2ad8d,
-  0x7696e814, 0xde97f4f1, 0x769057d6, 0xde8d3d9e,
-  0x7689c57d, 0xde828796, 0x7683310b, 0xde77d2d8,
-  0x767c9a7e, 0xde6d1f65, 0x767601d7, 0xde626d3e,
-  0x766f6717, 0xde57bc62, 0x7668ca3e, 0xde4d0cd2,
-  0x76622b4c, 0xde425e8f, 0x765b8a41, 0xde37b199,
-  0x7654e71d, 0xde2d05f1, 0x764e41e2, 0xde225b96,
-  0x76479a8e, 0xde17b28a, 0x7640f123, 0xde0d0acc,
-  0x763a45a0, 0xde02645d, 0x76339806, 0xddf7bf3e,
-  0x762ce855, 0xdded1b6e, 0x7626368d, 0xdde278ef,
-  0x761f82af, 0xddd7d7c1, 0x7618ccba, 0xddcd37e4,
-  0x761214b0, 0xddc29958, 0x760b5a90, 0xddb7fc1e,
-  0x76049e5b, 0xddad6036, 0x75fde011, 0xdda2c5a2,
-  0x75f71fb1, 0xdd982c60, 0x75f05d3d, 0xdd8d9472,
-  0x75e998b5, 0xdd82fdd8, 0x75e2d219, 0xdd786892,
-  0x75dc0968, 0xdd6dd4a2, 0x75d53ea5, 0xdd634206,
-  0x75ce71ce, 0xdd58b0c0, 0x75c7a2e3, 0xdd4e20d0,
-  0x75c0d1e7, 0xdd439236, 0x75b9fed7, 0xdd3904f4,
-  0x75b329b5, 0xdd2e7908, 0x75ac5282, 0xdd23ee74,
-  0x75a5793c, 0xdd196538, 0x759e9de5, 0xdd0edd55,
-  0x7597c07d, 0xdd0456ca, 0x7590e104, 0xdcf9d199,
-  0x7589ff7a, 0xdcef4dc2, 0x75831be0, 0xdce4cb44,
-  0x757c3636, 0xdcda4a21, 0x75754e7c, 0xdccfca59,
-  0x756e64b2, 0xdcc54bec, 0x756778d9, 0xdcbacedb,
-  0x75608af1, 0xdcb05326, 0x75599afa, 0xdca5d8cd,
-  0x7552a8f4, 0xdc9b5fd2, 0x754bb4e1, 0xdc90e834,
-  0x7544bebf, 0xdc8671f3, 0x753dc68f, 0xdc7bfd11,
-  0x7536cc52, 0xdc71898d, 0x752fd008, 0xdc671768,
-  0x7528d1b1, 0xdc5ca6a2, 0x7521d14d, 0xdc52373c,
-  0x751acedd, 0xdc47c936, 0x7513ca60, 0xdc3d5c91,
-  0x750cc3d8, 0xdc32f14d, 0x7505bb44, 0xdc28876a,
-  0x74feb0a5, 0xdc1e1ee9, 0x74f7a3fb, 0xdc13b7c9,
-  0x74f09546, 0xdc09520d, 0x74e98487, 0xdbfeedb3,
-  0x74e271bd, 0xdbf48abd, 0x74db5cea, 0xdbea292b,
-  0x74d4460c, 0xdbdfc8fc, 0x74cd2d26, 0xdbd56a32,
-  0x74c61236, 0xdbcb0cce, 0x74bef53d, 0xdbc0b0ce,
-  0x74b7d63c, 0xdbb65634, 0x74b0b533, 0xdbabfd01,
-  0x74a99221, 0xdba1a534, 0x74a26d08, 0xdb974ece,
-  0x749b45e7, 0xdb8cf9cf, 0x74941cbf, 0xdb82a638,
-  0x748cf190, 0xdb785409, 0x7485c45b, 0xdb6e0342,
-  0x747e951f, 0xdb63b3e5, 0x747763dd, 0xdb5965f1,
-  0x74703095, 0xdb4f1967, 0x7468fb47, 0xdb44ce46,
-  0x7461c3f5, 0xdb3a8491, 0x745a8a9d, 0xdb303c46,
-  0x74534f41, 0xdb25f566, 0x744c11e0, 0xdb1baff2,
-  0x7444d27b, 0xdb116beb, 0x743d9112, 0xdb072950,
-  0x74364da6, 0xdafce821, 0x742f0836, 0xdaf2a860,
-  0x7427c0c3, 0xdae86a0d, 0x7420774d, 0xdade2d28,
-  0x74192bd5, 0xdad3f1b1, 0x7411de5b, 0xdac9b7a9,
-  0x740a8edf, 0xdabf7f11, 0x74033d61, 0xdab547e8,
-  0x73fbe9e2, 0xdaab122f, 0x73f49462, 0xdaa0dde7,
-  0x73ed3ce1, 0xda96ab0f, 0x73e5e360, 0xda8c79a9,
-  0x73de87de, 0xda8249b4, 0x73d72a5d, 0xda781b31,
-  0x73cfcadc, 0xda6dee21, 0x73c8695b, 0xda63c284,
-  0x73c105db, 0xda599859, 0x73b9a05d, 0xda4f6fa3,
-  0x73b238e0, 0xda454860, 0x73aacf65, 0xda3b2292,
-  0x73a363ec, 0xda30fe38, 0x739bf675, 0xda26db54,
-  0x73948701, 0xda1cb9e5, 0x738d1590, 0xda1299ec,
-  0x7385a222, 0xda087b69, 0x737e2cb7, 0xd9fe5e5e,
-  0x7376b551, 0xd9f442c9, 0x736f3bee, 0xd9ea28ac,
-  0x7367c090, 0xd9e01006, 0x73604336, 0xd9d5f8d9,
-  0x7358c3e2, 0xd9cbe325, 0x73514292, 0xd9c1cee9,
-  0x7349bf48, 0xd9b7bc27, 0x73423a04, 0xd9adaadf,
-  0x733ab2c6, 0xd9a39b11, 0x7333298f, 0xd9998cbe,
-  0x732b9e5e, 0xd98f7fe6, 0x73241134, 0xd9857489,
-  0x731c8211, 0xd97b6aa8, 0x7314f0f6, 0xd9716243,
-  0x730d5de3, 0xd9675b5a, 0x7305c8d7, 0xd95d55ef,
-  0x72fe31d5, 0xd9535201, 0x72f698db, 0xd9494f90,
-  0x72eefdea, 0xd93f4e9e, 0x72e76102, 0xd9354f2a,
-  0x72dfc224, 0xd92b5135, 0x72d82150, 0xd92154bf,
-  0x72d07e85, 0xd91759c9, 0x72c8d9c6, 0xd90d6053,
-  0x72c13311, 0xd903685d, 0x72b98a67, 0xd8f971e8,
-  0x72b1dfc9, 0xd8ef7cf4, 0x72aa3336, 0xd8e58982,
-  0x72a284b0, 0xd8db9792, 0x729ad435, 0xd8d1a724,
-  0x729321c7, 0xd8c7b838, 0x728b6d66, 0xd8bdcad0,
-  0x7283b712, 0xd8b3deeb, 0x727bfecc, 0xd8a9f48a,
-  0x72744493, 0xd8a00bae, 0x726c8868, 0xd8962456,
-  0x7264ca4c, 0xd88c3e83, 0x725d0a3e, 0xd8825a35,
-  0x72554840, 0xd878776d, 0x724d8450, 0xd86e962b,
-  0x7245be70, 0xd864b670, 0x723df6a0, 0xd85ad83c,
-  0x72362ce0, 0xd850fb8e, 0x722e6130, 0xd8472069,
-  0x72269391, 0xd83d46cc, 0x721ec403, 0xd8336eb7,
-  0x7216f287, 0xd829982b, 0x720f1f1c, 0xd81fc328,
-  0x720749c3, 0xd815efae, 0x71ff727c, 0xd80c1dbf,
-  0x71f79948, 0xd8024d59, 0x71efbe27, 0xd7f87e7f,
-  0x71e7e118, 0xd7eeb130, 0x71e0021e, 0xd7e4e56c,
-  0x71d82137, 0xd7db1b34, 0x71d03e64, 0xd7d15288,
-  0x71c859a5, 0xd7c78b68, 0x71c072fb, 0xd7bdc5d6,
-  0x71b88a66, 0xd7b401d1, 0x71b09fe7, 0xd7aa3f5a,
-  0x71a8b37c, 0xd7a07e70, 0x71a0c528, 0xd796bf16,
-  0x7198d4ea, 0xd78d014a, 0x7190e2c3, 0xd783450d,
-  0x7188eeb2, 0xd7798a60, 0x7180f8b8, 0xd76fd143,
-  0x717900d6, 0xd76619b6, 0x7171070c, 0xd75c63ba,
-  0x71690b59, 0xd752af4f, 0x71610dbf, 0xd748fc75,
-  0x71590e3e, 0xd73f4b2e, 0x71510cd5, 0xd7359b78,
-  0x71490986, 0xd72bed55, 0x71410450, 0xd72240c5,
-  0x7138fd35, 0xd71895c9, 0x7130f433, 0xd70eec60,
-  0x7128e94c, 0xd705448b, 0x7120dc80, 0xd6fb9e4b,
-  0x7118cdcf, 0xd6f1f99f, 0x7110bd39, 0xd6e85689,
-  0x7108aabf, 0xd6deb508, 0x71009661, 0xd6d5151d,
-  0x70f8801f, 0xd6cb76c9, 0x70f067fb, 0xd6c1da0b,
-  0x70e84df3, 0xd6b83ee4, 0x70e03208, 0xd6aea555,
-  0x70d8143b, 0xd6a50d5d, 0x70cff48c, 0xd69b76fe,
-  0x70c7d2fb, 0xd691e237, 0x70bfaf89, 0xd6884f09,
-  0x70b78a36, 0xd67ebd74, 0x70af6302, 0xd6752d79,
-  0x70a739ed, 0xd66b9f18, 0x709f0ef8, 0xd6621251,
-  0x7096e223, 0xd6588725, 0x708eb36f, 0xd64efd94,
-  0x708682dc, 0xd645759f, 0x707e5069, 0xd63bef46,
-  0x70761c18, 0xd6326a88, 0x706de5e9, 0xd628e767,
-  0x7065addb, 0xd61f65e4, 0x705d73f0, 0xd615e5fd,
-  0x70553828, 0xd60c67b4, 0x704cfa83, 0xd602eb0a,
-  0x7044bb00, 0xd5f96ffd, 0x703c79a2, 0xd5eff690,
-  0x70343667, 0xd5e67ec1, 0x702bf151, 0xd5dd0892,
-  0x7023aa5f, 0xd5d39403, 0x701b6193, 0xd5ca2115,
-  0x701316eb, 0xd5c0afc6, 0x700aca69, 0xd5b74019,
-  0x70027c0c, 0xd5add20d, 0x6ffa2bd6, 0xd5a465a3,
-  0x6ff1d9c7, 0xd59afadb, 0x6fe985de, 0xd59191b5,
-  0x6fe1301c, 0xd5882a32, 0x6fd8d882, 0xd57ec452,
-  0x6fd07f0f, 0xd5756016, 0x6fc823c5, 0xd56bfd7d,
-  0x6fbfc6a3, 0xd5629c89, 0x6fb767aa, 0xd5593d3a,
-  0x6faf06da, 0xd54fdf8f, 0x6fa6a433, 0xd5468389,
-  0x6f9e3fb6, 0xd53d292a, 0x6f95d963, 0xd533d070,
-  0x6f8d713a, 0xd52a795d, 0x6f85073c, 0xd52123f0,
-  0x6f7c9b69, 0xd517d02b, 0x6f742dc1, 0xd50e7e0d,
-  0x6f6bbe45, 0xd5052d97, 0x6f634cf5, 0xd4fbdec9,
-  0x6f5ad9d1, 0xd4f291a4, 0x6f5264da, 0xd4e94627,
-  0x6f49ee0f, 0xd4dffc54, 0x6f417573, 0xd4d6b42b,
-  0x6f38fb03, 0xd4cd6dab, 0x6f307ec2, 0xd4c428d6,
-  0x6f2800af, 0xd4bae5ab, 0x6f1f80ca, 0xd4b1a42c,
-  0x6f16ff14, 0xd4a86458, 0x6f0e7b8e, 0xd49f2630,
-  0x6f05f637, 0xd495e9b3, 0x6efd6f10, 0xd48caee4,
-  0x6ef4e619, 0xd48375c1, 0x6eec5b53, 0xd47a3e4b,
-  0x6ee3cebe, 0xd4710883, 0x6edb405a, 0xd467d469,
-  0x6ed2b027, 0xd45ea1fd, 0x6eca1e27, 0xd4557140,
-  0x6ec18a58, 0xd44c4232, 0x6eb8f4bc, 0xd44314d3,
-  0x6eb05d53, 0xd439e923, 0x6ea7c41e, 0xd430bf24,
-  0x6e9f291b, 0xd42796d5, 0x6e968c4d, 0xd41e7037,
-  0x6e8dedb3, 0xd4154b4a, 0x6e854d4d, 0xd40c280e,
-  0x6e7cab1c, 0xd4030684, 0x6e740720, 0xd3f9e6ad,
-  0x6e6b615a, 0xd3f0c887, 0x6e62b9ca, 0xd3e7ac15,
-  0x6e5a1070, 0xd3de9156, 0x6e51654c, 0xd3d5784a,
-  0x6e48b860, 0xd3cc60f2, 0x6e4009aa, 0xd3c34b4f,
-  0x6e37592c, 0xd3ba3760, 0x6e2ea6e6, 0xd3b12526,
-  0x6e25f2d8, 0xd3a814a2, 0x6e1d3d03, 0xd39f05d3,
-  0x6e148566, 0xd395f8ba, 0x6e0bcc03, 0xd38ced57,
-  0x6e0310d9, 0xd383e3ab, 0x6dfa53e9, 0xd37adbb6,
-  0x6df19534, 0xd371d579, 0x6de8d4b8, 0xd368d0f3,
-  0x6de01278, 0xd35fce26, 0x6dd74e73, 0xd356cd11,
-  0x6dce88aa, 0xd34dcdb4, 0x6dc5c11c, 0xd344d011,
-  0x6dbcf7cb, 0xd33bd427, 0x6db42cb6, 0xd332d9f7,
-  0x6dab5fdf, 0xd329e181, 0x6da29144, 0xd320eac6,
-  0x6d99c0e7, 0xd317f5c6, 0x6d90eec8, 0xd30f0280,
-  0x6d881ae8, 0xd30610f7, 0x6d7f4545, 0xd2fd2129,
-  0x6d766de2, 0xd2f43318, 0x6d6d94bf, 0xd2eb46c3,
-  0x6d64b9da, 0xd2e25c2b, 0x6d5bdd36, 0xd2d97350,
-  0x6d52fed2, 0xd2d08c33, 0x6d4a1eaf, 0xd2c7a6d4,
-  0x6d413ccd, 0xd2bec333, 0x6d38592c, 0xd2b5e151,
-  0x6d2f73cd, 0xd2ad012e, 0x6d268cb0, 0xd2a422ca,
-  0x6d1da3d5, 0xd29b4626, 0x6d14b93d, 0xd2926b41,
-  0x6d0bcce8, 0xd289921e, 0x6d02ded7, 0xd280babb,
-  0x6cf9ef09, 0xd277e518, 0x6cf0fd80, 0xd26f1138,
-  0x6ce80a3a, 0xd2663f19, 0x6cdf153a, 0xd25d6ebc,
-  0x6cd61e7f, 0xd254a021, 0x6ccd2609, 0xd24bd34a,
-  0x6cc42bd9, 0xd2430835, 0x6cbb2fef, 0xd23a3ee4,
-  0x6cb2324c, 0xd2317756, 0x6ca932ef, 0xd228b18d,
-  0x6ca031da, 0xd21fed88, 0x6c972f0d, 0xd2172b48,
-  0x6c8e2a87, 0xd20e6acc, 0x6c85244a, 0xd205ac17,
-  0x6c7c1c55, 0xd1fcef27, 0x6c7312a9, 0xd1f433fd,
-  0x6c6a0746, 0xd1eb7a9a, 0x6c60fa2d, 0xd1e2c2fd,
-  0x6c57eb5e, 0xd1da0d28, 0x6c4edada, 0xd1d1591a,
-  0x6c45c8a0, 0xd1c8a6d4, 0x6c3cb4b1, 0xd1bff656,
-  0x6c339f0e, 0xd1b747a0, 0x6c2a87b6, 0xd1ae9ab4,
-  0x6c216eaa, 0xd1a5ef90, 0x6c1853eb, 0xd19d4636,
-  0x6c0f3779, 0xd1949ea6, 0x6c061953, 0xd18bf8e0,
-  0x6bfcf97c, 0xd18354e4, 0x6bf3d7f2, 0xd17ab2b3,
-  0x6beab4b6, 0xd172124d, 0x6be18fc9, 0xd16973b3,
-  0x6bd8692b, 0xd160d6e5, 0x6bcf40dc, 0xd1583be2,
-  0x6bc616dd, 0xd14fa2ad, 0x6bbceb2d, 0xd1470b44,
-  0x6bb3bdce, 0xd13e75a8, 0x6baa8ec0, 0xd135e1d9,
-  0x6ba15e03, 0xd12d4fd9, 0x6b982b97, 0xd124bfa6,
-  0x6b8ef77d, 0xd11c3142, 0x6b85c1b5, 0xd113a4ad,
-  0x6b7c8a3f, 0xd10b19e7, 0x6b73511c, 0xd10290f0,
-  0x6b6a164d, 0xd0fa09c9, 0x6b60d9d0, 0xd0f18472,
-  0x6b579ba8, 0xd0e900ec, 0x6b4e5bd4, 0xd0e07f36,
-  0x6b451a55, 0xd0d7ff51, 0x6b3bd72a, 0xd0cf813e,
-  0x6b329255, 0xd0c704fd, 0x6b294bd5, 0xd0be8a8d,
-  0x6b2003ac, 0xd0b611f1, 0x6b16b9d9, 0xd0ad9b26,
-  0x6b0d6e5c, 0xd0a5262f, 0x6b042137, 0xd09cb30b,
-  0x6afad269, 0xd09441bb, 0x6af181f3, 0xd08bd23f,
-  0x6ae82fd5, 0xd0836497, 0x6adedc10, 0xd07af8c4,
-  0x6ad586a3, 0xd0728ec6, 0x6acc2f90, 0xd06a269d,
-  0x6ac2d6d6, 0xd061c04a, 0x6ab97c77, 0xd0595bcd,
-  0x6ab02071, 0xd050f926, 0x6aa6c2c6, 0xd0489856,
-  0x6a9d6377, 0xd040395d, 0x6a940283, 0xd037dc3b,
-  0x6a8a9fea, 0xd02f80f1, 0x6a813bae, 0xd027277e,
-  0x6a77d5ce, 0xd01ecfe4, 0x6a6e6e4b, 0xd0167a22,
-  0x6a650525, 0xd00e2639, 0x6a5b9a5d, 0xd005d42a,
-  0x6a522df3, 0xcffd83f4, 0x6a48bfe7, 0xcff53597,
-  0x6a3f503a, 0xcfece915, 0x6a35deeb, 0xcfe49e6d,
-  0x6a2c6bfd, 0xcfdc55a1, 0x6a22f76e, 0xcfd40eaf,
-  0x6a19813f, 0xcfcbc999, 0x6a100970, 0xcfc3865e,
-  0x6a069003, 0xcfbb4500, 0x69fd14f6, 0xcfb3057d,
-  0x69f3984c, 0xcfaac7d8, 0x69ea1a03, 0xcfa28c10,
-  0x69e09a1c, 0xcf9a5225, 0x69d71899, 0xcf921a17,
-  0x69cd9578, 0xcf89e3e8, 0x69c410ba, 0xcf81af97,
-  0x69ba8a61, 0xcf797d24, 0x69b1026c, 0xcf714c91,
-  0x69a778db, 0xcf691ddd, 0x699dedaf, 0xcf60f108,
-  0x699460e8, 0xcf58c613, 0x698ad287, 0xcf509cfe,
-  0x6981428c, 0xcf4875ca, 0x6977b0f7, 0xcf405077,
-  0x696e1dc9, 0xcf382d05, 0x69648902, 0xcf300b74,
-  0x695af2a3, 0xcf27ebc5, 0x69515aab, 0xcf1fcdf8,
-  0x6947c11c, 0xcf17b20d, 0x693e25f5, 0xcf0f9805,
-  0x69348937, 0xcf077fe1, 0x692aeae3, 0xceff699f,
-  0x69214af8, 0xcef75541, 0x6917a977, 0xceef42c7,
-  0x690e0661, 0xcee73231, 0x690461b5, 0xcedf2380,
-  0x68fabb75, 0xced716b4, 0x68f113a0, 0xcecf0bcd,
-  0x68e76a37, 0xcec702cb, 0x68ddbf3b, 0xcebefbb0,
-  0x68d412ab, 0xceb6f67a, 0x68ca6488, 0xceaef32b,
-  0x68c0b4d2, 0xcea6f1c2, 0x68b7038b, 0xce9ef241,
-  0x68ad50b1, 0xce96f4a7, 0x68a39c46, 0xce8ef8f4,
-  0x6899e64a, 0xce86ff2a, 0x68902ebd, 0xce7f0748,
-  0x688675a0, 0xce77114e, 0x687cbaf3, 0xce6f1d3d,
-  0x6872feb6, 0xce672b16, 0x686940ea, 0xce5f3ad8,
-  0x685f8190, 0xce574c84, 0x6855c0a6, 0xce4f6019,
-  0x684bfe2f, 0xce47759a, 0x68423a2a, 0xce3f8d05,
-  0x68387498, 0xce37a65b, 0x682ead78, 0xce2fc19c,
-  0x6824e4cc, 0xce27dec9, 0x681b1a94, 0xce1ffde2,
-  0x68114ed0, 0xce181ee8, 0x68078181, 0xce1041d9,
-  0x67fdb2a7, 0xce0866b8, 0x67f3e241, 0xce008d84,
-  0x67ea1052, 0xcdf8b63d, 0x67e03cd8, 0xcdf0e0e4,
-  0x67d667d5, 0xcde90d79, 0x67cc9149, 0xcde13bfd,
-  0x67c2b934, 0xcdd96c6f, 0x67b8df97, 0xcdd19ed0,
-  0x67af0472, 0xcdc9d320, 0x67a527c4, 0xcdc20960,
-  0x679b4990, 0xcdba4190, 0x679169d5, 0xcdb27bb0,
-  0x67878893, 0xcdaab7c0, 0x677da5cb, 0xcda2f5c2,
-  0x6773c17d, 0xcd9b35b4, 0x6769dbaa, 0xcd937798,
-  0x675ff452, 0xcd8bbb6d, 0x67560b76, 0xcd840134,
-  0x674c2115, 0xcd7c48ee, 0x67423530, 0xcd74929a,
-  0x673847c8, 0xcd6cde39, 0x672e58dc, 0xcd652bcb,
-  0x6724686e, 0xcd5d7b50, 0x671a767e, 0xcd55ccca,
-  0x6710830c, 0xcd4e2037, 0x67068e18, 0xcd467599,
-  0x66fc97a3, 0xcd3eccef, 0x66f29fad, 0xcd37263a,
-  0x66e8a637, 0xcd2f817b, 0x66deab41, 0xcd27deb0,
-  0x66d4aecb, 0xcd203ddc, 0x66cab0d6, 0xcd189efe,
-  0x66c0b162, 0xcd110216, 0x66b6b070, 0xcd096725,
-  0x66acadff, 0xcd01ce2b, 0x66a2aa11, 0xccfa3729,
-  0x6698a4a6, 0xccf2a21d, 0x668e9dbd, 0xcceb0f0a,
-  0x66849558, 0xcce37def, 0x667a8b77, 0xccdbeecc,
-  0x6670801a, 0xccd461a2, 0x66667342, 0xccccd671,
-  0x665c64ef, 0xccc54d3a, 0x66525521, 0xccbdc5fc,
-  0x664843d9, 0xccb640b8, 0x663e3117, 0xccaebd6e,
-  0x66341cdb, 0xcca73c1e, 0x662a0727, 0xcc9fbcca,
-  0x661feffa, 0xcc983f70, 0x6615d754, 0xcc90c412,
-  0x660bbd37, 0xcc894aaf, 0x6601a1a2, 0xcc81d349,
-  0x65f78497, 0xcc7a5dde, 0x65ed6614, 0xcc72ea70,
-  0x65e3461b, 0xcc6b78ff, 0x65d924ac, 0xcc64098b,
-  0x65cf01c8, 0xcc5c9c14, 0x65c4dd6e, 0xcc55309b,
-  0x65bab7a0, 0xcc4dc720, 0x65b0905d, 0xcc465fa3,
-  0x65a667a7, 0xcc3efa25, 0x659c3d7c, 0xcc3796a5,
-  0x659211df, 0xcc303524, 0x6587e4cf, 0xcc28d5a3,
-  0x657db64c, 0xcc217822, 0x65738657, 0xcc1a1ca0,
-  0x656954f1, 0xcc12c31f, 0x655f2219, 0xcc0b6b9e,
-  0x6554edd1, 0xcc04161e, 0x654ab818, 0xcbfcc29f,
-  0x654080ef, 0xcbf57121, 0x65364857, 0xcbee21a5,
-  0x652c0e4f, 0xcbe6d42b, 0x6521d2d8, 0xcbdf88b3,
-  0x651795f3, 0xcbd83f3d, 0x650d57a0, 0xcbd0f7ca,
-  0x650317df, 0xcbc9b25a, 0x64f8d6b0, 0xcbc26eee,
-  0x64ee9415, 0xcbbb2d85, 0x64e4500e, 0xcbb3ee20,
-  0x64da0a9a, 0xcbacb0bf, 0x64cfc3ba, 0xcba57563,
-  0x64c57b6f, 0xcb9e3c0b, 0x64bb31ba, 0xcb9704b9,
-  0x64b0e699, 0xcb8fcf6b, 0x64a69a0f, 0xcb889c23,
-  0x649c4c1b, 0xcb816ae1, 0x6491fcbe, 0xcb7a3ba5,
-  0x6487abf7, 0xcb730e70, 0x647d59c8, 0xcb6be341,
-  0x64730631, 0xcb64ba19, 0x6468b132, 0xcb5d92f8,
-  0x645e5acc, 0xcb566ddf, 0x645402ff, 0xcb4f4acd,
-  0x6449a9cc, 0xcb4829c4, 0x643f4f32, 0xcb410ac3,
-  0x6434f332, 0xcb39edca, 0x642a95ce, 0xcb32d2da,
-  0x64203704, 0xcb2bb9f4, 0x6415d6d5, 0xcb24a316,
-  0x640b7543, 0xcb1d8e43, 0x6401124d, 0xcb167b79,
-  0x63f6adf3, 0xcb0f6aba, 0x63ec4837, 0xcb085c05,
-  0x63e1e117, 0xcb014f5b, 0x63d77896, 0xcafa44bc,
-  0x63cd0eb3, 0xcaf33c28, 0x63c2a36f, 0xcaec35a0,
-  0x63b836ca, 0xcae53123, 0x63adc8c4, 0xcade2eb3,
-  0x63a3595e, 0xcad72e4f, 0x6398e898, 0xcad02ff8,
-  0x638e7673, 0xcac933ae, 0x638402ef, 0xcac23971,
-  0x63798e0d, 0xcabb4141, 0x636f17cc, 0xcab44b1f,
-  0x6364a02e, 0xcaad570c, 0x635a2733, 0xcaa66506,
-  0x634facda, 0xca9f750f, 0x63453125, 0xca988727,
-  0x633ab414, 0xca919b4e, 0x633035a7, 0xca8ab184,
-  0x6325b5df, 0xca83c9ca, 0x631b34bc, 0xca7ce420,
-  0x6310b23e, 0xca760086, 0x63062e67, 0xca6f1efc,
-  0x62fba936, 0xca683f83, 0x62f122ab, 0xca61621b,
-  0x62e69ac8, 0xca5a86c4, 0x62dc118c, 0xca53ad7e,
-  0x62d186f8, 0xca4cd64b, 0x62c6fb0c, 0xca460129,
-  0x62bc6dca, 0xca3f2e19, 0x62b1df30, 0xca385d1d,
-  0x62a74f40, 0xca318e32, 0x629cbdfa, 0xca2ac15b,
-  0x62922b5e, 0xca23f698, 0x6287976e, 0xca1d2de7,
-  0x627d0228, 0xca16674b, 0x62726b8e, 0xca0fa2c3,
-  0x6267d3a0, 0xca08e04f, 0x625d3a5e, 0xca021fef,
-  0x62529fca, 0xc9fb61a5, 0x624803e2, 0xc9f4a570,
-  0x623d66a8, 0xc9edeb50, 0x6232c81c, 0xc9e73346,
-  0x6228283f, 0xc9e07d51, 0x621d8711, 0xc9d9c973,
-  0x6212e492, 0xc9d317ab, 0x620840c2, 0xc9cc67fa,
-  0x61fd9ba3, 0xc9c5ba60, 0x61f2f534, 0xc9bf0edd,
-  0x61e84d76, 0xc9b86572, 0x61dda46a, 0xc9b1be1e,
-  0x61d2fa0f, 0xc9ab18e3, 0x61c84e67, 0xc9a475bf,
-  0x61bda171, 0xc99dd4b4, 0x61b2f32e, 0xc99735c2,
-  0x61a8439e, 0xc99098e9, 0x619d92c2, 0xc989fe29,
-  0x6192e09b, 0xc9836582, 0x61882d28, 0xc97ccef5,
-  0x617d786a, 0xc9763a83, 0x6172c262, 0xc96fa82a,
-  0x61680b0f, 0xc96917ec, 0x615d5273, 0xc96289c9,
-  0x6152988d, 0xc95bfdc1, 0x6147dd5f, 0xc95573d4,
-  0x613d20e8, 0xc94eec03, 0x61326329, 0xc948664d,
-  0x6127a423, 0xc941e2b4, 0x611ce3d5, 0xc93b6137,
-  0x61122240, 0xc934e1d6, 0x61075f65, 0xc92e6492,
-  0x60fc9b44, 0xc927e96b, 0x60f1d5de, 0xc9217062,
-  0x60e70f32, 0xc91af976, 0x60dc4742, 0xc91484a8,
-  0x60d17e0d, 0xc90e11f7, 0x60c6b395, 0xc907a166,
-  0x60bbe7d8, 0xc90132f2, 0x60b11ad9, 0xc8fac69e,
-  0x60a64c97, 0xc8f45c68, 0x609b7d13, 0xc8edf452,
-  0x6090ac4d, 0xc8e78e5b, 0x6085da46, 0xc8e12a84,
-  0x607b06fe, 0xc8dac8cd, 0x60703275, 0xc8d46936,
-  0x60655cac, 0xc8ce0bc0, 0x605a85a3, 0xc8c7b06b,
-  0x604fad5b, 0xc8c15736, 0x6044d3d4, 0xc8bb0023,
-  0x6039f90f, 0xc8b4ab32, 0x602f1d0b, 0xc8ae5862,
-  0x60243fca, 0xc8a807b4, 0x6019614c, 0xc8a1b928,
-  0x600e8190, 0xc89b6cbf, 0x6003a099, 0xc8952278,
-  0x5ff8be65, 0xc88eda54, 0x5feddaf6, 0xc8889454,
-  0x5fe2f64c, 0xc8825077, 0x5fd81067, 0xc87c0ebd,
-  0x5fcd2948, 0xc875cf28, 0x5fc240ef, 0xc86f91b7,
-  0x5fb7575c, 0xc869566a, 0x5fac6c91, 0xc8631d42,
-  0x5fa1808c, 0xc85ce63e, 0x5f969350, 0xc856b160,
-  0x5f8ba4dc, 0xc8507ea7, 0x5f80b531, 0xc84a4e14,
-  0x5f75c44e, 0xc8441fa6, 0x5f6ad235, 0xc83df35f,
-  0x5f5fdee6, 0xc837c93e, 0x5f54ea62, 0xc831a143,
-  0x5f49f4a8, 0xc82b7b70, 0x5f3efdb9, 0xc82557c3,
-  0x5f340596, 0xc81f363d, 0x5f290c3f, 0xc81916df,
-  0x5f1e11b5, 0xc812f9a9, 0x5f1315f7, 0xc80cde9b,
-  0x5f081907, 0xc806c5b5, 0x5efd1ae4, 0xc800aef7,
-  0x5ef21b90, 0xc7fa9a62, 0x5ee71b0a, 0xc7f487f6,
-  0x5edc1953, 0xc7ee77b3, 0x5ed1166b, 0xc7e8699a,
-  0x5ec61254, 0xc7e25daa, 0x5ebb0d0d, 0xc7dc53e3,
-  0x5eb00696, 0xc7d64c47, 0x5ea4fef0, 0xc7d046d6,
-  0x5e99f61d, 0xc7ca438f, 0x5e8eec1b, 0xc7c44272,
-  0x5e83e0eb, 0xc7be4381, 0x5e78d48e, 0xc7b846ba,
-  0x5e6dc705, 0xc7b24c20, 0x5e62b84f, 0xc7ac53b1,
-  0x5e57a86d, 0xc7a65d6e, 0x5e4c9760, 0xc7a06957,
-  0x5e418528, 0xc79a776c, 0x5e3671c5, 0xc79487ae,
-  0x5e2b5d38, 0xc78e9a1d, 0x5e204781, 0xc788aeb9,
-  0x5e1530a1, 0xc782c582, 0x5e0a1898, 0xc77cde79,
-  0x5dfeff67, 0xc776f99d, 0x5df3e50d, 0xc77116f0,
-  0x5de8c98c, 0xc76b3671, 0x5dddace4, 0xc7655820,
-  0x5dd28f15, 0xc75f7bfe, 0x5dc7701f, 0xc759a20a,
-  0x5dbc5004, 0xc753ca46, 0x5db12ec3, 0xc74df4b1,
-  0x5da60c5d, 0xc748214c, 0x5d9ae8d2, 0xc7425016,
-  0x5d8fc424, 0xc73c8111, 0x5d849e51, 0xc736b43c,
-  0x5d79775c, 0xc730e997, 0x5d6e4f43, 0xc72b2123,
-  0x5d632608, 0xc7255ae0, 0x5d57fbaa, 0xc71f96ce,
-  0x5d4cd02c, 0xc719d4ed, 0x5d41a38c, 0xc714153e,
-  0x5d3675cb, 0xc70e57c0, 0x5d2b46ea, 0xc7089c75,
-  0x5d2016e9, 0xc702e35c, 0x5d14e5c9, 0xc6fd2c75,
-  0x5d09b389, 0xc6f777c1, 0x5cfe802b, 0xc6f1c540,
-  0x5cf34baf, 0xc6ec14f2, 0x5ce81615, 0xc6e666d7,
-  0x5cdcdf5e, 0xc6e0baf0, 0x5cd1a78a, 0xc6db113d,
-  0x5cc66e99, 0xc6d569be, 0x5cbb348d, 0xc6cfc472,
-  0x5caff965, 0xc6ca215c, 0x5ca4bd21, 0xc6c4807a,
-  0x5c997fc4, 0xc6bee1cd, 0x5c8e414b, 0xc6b94554,
-  0x5c8301b9, 0xc6b3ab12, 0x5c77c10e, 0xc6ae1304,
-  0x5c6c7f4a, 0xc6a87d2d, 0x5c613c6d, 0xc6a2e98b,
-  0x5c55f878, 0xc69d5820, 0x5c4ab36b, 0xc697c8eb,
-  0x5c3f6d47, 0xc6923bec, 0x5c34260c, 0xc68cb124,
-  0x5c28ddbb, 0xc6872894, 0x5c1d9454, 0xc681a23a,
-  0x5c1249d8, 0xc67c1e18, 0x5c06fe46, 0xc6769c2e,
-  0x5bfbb1a0, 0xc6711c7b, 0x5bf063e6, 0xc66b9f01,
-  0x5be51518, 0xc66623be, 0x5bd9c537, 0xc660aab5,
-  0x5bce7442, 0xc65b33e4, 0x5bc3223c, 0xc655bf4c,
-  0x5bb7cf23, 0xc6504ced, 0x5bac7af9, 0xc64adcc7,
-  0x5ba125bd, 0xc6456edb, 0x5b95cf71, 0xc6400329,
-  0x5b8a7815, 0xc63a99b1, 0x5b7f1fa9, 0xc6353273,
-  0x5b73c62d, 0xc62fcd6f, 0x5b686ba3, 0xc62a6aa6,
-  0x5b5d100a, 0xc6250a18, 0x5b51b363, 0xc61fabc4,
-  0x5b4655ae, 0xc61a4fac, 0x5b3af6ec, 0xc614f5cf,
-  0x5b2f971e, 0xc60f9e2e, 0x5b243643, 0xc60a48c9,
-  0x5b18d45c, 0xc604f5a0, 0x5b0d716a, 0xc5ffa4b3,
-  0x5b020d6c, 0xc5fa5603, 0x5af6a865, 0xc5f5098f,
-  0x5aeb4253, 0xc5efbf58, 0x5adfdb37, 0xc5ea775e,
-  0x5ad47312, 0xc5e531a1, 0x5ac909e5, 0xc5dfee22,
-  0x5abd9faf, 0xc5daace1, 0x5ab23471, 0xc5d56ddd,
-  0x5aa6c82b, 0xc5d03118, 0x5a9b5adf, 0xc5caf690,
-  0x5a8fec8c, 0xc5c5be47, 0x5a847d33, 0xc5c0883d,
-  0x5a790cd4, 0xc5bb5472, 0x5a6d9b70, 0xc5b622e6,
-  0x5a622907, 0xc5b0f399, 0x5a56b599, 0xc5abc68c,
-  0x5a4b4128, 0xc5a69bbe, 0x5a3fcbb3, 0xc5a17330,
-  0x5a34553b, 0xc59c4ce3, 0x5a28ddc0, 0xc59728d5,
-  0x5a1d6544, 0xc5920708, 0x5a11ebc5, 0xc58ce77c,
-  0x5a067145, 0xc587ca31, 0x59faf5c5, 0xc582af26,
-  0x59ef7944, 0xc57d965d, 0x59e3fbc3, 0xc5787fd6,
-  0x59d87d42, 0xc5736b90, 0x59ccfdc2, 0xc56e598c,
-  0x59c17d44, 0xc56949ca, 0x59b5fbc8, 0xc5643c4a,
-  0x59aa794d, 0xc55f310d, 0x599ef5d6, 0xc55a2812,
-  0x59937161, 0xc555215a, 0x5987ebf0, 0xc5501ce5,
-  0x597c6584, 0xc54b1ab4, 0x5970de1b, 0xc5461ac6,
-  0x596555b8, 0xc5411d1b, 0x5959cc5a, 0xc53c21b4,
-  0x594e4201, 0xc5372891, 0x5942b6af, 0xc53231b3,
-  0x59372a64, 0xc52d3d18, 0x592b9d1f, 0xc5284ac3,
-  0x59200ee3, 0xc5235ab2, 0x59147fae, 0xc51e6ce6,
-  0x5908ef82, 0xc519815f, 0x58fd5e5f, 0xc514981d,
-  0x58f1cc45, 0xc50fb121, 0x58e63935, 0xc50acc6b,
-  0x58daa52f, 0xc505e9fb, 0x58cf1034, 0xc50109d0,
-  0x58c37a44, 0xc4fc2bec, 0x58b7e35f, 0xc4f7504e,
-  0x58ac4b87, 0xc4f276f7, 0x58a0b2bb, 0xc4ed9fe7,
-  0x589518fc, 0xc4e8cb1e, 0x58897e4a, 0xc4e3f89c,
-  0x587de2a7, 0xc4df2862, 0x58724611, 0xc4da5a6f,
-  0x5866a88a, 0xc4d58ec3, 0x585b0a13, 0xc4d0c560,
-  0x584f6aab, 0xc4cbfe45, 0x5843ca53, 0xc4c73972,
-  0x5838290c, 0xc4c276e8, 0x582c86d5, 0xc4bdb6a6,
-  0x5820e3b0, 0xc4b8f8ad, 0x58153f9d, 0xc4b43cfd,
-  0x58099a9c, 0xc4af8397, 0x57fdf4ae, 0xc4aacc7a,
-  0x57f24dd3, 0xc4a617a6, 0x57e6a60c, 0xc4a1651c,
-  0x57dafd59, 0xc49cb4dd, 0x57cf53bb, 0xc49806e7,
-  0x57c3a931, 0xc4935b3c, 0x57b7fdbd, 0xc48eb1db,
-  0x57ac515f, 0xc48a0ac4, 0x57a0a417, 0xc48565f9,
-  0x5794f5e6, 0xc480c379, 0x578946cc, 0xc47c2344,
-  0x577d96ca, 0xc477855a, 0x5771e5e0, 0xc472e9bc,
-  0x5766340f, 0xc46e5069, 0x575a8157, 0xc469b963,
-  0x574ecdb8, 0xc46524a9, 0x57431933, 0xc460923b,
-  0x573763c9, 0xc45c0219, 0x572bad7a, 0xc4577444,
-  0x571ff646, 0xc452e8bc, 0x57143e2d, 0xc44e5f80,
-  0x57088531, 0xc449d892, 0x56fccb51, 0xc44553f2,
-  0x56f1108f, 0xc440d19e, 0x56e554ea, 0xc43c5199,
-  0x56d99864, 0xc437d3e1, 0x56cddafb, 0xc4335877,
-  0x56c21cb2, 0xc42edf5c, 0x56b65d88, 0xc42a688f,
-  0x56aa9d7e, 0xc425f410, 0x569edc94, 0xc42181e0,
-  0x56931acb, 0xc41d11ff, 0x56875823, 0xc418a46d,
-  0x567b949d, 0xc414392b, 0x566fd039, 0xc40fd037,
-  0x56640af7, 0xc40b6994, 0x565844d8, 0xc4070540,
-  0x564c7ddd, 0xc402a33c, 0x5640b606, 0xc3fe4388,
-  0x5634ed53, 0xc3f9e624, 0x562923c5, 0xc3f58b10,
-  0x561d595d, 0xc3f1324e, 0x56118e1a, 0xc3ecdbdc,
-  0x5605c1fd, 0xc3e887bb, 0x55f9f507, 0xc3e435ea,
-  0x55ee2738, 0xc3dfe66c, 0x55e25890, 0xc3db993e,
-  0x55d68911, 0xc3d74e62, 0x55cab8ba, 0xc3d305d8,
-  0x55bee78c, 0xc3cebfa0, 0x55b31587, 0xc3ca7bba,
-  0x55a742ac, 0xc3c63a26, 0x559b6efb, 0xc3c1fae5,
-  0x558f9a76, 0xc3bdbdf6, 0x5583c51b, 0xc3b9835a,
-  0x5577eeec, 0xc3b54b11, 0x556c17e9, 0xc3b1151b,
-  0x55604013, 0xc3ace178, 0x5554676a, 0xc3a8b028,
-  0x55488dee, 0xc3a4812c, 0x553cb3a0, 0xc3a05484,
-  0x5530d881, 0xc39c2a2f, 0x5524fc90, 0xc398022f,
-  0x55191fcf, 0xc393dc82, 0x550d423d, 0xc38fb92a,
-  0x550163dc, 0xc38b9827, 0x54f584ac, 0xc3877978,
-  0x54e9a4ac, 0xc3835d1e, 0x54ddc3de, 0xc37f4319,
-  0x54d1e242, 0xc37b2b6a, 0x54c5ffd9, 0xc377160f,
-  0x54ba1ca3, 0xc373030a, 0x54ae38a0, 0xc36ef25b,
-  0x54a253d1, 0xc36ae401, 0x54966e36, 0xc366d7fd,
-  0x548a87d1, 0xc362ce50, 0x547ea0a0, 0xc35ec6f8,
-  0x5472b8a5, 0xc35ac1f7, 0x5466cfe1, 0xc356bf4d,
-  0x545ae653, 0xc352bef9, 0x544efbfc, 0xc34ec0fc,
-  0x544310dd, 0xc34ac556, 0x543724f5, 0xc346cc07,
-  0x542b3846, 0xc342d510, 0x541f4ad1, 0xc33ee070,
-  0x54135c94, 0xc33aee27, 0x54076d91, 0xc336fe37,
-  0x53fb7dc9, 0xc333109e, 0x53ef8d3c, 0xc32f255e,
-  0x53e39be9, 0xc32b3c75, 0x53d7a9d3, 0xc32755e5,
-  0x53cbb6f8, 0xc32371ae, 0x53bfc35b, 0xc31f8fcf,
-  0x53b3cefa, 0xc31bb049, 0x53a7d9d7, 0xc317d31c,
-  0x539be3f2, 0xc313f848, 0x538fed4b, 0xc3101fce,
-  0x5383f5e3, 0xc30c49ad, 0x5377fdbb, 0xc30875e5,
-  0x536c04d2, 0xc304a477, 0x53600b2a, 0xc300d563,
-  0x535410c3, 0xc2fd08a9, 0x5348159d, 0xc2f93e4a,
-  0x533c19b8, 0xc2f57644, 0x53301d16, 0xc2f1b099,
-  0x53241fb6, 0xc2eded49, 0x5318219a, 0xc2ea2c53,
-  0x530c22c1, 0xc2e66db8, 0x5300232c, 0xc2e2b178,
-  0x52f422db, 0xc2def794, 0x52e821cf, 0xc2db400a,
-  0x52dc2009, 0xc2d78add, 0x52d01d89, 0xc2d3d80a,
-  0x52c41a4f, 0xc2d02794, 0x52b8165b, 0xc2cc7979,
-  0x52ac11af, 0xc2c8cdbb, 0x52a00c4b, 0xc2c52459,
-  0x5294062f, 0xc2c17d52, 0x5287ff5b, 0xc2bdd8a9,
-  0x527bf7d1, 0xc2ba365c, 0x526fef90, 0xc2b6966c,
-  0x5263e699, 0xc2b2f8d8, 0x5257dced, 0xc2af5da2,
-  0x524bd28c, 0xc2abc4c9, 0x523fc776, 0xc2a82e4d,
-  0x5233bbac, 0xc2a49a2e, 0x5227af2e, 0xc2a1086d,
-  0x521ba1fd, 0xc29d790a, 0x520f941a, 0xc299ec05,
-  0x52038584, 0xc296615d, 0x51f7763c, 0xc292d914,
-  0x51eb6643, 0xc28f5329, 0x51df5599, 0xc28bcf9c,
-  0x51d3443f, 0xc2884e6e, 0x51c73235, 0xc284cf9f,
-  0x51bb1f7c, 0xc281532e, 0x51af0c13, 0xc27dd91c,
-  0x51a2f7fc, 0xc27a616a, 0x5196e337, 0xc276ec16,
-  0x518acdc4, 0xc2737922, 0x517eb7a4, 0xc270088e,
-  0x5172a0d7, 0xc26c9a58, 0x5166895f, 0xc2692e83,
-  0x515a713a, 0xc265c50e, 0x514e586a, 0xc2625df8,
-  0x51423ef0, 0xc25ef943, 0x513624cb, 0xc25b96ee,
-  0x512a09fc, 0xc25836f9, 0x511dee84, 0xc254d965,
-  0x5111d263, 0xc2517e31, 0x5105b599, 0xc24e255e,
-  0x50f99827, 0xc24aceed, 0x50ed7a0e, 0xc2477adc,
-  0x50e15b4e, 0xc244292c, 0x50d53be7, 0xc240d9de,
-  0x50c91bda, 0xc23d8cf1, 0x50bcfb28, 0xc23a4265,
-  0x50b0d9d0, 0xc236fa3b, 0x50a4b7d3, 0xc233b473,
-  0x50989532, 0xc230710d, 0x508c71ee, 0xc22d3009,
-  0x50804e06, 0xc229f167, 0x5074297b, 0xc226b528,
-  0x5068044e, 0xc2237b4b, 0x505bde7f, 0xc22043d0,
-  0x504fb80e, 0xc21d0eb8, 0x504390fd, 0xc219dc03,
-  0x5037694b, 0xc216abb1, 0x502b40f8, 0xc2137dc2,
-  0x501f1807, 0xc2105236, 0x5012ee76, 0xc20d290d,
-  0x5006c446, 0xc20a0248, 0x4ffa9979, 0xc206dde6,
-  0x4fee6e0d, 0xc203bbe8, 0x4fe24205, 0xc2009c4e,
-  0x4fd6155f, 0xc1fd7f17, 0x4fc9e81e, 0xc1fa6445,
-  0x4fbdba40, 0xc1f74bd6, 0x4fb18bc8, 0xc1f435cc,
-  0x4fa55cb4, 0xc1f12227, 0x4f992d06, 0xc1ee10e5,
-  0x4f8cfcbe, 0xc1eb0209, 0x4f80cbdc, 0xc1e7f591,
-  0x4f749a61, 0xc1e4eb7e, 0x4f68684e, 0xc1e1e3d0,
-  0x4f5c35a3, 0xc1dede87, 0x4f500260, 0xc1dbdba3,
-  0x4f43ce86, 0xc1d8db25, 0x4f379a16, 0xc1d5dd0c,
-  0x4f2b650f, 0xc1d2e158, 0x4f1f2f73, 0xc1cfe80a,
-  0x4f12f941, 0xc1ccf122, 0x4f06c27a, 0xc1c9fca0,
-  0x4efa8b20, 0xc1c70a84, 0x4eee5331, 0xc1c41ace,
-  0x4ee21aaf, 0xc1c12d7e, 0x4ed5e19a, 0xc1be4294,
-  0x4ec9a7f3, 0xc1bb5a11, 0x4ebd6db9, 0xc1b873f5,
-  0x4eb132ef, 0xc1b5903f, 0x4ea4f793, 0xc1b2aef0,
-  0x4e98bba7, 0xc1afd007, 0x4e8c7f2a, 0xc1acf386,
-  0x4e80421e, 0xc1aa196c, 0x4e740483, 0xc1a741b9,
-  0x4e67c65a, 0xc1a46c6e, 0x4e5b87a2, 0xc1a1998a,
-  0x4e4f485c, 0xc19ec90d, 0x4e430889, 0xc19bfaf9,
-  0x4e36c82a, 0xc1992f4c, 0x4e2a873e, 0xc1966606,
-  0x4e1e45c6, 0xc1939f29, 0x4e1203c3, 0xc190dab4,
-  0x4e05c135, 0xc18e18a7, 0x4df97e1d, 0xc18b5903,
-  0x4ded3a7b, 0xc1889bc6, 0x4de0f64f, 0xc185e0f3,
-  0x4dd4b19a, 0xc1832888, 0x4dc86c5d, 0xc1807285,
-  0x4dbc2698, 0xc17dbeec, 0x4dafe04b, 0xc17b0dbb,
-  0x4da39978, 0xc1785ef4, 0x4d97521d, 0xc175b296,
-  0x4d8b0a3d, 0xc17308a1, 0x4d7ec1d6, 0xc1706115,
-  0x4d7278eb, 0xc16dbbf3, 0x4d662f7b, 0xc16b193a,
-  0x4d59e586, 0xc16878eb, 0x4d4d9b0e, 0xc165db05,
-  0x4d415013, 0xc1633f8a, 0x4d350495, 0xc160a678,
-  0x4d28b894, 0xc15e0fd1, 0x4d1c6c11, 0xc15b7b94,
-  0x4d101f0e, 0xc158e9c1, 0x4d03d189, 0xc1565a58,
-  0x4cf78383, 0xc153cd5a, 0x4ceb34fe, 0xc15142c6,
-  0x4cdee5f9, 0xc14eba9d, 0x4cd29676, 0xc14c34df,
-  0x4cc64673, 0xc149b18b, 0x4cb9f5f3, 0xc14730a3,
-  0x4cada4f5, 0xc144b225, 0x4ca1537a, 0xc1423613,
-  0x4c950182, 0xc13fbc6c, 0x4c88af0e, 0xc13d4530,
-  0x4c7c5c1e, 0xc13ad060, 0x4c7008b3, 0xc1385dfb,
-  0x4c63b4ce, 0xc135ee02, 0x4c57606e, 0xc1338075,
-  0x4c4b0b94, 0xc1311553, 0x4c3eb641, 0xc12eac9d,
-  0x4c326075, 0xc12c4653, 0x4c260a31, 0xc129e276,
-  0x4c19b374, 0xc1278104, 0x4c0d5c41, 0xc12521ff,
-  0x4c010496, 0xc122c566, 0x4bf4ac75, 0xc1206b39,
-  0x4be853de, 0xc11e1379, 0x4bdbfad1, 0xc11bbe26,
-  0x4bcfa150, 0xc1196b3f, 0x4bc34759, 0xc1171ac6,
-  0x4bb6ecef, 0xc114ccb9, 0x4baa9211, 0xc1128119,
-  0x4b9e36c0, 0xc11037e6, 0x4b91dafc, 0xc10df120,
-  0x4b857ec7, 0xc10bacc8, 0x4b79221f, 0xc1096add,
-  0x4b6cc506, 0xc1072b5f, 0x4b60677c, 0xc104ee4f,
-  0x4b540982, 0xc102b3ac, 0x4b47ab19, 0xc1007b77,
-  0x4b3b4c40, 0xc0fe45b0, 0x4b2eecf8, 0xc0fc1257,
-  0x4b228d42, 0xc0f9e16b, 0x4b162d1d, 0xc0f7b2ee,
-  0x4b09cc8c, 0xc0f586df, 0x4afd6b8d, 0xc0f35d3e,
-  0x4af10a22, 0xc0f1360b, 0x4ae4a84b, 0xc0ef1147,
-  0x4ad84609, 0xc0eceef1, 0x4acbe35b, 0xc0eacf09,
-  0x4abf8043, 0xc0e8b190, 0x4ab31cc1, 0xc0e69686,
-  0x4aa6b8d5, 0xc0e47deb, 0x4a9a5480, 0xc0e267be,
-  0x4a8defc3, 0xc0e05401, 0x4a818a9d, 0xc0de42b2,
-  0x4a752510, 0xc0dc33d2, 0x4a68bf1b, 0xc0da2762,
-  0x4a5c58c0, 0xc0d81d61, 0x4a4ff1fe, 0xc0d615cf,
-  0x4a438ad7, 0xc0d410ad, 0x4a37234a, 0xc0d20dfa,
-  0x4a2abb59, 0xc0d00db6, 0x4a1e5303, 0xc0ce0fe3,
-  0x4a11ea49, 0xc0cc147f, 0x4a05812c, 0xc0ca1b8a,
-  0x49f917ac, 0xc0c82506, 0x49ecadc9, 0xc0c630f2,
-  0x49e04385, 0xc0c43f4d, 0x49d3d8df, 0xc0c25019,
-  0x49c76dd8, 0xc0c06355, 0x49bb0271, 0xc0be7901,
-  0x49ae96aa, 0xc0bc911d, 0x49a22a83, 0xc0baabaa,
-  0x4995bdfd, 0xc0b8c8a7, 0x49895118, 0xc0b6e815,
-  0x497ce3d5, 0xc0b509f3, 0x49707635, 0xc0b32e42,
-  0x49640837, 0xc0b15502, 0x495799dd, 0xc0af7e33,
-  0x494b2b27, 0xc0ada9d4, 0x493ebc14, 0xc0abd7e6,
-  0x49324ca7, 0xc0aa086a, 0x4925dcdf, 0xc0a83b5e,
-  0x49196cbc, 0xc0a670c4, 0x490cfc40, 0xc0a4a89b,
-  0x49008b6a, 0xc0a2e2e3, 0x48f41a3c, 0xc0a11f9d,
-  0x48e7a8b5, 0xc09f5ec8, 0x48db36d6, 0xc09da065,
-  0x48cec4a0, 0xc09be473, 0x48c25213, 0xc09a2af3,
-  0x48b5df30, 0xc09873e4, 0x48a96bf6, 0xc096bf48,
-  0x489cf867, 0xc0950d1d, 0x48908483, 0xc0935d64,
-  0x4884104b, 0xc091b01d, 0x48779bbe, 0xc0900548,
-  0x486b26de, 0xc08e5ce5, 0x485eb1ab, 0xc08cb6f5,
-  0x48523c25, 0xc08b1376, 0x4845c64d, 0xc089726a,
-  0x48395024, 0xc087d3d0, 0x482cd9a9, 0xc08637a9,
-  0x482062de, 0xc0849df4, 0x4813ebc2, 0xc08306b2,
-  0x48077457, 0xc08171e2, 0x47fafc9c, 0xc07fdf85,
-  0x47ee8493, 0xc07e4f9b, 0x47e20c3b, 0xc07cc223,
-  0x47d59396, 0xc07b371e, 0x47c91aa3, 0xc079ae8c,
-  0x47bca163, 0xc078286e, 0x47b027d7, 0xc076a4c2,
-  0x47a3adff, 0xc0752389, 0x479733dc, 0xc073a4c3,
-  0x478ab96e, 0xc0722871, 0x477e3eb5, 0xc070ae92,
-  0x4771c3b3, 0xc06f3726, 0x47654867, 0xc06dc22e,
-  0x4758ccd2, 0xc06c4fa8, 0x474c50f4, 0xc06adf97,
-  0x473fd4cf, 0xc06971f9, 0x47335862, 0xc06806ce,
-  0x4726dbae, 0xc0669e18, 0x471a5eb3, 0xc06537d4,
-  0x470de172, 0xc063d405, 0x470163eb, 0xc06272aa,
-  0x46f4e620, 0xc06113c2, 0x46e86810, 0xc05fb74e,
-  0x46dbe9bb, 0xc05e5d4e, 0x46cf6b23, 0xc05d05c3,
-  0x46c2ec48, 0xc05bb0ab, 0x46b66d29, 0xc05a5e07,
-  0x46a9edc9, 0xc0590dd8, 0x469d6e27, 0xc057c01d,
-  0x4690ee44, 0xc05674d6, 0x46846e1f, 0xc0552c03,
-  0x4677edbb, 0xc053e5a5, 0x466b6d16, 0xc052a1bb,
-  0x465eec33, 0xc0516045, 0x46526b10, 0xc0502145,
-  0x4645e9af, 0xc04ee4b8, 0x46396810, 0xc04daaa1,
-  0x462ce634, 0xc04c72fe, 0x4620641a, 0xc04b3dcf,
-  0x4613e1c5, 0xc04a0b16, 0x46075f33, 0xc048dad1,
-  0x45fadc66, 0xc047ad01, 0x45ee595d, 0xc04681a6,
-  0x45e1d61b, 0xc04558c0, 0x45d5529e, 0xc044324f,
-  0x45c8cee7, 0xc0430e53, 0x45bc4af8, 0xc041eccc,
-  0x45afc6d0, 0xc040cdba, 0x45a3426f, 0xc03fb11d,
-  0x4596bdd7, 0xc03e96f6, 0x458a3908, 0xc03d7f44,
-  0x457db403, 0xc03c6a07, 0x45712ec7, 0xc03b573f,
-  0x4564a955, 0xc03a46ed, 0x455823ae, 0xc0393910,
-  0x454b9dd3, 0xc0382da8, 0x453f17c3, 0xc03724b6,
-  0x4532917f, 0xc0361e3a, 0x45260b08, 0xc0351a33,
-  0x4519845e, 0xc03418a2, 0x450cfd82, 0xc0331986,
-  0x45007674, 0xc0321ce0, 0x44f3ef35, 0xc03122b0,
-  0x44e767c5, 0xc0302af5, 0x44dae024, 0xc02f35b1,
-  0x44ce5854, 0xc02e42e2, 0x44c1d054, 0xc02d5289,
-  0x44b54825, 0xc02c64a6, 0x44a8bfc7, 0xc02b7939,
-  0x449c373c, 0xc02a9042, 0x448fae83, 0xc029a9c1,
-  0x4483259d, 0xc028c5b6, 0x44769c8b, 0xc027e421,
-  0x446a134c, 0xc0270502, 0x445d89e2, 0xc0262859,
-  0x4451004d, 0xc0254e27, 0x4444768d, 0xc024766a,
-  0x4437eca4, 0xc023a124, 0x442b6290, 0xc022ce54,
-  0x441ed854, 0xc021fdfb, 0x44124dee, 0xc0213018,
-  0x4405c361, 0xc02064ab, 0x43f938ac, 0xc01f9bb5,
-  0x43ecadcf, 0xc01ed535, 0x43e022cc, 0xc01e112b,
-  0x43d397a3, 0xc01d4f99, 0x43c70c54, 0xc01c907c,
-  0x43ba80df, 0xc01bd3d6, 0x43adf546, 0xc01b19a7,
-  0x43a16988, 0xc01a61ee, 0x4394dda7, 0xc019acac,
-  0x438851a2, 0xc018f9e1, 0x437bc57b, 0xc018498c,
-  0x436f3931, 0xc0179bae, 0x4362acc5, 0xc016f047,
-  0x43562038, 0xc0164757, 0x43499389, 0xc015a0dd,
-  0x433d06bb, 0xc014fcda, 0x433079cc, 0xc0145b4e,
-  0x4323ecbe, 0xc013bc39, 0x43175f91, 0xc0131f9b,
-  0x430ad245, 0xc0128574, 0x42fe44dc, 0xc011edc3,
-  0x42f1b755, 0xc011588a, 0x42e529b0, 0xc010c5c7,
-  0x42d89bf0, 0xc010357c, 0x42cc0e13, 0xc00fa7a8,
-  0x42bf801a, 0xc00f1c4a, 0x42b2f207, 0xc00e9364,
-  0x42a663d8, 0xc00e0cf5, 0x4299d590, 0xc00d88fd,
-  0x428d472e, 0xc00d077c, 0x4280b8b3, 0xc00c8872,
-  0x42742a1f, 0xc00c0be0, 0x42679b73, 0xc00b91c4,
-  0x425b0caf, 0xc00b1a20, 0x424e7dd4, 0xc00aa4f3,
-  0x4241eee2, 0xc00a323d, 0x42355fd9, 0xc009c1ff,
-  0x4228d0bb, 0xc0095438, 0x421c4188, 0xc008e8e8,
-  0x420fb240, 0xc008800f, 0x420322e3, 0xc00819ae,
-  0x41f69373, 0xc007b5c4, 0x41ea03ef, 0xc0075452,
-  0x41dd7459, 0xc006f556, 0x41d0e4b0, 0xc00698d3,
-  0x41c454f5, 0xc0063ec6, 0x41b7c528, 0xc005e731,
-  0x41ab354b, 0xc0059214, 0x419ea55d, 0xc0053f6e,
-  0x4192155f, 0xc004ef3f, 0x41858552, 0xc004a188,
-  0x4178f536, 0xc0045648, 0x416c650b, 0xc0040d80,
-  0x415fd4d2, 0xc003c72f, 0x4153448c, 0xc0038356,
-  0x4146b438, 0xc00341f4, 0x413a23d8, 0xc003030a,
-  0x412d936c, 0xc002c697, 0x412102f4, 0xc0028c9c,
-  0x41147271, 0xc0025519, 0x4107e1e3, 0xc002200d,
-  0x40fb514b, 0xc001ed78, 0x40eec0aa, 0xc001bd5c,
-  0x40e22fff, 0xc0018fb6, 0x40d59f4c, 0xc0016489,
-  0x40c90e90, 0xc0013bd3, 0x40bc7dcc, 0xc0011594,
-  0x40afed02, 0xc000f1ce, 0x40a35c30, 0xc000d07e,
-  0x4096cb58, 0xc000b1a7, 0x408a3a7b, 0xc0009547,
-  0x407da998, 0xc0007b5f, 0x407118b0, 0xc00063ee,
-  0x406487c4, 0xc0004ef5, 0x4057f6d4, 0xc0003c74,
-  0x404b65e1, 0xc0002c6a, 0x403ed4ea, 0xc0001ed8,
-  0x403243f1, 0xc00013bd, 0x4025b2f7, 0xc0000b1a,
-  0x401921fb, 0xc00004ef, 0x400c90fe, 0xc000013c,
-};
-
-/**    
-* @brief  Initialization function for the Q31 RFFT/RIFFT.   
-* @param[in, out] *S             points to an instance of the Q31 RFFT/RIFFT structure.   
-* @param[in, out] *S_CFFT        points to an instance of the Q31 CFFT/CIFFT structure.   
-* @param[in]      fftLenReal     length of the FFT.   
-* @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
-* @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.   
-*    
-* \par Description:   
-* \par   
-* The parameter fftLenReal	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
-* \par    
-* The parameter ifftFlagR controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par    
-* This function also initializes Twiddle factor table.    
-*/
-
-arm_status arm_rfft_init_q31(
-  arm_rfft_instance_q31 * S,
-  arm_cfft_radix4_instance_q31 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialize the Real FFT length */
-  S->fftLenReal = (uint16_t) fftLenReal;
-
-  /*  Initialize the Complex FFT length */
-  S->fftLenBy2 = (uint16_t) fftLenReal / 2u;
-
-  /*  Initialize the Twiddle coefficientA pointer */
-  S->pTwiddleAReal = (q31_t *) realCoefAQ31;
-
-  /*  Initialize the Twiddle coefficientB pointer */
-  S->pTwiddleBReal = (q31_t *) realCoefBQ31;
-
-  /*  Initialize the Flag for selection of RFFT or RIFFT */
-  S->ifftFlagR = (uint8_t) ifftFlagR;
-
-  /*  Initialize the Flag for calculation Bit reversal or not */
-  S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-  /*  Initialization of coef modifier depending on the FFT length */
-  switch (S->fftLenReal)
-  {
-  case 8192:
-    S->twidCoefRModifier = 1u;
-    break;
-  case 2048u:
-    S->twidCoefRModifier = 4u;
-    break;
-  case 512u:
-    S->twidCoefRModifier = 16u;
-    break;
-  case 128u:
-    S->twidCoefRModifier = 64u;
-    break;
-  default:
-    /*  Reporting argument error if rfftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  /* Init Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  if(S->ifftFlagR)
-  {
-    /* Initializes the CIFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_q31(S->pCfft, (uint16_t) S->fftLenBy2, 1u, 1u);
-  }
-  else
-  {
-    /* Initializes the CFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_q31(S->pCfft, (uint16_t) S->fftLenBy2, 0u, 1u);
-  }
-
-  /* return the status of RFFT Init function */
-  return (status);
-
-}
-
-  /**    
-   * @} end of RFFT_RIFFT group    
-   */
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c
deleted file mode 100644
index a307ecd215..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c
+++ /dev/null
@@ -1,460 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_q15.c    
-*    
-* Description:	RFFT & RIFFT Q15 process function    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------    
-*		Internal functions prototypes    
---------------------------------------------------------------------*/
-
-void arm_split_rfft_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pATable,
-  q15_t * pBTable,
-  q15_t * pDst,
-  uint32_t modifier);
-
-void arm_split_rifft_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pATable,
-  q15_t * pBTable,
-  q15_t * pDst,
-  uint32_t modifier);
-
-/**    
- * @addtogroup RFFT_RIFFT    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 RFFT/RIFFT.   
- * @param[in]  *S    points to an instance of the Q15 RFFT/RIFFT structure.   
- * @param[in]  *pSrc points to the input buffer.   
- * @param[out] *pDst points to the output buffer.   
- * @return none.   
- *    
- * \par Input an output formats:   
- * \par    
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.    
- * Hence the output format is different for different RFFT sizes.    
- * The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:   
- * \par    
- * \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"    
- * \par    
- * \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"    
- */
-
-void arm_rfft_q15(
-  const arm_rfft_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst)
-{
-  const arm_cfft_radix4_instance_q15 *S_CFFT = S->pCfft;
-
-  /* Calculation of RIFFT of input */
-  if(S->ifftFlagR == 1u)
-  {
-    /*  Real IFFT core process */
-    arm_split_rifft_q15(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-
-    /* Complex readix-4 IFFT process */
-    arm_radix4_butterfly_inverse_q15(pDst, S_CFFT->fftLen,
-                                     S_CFFT->pTwiddle,
-                                     S_CFFT->twidCoefModifier);
-
-    /* Bit reversal process */
-    if(S->bitReverseFlagR == 1u)
-    {
-      arm_bitreversal_q15(pDst, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-  }
-  else
-  {
-    /* Calculation of RFFT of input */
-
-    /* Complex readix-4 FFT process */
-    arm_radix4_butterfly_q15(pSrc, S_CFFT->fftLen,
-                             S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
-
-    /* Bit reversal process */
-    if(S->bitReverseFlagR == 1u)
-    {
-      arm_bitreversal_q15(pSrc, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-
-    arm_split_rfft_q15(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                       S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-  }
-
-}
-
-  /**    
-   * @} end of RFFT_RIFFT group    
-   */
-
-/**    
- * @brief  Core Real FFT process    
- * @param  *pSrc 				points to the input buffer.   
- * @param  fftLen  				length of FFT.   
- * @param  *pATable 			points to the A twiddle Coef buffer.    
- * @param  *pBTable 			points to the B twiddle Coef buffer.   
- * @param  *pDst 				points to the output buffer.   
- * @param  modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.    
- * The function implements a Real FFT    
- */
-
-void arm_split_rfft_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pATable,
-  q15_t * pBTable,
-  q15_t * pDst,
-  uint32_t modifier)
-{
-  uint32_t i;                                    /* Loop Counter */
-  q31_t outR, outI;                              /* Temporary variables for output */
-  q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-  q15_t *pSrc1, *pSrc2;
-
-
-//  pSrc[2u * fftLen] = pSrc[0]; 
-//  pSrc[(2u * fftLen) + 1u] = pSrc[1]; 
-
-  pCoefA = &pATable[modifier * 2u];
-  pCoefB = &pBTable[modifier * 2u];
-
-  pSrc1 = &pSrc[2];
-  pSrc2 = &pSrc[(2u * fftLen) - 2u];
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  i = 1u;
-
-  while(i < fftLen)
-  {
-    /*    
-       outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-       + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-       pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-     */
-
-    /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
-
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
-    outR = __SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA));
-
-#else
-
-    /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
-    outR = -(__SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA)));
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-       pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
-    outR = __SMLAD(*__SIMD32(pSrc2), *__SIMD32(pCoefB), outR) >> 15u;
-
-    /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    outI = __SMUSDX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
-
-#else
-
-    outI = __SMUSDX(*__SIMD32(pCoefB), *__SIMD32(pSrc2)--);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
-    outI = __SMLADX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), outI);
-
-    /* write output */
-    pDst[2u * i] = (q15_t) outR;
-    pDst[(2u * i) + 1u] = outI >> 15u;
-
-    /* write complex conjugate output */
-    pDst[(4u * fftLen) - (2u * i)] = (q15_t) outR;
-    pDst[((4u * fftLen) - (2u * i)) + 1u] = -(outI >> 15u);
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (2u * modifier);
-    pCoefA = pCoefA + (2u * modifier);
-
-    i++;
-
-  }
-
-  pDst[2u * fftLen] = pSrc[0] - pSrc[1];
-  pDst[(2u * fftLen) + 1u] = 0;
-
-  pDst[0] = pSrc[0] + pSrc[1];
-  pDst[1] = 0;
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  i = 1u;
-
-  while(i < fftLen)
-  {
-    /*    
-       outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-       + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-       pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-     */
-
-    outR = *pSrc1 * *pCoefA;
-    outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1));
-    outR = outR + (*pSrc2 * *pCoefB);
-    outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 15;
-
-
-    /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);   
-     */
-
-    outI = *pSrc2 * *(pCoefB + 1);
-    outI = outI - (*(pSrc2 + 1) * *pCoefB);
-    outI = outI + (*(pSrc1 + 1) * *pCoefA);
-    outI = outI + (*pSrc1 * *(pCoefA + 1));
-
-    /* update input pointers */
-    pSrc1 += 2u;
-    pSrc2 -= 2u;
-
-    /* write output */
-    pDst[2u * i] = (q15_t) outR;
-    pDst[(2u * i) + 1u] = outI >> 15u;
-
-    /* write complex conjugate output */
-    pDst[(4u * fftLen) - (2u * i)] = (q15_t) outR;
-    pDst[((4u * fftLen) - (2u * i)) + 1u] = -(outI >> 15u);
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (2u * modifier);
-    pCoefA = pCoefA + (2u * modifier);
-
-    i++;
-
-  }
-
-  pDst[2u * fftLen] = pSrc[0] - pSrc[1];
-  pDst[(2u * fftLen) + 1u] = 0;
-
-  pDst[0] = pSrc[0] + pSrc[1];
-  pDst[1] = 0;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-
-/**    
- * @brief  Core Real IFFT process    
- * @param[in]   *pSrc 				points to the input buffer.    
- * @param[in]   fftLen  		    length of FFT.   
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.   
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
- * @param[out]  *pDst 				points to the output buffer.   
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.    
- * The function implements a Real IFFT    
- */
-void arm_split_rifft_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pATable,
-  q15_t * pBTable,
-  q15_t * pDst,
-  uint32_t modifier)
-{
-  uint32_t i;                                    /* Loop Counter */
-  q31_t outR, outI;                              /* Temporary variables for output */
-  q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-  q15_t *pSrc1, *pSrc2;
-  q15_t *pDst1 = &pDst[0];
-
-  pCoefA = &pATable[0];
-  pCoefB = &pBTable[0];
-
-  pSrc1 = &pSrc[0];
-  pSrc2 = &pSrc[2u * fftLen];
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  i = fftLen;
-
-  while(i > 0u)
-  {
-
-    /*    
-       outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-
-       outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);    
-
-     */
-
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
-    outR = __SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB));
-
-#else
-
-    /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] +  
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
-    outR = -(__SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB)));
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i] */
-    outR = __SMLAD(*__SIMD32(pSrc1), *__SIMD32(pCoefA), outR) >> 15u;
-
-    /*    
-       -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] +    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-    outI = __SMUADX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
-
-    /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    outI = __SMLSDX(*__SIMD32(pCoefA), *__SIMD32(pSrc1)++, -outI);
-
-#else
-
-    outI = __SMLSDX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), -outI);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-    /* write output */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst1)++ = __PKHBT(outR, (outI >> 15u), 16);
-
-#else
-
-    *__SIMD32(pDst1)++ = __PKHBT((outI >> 15u), outR, 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (2u * modifier);
-    pCoefA = pCoefA + (2u * modifier);
-
-    i--;
-
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  i = fftLen;
-
-  while(i > 0u)
-  {
-
-    /*    
-       outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-     */
-
-    outR = *pSrc2 * *pCoefB;
-    outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
-    outR = outR + (*pSrc1 * *pCoefA);
-    outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 15;
-
-    /*   
-       outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -   
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -   
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);   
-     */
-
-    outI = *(pSrc1 + 1) * *pCoefA;
-    outI = outI - (*pSrc1 * *(pCoefA + 1));
-    outI = outI - (*pSrc2 * *(pCoefB + 1));
-    outI = outI - (*(pSrc2 + 1) * *(pCoefB));
-
-    /* update input pointers */
-    pSrc1 += 2u;
-    pSrc2 -= 2u;
-
-    /* write output */
-    *pDst1++ = (q15_t) outR;
-    *pDst1++ = (q15_t) (outI >> 15);
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (2u * modifier);
-    pCoefA = pCoefA + (2u * modifier);
-
-    i--;
-
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
diff --git a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c b/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c
deleted file mode 100644
index c50c2951a5..0000000000
--- a/bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c
+++ /dev/null
@@ -1,326 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_q31.c    
-*    
-* Description:	RFFT & RIFFT Q31 process function    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------    
-*		Internal functions prototypes    
---------------------------------------------------------------------*/
-
-void arm_split_rfft_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pATable,
-  q31_t * pBTable,
-  q31_t * pDst,
-  uint32_t modifier);
-
-void arm_split_rifft_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pATable,
-  q31_t * pBTable,
-  q31_t * pDst,
-  uint32_t modifier);
-
-/**    
- * @addtogroup RFFT_RIFFT    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 RFFT/RIFFT.   
- * @param[in]  *S    points to an instance of the Q31 RFFT/RIFFT structure.   
- * @param[in]  *pSrc points to the input buffer.   
- * @param[out] *pDst points to the output buffer.   
- * @return none.   
- *    
- * \par Input an output formats:   
- * \par    
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.   
- * Hence the output format is different for different RFFT sizes.    
- * The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:   
- * \par    
- * \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT"    
- *    
- * \par    
- * \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT"    
- */
-
-void arm_rfft_q31(
-  const arm_rfft_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst)
-{
-  const arm_cfft_radix4_instance_q31 *S_CFFT = S->pCfft;
-
-  /* Calculation of RIFFT of input */
-  if(S->ifftFlagR == 1u)
-  {
-    /*  Real IFFT core process */
-    arm_split_rifft_q31(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-
-    /* Complex readix-4 IFFT process */
-    arm_radix4_butterfly_inverse_q31(pDst, S_CFFT->fftLen,
-                                     S_CFFT->pTwiddle,
-                                     S_CFFT->twidCoefModifier);
-    /* Bit reversal process */
-    if(S->bitReverseFlagR == 1u)
-    {
-      arm_bitreversal_q31(pDst, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-  }
-  else
-  {
-    /* Calculation of RFFT of input */
-
-    /* Complex readix-4 FFT process */
-    arm_radix4_butterfly_q31(pSrc, S_CFFT->fftLen,
-                             S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
-
-    /* Bit reversal process */
-    if(S->bitReverseFlagR == 1u)
-    {
-      arm_bitreversal_q31(pSrc, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-
-    /*  Real FFT core process */
-    arm_split_rfft_q31(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                       S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-  }
-
-}
-
-
-  /**    
-   * @} end of RFFT_RIFFT group    
-   */
-
-/**    
- * @brief  Core Real FFT process    
- * @param[in]   *pSrc 				points to the input buffer.    
- * @param[in]   fftLen  			length of FFT.   
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.    
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
- * @param[out]  *pDst 				points to the output buffer.    
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.    
- */
-
-void arm_split_rfft_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pATable,
-  q31_t * pBTable,
-  q31_t * pDst,
-  uint32_t modifier)
-{
-  uint32_t i;                                    /* Loop Counter */
-  q31_t outR, outI;                              /* Temporary variables for output */
-  q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-  q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
-  q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[(4u * fftLen) - 1u];
-  q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[(2u * fftLen) - 1u];
-
-  /* Init coefficient pointers */
-  pCoefA = &pATable[modifier * 2u];
-  pCoefB = &pBTable[modifier * 2u];
-
-  i = fftLen - 1u;
-
-  while(i > 0u)
-  {
-    /*    
-       outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-       + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-       pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-     */
-
-    /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
-
-    CoefA1 = *pCoefA++;
-    CoefA2 = *pCoefA;
-
-    /* outR = (pSrc[2 * i] * pATable[2 * i] */
-    outR = ((int32_t) (((q63_t) * pIn1 * CoefA1) >> 32));
-
-    /* outI = pIn[2 * i] * pATable[2 * i + 1] */
-    outI = ((int32_t) (((q63_t) * pIn1++ * CoefA2) >> 32));
-
-    /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
-    outR =
-      (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn1 * (-CoefA2))) >> 32);
-
-    /* (pIn[2 * i + 1] * pATable[2 * i] */
-    outI =
-      (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn1++ * (CoefA1))) >> 32);
-
-    /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */
-    outR =
-      (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (-CoefA2))) >> 32);
-    CoefB1 = *pCoefB;
-
-    /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
-    outI =
-      (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (-CoefB1))) >> 32);
-
-    /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
-    outR =
-      (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefB1))) >> 32);
-
-    /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-    outI =
-      (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (-CoefA2))) >> 32);
-
-    /* write output */
-    *pOut1++ = (outR << 1u);
-    *pOut1++ = (outI << 1u);
-
-    /* write complex conjugate output */
-    *pOut2-- = -(outI << 1u);
-    *pOut2-- = (outR << 1u);
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (modifier * 2u);
-    pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-    i--;
-
-  }
-
-  pDst[2u * fftLen] = pSrc[0] - pSrc[1];
-  pDst[(2u * fftLen) + 1u] = 0;
-
-  pDst[0] = pSrc[0] + pSrc[1];
-  pDst[1] = 0;
-
-}
-
-
-/**    
- * @brief  Core Real IFFT process    
- * @param[in]   *pSrc 				points to the input buffer.   
- * @param[in]   fftLen  			length of FFT.    
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.   
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
- * @param[out]  *pDst 				points to the output buffer.   
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.    
- */
-
-void arm_split_rifft_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pATable,
-  q31_t * pBTable,
-  q31_t * pDst,
-  uint32_t modifier)
-{
-  q31_t outR, outI;                              /* Temporary variables for output */
-  q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-  q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
-  q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[(2u * fftLen) + 1u];
-
-  pCoefA = &pATable[0];
-  pCoefB = &pBTable[0];
-
-  while(fftLen > 0u)
-  {
-    /*    
-       outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-
-       outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);    
-
-     */
-    CoefA1 = *pCoefA++;
-    CoefA2 = *pCoefA;
-
-    /* outR = (pIn[2 * i] * pATable[2 * i] */
-    outR = ((int32_t) (((q63_t) * pIn1 * CoefA1) >> 32));
-
-    /* - pIn[2 * i] * pATable[2 * i + 1] */
-    outI = -((int32_t) (((q63_t) * pIn1++ * CoefA2) >> 32));
-
-    /* pIn[2 * i + 1] * pATable[2 * i + 1] */
-    outR =
-      (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn1 * (CoefA2))) >> 32);
-
-    /* pIn[2 * i + 1] * pATable[2 * i] */
-    outI =
-      (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn1++ * (CoefA1))) >> 32);
-
-    /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
-    outR =
-      (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefA2))) >> 32);
-
-    CoefB1 = *pCoefB;
-
-    /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
-    outI =
-      (q31_t) ((((q63_t) outI << 32) - ((q63_t) * pIn2-- * (CoefB1))) >> 32);
-
-    /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
-    outR =
-      (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefB1))) >> 32);
-
-    /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-    outI =
-      (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (CoefA2))) >> 32);
-
-    /* write output */
-    *pDst++ = (outR << 1u);
-    *pDst++ = (outI << 1u);
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (modifier * 2u);
-    pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-    /* Decrement loop count */
-    fftLen--;
-
-  }
-
-
-}
diff --git a/bsp/efm32/Libraries/CMSIS/Include/arm_common_tables.h b/bsp/efm32/Libraries/CMSIS/Include/arm_common_tables.h
index 8c35ef2bd5..ee55e5dc79 100644
--- a/bsp/efm32/Libraries/CMSIS/Include/arm_common_tables.h
+++ b/bsp/efm32/Libraries/CMSIS/Include/arm_common_tables.h
@@ -1,24 +1,24 @@
-/* ---------------------------------------------------------------------- 
-* Copyright (C) 2010 ARM Limited. All rights reserved. 
-* 
-* $Date:        11. November 2010  
-* $Revision: 	V1.0.2  
-* 
-* Project: 	    CMSIS DSP Library 
-* Title:	    arm_common_tables.h 
-* 
-* Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 
-* 
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010 ARM Limited. All rights reserved.
+*
+* $Date:        11. November 2010
+* $Revision:    V1.0.2
+*
+* Project:      CMSIS DSP Library
+* Title:        arm_common_tables.h
+*
+* Description:  This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
+*
 * Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.0.2 2010/11/11 
-*    Documentation updated.  
-* 
-* Version 1.0.1 2010/10/05  
-*    Production release and review comments incorporated. 
-* 
-* Version 1.0.0 2010/09/20  
-*    Production release and review comments incorporated. 
+*
+* Version 1.0.2 2010/11/11
+*    Documentation updated.
+*
+* Version 1.0.1 2010/10/05
+*    Production release and review comments incorporated.
+*
+* Version 1.0.0 2010/09/20
+*    Production release and review comments incorporated.
 * -------------------------------------------------------------------- */
 
 #ifndef _ARM_COMMON_TABLES_H
diff --git a/bsp/efm32/Libraries/CMSIS/Include/arm_math.h b/bsp/efm32/Libraries/CMSIS/Include/arm_math.h
index 7266c3efb3..96e0b65a01 100644
--- a/bsp/efm32/Libraries/CMSIS/Include/arm_math.h
+++ b/bsp/efm32/Libraries/CMSIS/Include/arm_math.h
@@ -1,33 +1,33 @@
-/* ----------------------------------------------------------------------   
- * Copyright (C) 2010-2011 ARM Limited. All rights reserved.   
- *   
- * $Date:        15. February 2012  
- * $Revision: 	V1.1.0  
- *   
- * Project: 	    CMSIS DSP Library   
- * Title:	     	arm_math.h
- *   
- * Description:	 Public header file for CMSIS DSP Library
- *   
+/* ----------------------------------------------------------------------
+ * Copyright (C) 2010-2011 ARM Limited. All rights reserved.
+ *
+ * $Date:        15. February 2012
+ * $Revision:   V1.1.0
+ *
+ * Project:         CMSIS DSP Library
+ * Title:           arm_math.h
+ *
+ * Description:  Public header file for CMSIS DSP Library
+ *
  * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
- *  
- * Version 1.1.0 2012/02/15 
- *    Updated with more optimizations, bug fixes and minor API changes.  
- *  
- * Version 1.0.10 2011/7/15 
- *    Big Endian support added and Merged M0 and M3/M4 Source code.  
- *   
- * Version 1.0.3 2010/11/29  
- *    Re-organized the CMSIS folders and updated documentation.   
- *    
- * Version 1.0.2 2010/11/11   
- *    Documentation updated.    
- *   
- * Version 1.0.1 2010/10/05    
- *    Production release and review comments incorporated.   
- *   
- * Version 1.0.0 2010/09/20    
- *    Production release and review comments incorporated.   
+ *
+ * Version 1.1.0 2012/02/15
+ *    Updated with more optimizations, bug fixes and minor API changes.
+ *
+ * Version 1.0.10 2011/7/15
+ *    Big Endian support added and Merged M0 and M3/M4 Source code.
+ *
+ * Version 1.0.3 2010/11/29
+ *    Re-organized the CMSIS folders and updated documentation.
+ *
+ * Version 1.0.2 2010/11/11
+ *    Documentation updated.
+ *
+ * Version 1.0.1 2010/10/05
+ *    Production release and review comments incorporated.
+ *
+ * Version 1.0.0 2010/09/20
+ *    Production release and review comments incorporated.
  * -------------------------------------------------------------------- */
 
 /**
@@ -35,10 +35,10 @@
    *
    * Introduction
    *
-   * This user manual describes the CMSIS DSP software library, 
+   * This user manual describes the CMSIS DSP software library,
    * a suite of common signal processing functions for use on Cortex-M processor based devices.
    *
-   * The library is divided into a number of functions each covering a specific category:  
+   * The library is divided into a number of functions each covering a specific category:
    * - Basic math functions
    * - Fast math functions
    * - Complex math functions
@@ -51,40 +51,40 @@
    * - Interpolation functions
    *
    * The library has separate functions for operating on 8-bit integers, 16-bit integers,
-   * 32-bit integer and 32-bit floating-point values. 
+   * 32-bit integer and 32-bit floating-point values.
+   *
+   * Pre-processor Macros
+   *
+   * Each library project have differant pre-processor macros.
+   *
+   * - UNALIGNED_SUPPORT_DISABLE:
+   *
+   * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access
+   *
+   * - ARM_MATH_BIG_ENDIAN:
+   *
+   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
+   *
+   * - ARM_MATH_MATRIX_CHECK:
+   *
+   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
+   *
+   * - ARM_MATH_ROUNDING:
    *
-   * Pre-processor Macros 
-   * 
-   * Each library project have differant pre-processor macros. 
-   * 
-   * - UNALIGNED_SUPPORT_DISABLE: 
-   * 
-   * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access    
-   * 
-   * - ARM_MATH_BIG_ENDIAN: 
-   * 
-   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets. 
-   * 
-   * - ARM_MATH_MATRIX_CHECK: 
-   * 
-   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices 
-   * 
-   * - ARM_MATH_ROUNDING: 
-   * 
    * Define macro ARM_MATH_ROUNDING for rounding on support functions
    *
    * - ARM_MATH_CMx:
    *
    * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
    * and ARM_MATH_CM0 for building library on cortex-M0 target.
-   * 
+   *
    * - __FPU_PRESENT:
    *
-   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries 
+   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries
    *
    * Toolchain Support
    *
-   * The library has been developed and tested with MDK-ARM version 4.23. 
+   * The library has been developed and tested with MDK-ARM version 4.23.
    * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
    *
    * Using the Library
@@ -100,9 +100,9 @@
    * - arm_cortexM0b_math.lib (Big endian on Cortex-M3)
    *
    * The library functions are declared in the public file arm_math.h which is placed in the Include folder.
-   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single 
-   * public header file  arm_math.h for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants. 
-   * Define the appropriate pre processor MACRO ARM_MATH_CM4 or  ARM_MATH_CM3 or 
+   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
+   * public header file  arm_math.h for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
+   * Define the appropriate pre processor MACRO ARM_MATH_CM4 or  ARM_MATH_CM3 or
    * ARM_MATH_CM0 depending on the target processor in the application.
    *
    * Examples
@@ -115,7 +115,7 @@
    * - arm_cortexM0b_math.uvproj
    * - arm_cortexM0l_math.uvproj
    * - arm_cortexM3b_math.uvproj
-   * - arm_cortexM3l_math.uvproj  
+   * - arm_cortexM3l_math.uvproj
    * - arm_cortexM4b_math.uvproj
    * - arm_cortexM4l_math.uvproj
    * - arm_cortexM4bf_math.uvproj
@@ -272,7 +272,7 @@
 #undef  __CMSIS_GENERIC         /* enable NVIC and Systick functions */
 #include "string.h"
 #include "math.h"
-#ifdef	__cplusplus
+#ifdef  __cplusplus
 extern "C"
 {
 #endif
@@ -282,27 +282,27 @@ extern "C"
    * @brief Macros required for reciprocal calculation in Normalized LMS
    */
 
-#define DELTA_Q31 			(0x100)
-#define DELTA_Q15 			0x5
-#define INDEX_MASK 			0x0000003F
+#define DELTA_Q31           (0x100)
+#define DELTA_Q15           0x5
+#define INDEX_MASK          0x0000003F
 #ifndef PI
-#define PI					3.14159265358979f
+#define PI                  3.14159265358979f
 #endif
 
   /**
    * @brief Macros required for SINE and COSINE Fast math approximations
    */
 
-#define TABLE_SIZE			256
-#define TABLE_SPACING_Q31	0x800000
-#define TABLE_SPACING_Q15	0x80
+#define TABLE_SIZE          256
+#define TABLE_SPACING_Q31   0x800000
+#define TABLE_SPACING_Q15   0x80
 
   /**
    * @brief Macros required for SINE and COSINE Controller functions
    */
   /* 1.31(q31) Fixed value of 2/360 */
   /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
-#define INPUT_SPACING			0xB60B61
+#define INPUT_SPACING           0xB60B61
 
   /**
    * @brief Macro for Unaligned Support
@@ -315,7 +315,7 @@ extern "C"
   #else
     #define ALIGN4 __align(4)
   #endif
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
+#endif  /*  #ifndef UNALIGNED_SUPPORT_DISABLE   */
 
   /**
    * @brief Error status returned by some functions in the library.
@@ -371,7 +371,7 @@ extern "C"
 #else
   #define __SIMD32(addr)         (*(__packed                    int32_t **) & (addr))
   #define  _SIMD32_OFFSET(addr)  (*(__packed                    int32_t * )   (addr))
-#endif 
+#endif
 
   #define __SIMD64(addr)  (*(int64_t **) & (addr))
 
@@ -392,16 +392,16 @@ extern "C"
    */
 #ifndef ARM_MATH_BIG_ENDIAN
 
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) |	\
-                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) |	\
-							    (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) |	\
-							    (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
+                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
+                                (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
+                                (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
 #else
 
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) |	\
-                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) |	\
-							    (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) |	\
-							    (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
+                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
+                                (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
+                                (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
 
 #endif
 
@@ -1169,11 +1169,11 @@ extern "C"
   /**
    * @brief  Initialization function for the Q31 FIR filter.
    * @param[in,out] *S points to an instance of the Q31 FIR structure.
-   * @param[in] 	numTaps  Number of filter coefficients in the filter.
-   * @param[in] 	*pCoeffs points to the filter coefficients.
-   * @param[in] 	*pState points to the state buffer.
-   * @param[in] 	blockSize number of samples that are processed at a time.
-   * @return 		none.
+   * @param[in]     numTaps  Number of filter coefficients in the filter.
+   * @param[in]     *pCoeffs points to the filter coefficients.
+   * @param[in]     *pState points to the state buffer.
+   * @param[in]     blockSize number of samples that are processed at a time.
+   * @return        none.
    */
   void arm_fir_init_q31(
   arm_fir_instance_q31 * S,
@@ -1199,11 +1199,11 @@ extern "C"
   /**
    * @brief  Initialization function for the floating-point FIR filter.
    * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
-   * @param[in] 	numTaps  Number of filter coefficients in the filter.
-   * @param[in] 	*pCoeffs points to the filter coefficients.
-   * @param[in] 	*pState points to the state buffer.
-   * @param[in] 	blockSize number of samples that are processed at a time.
-   * @return    	none.
+   * @param[in]     numTaps  Number of filter coefficients in the filter.
+   * @param[in]     *pCoeffs points to the filter coefficients.
+   * @param[in]     *pState points to the state buffer.
+   * @param[in]     blockSize number of samples that are processed at a time.
+   * @return        none.
    */
   void arm_fir_init_f32(
   arm_fir_instance_f32 * S,
@@ -1463,7 +1463,7 @@ extern "C"
    * @brief Floating-point matrix transpose.
    * @param[in]  *pSrc points to the input matrix
    * @param[out] *pDst points to the output matrix
-   * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH
+   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH
    * or ARM_MATH_SUCCESS based on the outcome of size checking.
    */
 
@@ -1476,7 +1476,7 @@ extern "C"
    * @brief Q15 matrix transpose.
    * @param[in]  *pSrc points to the input matrix
    * @param[out] *pDst points to the output matrix
-   * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH
+   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH
    * or ARM_MATH_SUCCESS based on the outcome of size checking.
    */
 
@@ -1488,7 +1488,7 @@ extern "C"
    * @brief Q31 matrix transpose.
    * @param[in]  *pSrc points to the input matrix
    * @param[out] *pDst points to the output matrix
-   * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH
+   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH
    * or ARM_MATH_SUCCESS based on the outcome of size checking.
    */
 
@@ -1531,7 +1531,7 @@ extern "C"
    * @param[in]       *pSrcA  points to the first input matrix structure
    * @param[in]       *pSrcB  points to the second input matrix structure
    * @param[out]      *pDst   points to output matrix structure
-   * @param[in]		  *pState points to the array for storing intermediate results  
+   * @param[in]       *pState points to the array for storing intermediate results
    * @return     The function returns either
    * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    */
@@ -1665,7 +1665,7 @@ extern "C"
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.
    * @param[in]     nRows          number of rows in the matrix.
    * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	       points to the matrix data array.
+   * @param[in]     *pData         points to the matrix data array.
    * @return        none
    */
 
@@ -1680,7 +1680,7 @@ extern "C"
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.
    * @param[in]     nRows          number of rows in the matrix.
    * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	       points to the matrix data array.
+   * @param[in]     *pData         points to the matrix data array.
    * @return        none
    */
 
@@ -1695,7 +1695,7 @@ extern "C"
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.
    * @param[in]     nRows          number of rows in the matrix.
    * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	       points to the matrix data array.
+   * @param[in]     *pData         points to the matrix data array.
    * @return        none
    */
 
@@ -2187,7 +2187,7 @@ extern "C"
 
 
   /*----------------------------------------------------------------------
-   *		Internal functions prototypes FFT function
+   *        Internal functions prototypes FFT function
    ----------------------------------------------------------------------*/
 
   /**
@@ -2256,7 +2256,7 @@ extern "C"
    * @brief  Core function for the f32 FFT butterfly process.
    * @param[in, out] *pSrc            points to the in-place buffer of f32 data type.
    * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef        	  points to Twiddle coefficient buffer.
+   * @param[in]      *pCoef           points to Twiddle coefficient buffer.
    * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    * @return none.
    */
@@ -2267,14 +2267,14 @@ extern "C"
   float32_t * pCoef,
   uint16_t twidCoefModifier);
 
-        /**  
-	 * @brief  Core function for the Radix-2 Q31 CFFT butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef         	points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
+        /**
+     * @brief  Core function for the Radix-2 Q31 CFFT butterfly process.
+     * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.
+     * @param[in]      fftLen           length of the FFT.
+     * @param[in]      *pCoef           points to Twiddle coefficient buffer.
+     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+     * @return none.
+     */
 
   void arm_radix2_butterfly_q31(
   q31_t * pSrc,
@@ -2282,14 +2282,14 @@ extern "C"
   q31_t * pCoef,
   uint16_t twidCoefModifier);
 
-        /**  
-	 * @brief  Core function for the Radix-2 Q15 CFFT butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef           points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
+        /**
+     * @brief  Core function for the Radix-2 Q15 CFFT butterfly process.
+     * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type.
+     * @param[in]      fftLen           length of the FFT.
+     * @param[in]      *pCoef           points to Twiddle coefficient buffer.
+     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+     * @return none.
+     */
 
   void arm_radix2_butterfly_q15(
   q15_t * pSrc,
@@ -2297,14 +2297,14 @@ extern "C"
   q15_t * pCoef,
   uint16_t twidCoefModifier);
 
-        /**  
-	 * @brief  Core function for the Radix-2 Q15 CFFT Inverse butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef       	points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
+        /**
+     * @brief  Core function for the Radix-2 Q15 CFFT Inverse butterfly process.
+     * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type.
+     * @param[in]      fftLen           length of the FFT.
+     * @param[in]      *pCoef           points to Twiddle coefficient buffer.
+     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+     * @return none.
+     */
 
   void arm_radix2_butterfly_inverse_q15(
   q15_t * pSrc,
@@ -2312,14 +2312,14 @@ extern "C"
   q15_t * pCoef,
   uint16_t twidCoefModifier);
 
-        /**  
-	 * @brief  Core function for the Radix-2 Q31 CFFT Inverse butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef         	points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
+        /**
+     * @brief  Core function for the Radix-2 Q31 CFFT Inverse butterfly process.
+     * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.
+     * @param[in]      fftLen           length of the FFT.
+     * @param[in]      *pCoef           points to Twiddle coefficient buffer.
+     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+     * @return none.
+     */
 
   void arm_radix2_butterfly_inverse_q31(
   q31_t * pSrc,
@@ -2331,9 +2331,9 @@ extern "C"
    * @brief  Core function for the f32 IFFT butterfly process.
    * @param[in, out] *pSrc            points to the in-place buffer of f32 data type.
    * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef        	  points to Twiddle coefficient buffer.
+   * @param[in]      *pCoef           points to Twiddle coefficient buffer.
    * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @param[in]		 onebyfftLen	  1/fftLenfth
+   * @param[in]      onebyfftLen      1/fftLenfth
    * @return none.
    */
 
@@ -2489,7 +2489,7 @@ extern "C"
    * @param[in]      fftLenReal     length of the FFT.
    * @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    * @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
    */
 
   arm_status arm_rfft_init_q15(
@@ -2519,7 +2519,7 @@ extern "C"
    * @param[in]      fftLenReal     length of the FFT.
    * @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    * @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
    */
 
   arm_status arm_rfft_init_q31(
@@ -2536,7 +2536,7 @@ extern "C"
    * @param[in]     fftLenReal     length of the FFT.
    * @param[in]     ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
    */
 
   arm_status arm_rfft_init_f32(
@@ -2582,7 +2582,7 @@ extern "C"
    * @param[in]     N          length of the DCT4.
    * @param[in]     Nby2       half of the length of the DCT4.
    * @param[in]     normalize  normalizing factor.
-   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.
+   * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.
    */
 
   arm_status arm_dct4_init_f32(
@@ -2629,7 +2629,7 @@ extern "C"
    * @param[in]     N          length of the DCT4.
    * @param[in]     Nby2       half of the length of the DCT4.
    * @param[in]     normalize  normalizing factor.
-   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
+   * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
    */
 
   arm_status arm_dct4_init_q31(
@@ -2676,7 +2676,7 @@ extern "C"
    * @param[in]     N          length of the DCT4.
    * @param[in]     Nby2       half of the length of the DCT4.
    * @param[in]     normalize  normalizing factor.
-   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
+   * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
    */
 
   arm_status arm_dct4_init_q15(
@@ -3155,7 +3155,7 @@ extern "C"
   q31_t * pDst,
   uint32_t blockSize);
   /**
-   * @brief  Copies the elements of a floating-point vector. 
+   * @brief  Copies the elements of a floating-point vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3167,7 +3167,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Copies the elements of a Q7 vector. 
+   * @brief  Copies the elements of a Q7 vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3179,7 +3179,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Copies the elements of a Q15 vector. 
+   * @brief  Copies the elements of a Q15 vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3191,7 +3191,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Copies the elements of a Q31 vector. 
+   * @brief  Copies the elements of a Q31 vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3202,7 +3202,7 @@ extern "C"
   q31_t * pDst,
   uint32_t blockSize);
   /**
-   * @brief  Fills a constant value into a floating-point vector. 
+   * @brief  Fills a constant value into a floating-point vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3214,7 +3214,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Fills a constant value into a Q7 vector. 
+   * @brief  Fills a constant value into a Q7 vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3226,7 +3226,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Fills a constant value into a Q15 vector. 
+   * @brief  Fills a constant value into a Q15 vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3238,7 +3238,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Fills a constant value into a Q31 vector. 
+   * @brief  Fills a constant value into a Q31 vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3249,14 +3249,14 @@ extern "C"
   q31_t * pDst,
   uint32_t blockSize);
 
-/**  
- * @brief Convolution of floating-point sequences.  
- * @param[in] *pSrcA points to the first input sequence.  
- * @param[in] srcALen length of the first input sequence.  
- * @param[in] *pSrcB points to the second input sequence.  
- * @param[in] srcBLen length of the second input sequence.  
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.  
- * @return none.  
+/**
+ * @brief Convolution of floating-point sequences.
+ * @param[in] *pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] *pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ * @return none.
  */
 
   void arm_conv_f32(
@@ -3266,17 +3266,17 @@ extern "C"
   uint32_t srcBLen,
   float32_t * pDst);
 
-  
-  /**   
-   * @brief Convolution of Q15 sequences.   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.   
-   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return none.   
+
+  /**
+   * @brief Convolution of Q15 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return none.
    */
 
 
@@ -3290,14 +3290,14 @@ extern "C"
   q15_t * pScratch2);
 
 
-/**  
- * @brief Convolution of Q15 sequences.  
- * @param[in] *pSrcA points to the first input sequence.  
- * @param[in] srcALen length of the first input sequence.  
- * @param[in] *pSrcB points to the second input sequence.  
- * @param[in] srcBLen length of the second input sequence.  
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.  
- * @return none.  
+/**
+ * @brief Convolution of Q15 sequences.
+ * @param[in] *pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] *pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ * @return none.
  */
 
   void arm_conv_q15(
@@ -3318,11 +3318,11 @@ extern "C"
    */
 
   void arm_conv_fast_q15(
-			  q15_t * pSrcA,
-			 uint32_t srcALen,
-			  q15_t * pSrcB,
-			 uint32_t srcBLen,
-			 q15_t * pDst);
+              q15_t * pSrcA,
+             uint32_t srcALen,
+              q15_t * pSrcB,
+             uint32_t srcBLen,
+             q15_t * pDst);
 
   /**
    * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
@@ -3331,9 +3331,9 @@ extern "C"
    * @param[in] *pSrcB points to the second input sequence.
    * @param[in] srcBLen length of the second input sequence.
    * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return none.   
+   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return none.
    */
 
   void arm_conv_fast_opt_q15(
@@ -3382,16 +3382,16 @@ extern "C"
   q31_t * pDst);
 
 
-    /**   
-   * @brief Convolution of Q7 sequences.   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.   
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
-   * @return none.   
+    /**
+   * @brief Convolution of Q7 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return none.
    */
 
   void arm_conv_opt_q7(
@@ -3444,18 +3444,18 @@ extern "C"
   uint32_t firstIndex,
   uint32_t numPoints);
 
-    /**   
-   * @brief Partial convolution of Q15 sequences.   
-   * @param[in]       *pSrcA points to the first input sequence.   
-   * @param[in]       srcALen length of the first input sequence.   
-   * @param[in]       *pSrcB points to the second input sequence.   
-   * @param[in]       srcBLen length of the second input sequence.   
-   * @param[out]      *pDst points to the block of output data   
-   * @param[in]       firstIndex is the first output sample to start with.   
-   * @param[in]       numPoints is the number of output points to be computed.   
-   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
+    /**
+   * @brief Partial convolution of Q15 sequences.
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
 
   arm_status arm_conv_partial_opt_q15(
@@ -3504,13 +3504,13 @@ extern "C"
    */
 
   arm_status arm_conv_partial_fast_q15(
-				        q15_t * pSrcA,
-				       uint32_t srcALen,
-				        q15_t * pSrcB,
-				       uint32_t srcBLen,
-				       q15_t * pDst,
-				       uint32_t firstIndex,
-				       uint32_t numPoints);
+                        q15_t * pSrcA,
+                       uint32_t srcALen,
+                        q15_t * pSrcB,
+                       uint32_t srcBLen,
+                       q15_t * pDst,
+                       uint32_t firstIndex,
+                       uint32_t numPoints);
 
 
   /**
@@ -3522,9 +3522,9 @@ extern "C"
    * @param[out]      *pDst points to the block of output data
    * @param[in]       firstIndex is the first output sample to start with.
    * @param[in]       numPoints is the number of output points to be computed.
-   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
+   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
 
   arm_status arm_conv_partial_fast_opt_q15(
@@ -3583,18 +3583,18 @@ extern "C"
   uint32_t numPoints);
 
 
-  /**   
-   * @brief Partial convolution of Q7 sequences   
-   * @param[in]       *pSrcA points to the first input sequence.   
-   * @param[in]       srcALen length of the first input sequence.   
-   * @param[in]       *pSrcB points to the second input sequence.   
-   * @param[in]       srcBLen length of the second input sequence.   
-   * @param[out]      *pDst points to the block of output data   
-   * @param[in]       firstIndex is the first output sample to start with.   
-   * @param[in]       numPoints is the number of output points to be computed.   
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
+  /**
+   * @brief Partial convolution of Q7 sequences
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
 
   arm_status arm_conv_partial_opt_q7(
@@ -4086,8 +4086,8 @@ extern "C"
    * @brief Initialization function for the Q15 FIR lattice filter.
    * @param[in] *S points to an instance of the Q15 FIR lattice structure.
    * @param[in] numStages  number of filter stages.
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages. 
-   * @param[in] *pState points to the state buffer.  The array is of length numStages. 
+   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
+   * @param[in] *pState points to the state buffer.  The array is of length numStages.
    * @return none.
    */
 
@@ -4654,15 +4654,15 @@ extern "C"
   float32_t * pDst);
 
 
-   /**   
-   * @brief Correlation of Q15 sequences   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.   
-   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @return none.   
+   /**
+   * @brief Correlation of Q15 sequences
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @return none.
    */
   void arm_correlate_opt_q15(
   q15_t * pSrcA,
@@ -4701,11 +4701,11 @@ extern "C"
    */
 
   void arm_correlate_fast_q15(
-			       q15_t * pSrcA,
-			      uint32_t srcALen,
-			       q15_t * pSrcB,
-			      uint32_t srcBLen,
-			      q15_t * pDst);
+                   q15_t * pSrcA,
+                  uint32_t srcALen,
+                   q15_t * pSrcB,
+                  uint32_t srcBLen,
+                  q15_t * pDst);
 
 
 
@@ -4716,7 +4716,7 @@ extern "C"
    * @param[in] *pSrcB points to the second input sequence.
    * @param[in] srcBLen length of the second input sequence.
    * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
+   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    * @return none.
    */
 
@@ -4764,16 +4764,16 @@ extern "C"
 
 
 
- /**   
-   * @brief Correlation of Q7 sequences.   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.   
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
-   * @return none.   
+ /**
+   * @brief Correlation of Q7 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return none.
    */
 
   void arm_correlate_opt_q7(
@@ -5019,9 +5019,9 @@ extern "C"
 
   /*
    * @brief  Floating-point sin_cos function.
-   * @param[in]  theta    input value in degrees 
-   * @param[out] *pSinVal points to the processed sine output. 
-   * @param[out] *pCosVal points to the processed cos output. 
+   * @param[in]  theta    input value in degrees
+   * @param[out] *pSinVal points to the processed sine output.
+   * @param[out] *pCosVal points to the processed cos output.
    * @return none.
    */
 
@@ -5032,9 +5032,9 @@ extern "C"
 
   /*
    * @brief  Q31 sin_cos function.
-   * @param[in]  theta    scaled input value in degrees 
-   * @param[out] *pSinVal points to the processed sine output. 
-   * @param[out] *pCosVal points to the processed cosine output. 
+   * @param[in]  theta    scaled input value in degrees
+   * @param[out] *pSinVal points to the processed sine output.
+   * @param[out] *pCosVal points to the processed cosine output.
    * @return none.
    */
 
@@ -5132,7 +5132,7 @@ extern "C"
   /**
    * @defgroup PID PID Motor Control
    *
-   * A Proportional Integral Derivative (PID) controller is a generic feedback control 
+   * A Proportional Integral Derivative (PID) controller is a generic feedback control
    * loop mechanism widely used in industrial control systems.
    * A PID controller is the most commonly used type of feedback controller.
    *
@@ -5151,39 +5151,39 @@ extern "C"
    *
    * \par
    * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
-   * 
-   * \par 
-   * \image html PID.gif "Proportional Integral Derivative Controller" 
+   *
+   * \par
+   * \image html PID.gif "Proportional Integral Derivative Controller"
    *
    * \par
    * The PID controller calculates an "error" value as the difference between
    * the measured output and the reference input.
-   * The controller attempts to minimize the error by adjusting the process control inputs.  
-   * The proportional value determines the reaction to the current error, 
-   * the integral value determines the reaction based on the sum of recent errors, 
+   * The controller attempts to minimize the error by adjusting the process control inputs.
+   * The proportional value determines the reaction to the current error,
+   * the integral value determines the reaction based on the sum of recent errors,
    * and the derivative value determines the reaction based on the rate at which the error has been changing.
    *
-   * \par Instance Structure 
-   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. 
-   * A separate instance structure must be defined for each PID Controller. 
-   * There are separate instance structure declarations for each of the 3 supported data types. 
-   * 
-   * \par Reset Functions 
-   * There is also an associated reset function for each data type which clears the state array. 
+   * \par Instance Structure
+   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
+   * A separate instance structure must be defined for each PID Controller.
+   * There are separate instance structure declarations for each of the 3 supported data types.
    *
-   * \par Initialization Functions 
-   * There is also an associated initialization function for each data type. 
-   * The initialization function performs the following operations: 
+   * \par Reset Functions
+   * There is also an associated reset function for each data type which clears the state array.
+   *
+   * \par Initialization Functions
+   * There is also an associated initialization function for each data type.
+   * The initialization function performs the following operations:
    * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
-   * - Zeros out the values in the state buffer.   
-   * 
-   * \par 
-   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. 
+   * - Zeros out the values in the state buffer.
    *
-   * \par Fixed-Point Behavior 
-   * Care must be taken when using the fixed-point versions of the PID Controller functions. 
-   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. 
-   * Refer to the function specific documentation below for usage guidelines. 
+   * \par
+   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
+   *
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the fixed-point versions of the PID Controller functions.
+   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
    */
 
   /**
@@ -5225,13 +5225,13 @@ extern "C"
    * @param[in] in input sample to process
    * @return out processed output sample.
    *
-   * Scaling and Overflow Behavior: 
-   * \par 
-   * The function is implemented using an internal 64-bit accumulator. 
-   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. 
-   * Thus, if the accumulator result overflows it wraps around rather than clip. 
-   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. 
-   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. 
+   * Scaling and Overflow Behavior:
+   * \par
+   * The function is implemented using an internal 64-bit accumulator.
+   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+   * Thus, if the accumulator result overflows it wraps around rather than clip.
+   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
+   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
    */
 
   __STATIC_INLINE q31_t arm_pid_q31(
@@ -5272,13 +5272,13 @@ extern "C"
    * @param[in] in input sample to process
    * @return out processed output sample.
    *
-   * Scaling and Overflow Behavior: 
-   * \par 
-   * The function is implemented using a 64-bit internal accumulator. 
-   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. 
-   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. 
-   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. 
-   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. 
+   * Scaling and Overflow Behavior:
+   * \par
+   * The function is implemented using a 64-bit internal accumulator.
+   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
    * Lastly, the accumulator is saturated to yield a result in 1.15 format.
    */
 
@@ -5366,7 +5366,7 @@ extern "C"
    * and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta
    * can be calculated using only Ia and Ib.
    *
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html clarkeFormula.gif
@@ -5470,8 +5470,8 @@ extern "C"
   /**
    * @defgroup inv_clarke Vector Inverse Clarke Transform
    * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
-   * 
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html clarkeInvFormula.gif
@@ -5513,7 +5513,7 @@ extern "C"
   }
 
   /**
-   * @brief  Inverse Clarke transform for Q31 version 
+   * @brief  Inverse Clarke transform for Q31 version
    * @param[in]       Ialpha  input two-phase orthogonal vector axis alpha
    * @param[in]       Ibeta   input two-phase orthogonal vector axis beta
    * @param[out]      *pIa    points to output three-phase coordinate a
@@ -5575,19 +5575,19 @@ extern "C"
    * @defgroup park Vector Park Transform
    *
    * Forward Park transform converts the input two-coordinate vector to flux and torque components.
-   * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents 
-   * from the stationary to the moving reference frame and control the spatial relationship between 
+   * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents
+   * from the stationary to the moving reference frame and control the spatial relationship between
    * the stator vector current and rotor flux vector.
-   * If we consider the d axis aligned with the rotor flux, the diagram below shows the 
+   * If we consider the d axis aligned with the rotor flux, the diagram below shows the
    * current vector and the relationship from the two reference frames:
    * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
    *
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html parkFormula.gif
-   * where Ialpha and Ibeta are the stator vector components,  
-   * pId and pIq are rotor vector components and cosVal and sinVal are the 
+   * where Ialpha and Ibeta are the stator vector components,
+   * pId and pIq are rotor vector components and cosVal and sinVal are the
    * cosine and sine values of theta (rotor flux position).
    * \par Fixed-Point Behavior
    * Care must be taken when using the Q31 version of the Park transform.
@@ -5604,8 +5604,8 @@ extern "C"
    * @brief Floating-point Park transform
    * @param[in]       Ialpha input two-phase vector coordinate alpha
    * @param[in]       Ibeta  input two-phase vector coordinate beta
-   * @param[out]      *pId   points to output	rotor reference frame d
-   * @param[out]      *pIq   points to output	rotor reference frame q
+   * @param[out]      *pId   points to output   rotor reference frame d
+   * @param[out]      *pIq   points to output   rotor reference frame q
    * @param[in]       sinVal sine value of rotation angle theta
    * @param[in]       cosVal cosine value of rotation angle theta
    * @return none.
@@ -5631,7 +5631,7 @@ extern "C"
   }
 
   /**
-   * @brief  Park transform for Q31 version 
+   * @brief  Park transform for Q31 version
    * @param[in]       Ialpha input two-phase vector coordinate alpha
    * @param[in]       Ibeta  input two-phase vector coordinate beta
    * @param[out]      *pId   points to output rotor reference frame d
@@ -5704,12 +5704,12 @@ extern "C"
    * @defgroup inv_park Vector Inverse Park transform
    * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
    *
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html parkInvFormula.gif
-   * where pIalpha and pIbeta are the stator vector components,  
-   * Id and Iq are rotor vector components and cosVal and sinVal are the 
+   * where pIalpha and pIbeta are the stator vector components,
+   * Id and Iq are rotor vector components and cosVal and sinVal are the
    * cosine and sine values of theta (rotor flux position).
    * \par Fixed-Point Behavior
    * Care must be taken when using the Q31 version of the Park transform.
@@ -5751,7 +5751,7 @@ extern "C"
 
 
   /**
-   * @brief  Inverse Park transform for	Q31 version 
+   * @brief  Inverse Park transform for Q31 version
    * @param[in]       Id        input coordinate of rotor reference frame d
    * @param[in]       Iq        input coordinate of rotor reference frame q
    * @param[out]      *pIalpha  points to output two-phase orthogonal vector axis alpha
@@ -5827,7 +5827,7 @@ extern "C"
    * Linear interpolation is a method of curve fitting using linear polynomials.
    * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
    *
-   * \par 
+   * \par
    * \image html LinearInterp.gif "Linear interpolation"
    *
    * \par
@@ -5847,10 +5847,10 @@ extern "C"
    * sample of data and each call to the function returns a single processed value.
    * S points to an instance of the Linear Interpolate function data structure.
    * x is the input sample value. The functions returns the output value.
-   * 
+   *
    * \par
-   * if x is outside of the table boundary, Linear interpolation returns first value of the table 
-   * if x is below input range and returns last value of table if x is above range.  
+   * if x is outside of the table boundary, Linear interpolation returns first value of the table
+   * if x is below input range and returns last value of table if x is above range.
    */
 
   /**
@@ -5982,7 +5982,7 @@ extern "C"
    *
    * \par
    * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12. 
+   * This function can support maximum of table size 2^12.
    *
    */
 
@@ -6162,7 +6162,7 @@ extern "C"
    * @defgroup SQRT Square Root
    *
    * Computes the square root of a number.
-   * There are separate functions for Q15, Q31, and floating-point data types.  
+   * There are separate functions for Q15, Q31, and floating-point data types.
    * The square root function is computed using the Newton-Raphson algorithm.
    * This is an iterative algorithm of the form:
    * 
@@ -7072,11 +7072,11 @@ extern "C"
   uint32_t numSamples);
 
   /**
-   * @brief Converts the elements of the floating-point vector to Q31 vector. 
-   * @param[in]       *pSrc points to the floating-point input vector 
+   * @brief Converts the elements of the floating-point vector to Q31 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
    * @param[out]      *pDst points to the Q31 output vector
-   * @param[in]       blockSize length of the input vector 
-   * @return none. 
+   * @param[in]       blockSize length of the input vector
+   * @return none.
    */
   void arm_float_to_q31(
   float32_t * pSrc,
@@ -7084,10 +7084,10 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief Converts the elements of the floating-point vector to Q15 vector. 
-   * @param[in]       *pSrc points to the floating-point input vector 
+   * @brief Converts the elements of the floating-point vector to Q15 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
    * @param[out]      *pDst points to the Q15 output vector
-   * @param[in]       blockSize length of the input vector 
+   * @param[in]       blockSize length of the input vector
    * @return          none
    */
   void arm_float_to_q15(
@@ -7096,10 +7096,10 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief Converts the elements of the floating-point vector to Q7 vector. 
-   * @param[in]       *pSrc points to the floating-point input vector 
+   * @brief Converts the elements of the floating-point vector to Q7 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
    * @param[out]      *pDst points to the Q7 output vector
-   * @param[in]       blockSize length of the input vector 
+   * @param[in]       blockSize length of the input vector
    * @return          none
    */
   void arm_float_to_q7(
@@ -7219,12 +7219,12 @@ extern "C"
    *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
    *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
    * 

-   * Note that the coordinates (x, y) contain integer and fractional components.  
+   * Note that the coordinates (x, y) contain integer and fractional components.
    * The integer components specify which portion of the table to use while the
    * fractional components control the interpolation processor.
    *
    * \par
-   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. 
+   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
    */
 
   /**
@@ -7543,7 +7543,7 @@ extern "C"
 
 
 
-#ifdef	__cplusplus
+#ifdef  __cplusplus
 }
 #endif
 
diff --git a/bsp/efm32/Libraries/CMSIS/Include/core_cm3.h b/bsp/efm32/Libraries/CMSIS/Include/core_cm3.h
index 0173893fbd..350d452093 100644
--- a/bsp/efm32/Libraries/CMSIS/Include/core_cm3.h
+++ b/bsp/efm32/Libraries/CMSIS/Include/core_cm3.h
@@ -636,14 +636,14 @@ typedef struct
   __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
        uint32_t RESERVED2[15];
   __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
-       uint32_t RESERVED3[29];                                  
+       uint32_t RESERVED3[29];
   __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
   __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
   __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
-       uint32_t RESERVED4[43];                                  
+       uint32_t RESERVED4[43];
   __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
   __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
-       uint32_t RESERVED5[6];                                   
+       uint32_t RESERVED5[6];
   __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
   __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
   __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
diff --git a/bsp/efm32/Libraries/CMSIS/Include/core_cm4.h b/bsp/efm32/Libraries/CMSIS/Include/core_cm4.h
index a965537402..2a67fa2a41 100644
--- a/bsp/efm32/Libraries/CMSIS/Include/core_cm4.h
+++ b/bsp/efm32/Libraries/CMSIS/Include/core_cm4.h
@@ -669,14 +669,14 @@ typedef struct
   __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
        uint32_t RESERVED2[15];
   __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
-       uint32_t RESERVED3[29];                                  
+       uint32_t RESERVED3[29];
   __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
   __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
   __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
-       uint32_t RESERVED4[43];                                  
+       uint32_t RESERVED4[43];
   __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
   __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
-       uint32_t RESERVED5[6];                                   
+       uint32_t RESERVED5[6];
   __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
   __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
   __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
diff --git a/bsp/efm32/Libraries/CMSIS/Include/core_sc300.h b/bsp/efm32/Libraries/CMSIS/Include/core_sc300.h
index 7e56b0f332..4176fe8d5d 100644
--- a/bsp/efm32/Libraries/CMSIS/Include/core_sc300.h
+++ b/bsp/efm32/Libraries/CMSIS/Include/core_sc300.h
@@ -607,14 +607,14 @@ typedef struct
   __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
        uint32_t RESERVED2[15];
   __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
-       uint32_t RESERVED3[29];                                  
+       uint32_t RESERVED3[29];
   __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
   __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
   __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
-       uint32_t RESERVED4[43];                                  
+       uint32_t RESERVED4[43];
   __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
   __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
-       uint32_t RESERVED5[6];                                   
+       uint32_t RESERVED5[6];
   __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
   __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
   __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
diff --git a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM0l_math.a b/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM0l_math.a
deleted file mode 100644
index 30c034f577..0000000000
Binary files a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM0l_math.a and /dev/null differ
diff --git a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM3l_math.a b/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM3l_math.a
deleted file mode 100644
index b90e307b54..0000000000
Binary files a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM3l_math.a and /dev/null differ
diff --git a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4l_math.a b/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4l_math.a
deleted file mode 100644
index 8135948545..0000000000
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diff --git a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a b/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a
deleted file mode 100644
index 2b48514757..0000000000
Binary files a/bsp/efm32/Libraries/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a and /dev/null differ
diff --git a/bsp/efm32/Libraries/CMSIS/RTOS/cmsis_os.h b/bsp/efm32/Libraries/CMSIS/RTOS/cmsis_os.h
index 2ccfd17504..db29415c55 100644
--- a/bsp/efm32/Libraries/CMSIS/RTOS/cmsis_os.h
+++ b/bsp/efm32/Libraries/CMSIS/RTOS/cmsis_os.h
@@ -1,20 +1,20 @@
-/* ----------------------------------------------------------------------  
- * Copyright (C) 2012 ARM Limited. All rights reserved.  
- *  
+/* ----------------------------------------------------------------------
+ * Copyright (C) 2012 ARM Limited. All rights reserved.
+ *
  * $Date:        5. March 2012
  * $Revision:    V0.03
- *  
+ *
  * Project:      CMSIS-RTOS API
  * Title:        cmsis_os.h template header file
- *  
+ *
  * Version 0.02
- *    Initial Proposal Phase 
+ *    Initial Proposal Phase
  * Version 0.03
  *    osKernelStart added, optional feature: main started as thread
  *    osSemaphores have standard behaviour
  *    osTimerCreate does not start the timer, added osTimerStart
- *    osThreadPass is renamed to osThreadYield 
- * -------------------------------------------------------------------- */ 
+ *    osThreadPass is renamed to osThreadYield
+ * -------------------------------------------------------------------- */
 
 /**
 \page cmsis_os_h Header File Template: cmsis_os.h
@@ -35,8 +35,8 @@ The file cmsis_os.h contains:
 All definitions are prefixed with \b os to give an unique name space for CMSIS-RTOS functions.
 Definitions that are prefixed \b os_ are not used in the application code but local to this header file.
 All definitions and functions that belong to a module are grouped and have a common prefix, i.e. \b osThread.
- 
-Definitions that are marked with CAN BE CHANGED can be adapted towards the needs of the actual CMSIS-RTOS implementation. 
+
+Definitions that are marked with CAN BE CHANGED can be adapted towards the needs of the actual CMSIS-RTOS implementation.
 These definitions can be specific to the underlying RTOS kernel.
 
 Definitions that are marked with MUST REMAIN UNCHANGED cannot be altered. Otherwise the CMSIS-RTOS implementation is no longer
@@ -52,7 +52,7 @@ The following CMSIS-RTOS functions can be called from threads and interrupt serv
   - \ref osMessagePut, \ref osMessageGet
   - \ref osMailAlloc, \ref osMailCAlloc, \ref osMailGet, \ref osMailPut, \ref osMailFree
 
-Functions that cannot be called from an ISR are verifying the interrupt status and return in case that they are called 
+Functions that cannot be called from an ISR are verifying the interrupt status and return in case that they are called
 from an ISR context the status code \b osErrorISR. In some implementations this condition might be caught using the HARD FAULT vector.
 
 Some CMSIS-RTOS implementations support CMSIS-RTOS function calls from multiple ISR at the same time.
@@ -73,11 +73,11 @@ extern void thread_sample (void const *argument);             // function protot
 osThreadDef (thread_sample, osPriorityBelowNormal, 1, 100);
 
 // Pool definition
-osPoolDef(MyPool, 10, long);                      
+osPoolDef(MyPool, 10, long);
 \endcode
 
 
-This header file defines all objects when included in a C/C++ source file. When \#define osObjectsExternal is 
+This header file defines all objects when included in a C/C++ source file. When \#define osObjectsExternal is
 present before the header file, the objects are defined as external symbols. A single consistent header file can therefore be
 used throughout the whole project.
 
@@ -92,7 +92,7 @@ used throughout the whole project.
 \endcode
 
 */
- 
+
 #ifndef _CMSIS_OS_H
 #define _CMSIS_OS_H
 
@@ -100,7 +100,7 @@ used throughout the whole project.
 #define osCMSIS           0x00003      ///< API version (main [31:16] .sub [15:0])
 
 /// \note CAN BE CHANGED: \b osCMSIS_KERNEL identifies the underlaying RTOS kernel and version number.
-#define osCMSIS_KERNEL    0x10000	   ///< RTOS identification and version (main [31:16] .sub [15:0])
+#define osCMSIS_KERNEL    0x10000      ///< RTOS identification and version (main [31:16] .sub [15:0])
 
 /// \note MUST REMAIN UNCHANGED: \b osKernelSystemId shall be consistent in every CMSIS-RTOS.
 #define osKernelSystemId "KERNEL V1.00"   ///< RTOS identification string
@@ -113,7 +113,7 @@ used throughout the whole project.
 #define osFeature_Signals      8       ///< maximum number of Signal Flags available per thread
 #define osFeature_Semaphore    30      ///< maximum count for SemaphoreInit function
 #define osFeature_Wait         1       ///< osWait function: 1=available, 0=not available
-                                    
+
 #include 
 #include 
 
@@ -133,7 +133,7 @@ typedef enum  {
   osPriorityBelowNormal   = -1,          ///< priority: below normal
   osPriorityNormal        =  0,          ///< priority: normal (default)
   osPriorityAboveNormal   = +1,          ///< priority: above normal
-  osPriorityHigh          = +2,          ///< priority: high 
+  osPriorityHigh          = +2,          ///< priority: high
   osPriorityRealtime      = +3,          ///< priority: realtime (highest)
   osPriorityError         =  0x84        ///< system cannot determine priority or thread has illegal priority
 } osPriority;
@@ -160,23 +160,23 @@ typedef enum  {
   osErrorValue            =  0x86,       ///< value of a parameter is out of range.
   osErrorOS               =  0xFF,       ///< unspecified RTOS error: run-time error but no other error message fits.
   os_status_reserved      =  0x7FFFFFFF  ///< prevent from enum down-size compiler optimization.
-} osStatus; 
+} osStatus;
 
 
 /// Timer type value for the timer definition
 /// \note MUST REMAIN UNCHANGED: \b os_timer_type shall be consistent in every CMSIS-RTOS.
 typedef enum  {
-  osTimerOnce             =     0,       ///< one-shot timer 
-  osTimerPeriodic         =     1        ///< repeating timer 
-} os_timer_type; 
+  osTimerOnce             =     0,       ///< one-shot timer
+  osTimerPeriodic         =     1        ///< repeating timer
+} os_timer_type;
 
 /// Entry point of a thread.
 /// \note MUST REMAIN UNCHANGED: \b os_pthread shall be consistent in every CMSIS-RTOS.
-typedef void (*os_pthread) (void const *argument); 
+typedef void (*os_pthread) (void const *argument);
 
 /// Entry point of a timer call back function.
 /// \note MUST REMAIN UNCHANGED: \b os_ptimer shall be consistent in every CMSIS-RTOS.
-typedef void (*os_ptimer) (void const *argument); 
+typedef void (*os_ptimer) (void const *argument);
 
 // >>> the following data type definitions may shall adapted towards a specific RTOS
 
@@ -240,7 +240,7 @@ typedef const struct os_semaphore_def  {
 /// \note CAN BE CHANGED: \b os_pool_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_pool_def  {
   uint32_t                 pool_sz;    ///< number of items (elements) in the pool
-  uint32_t                 item_sz;    ///< size of an item 
+  uint32_t                 item_sz;    ///< size of an item
   void                       *pool;    ///< pointer to memory for pool
 } osPoolDef_t;
 
@@ -248,7 +248,7 @@ typedef const struct os_pool_def  {
 /// \note CAN BE CHANGED: \b os_messageQ_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_messageQ_def  {
   uint32_t                queue_sz;    ///< number of elements in the queue
-  uint32_t                 item_sz;    ///< size of an item 
+  uint32_t                 item_sz;    ///< size of an item
   void                       *pool;    ///< memory array for messages
 } osMessageQDef_t;
 
@@ -256,23 +256,23 @@ typedef const struct os_messageQ_def  {
 /// \note CAN BE CHANGED: \b os_mailQ_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_mailQ_def  {
   uint32_t                queue_sz;    ///< number of elements in the queue
-  uint32_t                 item_sz;    ///< size of an item 
+  uint32_t                 item_sz;    ///< size of an item
   void                       *pool;    ///< memory array for mail
 } osMailQDef_t;
 
-/// Event structure contains detailed information about an event. 
-/// \note MUST REMAIN UNCHANGED: \b os_event shall be consistent in every CMSIS-RTOS. 
+/// Event structure contains detailed information about an event.
+/// \note MUST REMAIN UNCHANGED: \b os_event shall be consistent in every CMSIS-RTOS.
 ///       However the struct may be extended at the end.
 typedef struct  {
   osStatus                 status;     ///< status code: event or error information
   union  {
-    uint32_t                    v;     ///< message as 32-bit value 
+    uint32_t                    v;     ///< message as 32-bit value
     void                       *p;     ///< message or mail as void pointer
-    int32_t               signals;     ///< signal flags 
+    int32_t               signals;     ///< signal flags
   } value;                             ///< event value
   union  {
-    osMailQId             mail_id;     ///< mail id obtained by \ref osMailCreate 
-    osMessageQId       message_id;     ///< message id obtained by \ref osMessageCreate 
+    osMailQId             mail_id;     ///< mail id obtained by \ref osMailCreate
+    osMessageQId       message_id;     ///< message id obtained by \ref osMessageCreate
   } def;                               ///< event definition
 } osEvent;
 
@@ -283,11 +283,11 @@ typedef struct  {
 /// \param[in]     thread_def    thread definition referenced with \ref osThread.
 /// \param[in]     argument      pointer that is passed to the thread function as start argument.
 /// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS. 
+/// \note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS.
 osStatus osKernelStart (osThreadDef_t *thread_def, void *argument);
-   
+
 /// Check if the RTOS kernel is already started.
-/// \note MUST REMAIN UNCHANGED: \b osKernelRunning shall be consistent in every CMSIS-RTOS. 
+/// \note MUST REMAIN UNCHANGED: \b osKernelRunning shall be consistent in every CMSIS-RTOS.
 /// \return 0 RTOS is not started, 1 RTOS is started.
 int32_t osKernelRunning(void);
 
@@ -299,7 +299,7 @@ int32_t osKernelRunning(void);
 /// \param         priority     initial priority of the thread function.
 /// \param         instances    number of possible thread instances.
 /// \param         stacksz      stack size (in bytes) requirements for the thread function.
-/// \note CAN BE CHANGED: The parameters to \b osThreadDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameters to \b osThreadDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osThreadDef(name, priority, instances, stacksz)  \
@@ -312,7 +312,7 @@ osThreadDef_t os_thread_def_##name = \
 
 /// Access a Thread defintion.
 /// \param         name          name of the thread definition object.
-/// \note CAN BE CHANGED: The parameter to \b osThread shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osThread shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osThread(name)  \
 &os_thread_def_##name
@@ -341,7 +341,7 @@ osStatus osThreadTerminate (osThreadId thread_id);
 /// \note MUST REMAIN UNCHANGED: \b osThreadYield shall be consistent in every CMSIS-RTOS.
 osStatus osThreadYield (void);
 
-/// Change priority of an active thread.  
+/// Change priority of an active thread.
 /// \param[in]     thread_id     thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
 /// \param[in]     priority      new priority value for the thread function.
 /// \return status code that indicates the execution status of the function.
@@ -359,7 +359,7 @@ osPriority osThreadGetPriority (osThreadId thread_id);
 //  ==== Generic Wait Functions ====
 
 /// Wait for Timeout (Time Delay)
-/// \param[in]     millisec      time delay value 
+/// \param[in]     millisec      time delay value
 /// \return status code that indicates the execution status of the function.
 osStatus osDelay (uint32_t millisec);
 
@@ -378,7 +378,7 @@ osEvent osWait (uint32_t millisec);
 /// Define a Timer object.
 /// \param         name          name of the timer object.
 /// \param         function      name of the timer call back function.
-/// \note CAN BE CHANGED: The parameter to \b osTimerDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osTimerDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osTimerDef(name, function)  \
@@ -391,7 +391,7 @@ osTimerDef_t os_timer_def_##name = \
 
 /// Access a Timer definition.
 /// \param         name          name of the timer object.
-/// \note CAN BE CHANGED: The parameter to \b osTimer shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osTimer shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osTimer(name) \
 &os_timer_def_##name
@@ -452,7 +452,7 @@ osEvent osSignalWait (int32_t signals, uint32_t millisec);
 
 /// Define a Mutex.
 /// \param         name          name of the mutex object.
-/// \note CAN BE CHANGED: The parameter to \b osMutexDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMutexDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osMutexDef(name)  \
@@ -464,7 +464,7 @@ osMutexDef_t os_mutex_def_##name = { 0 }
 
 /// Access a Mutex defintion.
 /// \param         name          name of the mutex object.
-/// \note CAN BE CHANGED: The parameter to \b osMutex shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMutex shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osMutex(name)  \
 &os_mutex_def_##name
@@ -495,7 +495,7 @@ osStatus osMutexRelease (osMutexId mutex_id);
 
 /// Define a Semaphore object.
 /// \param         name          name of the semaphore object.
-/// \note CAN BE CHANGED: The parameter to \b osSemaphoreDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osSemaphoreDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osSemaphoreDef(name)  \
@@ -507,7 +507,7 @@ osSemaphoreDef_t os_semaphore_def_##name = { 0 }
 
 /// Access a Semaphore definition.
 /// \param         name          name of the semaphore object.
-/// \note CAN BE CHANGED: The parameter to \b osSemaphore shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osSemaphore shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osSemaphore(name)  \
 &os_semaphore_def_##name
@@ -533,7 +533,7 @@ int32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec);
 osStatus osSemaphoreRelease (osSemaphoreId semaphore_id);
 
 #endif     // Semaphore available
- 
+
 //  ==== Memory Pool Management Functions ====
 
 #if (defined (osFeature_Pool)  &&  (osFeature_Pool != 0))  // Memory Pool Management available
@@ -542,7 +542,7 @@ osStatus osSemaphoreRelease (osSemaphoreId semaphore_id);
 /// \param         name          name of the memory pool.
 /// \param         no            maximum number of objects (elements) in the memory pool.
 /// \param         type          data type of a single object (element).
-/// \note CAN BE CHANGED: The parameter to \b osPoolDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osPoolDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osPoolDef(name, no, type)   \
@@ -555,7 +555,7 @@ osPoolDef_t os_pool_def_##name = \
 
 /// \brief Access a Memory Pool definition.
 /// \param         name          name of the memory pool
-/// \note CAN BE CHANGED: The parameter to \b osPool shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osPool shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osPool(name) \
 &os_pool_def_##name
@@ -572,7 +572,7 @@ osPoolId osPoolCreate (osPoolDef_t *pool_def);
 /// \note MUST REMAIN UNCHANGED: \b osPoolAlloc shall be consistent in every CMSIS-RTOS.
 void *osPoolAlloc (osPoolId pool_id);
 
-/// Allocate a memory block from a memory pool and set memory block to zero 
+/// Allocate a memory block from a memory pool and set memory block to zero
 /// \param[in]     pool_id       memory pool ID obtain referenced with \ref osPoolCreate.
 /// \return address of the allocated memory block or NULL in case of no memory available.
 /// \note MUST REMAIN UNCHANGED: \b osPoolCAlloc shall be consistent in every CMSIS-RTOS.
@@ -596,7 +596,7 @@ osStatus osPoolFree (osPoolId pool_id, void *block);
 /// \param         name          name of the queue.
 /// \param         queue_sz      maximum number of messages in the queue.
 /// \param         type          data type of a single message element (for debugger).
-/// \note CAN BE CHANGED: The parameter to \b osMessageQDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMessageQDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osMessageQDef(name, queue_sz, type)   \
@@ -609,7 +609,7 @@ osMessageQDef_t os_messageQ_def_##name = \
 
 /// \brief Access a Message Queue Definition.
 /// \param         name          name of the queue
-/// \note CAN BE CHANGED: The parameter to \b osMessageQ shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMessageQ shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osMessageQ(name) \
 &os_messageQ_def_##name
@@ -647,7 +647,7 @@ osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec);
 /// \param         name          name of the queue
 /// \param         queue_sz      maximum number of messages in queue
 /// \param         type          data type of a single message element
-/// \note CAN BE CHANGED: The parameter to \b osMailQDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMailQDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osMailQDef(name, queue_sz, type) \
@@ -657,10 +657,10 @@ extern osMailQDef_t os_mailQ_def_##name
 osMailQDef_t os_mailQ_def_##name =  \
 { (queue_sz), sizeof (type) }
 #endif
-     
+
 /// \brief Access a Mail Queue Definition
 /// \param         name          name of the queue
-/// \note CAN BE CHANGED: The parameter to \b osMailQ shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMailQ shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osMailQ(name)  \
 &os_mailQ_def_##name
@@ -706,7 +706,7 @@ osEvent osMailGet (osMailQId queue_id, uint32_t millisec);
 /// \return status code that indicates the execution status of the function.
 /// \note MUST REMAIN UNCHANGED: \b osMailFree shall be consistent in every CMSIS-RTOS.
 osStatus osMailFree (osMailQId queue_id, void *mail);
-                            
+
 #endif  // Mail Queues available
 
 
diff --git a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/IAR/startup_efm32g.c b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/IAR/startup_efm32g.c
index 1713a1aed5..2328977341 100644
--- a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/IAR/startup_efm32g.c
+++ b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/IAR/startup_efm32g.c
@@ -39,7 +39,7 @@ extern void __iar_program_start(void);
 extern void SystemInit(void);
 
 /* Auto defined by linker */
-extern unsigned char CSTACK$$Limit; 
+extern unsigned char CSTACK$$Limit;
 
 __weak void Reset_Handler(void)
 {
diff --git a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/system_efm32g.c b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/system_efm32g.c
index d343bd4357..a11e3de7a2 100644
--- a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/system_efm32g.c
+++ b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/system_efm32g.c
@@ -64,18 +64,18 @@
 /* Do not define variable if HF crystal oscillator not present */
 #if (EFM32_HFXO_FREQ > 0)
 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
-/** System HFXO clock. */ 
+/** System HFXO clock. */
 static uint32_t SystemHFXOClock = EFM32_HFXO_FREQ;
 /** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
 #endif
 
-#ifndef EFM32_LFXO_FREQ 
+#ifndef EFM32_LFXO_FREQ
 #define EFM32_LFXO_FREQ (EFM32_LFRCO_FREQ)
 #endif
 /* Do not define variable if LF crystal oscillator not present */
 #if (EFM32_LFXO_FREQ > 0)
 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
-/** System LFXO clock. */ 
+/** System LFXO clock. */
 static uint32_t SystemLFXOClock = EFM32_LFXO_FREQ;
 /** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
 #endif
@@ -118,13 +118,13 @@ uint32_t SystemCoreClock;
 uint32_t SystemCoreClockGet(void)
 {
   uint32_t ret;
-  
+
   ret = SystemHFClockGet();
 #if defined (_EFM32_GIANT_FAMILY)
   /* Leopard/Giant Gecko has an additional divider */
   ret =  ret / (1 + ((CMU->CTRL & _CMU_CTRL_HFCLKDIV_MASK)>>_CMU_CTRL_HFCLKDIV_SHIFT));
 #endif
-  ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >> 
+  ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >>
           _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT;
 
   /* Keep CMSIS variable up-to-date just in case */
@@ -147,7 +147,7 @@ uint32_t SystemCoreClockGet(void)
 uint32_t SystemHFClockGet(void)
 {
   uint32_t ret;
-  
+
   switch (CMU->STATUS & (CMU_STATUS_HFRCOSEL | CMU_STATUS_HFXOSEL |
                          CMU_STATUS_LFRCOSEL | CMU_STATUS_LFXOSEL))
   {
@@ -160,11 +160,11 @@ uint32_t SystemHFClockGet(void)
       ret = 0;
 #endif
       break;
-      
+
     case CMU_STATUS_LFRCOSEL:
       ret = EFM32_LFRCO_FREQ;
       break;
-      
+
     case CMU_STATUS_HFXOSEL:
 #if (EFM32_HFXO_FREQ > 0)
       ret = SystemHFXOClock;
@@ -174,7 +174,7 @@ uint32_t SystemHFClockGet(void)
       ret = 0;
 #endif
       break;
-      
+
     default: /* CMU_STATUS_HFRCOSEL */
       switch (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK)
       {
diff --git a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/IAR/startup_efm32gg.c b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/IAR/startup_efm32gg.c
index 0e3124dcea..356dec376b 100644
--- a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/IAR/startup_efm32gg.c
+++ b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/IAR/startup_efm32gg.c
@@ -39,7 +39,7 @@ extern void __iar_program_start(void);
 extern void SystemInit(void);
 
 /* Auto defined by linker */
-extern unsigned char CSTACK$$Limit; 
+extern unsigned char CSTACK$$Limit;
 
 __weak void Reset_Handler(void)
 {
diff --git a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/system_efm32gg.c b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/system_efm32gg.c
index c7709f9a64..841ac171b6 100644
--- a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/system_efm32gg.c
+++ b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/system_efm32gg.c
@@ -64,18 +64,18 @@
 /* Do not define variable if HF crystal oscillator not present */
 #if (EFM32_HFXO_FREQ > 0)
 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
-/** System HFXO clock. */ 
+/** System HFXO clock. */
 static uint32_t SystemHFXOClock = EFM32_HFXO_FREQ;
 /** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
 #endif
 
-#ifndef EFM32_LFXO_FREQ 
+#ifndef EFM32_LFXO_FREQ
 #define EFM32_LFXO_FREQ (EFM32_LFRCO_FREQ)
 #endif
 /* Do not define variable if LF crystal oscillator not present */
 #if (EFM32_LFXO_FREQ > 0)
 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
-/** System LFXO clock. */ 
+/** System LFXO clock. */
 static uint32_t SystemLFXOClock = EFM32_LFXO_FREQ;
 /** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
 #endif
@@ -118,13 +118,13 @@ uint32_t SystemCoreClock;
 uint32_t SystemCoreClockGet(void)
 {
   uint32_t ret;
-  
+
   ret = SystemHFClockGet();
 #if defined (_EFM32_GIANT_FAMILY)
   /* Leopard/Giant Gecko has an additional divider */
   ret =  ret / (1 + ((CMU->CTRL & _CMU_CTRL_HFCLKDIV_MASK)>>_CMU_CTRL_HFCLKDIV_SHIFT));
 #endif
-  ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >> 
+  ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >>
           _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT;
 
   /* Keep CMSIS variable up-to-date just in case */
@@ -147,7 +147,7 @@ uint32_t SystemCoreClockGet(void)
 uint32_t SystemHFClockGet(void)
 {
   uint32_t ret;
-  
+
   switch (CMU->STATUS & (CMU_STATUS_HFRCOSEL | CMU_STATUS_HFXOSEL |
                          CMU_STATUS_LFRCOSEL | CMU_STATUS_LFXOSEL))
   {
@@ -160,11 +160,11 @@ uint32_t SystemHFClockGet(void)
       ret = 0;
 #endif
       break;
-      
+
     case CMU_STATUS_LFRCOSEL:
       ret = EFM32_LFRCO_FREQ;
       break;
-      
+
     case CMU_STATUS_HFXOSEL:
 #if (EFM32_HFXO_FREQ > 0)
       ret = SystemHFXOClock;
@@ -174,7 +174,7 @@ uint32_t SystemHFClockGet(void)
       ret = 0;
 #endif
       break;
-      
+
     default: /* CMU_STATUS_HFRCOSEL */
       switch (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK)
       {
diff --git a/bsp/efm32/Libraries/emlib/inc/em_acmp.h b/bsp/efm32/Libraries/emlib/inc/em_acmp.h
index 0c20ead97f..bc36e3c618 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_acmp.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_acmp.h
@@ -173,7 +173,7 @@ typedef struct
    *  power used by the VDD and bandgap references. */
   bool                          lowPowerReferenceEnabled;
 
-  /** Vdd reference value. VDD_SCALED = VDD  VDDLEVEL  50mV/3.8V.
+  /** Vdd reference value. VDD_SCALED = VDD 脳 VDDLEVEL 脳 50mV/3.8V.
    *  Valid values are in the range 0-63. */
   uint32_t                      vddLevel;
 
@@ -229,7 +229,7 @@ typedef struct
    *  power used by the VDD and bandgap references. */
   bool                         lowPowerReferenceEnabled;
 
-  /** Vdd reference value. VDD_SCALED = VDD  VDDLEVEL  50mV/3.8V.
+  /** Vdd reference value. VDD_SCALED = VDD 脳 VDDLEVEL 脳 50mV/3.8V.
    *  Valid values are in the range 0-63. */
   uint32_t                     vddLevel;
 
diff --git a/bsp/efm32/Libraries/emlib/inc/em_burtc.h b/bsp/efm32/Libraries/emlib/inc/em_burtc.h
index 3f7233a5c5..8e6d11ec6a 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_burtc.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_burtc.h
@@ -289,8 +289,8 @@ __STATIC_INLINE void BURTC_Enable(bool enable)
   if( enable )
   {
     BITBAND_Peripheral(&BURTC->CTRL, _BURTC_CTRL_RSTEN_SHIFT, 0);
-  } 
-  else 
+  }
+  else
   {
     BITBAND_Peripheral(&BURTC->CTRL, _BURTC_CTRL_RSTEN_SHIFT, 1);
   }
diff --git a/bsp/efm32/Libraries/emlib/inc/em_cmu.h b/bsp/efm32/Libraries/emlib/inc/em_cmu.h
index 7f0a3fbd4c..881fd77174 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_cmu.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_cmu.h
@@ -432,7 +432,7 @@ typedef enum
 #endif
 
 #if defined(USB_PRESENT)
-  cmuClock_USBC = (CMU_NODIV_REG << CMU_DIV_REG_POS) | 
+  cmuClock_USBC = (CMU_NODIV_REG << CMU_DIV_REG_POS) |
                   (CMU_USBCCLKSEL_REG << CMU_SEL_REG_POS) |
                   (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS) |
                   (_CMU_HFCORECLKEN0_USBC_SHIFT << CMU_EN_BIT_POS) |
@@ -441,7 +441,7 @@ typedef enum
 #endif
 
 #if defined(USB_PRESENT)
-  cmuClock_USB = (CMU_NODIV_REG << CMU_DIV_REG_POS) | 
+  cmuClock_USB = (CMU_NODIV_REG << CMU_DIV_REG_POS) |
                  (CMU_NOSEL_REG << CMU_SEL_REG_POS) |
                  (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS) |
                  (_CMU_HFCORECLKEN0_USB_SHIFT << CMU_EN_BIT_POS) |
diff --git a/bsp/efm32/Libraries/emlib/inc/em_dma.h b/bsp/efm32/Libraries/emlib/inc/em_dma.h
index 5ce256296f..544ccb5bc3 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_dma.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_dma.h
@@ -251,7 +251,7 @@ typedef struct
   /** Enable repeated loop */
   bool      enable;
   /** Width of transfer, reload value for nMinus1 */
-  uint16_t  nMinus1;  
+  uint16_t  nMinus1;
 } DMA_CfgLoop_TypeDef;
 
 
@@ -335,20 +335,20 @@ typedef struct
    * Pointer to the controlblock in memory holding descriptors (channel
    * control data structures). This memory must be properly aligned
    * according to requirements.
-   * 
+   *
    * Alignment requirements are
    *   a) 5 bits base requirement, bits [4:0]
    *   b) Add the number of bits needed to represent the wanted number
    *      of channels
    *   c) Align structure with this number of bits set to zero
-   *  
+   *
    * Examples: 4 channels, 5 + 2 (channels 0 to 3) = 7 bits
    *           7 bit alignment, 64 byte address alignment
    *           8 channels, 5 + 3 (channels 0 to 7) = 8 bits
    *           8 bit alignment, 256 byte address alignment
    *           12 channels, 5 + 4 (channels 0 to 11) = 9 bits
    *           9 bit alignment, 512 byte address alignment
-   * 
+   *
    * Please refer to the reference manual, DMA chapter for more details.
    *
    * It is possible to provide a smaller memory block, only covering
diff --git a/bsp/efm32/Libraries/emlib/inc/em_ebi.h b/bsp/efm32/Libraries/emlib/inc/em_ebi.h
index 43bf58de2c..dbfe09e74e 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_ebi.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_ebi.h
@@ -157,7 +157,7 @@ typedef enum
 } EBI_ALow_TypeDef;
 
 /** Adress Pin Enable, high limit - higher limit of pins to enable */
-typedef enum 
+typedef enum
 {
   /** All EBI_A pins are disabled */
   ebiAHighA0 = EBI_ROUTE_APEN_A0,
@@ -218,9 +218,9 @@ typedef enum {
   /** EBI PIN I/O Location 1 */
   ebiLocation1 = EBI_ROUTE_LOCATION_LOC1,
   /** EBI PIN I/O Location 2 */
-  ebiLocation2 = EBI_ROUTE_LOCATION_LOC2,  
+  ebiLocation2 = EBI_ROUTE_LOCATION_LOC2,
   /** EBI PIN I/O Location 3 */
-  // ebiLocation3 = EBI_ROUTE_LOCATION_LOC3,  
+  // ebiLocation3 = EBI_ROUTE_LOCATION_LOC3,
 } EBI_Location_TypeDef;
 #endif
 
@@ -626,7 +626,7 @@ __STATIC_INLINE void EBI_TFTPixelSet(int pixel, uint32_t color)
  ******************************************************************************/
 __STATIC_INLINE void EBI_TFTMaskBlendMode(EBI_TFTMaskBlend_TypeDef maskBlend)
 {
-  EBI->TFTCTRL = (EBI->TFTCTRL & (~_EBI_TFTCTRL_MASKBLEND_MASK))|maskBlend;                  
+  EBI->TFTCTRL = (EBI->TFTCTRL & (~_EBI_TFTCTRL_MASKBLEND_MASK))|maskBlend;
 }
 
 
@@ -676,7 +676,7 @@ __STATIC_INLINE uint32_t EBI_TFTHCount(void)
 
 
 /***************************************************************************//**
- * @brief Set Frame Buffer Trigger  
+ * @brief Set Frame Buffer Trigger
  *   Frame buffer pointer will be updated either on each horizontal line (hsync)
  *   or vertical update (vsync)(
  ******************************************************************************/
diff --git a/bsp/efm32/Libraries/emlib/inc/em_emu.h b/bsp/efm32/Libraries/emlib/inc/em_emu.h
index ea000c6c2f..c6687d41a0 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_emu.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_emu.h
@@ -62,8 +62,8 @@ typedef enum
   /** Select ULFRCO as duty oscillator in EM4 */
   emuEM4Osc_ULFRCO = EMU_EM4CONF_OSC_ULFRCO,
   /** Select LFXO as duty oscillator in EM4 */
-  emuEM4Osc_LFXO = EMU_EM4CONF_OSC_LFXO, 
-  /** Select LFRCO as duty oscillator in EM4 */    
+  emuEM4Osc_LFXO = EMU_EM4CONF_OSC_LFXO,
+  /** Select LFRCO as duty oscillator in EM4 */
   emuEM4Osc_LFRCO = EMU_EM4CONF_OSC_LFRCO
 } EMU_EM4Osc_TypeDef;
 
@@ -124,15 +124,15 @@ typedef enum
 
 #if defined(_EFM32_GIANT_FAMILY)
 /** Energy Mode 4 initialization structure  */
-typedef struct 
+typedef struct
 {
   /** Lock configuration of regulator, BOD and oscillator */
   bool               lockConfig;
   /** EM4 duty oscillator */
-  EMU_EM4Osc_TypeDef osc;  
+  EMU_EM4Osc_TypeDef osc;
   /** Wake up on EM4 BURTC interrupt */
   bool               buRtcWakeup;
-  /** Enable EM4 voltage regulator */  
+  /** Enable EM4 voltage regulator */
   bool               vreg;
 } EMU_EM4Init_TypeDef;
 
@@ -145,7 +145,7 @@ typedef struct
   }
 
 /** Backup Power Domain Initialization structure */
-typedef struct 
+typedef struct
 {
   /* Backup Power Domain power configuration */
 
@@ -153,7 +153,7 @@ typedef struct
   EMU_Probe_TypeDef probe;
   /** Enable BOD calibration mode */
   bool              bodCal;
-  /** Enable BU_STAT status pin for active BU mode */ 
+  /** Enable BU_STAT status pin for active BU mode */
   bool              statusPinEnable;
 
   /* Backup Power Domain connection configuration */
diff --git a/bsp/efm32/Libraries/emlib/inc/em_msc.h b/bsp/efm32/Libraries/emlib/inc/em_msc.h
index 0af96f9271..ac00aac98a 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_msc.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_msc.h
@@ -88,7 +88,7 @@ typedef enum
 
 #if defined (_EFM32_GIANT_FAMILY)
 /** Strategy for prioritized bus access */
-typedef enum { 
+typedef enum {
   mscBusStrategyCPU = MSC_READCTRL_BUSSTRATEGY_CPU, /**< Prioritize CPU bus accesses */
   mscBusStrategyDMA = MSC_READCTRL_BUSSTRATEGY_DMA, /**< Prioritize DMA bus accesses */
   mscBusStrategyDMAEM1 = MSC_READCTRL_BUSSTRATEGY_DMAEM1, /**< Prioritize DMAEM1 for bus accesses */
diff --git a/bsp/efm32/Libraries/emlib/inc/em_rmu.h b/bsp/efm32/Libraries/emlib/inc/em_rmu.h
index c180344616..8ee5ebec33 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_rmu.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_rmu.h
@@ -59,10 +59,10 @@ typedef enum
 {
 #if defined(_EFM32_GIANT_FAMILY)
   /** Reset control over Backup Power Domain */
-  rmuResetBU = _RMU_CTRL_BURSTEN_SHIFT,        
+  rmuResetBU = _RMU_CTRL_BURSTEN_SHIFT,
 #endif
   /** Allow Cortex-M3 lock up signal */
-  rmuResetLockUp = _RMU_CTRL_LOCKUPRDIS_SHIFT 
+  rmuResetLockUp = _RMU_CTRL_LOCKUPRDIS_SHIFT
 } RMU_Reset_TypeDef;
 
 /*******************************************************************************
diff --git a/bsp/efm32/Libraries/emlib/inc/em_usart.h b/bsp/efm32/Libraries/emlib/inc/em_usart.h
index e30d75c7fe..d36209bc37 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_usart.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_usart.h
@@ -276,7 +276,7 @@ typedef struct
 
 #if defined(_EFM32_TINY_FAMILY) || defined(_EFM32_GIANT_FAMILY)
 /** USART PRS trigger enable */
-typedef struct 
+typedef struct
 {
 #if defined(_EFM32_GIANT_FAMILY)
   /** Enable AUTOTX */
diff --git a/bsp/efm32/Libraries/emlib/src/em_burtc.c b/bsp/efm32/Libraries/emlib/src/em_burtc.c
index 005c7770fb..dac6645c67 100644
--- a/bsp/efm32/Libraries/emlib/src/em_burtc.c
+++ b/bsp/efm32/Libraries/emlib/src/em_burtc.c
@@ -87,7 +87,7 @@ __STATIC_INLINE uint32_t BURTC_DivToLog2(uint32_t div)
  *    Configures the BURTC peripheral.
  *
  * @note
- *   Before initialization, BURTC module must first be enabled by clearing the 
+ *   Before initialization, BURTC module must first be enabled by clearing the
  *   reset bit in the RMU, i.e.
  * @verbatim
  *   RMU_ResetControl(rmuResetBU, false);
@@ -123,7 +123,7 @@ void BURTC_Init(const BURTC_Init_TypeDef *burtcInit)
   presc = BURTC_DivToLog2(burtcInit->clkDiv);
 
   /* Make sure all registers are updated simultaneously */
-  if (burtcInit->enable) 
+  if (burtcInit->enable)
   {
     BURTC_FreezeEnable(true);
   }
@@ -132,7 +132,7 @@ void BURTC_Init(const BURTC_Init_TypeDef *burtcInit)
   BURTC->LPMODE = (uint32_t)(burtcInit->lowPowerMode);
 
   /* New configuration */
-  ctrl = ((BURTC_CTRL_RSTEN) | 
+  ctrl = ((BURTC_CTRL_RSTEN) |
           (burtcInit->mode) |
           (burtcInit->debugRun << _BURTC_CTRL_DEBUGRUN_SHIFT) |
           (burtcInit->compare0Top << _BURTC_CTRL_COMP0TOP_SHIFT) |
diff --git a/bsp/efm32/Libraries/emlib/src/em_cmu.c b/bsp/efm32/Libraries/emlib/src/em_cmu.c
index 974ff932d6..516f7b68ca 100644
--- a/bsp/efm32/Libraries/emlib/src/em_cmu.c
+++ b/bsp/efm32/Libraries/emlib/src/em_cmu.c
@@ -1377,14 +1377,14 @@ void CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref)
       /* frequencies above 32MHz */
       if(SystemHFXOClockGet() > CMU_MAX_FREQ_HFLE)
       {
-        CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) | 
-          CMU_CTRL_HFXOBUFCUR_BOOSTABOVE32MHZ | 
+        CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) |
+          CMU_CTRL_HFXOBUFCUR_BOOSTABOVE32MHZ |
           /* Must have HFLE enabled to access some LE peripherals >=32MHz */
           CMU_CTRL_HFLE;
       } else {
         /* This can happen if the user configures the EFM32_HFXO_FREQ to */
         /* use another oscillator frequency */
-        CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) | 
+        CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) |
           CMU_CTRL_HFXOBUFCUR_BOOSTUPTO32MHZ;
       }
 #endif
@@ -1475,7 +1475,7 @@ void CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref)
         BITBAND_Peripheral(&(CMU->CTRL), _CMU_CTRL_HFLE_SHIFT, 1);
 
         /* Enable DIV4 factor for peripheral clock */
-        BITBAND_Peripheral(&(CMU->HFCORECLKDIV), 
+        BITBAND_Peripheral(&(CMU->HFCORECLKDIV),
                            _CMU_HFCORECLKDIV_HFCORECLKLEDIV_SHIFT, 1);
       }
 #endif
diff --git a/bsp/efm32/Libraries/emlib/src/em_ebi.c b/bsp/efm32/Libraries/emlib/src/em_ebi.c
index 8f8439e7fa..52ef36716b 100644
--- a/bsp/efm32/Libraries/emlib/src/em_ebi.c
+++ b/bsp/efm32/Libraries/emlib/src/em_ebi.c
@@ -105,7 +105,7 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
     ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTODIS_SHIFT);
     ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL_SHIFT);
     ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE_SHIFT);
-    if ( ebiInit->enable) 
+    if ( ebiInit->enable)
     {
       ctrl |= EBI_CTRL_BANK0EN;
     }
@@ -117,13 +117,13 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
               _EBI_CTRL_ARDY1EN_MASK|
               _EBI_CTRL_ARDYTO1DIS_MASK|
               _EBI_CTRL_NOIDLE1_MASK|
-              _EBI_CTRL_BANK1EN_MASK); 
+              _EBI_CTRL_BANK1EN_MASK);
     ctrl |= (ebiInit->mode << _EBI_CTRL_MODE1_SHIFT);
     ctrl |= (ebiInit->ardyEnable << _EBI_CTRL_ARDY1EN_SHIFT);
     ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTO1DIS_SHIFT);
     ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL1_SHIFT);
     ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE1_SHIFT);
-    if ( ebiInit->enable) 
+    if ( ebiInit->enable)
     {
       ctrl |= EBI_CTRL_BANK1EN;
     }
@@ -141,7 +141,7 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
     ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTO2DIS_SHIFT);
     ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL2_SHIFT);
     ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE2_SHIFT);
-    if ( ebiInit->enable) 
+    if ( ebiInit->enable)
     {
       ctrl |= EBI_CTRL_BANK2EN;
     }
@@ -153,13 +153,13 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
               _EBI_CTRL_ARDY3EN_MASK|
               _EBI_CTRL_ARDYTO3DIS_MASK|
               _EBI_CTRL_NOIDLE3_MASK|
-              _EBI_CTRL_BANK3EN_MASK); 
+              _EBI_CTRL_BANK3EN_MASK);
     ctrl |= (ebiInit->mode << _EBI_CTRL_MODE3_SHIFT);
     ctrl |= (ebiInit->ardyEnable << _EBI_CTRL_ARDY3EN_SHIFT);
     ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTO3DIS_SHIFT);
     ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL3_SHIFT);
     ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE3_SHIFT);
-    if ( ebiInit->enable) 
+    if ( ebiInit->enable)
     {
       ctrl |= EBI_CTRL_BANK3EN;
     }
@@ -172,7 +172,7 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
             _EBI_CTRL_BANK1EN_MASK|
             _EBI_CTRL_BANK2EN_MASK|
             _EBI_CTRL_BANK3EN_MASK);
-  if ( ebiInit->enable) 
+  if ( ebiInit->enable)
   {
     if ( ebiInit->banks & EBI_BANK0 )
     {
@@ -265,7 +265,7 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
   EBI_ChipSelectEnable(ebiInit->csLines, true);
 
   /* Activate new configuration */
-  EBI->CTRL = ctrl;  
+  EBI->CTRL = ctrl;
 }
 
 
diff --git a/bsp/efm32/Libraries/emlib/src/em_emu.c b/bsp/efm32/Libraries/emlib/src/em_emu.c
index fc8587636c..5df9fb577a 100644
--- a/bsp/efm32/Libraries/emlib/src/em_emu.c
+++ b/bsp/efm32/Libraries/emlib/src/em_emu.c
@@ -402,16 +402,16 @@ void EMU_EM4Init(EMU_EM4Init_TypeDef *em4init)
     _EMU_EM4CONF_OSC_MASK|
     _EMU_EM4CONF_BURTCWU_MASK|
     _EMU_EM4CONF_VREGEN_MASK);
-  
+
   /* Configure new settings */
   em4conf |= (
     (em4init->lockConfig << _EMU_EM4CONF_LOCKCONF_SHIFT)|
     (em4init->osc)|
     (em4init->buRtcWakeup << _EMU_EM4CONF_BURTCWU_SHIFT)|
     (em4init->vreg << _EMU_EM4CONF_VREGEN_SHIFT));
-  
+
   /* Apply configuration. Note that lock can be set after this stage. */
-  EMU->EM4CONF = em4conf;    
+  EMU->EM4CONF = em4conf;
 }
 
 
@@ -432,15 +432,15 @@ void EMU_BUPDInit(EMU_BUPDInit_TypeDef *bupdInit)
     _EMU_PWRCONF_VOUTSTRONG_MASK|
     _EMU_PWRCONF_VOUTMED_MASK|
     _EMU_PWRCONF_VOUTWEAK_MASK);
-  
+
   reg |= (bupdInit->resistor|
          (bupdInit->voutStrong << _EMU_PWRCONF_VOUTSTRONG_SHIFT)|
          (bupdInit->voutMed    << _EMU_PWRCONF_VOUTMED_SHIFT)|
-         (bupdInit->voutWeak   << _EMU_PWRCONF_VOUTWEAK_SHIFT)); 
-  
+         (bupdInit->voutWeak   << _EMU_PWRCONF_VOUTWEAK_SHIFT));
+
   EMU->PWRCONF = reg;
 
-  /* Set backup domain inactive mode configuration */ 
+  /* Set backup domain inactive mode configuration */
   reg = EMU->BUINACT & ~(_EMU_BUINACT_PWRCON_MASK);
   reg |= (bupdInit->inactivePower);
   EMU->BUINACT = reg;
@@ -456,14 +456,14 @@ void EMU_BUPDInit(EMU_BUPDInit_TypeDef *bupdInit)
     _EMU_BUCTRL_BODCAL_MASK|
     _EMU_BUCTRL_STATEN_MASK|
     _EMU_BUCTRL_EN_MASK);
-             
-  /* Note use of ->enable to both enable BUPD, use BU_VIN pin input and 
+
+  /* Note use of ->enable to both enable BUPD, use BU_VIN pin input and
      release reset */
   reg |= (bupdInit->probe|
          (bupdInit->bodCal          << _EMU_BUCTRL_BODCAL_SHIFT)|
          (bupdInit->statusPinEnable << _EMU_BUCTRL_STATEN_SHIFT)|
          (bupdInit->enable          << _EMU_BUCTRL_EN_SHIFT));
-  
+
   /* Enable configuration */
   EMU->BUCTRL = reg;
 
@@ -479,14 +479,14 @@ void EMU_BUPDInit(EMU_BUPDInit_TypeDef *bupdInit)
  * @brief
  *   Configure Backup Power Domain BOD Threshold value
  * @note
- *   These values are precalibrated 
+ *   These values are precalibrated
  * @param[in] mode Active or Inactive mode
  * @param[in] value
  ******************************************************************************/
 void EMU_BUThresholdSet(EMU_BODMode_TypeDef mode, uint32_t value)
 {
   EFM_ASSERT(value<4);
-  
+
   switch(mode)
   {
   case emuBODMode_Active:
@@ -503,7 +503,7 @@ void EMU_BUThresholdSet(EMU_BODMode_TypeDef mode, uint32_t value)
  * @brief
  *  Configure Backup Power Domain BOD Threshold Range
  * @note
- *  These values are precalibrated 
+ *  These values are precalibrated
  * @param[in] mode Active or Inactive mode
  * @param[in] value
  ******************************************************************************/
diff --git a/bsp/efm32/Libraries/emlib/src/em_lesense.c b/bsp/efm32/Libraries/emlib/src/em_lesense.c
index 8dc9c1ec7d..4482b20cce 100644
--- a/bsp/efm32/Libraries/emlib/src/em_lesense.c
+++ b/bsp/efm32/Libraries/emlib/src/em_lesense.c
@@ -533,7 +533,7 @@ void LESENSE_ChannelConfig(LESENSE_ChDesc_TypeDef const *confCh,
   /* Channel specific configuration of clocks, sample mode, excitation pin mode
    * alternate excitation usage and interrupt mode on scan channel chIdx in
    * LESENSE_CHchIdx_INTERACT. */
-  LESENSE->CH[chIdx].INTERACT = ((uint32_t)confCh->exClk << 
+  LESENSE->CH[chIdx].INTERACT = ((uint32_t)confCh->exClk <<
                                  _LESENSE_CH_INTERACT_EXCLK_SHIFT) |
                                 ((uint32_t)confCh->sampleClk <<
                                  _LESENSE_CH_INTERACT_SAMPLECLK_SHIFT) |
diff --git a/bsp/efm32/Libraries/emlib/src/em_msc.c b/bsp/efm32/Libraries/emlib/src/em_msc.c
index f42811219e..47f01e6168 100644
--- a/bsp/efm32/Libraries/emlib/src/em_msc.c
+++ b/bsp/efm32/Libraries/emlib/src/em_msc.c
@@ -55,7 +55,7 @@
  * @brief
  *   Enables the flash controller for writing.
  * @note
- *   IMPORTANT: This function must be called before flash operations when 
+ *   IMPORTANT: This function must be called before flash operations when
  *   AUXHFRCO clock has been changed from default 14MHz band.
  ******************************************************************************/
 void MSC_Init(void)
diff --git a/bsp/efm32/Libraries/emlib/src/em_opamp.c b/bsp/efm32/Libraries/emlib/src/em_opamp.c
index f12551430f..c44ab9c4a6 100644
--- a/bsp/efm32/Libraries/emlib/src/em_opamp.c
+++ b/bsp/efm32/Libraries/emlib/src/em_opamp.c
@@ -243,7 +243,7 @@ void OPAMP_Disable( DAC_TypeDef *dac, OPAMP_TypeDef opa )
 void OPAMP_Enable( DAC_TypeDef *dac, OPAMP_TypeDef opa, const OPAMP_Init_TypeDef *init )
 {
   uint32_t offset;
-  
+
   EFM_ASSERT( DAC_REF_VALID( dac ) );
   EFM_ASSERT( DAC_OPA_VALID( opa ) );
   EFM_ASSERT( init->bias <= ( _DAC_BIASPROG_BIASPROG_MASK  >>
@@ -267,13 +267,13 @@ void OPAMP_Enable( DAC_TypeDef *dac, OPAMP_TypeDef opa, const OPAMP_Init_TypeDef
     }
     else
     {
-      EFM_ASSERT( init->offset <= ( _DAC_CAL_CH0OFFSET_MASK >> 
+      EFM_ASSERT( init->offset <= ( _DAC_CAL_CH0OFFSET_MASK >>
                                     _DAC_CAL_CH0OFFSET_SHIFT   ) );
-      
+
       dac->CAL = ( dac->CAL      & ~_DAC_CAL_CH0OFFSET_MASK  ) |
-                 ( init->offset <<  _DAC_CAL_CH0OFFSET_SHIFT );        
+                 ( init->offset <<  _DAC_CAL_CH0OFFSET_SHIFT );
     }
-    
+
     dac->OPA0MUX  = (uint32_t)init->resSel                                |
                     (uint32_t)init->outMode                               |
                     init->outPen                                          |
@@ -315,11 +315,11 @@ void OPAMP_Enable( DAC_TypeDef *dac, OPAMP_TypeDef opa, const OPAMP_Init_TypeDef
     }
     else
     {
-      EFM_ASSERT( init->offset <= ( _DAC_CAL_CH1OFFSET_MASK >> 
+      EFM_ASSERT( init->offset <= ( _DAC_CAL_CH1OFFSET_MASK >>
                                     _DAC_CAL_CH1OFFSET_SHIFT   ) );
-      
+
       dac->CAL = ( dac->CAL      & ~_DAC_CAL_CH1OFFSET_MASK  ) |
-                 ( init->offset <<  _DAC_CAL_CH1OFFSET_SHIFT );        
+                 ( init->offset <<  _DAC_CAL_CH1OFFSET_SHIFT );
     }
 
     dac->OPA1MUX  = (uint32_t)init->resSel                                |
@@ -370,11 +370,11 @@ void OPAMP_Enable( DAC_TypeDef *dac, OPAMP_TypeDef opa, const OPAMP_Init_TypeDef
     }
     else
     {
-      EFM_ASSERT( init->offset <= ( _DAC_OPAOFFSET_OPA2OFFSET_MASK >> 
+      EFM_ASSERT( init->offset <= ( _DAC_OPAOFFSET_OPA2OFFSET_MASK >>
                                     _DAC_OPAOFFSET_OPA2OFFSET_SHIFT   ) );
-      
+
       dac->CAL = ( dac->CAL      & ~_DAC_OPAOFFSET_OPA2OFFSET_MASK  ) |
-                 ( init->offset <<  _DAC_OPAOFFSET_OPA2OFFSET_SHIFT );        
+                 ( init->offset <<  _DAC_OPAOFFSET_OPA2OFFSET_SHIFT );
     }
 
     dac->OPA2MUX  = (uint32_t)init->resSel                                |
diff --git a/bsp/efm32/Libraries/emlib/src/em_rmu.c b/bsp/efm32/Libraries/emlib/src/em_rmu.c
index 93da92dee0..8a45d668cf 100644
--- a/bsp/efm32/Libraries/emlib/src/em_rmu.c
+++ b/bsp/efm32/Libraries/emlib/src/em_rmu.c
@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file
  * @brief Reset Management Unit (RMU) peripheral module peripheral API
- *  
+ *
  * @author Energy Micro AS
  * @version 3.0.0
  *******************************************************************************
diff --git a/bsp/efm32/Libraries/emlib/src/em_timer.c b/bsp/efm32/Libraries/emlib/src/em_timer.c
index b7d8c8930e..cdca54573f 100644
--- a/bsp/efm32/Libraries/emlib/src/em_timer.c
+++ b/bsp/efm32/Libraries/emlib/src/em_timer.c
@@ -136,7 +136,7 @@ void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init)
   {
     timer->CMD = TIMER_CMD_STOP;
   }
-  
+
   /* Reset counter */
   timer->CNT = _TIMER_CNT_RESETVALUE;
 
diff --git a/bsp/efm32/Libraries/emlib/src/em_usart.c b/bsp/efm32/Libraries/emlib/src/em_usart.c
index d33fe9e30c..33a944f216 100644
--- a/bsp/efm32/Libraries/emlib/src/em_usart.c
+++ b/bsp/efm32/Libraries/emlib/src/em_usart.c
@@ -82,7 +82,7 @@
 #endif
 
 #if (UART_COUNT == 1)
-#define UART_REF_VALID(ref)     ((ref)==UART0) 
+#define UART_REF_VALID(ref)     ((ref)==UART0)
 #elif (UART_COUNT == 2)
 #define UART_REF_VALID(ref)     (((ref)==UART0) || ((ref)==UART1))
 #else
@@ -733,8 +733,8 @@ void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init)
  * @brief
  *   Initialize automatic transmissions using PRS channel as trigger
  * @note
- *   Initialize USART with USART_Init() before setting up PRS configuration 
- * 
+ *   Initialize USART with USART_Init() before setting up PRS configuration
+ *
  * @param[in] usart Pointer to USART to configure
  * @param[in] init Pointer to initialization structure
  ******************************************************************************/
diff --git a/bsp/efm32/Libraries/emlib/src/em_vcmp.c b/bsp/efm32/Libraries/emlib/src/em_vcmp.c
index 6a83a22ae8..2e0d33da03 100644
--- a/bsp/efm32/Libraries/emlib/src/em_vcmp.c
+++ b/bsp/efm32/Libraries/emlib/src/em_vcmp.c
@@ -133,7 +133,7 @@ void VCMP_Init(const VCMP_Init_TypeDef *vcmpInit)
     while(!VCMP_Ready());
     VCMP_LowPowerRefSet(vcmpInit->lowPowerRef);
   }
-  
+
   /* Clear edge interrupt */
   VCMP_IntClear(VCMP_IF_EDGE);
 }
diff --git a/bsp/efm32/board.c b/bsp/efm32/board.c
index cdd44767f1..ea8b0640d2 100644
--- a/bsp/efm32/board.c
+++ b/bsp/efm32/board.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	board.c
- * @brief 	Board support of RT-Thread RTOS for EFM32
+ * @file    board.c
+ * @brief   Board support of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,12 +10,12 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2010-12-21	onelife		Initial creation for EFM32
- * 2011-05-06	onelife		Add EFM32 development kit and SPI Flash support
- * 2011-07-12	onelife		Add SWO output enable function
- * 2011-12-08	onelife		Add giant gecko development kit support
- * 2011-12-09	onelife		Add giant gecko support
+ * Date         Author      Notes
+ * 2010-12-21   onelife     Initial creation for EFM32
+ * 2011-05-06   onelife     Add EFM32 development kit and SPI Flash support
+ * 2011-07-12   onelife     Add SWO output enable function
+ * 2011-12-08   onelife     Add giant gecko development kit support
+ * 2011-12-09   onelife     Add giant gecko support
  * 2011-12-09   onelife     Add LEUART module support
  * 2011-12-14   onelife     Add LFXO enabling routine in driver initialization
  *  function
@@ -37,19 +37,19 @@
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
-#define IS_NVIC_VECTTAB(VECTTAB) 		(((VECTTAB) == RAM_MEM_BASE) || \
-										((VECTTAB) == FLASH_MEM_BASE))
-#define IS_NVIC_OFFSET(OFFSET) 			((OFFSET) < 0x000FFFFF)
+#define IS_NVIC_VECTTAB(VECTTAB)        (((VECTTAB) == RAM_MEM_BASE) || \
+                                        ((VECTTAB) == FLASH_MEM_BASE))
+#define IS_NVIC_OFFSET(OFFSET)          ((OFFSET) < 0x000FFFFF)
 
 /***************************************************************************//**
  * @addtogroup SysTick_clock_source
  * @{
  ******************************************************************************/
 #define SysTick_CLKSource_MASK          ((rt_uint32_t)0x00000004)
-#define SysTick_CLKSource_RTC		    ((rt_uint32_t)0x00000000)
-#define SysTick_CLKSource_HFCORECLK		((rt_uint32_t)0x00000004)
-#define IS_SYSTICK_CLK_SOURCE(SOURCE)	(((SOURCE) == SysTick_CLKSource_RTC) || \
-										((SOURCE) == SysTick_CLKSource_HFCORECLK))
+#define SysTick_CLKSource_RTC           ((rt_uint32_t)0x00000000)
+#define SysTick_CLKSource_HFCORECLK     ((rt_uint32_t)0x00000004)
+#define IS_SYSTICK_CLK_SOURCE(SOURCE)   (((SOURCE) == SysTick_CLKSource_RTC) || \
+                                        ((SOURCE) == SysTick_CLKSource_HFCORECLK))
 /***************************************************************************//**
  * @}
  ******************************************************************************/
@@ -67,20 +67,20 @@
  * @note
  *
  * @param[in] NVIC_VectTab
- *	 Indicate the vector table is allocated in RAM or ROM
+ *   Indicate the vector table is allocated in RAM or ROM
  *
  * @param[in] Offset
  *   The vector table offset
  ******************************************************************************/
 static void NVIC_SetVectorTable(
-	rt_uint32_t NVIC_VectTab,
-	rt_uint32_t Offset)
+    rt_uint32_t NVIC_VectTab,
+    rt_uint32_t Offset)
 {
-	/* Check the parameters */
-	RT_ASSERT(IS_NVIC_VECTTAB(NVIC_VectTab));
-	RT_ASSERT(IS_NVIC_OFFSET(Offset));
+    /* Check the parameters */
+    RT_ASSERT(IS_NVIC_VECTTAB(NVIC_VectTab));
+    RT_ASSERT(IS_NVIC_OFFSET(Offset));
 
-	SCB->VTOR = NVIC_VectTab | (Offset & (rt_uint32_t)0x1FFFFF80);
+    SCB->VTOR = NVIC_VectTab | (Offset & (rt_uint32_t)0x1FFFFF80);
 }
 
 /***************************************************************************//**
@@ -95,19 +95,19 @@ static void NVIC_SetVectorTable(
 static void NVIC_Configuration(void)
 {
 #ifdef  VECT_TAB_RAM
-	/* Set the vector table allocated at 0x20000000 */
-	NVIC_SetVectorTable(RAM_MEM_BASE, 0x0);
+    /* Set the vector table allocated at 0x20000000 */
+    NVIC_SetVectorTable(RAM_MEM_BASE, 0x0);
 #else  /* VECT_TAB_FLASH  */
-	/* Set the vector table allocated at 0x00000000 */
-	NVIC_SetVectorTable(FLASH_MEM_BASE, 0x0);
+    /* Set the vector table allocated at 0x00000000 */
+    NVIC_SetVectorTable(FLASH_MEM_BASE, 0x0);
 #endif
 
-	/* Set NVIC Preemption Priority Bits: 0 bit for pre-emption, 4 bits for
-	   subpriority */
-	NVIC_SetPriorityGrouping(0x7UL);
+    /* Set NVIC Preemption Priority Bits: 0 bit for pre-emption, 4 bits for
+       subpriority */
+    NVIC_SetPriorityGrouping(0x7UL);
 
-	/* Set Base Priority Mask Register */
-	__set_BASEPRI(EFM32_BASE_PRI_DEFAULT);
+    /* Set Base Priority Mask Register */
+    __set_BASEPRI(EFM32_BASE_PRI_DEFAULT);
 }
 
 /***************************************************************************//**
@@ -119,13 +119,13 @@ static void NVIC_Configuration(void)
  * @note
  *
  * @param[in] SysTick_CLKSource
- *	 Specifies the SysTick clock source.
+ *   Specifies the SysTick clock source.
  *
  * @arg SysTick_CLKSource_HCLK_Div8
- * 	 AHB clock divided by 8 selected as SysTick clock source.
+ *   AHB clock divided by 8 selected as SysTick clock source.
  *
  * @arg SysTick_CLKSource_HCLK
- *	 AHB clock selected as SysTick clock source.
+ *   AHB clock selected as SysTick clock source.
  ******************************************************************************/
 static void SysTick_CLKSourceConfig(rt_uint32_t SysTick_CLKSource)
 {
@@ -184,14 +184,14 @@ static void  SysTick_Configuration(void)
     /* Start LETIMER0 */
     LETIMER_Init(LETIMER0, &letimerInit);
 #else
-	rt_uint32_t 	coreClk;
-	rt_uint32_t 	cnts;
+    rt_uint32_t     coreClk;
+    rt_uint32_t     cnts;
 
-	coreClk = SystemCoreClockGet();
-	cnts = coreClk / RT_TICK_PER_SECOND;
+    coreClk = SystemCoreClockGet();
+    cnts = coreClk / RT_TICK_PER_SECOND;
 
-	SysTick_Config(cnts);
-	SysTick_CLKSourceConfig(SysTick_CLKSource_HFCORECLK);
+    SysTick_Config(cnts);
+    SysTick_CLKSourceConfig(SysTick_CLKSource_HFCORECLK);
 #endif
 }
 
@@ -206,9 +206,9 @@ static void  SysTick_Configuration(void)
  ******************************************************************************/
 void Swo_Configuration(void)
 {
-	rt_uint32_t *dwt_ctrl = (rt_uint32_t *) 0xE0001000;
-	rt_uint32_t *tpiu_prescaler = (rt_uint32_t *) 0xE0040010;
-	rt_uint32_t *tpiu_protocol = (rt_uint32_t *) 0xE00400F0;
+    rt_uint32_t *dwt_ctrl = (rt_uint32_t *) 0xE0001000;
+    rt_uint32_t *tpiu_prescaler = (rt_uint32_t *) 0xE0040010;
+    rt_uint32_t *tpiu_protocol = (rt_uint32_t *) 0xE00400F0;
 
     CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
     /* Enable Serial wire output pin */
@@ -258,12 +258,12 @@ void Swo_Configuration(void)
  ******************************************************************************/
 void rt_hw_board_init(void)
 {
-	/* Chip errata */
-	CHIP_Init();
+    /* Chip errata */
+    CHIP_Init();
 
     /* Initialize DVK board register access */
 #if defined(EFM32_GXXX_DK)
-	DVK_init();
+    DVK_init();
 #elif defined(EFM32GG_DK3750)
     DVK_init(DVK_Init_EBI);
 
@@ -272,12 +272,12 @@ void rt_hw_board_init(void)
     DVK_clearInterruptFlags(BC_INTFLAG_MASK);
 #endif
 
-	/* config NVIC Configuration */
-	NVIC_Configuration();
+    /* config NVIC Configuration */
+    NVIC_Configuration();
 
 #if defined(EFM32_USING_HFXO)
-	/* Configure external oscillator */
-	SystemHFXOClockSet(EFM32_HFXO_FREQUENCY);
+    /* Configure external oscillator */
+    SystemHFXOClockSet(EFM32_HFXO_FREQUENCY);
 
     /* Switching the CPU clock source to HFXO */
     CMU_ClockSelectSet(cmuClock_HF, cmuSelect_HFXO);
@@ -293,15 +293,15 @@ void rt_hw_board_init(void)
 
 #if defined(EFM32_SWO_ENABLE)
     /* Enable SWO */
-	Swo_Configuration();
+    Swo_Configuration();
 #endif
 
-	/* Enable high frequency peripheral clock */
-	CMU_ClockEnable(cmuClock_HFPER, true);
-	/* Enabling clock to the interface of the low energy modules */
-	CMU_ClockEnable(cmuClock_CORELE, true);
+    /* Enable high frequency peripheral clock */
+    CMU_ClockEnable(cmuClock_HFPER, true);
+    /* Enabling clock to the interface of the low energy modules */
+    CMU_ClockEnable(cmuClock_CORELE, true);
     /* Enable GPIO clock */
-	CMU_ClockEnable(cmuClock_GPIO, true);
+    CMU_ClockEnable(cmuClock_GPIO, true);
 
     /* Configure the SysTick */
     SysTick_Configuration();
@@ -318,8 +318,8 @@ void rt_hw_board_init(void)
  ******************************************************************************/
 void rt_hw_driver_init(void)
 {
-	/* Initialize DMA */
-	rt_hw_dma_init();
+    /* Initialize DMA */
+    rt_hw_dma_init();
 
     /* Select LFXO for specified module (and wait for it to stabilize) */
 #if (!defined(EFM32_USING_LFXO) && defined(RT_USING_RTC))
@@ -331,11 +331,11 @@ void rt_hw_driver_init(void)
 #error "Low frequency clock source is needed for using LEUART"
 #endif
 
-	/* Initialize USART */
+    /* Initialize USART */
 #if (defined(RT_USING_USART0) || defined(RT_USING_USART1) || \
     defined(RT_USING_USART2) || defined(RT_USING_UART0) || \
     defined(RT_USING_UART1))
-	rt_hw_usart_init();
+    rt_hw_usart_init();
 #endif
 
     /* Initialize LEUART */
@@ -343,7 +343,7 @@ void rt_hw_driver_init(void)
     rt_hw_leuart_init();
 #endif
 
-	/* Setup Console */
+    /* Setup Console */
 #if defined(EFM32_GXXX_DK)
     DVK_enablePeripheral(DVK_RS232A);
     DVK_enablePeripheral(DVK_SPI);
@@ -354,31 +354,31 @@ void rt_hw_driver_init(void)
     DVK_enablePeripheral(DVK_RS232_LEUART);
  #endif
 #endif
-	rt_console_set_device(CONSOLE_DEVICE);
+    rt_console_set_device(CONSOLE_DEVICE);
 
-	/* Initialize Timer */
+    /* Initialize Timer */
 #if (defined(RT_USING_TIMER0) || defined(RT_USING_TIMER1) || defined(RT_USING_TIMER2))
-	rt_hw_timer_init();
+    rt_hw_timer_init();
 #endif
 
-	/* Initialize ADC */
+    /* Initialize ADC */
 #if defined(RT_USING_ADC0)
-	rt_hw_adc_init();
+    rt_hw_adc_init();
 #endif
 
-	/* Initialize ACMP */
+    /* Initialize ACMP */
 #if (defined(RT_USING_ACMP0) || defined(RT_USING_ACMP1))
-	rt_hw_acmp_init();
+    rt_hw_acmp_init();
 #endif
 
-	/* Initialize IIC */
+    /* Initialize IIC */
 #if (defined(RT_USING_IIC0) || defined(RT_USING_IIC1))
-	rt_hw_iic_init();
+    rt_hw_iic_init();
 #endif
 
-	/* Initialize RTC */
+    /* Initialize RTC */
 #if defined(RT_USING_RTC)
-	rt_hw_rtc_init();
+    rt_hw_rtc_init();
 #endif
 
     /* Enable SPI access to MicroSD card */
diff --git a/bsp/efm32/board.h b/bsp/efm32/board.h
index a97b0d9bc0..b92e10194b 100644
--- a/bsp/efm32/board.h
+++ b/bsp/efm32/board.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	board.h
- * @brief 	Board support of RT-Thread RTOS for EFM32
+ * @file    board.h
+ * @brief   Board support of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,18 +10,18 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2010-12-21	onelife		Initial creation for EFM32
- * 2011-05-06	onelife		Add EFM32 development kit and SPI Flash support
- * 2011-07-12	onelife		Add prototype for SWO output enable and interrupt
+ * Date         Author      Notes
+ * 2010-12-21   onelife     Initial creation for EFM32
+ * 2011-05-06   onelife     Add EFM32 development kit and SPI Flash support
+ * 2011-07-12   onelife     Add prototype for SWO output enable and interrupt
  *  context check functions
- * 2011-12-08	onelife		Add giant gecko development kit support
- * 2011-12-09	onelife		Add giant gecko support
+ * 2011-12-08   onelife     Add giant gecko development kit support
+ * 2011-12-09   onelife     Add giant gecko support
  * 2011-12-09   onelife     Add LEUART module support
  * 2011-12-14   onelife     Add LFXO enabling routine in driver initialization
  *  function
  * 2011-12-20   onelife     Move SPI Auto-CS setting to "rtconfig.h"
- * 2012-05-15	onelife		Modified to compatible with CMSIS v3
+ * 2012-05-15   onelife     Modified to compatible with CMSIS v3
  ******************************************************************************/
 #ifndef __BOARD_H__
 #define __BOARD_H__
@@ -72,15 +72,15 @@ extern volatile rt_uint32_t rt_system_status;
 #define EFM32_SWO_ENABLE
 #endif
 
-#define EFM32_NO_DATA				(0)
-#define EFM32_NO_POINTER			(RT_NULL)
-#define EFM32_NO_OFFSET				(-1)
-#define EFM32_NO_DMA				(-1)
+#define EFM32_NO_DATA               (0)
+#define EFM32_NO_POINTER            (RT_NULL)
+#define EFM32_NO_OFFSET             (-1)
+#define EFM32_NO_DMA                (-1)
 
 /* SECTION: SPI Flash */
 #if defined(EFM32_USING_SFLASH)
-#define SFLASH_CS_PORT 				(gpioPortC)
-#define SFLASH_CS_PIN 				(8)
+#define SFLASH_CS_PORT              (gpioPortC)
+#define SFLASH_CS_PIN               (8)
 #endif
 
 /* SECTION: Micro SD */
@@ -114,9 +114,9 @@ extern volatile rt_uint32_t rt_system_status;
 #endif
 
 /* SECTION: SYSTEM */
-#define EFM32_SRAM_END 				(SRAM_BASE + SRAM_SIZE)
-#define EFM32_BASE_PRI_DEFAULT 		(0x0UL << 5)
-#define EFM32_IRQ_PRI_DEFAULT 		(0x4UL << 5)
+#define EFM32_SRAM_END              (SRAM_BASE + SRAM_SIZE)
+#define EFM32_BASE_PRI_DEFAULT      (0x0UL << 5)
+#define EFM32_IRQ_PRI_DEFAULT       (0x4UL << 5)
 
 /* SECTION: CLOCK */
 #define EFM32_USING_HFXO
@@ -125,9 +125,9 @@ extern volatile rt_uint32_t rt_system_status;
  #if (defined(EFM32_G8XX_STK) || defined(EFM32_GXXX_DK))
  #define EFM32_HFXO_FREQUENCY       (32000000)
  #elif defined(EFM32GG_DK3750)
- #define EFM32_HFXO_FREQUENCY 		(48000000)
+ #define EFM32_HFXO_FREQUENCY       (48000000)
  #else
- #define EFM32_HFXO_FREQUENCY		(00000000)
+ #define EFM32_HFXO_FREQUENCY       (00000000)
  #endif
 #endif
 #if defined(EFM32_USING_LFXO)
@@ -141,8 +141,8 @@ extern volatile rt_uint32_t rt_system_status;
 #endif
 
 /* SECTION: USART */
-#define USART_RX_BUFFER_SIZE		(64)
-#define LEUART_RX_BUFFER_SIZE		(64)
+#define USART_RX_BUFFER_SIZE        (64)
+#define LEUART_RX_BUFFER_SIZE       (64)
 /* Location count (start from 0) */
 #if defined(_EFM32_GECKO_FAMILY)
 #define EFM32_USART_LOCATION_COUNT  (3)
@@ -155,14 +155,14 @@ extern volatile rt_uint32_t rt_system_status;
 #endif
 
 /* SUBSECTION: UART */
-#define UART_BAUDRATE				(115200)
+#define UART_BAUDRATE               (115200)
 
 /* SUBSECTION: SPI */
 /* Max SPI clock: HFPERCLK/2 for master, HFPERCLK/8 for slave */
-#define SPI_BAUDRATE				(4000000)
+#define SPI_BAUDRATE                (4000000)
 
 /* SECTION: I2C */
-#define IIC_RX_BUFFER_SIZE			(32)
+#define IIC_RX_BUFFER_SIZE          (32)
 #if defined(_EFM32_GECKO_FAMILY)
 #define EFM32_IIC_LOCATION_COUNT    (4)
 #elif defined(_EFM32_GIANT_FAMILY)
@@ -170,61 +170,61 @@ extern volatile rt_uint32_t rt_system_status;
 #endif
 
 /* SECTION: ADC */
-#define ADC_CALI_REF				(adcRef2V5)
-#define ADC_CALI_CH 				(adcSingleInpCh5)
-#define ADC_CONVERT_FREQUENCY 		(7000000)
+#define ADC_CALI_REF                (adcRef2V5)
+#define ADC_CALI_CH                 (adcSingleInpCh5)
+#define ADC_CONVERT_FREQUENCY       (7000000)
 
 #if (RT_CONSOLE_DEVICE == EFM_USART0)
-#define CONSOLE_DEVICE 				RT_USART0_NAME
+#define CONSOLE_DEVICE              RT_USART0_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_USART1)
-#define CONSOLE_DEVICE 				RT_USART1_NAME
+#define CONSOLE_DEVICE              RT_USART1_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_USART2)
-#define CONSOLE_DEVICE 				RT_USART2_NAME
+#define CONSOLE_DEVICE              RT_USART2_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_UART0)
-#define CONSOLE_DEVICE 				RT_UART0_NAME
+#define CONSOLE_DEVICE              RT_UART0_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_UART1)
-#define CONSOLE_DEVICE 				RT_UART1_NAME
+#define CONSOLE_DEVICE              RT_UART1_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_LEUART0)
-#define CONSOLE_DEVICE 				RT_LEUART0_NAME
+#define CONSOLE_DEVICE              RT_LEUART0_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_LEUART1)
-#define CONSOLE_DEVICE 				RT_LEUART1_NAME
+#define CONSOLE_DEVICE              RT_LEUART1_NAME
 #else
-#define CONSOLE_DEVICE 				"NONE"
+#define CONSOLE_DEVICE              "NONE"
 #endif
 
 
 /* The following defines should be consistent with those in diskio.h */
-#define CTRL_SYNC						0
-#define GET_SECTOR_COUNT				1
-#define GET_SECTOR_SIZE					2
-#define GET_BLOCK_SIZE					3
-#define MMC_GET_TYPE					10
-#define MMC_GET_CSD						11
-#define MMC_GET_CID						12
-#define MMC_GET_OCR						13
-#define MMC_GET_SDSTAT					14
+#define CTRL_SYNC                       0
+#define GET_SECTOR_COUNT                1
+#define GET_SECTOR_SIZE                 2
+#define GET_BLOCK_SIZE                  3
+#define MMC_GET_TYPE                    10
+#define MMC_GET_CSD                     11
+#define MMC_GET_CID                     12
+#define MMC_GET_OCR                     13
+#define MMC_GET_SDSTAT                  14
 /* The above defines should be consistent with those in diskio.h */
 
 /* I/O control options */
-#define RT_DEVICE_CTRL_SD_SYNC 			CTRL_SYNC
-#define RT_DEVICE_CTRL_SD_GET_SCOUNT 	GET_SECTOR_COUNT
-#define RT_DEVICE_CTRL_SD_GET_SSIZE		GET_SECTOR_SIZE
-#define RT_DEVICE_CTRL_SD_GET_BSIZE 	GET_BLOCK_SIZE
-#define RT_DEVICE_CTRL_SD_GET_TYPE 		MMC_GET_TYPE
-#define RT_DEVICE_CTRL_SD_GET_CSD		MMC_GET_CSD
-#define RT_DEVICE_CTRL_SD_GET_CID 		MMC_GET_CID
-#define RT_DEVICE_CTRL_SD_GET_OCR 		MMC_GET_OCR
-#define RT_DEVICE_CTRL_SD_GET_SDSTAT	MMC_GET_SDSTAT
+#define RT_DEVICE_CTRL_SD_SYNC          CTRL_SYNC
+#define RT_DEVICE_CTRL_SD_GET_SCOUNT    GET_SECTOR_COUNT
+#define RT_DEVICE_CTRL_SD_GET_SSIZE     GET_SECTOR_SIZE
+#define RT_DEVICE_CTRL_SD_GET_BSIZE     GET_BLOCK_SIZE
+#define RT_DEVICE_CTRL_SD_GET_TYPE      MMC_GET_TYPE
+#define RT_DEVICE_CTRL_SD_GET_CSD       MMC_GET_CSD
+#define RT_DEVICE_CTRL_SD_GET_CID       MMC_GET_CID
+#define RT_DEVICE_CTRL_SD_GET_OCR       MMC_GET_OCR
+#define RT_DEVICE_CTRL_SD_GET_SDSTAT    MMC_GET_SDSTAT
 
 /*! fixme: move the following define to Rtdef.h */
-#define RT_DEVICE_CTRL_USART_RBUFFER	(0xF1)		/*!< set USART/UART rx buffer */
-#define RT_DEVICE_CTRL_LEUART_RBUFFER	(0xF2)		/*!< set LEUART rx buffer */
-#define RT_DEVICE_CTRL_IIC_SETTING		(0xF3)		/*!< change IIC setting */
-#define RT_DEVICE_CTRL_TIMER_PERIOD		(0xF4)		/*!< set Timer timeout period */
-#define RT_DEVICE_CTRL_ADC_MODE			(0xF5)		/*!< change ADC mode */
-#define RT_DEVICE_CTRL_ADC_RESULT		(0xF6)		/*!< get ADC result */
-#define RT_DEVICE_CTRL_ACMP_INIT		(0xF7)		/*!< Initialize ACMP */
-#define RT_DEVICE_CTRL_ACMP_OUTPUT		(0xF8)		/*!< get ACMP output */
+#define RT_DEVICE_CTRL_USART_RBUFFER    (0xF1)      /*!< set USART/UART rx buffer */
+#define RT_DEVICE_CTRL_LEUART_RBUFFER   (0xF2)      /*!< set LEUART rx buffer */
+#define RT_DEVICE_CTRL_IIC_SETTING      (0xF3)      /*!< change IIC setting */
+#define RT_DEVICE_CTRL_TIMER_PERIOD     (0xF4)      /*!< set Timer timeout period */
+#define RT_DEVICE_CTRL_ADC_MODE         (0xF5)      /*!< change ADC mode */
+#define RT_DEVICE_CTRL_ADC_RESULT       (0xF6)      /*!< get ADC result */
+#define RT_DEVICE_CTRL_ACMP_INIT        (0xF7)      /*!< Initialize ACMP */
+#define RT_DEVICE_CTRL_ACMP_OUTPUT      (0xF8)      /*!< get ACMP output */
 
 /* Exported functions ------------------------------------------------------- */
 void rt_hw_board_init(void);
diff --git a/bsp/efm32/dev_accel.c b/bsp/efm32/dev_accel.c
index fb2c05174b..07fcc25ded 100644
--- a/bsp/efm32/dev_accel.c
+++ b/bsp/efm32/dev_accel.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_accel.c
- * @brief 	Accelerometer driver of RT-Thread RTOS for EFM32
+ * @file    dev_accel.c
+ * @brief   Accelerometer driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,10 +10,10 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-07-13	onelife		Initial creation for using EFM32 ADC module to
+ * Date         Author      Notes
+ * 2011-07-13   onelife     Initial creation for using EFM32 ADC module to
  *  interface the Freescale MMA7361L
- * 2011-08-02	onelife		Add digital interface support of using EFM32 IIC
+ * 2011-08-02   onelife     Add digital interface support of using EFM32 IIC
  *  module for the Freescale MMA7455L
  ******************************************************************************/
 
@@ -38,23 +38,23 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef EFM32_ACCEL_DEBUG
-#define accel_debug(format,args...) 		rt_kprintf(format, ##args)
+#define accel_debug(format,args...)         rt_kprintf(format, ##args)
 #else
 #define accel_debug(format,args...)
 #endif
 
 /* Private constants ---------------------------------------------------------*/
-static rt_device_t 						accel;
+static rt_device_t                      accel;
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-static struct efm32_adc_control_t 		control = \
-	{ADC_MODE_SCAN, {3, ACCEL_USING_DMA}, {}};
-static struct efm32_accel_result_t 		accelOffset = {0};
+static struct efm32_adc_control_t       control = \
+    {ADC_MODE_SCAN, {3, ACCEL_USING_DMA}, {}};
+static struct efm32_accel_result_t      accelOffset = {0};
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-static const struct efm32_iic_control_t	control = \
-	{IIC_STATE_MASTER, 0x0000};
+static const struct efm32_iic_control_t control = \
+    {IIC_STATE_MASTER, 0x0000};
 #endif
-static rt_bool_t 						accelInTime = true;
-static rt_uint32_t 						accelConfig = 0;
+static rt_bool_t                        accelInTime = true;
+static rt_uint32_t                      accelConfig = 0;
 
 /* Private variables ---------------------------------------------------------*/
 /* Private function prototypes -----------------------------------------------*/
@@ -68,99 +68,99 @@ static rt_uint32_t 						accelConfig = 0;
  * @note
  *
  * @param[out] data
- *	Pointer to output buffer
+ *  Pointer to output buffer
  *
  * @param[in] lowResolution
- *	Resolution selection
+ *  Resolution selection
  *
  * @return
- *	 Error code
+ *   Error code
  ******************************************************************************/
 rt_err_t efm_accel_get_data(struct efm32_accel_result_t *data,
-	rt_bool_t lowResolution)
+    rt_bool_t lowResolution)
 {
-	RT_ASSERT(accel != RT_NULL);
+    RT_ASSERT(accel != RT_NULL);
 
-	rt_err_t ret;
+    rt_err_t ret;
 
-	if (data == RT_NULL)
-	{
-		return -RT_ERROR;
-	}
+    if (data == RT_NULL)
+    {
+        return -RT_ERROR;
+    }
 
-	ret = RT_EOK;
-	do
-	{
-		/* --------- ADC interface --------- */
+    ret = RT_EOK;
+    do
+    {
+        /* --------- ADC interface --------- */
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-		struct efm32_adc_result_t result;
+        struct efm32_adc_result_t result;
 
-		result.mode = control.mode;
-		result.buffer = (void *)data;
-		if ((ret = accel->control(accel, RT_DEVICE_CTRL_RESUME,
-			(void *)&result)) != RT_EOK)
-		{
-			break;
-		}
-		if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_RESULT, \
-			(void *)&result)) != RT_EOK)
-		{
-			break;
-		}
+        result.mode = control.mode;
+        result.buffer = (void *)data;
+        if ((ret = accel->control(accel, RT_DEVICE_CTRL_RESUME,
+            (void *)&result)) != RT_EOK)
+        {
+            break;
+        }
+        if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_RESULT, \
+            (void *)&result)) != RT_EOK)
+        {
+            break;
+        }
 
-		data->x += accelOffset.x - 0x800;
-		data->y += accelOffset.y - 0x800;
-		data->z += accelOffset.z - 0x800;
-		if (lowResolution)
-		{
-			data->x >>= 4;
-			data->y >>= 4;
-			data->z >>= 4;
-		}
+        data->x += accelOffset.x - 0x800;
+        data->y += accelOffset.y - 0x800;
+        data->z += accelOffset.z - 0x800;
+        if (lowResolution)
+        {
+            data->x >>= 4;
+            data->y >>= 4;
+            data->z >>= 4;
+        }
 
-		/* --------- IIC interface --------- */
+        /* --------- IIC interface --------- */
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-		if (lowResolution || \
-			((accelConfig & ACCEL_MASK_RANGE) != MCTL_RANGE_8G))
-		{
-			rt_int8_t buf[3];
+        if (lowResolution || \
+            ((accelConfig & ACCEL_MASK_RANGE) != MCTL_RANGE_8G))
+        {
+            rt_int8_t buf[3];
 
-			buf[0] = XOUT8;
-			if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \
-				sizeof(buf)) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			data->x = buf[0];
-			data->y = buf[1];
-			data->z = buf[2];
-		}
-		else
-		{
-			rt_uint8_t buf[6];
-			rt_uint16_t *temp = (rt_uint16_t *)&buf;
+            buf[0] = XOUT8;
+            if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \
+                sizeof(buf)) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            data->x = buf[0];
+            data->y = buf[1];
+            data->z = buf[2];
+        }
+        else
+        {
+            rt_uint8_t buf[6];
+            rt_uint16_t *temp = (rt_uint16_t *)&buf;
 
-			buf[0] = XOUTL;
-			if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \
-				sizeof(buf)) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			data->x = (*temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
-				((rt_uint32_t)*temp & 0x3FF);
-			data->y = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
-				((rt_uint32_t)*temp & 0x3FF);
-			data->z = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
-				((rt_uint32_t)*temp & 0x3FF);
-		}
+            buf[0] = XOUTL;
+            if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \
+                sizeof(buf)) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            data->x = (*temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
+                ((rt_uint32_t)*temp & 0x3FF);
+            data->y = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
+                ((rt_uint32_t)*temp & 0x3FF);
+            data->z = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
+                ((rt_uint32_t)*temp & 0x3FF);
+        }
 #endif
-		return RT_EOK;
-	} while (0);
+        return RT_EOK;
+    } while (0);
 
-	accel_debug("Accel err: Get data failed!\n");
-	return ret;
+    accel_debug("Accel err: Get data failed!\n");
+    return ret;
 }
 
 /***************************************************************************//**
@@ -172,357 +172,357 @@ rt_err_t efm_accel_get_data(struct efm32_accel_result_t *data,
  * @note
  *
  * @param[in] parameter
- *	Parameter
+ *  Parameter
  ******************************************************************************/
 static void efm_accel_timer(void* parameter)
 {
-	accelInTime = false;
+    accelInTime = false;
 }
 
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
 /***************************************************************************//**
  * @brief
- *	Accelerometer level and pulse detection interrupts handler
+ *  Accelerometer level and pulse detection interrupts handler
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  ******************************************************************************/
 static void efm_accel_isr(rt_device_t device)
 {
-	rt_uint8_t buf[2];
+    rt_uint8_t buf[2];
 
-	if ((accelConfig & ACCEL_MASK_MODE) != ACCEL_MODE_MEASUREMENT)
-	{
-		/* Read detection source */
-		buf[0] = DETSRC;
-		if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1)
-		{
-			accel_debug("Accel: read error\n");
-			return;
-		}
-		accel_debug("Accel: DETSRC %x\n", buf[0]);
+    if ((accelConfig & ACCEL_MASK_MODE) != ACCEL_MODE_MEASUREMENT)
+    {
+        /* Read detection source */
+        buf[0] = DETSRC;
+        if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1)
+        {
+            accel_debug("Accel: read error\n");
+            return;
+        }
+        accel_debug("Accel: DETSRC %x\n", buf[0]);
 
-		/* Reset the interrupt flags: Part 1 */
-		buf[0] = INTRST;
-		buf[1] = INTRST_INT_1 | INTRST_INT_2;
-		accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2);
+        /* Reset the interrupt flags: Part 1 */
+        buf[0] = INTRST;
+        buf[1] = INTRST_INT_1 | INTRST_INT_2;
+        accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2);
 
-		/* Read status to waste some time */
-		buf[0] = STATUS;
-		if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1)
-		{
-			accel_debug("Accel: read error\n");
-			return;
-		}
-		accel_debug("Accel: STATUS %x\n", buf[0]);
+        /* Read status to waste some time */
+        buf[0] = STATUS;
+        if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1)
+        {
+            accel_debug("Accel: read error\n");
+            return;
+        }
+        accel_debug("Accel: STATUS %x\n", buf[0]);
 
-		/* Reset the interrupt flags: Part 2 */
-		buf[0] = INTRST;
-		buf[1] = 0x00;
-		accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2);
-	}
+        /* Reset the interrupt flags: Part 2 */
+        buf[0] = INTRST;
+        buf[1] = 0x00;
+        accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2);
+    }
 }
 
 /***************************************************************************//**
  * @brief
- *	Accelerometer configuration function
+ *  Accelerometer configuration function
  *
  * @details
  *
  * @note
  *
  * @param[in] config
- *	Configuration options
+ *  Configuration options
  *
  * @param[in] level_threshold
- *	Level detection threshold
+ *  Level detection threshold
  *
  * @param[in] pulse_threshold
- *	Pulse detection threshold
+ *  Pulse detection threshold
  *
  * @param[in] pulse_duration
- *	Time window for 1st pulse
+ *  Time window for 1st pulse
  *
  * @param[in] pulse_latency
- *	Pulse latency Time
+ *  Pulse latency Time
  *
  * @param[in] pulse_duration2
- *	Time window for 2nd pulse
+ *  Time window for 2nd pulse
  *
  * @return
- *	 Error code
+ *   Error code
  ******************************************************************************/
 rt_err_t efm_accel_config(rt_uint32_t config,
-	rt_uint8_t level_threshold,
-	rt_uint8_t pulse_threshold,
-	rt_uint8_t pulse_duration,
-	rt_uint8_t pulse_latency,
-	rt_uint8_t pulse_duration2)
+    rt_uint8_t level_threshold,
+    rt_uint8_t pulse_threshold,
+    rt_uint8_t pulse_duration,
+    rt_uint8_t pulse_latency,
+    rt_uint8_t pulse_duration2)
 {
-	rt_err_t ret;
-	rt_uint8_t buf[2];
-	rt_uint8_t mode, mctl_reg, ctl1_reg, ctl2_reg;
+    rt_err_t ret;
+    rt_uint8_t buf[2];
+    rt_uint8_t mode, mctl_reg, ctl1_reg, ctl2_reg;
 
-	ret = RT_EOK;
-	mctl_reg = 0;
-	ctl1_reg = 0;
-	ctl2_reg = 0;
+    ret = RT_EOK;
+    mctl_reg = 0;
+    ctl1_reg = 0;
+    ctl2_reg = 0;
 
-	/* Modify MCTL */
-	mode = config & ACCEL_MASK_MODE;
-	switch (mode)
-	{
-	case ACCEL_MODE_STANDBY:
-		mctl_reg |= MCTL_MODE_STANDBY;
-		break;
-	case ACCEL_MODE_MEASUREMENT:
-		mctl_reg |= MCTL_MODE_MEASUREMENT;
-		break;
-	case ACCEL_MODE_LEVEL:
-		mctl_reg |= MCTL_MODE_LEVEL;
-		break;
-	case ACCEL_MODE_PULSE:
-		mctl_reg |= MCTL_MODE_PULSE;
-		break;
-	default:
-		return -RT_ERROR;
-	}
+    /* Modify MCTL */
+    mode = config & ACCEL_MASK_MODE;
+    switch (mode)
+    {
+    case ACCEL_MODE_STANDBY:
+        mctl_reg |= MCTL_MODE_STANDBY;
+        break;
+    case ACCEL_MODE_MEASUREMENT:
+        mctl_reg |= MCTL_MODE_MEASUREMENT;
+        break;
+    case ACCEL_MODE_LEVEL:
+        mctl_reg |= MCTL_MODE_LEVEL;
+        break;
+    case ACCEL_MODE_PULSE:
+        mctl_reg |= MCTL_MODE_PULSE;
+        break;
+    default:
+        return -RT_ERROR;
+    }
 
-	switch (config & ACCEL_MASK_RANGE)
-	{
-	case ACCEL_RANGE_8G:
-		mctl_reg |= MCTL_RANGE_8G;
-		break;
-	case ACCEL_RANGE_4G:
-		mctl_reg |= MCTL_RANGE_4G;
-		break;
-	case ACCEL_RANGE_2G:
-		mctl_reg |= MCTL_RANGE_2G;
-		break;
-	default:
-		return -RT_ERROR;
-	}
+    switch (config & ACCEL_MASK_RANGE)
+    {
+    case ACCEL_RANGE_8G:
+        mctl_reg |= MCTL_RANGE_8G;
+        break;
+    case ACCEL_RANGE_4G:
+        mctl_reg |= MCTL_RANGE_4G;
+        break;
+    case ACCEL_RANGE_2G:
+        mctl_reg |= MCTL_RANGE_2G;
+        break;
+    default:
+        return -RT_ERROR;
+    }
 
-	if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE))
-	{
-		mctl_reg |= MCTL_PIN_INT1;
-	}
+    if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE))
+    {
+        mctl_reg |= MCTL_PIN_INT1;
+    }
 
-	/* Modify CTL1 */
-	if (config & ACCEL_INTPIN_INVERSE)
-	{
-		ctl1_reg |= CTL1_INTPIN_INVERSE;
-	}
+    /* Modify CTL1 */
+    if (config & ACCEL_INTPIN_INVERSE)
+    {
+        ctl1_reg |= CTL1_INTPIN_INVERSE;
+    }
 
-	switch (config & ACCEL_MASK_INT)
-	{
-	case ACCEL_INT_LEVEL_PULSE:
-		ctl1_reg |= CTL1_INT_LEVEL_PULSE;
-		break;
-	case ACCEL_INT_PULSE_LEVEL:
-		ctl1_reg |= CTL1_INT_PULSE_LEVEL;
-		break;
-	case ACCEL_INT_SINGLE_DOUBLE:
-		ctl1_reg |= CTL1_INT_SINGLE_DOUBLE;
-		break;
-	default:
-		break;
-	}
+    switch (config & ACCEL_MASK_INT)
+    {
+    case ACCEL_INT_LEVEL_PULSE:
+        ctl1_reg |= CTL1_INT_LEVEL_PULSE;
+        break;
+    case ACCEL_INT_PULSE_LEVEL:
+        ctl1_reg |= CTL1_INT_PULSE_LEVEL;
+        break;
+    case ACCEL_INT_SINGLE_DOUBLE:
+        ctl1_reg |= CTL1_INT_SINGLE_DOUBLE;
+        break;
+    default:
+        break;
+    }
 
-	switch (config & ACCEL_MASK_DISABLE)
-	{
-	case ACCEL_DISABLE_X:
-		ctl1_reg |= CTL1_X_DISABLE;
-		break;
-	case ACCEL_DISABLE_Y:
-		ctl1_reg |= CTL1_Y_DISABLE;
-		break;
-	case ACCEL_DISABLE_Z:
-		ctl1_reg |= CTL1_Z_DISABLE;
-		break;
-	default:
-		break;
-	}
+    switch (config & ACCEL_MASK_DISABLE)
+    {
+    case ACCEL_DISABLE_X:
+        ctl1_reg |= CTL1_X_DISABLE;
+        break;
+    case ACCEL_DISABLE_Y:
+        ctl1_reg |= CTL1_Y_DISABLE;
+        break;
+    case ACCEL_DISABLE_Z:
+        ctl1_reg |= CTL1_Z_DISABLE;
+        break;
+    default:
+        break;
+    }
 
-	if (config & ACCEL_THRESHOLD_INTEGER)
-	{
-		ctl1_reg |= CTL1_THRESHOLD_INTEGER;
-	}
+    if (config & ACCEL_THRESHOLD_INTEGER)
+    {
+        ctl1_reg |= CTL1_THRESHOLD_INTEGER;
+    }
 
-	if (config & ACCEL_BANDWIDTH_125HZ)
-	{
-		ctl1_reg |= CTL1_BANDWIDTH_125HZ;
-	}
+    if (config & ACCEL_BANDWIDTH_125HZ)
+    {
+        ctl1_reg |= CTL1_BANDWIDTH_125HZ;
+    }
 
-	/* Modify CTL2 */
-	if (config & ACCEL_LEVEL_AND)
-	{
-		ctl2_reg |= CTL2_LEVEL_AND;
-	}
-	if (config & ACCEL_PULSE_AND)
-	{
-		ctl2_reg |= CTL2_PULSE_AND;
-	}
-	if (config & ACCEL_DRIVE_STRONG)
-	{
-		ctl2_reg |= CTL2_DRIVE_STRONG;
-	}
+    /* Modify CTL2 */
+    if (config & ACCEL_LEVEL_AND)
+    {
+        ctl2_reg |= CTL2_LEVEL_AND;
+    }
+    if (config & ACCEL_PULSE_AND)
+    {
+        ctl2_reg |= CTL2_PULSE_AND;
+    }
+    if (config & ACCEL_DRIVE_STRONG)
+    {
+        ctl2_reg |= CTL2_DRIVE_STRONG;
+    }
 
-	do
-	{
-		/* Write registers */
-		buf[0] = MCTL;
-		buf[1] = mctl_reg;
-		if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-		{
-			ret = -RT_ERROR;
-			break;
-		}
-		accel_debug("Accel: MCTL %x\n", mctl_reg);
+    do
+    {
+        /* Write registers */
+        buf[0] = MCTL;
+        buf[1] = mctl_reg;
+        if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+        {
+            ret = -RT_ERROR;
+            break;
+        }
+        accel_debug("Accel: MCTL %x\n", mctl_reg);
 
-		buf[0] = CTL1;
-		buf[1] = ctl1_reg;
-		if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-		{
-			ret = -RT_ERROR;
-			break;
-		}
-		accel_debug("Accel: CTL1 %x\n", ctl1_reg);
+        buf[0] = CTL1;
+        buf[1] = ctl1_reg;
+        if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+        {
+            ret = -RT_ERROR;
+            break;
+        }
+        accel_debug("Accel: CTL1 %x\n", ctl1_reg);
 
-		buf[0] = CTL2;
-		buf[1] = ctl2_reg;
-		if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-		{
-			ret = -RT_ERROR;
-			break;
-		}
-		accel_debug("Accel: CTL2 %x\n", ctl2_reg);
-		accelConfig = config;
+        buf[0] = CTL2;
+        buf[1] = ctl2_reg;
+        if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+        {
+            ret = -RT_ERROR;
+            break;
+        }
+        accel_debug("Accel: CTL2 %x\n", ctl2_reg);
+        accelConfig = config;
 
-		if (mode == ACCEL_MODE_PULSE)
-		{
-			buf[0] = PDTH;
-			buf[1] = pulse_threshold;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			accel_debug("Accel: PDTH %x\n", buf[1]);
+        if (mode == ACCEL_MODE_PULSE)
+        {
+            buf[0] = PDTH;
+            buf[1] = pulse_threshold;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            accel_debug("Accel: PDTH %x\n", buf[1]);
 
-			buf[0] = PW;
-			buf[1] = pulse_duration;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			accel_debug("Accel: PW %x\n", buf[1]);
+            buf[0] = PW;
+            buf[1] = pulse_duration;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            accel_debug("Accel: PW %x\n", buf[1]);
 
-			buf[0] = LT;
-			buf[1] = pulse_latency;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			accel_debug("Accel: LT %x\n", buf[1]);
+            buf[0] = LT;
+            buf[1] = pulse_latency;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            accel_debug("Accel: LT %x\n", buf[1]);
 
-			buf[0] = TW;
-			buf[1] = pulse_duration2;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			accel_debug("Accel: TW %x\n", buf[1]);
-		}
+            buf[0] = TW;
+            buf[1] = pulse_duration2;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            accel_debug("Accel: TW %x\n", buf[1]);
+        }
 
-		if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE))
-		{
-			efm32_irq_hook_init_t hook;
+        if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE))
+        {
+            efm32_irq_hook_init_t hook;
 
-			/* Reset the interrupt flags: Part 1 */
-			buf[0] = INTRST;
-			buf[1] = INTRST_INT_1 | INTRST_INT_2;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
+            /* Reset the interrupt flags: Part 1 */
+            buf[0] = INTRST;
+            buf[1] = INTRST_INT_1 | INTRST_INT_2;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
 
-			/* Set level detection threshold */
-			buf[0] = LDTH;
-			if (config & ACCEL_THRESHOLD_INTEGER)
-			{
-				buf[1] = level_threshold;
-			}
-			else
-			{
-				buf[1] = level_threshold & 0x7f;
-			}
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			accel_debug("Accel: LDTH %x\n", buf[1]);
+            /* Set level detection threshold */
+            buf[0] = LDTH;
+            if (config & ACCEL_THRESHOLD_INTEGER)
+            {
+                buf[1] = level_threshold;
+            }
+            else
+            {
+                buf[1] = level_threshold & 0x7f;
+            }
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            accel_debug("Accel: LDTH %x\n", buf[1]);
 
-			/* Config interrupt */
-			hook.type		= efm32_irq_type_gpio;
-			hook.unit		= ACCEL_INT1_PIN;
-			hook.cbFunc 	= efm_accel_isr;
-			hook.userPtr	= RT_NULL;
-			efm32_irq_hook_register(&hook);
-			hook.unit		= ACCEL_INT2_PIN;
-			efm32_irq_hook_register(&hook);
-			/* Clear pending interrupt */
-			BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT1_PIN, 0x1UL);
-			BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT2_PIN, 0x1UL);
-			/* Set raising edge interrupt and clear/enable it */
-			GPIO_IntConfig(
-				ACCEL_INT1_PORT,
-				ACCEL_INT1_PIN,
-				true,
-				false,
-				true);
-			GPIO_IntConfig(
-				ACCEL_INT2_PORT,
-				ACCEL_INT2_PIN,
-				true,
-				false,
-				true);
-			if (((rt_uint8_t)ACCEL_INT1_PORT % 2) || \
-				((rt_uint8_t)ACCEL_INT2_PORT % 2))
-			{
-				NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
-				NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT);
-				NVIC_EnableIRQ(GPIO_ODD_IRQn);
-			}
-			if (!((rt_uint8_t)ACCEL_INT1_PORT % 2) || \
-				!((rt_uint8_t)ACCEL_INT2_PORT % 2))
-			{
-				NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn);
-				NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT);
-				NVIC_EnableIRQ(GPIO_EVEN_IRQn);
-			}
+            /* Config interrupt */
+            hook.type       = efm32_irq_type_gpio;
+            hook.unit       = ACCEL_INT1_PIN;
+            hook.cbFunc     = efm_accel_isr;
+            hook.userPtr    = RT_NULL;
+            efm32_irq_hook_register(&hook);
+            hook.unit       = ACCEL_INT2_PIN;
+            efm32_irq_hook_register(&hook);
+            /* Clear pending interrupt */
+            BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT1_PIN, 0x1UL);
+            BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT2_PIN, 0x1UL);
+            /* Set raising edge interrupt and clear/enable it */
+            GPIO_IntConfig(
+                ACCEL_INT1_PORT,
+                ACCEL_INT1_PIN,
+                true,
+                false,
+                true);
+            GPIO_IntConfig(
+                ACCEL_INT2_PORT,
+                ACCEL_INT2_PIN,
+                true,
+                false,
+                true);
+            if (((rt_uint8_t)ACCEL_INT1_PORT % 2) || \
+                ((rt_uint8_t)ACCEL_INT2_PORT % 2))
+            {
+                NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
+                NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT);
+                NVIC_EnableIRQ(GPIO_ODD_IRQn);
+            }
+            if (!((rt_uint8_t)ACCEL_INT1_PORT % 2) || \
+                !((rt_uint8_t)ACCEL_INT2_PORT % 2))
+            {
+                NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn);
+                NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT);
+                NVIC_EnableIRQ(GPIO_EVEN_IRQn);
+            }
 
-			/* Reset the interrupt flags: Part 2 */
-			buf[0] = INTRST;
-			buf[1] = 0x00;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-		}
-	} while (0);
+            /* Reset the interrupt flags: Part 2 */
+            buf[0] = INTRST;
+            buf[1] = 0x00;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+        }
+    } while (0);
 
-	return ret;
+    return ret;
 }
 
 #endif
@@ -536,203 +536,203 @@ rt_err_t efm_accel_config(rt_uint32_t config,
  * @note
  *
  * @param[in] mode
- *	0, simple mode (assuming the device is placed on flat surface)
- *	1, interaction method
+ *  0, simple mode (assuming the device is placed on flat surface)
+ *  1, interaction method
  *
  * @param[in] period
- *	Time period to perform auto-zero calibration
+ *  Time period to perform auto-zero calibration
  *
  * @return
- *	 Error code
+ *   Error code
  ******************************************************************************/
 rt_err_t efm_accel_auto_zero(rt_uint8_t mode, rt_tick_t period)
 {
-	RT_ASSERT(accel != RT_NULL);
+    RT_ASSERT(accel != RT_NULL);
 
-	rt_timer_t calTimer;
-	struct efm32_accel_result_t min = {0, 0, 0};
-	struct efm32_accel_result_t max = {0, 0, 0};
-	struct efm32_accel_result_t temp, sum;
-	rt_int32_t simpleOffset[] = ACCEL_CAL_1G_VALUE;
-	rt_uint8_t cmd[7] = {0};
-	rt_uint8_t i, j;
+    rt_timer_t calTimer;
+    struct efm32_accel_result_t min = {0, 0, 0};
+    struct efm32_accel_result_t max = {0, 0, 0};
+    struct efm32_accel_result_t temp, sum;
+    rt_int32_t simpleOffset[] = ACCEL_CAL_1G_VALUE;
+    rt_uint8_t cmd[7] = {0};
+    rt_uint8_t i, j;
 
-	/* Reset offset */
+    /* Reset offset */
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-	accelOffset.x = 0;
-	accelOffset.y = 0;
-	accelOffset.z = 0;
+    accelOffset.x = 0;
+    accelOffset.y = 0;
+    accelOffset.z = 0;
 
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-	cmd[0] = XOFFL;
-	if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
-	{
-		return -RT_ERROR;
-	}
+    cmd[0] = XOFFL;
+    if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
+    {
+        return -RT_ERROR;
+    }
 #endif
 
-	if (mode == ACCEL_CAL_SIMPLE)
-	{
-		/* Simple mode */
-		for (j = 0; j < ACCEL_CAL_ROUND; j++)
-		{
-			sum.x = 0x0;
-			sum.y = 0x0;
-			sum.z = 0x0;
+    if (mode == ACCEL_CAL_SIMPLE)
+    {
+        /* Simple mode */
+        for (j = 0; j < ACCEL_CAL_ROUND; j++)
+        {
+            sum.x = 0x0;
+            sum.y = 0x0;
+            sum.z = 0x0;
 
-			for (i = 0; i < ACCEL_CAL_SAMPLES; i++)
-			{
+            for (i = 0; i < ACCEL_CAL_SAMPLES; i++)
+            {
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-				/* Waiting for data ready */
-				while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN));
+                /* Waiting for data ready */
+                while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN));
 #endif
-				if (efm_accel_get_data(&temp, false) != RT_EOK)
-				{
-					return -RT_ERROR;
-				}
-				sum.x += temp.x;
-				sum.y += temp.y;
-				sum.z += temp.z;
-			}
+                if (efm_accel_get_data(&temp, false) != RT_EOK)
+                {
+                    return -RT_ERROR;
+                }
+                sum.x += temp.x;
+                sum.y += temp.y;
+                sum.z += temp.z;
+            }
 
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-			temp.x = sum.x / ACCEL_CAL_SAMPLES;
-			temp.y = sum.y / ACCEL_CAL_SAMPLES;
-			temp.z = sum.z / ACCEL_CAL_SAMPLES - simpleOffset[ACCEL_G_SELECT];
-			if ((temp.x == 0) && (temp.y == 0) && \
-				(temp.z == 0))
-			{
-				accel_debug("Accel: Offset %+d %+d %+d\n",
-					accelOffset.x, accelOffset.y, accelOffset.z);
-				break;
-			}
-			accelOffset.x -= temp.x;
-			accelOffset.y -= temp.y;
-			accelOffset.z -= temp.z;
+            temp.x = sum.x / ACCEL_CAL_SAMPLES;
+            temp.y = sum.y / ACCEL_CAL_SAMPLES;
+            temp.z = sum.z / ACCEL_CAL_SAMPLES - simpleOffset[ACCEL_G_SELECT];
+            if ((temp.x == 0) && (temp.y == 0) && \
+                (temp.z == 0))
+            {
+                accel_debug("Accel: Offset %+d %+d %+d\n",
+                    accelOffset.x, accelOffset.y, accelOffset.z);
+                break;
+            }
+            accelOffset.x -= temp.x;
+            accelOffset.y -= temp.y;
+            accelOffset.z -= temp.z;
 
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-			temp.x = sum.x / (ACCEL_CAL_SAMPLES >> 1);
-			temp.y = sum.y / (ACCEL_CAL_SAMPLES >> 1);
-			temp.z = sum.z / (ACCEL_CAL_SAMPLES >> 1) \
-				- (simpleOffset[ACCEL_G_SELECT] << 1);
-			if ((temp.x == 0) && (temp.y == 0) && \
-				(temp.z == 0))
-			{
-				break;
-			}
+            temp.x = sum.x / (ACCEL_CAL_SAMPLES >> 1);
+            temp.y = sum.y / (ACCEL_CAL_SAMPLES >> 1);
+            temp.z = sum.z / (ACCEL_CAL_SAMPLES >> 1) \
+                - (simpleOffset[ACCEL_G_SELECT] << 1);
+            if ((temp.x == 0) && (temp.y == 0) && \
+                (temp.z == 0))
+            {
+                break;
+            }
 
-			/* Set offset drift registers */
-			max.x -= temp.x;
-			max.y -= temp.y;
-			max.z -= temp.z;
-			*(rt_int16_t *)&cmd[1] = (rt_int16_t)max.x;
-			*(rt_int16_t *)&cmd[3] = (rt_int16_t)max.y;
-			*(rt_int16_t *)&cmd[5] = (rt_int16_t)max.z;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
-			{
-				return -RT_ERROR;
-			}
-			accel_debug("Accel: Offset %+d %+d %+d\n", *(rt_int16_t *)&cmd[1], \
-				*(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]);
+            /* Set offset drift registers */
+            max.x -= temp.x;
+            max.y -= temp.y;
+            max.z -= temp.z;
+            *(rt_int16_t *)&cmd[1] = (rt_int16_t)max.x;
+            *(rt_int16_t *)&cmd[3] = (rt_int16_t)max.y;
+            *(rt_int16_t *)&cmd[5] = (rt_int16_t)max.z;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
+            {
+                return -RT_ERROR;
+            }
+            accel_debug("Accel: Offset %+d %+d %+d\n", *(rt_int16_t *)&cmd[1], \
+                *(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]);
 #endif
-			rt_thread_sleep(1);
-		}
-	}
-	else
-	{
-		/* Interact mode */
-		if ((calTimer = rt_timer_create(
-			"cal_tmr",
-			efm_accel_timer,
-			RT_NULL,
-			period,
-			RT_TIMER_FLAG_ONE_SHOT)) == RT_NULL)
-		{
-			accel_debug("Accel err: Create timer failed!\n");
-			return -RT_ERROR;
-		}
+            rt_thread_sleep(1);
+        }
+    }
+    else
+    {
+        /* Interact mode */
+        if ((calTimer = rt_timer_create(
+            "cal_tmr",
+            efm_accel_timer,
+            RT_NULL,
+            period,
+            RT_TIMER_FLAG_ONE_SHOT)) == RT_NULL)
+        {
+            accel_debug("Accel err: Create timer failed!\n");
+            return -RT_ERROR;
+        }
 
-		accelInTime = true;
-		rt_timer_start(calTimer);
-		do
-		{
-			sum.x = 0x0;
-			sum.y = 0x0;
-			sum.z = 0x0;
+        accelInTime = true;
+        rt_timer_start(calTimer);
+        do
+        {
+            sum.x = 0x0;
+            sum.y = 0x0;
+            sum.z = 0x0;
 
-			for (i = 0; i < ACCEL_CAL_SAMPLES; i++)
-			{
+            for (i = 0; i < ACCEL_CAL_SAMPLES; i++)
+            {
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-				/* Waiting for data ready */
-				while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN));
+                /* Waiting for data ready */
+                while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN));
 #endif
-				if (efm_accel_get_data(&temp, false) != RT_EOK)
-				{
-					return -RT_ERROR;
-				}
-				sum.x += temp.x;
-				sum.y += temp.y;
-				sum.z += temp.z;
-			}
-			sum.x /= ACCEL_CAL_SAMPLES;
-			sum.y /= ACCEL_CAL_SAMPLES;
-			sum.z /= ACCEL_CAL_SAMPLES;
-			if (sum.x < min.x)
-			{
-				min.x = sum.x;
-			}
-			if (sum.y < min.y)
-			{
-				min.y = sum.y;
-			}
-			if (sum.z < min.z)
-			{
-				min.z = sum.z;
-			}
-			if (sum.x > max.x)
-			{
-				max.x = sum.x;
-			}
-			if (sum.y > max.y)
-			{
-				max.y = sum.y;
-			}
-			if (sum.z > max.z)
-			{
-				max.z = sum.z;
-			}
-			rt_thread_sleep(1);
-		} while (accelInTime);
+                if (efm_accel_get_data(&temp, false) != RT_EOK)
+                {
+                    return -RT_ERROR;
+                }
+                sum.x += temp.x;
+                sum.y += temp.y;
+                sum.z += temp.z;
+            }
+            sum.x /= ACCEL_CAL_SAMPLES;
+            sum.y /= ACCEL_CAL_SAMPLES;
+            sum.z /= ACCEL_CAL_SAMPLES;
+            if (sum.x < min.x)
+            {
+                min.x = sum.x;
+            }
+            if (sum.y < min.y)
+            {
+                min.y = sum.y;
+            }
+            if (sum.z < min.z)
+            {
+                min.z = sum.z;
+            }
+            if (sum.x > max.x)
+            {
+                max.x = sum.x;
+            }
+            if (sum.y > max.y)
+            {
+                max.y = sum.y;
+            }
+            if (sum.z > max.z)
+            {
+                max.z = sum.z;
+            }
+            rt_thread_sleep(1);
+        } while (accelInTime);
 
-		accel_debug("Accel: Min %+d %+d %+d, max %+d %+d %+d\n",
-			min.x, min.y, min.z, max.x, max.y, max.z);
+        accel_debug("Accel: Min %+d %+d %+d, max %+d %+d %+d\n",
+            min.x, min.y, min.z, max.x, max.y, max.z);
 
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-		accelOffset.x = -((min.x + max.x) >> 1);
-		accelOffset.y = -((min.y + max.y) >> 1);
-		accelOffset.z = -((min.z + max.z) >> 1);
+        accelOffset.x = -((min.x + max.x) >> 1);
+        accelOffset.y = -((min.y + max.y) >> 1);
+        accelOffset.z = -((min.z + max.z) >> 1);
 
-	accel_debug("Accel: Offset %+d %+d %+d\n",
-		accelOffset.x, accelOffset.y, accelOffset.z);
+    accel_debug("Accel: Offset %+d %+d %+d\n",
+        accelOffset.x, accelOffset.y, accelOffset.z);
 
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-		/* Set offset drift registers */
-		*(rt_int16_t *)&cmd[1] = (rt_int16_t)-(min.x + max.x);
-		*(rt_int16_t *)&cmd[3] = (rt_int16_t)-(min.y + max.y);
-		*(rt_int16_t *)&cmd[5] = (rt_int16_t)-(min.z + max.z);
-		if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
-		{
-			return -RT_ERROR;
-		}
+        /* Set offset drift registers */
+        *(rt_int16_t *)&cmd[1] = (rt_int16_t)-(min.x + max.x);
+        *(rt_int16_t *)&cmd[3] = (rt_int16_t)-(min.y + max.y);
+        *(rt_int16_t *)&cmd[5] = (rt_int16_t)-(min.z + max.z);
+        if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
+        {
+            return -RT_ERROR;
+        }
 
-	accel_debug("Accel: Offset %+d %+d %+d\n",
-		*(rt_int16_t *)&cmd[1], *(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]);
+    accel_debug("Accel: Offset %+d %+d %+d\n",
+        *(rt_int16_t *)&cmd[1], *(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]);
 #endif
 
-		rt_timer_delete(calTimer);
-	}
+        rt_timer_delete(calTimer);
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -744,147 +744,147 @@ rt_err_t efm_accel_auto_zero(rt_uint8_t mode, rt_tick_t period)
  * @note
  *
  * @return
- *	 Error code
+ *   Error code
  ******************************************************************************/
 rt_err_t efm_accel_init(void)
 {
-	rt_err_t ret;
+    rt_err_t ret;
 
-	ret = RT_EOK;
-	do
-	{
-		/* Find ADC device */
-		accel = rt_device_find(ACCEL_USING_DEVICE_NAME);
-		if (accel == RT_NULL)
-		{
-			accel_debug("Accel err: Can't find device: %s!\n", ACCEL_USING_DEVICE_NAME);
-			ret = -RT_ERROR;
-			break;
-		}
-		accel_debug("Accel: Find device %s\n", ACCEL_USING_DEVICE_NAME);
+    ret = RT_EOK;
+    do
+    {
+        /* Find ADC device */
+        accel = rt_device_find(ACCEL_USING_DEVICE_NAME);
+        if (accel == RT_NULL)
+        {
+            accel_debug("Accel err: Can't find device: %s!\n", ACCEL_USING_DEVICE_NAME);
+            ret = -RT_ERROR;
+            break;
+        }
+        accel_debug("Accel: Find device %s\n", ACCEL_USING_DEVICE_NAME);
 
-		/* --------- ADC interface --------- */
+        /* --------- ADC interface --------- */
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-		ADC_InitScan_TypeDef scanInit = ADC_INITSCAN_DEFAULT;
+        ADC_InitScan_TypeDef scanInit = ADC_INITSCAN_DEFAULT;
 
  #if defined(EFM32_GXXX_DK)
-		/* Enable accelerometer */
-		DVK_enablePeripheral(DVK_ACCEL);
-			/* Select g-range */
+        /* Enable accelerometer */
+        DVK_enablePeripheral(DVK_ACCEL);
+            /* Select g-range */
   #if (ACCEL_G_SELECT == 0)
-		DVK_disablePeripheral(DVK_ACCEL_GSEL);
+        DVK_disablePeripheral(DVK_ACCEL_GSEL);
   #elif (ACCEL_G_SELECT == 1)
-		DVK_enablePeripheral(DVK_ACCEL_GSEL);
+        DVK_enablePeripheral(DVK_ACCEL_GSEL);
   #else
   #error "Wrong value for ACCEL_G_SELECT"
   #endif
  #endif
-		/* Init ADC for scan mode */
-		scanInit.reference = adcRefVDD;
-		scanInit.input = ACCEL_X_ADC_CH | ACCEL_Y_ADC_CH | ACCEL_Z_ADC_CH;
+        /* Init ADC for scan mode */
+        scanInit.reference = adcRefVDD;
+        scanInit.input = ACCEL_X_ADC_CH | ACCEL_Y_ADC_CH | ACCEL_Z_ADC_CH;
 
-		control.scan.init = &scanInit;
-		if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_MODE, \
-			(void *)&control)) != RT_EOK)
-		{
-			break;
-		}
+        control.scan.init = &scanInit;
+        if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_MODE, \
+            (void *)&control)) != RT_EOK)
+        {
+            break;
+        }
 
-		/* --------- IIC interface --------- */
+        /* --------- IIC interface --------- */
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-		rt_uint8_t cmd[2];
+        rt_uint8_t cmd[2];
 
-		/* Initialize */
-		if ((ret = accel->control(accel, RT_DEVICE_CTRL_IIC_SETTING, \
-			(void *)&control)) != RT_EOK)
-		{
-			break;
-		}
+        /* Initialize */
+        if ((ret = accel->control(accel, RT_DEVICE_CTRL_IIC_SETTING, \
+            (void *)&control)) != RT_EOK)
+        {
+            break;
+        }
 
-		if (efm_accel_config(
-			ACCEL_MODE_MEASUREMENT | ACCEL_RANGE_2G,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA) != RT_EOK)
-		{
-			break;
-		}
+        if (efm_accel_config(
+            ACCEL_MODE_MEASUREMENT | ACCEL_RANGE_2G,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA) != RT_EOK)
+        {
+            break;
+        }
 
-		/* Config interrupt pin1 */
-		GPIO_PinModeSet(ACCEL_INT1_PORT, ACCEL_INT1_PIN, gpioModeInput, 0);
-		/* Config interrupt pin2 */
-		GPIO_PinModeSet(ACCEL_INT2_PORT, ACCEL_INT2_PIN, gpioModeInput, 0);
+        /* Config interrupt pin1 */
+        GPIO_PinModeSet(ACCEL_INT1_PORT, ACCEL_INT1_PIN, gpioModeInput, 0);
+        /* Config interrupt pin2 */
+        GPIO_PinModeSet(ACCEL_INT2_PORT, ACCEL_INT2_PIN, gpioModeInput, 0);
 #endif
 
-		accel_debug("Accel: Init OK\n");
-		return RT_EOK;
-	} while (0);
+        accel_debug("Accel: Init OK\n");
+        return RT_EOK;
+    } while (0);
 
-	accel_debug("Accel err: Init failed!\n");
-	return -RT_ERROR;
+    accel_debug("Accel err: Init failed!\n");
+    return -RT_ERROR;
 }
 
 /*******************************************************************************
- * 	Export to FINSH
+ *  Export to FINSH
  ******************************************************************************/
 #ifdef RT_USING_FINSH
 #include 
 
 void accel_cal(rt_uint8_t mode, rt_uint32_t second)
 {
-	if (efm_accel_auto_zero(mode, RT_TICK_PER_SECOND * second) != RT_EOK)
-	{
-		rt_kprintf("Error occurred.");
-		return;
-	}
+    if (efm_accel_auto_zero(mode, RT_TICK_PER_SECOND * second) != RT_EOK)
+    {
+        rt_kprintf("Error occurred.");
+        return;
+    }
 
-	rt_kprintf("Calibration done.\n");
+    rt_kprintf("Calibration done.\n");
 }
 FINSH_FUNCTION_EXPORT(accel_cal, auto-zero calibration.)
 
 void list_accel(void)
 {
-	struct efm32_accel_result_t data;
+    struct efm32_accel_result_t data;
 
-	efm_accel_get_data(&data, false);
-	rt_kprintf("X: %d, Y: %d, Z: %d\n", data.x, data.y, data.z);
+    efm_accel_get_data(&data, false);
+    rt_kprintf("X: %d, Y: %d, Z: %d\n", data.x, data.y, data.z);
 }
 FINSH_FUNCTION_EXPORT(list_accel, list accelerometer info.)
 
 void test_accel(rt_uint8_t mode)
 {
-	if (mode == 0)
-	{
-		if (efm_accel_config(
-			ACCEL_MODE_LEVEL | ACCEL_RANGE_8G | ACCEL_INT_LEVEL_PULSE | \
-			ACCEL_SOURCE_LEVEL_X | ACCEL_SOURCE_LEVEL_Y,
-			0x1f,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA) != RT_EOK)
-		{
-			rt_kprintf("efm_accel_config(): error\n");
-			return;
-		}
-	}
-	else
-	{
-		if (efm_accel_config(
-			ACCEL_MODE_PULSE | ACCEL_RANGE_8G | ACCEL_INT_SINGLE_DOUBLE | \
-			ACCEL_SOURCE_PULSE_X | ACCEL_SOURCE_PULSE_Y,
-			0x1f,
-			0x1f,
-			200,
-			255,
-			255) != RT_EOK)
-		{
-			rt_kprintf("efm_accel_config(): error\n");
-			return;
-		}
-	}
+    if (mode == 0)
+    {
+        if (efm_accel_config(
+            ACCEL_MODE_LEVEL | ACCEL_RANGE_8G | ACCEL_INT_LEVEL_PULSE | \
+            ACCEL_SOURCE_LEVEL_X | ACCEL_SOURCE_LEVEL_Y,
+            0x1f,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA) != RT_EOK)
+        {
+            rt_kprintf("efm_accel_config(): error\n");
+            return;
+        }
+    }
+    else
+    {
+        if (efm_accel_config(
+            ACCEL_MODE_PULSE | ACCEL_RANGE_8G | ACCEL_INT_SINGLE_DOUBLE | \
+            ACCEL_SOURCE_PULSE_X | ACCEL_SOURCE_PULSE_Y,
+            0x1f,
+            0x1f,
+            200,
+            255,
+            255) != RT_EOK)
+        {
+            rt_kprintf("efm_accel_config(): error\n");
+            return;
+        }
+    }
 }
 FINSH_FUNCTION_EXPORT(test_accel, list accelerometer info.)
 #endif
diff --git a/bsp/efm32/dev_accel.h b/bsp/efm32/dev_accel.h
index 2e12d797d3..cc75631834 100644
--- a/bsp/efm32/dev_accel.h
+++ b/bsp/efm32/dev_accel.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_accel.h
- * @brief 	Accelerometer driver of RT-Thread RTOS for EFM32
+ * @file    dev_accel.h
+ * @brief   Accelerometer driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,10 +10,10 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-07-13	onelife		Initial creation for using EFM32 ADC module to
+ * Date         Author      Notes
+ * 2011-07-13   onelife     Initial creation for using EFM32 ADC module to
  *  interface the Freescale MMA7361L
- * 2011-08-02	onelife		Add digital interface support of using EFM32 IIC
+ * 2011-08-02   onelife     Add digital interface support of using EFM32 IIC
  *  module for the Freescale MMA7455L
  ******************************************************************************/
 #ifndef __DEV_ACCEL_H__
@@ -27,95 +27,95 @@
 /* Exported types ------------------------------------------------------------*/
 struct efm32_accel_result_t
 {
-	rt_int32_t 				x;
-	rt_int32_t 				y;
-	rt_int32_t 				z;
+    rt_int32_t              x;
+    rt_int32_t              y;
+    rt_int32_t              z;
 };
 
 /* Exported constants --------------------------------------------------------*/
 /* Exported macro ------------------------------------------------------------*/
-/* 	MMA7361LC
- 	g-Select 	g-Range 	Sensitivity
- 	0 			1.5 g 		800 mV/g
- 	1 			6 g 		206 mV/g
+/*  MMA7361LC
+    g-Select    g-Range     Sensitivity
+    0           1.5 g       800 mV/g
+    1           6 g         206 mV/g
 
- 	MMA7455L
- 	g-Select 	g-Range 	Sensitivity
- 	0 			2 g 		64 LSB/g
- 	1 			4 g 		32 LSB/g
-	2			8 g 		16 LSB/g
+    MMA7455L
+    g-Select    g-Range     Sensitivity
+    0           2 g         64 LSB/g
+    1           4 g         32 LSB/g
+    2           8 g         16 LSB/g
 */
-#define ACCEL_G_SELECT 			(0)
+#define ACCEL_G_SELECT          (0)
 
-#define ACCEL_CAL_SAMPLES 		(4) 	/* Must be multiple of 2 */
-#define ACCEL_CAL_ROUND 		(50)
-#define ACCEL_CAL_SIMPLE 		(0)
-#define ACCEL_CAL_INTERACT 		(1)
+#define ACCEL_CAL_SAMPLES       (4)     /* Must be multiple of 2 */
+#define ACCEL_CAL_ROUND         (50)
+#define ACCEL_CAL_SIMPLE        (0)
+#define ACCEL_CAL_INTERACT      (1)
 
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
 /* Reading_at_1g = Sensitivity * Max_reading / Refference_voltage */
-#define ACCEL_CAL_1G_VALUE 		{993, 256}
+#define ACCEL_CAL_1G_VALUE      {993, 256}
 
-#define ACCEL_X_ADC_CH 			ADC_SCANCTRL_INPUTMASK_CH2
-#define ACCEL_Y_ADC_CH 			ADC_SCANCTRL_INPUTMASK_CH3
-#define ACCEL_Z_ADC_CH 			ADC_SCANCTRL_INPUTMASK_CH4
+#define ACCEL_X_ADC_CH          ADC_SCANCTRL_INPUTMASK_CH2
+#define ACCEL_Y_ADC_CH          ADC_SCANCTRL_INPUTMASK_CH3
+#define ACCEL_Z_ADC_CH          ADC_SCANCTRL_INPUTMASK_CH4
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-#define ACCEL_CAL_1G_VALUE 		{0x3f, 0x1f, 0x0f}
+#define ACCEL_CAL_1G_VALUE      {0x3f, 0x1f, 0x0f}
 #define ACCEL_IIC_SLAVE_ADDRESS (0x1d)
 
-#define ACCEL_INT1_PORT			(gpioPortD)
-#define ACCEL_INT1_PIN			(13)
-#define ACCEL_INT2_PORT 		(gpioPortD)
-#define ACCEL_INT2_PIN 			(12)
+#define ACCEL_INT1_PORT         (gpioPortD)
+#define ACCEL_INT1_PIN          (13)
+#define ACCEL_INT2_PORT         (gpioPortD)
+#define ACCEL_INT2_PIN          (12)
 
-#define ACCEL_MODE_STANDBY 		(1 << 0)
-#define ACCEL_MODE_MEASUREMENT	(1 << 1)
-#define ACCEL_MODE_LEVEL		(1 << 2)
-#define ACCEL_MODE_PULSE 		(1 << 3)
-#define ACCEL_RANGE_8G 			(1 << 4)
-#define ACCEL_RANGE_4G 			(1 << 5)
-#define ACCEL_RANGE_2G 			(1 << 6)
-#define ACCEL_INTPIN_INVERSE 	(1 << 7)
-#define ACCEL_INT_LEVEL_PULSE 	(1 << 8)
-#define ACCEL_INT_PULSE_LEVEL 	(1 << 9)
-#define ACCEL_INT_SINGLE_DOUBLE	(1 << 10)
-#define ACCEL_DISABLE_X 		(1 << 11)
-#define ACCEL_DISABLE_Y 		(1 << 12)
-#define ACCEL_DISABLE_Z 		(1 << 13)
-#define ACCEL_THRESHOLD_INTEGER	(1 << 14) 	/* For level detection only */
-#define ACCEL_BANDWIDTH_125HZ	(1 << 15)
-#define ACCEL_LEVEL_AND			(1 << 16)
-#define ACCEL_PULSE_AND			(1 << 17)
-#define ACCEL_DRIVE_STRONG		(1 << 18)
-#define ACCEL_SOURCE_LEVEL_X 	(1 << 19)
-#define ACCEL_SOURCE_LEVEL_Y 	(1 << 20)
-#define ACCEL_SOURCE_LEVEL_Z 	(1 << 21)
-#define ACCEL_SOURCE_PULSE_X 	(1 << 22)
-#define ACCEL_SOURCE_PULSE_Y 	(1 << 23)
-#define ACCEL_SOURCE_PULSE_Z 	(1 << 24)
+#define ACCEL_MODE_STANDBY      (1 << 0)
+#define ACCEL_MODE_MEASUREMENT  (1 << 1)
+#define ACCEL_MODE_LEVEL        (1 << 2)
+#define ACCEL_MODE_PULSE        (1 << 3)
+#define ACCEL_RANGE_8G          (1 << 4)
+#define ACCEL_RANGE_4G          (1 << 5)
+#define ACCEL_RANGE_2G          (1 << 6)
+#define ACCEL_INTPIN_INVERSE    (1 << 7)
+#define ACCEL_INT_LEVEL_PULSE   (1 << 8)
+#define ACCEL_INT_PULSE_LEVEL   (1 << 9)
+#define ACCEL_INT_SINGLE_DOUBLE (1 << 10)
+#define ACCEL_DISABLE_X         (1 << 11)
+#define ACCEL_DISABLE_Y         (1 << 12)
+#define ACCEL_DISABLE_Z         (1 << 13)
+#define ACCEL_THRESHOLD_INTEGER (1 << 14)   /* For level detection only */
+#define ACCEL_BANDWIDTH_125HZ   (1 << 15)
+#define ACCEL_LEVEL_AND         (1 << 16)
+#define ACCEL_PULSE_AND         (1 << 17)
+#define ACCEL_DRIVE_STRONG      (1 << 18)
+#define ACCEL_SOURCE_LEVEL_X    (1 << 19)
+#define ACCEL_SOURCE_LEVEL_Y    (1 << 20)
+#define ACCEL_SOURCE_LEVEL_Z    (1 << 21)
+#define ACCEL_SOURCE_PULSE_X    (1 << 22)
+#define ACCEL_SOURCE_PULSE_Y    (1 << 23)
+#define ACCEL_SOURCE_PULSE_Z    (1 << 24)
 
-#define ACCEL_SHIFT_MODE 		(0)
-#define ACCEL_SHIFT_RANGE 		(4)
-#define ACCEL_SHIFT_INT 		(8)
-#define ACCEL_SHIFT_DISABLE		(11)
-#define ACCEL_SHIFT_SOURCE		(19)
+#define ACCEL_SHIFT_MODE        (0)
+#define ACCEL_SHIFT_RANGE       (4)
+#define ACCEL_SHIFT_INT         (8)
+#define ACCEL_SHIFT_DISABLE     (11)
+#define ACCEL_SHIFT_SOURCE      (19)
 
-#define ACCEL_MASK_MODE 		(0X0000000f << ACCEL_SHIFT_MODE)
-#define ACCEL_MASK_RANGE 		(0X00000007 << ACCEL_SHIFT_RANGE)
-#define ACCEL_MASK_INT 			(0X00000007 << ACCEL_SHIFT_INT)
-#define ACCEL_MASK_DISABLE 		(0X00000007 << ACCEL_SHIFT_DISABLE)
-#define ACCEL_MASK_SOURCE 		(0X0000003f << ACCEL_SHIFT_SOURCE)
+#define ACCEL_MASK_MODE         (0X0000000f << ACCEL_SHIFT_MODE)
+#define ACCEL_MASK_RANGE        (0X00000007 << ACCEL_SHIFT_RANGE)
+#define ACCEL_MASK_INT          (0X00000007 << ACCEL_SHIFT_INT)
+#define ACCEL_MASK_DISABLE      (0X00000007 << ACCEL_SHIFT_DISABLE)
+#define ACCEL_MASK_SOURCE       (0X0000003f << ACCEL_SHIFT_SOURCE)
 #endif
 
 /* Exported functions ------------------------------------------------------- */
 rt_err_t efm_accel_get_data(struct efm32_accel_result_t *data,
-	rt_bool_t lowResolution);
+    rt_bool_t lowResolution);
 rt_err_t efm_accel_config(rt_uint32_t config,
-	rt_uint8_t level_threshold,
-	rt_uint8_t pulse_threshold,
-	rt_uint8_t pulse_duration,
-	rt_uint8_t pulse_latency,
-	rt_uint8_t pulse_duration2);
+    rt_uint8_t level_threshold,
+    rt_uint8_t pulse_threshold,
+    rt_uint8_t pulse_duration,
+    rt_uint8_t pulse_latency,
+    rt_uint8_t pulse_duration2);
 rt_err_t efm_accel_auto_zero(rt_uint8_t mode, rt_tick_t period);
 rt_err_t efm_accel_init(void);
 
diff --git a/bsp/efm32/dev_keys.c b/bsp/efm32/dev_keys.c
index a7a58ff20f..15d306b36b 100644
--- a/bsp/efm32/dev_keys.c
+++ b/bsp/efm32/dev_keys.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_keys.c
- * @brief 	Keys driver of RT-Thread RTOS for EFM32
+ * @file    dev_keys.c
+ * @brief   Keys driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-12-29   onelife     Initial creation for EFM32GG_DK3750 board
  ******************************************************************************/
 
@@ -48,14 +48,14 @@ static rt_bool_t                            click;
 /* Private functions ---------------------------------------------------------*/
 /***************************************************************************//**
  * @brief
- *	Keys interrupt handler
+ *  Keys interrupt handler
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  ******************************************************************************/
 static void efm32_keys_isr(rt_device_t dev)
 {
@@ -158,18 +158,18 @@ static void efm32_keys_isr(rt_device_t dev)
 
 /***************************************************************************//**
  * @brief
- *	Keys timeout handler
+ *  Keys timeout handler
  *
  * @details
  *
  * @note
  *
  * @param[in] param
- *	Parameter
+ *  Parameter
  ******************************************************************************/
 static void efm32_keys_timer_isr(void *param)
 {
-	rt_uint16_t joystick;
+    rt_uint16_t joystick;
 
     joystick = DVK_getJoystick();
 
@@ -277,11 +277,11 @@ void efm32_hw_keys_init(void)
     GPIO_IntConfig(KEYS_INT_PORT, KEYS_INT_PIN, true, true, true);
 
     efm32_irq_hook_init_t hook;
-	hook.type       = efm32_irq_type_gpio;
-	hook.unit       = KEYS_INT_PIN;
-	hook.cbFunc     = efm32_keys_isr;
-	hook.userPtr    = RT_NULL;
-	efm32_irq_hook_register(&hook);
+    hook.type       = efm32_irq_type_gpio;
+    hook.unit       = KEYS_INT_PIN;
+    hook.cbFunc     = efm32_keys_isr;
+    hook.userPtr    = RT_NULL;
+    efm32_irq_hook_register(&hook);
 
     if ((rt_uint8_t)KEYS_INT_PIN % 2)
     {
@@ -299,12 +299,12 @@ void efm32_hw_keys_init(void)
     /* Enable DVK joystick interrupt */
     DVK_enableInterrupt(BC_INTEN_JOYSTICK);
 
-	rt_timer_init(&joy.timer,
-		"joy_tmr",
-		efm32_keys_timer_isr,
-		RT_NULL,
-		KEYS_POLL_TIME,
-		RT_TIMER_FLAG_PERIODIC);
+    rt_timer_init(&joy.timer,
+        "joy_tmr",
+        efm32_keys_timer_isr,
+        RT_NULL,
+        KEYS_POLL_TIME,
+        RT_TIMER_FLAG_PERIODIC);
 
     joy_dev.init        = efm32_keys_init;
     joy_dev.open        = RT_NULL;
diff --git a/bsp/efm32/dev_keys.h b/bsp/efm32/dev_keys.h
index 6e66617331..87f8fe95fd 100644
--- a/bsp/efm32/dev_keys.h
+++ b/bsp/efm32/dev_keys.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_keys.h
- * @brief 	Keys driver of RT-Thread RTOS for EFM32
+ * @file    dev_keys.h
+ * @brief   Keys driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-12-29   onelife     Initial creation for EFM32GG_DK3750 board
  ******************************************************************************/
 #ifndef __DEV_KEYS_H__
diff --git a/bsp/efm32/dev_lcd.c b/bsp/efm32/dev_lcd.c
index 0a2d469d78..c4cbbcce21 100644
--- a/bsp/efm32/dev_lcd.c
+++ b/bsp/efm32/dev_lcd.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_lcd.c
- * @brief 	LCD driver of RT-Thread RTOS for EFM32
+ * @file    dev_lcd.c
+ * @brief   LCD driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-12-16   onelife     Initial creation of address mapped method (pixel
  *  drive) for EFM32GG_DK3750 board
  * 2011-12-29   onelife     Add direct drive method (frame buffer) support
@@ -451,48 +451,48 @@ rt_err_t efm32_spiLcd_writeRegister(rt_uint8_t reg, rt_uint16_t data)
 
 /***************************************************************************//**
  * @brief
- *	Register LCD device
+ *  Register LCD device
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] name
- *	Device name
+ *  Device name
  *
  * @param[in] flag
- *	Configuration flags
+ *  Configuration flags
  *
  * @param[in] iic
- *	Pointer to IIC device descriptor
+ *  Pointer to IIC device descriptor
  *
  * @return
- *	Error code
+ *  Error code
  ******************************************************************************/
 rt_err_t efm32_spiLcd_register(
-	rt_device_t		                device,
-	const char		                *name,
-	rt_uint32_t		                flag,
-	void                            *data)
+    rt_device_t                     device,
+    const char                      *name,
+    rt_uint32_t                     flag,
+    void                            *data)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	device->type 		= RT_Device_Class_Graphic;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= RT_NULL;
-	device->open		= RT_NULL;
-	device->close		= RT_NULL;
-	device->read 		= RT_NULL;
-	device->write 		= RT_NULL;
-	device->control 	= efm32_spiLcd_control;
-	device->user_data	= data;
+    device->type        = RT_Device_Class_Graphic;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = RT_NULL;
+    device->open        = RT_NULL;
+    device->close       = RT_NULL;
+    device->read        = RT_NULL;
+    device->write       = RT_NULL;
+    device->control     = efm32_spiLcd_control;
+    device->user_data   = data;
 
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
 }
 
 /***************************************************************************//**
@@ -511,18 +511,18 @@ void efm32_spiLcd_init(void)
     DMD_DisplayGeometry         *geometry;
     rt_uint32_t                 ret;
 
-	do
-	{
+    do
+    {
         USART_InitSync_TypeDef init = USART_INITSYNC_DEFAULT;
 
-		/* Find SPI device */
-		lcd = rt_device_find(LCD_USING_DEVICE_NAME);
-		if (lcd == RT_NULL)
-		{
-			lcd_debug("LCD err: Can't find %s!\n", LCD_USING_DEVICE_NAME);
-			break;
-		}
-		lcd_debug("LCD: Find device %s\n", LCD_USING_DEVICE_NAME);
+        /* Find SPI device */
+        lcd = rt_device_find(LCD_USING_DEVICE_NAME);
+        if (lcd == RT_NULL)
+        {
+            lcd_debug("LCD err: Can't find %s!\n", LCD_USING_DEVICE_NAME);
+            break;
+        }
+        lcd_debug("LCD: Find device %s\n", LCD_USING_DEVICE_NAME);
 
         /* Config CS pin */
         usart = (struct efm32_usart_device_t *)(lcd->user_data);
@@ -647,7 +647,7 @@ void efm32_spiLcd_init(void)
         }
 
         /* Init LCD info */
-		flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_DMA_TX;
+        flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_DMA_TX;
         lcd_info.pixel_format       = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
         lcd_info.bits_per_pixel     = 16;
         lcd_info.width              = geometry->xSize;
diff --git a/bsp/efm32/dev_lcd.h b/bsp/efm32/dev_lcd.h
index 075bed64ba..4c59286ef6 100644
--- a/bsp/efm32/dev_lcd.h
+++ b/bsp/efm32/dev_lcd.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_lcd.h
- * @brief 	LCD driver of RT-Thread RTOS for EFM32
+ * @file    dev_lcd.h
+ * @brief   LCD driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-12-16   onelife     Initial creation of address mapped method (pixel
  *  drive) for EFM32GG_DK3750 board
  ******************************************************************************/
diff --git a/bsp/efm32/dev_sflash.h b/bsp/efm32/dev_sflash.h
index ae72ec678a..b7d2860f0d 100644
--- a/bsp/efm32/dev_sflash.h
+++ b/bsp/efm32/dev_sflash.h
@@ -20,85 +20,85 @@
 /* Exported types ------------------------------------------------------------*/
 enum sflash_inst_type_t
 {
-	/* Instruction only */
-	sflash_inst_wren = 0x00,
-	sflash_inst_wrdi,
-	sflash_inst_rdid_l,
-	sflash_inst_rdid_s,
-	sflash_inst_rdsr,
-	sflash_inst_wrsr,
-	sflash_inst_be,
-	sflash_inst_dp,
-	sflash_inst_rdp,
-	/* Instruction and address */
-	sflash_inst_wrlr,
-	sflash_inst_rdlr,
-	sflash_inst_read,
-	sflash_inst_potp,
-	sflash_inst_pp,
-	sflash_inst_difp,
-	sflash_inst_sse,
-	sflash_inst_se,
-	/* Instruction, address and dummy read */
-	sflash_inst_read_f,
-	sflash_inst_dofr,
-	sflash_inst_rotp
+    /* Instruction only */
+    sflash_inst_wren = 0x00,
+    sflash_inst_wrdi,
+    sflash_inst_rdid_l,
+    sflash_inst_rdid_s,
+    sflash_inst_rdsr,
+    sflash_inst_wrsr,
+    sflash_inst_be,
+    sflash_inst_dp,
+    sflash_inst_rdp,
+    /* Instruction and address */
+    sflash_inst_wrlr,
+    sflash_inst_rdlr,
+    sflash_inst_read,
+    sflash_inst_potp,
+    sflash_inst_pp,
+    sflash_inst_difp,
+    sflash_inst_sse,
+    sflash_inst_se,
+    /* Instruction, address and dummy read */
+    sflash_inst_read_f,
+    sflash_inst_dofr,
+    sflash_inst_rotp
 };
 
 /* Exported constants --------------------------------------------------------*/
 /* Exported macro ------------------------------------------------------------*/
-#define SFLASH_SPI_COMMAND_SKIP 	(1)
-#define SFLASH_SPI_READ_SKIP 		(2)
+#define SFLASH_SPI_COMMAND_SKIP     (1)
+#define SFLASH_SPI_READ_SKIP        (2)
 
-#define SFLASH_INST_CODE_WREN 		(0x06)
-#define SFLASH_INST_CODE_WRDI 		(0x04)
-#define SFLASH_INST_CODE_RDID_L 	(0x9F)
-#define SFLASH_INST_CODE_RDID_S 	(0x9E)
-#define SFLASH_INST_CODE_RDSR 		(0x05)
-#define SFLASH_INST_CODE_WRSR 		(0x01)
-#define SFLASH_INST_CODE_WRLR 		(0xE5)
-#define SFLASH_INST_CODE_RDLR 		(0xE8)
-#define SFLASH_INST_CODE_READ 		(0x03)
-#define SFLASH_INST_CODE_READ_F 	(0x0B)
-#define SFLASH_INST_CODE_DOFR 		(0x3B)
-#define SFLASH_INST_CODE_ROTP 		(0x4B)
-#define SFLASH_INST_CODE_POTP 		(0x42)
-#define SFLASH_INST_CODE_PP 		(0x02)
-#define SFLASH_INST_CODE_DIFP 		(0xA2)
-#define SFLASH_INST_CODE_SSE 		(0x20)
-#define SFLASH_INST_CODE_SE 		(0xD8)
-#define SFLASH_INST_CODE_BE 		(0xC7)
-#define SFLASH_INST_CODE_DP 		(0xB9)
-#define SFLASH_INST_CODE_RDP 		(0xAB)
+#define SFLASH_INST_CODE_WREN       (0x06)
+#define SFLASH_INST_CODE_WRDI       (0x04)
+#define SFLASH_INST_CODE_RDID_L     (0x9F)
+#define SFLASH_INST_CODE_RDID_S     (0x9E)
+#define SFLASH_INST_CODE_RDSR       (0x05)
+#define SFLASH_INST_CODE_WRSR       (0x01)
+#define SFLASH_INST_CODE_WRLR       (0xE5)
+#define SFLASH_INST_CODE_RDLR       (0xE8)
+#define SFLASH_INST_CODE_READ       (0x03)
+#define SFLASH_INST_CODE_READ_F     (0x0B)
+#define SFLASH_INST_CODE_DOFR       (0x3B)
+#define SFLASH_INST_CODE_ROTP       (0x4B)
+#define SFLASH_INST_CODE_POTP       (0x42)
+#define SFLASH_INST_CODE_PP         (0x02)
+#define SFLASH_INST_CODE_DIFP       (0xA2)
+#define SFLASH_INST_CODE_SSE        (0x20)
+#define SFLASH_INST_CODE_SE         (0xD8)
+#define SFLASH_INST_CODE_BE         (0xC7)
+#define SFLASH_INST_CODE_DP         (0xB9)
+#define SFLASH_INST_CODE_RDP        (0xAB)
 
-#define SFLASH_REPLY_LEN_WREN 		(0)
-#define SFLASH_REPLY_LEN_WRDI 		(0)
-#define SFLASH_REPLY_LEN_RDID_L 	(20)
-#define SFLASH_REPLY_LEN_RDID_S 	(3)
-#define SFLASH_REPLY_LEN_RDSR 		(1)
-#define SFLASH_REPLY_LEN_WRSR 		(1)
-#define SFLASH_REPLY_LEN_WRLR 		(1)
-#define SFLASH_REPLY_LEN_RDLR 		(1)
-#define SFLASH_REPLY_LEN_READ 		(-1)
-#define SFLASH_REPLY_LEN_READ_F 	(-1)
-#define SFLASH_REPLY_LEN_DOFR 		(-1)
-#define SFLASH_REPLY_LEN_ROTP 		(65)
-#define SFLASH_REPLY_LEN_POTP 		(65)
-#define SFLASH_REPLY_LEN_PP 		(256)
-#define SFLASH_REPLY_LEN_DIFP 		(256)
-#define SFLASH_REPLY_LEN_SSE 		(0)
-#define SFLASH_REPLY_LEN_SE 		(0)
-#define SFLASH_REPLY_LEN_BE 		(0)
-#define SFLASH_REPLY_LEN_DP 		(0)
-#define SFLASH_REPLY_LEN_RDP 		(0)
+#define SFLASH_REPLY_LEN_WREN       (0)
+#define SFLASH_REPLY_LEN_WRDI       (0)
+#define SFLASH_REPLY_LEN_RDID_L     (20)
+#define SFLASH_REPLY_LEN_RDID_S     (3)
+#define SFLASH_REPLY_LEN_RDSR       (1)
+#define SFLASH_REPLY_LEN_WRSR       (1)
+#define SFLASH_REPLY_LEN_WRLR       (1)
+#define SFLASH_REPLY_LEN_RDLR       (1)
+#define SFLASH_REPLY_LEN_READ       (-1)
+#define SFLASH_REPLY_LEN_READ_F     (-1)
+#define SFLASH_REPLY_LEN_DOFR       (-1)
+#define SFLASH_REPLY_LEN_ROTP       (65)
+#define SFLASH_REPLY_LEN_POTP       (65)
+#define SFLASH_REPLY_LEN_PP         (256)
+#define SFLASH_REPLY_LEN_DIFP       (256)
+#define SFLASH_REPLY_LEN_SSE        (0)
+#define SFLASH_REPLY_LEN_SE         (0)
+#define SFLASH_REPLY_LEN_BE         (0)
+#define SFLASH_REPLY_LEN_DP         (0)
+#define SFLASH_REPLY_LEN_RDP        (0)
 
 /* Exported functions ------------------------------------------------------- */
 rt_err_t efm_spiFlash_init(void);
 rt_err_t efm_spiFlash_deinit(void);
 rt_uint32_t efm_spiFlash_cmd(
-	enum sflash_inst_type_t command,
-	rt_uint32_t address,
-	rt_uint8_t *buffer,
-	rt_uint32_t size);
+    enum sflash_inst_type_t command,
+    rt_uint32_t address,
+    rt_uint8_t *buffer,
+    rt_uint32_t size);
 
 #endif /* __DEV_SFLASH_H__ */
diff --git a/bsp/efm32/drv_acmp.c b/bsp/efm32/drv_acmp.c
index 1961fc4695..b9d24e8ebd 100644
--- a/bsp/efm32/drv_acmp.c
+++ b/bsp/efm32/drv_acmp.c
@@ -30,18 +30,18 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef RT_ACMP_DEBUG
-#define acmp_debug(format,args...) 			rt_kprintf(format, ##args)
+#define acmp_debug(format,args...)          rt_kprintf(format, ##args)
 #else
 #define acmp_debug(format,args...)
 #endif
 
 /* Private variables ---------------------------------------------------------*/
 #ifdef RT_USING_ACMP0
-	static struct rt_device acmp0_device;
+    static struct rt_device acmp0_device;
 #endif
 
 #ifdef RT_USING_ACMP1
-	static struct rt_device acmp1_device;
+    static struct rt_device acmp1_device;
 #endif
 
 /* Private function prototypes -----------------------------------------------*/
@@ -64,169 +64,169 @@ ACMP_WarmTime_TypeDef efm32_acmp_WarmTimeCalc(rt_uint32_t hfperFreq);
  ******************************************************************************/
  static rt_err_t rt_acmp_init(rt_device_t dev)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_acmp_device_t *acmp;
+    struct efm32_acmp_device_t *acmp;
 
-	acmp = (struct efm32_acmp_device_t *)(dev->user_data);
+    acmp = (struct efm32_acmp_device_t *)(dev->user_data);
 
-	acmp->hook.cbFunc 	= RT_NULL;
-	acmp->hook.userPtr 	= RT_NULL;
+    acmp->hook.cbFunc   = RT_NULL;
+    acmp->hook.userPtr  = RT_NULL;
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
  * @brief
- *	Configure ACMP device
+ *  Configure ACMP device
  *
  * @details
  *
  * @note
  *
  * @param[in] dev
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] cmd
- *	ACMP control command
+ *  ACMP control command
  *
  * @param[in] args
- *	Arguments
+ *  Arguments
  *
  * @return
- *	Error code
+ *  Error code
  ******************************************************************************/
 static rt_err_t rt_acmp_control(
-	rt_device_t 	dev,
-	rt_uint8_t 		cmd,
-	void 			*args)
+    rt_device_t     dev,
+    rt_uint8_t      cmd,
+    void            *args)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_acmp_device_t *acmp;
+    struct efm32_acmp_device_t *acmp;
 
-	acmp = (struct efm32_acmp_device_t *)(dev->user_data);
+    acmp = (struct efm32_acmp_device_t *)(dev->user_data);
 
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* Suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		ACMP_Disable(acmp->acmp_device);
-		break;
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* Suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        ACMP_Disable(acmp->acmp_device);
+        break;
 
-	case RT_DEVICE_CTRL_RESUME:
-		/* Resume device */
-		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
-		ACMP_Enable(acmp->acmp_device);
-		break;
+    case RT_DEVICE_CTRL_RESUME:
+        /* Resume device */
+        dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+        ACMP_Enable(acmp->acmp_device);
+        break;
 
-	case RT_DEVICE_CTRL_ACMP_INIT:
-		{
-			rt_bool_t int_en = false;
-			struct efm32_acmp_control_t *control;
+    case RT_DEVICE_CTRL_ACMP_INIT:
+        {
+            rt_bool_t int_en = false;
+            struct efm32_acmp_control_t *control;
 
-			control = (struct efm32_acmp_control_t *)args;
-			acmp_debug("ACMP: control -> init start\n");
+            control = (struct efm32_acmp_control_t *)args;
+            acmp_debug("ACMP: control -> init start\n");
 
-			/* Configure ACMPn */
-			if (control->init == RT_NULL)
-			{
-				return -RT_ERROR;
-			}
-			ACMP_Init(acmp->acmp_device, control->init);
-			ACMP_ChannelSet(acmp->acmp_device, control->negInput, control->posInput);
-			if (control->output != RT_NULL)
-			{
-				ACMP_GPIOSetup(
-					acmp->acmp_device,
-					control->output->location,
-					control->output->enable,
-					control->output->invert);
-				int_en = true;
-			}
-			if (control->hook.cbFunc != RT_NULL)
-			{
-				acmp->hook.cbFunc = control->hook.cbFunc;
-				acmp->hook.userPtr = control->hook.userPtr;
-				int_en = true;
-			}
+            /* Configure ACMPn */
+            if (control->init == RT_NULL)
+            {
+                return -RT_ERROR;
+            }
+            ACMP_Init(acmp->acmp_device, control->init);
+            ACMP_ChannelSet(acmp->acmp_device, control->negInput, control->posInput);
+            if (control->output != RT_NULL)
+            {
+                ACMP_GPIOSetup(
+                    acmp->acmp_device,
+                    control->output->location,
+                    control->output->enable,
+                    control->output->invert);
+                int_en = true;
+            }
+            if (control->hook.cbFunc != RT_NULL)
+            {
+                acmp->hook.cbFunc = control->hook.cbFunc;
+                acmp->hook.userPtr = control->hook.userPtr;
+                int_en = true;
+            }
 
-			if (int_en)
-			{
-				/* Enable edge interrupt */
-				ACMP_IntEnable(acmp->acmp_device, ACMP_IEN_EDGE);
-				ACMP_IntClear(acmp->acmp_device, ACMP_IFC_EDGE);
+            if (int_en)
+            {
+                /* Enable edge interrupt */
+                ACMP_IntEnable(acmp->acmp_device, ACMP_IEN_EDGE);
+                ACMP_IntClear(acmp->acmp_device, ACMP_IFC_EDGE);
 
-				/* Enable ACMP0/1 interrupt vector in NVIC */
-				NVIC_ClearPendingIRQ(ACMP0_IRQn);
-				NVIC_SetPriority(ACMP0_IRQn, EFM32_IRQ_PRI_DEFAULT);
-				NVIC_EnableIRQ(ACMP0_IRQn);
-			}
-		}
-		break;
+                /* Enable ACMP0/1 interrupt vector in NVIC */
+                NVIC_ClearPendingIRQ(ACMP0_IRQn);
+                NVIC_SetPriority(ACMP0_IRQn, EFM32_IRQ_PRI_DEFAULT);
+                NVIC_EnableIRQ(ACMP0_IRQn);
+            }
+        }
+        break;
 
-	case RT_DEVICE_CTRL_ACMP_OUTPUT:
-		*((rt_bool_t *)args) = \
-			(acmp->acmp_device->STATUS & ACMP_STATUS_ACMPOUT) ? true : false;
-		break;
+    case RT_DEVICE_CTRL_ACMP_OUTPUT:
+        *((rt_bool_t *)args) = \
+            (acmp->acmp_device->STATUS & ACMP_STATUS_ACMPOUT) ? true : false;
+        break;
 
-		default:
-			return -RT_ERROR;
-	}
+        default:
+            return -RT_ERROR;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
  * @brief
- *	Register ACMP device
+ *  Register ACMP device
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] name
- *	Device name
+ *  Device name
  *
  * @param[in] flag
- *	Configuration flags
+ *  Configuration flags
  *
  * @param[in] acmp
- *	Pointer to ACMP device descriptor
+ *  Pointer to ACMP device descriptor
  *
  * @return
- *	Error code
+ *  Error code
  ******************************************************************************/
 rt_err_t rt_hw_acmp_register(
-	rt_device_t		device,
-	const char		*name,
-	rt_uint32_t		flag,
-	struct efm32_acmp_device_t *acmp)
+    rt_device_t     device,
+    const char      *name,
+    rt_uint32_t     flag,
+    struct efm32_acmp_device_t *acmp)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	device->type 		= RT_Device_Class_Char; /* fixme: should be acmp type */
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_acmp_init;
-	device->open		= RT_NULL;
-	device->close		= RT_NULL;
-	device->read 		= RT_NULL;
-	device->write 		= RT_NULL;
-	device->control 	= rt_acmp_control;
-	device->user_data	= acmp;
+    device->type        = RT_Device_Class_Char; /* fixme: should be acmp type */
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = rt_acmp_init;
+    device->open        = RT_NULL;
+    device->close       = RT_NULL;
+    device->read        = RT_NULL;
+    device->write       = RT_NULL;
+    device->control     = rt_acmp_control;
+    device->user_data   = acmp;
 
-	/* register a character device */
-	return rt_device_register(device, name, flag);
+    /* register a character device */
+    return rt_device_register(device, name, flag);
 }
 
 /***************************************************************************//**
  * @brief
- *	ACMP edge trigger interrupt handler
+ *  ACMP edge trigger interrupt handler
  *
  * @details
  *
@@ -234,96 +234,96 @@ rt_err_t rt_hw_acmp_register(
  ******************************************************************************/
 void rt_hw_acmp_isr(rt_device_t dev)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_acmp_device_t *acmp;
+    struct efm32_acmp_device_t *acmp;
 
-	acmp = (struct efm32_acmp_device_t *)(dev->user_data);
+    acmp = (struct efm32_acmp_device_t *)(dev->user_data);
 
-	if (acmp->hook.cbFunc != RT_NULL)
-	{
-		(acmp->hook.cbFunc)(acmp->hook.userPtr);
-	}
+    if (acmp->hook.cbFunc != RT_NULL)
+    {
+        (acmp->hook.cbFunc)(acmp->hook.userPtr);
+    }
 }
 
 /***************************************************************************//**
  * @brief
- *	Initialize the specified ACMP unit
+ *  Initialize the specified ACMP unit
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] unitNumber
- *	Unit number
+ *  Unit number
  *
  * @return
- *	Pointer to ACMP device
+ *  Pointer to ACMP device
  ******************************************************************************/
 static struct efm32_acmp_device_t *rt_hw_acmp_unit_init(
-	rt_device_t device,
-	rt_uint8_t 	unitNumber)
+    rt_device_t device,
+    rt_uint8_t  unitNumber)
 {
-	struct efm32_acmp_device_t 		*acmp;
-	efm32_irq_hook_init_t			hook;
-	CMU_Clock_TypeDef				acmpClock;
+    struct efm32_acmp_device_t      *acmp;
+    efm32_irq_hook_init_t           hook;
+    CMU_Clock_TypeDef               acmpClock;
 
-	do
-	{
-		/* Allocate device */
-		acmp = rt_malloc(sizeof(struct efm32_acmp_device_t));
-		if (acmp == RT_NULL)
-		{
-			acmp_debug("ACMP err: no mem for ACMP%d\n", unitNumber);
-			break;
-		}
+    do
+    {
+        /* Allocate device */
+        acmp = rt_malloc(sizeof(struct efm32_acmp_device_t));
+        if (acmp == RT_NULL)
+        {
+            acmp_debug("ACMP err: no mem for ACMP%d\n", unitNumber);
+            break;
+        }
 
-		/* Initialization */
-		if (unitNumber >= ACMP_COUNT)
-		{
-			break;
-		}
-		switch (unitNumber)
-		{
-		case 0:
-			acmp->acmp_device	= ACMP0;
-			acmpClock 			= (CMU_Clock_TypeDef)cmuClock_ACMP0;
-			break;
+        /* Initialization */
+        if (unitNumber >= ACMP_COUNT)
+        {
+            break;
+        }
+        switch (unitNumber)
+        {
+        case 0:
+            acmp->acmp_device   = ACMP0;
+            acmpClock           = (CMU_Clock_TypeDef)cmuClock_ACMP0;
+            break;
 
-		case 1:
-			acmp->acmp_device	= ACMP1;
-			acmpClock 			= (CMU_Clock_TypeDef)cmuClock_ACMP1;
-			break;
+        case 1:
+            acmp->acmp_device   = ACMP1;
+            acmpClock           = (CMU_Clock_TypeDef)cmuClock_ACMP1;
+            break;
 
-		default:
-			break;
-		}
+        default:
+            break;
+        }
 
-		/* Enable ACMP clock */
-		CMU_ClockEnable(acmpClock, true);
+        /* Enable ACMP clock */
+        CMU_ClockEnable(acmpClock, true);
 
-		/* Reset */
-		ACMP_Reset(acmp->acmp_device);
+        /* Reset */
+        ACMP_Reset(acmp->acmp_device);
 
-		/* Config interrupt and NVIC */
-		hook.type			= efm32_irq_type_acmp;
-		hook.unit			= unitNumber;
-		hook.cbFunc 		= rt_hw_acmp_isr;
-		hook.userPtr		= device;
-		efm32_irq_hook_register(&hook);
+        /* Config interrupt and NVIC */
+        hook.type           = efm32_irq_type_acmp;
+        hook.unit           = unitNumber;
+        hook.cbFunc         = rt_hw_acmp_isr;
+        hook.userPtr        = device;
+        efm32_irq_hook_register(&hook);
 
-		return acmp;
-	} while(0);
+        return acmp;
+    } while(0);
 
-	if (acmp)
-	{
-		rt_free(acmp);
-	}
-	rt_kprintf("ACMP: Init failed!\n");
-	return RT_NULL;
+    if (acmp)
+    {
+        rt_free(acmp);
+    }
+    rt_kprintf("ACMP: Init failed!\n");
+    return RT_NULL;
 }
 
 /***************************************************************************//**
@@ -338,20 +338,20 @@ static struct efm32_acmp_device_t *rt_hw_acmp_unit_init(
  ******************************************************************************/
 void rt_hw_acmp_init(void)
 {
-	struct efm32_acmp_device_t 	*acmp;
+    struct efm32_acmp_device_t  *acmp;
 
 #ifdef RT_USING_ACMP0
-	if ((acmp = rt_hw_acmp_unit_init(&acmp0_device, 0)) != RT_NULL)
-	{
-		rt_hw_acmp_register(&acmp0_device, RT_ACMP0_NAME, EFM32_NO_DATA, acmp);
-	}
+    if ((acmp = rt_hw_acmp_unit_init(&acmp0_device, 0)) != RT_NULL)
+    {
+        rt_hw_acmp_register(&acmp0_device, RT_ACMP0_NAME, EFM32_NO_DATA, acmp);
+    }
 #endif
 
 #ifdef RT_USING_ACMP1
-	if ((acmp = rt_hw_acmp_unit_init(&acmp1_device, 1)) != RT_NULL)
-	{
-		rt_hw_acmp_register(&acmp1_device, RT_ACMP1_NAME, EFM32_NO_DATA, acmp);
-	}
+    if ((acmp = rt_hw_acmp_unit_init(&acmp1_device, 1)) != RT_NULL)
+    {
+        rt_hw_acmp_register(&acmp1_device, RT_ACMP1_NAME, EFM32_NO_DATA, acmp);
+    }
 #endif
 
 }
@@ -369,50 +369,50 @@ void rt_hw_acmp_init(void)
  ******************************************************************************/
 ACMP_WarmTime_TypeDef efm32_acmp_WarmTimeCalc(rt_uint32_t hfperFreq)
 {
-	if (!hfperFreq)
-	{
-		hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER);
+    if (!hfperFreq)
+    {
+        hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER);
 
-		/* Just in case, make sure we get non-zero freq for below calculation */
-		if (!hfperFreq)
-		{
-		  hfperFreq = 1;
-		}
-	}
+        /* Just in case, make sure we get non-zero freq for below calculation */
+        if (!hfperFreq)
+        {
+          hfperFreq = 1;
+        }
+    }
 
-	/* Determine number of HFPERCLK cycle >= 10us */
-	if (4 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime4;
-	}
-	else if (8 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime8;
-	}
-	else if (16 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime16;
-	}
-	else if (32 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime32;
-	}
-	else if (64 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime64;
-	}
-	else if (128 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime128;
-	}
-	else if (256 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime256;
-	}
-	else if (512 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime512;
-	}
+    /* Determine number of HFPERCLK cycle >= 10us */
+    if (4 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime4;
+    }
+    else if (8 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime8;
+    }
+    else if (16 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime16;
+    }
+    else if (32 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime32;
+    }
+    else if (64 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime64;
+    }
+    else if (128 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime128;
+    }
+    else if (256 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime256;
+    }
+    else if (512 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime512;
+    }
 }
 
 #endif
diff --git a/bsp/efm32/drv_acmp.h b/bsp/efm32/drv_acmp.h
index 50b4738afc..fd7f858669 100644
--- a/bsp/efm32/drv_acmp.h
+++ b/bsp/efm32/drv_acmp.h
@@ -23,24 +23,24 @@
 /* Exported types ------------------------------------------------------------*/
 struct efm32_acmp_device_t
 {
-	ACMP_TypeDef 		*acmp_device;
-	efm32_irq_hook_t 	hook;
+    ACMP_TypeDef        *acmp_device;
+    efm32_irq_hook_t    hook;
 };
 
 struct efm32_acmp_output_t
 {
-	rt_uint32_t 		location;
-	rt_bool_t 			enable;
-	rt_bool_t 			invert;
+    rt_uint32_t         location;
+    rt_bool_t           enable;
+    rt_bool_t           invert;
 };
 
 struct efm32_acmp_control_t
 {
-	ACMP_Init_TypeDef			*init;
-	ACMP_Channel_TypeDef		posInput;
-	ACMP_Channel_TypeDef		negInput;
-	struct efm32_acmp_output_t 	*output;
-	efm32_irq_hook_t 			hook;
+    ACMP_Init_TypeDef           *init;
+    ACMP_Channel_TypeDef        posInput;
+    ACMP_Channel_TypeDef        negInput;
+    struct efm32_acmp_output_t  *output;
+    efm32_irq_hook_t            hook;
 };
 
 /* Exported constants --------------------------------------------------------*/
diff --git a/bsp/efm32/drv_adc.c b/bsp/efm32/drv_adc.c
index e1eeafb36e..2a072507e0 100644
--- a/bsp/efm32/drv_adc.c
+++ b/bsp/efm32/drv_adc.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_adc.c
- * @brief 	ADC driver of RT-Thread RTOS for EFM32
+ * @file    drv_adc.c
+ * @brief   ADC driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,9 +10,9 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-02-21	onelife		Initial creation for EFM32
- * 2011-07-14	onelife		Add multiple channels support for scan mode
+ * Date         Author      Notes
+ * 2011-02-21   onelife     Initial creation for EFM32
+ * 2011-07-14   onelife     Add multiple channels support for scan mode
  ******************************************************************************/
 
 /***************************************************************************//**
@@ -29,7 +29,7 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef RT_ADC_DEBUG
-#define adc_debug(format,args...) 			rt_kprintf(format, ##args)
+#define adc_debug(format,args...)           rt_kprintf(format, ##args)
 #else
 #define adc_debug(format,args...)
 #endif
@@ -71,132 +71,132 @@ static rt_uint32_t adcErrataShift = 0;
  *   No need to load the calibration values after the function returns.
  ******************************************************************************/
 rt_uint32_t efm32_adc_calibration(
-	ADC_TypeDef 			*adc,
-	ADC_Ref_TypeDef			ref,
-	ADC_SingleInput_TypeDef	input)
+    ADC_TypeDef             *adc,
+    ADC_Ref_TypeDef         ref,
+    ADC_SingleInput_TypeDef input)
 {
-	rt_uint32_t 	cal;
-	rt_int32_t 		sample;
-	rt_int8_t 		high, mid, low, tmp;
-	ADC_InitSingle_TypeDef singleInit 	= ADC_INITSINGLE_DEFAULT;
+    rt_uint32_t     cal;
+    rt_int32_t      sample;
+    rt_int8_t       high, mid, low, tmp;
+    ADC_InitSingle_TypeDef singleInit   = ADC_INITSINGLE_DEFAULT;
 
-	/* Init for single conversion use, measure diff 0 with selected reference. */
-	singleInit.reference 	= ref;
-	singleInit.input 		= adcSingleInpDiff0;
-	singleInit.acqTime 		= adcAcqTime32;
-	singleInit.diff 		= true;
-	/* Enable oversampling rate */
-	singleInit.resolution	= adcResOVS;
-	ADC_InitSingle(adc, &singleInit);
+    /* Init for single conversion use, measure diff 0 with selected reference. */
+    singleInit.reference    = ref;
+    singleInit.input        = adcSingleInpDiff0;
+    singleInit.acqTime      = adcAcqTime32;
+    singleInit.diff         = true;
+    /* Enable oversampling rate */
+    singleInit.resolution   = adcResOVS;
+    ADC_InitSingle(adc, &singleInit);
 
-	/* ADC is now set up for offset calibration */
-	/* Offset calibration register is a 7 bit signed 2's complement value. */
-	/* Use unsigned indexes for binary search, and convert when calibration */
-	/* register is written to. */
-	high = 63;
-	low = -64;
+    /* ADC is now set up for offset calibration */
+    /* Offset calibration register is a 7 bit signed 2's complement value. */
+    /* Use unsigned indexes for binary search, and convert when calibration */
+    /* register is written to. */
+    high = 63;
+    low = -64;
 
-	/* Do binary search for offset calibration*/
-	while (low < high)
-	{
-		/* Calculate midpoint */
-		mid = low + (high - low) / 2;
+    /* Do binary search for offset calibration*/
+    while (low < high)
+    {
+        /* Calculate midpoint */
+        mid = low + (high - low) / 2;
 
-		/* Midpoint is converted to 2's complement and written to both scan and */
-		/* single calibration registers */
-		cal = adc->CAL & ~(_ADC_CAL_SINGLEOFFSET_MASK | _ADC_CAL_SCANOFFSET_MASK);
-		tmp = mid < 0 ? (((mid & 0x3F) ^ 0x3F) | 0x40) + 1 : mid;
-		cal |= tmp << _ADC_CAL_SINGLEOFFSET_SHIFT;
-		cal |= tmp << _ADC_CAL_SCANOFFSET_SHIFT;
-		adc_debug("adc->CAL = %x, cal = %x, tmp = %x\n", adc->CAL, cal, tmp);
-		adc->CAL = cal;
+        /* Midpoint is converted to 2's complement and written to both scan and */
+        /* single calibration registers */
+        cal = adc->CAL & ~(_ADC_CAL_SINGLEOFFSET_MASK | _ADC_CAL_SCANOFFSET_MASK);
+        tmp = mid < 0 ? (((mid & 0x3F) ^ 0x3F) | 0x40) + 1 : mid;
+        cal |= tmp << _ADC_CAL_SINGLEOFFSET_SHIFT;
+        cal |= tmp << _ADC_CAL_SCANOFFSET_SHIFT;
+        adc_debug("adc->CAL = %x, cal = %x, tmp = %x\n", adc->CAL, cal, tmp);
+        adc->CAL = cal;
 
-		/* Do a conversion */
-		ADC_Start(adc, adcStartSingle);
+        /* Do a conversion */
+        ADC_Start(adc, adcStartSingle);
 
-		/* Wait while conversion is active */
-		while (adc->STATUS & ADC_STATUS_SINGLEACT) ;
+        /* Wait while conversion is active */
+        while (adc->STATUS & ADC_STATUS_SINGLEACT) ;
 
-		/* Get ADC result */
-		sample = ADC_DataSingleGet(adc);
+        /* Get ADC result */
+        sample = ADC_DataSingleGet(adc);
 
-		/* Check result and decide in which part of to repeat search */
-		/* Calibration register has negative effect on result */
-		if (sample < 0)
-		{
-			/* Repeat search in bottom half. */
-			high = mid;
-		}
-		else if (sample > 0)
-		{
-			/* Repeat search in top half. */
-			low = mid + 1;
-		}
-		else
-		{
-			/* Found it, exit while loop */
-			break;
-		}
-	}
-	adc_debug("adc->CAL = %x\n", adc->CAL);
+        /* Check result and decide in which part of to repeat search */
+        /* Calibration register has negative effect on result */
+        if (sample < 0)
+        {
+            /* Repeat search in bottom half. */
+            high = mid;
+        }
+        else if (sample > 0)
+        {
+            /* Repeat search in top half. */
+            low = mid + 1;
+        }
+        else
+        {
+            /* Found it, exit while loop */
+            break;
+        }
+    }
+    adc_debug("adc->CAL = %x\n", adc->CAL);
 
-	/* Now do gain calibration, only input and diff settings needs to be changed */
-	adc->SINGLECTRL &= ~(_ADC_SINGLECTRL_INPUTSEL_MASK | _ADC_SINGLECTRL_DIFF_MASK);
-	adc->SINGLECTRL |= (input << _ADC_SINGLECTRL_INPUTSEL_SHIFT);
-	adc->SINGLECTRL |= (false << _ADC_SINGLECTRL_DIFF_SHIFT);
+    /* Now do gain calibration, only input and diff settings needs to be changed */
+    adc->SINGLECTRL &= ~(_ADC_SINGLECTRL_INPUTSEL_MASK | _ADC_SINGLECTRL_DIFF_MASK);
+    adc->SINGLECTRL |= (input << _ADC_SINGLECTRL_INPUTSEL_SHIFT);
+    adc->SINGLECTRL |= (false << _ADC_SINGLECTRL_DIFF_SHIFT);
 
-	/* ADC is now set up for gain calibration */
-	/* Gain calibration register is a 7 bit unsigned value. */
-	high = 127;
-	low = 0;
+    /* ADC is now set up for gain calibration */
+    /* Gain calibration register is a 7 bit unsigned value. */
+    high = 127;
+    low = 0;
 
-	/* Do binary search for gain calibration */
-	while (low < high)
-	{
-		/* Calculate midpoint and write to calibration register */
-		mid = low + (high - low) / 2;
+    /* Do binary search for gain calibration */
+    while (low < high)
+    {
+        /* Calculate midpoint and write to calibration register */
+        mid = low + (high - low) / 2;
 
-		/* Midpoint is converted to 2's complement */
-		cal      = adc->CAL & ~(_ADC_CAL_SINGLEGAIN_MASK | _ADC_CAL_SCANGAIN_MASK);
-		cal     |= mid << _ADC_CAL_SINGLEGAIN_SHIFT;
-		cal     |= mid << _ADC_CAL_SCANGAIN_SHIFT;
-		adc_debug("adc->CAL = %x, cal = %x, mid = %x\n", adc->CAL, cal, mid);
-		adc->CAL = cal;
+        /* Midpoint is converted to 2's complement */
+        cal      = adc->CAL & ~(_ADC_CAL_SINGLEGAIN_MASK | _ADC_CAL_SCANGAIN_MASK);
+        cal     |= mid << _ADC_CAL_SINGLEGAIN_SHIFT;
+        cal     |= mid << _ADC_CAL_SCANGAIN_SHIFT;
+        adc_debug("adc->CAL = %x, cal = %x, mid = %x\n", adc->CAL, cal, mid);
+        adc->CAL = cal;
 
-		/* Do a conversion */
-		ADC_Start(adc, adcStartSingle);
+        /* Do a conversion */
+        ADC_Start(adc, adcStartSingle);
 
-		/* Wait while conversion is active */
-		while (adc->STATUS & ADC_STATUS_SINGLEACT) ;
+        /* Wait while conversion is active */
+        while (adc->STATUS & ADC_STATUS_SINGLEACT) ;
 
-		/* Get ADC result */
-		sample = ADC_DataSingleGet(adc);
+        /* Get ADC result */
+        sample = ADC_DataSingleGet(adc);
 
-		/* Check result and decide in which part to repeat search */
-		/* Compare with a value atleast one LSB's less than top to avoid overshooting */
-		/* Since oversampling is used, the result is 16 bits, but a couple of lsb's */
-		/* applies to the 12 bit result value, if 0xffe is the top value in 12 bit, this */
-		/* is in turn 0xffe0 in the 16 bit result. */
-		/* Calibration register has positive effect on result */
-		if (sample > 0xffd0)
-		{
-		  /* Repeat search in bottom half. */
-		  high = mid;
-		}
-		else if (sample < 0xffd0)
-		{
-		  /* Repeat search in top half. */
-		  low = mid + 1;
-		}
-		else
-		{
-		  /* Found it, exit while loop */
-		  break;
-		}
-	}
-	adc_debug("adc->CAL = %x\n", adc->CAL);
+        /* Check result and decide in which part to repeat search */
+        /* Compare with a value atleast one LSB's less than top to avoid overshooting */
+        /* Since oversampling is used, the result is 16 bits, but a couple of lsb's */
+        /* applies to the 12 bit result value, if 0xffe is the top value in 12 bit, this */
+        /* is in turn 0xffe0 in the 16 bit result. */
+        /* Calibration register has positive effect on result */
+        if (sample > 0xffd0)
+        {
+          /* Repeat search in bottom half. */
+          high = mid;
+        }
+        else if (sample < 0xffd0)
+        {
+          /* Repeat search in top half. */
+          low = mid + 1;
+        }
+        else
+        {
+          /* Found it, exit while loop */
+          break;
+        }
+    }
+    adc_debug("adc->CAL = %x\n", adc->CAL);
 
-	return adc->CAL;
+    return adc->CAL;
 }
 
 /***************************************************************************//**
@@ -217,52 +217,52 @@ rt_uint32_t efm32_adc_calibration(
  *   DMA channel
  ******************************************************************************/
 void efm32_adc_cfg_dma(
-		ADC_TypeDef 			*adc_device,
-		rt_uint8_t 				mode,
-		rt_uint8_t 				channel)
+        ADC_TypeDef             *adc_device,
+        rt_uint8_t              mode,
+        rt_uint8_t              channel)
 {
-	DMA_CfgChannel_TypeDef	chnlCfg;
-	DMA_CfgDescr_TypeDef	descrCfg;
+    DMA_CfgChannel_TypeDef  chnlCfg;
+    DMA_CfgDescr_TypeDef    descrCfg;
 
-	if (channel == (rt_uint8_t)EFM32_NO_DMA)
-	{
-		return;
-	}
+    if (channel == (rt_uint8_t)EFM32_NO_DMA)
+    {
+        return;
+    }
 
-	/* Set up DMA channel */
-	chnlCfg.highPri 	= false;
-	chnlCfg.enableInt	= false;
-	if (adc_device == ADC0)
-	{
-		switch (mode & ADC_MASK_MODE)
-		{
-		case ADC_MODE_SINGLE:
-			chnlCfg.select = DMAREQ_ADC0_SINGLE;
-			break;
+    /* Set up DMA channel */
+    chnlCfg.highPri     = false;
+    chnlCfg.enableInt   = false;
+    if (adc_device == ADC0)
+    {
+        switch (mode & ADC_MASK_MODE)
+        {
+        case ADC_MODE_SINGLE:
+            chnlCfg.select = DMAREQ_ADC0_SINGLE;
+            break;
 
-		case ADC_MODE_SCAN:
-			chnlCfg.select = DMAREQ_ADC0_SCAN;
-			break;
+        case ADC_MODE_SCAN:
+            chnlCfg.select = DMAREQ_ADC0_SCAN;
+            break;
 
-		default:
-			return;
-		}
-	}
-	else
-	{
-		// TODO: Any other channel?
-		return;
-	}
-	chnlCfg.cb			= RT_NULL;
-	DMA_CfgChannel((rt_uint32_t)channel, &chnlCfg);
+        default:
+            return;
+        }
+    }
+    else
+    {
+        // TODO: Any other channel?
+        return;
+    }
+    chnlCfg.cb          = RT_NULL;
+    DMA_CfgChannel((rt_uint32_t)channel, &chnlCfg);
 
-	/* Setting up DMA channel descriptor */
-	descrCfg.dstInc 	= dmaDataInc4;
-	descrCfg.srcInc 	= dmaDataIncNone;
-	descrCfg.size		= dmaDataSize4;
-	descrCfg.arbRate	= dmaArbitrate1;
-	descrCfg.hprot		= 0;
-	DMA_CfgDescr((rt_uint32_t)channel, true, &descrCfg);
+    /* Setting up DMA channel descriptor */
+    descrCfg.dstInc     = dmaDataInc4;
+    descrCfg.srcInc     = dmaDataIncNone;
+    descrCfg.size       = dmaDataSize4;
+    descrCfg.arbRate    = dmaArbitrate1;
+    descrCfg.hprot      = 0;
+    DMA_CfgDescr((rt_uint32_t)channel, true, &descrCfg);
 }
 
 /***************************************************************************//**
@@ -289,38 +289,38 @@ void efm32_adc_cfg_dma(
  *   Pointer to ADC results buffer
  ******************************************************************************/
 void efm32_adc_on_dma(
-		ADC_TypeDef 			*adc_device,
-		rt_uint8_t 				mode,
-		rt_uint8_t 				count,
-		rt_uint8_t 				channel,
-		void 					*buffer)
+        ADC_TypeDef             *adc_device,
+        rt_uint8_t              mode,
+        rt_uint8_t              count,
+        rt_uint8_t              channel,
+        void                    *buffer)
 {
-	switch (mode & ADC_MASK_MODE)
-	{
-	case ADC_MODE_SINGLE:
-		/* Activate DMA */
-		DMA_ActivateBasic(
-			(rt_uint32_t)channel,
-			true,
-			false,
-			buffer,
-			(void *)&(adc_device->SINGLEDATA),
-			count - 1);
-		break;
+    switch (mode & ADC_MASK_MODE)
+    {
+    case ADC_MODE_SINGLE:
+        /* Activate DMA */
+        DMA_ActivateBasic(
+            (rt_uint32_t)channel,
+            true,
+            false,
+            buffer,
+            (void *)&(adc_device->SINGLEDATA),
+            count - 1);
+        break;
 
-	case ADC_MODE_SCAN:
-		DMA_ActivateBasic(
-			(rt_uint32_t)channel,
-			true,
-			false,
-			buffer,
-			(void *)&(adc_device->SCANDATA),
-			count - 1);
-		break;
+    case ADC_MODE_SCAN:
+        DMA_ActivateBasic(
+            (rt_uint32_t)channel,
+            true,
+            false,
+            buffer,
+            (void *)&(adc_device->SCANDATA),
+            count - 1);
+        break;
 
-	default:
-		return;
-	}
+    default:
+        return;
+    }
 }
 
 /***************************************************************************//**
@@ -339,468 +339,468 @@ void efm32_adc_on_dma(
  ******************************************************************************/
  static rt_err_t rt_adc_init(rt_device_t dev)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	rt_uint32_t temp;
+    rt_uint32_t temp;
 
-	struct efm32_adc_device_t *adc;
+    struct efm32_adc_device_t *adc;
 
-	adc = (struct efm32_adc_device_t *)(dev->user_data);
+    adc = (struct efm32_adc_device_t *)(dev->user_data);
 
-	temp = efm32_adc_calibration(adc->adc_device, ADC_CALI_REF, ADC_CALI_CH);
+    temp = efm32_adc_calibration(adc->adc_device, ADC_CALI_REF, ADC_CALI_CH);
 
-	adc_debug("adc->CAL = %x\n", temp);
-	return RT_EOK;
+    adc_debug("adc->CAL = %x\n", temp);
+    return RT_EOK;
 }
 
 /***************************************************************************//**
  * @brief
- *	Configure ADC device
+ *  Configure ADC device
  *
  * @details
  *
  * @note
  *
  * @param[in] dev
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] cmd
- *	ADC control command
+ *  ADC control command
  *
  * @param[in] args
- *	Arguments
+ *  Arguments
  *
  * @return
- *	Error code
+ *  Error code
  ******************************************************************************/
 static rt_err_t rt_adc_control(
-	rt_device_t 	dev,
-	rt_uint8_t 		cmd,
-	void 			*args)
+    rt_device_t     dev,
+    rt_uint8_t      cmd,
+    void            *args)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_adc_device_t *adc;
+    struct efm32_adc_device_t *adc;
 
-	adc = (struct efm32_adc_device_t *)(dev->user_data);
+    adc = (struct efm32_adc_device_t *)(dev->user_data);
 
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* Suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		adc->adc_device->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP;
-		break;
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* Suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        adc->adc_device->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP;
+        break;
 
-	case RT_DEVICE_CTRL_RESUME:
-		{
-			/* Resume device */
-			struct efm32_adc_result_t *control = \
-				(struct efm32_adc_result_t *)args;
+    case RT_DEVICE_CTRL_RESUME:
+        {
+            /* Resume device */
+            struct efm32_adc_result_t *control = \
+                (struct efm32_adc_result_t *)args;
 
-			dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+            dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
 
-			switch (control->mode)
-			{
-			case ADC_MODE_SINGLE:
-				if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-				{
-					efm32_adc_on_dma(
-						adc->adc_device,
-						control->mode,
-						adc->singleCount,
-						adc->singleDmaChannel,
-						control->buffer);
-				}
-				ADC_Start(adc->adc_device, adcStartSingle);
-				break;
+            switch (control->mode)
+            {
+            case ADC_MODE_SINGLE:
+                if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                {
+                    efm32_adc_on_dma(
+                        adc->adc_device,
+                        control->mode,
+                        adc->singleCount,
+                        adc->singleDmaChannel,
+                        control->buffer);
+                }
+                ADC_Start(adc->adc_device, adcStartSingle);
+                break;
 
-			case ADC_MODE_SCAN:
-				if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-				{
-					efm32_adc_on_dma(
-						adc->adc_device,
-						control->mode,
-						adc->scanCount,
-						adc->scanDmaChannel,
-						control->buffer);
-				}
-				ADC_Start(adc->adc_device, adcStartScan);
-				break;
+            case ADC_MODE_SCAN:
+                if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                {
+                    efm32_adc_on_dma(
+                        adc->adc_device,
+                        control->mode,
+                        adc->scanCount,
+                        adc->scanDmaChannel,
+                        control->buffer);
+                }
+                ADC_Start(adc->adc_device, adcStartScan);
+                break;
 
-			case ADC_MODE_TAILGATE:
-				{
-					void *index = control->buffer;
+            case ADC_MODE_TAILGATE:
+                {
+                    void *index = control->buffer;
 
-					if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-					{
-						efm32_adc_on_dma(
-							adc->adc_device,
-							control->mode,
-							adc->scanCount,
-							adc->scanDmaChannel,
-							index);
-						index += adc->scanCount;
-					}
-					if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-					{
-						efm32_adc_on_dma(
-							adc->adc_device,
-							control->mode,
-							adc->singleCount,
-							adc->singleDmaChannel,
-							index);
-						index += adc->singleCount;
-					}
-					ADC_Start(adc->adc_device, adcStartScanAndSingle);
-				}
+                    if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                    {
+                        efm32_adc_on_dma(
+                            adc->adc_device,
+                            control->mode,
+                            adc->scanCount,
+                            adc->scanDmaChannel,
+                            index);
+                        index += adc->scanCount;
+                    }
+                    if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                    {
+                        efm32_adc_on_dma(
+                            adc->adc_device,
+                            control->mode,
+                            adc->singleCount,
+                            adc->singleDmaChannel,
+                            index);
+                        index += adc->singleCount;
+                    }
+                    ADC_Start(adc->adc_device, adcStartScanAndSingle);
+                }
 
-				break;
+                break;
 
-			default:
-				return -RT_ERROR;
-			}
-		}
-		break;
+            default:
+                return -RT_ERROR;
+            }
+        }
+        break;
 
-	case RT_DEVICE_CTRL_ADC_MODE:
-		{
-			/* change device setting */
-			struct efm32_adc_control_t *control = \
-				(struct efm32_adc_control_t *)args;
+    case RT_DEVICE_CTRL_ADC_MODE:
+        {
+            /* change device setting */
+            struct efm32_adc_control_t *control = \
+                (struct efm32_adc_control_t *)args;
 
-			switch (control->mode)
-			{
-			case ADC_MODE_SINGLE:
-				ADC_InitSingle(adc->adc_device, control->single.init);
-				break;
+            switch (control->mode)
+            {
+            case ADC_MODE_SINGLE:
+                ADC_InitSingle(adc->adc_device, control->single.init);
+                break;
 
-			case ADC_MODE_SCAN:
-				ADC_InitScan(adc->adc_device, control->scan.init);
-				break;
+            case ADC_MODE_SCAN:
+                ADC_InitScan(adc->adc_device, control->scan.init);
+                break;
 
-			case ADC_MODE_TAILGATE:
-				ADC_InitSingle(adc->adc_device, control->single.init);
-				ADC_InitScan(adc->adc_device, control->scan.init);
-				break;
+            case ADC_MODE_TAILGATE:
+                ADC_InitSingle(adc->adc_device, control->single.init);
+                ADC_InitScan(adc->adc_device, control->scan.init);
+                break;
 
-			default:
-				return -RT_ERROR;
-			}
+            default:
+                return -RT_ERROR;
+            }
 
-			if (control->mode == ADC_MODE_TAILGATE)
-			{
-				adc->mode = ADC_MODE_TAILGATE;
-			}
-			else
-			{
-				adc->mode &= ~(rt_uint8_t)ADC_MODE_TAILGATE;
-				adc->mode |= control->mode;
-			}
-			if ((control->mode == ADC_MODE_TAILGATE) || \
-				(control->mode == ADC_MODE_SINGLE))
-			{
-				if (control->single.init->rep)
-				{
-					adc->mode |= ADC_OP_SINGLE_REPEAT;
-				}
-				adc->singleCount = control->single.count;
-				adc->singleDmaChannel = control->single.dmaChannel;
-				efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->singleDmaChannel);
-			}
-			if ((control->mode == ADC_MODE_TAILGATE) || \
-				(control->mode == ADC_MODE_SCAN))
-			{
-				if (control->scan.init->rep)
-				{
-					adc->mode |= ADC_OP_SCAN_REPEAT;
-				}
-				adc->scanCount = control->scan.count;
-				adc->scanDmaChannel = control->scan.dmaChannel;
-				efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->scanDmaChannel);
-			}
-		}
-		break;
+            if (control->mode == ADC_MODE_TAILGATE)
+            {
+                adc->mode = ADC_MODE_TAILGATE;
+            }
+            else
+            {
+                adc->mode &= ~(rt_uint8_t)ADC_MODE_TAILGATE;
+                adc->mode |= control->mode;
+            }
+            if ((control->mode == ADC_MODE_TAILGATE) || \
+                (control->mode == ADC_MODE_SINGLE))
+            {
+                if (control->single.init->rep)
+                {
+                    adc->mode |= ADC_OP_SINGLE_REPEAT;
+                }
+                adc->singleCount = control->single.count;
+                adc->singleDmaChannel = control->single.dmaChannel;
+                efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->singleDmaChannel);
+            }
+            if ((control->mode == ADC_MODE_TAILGATE) || \
+                (control->mode == ADC_MODE_SCAN))
+            {
+                if (control->scan.init->rep)
+                {
+                    adc->mode |= ADC_OP_SCAN_REPEAT;
+                }
+                adc->scanCount = control->scan.count;
+                adc->scanDmaChannel = control->scan.dmaChannel;
+                efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->scanDmaChannel);
+            }
+        }
+        break;
 
-	case RT_DEVICE_CTRL_ADC_RESULT:
-		{
-			struct efm32_adc_result_t *control = \
-				(struct efm32_adc_result_t *)args;
+    case RT_DEVICE_CTRL_ADC_RESULT:
+        {
+            struct efm32_adc_result_t *control = \
+                (struct efm32_adc_result_t *)args;
 
-			switch (control->mode)
-			{
-			case ADC_MODE_SINGLE:
-				if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-				{
-					if (adc->mode & ADC_OP_SINGLE_REPEAT)
-					{
-						if (!(DMA->IF & (1 << adc->singleDmaChannel)))
-						{
-							efm32_adc_on_dma(
-								adc->adc_device,
-								control->mode,
-								adc->singleCount,
-								adc->singleDmaChannel,
-								control->buffer);
-						}
-						while (!(DMA->IF & (1 << adc->singleDmaChannel)));
-					}
-					else
-					{
-						while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
-					}
-				}
-				else
-				{
-					while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
-					*((rt_uint32_t *)control->buffer) = \
-						ADC_DataSingleGet(adc->adc_device) << adcErrataShift;
-				}
-				break;
+            switch (control->mode)
+            {
+            case ADC_MODE_SINGLE:
+                if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                {
+                    if (adc->mode & ADC_OP_SINGLE_REPEAT)
+                    {
+                        if (!(DMA->IF & (1 << adc->singleDmaChannel)))
+                        {
+                            efm32_adc_on_dma(
+                                adc->adc_device,
+                                control->mode,
+                                adc->singleCount,
+                                adc->singleDmaChannel,
+                                control->buffer);
+                        }
+                        while (!(DMA->IF & (1 << adc->singleDmaChannel)));
+                    }
+                    else
+                    {
+                        while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
+                    }
+                }
+                else
+                {
+                    while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
+                    *((rt_uint32_t *)control->buffer) = \
+                        ADC_DataSingleGet(adc->adc_device) << adcErrataShift;
+                }
+                break;
 
-			case ADC_MODE_SCAN:
-				if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-				{
-					if (adc->mode & ADC_OP_SCAN_REPEAT)
-					{
-						if (!(DMA->IF & (1 << adc->scanDmaChannel)))
-						{
-							efm32_adc_on_dma(
-								adc->adc_device,
-								control->mode,
-								adc->scanCount,
-								adc->scanDmaChannel,
-								control->buffer);
-						}
-						while (!(DMA->IF & (1 << adc->scanDmaChannel)));
-					}
-					else
-					{
-						while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
-					}
-				}
-				else
-				{
-					while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
-					*((rt_uint32_t *)control->buffer) = \
-						ADC_DataScanGet(adc->adc_device) << adcErrataShift;
-				}
-				break;
+            case ADC_MODE_SCAN:
+                if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                {
+                    if (adc->mode & ADC_OP_SCAN_REPEAT)
+                    {
+                        if (!(DMA->IF & (1 << adc->scanDmaChannel)))
+                        {
+                            efm32_adc_on_dma(
+                                adc->adc_device,
+                                control->mode,
+                                adc->scanCount,
+                                adc->scanDmaChannel,
+                                control->buffer);
+                        }
+                        while (!(DMA->IF & (1 << adc->scanDmaChannel)));
+                    }
+                    else
+                    {
+                        while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
+                    }
+                }
+                else
+                {
+                    while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
+                    *((rt_uint32_t *)control->buffer) = \
+                        ADC_DataScanGet(adc->adc_device) << adcErrataShift;
+                }
+                break;
 
-			case ADC_MODE_TAILGATE:
-				{
-					void *index = control->buffer;
+            case ADC_MODE_TAILGATE:
+                {
+                    void *index = control->buffer;
 
-					if ((adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \
-						!(adc->mode & ADC_OP_SCAN_REPEAT))
-					{
-						index += adc->scanCount;
-					}
-					if ((adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \
-						!(adc->mode & ADC_OP_SINGLE_REPEAT))
-					{
-						index += adc->singleCount;
-					}
+                    if ((adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \
+                        !(adc->mode & ADC_OP_SCAN_REPEAT))
+                    {
+                        index += adc->scanCount;
+                    }
+                    if ((adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \
+                        !(adc->mode & ADC_OP_SINGLE_REPEAT))
+                    {
+                        index += adc->singleCount;
+                    }
 
-					if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-					{
-						if (adc->mode & ADC_OP_SCAN_REPEAT)
-						{
-							if (!(DMA->IF & (1 << adc->scanDmaChannel)))
-							{
-								efm32_adc_on_dma(
-									adc->adc_device,
-									control->mode,
-									adc->scanCount,
-									adc->scanDmaChannel,
-									index);
-								index += adc->scanCount;
-							}
-							while (!(DMA->IF & (1 << adc->scanDmaChannel)));
-						}
-						else
-						{
-							while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
-						}
-					}
-					else
-					{
-						while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
-						*(rt_uint32_t *)(index++) = \
-							ADC_DataScanGet(adc->adc_device) << adcErrataShift;
-					}
-					if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-					{
-						if (adc->mode & ADC_OP_SINGLE_REPEAT)
-						{
-							if (!(DMA->IF & (1 << adc->singleDmaChannel)))
-							{
-								efm32_adc_on_dma(
-									adc->adc_device,
-									control->mode,
-									adc->singleCount,
-									adc->singleDmaChannel,
-									index);
-								index += adc->singleCount;
-							}
-							while (!(DMA->IF & (1 << adc->singleDmaChannel)));
-						}
-						else
-						{
-							while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
-						}
-					}
-					else
-					{
-						while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
-						*(rt_uint32_t *)(index++) = \
-							ADC_DataSingleGet(adc->adc_device) << adcErrataShift;
-					}
-				}
-				break;
+                    if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                    {
+                        if (adc->mode & ADC_OP_SCAN_REPEAT)
+                        {
+                            if (!(DMA->IF & (1 << adc->scanDmaChannel)))
+                            {
+                                efm32_adc_on_dma(
+                                    adc->adc_device,
+                                    control->mode,
+                                    adc->scanCount,
+                                    adc->scanDmaChannel,
+                                    index);
+                                index += adc->scanCount;
+                            }
+                            while (!(DMA->IF & (1 << adc->scanDmaChannel)));
+                        }
+                        else
+                        {
+                            while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
+                        }
+                    }
+                    else
+                    {
+                        while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
+                        *(rt_uint32_t *)(index++) = \
+                            ADC_DataScanGet(adc->adc_device) << adcErrataShift;
+                    }
+                    if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                    {
+                        if (adc->mode & ADC_OP_SINGLE_REPEAT)
+                        {
+                            if (!(DMA->IF & (1 << adc->singleDmaChannel)))
+                            {
+                                efm32_adc_on_dma(
+                                    adc->adc_device,
+                                    control->mode,
+                                    adc->singleCount,
+                                    adc->singleDmaChannel,
+                                    index);
+                                index += adc->singleCount;
+                            }
+                            while (!(DMA->IF & (1 << adc->singleDmaChannel)));
+                        }
+                        else
+                        {
+                            while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
+                        }
+                    }
+                    else
+                    {
+                        while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
+                        *(rt_uint32_t *)(index++) = \
+                            ADC_DataSingleGet(adc->adc_device) << adcErrataShift;
+                    }
+                }
+                break;
 
-			default:
-				return -RT_ERROR;
-			}
-		}
-		break;
+            default:
+                return -RT_ERROR;
+            }
+        }
+        break;
 
-	default:
-		return -RT_ERROR;
-	}
+    default:
+        return -RT_ERROR;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
  * @brief
- *	Register ADC device
+ *  Register ADC device
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] name
- *	Device name
+ *  Device name
  *
  * @param[in] flag
- *	Configuration flags
+ *  Configuration flags
  *
  * @param[in] adc
- *	Pointer to ADC device descriptor
+ *  Pointer to ADC device descriptor
  *
  * @return
- *	Error code
+ *  Error code
  ******************************************************************************/
 rt_err_t rt_hw_adc_register(
-	rt_device_t		device,
-	const char		*name,
-	rt_uint32_t		flag,
-	struct efm32_adc_device_t *adc)
+    rt_device_t     device,
+    const char      *name,
+    rt_uint32_t     flag,
+    struct efm32_adc_device_t *adc)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	device->type 		= RT_Device_Class_Char; /* fixme: should be adc type */
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_adc_init;
-	device->open		= RT_NULL;
-	device->close		= RT_NULL;
-	device->read 		= RT_NULL;
-	device->write 		= RT_NULL;
-	device->control 	= rt_adc_control;
-	device->user_data	= adc;
+    device->type        = RT_Device_Class_Char; /* fixme: should be adc type */
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = rt_adc_init;
+    device->open        = RT_NULL;
+    device->close       = RT_NULL;
+    device->read        = RT_NULL;
+    device->write       = RT_NULL;
+    device->control     = rt_adc_control;
+    device->user_data   = adc;
 
-	/* register a character device */
-	return rt_device_register(device, name, flag);
+    /* register a character device */
+    return rt_device_register(device, name, flag);
 }
 
 /***************************************************************************//**
  * @brief
- *	Initialize the specified ADC unit
+ *  Initialize the specified ADC unit
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] unitNumber
- *	Unit number
+ *  Unit number
  *
  * @return
- *	Pointer to ADC device
+ *  Pointer to ADC device
  ******************************************************************************/
 static struct efm32_adc_device_t *rt_hw_adc_unit_init(
-	rt_device_t device,
-	rt_uint8_t 	unitNumber)
+    rt_device_t device,
+    rt_uint8_t  unitNumber)
 {
-	struct efm32_adc_device_t 		*adc;
-	CMU_Clock_TypeDef				adcClock;
-	ADC_Init_TypeDef 				init = ADC_INIT_DEFAULT;
+    struct efm32_adc_device_t       *adc;
+    CMU_Clock_TypeDef               adcClock;
+    ADC_Init_TypeDef                init = ADC_INIT_DEFAULT;
 
-	do
-	{
-		/* Allocate device and set default value */
-		adc = rt_malloc(sizeof(struct efm32_adc_device_t));
-		if (adc == RT_NULL)
-		{
-			adc_debug("no memory for ADC%d driver\n", unitNumber);
-			break;
-		}
-		adc->mode 				= 0;
-		adc->singleCount 		= 0;
-		adc->singleDmaChannel 	= (rt_uint8_t)EFM32_NO_DMA;
-		adc->scanCount 			= 0;
-		adc->scanDmaChannel 	= (rt_uint8_t)EFM32_NO_DMA;
+    do
+    {
+        /* Allocate device and set default value */
+        adc = rt_malloc(sizeof(struct efm32_adc_device_t));
+        if (adc == RT_NULL)
+        {
+            adc_debug("no memory for ADC%d driver\n", unitNumber);
+            break;
+        }
+        adc->mode               = 0;
+        adc->singleCount        = 0;
+        adc->singleDmaChannel   = (rt_uint8_t)EFM32_NO_DMA;
+        adc->scanCount          = 0;
+        adc->scanDmaChannel     = (rt_uint8_t)EFM32_NO_DMA;
 
-		/* Initialization */
-		if (unitNumber >= ADC_COUNT)
-		{
-			break;
-		}
-		switch (unitNumber)
-		{
-		case 0:
-			adc->adc_device 	= ADC0;
-			adcClock 			= (CMU_Clock_TypeDef)cmuClock_ADC0;
-			break;
+        /* Initialization */
+        if (unitNumber >= ADC_COUNT)
+        {
+            break;
+        }
+        switch (unitNumber)
+        {
+        case 0:
+            adc->adc_device     = ADC0;
+            adcClock            = (CMU_Clock_TypeDef)cmuClock_ADC0;
+            break;
 
-		default:
-			break;
-		}
+        default:
+            break;
+        }
 
-		/* Enable ADC clock */
-		CMU_ClockEnable(adcClock, true);
+        /* Enable ADC clock */
+        CMU_ClockEnable(adcClock, true);
 
-		/* Reset */
-		ADC_Reset(adc->adc_device);
+        /* Reset */
+        ADC_Reset(adc->adc_device);
 
-		/* Configure ADC */
-		// TODO: Fixed oversampling rate?
-		init.ovsRateSel 		= adcOvsRateSel4096;
-		init.timebase			= ADC_TimebaseCalc(0);
-		init.prescale			= ADC_PrescaleCalc(ADC_CONVERT_FREQUENCY, 0);
-		ADC_Init(adc->adc_device, &init);
+        /* Configure ADC */
+        // TODO: Fixed oversampling rate?
+        init.ovsRateSel         = adcOvsRateSel4096;
+        init.timebase           = ADC_TimebaseCalc(0);
+        init.prescale           = ADC_PrescaleCalc(ADC_CONVERT_FREQUENCY, 0);
+        ADC_Init(adc->adc_device, &init);
 
-		return adc;
-	} while(0);
+        return adc;
+    } while(0);
 
-	if (adc)
-	{
-		rt_free(adc);
-	}
-	rt_kprintf("ADC: Init failed!\n");
-	return RT_NULL;
+    if (adc)
+    {
+        rt_free(adc);
+    }
+    rt_kprintf("ADC: Init failed!\n");
+    return RT_NULL;
 }
 
 /***************************************************************************//**
  * @brief
- *	Initialize all ADC module related hardware and register ADC device to kernel
+ *  Initialize all ADC module related hardware and register ADC device to kernel
  *
  * @details
  *
@@ -809,23 +809,23 @@ static struct efm32_adc_device_t *rt_hw_adc_unit_init(
  ******************************************************************************/
 void rt_hw_adc_init(void)
 {
-	SYSTEM_ChipRevision_TypeDef	chipRev;
-	struct efm32_adc_device_t 	*adc;
+    SYSTEM_ChipRevision_TypeDef chipRev;
+    struct efm32_adc_device_t   *adc;
 
 #ifdef RT_USING_ADC0
-	if ((adc = rt_hw_adc_unit_init(&adc0_device, 0)) != RT_NULL)
-	{
-		rt_hw_adc_register(&adc0_device, RT_ADC0_NAME, EFM32_NO_DATA, adc);
-	}
+    if ((adc = rt_hw_adc_unit_init(&adc0_device, 0)) != RT_NULL)
+    {
+        rt_hw_adc_register(&adc0_device, RT_ADC0_NAME, EFM32_NO_DATA, adc);
+    }
 #endif
 
-	/* ADC errata for rev B when using VDD as reference, need to multiply */
-	/* result by 2 */
-	SYSTEM_ChipRevisionGet(&chipRev);
-	if ((chipRev.major == 0x01) && (chipRev.minor == 0x01))
-	{
-	  adcErrataShift = 1;
-	}
+    /* ADC errata for rev B when using VDD as reference, need to multiply */
+    /* result by 2 */
+    SYSTEM_ChipRevisionGet(&chipRev);
+    if ((chipRev.major == 0x01) && (chipRev.minor == 0x01))
+    {
+      adcErrataShift = 1;
+    }
 }
 
 #endif
diff --git a/bsp/efm32/drv_adc.h b/bsp/efm32/drv_adc.h
index b3b81d94e1..f15d074835 100644
--- a/bsp/efm32/drv_adc.h
+++ b/bsp/efm32/drv_adc.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_adc.h
- * @brief 	ADC driver of RT-Thread RTOS for EFM32
+ * @file    drv_adc.h
+ * @brief   ADC driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,9 +10,9 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-02-21	onelife		Initial creation for EFM32
- * 2011-07-14	onelife		Add multiple channels support for scan mode
+ * Date         Author      Notes
+ * 2011-02-21   onelife     Initial creation for EFM32
+ * 2011-07-14   onelife     Add multiple channels support for scan mode
  ******************************************************************************/
 #ifndef __DRV_ADC_H__
 #define __DRV_ADC_H__
@@ -21,50 +21,50 @@
 /* Exported types ------------------------------------------------------------*/
 struct efm32_adc_device_t
 {
-	ADC_TypeDef 			*adc_device;
-	rt_uint8_t 				mode;
-	rt_uint8_t 				singleCount;
-	rt_uint8_t 				singleDmaChannel;
-	rt_uint8_t 				scanCount;
-	rt_uint8_t 				scanDmaChannel;
+    ADC_TypeDef             *adc_device;
+    rt_uint8_t              mode;
+    rt_uint8_t              singleCount;
+    rt_uint8_t              singleDmaChannel;
+    rt_uint8_t              scanCount;
+    rt_uint8_t              scanDmaChannel;
 };
 
 struct efm32_adc_control_single_t
 {
-	rt_uint8_t				count;
-	rt_uint8_t 				dmaChannel;
-	ADC_InitSingle_TypeDef	*init;
+    rt_uint8_t              count;
+    rt_uint8_t              dmaChannel;
+    ADC_InitSingle_TypeDef  *init;
 };
 
 struct efm32_adc_control_scan_t
 {
-	rt_uint8_t				count;
-	rt_uint8_t 				dmaChannel;
-	ADC_InitScan_TypeDef	*init;
+    rt_uint8_t              count;
+    rt_uint8_t              dmaChannel;
+    ADC_InitScan_TypeDef    *init;
 };
 
 struct efm32_adc_control_t
 {
-	rt_uint8_t 				mode;
-	struct efm32_adc_control_scan_t 	scan;
-	struct efm32_adc_control_single_t 	single;
+    rt_uint8_t              mode;
+    struct efm32_adc_control_scan_t     scan;
+    struct efm32_adc_control_single_t   single;
 };
 
 struct efm32_adc_result_t
 {
-	rt_uint8_t 				mode;
-	void 					*buffer;
+    rt_uint8_t              mode;
+    void                    *buffer;
 };
 
 /* Exported constants --------------------------------------------------------*/
 /* Exported macro ------------------------------------------------------------*/
-#define ADC_MODE_SINGLE 		(0x01)
-#define ADC_MODE_SCAN 			(0x02)
-#define ADC_MODE_TAILGATE		(0x04)
-#define ADC_OP_SINGLE_REPEAT	(0x10)
-#define ADC_OP_SCAN_REPEAT		(0x20)
-#define ADC_MASK_MODE			(0x0f)
-#define ADC_MASK_OP				(0xf0)
+#define ADC_MODE_SINGLE         (0x01)
+#define ADC_MODE_SCAN           (0x02)
+#define ADC_MODE_TAILGATE       (0x04)
+#define ADC_OP_SINGLE_REPEAT    (0x10)
+#define ADC_OP_SCAN_REPEAT      (0x20)
+#define ADC_MASK_MODE           (0x0f)
+#define ADC_MASK_OP             (0xf0)
 
 /* Exported functions ------------------------------------------------------- */
 void rt_hw_adc_init(void);
diff --git a/bsp/efm32/drv_emu.c b/bsp/efm32/drv_emu.c
index 9a5fc8e97e..18eeca1a43 100644
--- a/bsp/efm32/drv_emu.c
+++ b/bsp/efm32/drv_emu.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_emu.c
- * @brief 	EMU driver of RT-Thread RTOS for EFM32
+ * @file    drv_emu.c
+ * @brief   EMU driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,8 +10,8 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2012-02-21	onelife		Initial creation for EFM32
+ * Date         Author      Notes
+ * 2012-02-21   onelife     Initial creation for EFM32
  ******************************************************************************/
 
 /***************************************************************************//**
@@ -27,7 +27,7 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef EFM32_EMU_DEBUG
-#define emu_debug(format,args...) 			rt_kprintf(format, ##args)
+#define emu_debug(format,args...)           rt_kprintf(format, ##args)
 #else
 #define emu_debug(format,args...)
 #endif
@@ -176,7 +176,7 @@ void emu_em4_enable(void)
 
 /***************************************************************************//**
  * @brief
- *	Initialize EMU module related hardware
+ *  Initialize EMU module related hardware
  *
  * @details
  *
@@ -213,22 +213,22 @@ void efm32_emu_init(void)
             break;
         }
 
-    	/* init thread */
+        /* init thread */
         if (rt_thread_init(
             &emu_task.thread,
             "EMU",
-    		emu_task_main_loop, (void *)&emu_task,
+            emu_task_main_loop, (void *)&emu_task,
             (void *)&emu_task.stack, sizeof(emu_task.stack),
-    		RT_THREAD_PRIORITY_MAX - 2, RT_TICK_PER_SECOND) != RT_EOK)
+            RT_THREAD_PRIORITY_MAX - 2, RT_TICK_PER_SECOND) != RT_EOK)
         {
             break;
         }
 
-    	/* startup */
-    	if (rt_thread_startup(&emu_task.thread) != RT_EOK)
-    	{
+        /* startup */
+        if (rt_thread_startup(&emu_task.thread) != RT_EOK)
+        {
             break;
-    	}
+        }
     } while (0);
 
     rt_kprintf("EMU err: init failed!\n");
diff --git a/bsp/efm32/drv_emu.h b/bsp/efm32/drv_emu.h
index 3e491665ba..df46264295 100644
--- a/bsp/efm32/drv_emu.h
+++ b/bsp/efm32/drv_emu.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_emu.h
- * @brief 	EMU driver of RT-Thread RTOS for EFM32
+ * @file    drv_emu.h
+ * @brief   EMU driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,9 +10,9 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-02-21	onelife		Initial creation for EFM32
- * 2011-07-14	onelife		Add multiple channels support for scan mode
+ * Date         Author      Notes
+ * 2011-02-21   onelife     Initial creation for EFM32
+ * 2011-07-14   onelife     Add multiple channels support for scan mode
  ******************************************************************************/
 #ifndef __DRV_EMU_H__
 #define __DRV_EMU_H__
diff --git a/bsp/efm32/drv_ethernet.c b/bsp/efm32/drv_ethernet.c
index e6bc25bbcc..db99de583a 100644
--- a/bsp/efm32/drv_ethernet.c
+++ b/bsp/efm32/drv_ethernet.c
@@ -1,11 +1,11 @@
 /***************************************************************************//**
- * @file 	drv_ethernet.c
- * @brief 	Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART
+ * @file    drv_ethernet.c
+ * @brief   Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART
  *  module
- * 	 This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet
+ *   This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet
  *  controller with SPI interface.
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -13,11 +13,11 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-06-22	onelife		Initial creation for using EFM32 USART module
- * 2011-07-25	onelife		Add lock (semaphore) to prevent simultaneously
+ * Date         Author      Notes
+ * 2011-06-22   onelife     Initial creation for using EFM32 USART module
+ * 2011-07-25   onelife     Add lock (semaphore) to prevent simultaneously
  *  access
- * 2011-07-28	onelife		Add get_ip() and update_ip() utilities
+ * 2011-07-28   onelife     Add get_ip() and update_ip() utilities
  ******************************************************************************/
 
 /***************************************************************************//**
@@ -38,21 +38,21 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef EFM32_ETHERNET_DEBUG
-#define eth_debug(format,args...) 			rt_kprintf(format, ##args)
+#define eth_debug(format,args...)           rt_kprintf(format, ##args)
 #else
 #define eth_debug(format,args...)
 #endif
 
 /* Private constants ---------------------------------------------------------*/
-static const rt_uint8_t 	eth_addr[ETH_ADDR_LEN] = ETH_ADDR_DEFAULT;
+static const rt_uint8_t     eth_addr[ETH_ADDR_LEN] = ETH_ADDR_DEFAULT;
 
 /* Private variables ---------------------------------------------------------*/
-static struct eth_device 	eth_dev;
-static struct rt_semaphore 	ethLock;
-static rt_uint8_t 			ethBank;
-static rt_uint16_t 			ethNxtPkt;
-static rt_device_t 			spi 			= RT_NULL;
-static rt_bool_t 			ethAutoCs 		= true;
+static struct eth_device    eth_dev;
+static struct rt_semaphore  ethLock;
+static rt_uint8_t           ethBank;
+static rt_uint16_t          ethNxtPkt;
+static rt_device_t          spi             = RT_NULL;
+static rt_bool_t            ethAutoCs       = true;
 
 /* Private function prototypes -----------------------------------------------*/
 /* Private functions ---------------------------------------------------------*/
@@ -69,17 +69,17 @@ static rt_bool_t 			ethAutoCs 		= true;
  ******************************************************************************/
 static void efm_eth_cs(rt_uint8_t enable)
 {
-	if (!ethAutoCs)
-	{
-		if (enable)
-		{
-			GPIO_PinOutClear(ETH_CS_PORT, ETH_CS_PIN);
-		}
-		else
-		{
-			GPIO_PinOutSet(ETH_CS_PORT, ETH_CS_PIN);
-		}
-	}
+    if (!ethAutoCs)
+    {
+        if (enable)
+        {
+            GPIO_PinOutClear(ETH_CS_PORT, ETH_CS_PIN);
+        }
+        else
+        {
+            GPIO_PinOutSet(ETH_CS_PORT, ETH_CS_PIN);
+        }
+    }
 }
 
 /***************************************************************************//**
@@ -103,93 +103,93 @@ static void efm_eth_cs(rt_uint8_t enable)
  *   Error code
  ******************************************************************************/
 static rt_err_t efm_eth_cmd(
-	rt_uint8_t cmd,
-	rt_uint8_t addr,
-	rt_uint8_t *data)
+    rt_uint8_t cmd,
+    rt_uint8_t addr,
+    rt_uint8_t *data)
 {
-	RT_ASSERT(spi != RT_NULL);
+    RT_ASSERT(spi != RT_NULL);
 
-	rt_uint8_t buf_ins[6], buf_res[2];
-	rt_uint8_t len_ins, len_res;
+    rt_uint8_t buf_ins[6], buf_res[2];
+    rt_uint8_t len_ins, len_res;
 
-	len_ins = 0;
-	do
-	{
-		/* Build instruction buffer */
-		/* Check if need to read back */
-		if (cmd == ENC28J60_READ_CTRL_REG)
-		{
-			buf_ins[len_ins++] = 1; 						/* Instruction length */
-		}
-		/* Byte 0: Check if no address section */
-		if (cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM || \
-			cmd == ENC28J60_SOFT_RESET)
-		{
-			buf_ins[len_ins++] = cmd;
-		}
-		else
-		{
-			buf_ins[len_ins++] = cmd | (addr & ADDR_MASK);
-		}
-		/* Byte 1: Check if data section is present */
-		if (cmd == ENC28J60_WRITE_CTRL_REG || cmd == ENC28J60_BIT_FIELD_SET || \
-			cmd == ENC28J60_BIT_FIELD_CLR || cmd == ENC28J60_WRITE_BUF_MEM)
-		{
-			buf_ins[len_ins++] = *data;
-		}
+    len_ins = 0;
+    do
+    {
+        /* Build instruction buffer */
+        /* Check if need to read back */
+        if (cmd == ENC28J60_READ_CTRL_REG)
+        {
+            buf_ins[len_ins++] = 1;                         /* Instruction length */
+        }
+        /* Byte 0: Check if no address section */
+        if (cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM || \
+            cmd == ENC28J60_SOFT_RESET)
+        {
+            buf_ins[len_ins++] = cmd;
+        }
+        else
+        {
+            buf_ins[len_ins++] = cmd | (addr & ADDR_MASK);
+        }
+        /* Byte 1: Check if data section is present */
+        if (cmd == ENC28J60_WRITE_CTRL_REG || cmd == ENC28J60_BIT_FIELD_SET || \
+            cmd == ENC28J60_BIT_FIELD_CLR || cmd == ENC28J60_WRITE_BUF_MEM)
+        {
+            buf_ins[len_ins++] = *data;
+        }
 
-		/* Check if reading */
-		if (cmd == ENC28J60_READ_CTRL_REG)
-		{
-			*(rt_uint8_t **)(&buf_ins[len_ins]) = buf_res; 	/* Pointer to RX buffer */
-			len_ins += 4;
+        /* Check if reading */
+        if (cmd == ENC28J60_READ_CTRL_REG)
+        {
+            *(rt_uint8_t **)(&buf_ins[len_ins]) = buf_res;  /* Pointer to RX buffer */
+            len_ins += 4;
 
-			/* Check if MAC or MII register */
-			if (addr & SPRD_MASK)
-			{
-				len_res = 2;
-			}
-			else
-			{
-				len_res = 1;
-			}
+            /* Check if MAC or MII register */
+            if (addr & SPRD_MASK)
+            {
+                len_res = 2;
+            }
+            else
+            {
+                len_res = 1;
+            }
 
-			/* Send command and get response */
-			efm_eth_cs(1);
-			if (spi->read(spi, ETH_SPI_RX_SKIP, buf_ins, len_res) == 0)
-			{
-				break;
-			}
-			*data = buf_res[len_res - 1];
-//			eth_debug("ETH: read RX %x %x (%d)\n", buf_res[0], buf_res[1], len_res);
-//			eth_debug("ETH: ** read RX %x %x (%d)\n",
-//				buf_res[0], buf_res[1], buf_res[2], buf_res[3], buf_res[4],
-//				buf_res[5], buf_res[6], buf_res[7], buf_res[8], buf_res[9],
-//				len_res);
-		}
-		else
-		{
-//			eth_debug("ETH: ** write TX %x %x %x %x %x %x (%d) \n", buf_ins[0],
-//				buf_ins[1], buf_ins[2], buf_ins[3], buf_ins[4], buf_ins[5],
-//				len_ins);
-			/* Send command and get response */
-			efm_eth_cs(1);
-			if (spi->write(spi, EFM32_NO_DATA, buf_ins, len_ins) == 0)
-			{
-				break;
-			}
-		}
+            /* Send command and get response */
+            efm_eth_cs(1);
+            if (spi->read(spi, ETH_SPI_RX_SKIP, buf_ins, len_res) == 0)
+            {
+                break;
+            }
+            *data = buf_res[len_res - 1];
+//          eth_debug("ETH: read RX %x %x (%d)\n", buf_res[0], buf_res[1], len_res);
+//          eth_debug("ETH: ** read RX %x %x (%d)\n",
+//              buf_res[0], buf_res[1], buf_res[2], buf_res[3], buf_res[4],
+//              buf_res[5], buf_res[6], buf_res[7], buf_res[8], buf_res[9],
+//              len_res);
+        }
+        else
+        {
+//          eth_debug("ETH: ** write TX %x %x %x %x %x %x (%d) \n", buf_ins[0],
+//              buf_ins[1], buf_ins[2], buf_ins[3], buf_ins[4], buf_ins[5],
+//              len_ins);
+            /* Send command and get response */
+            efm_eth_cs(1);
+            if (spi->write(spi, EFM32_NO_DATA, buf_ins, len_ins) == 0)
+            {
+                break;
+            }
+        }
 
-		if (!(cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM))
-		{
-			efm_eth_cs(0);
-		}
-		return RT_EOK;
-	} while(0);
+        if (!(cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM))
+        {
+            efm_eth_cs(0);
+        }
+        return RT_EOK;
+    } while(0);
 
-	eth_debug("ETH: Send command failed!\n");
-	efm_eth_cs(0);
-	return -RT_ERROR;
+    eth_debug("ETH: Send command failed!\n");
+    efm_eth_cs(0);
+    return -RT_ERROR;
 }
 
 /***************************************************************************//**
@@ -213,37 +213,37 @@ static rt_err_t efm_eth_cmd(
  *   Error code
  ******************************************************************************/
 static rt_err_t efm_eth_sendCmd(
-	rt_uint8_t cmd,
-	rt_uint8_t addr,
-	rt_uint8_t *data)
+    rt_uint8_t cmd,
+    rt_uint8_t addr,
+    rt_uint8_t *data)
 {
-	rt_err_t ret;
+    rt_err_t ret;
 
-	eth_debug("ETH: Send command %x (%x %x)\n", cmd, addr, *data);
-	do
-	{
-		/* Change bank */
-		if(((addr & BANK_MASK) != ethBank) && ((addr < EIE) || (addr > ECON1)))
-		{
-			rt_uint8_t temp;
+    eth_debug("ETH: Send command %x (%x %x)\n", cmd, addr, *data);
+    do
+    {
+        /* Change bank */
+        if(((addr & BANK_MASK) != ethBank) && ((addr < EIE) || (addr > ECON1)))
+        {
+            rt_uint8_t temp;
 
-			if ((ret = efm_eth_cmd(ENC28J60_READ_CTRL_REG, ECON1, &temp)) != RT_EOK)
-			{
-				break;
-			}
-			temp &= 0xFC;
-			ethBank = (addr & BANK_MASK);
-			temp |= ethBank >> BANK_SHIFT;
-			if ((ret = efm_eth_cmd(ENC28J60_WRITE_CTRL_REG, ECON1, &temp)) != RT_EOK)
-			{
-				break;
-			}
-		}
-		/* Send command */
-		ret = efm_eth_cmd(cmd, addr, data);
-	} while(0);
+            if ((ret = efm_eth_cmd(ENC28J60_READ_CTRL_REG, ECON1, &temp)) != RT_EOK)
+            {
+                break;
+            }
+            temp &= 0xFC;
+            ethBank = (addr & BANK_MASK);
+            temp |= ethBank >> BANK_SHIFT;
+            if ((ret = efm_eth_cmd(ENC28J60_WRITE_CTRL_REG, ECON1, &temp)) != RT_EOK)
+            {
+                break;
+            }
+        }
+        /* Send command */
+        ret = efm_eth_cmd(cmd, addr, data);
+    } while(0);
 
-	return ret;
+    return ret;
 }
 
 /***************************************************************************//**
@@ -262,11 +262,11 @@ static rt_err_t efm_eth_sendCmd(
  ******************************************************************************/
 static rt_uint8_t efm_eth_readReg(rt_uint8_t addr)
 {
-	rt_uint8_t data;
+    rt_uint8_t data;
 
-	efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, addr, &data);
+    efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, addr, &data);
 
-	return data;
+    return data;
 }
 
 /***************************************************************************//**
@@ -285,7 +285,7 @@ static rt_uint8_t efm_eth_readReg(rt_uint8_t addr)
  ******************************************************************************/
 static void efm_eth_writeReg(rt_uint8_t addr, rt_uint8_t data)
 {
-	efm_eth_sendCmd(ENC28J60_WRITE_CTRL_REG, addr, &data);
+    efm_eth_sendCmd(ENC28J60_WRITE_CTRL_REG, addr, &data);
 }
 
 /***************************************************************************//**
@@ -304,25 +304,25 @@ static void efm_eth_writeReg(rt_uint8_t addr, rt_uint8_t data)
  ******************************************************************************/
 static rt_uint16_t efm_eth_readPhy(rt_uint8_t addr)
 {
-	rt_uint16_t ret;
+    rt_uint16_t ret;
 
-	eth_debug("ETH: *** read PHY %x\n", addr);
+    eth_debug("ETH: *** read PHY %x\n", addr);
 
-	/* Set PHY register address */
-	efm_eth_writeReg(MIREGADR, addr);
+    /* Set PHY register address */
+    efm_eth_writeReg(MIREGADR, addr);
 
-	/* Start read operation */
-	efm_eth_writeReg(MICMD, MICMD_MIIRD);
-	/* Waiting for at least 10.24 uS */
-	while(efm_eth_readReg(MISTAT) & MISTAT_BUSY);
+    /* Start read operation */
+    efm_eth_writeReg(MICMD, MICMD_MIIRD);
+    /* Waiting for at least 10.24 uS */
+    while(efm_eth_readReg(MISTAT) & MISTAT_BUSY);
 
-	/* Stop read operation */
-	efm_eth_writeReg(MICMD, 0x00);
+    /* Stop read operation */
+    efm_eth_writeReg(MICMD, 0x00);
 
-	/* Get the result */
-	ret = (rt_uint16_t)efm_eth_readReg(MIRDL);
-	ret |= (rt_uint16_t)efm_eth_readReg(MIRDH) << 8;
-	return ret;
+    /* Get the result */
+    ret = (rt_uint16_t)efm_eth_readReg(MIRDL);
+    ret |= (rt_uint16_t)efm_eth_readReg(MIRDH) << 8;
+    return ret;
 }
 
 /***************************************************************************//**
@@ -341,82 +341,82 @@ static rt_uint16_t efm_eth_readPhy(rt_uint8_t addr)
  ******************************************************************************/
 static void efm_eth_writePhy(rt_uint8_t addr, rt_uint16_t data)
 {
-	eth_debug("ETH: *** write PHY %x (%x)\n", addr, data);
+    eth_debug("ETH: *** write PHY %x (%x)\n", addr, data);
 
-	/* Set PHY register address */
-	efm_eth_writeReg(MIREGADR, addr);
+    /* Set PHY register address */
+    efm_eth_writeReg(MIREGADR, addr);
 
-	/* Set data */
-	efm_eth_writeReg(MIWRL, data);
-	efm_eth_writeReg(MIWRH, data >> 8);
-	/* Waiting for at least 10.24 uS */
-	while(efm_eth_readReg(MISTAT) & MISTAT_BUSY);
+    /* Set data */
+    efm_eth_writeReg(MIWRL, data);
+    efm_eth_writeReg(MIWRH, data >> 8);
+    /* Waiting for at least 10.24 uS */
+    while(efm_eth_readReg(MISTAT) & MISTAT_BUSY);
 }
 
 /***************************************************************************//**
  * @brief
- *	Interrupt handler of Ethernet device
+ *  Interrupt handler of Ethernet device
  *
  * @details
  *
  * @note
  *
  * @param[in] dev
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  ******************************************************************************/
 void efm_eth_isr(rt_device_t dev)
 {
-	rt_uint8_t reg_eir, data;
-	volatile rt_uint8_t cnt;
+    rt_uint8_t reg_eir, data;
+    volatile rt_uint8_t cnt;
 
-	/* Disable RX and other interrutps */
-	data = EIE_PKTIE | EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
+    /* Disable RX and other interrutps */
+    data = EIE_PKTIE | EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
 
-	/* Get interrupt flag */
-	efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EIR, ®_eir);
+    /* Get interrupt flag */
+    efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EIR, ®_eir);
 
-	data = 0;
-	/* DMA completed */
-	if (reg_eir & EIR_DMAIF)
-	{
-		data |= (rt_uint8_t)EIR_DMAIF;
-	}
-	/* Link Changed */
-	if (reg_eir & EIR_LINKIF)
-	{
-		/* Read PHIR to clear the flag */
-		efm_eth_readPhy(PHIR);
-	}
-	/* TX done */
-	if (reg_eir & EIR_TXIF)
-	{
-		data |= (rt_uint8_t)EIR_TXIF;
-	}
-	/* TX error */
-	if (reg_eir & EIR_TXERIF)
-	{
-		data |= (rt_uint8_t)EIR_TXERIF;
-	}
-	/* RX error */
-	if (reg_eir & EIR_RXERIF)
-	{
-		data |= (rt_uint8_t)EIR_RXERIF;
-	}
-	/* Clear flags */
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
+    data = 0;
+    /* DMA completed */
+    if (reg_eir & EIR_DMAIF)
+    {
+        data |= (rt_uint8_t)EIR_DMAIF;
+    }
+    /* Link Changed */
+    if (reg_eir & EIR_LINKIF)
+    {
+        /* Read PHIR to clear the flag */
+        efm_eth_readPhy(PHIR);
+    }
+    /* TX done */
+    if (reg_eir & EIR_TXIF)
+    {
+        data |= (rt_uint8_t)EIR_TXIF;
+    }
+    /* TX error */
+    if (reg_eir & EIR_TXERIF)
+    {
+        data |= (rt_uint8_t)EIR_TXERIF;
+    }
+    /* RX error */
+    if (reg_eir & EIR_RXERIF)
+    {
+        data |= (rt_uint8_t)EIR_RXERIF;
+    }
+    /* Clear flags */
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
 
-	/* Get packet counter (Errata 6) */
-	efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EPKTCNT, (rt_uint8_t *)&cnt);
-	if (cnt)
-	{
-	    /* Inform Ethernet thread */
-		eth_device_ready(ð_dev);
-	}
+    /* Get packet counter (Errata 6) */
+    efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EPKTCNT, (rt_uint8_t *)&cnt);
+    if (cnt)
+    {
+        /* Inform Ethernet thread */
+        eth_device_ready(ð_dev);
+    }
 
-	/* Enable other interrupts */
-	data = EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
+    /* Enable other interrupts */
+    data = EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
 }
 
 /***************************************************************************//**
@@ -435,119 +435,119 @@ void efm_eth_isr(rt_device_t dev)
  ******************************************************************************/
 static rt_err_t efm_eth_init(rt_device_t dev)
 {
-	rt_uint16_t reg_phy;
-	rt_uint8_t data;
+    rt_uint16_t reg_phy;
+    rt_uint8_t data;
 
-	/* Reset chip select */
-	efm_eth_cs(0);
-	/* Software reset */
-	efm_eth_sendCmd(ENC28J60_SOFT_RESET, EFM32_NO_DATA, EFM32_NO_POINTER);
-	/* Waiting for at least 1 ms (Errata 2) */
-	rt_thread_delay(ETH_PERIOD_WAIT_INIT);
-	ethNxtPkt = RXSTART_INIT;
-	ethBank = 0;
+    /* Reset chip select */
+    efm_eth_cs(0);
+    /* Software reset */
+    efm_eth_sendCmd(ENC28J60_SOFT_RESET, EFM32_NO_DATA, EFM32_NO_POINTER);
+    /* Waiting for at least 1 ms (Errata 2) */
+    rt_thread_delay(ETH_PERIOD_WAIT_INIT);
+    ethNxtPkt = RXSTART_INIT;
+    ethBank = 0;
 
-	/* Init RX buffer */
-	efm_eth_writeReg(ERXSTL, RXSTART_INIT & 0xFF);
-	efm_eth_writeReg(ERXSTH, RXSTART_INIT >> 8);
-	efm_eth_writeReg(ERXNDL, RXSTOP_INIT & 0xFF);
-	efm_eth_writeReg(ERXNDH, RXSTOP_INIT >> 8);
-	efm_eth_writeReg(ERXRDPTL, RXSTOP_INIT & 0xFF);
-	efm_eth_writeReg(ERXRDPTH, RXSTOP_INIT >> 8);
+    /* Init RX buffer */
+    efm_eth_writeReg(ERXSTL, RXSTART_INIT & 0xFF);
+    efm_eth_writeReg(ERXSTH, RXSTART_INIT >> 8);
+    efm_eth_writeReg(ERXNDL, RXSTOP_INIT & 0xFF);
+    efm_eth_writeReg(ERXNDH, RXSTOP_INIT >> 8);
+    efm_eth_writeReg(ERXRDPTL, RXSTOP_INIT & 0xFF);
+    efm_eth_writeReg(ERXRDPTH, RXSTOP_INIT >> 8);
 
-	/* Init TX buffer */
-	efm_eth_writeReg(ETXSTL, TXSTART_INIT & 0xFF);
-	efm_eth_writeReg(ETXSTH, TXSTART_INIT >> 8);
-	efm_eth_writeReg(ETXNDL, TXSTOP_INIT & 0xFF);
-	efm_eth_writeReg(ETXNDH, TXSTOP_INIT >> 8);
-	efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF);
-	efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8);
+    /* Init TX buffer */
+    efm_eth_writeReg(ETXSTL, TXSTART_INIT & 0xFF);
+    efm_eth_writeReg(ETXSTH, TXSTART_INIT >> 8);
+    efm_eth_writeReg(ETXNDL, TXSTOP_INIT & 0xFF);
+    efm_eth_writeReg(ETXNDH, TXSTOP_INIT >> 8);
+    efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF);
+    efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8);
 
-	/* Init RX filters */
-	/* For broadcast packets we allow only ARP packtets
-	   All other packets should be unicast only for our mac (MAADR)
+    /* Init RX filters */
+    /* For broadcast packets we allow only ARP packtets
+       All other packets should be unicast only for our mac (MAADR)
 
-	   The pattern to match on is therefore
-	   Type                    ETH.DST
-	   ARP                     BROADCAST
-	   06 08 -- -- -- -- -- -- ff ff ff ff ff ff
-	   These poitions are: 11 0000 0011 1111 in binary and 30 3f in hex
-	   Checksum for theses bytes is: f7 f9 */
-	efm_eth_writeReg(EPMM0, 0x3f);
-	efm_eth_writeReg(EPMM1, 0x30);
-	efm_eth_writeReg(EPMCSL, 0xf9);
-	efm_eth_writeReg(EPMCSH, 0xf7);
-	efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_PMEN);
-	//efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_BCEN);
-	/* Waiting For OST: The OST does not expire until 7500 OSC1 clock cycles (300 uS)
-	    pass after Power-on Reset or wake-up from Power-Down mode occurs */
+       The pattern to match on is therefore
+       Type                    ETH.DST
+       ARP                     BROADCAST
+       06 08 -- -- -- -- -- -- ff ff ff ff ff ff
+       These poitions are: 11 0000 0011 1111 in binary and 30 3f in hex
+       Checksum for theses bytes is: f7 f9 */
+    efm_eth_writeReg(EPMM0, 0x3f);
+    efm_eth_writeReg(EPMM1, 0x30);
+    efm_eth_writeReg(EPMCSL, 0xf9);
+    efm_eth_writeReg(EPMCSH, 0xf7);
+    efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_PMEN);
+    //efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_BCEN);
+    /* Waiting For OST: The OST does not expire until 7500 OSC1 clock cycles (300 uS)
+        pass after Power-on Reset or wake-up from Power-Down mode occurs */
 
-	/* Init MAC */
-	/* Enable RX, IEEE defined flow control */
-	efm_eth_writeReg(MACON1, MACON1_MARXEN | MACON1_TXPAUS | MACON1_RXPAUS);
-	/* Enable padding to 60 bytes, CRC and frame length status reporting */
+    /* Init MAC */
+    /* Enable RX, IEEE defined flow control */
+    efm_eth_writeReg(MACON1, MACON1_MARXEN | MACON1_TXPAUS | MACON1_RXPAUS);
+    /* Enable padding to 60 bytes, CRC and frame length status reporting */
 #if defined(ETH_HALF_DUPLEX)
-	efm_eth_writeReg(MACON3, MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN);
-	efm_eth_writeReg(MACON4, MACON4_DEFER);
+    efm_eth_writeReg(MACON3, MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN);
+    efm_eth_writeReg(MACON4, MACON4_DEFER);
 #else
-	efm_eth_writeReg(MACON3, \
-		MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX);
+    efm_eth_writeReg(MACON3, \
+        MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX);
 #endif
-	/* Set the maximum packet length */
-	efm_eth_writeReg(MAMXFLL, MAX_FRAMELEN & 0xFF);
-	efm_eth_writeReg(MAMXFLH, MAX_FRAMELEN >> 8);
-	/* Set inter-packet gap (back-to-back). Full-Duplex: 0x15, Half-Duplex: 0x12 */
+    /* Set the maximum packet length */
+    efm_eth_writeReg(MAMXFLL, MAX_FRAMELEN & 0xFF);
+    efm_eth_writeReg(MAMXFLH, MAX_FRAMELEN >> 8);
+    /* Set inter-packet gap (back-to-back). Full-Duplex: 0x15, Half-Duplex: 0x12 */
 #if defined(ETH_HALF_DUPLEX)
-	efm_eth_writeReg(MABBIPG, 0x12);
+    efm_eth_writeReg(MABBIPG, 0x12);
 #else
-	efm_eth_writeReg(MABBIPG, 0x15);
+    efm_eth_writeReg(MABBIPG, 0x15);
 #endif
-	/* Set inter-packet gap (non-back-to-back).
-	    Full-Duplex: 0x0012, Half-Duplex: 0x0C12 */
-	efm_eth_writeReg(MAIPGL, 0x12);
+    /* Set inter-packet gap (non-back-to-back).
+        Full-Duplex: 0x0012, Half-Duplex: 0x0C12 */
+    efm_eth_writeReg(MAIPGL, 0x12);
 #if defined(ETH_HALF_DUPLEX)
-	efm_eth_writeReg(MAIPGH, 0x0C);
-	/* Set retransmission and collision window */
-	efm_eth_writeReg(MACLCON1, 0x0F);
-	efm_eth_writeReg(MACLCON2, 0x37);
+    efm_eth_writeReg(MAIPGH, 0x0C);
+    /* Set retransmission and collision window */
+    efm_eth_writeReg(MACLCON1, 0x0F);
+    efm_eth_writeReg(MACLCON2, 0x37);
 #endif
-	/* Set MAC address
-	    NOTE: MAC address in ENC28J60 is byte-backward */
-	efm_eth_writeReg(MAADR1, eth_addr[0]);
-	efm_eth_writeReg(MAADR2, eth_addr[1]);
-	efm_eth_writeReg(MAADR3, eth_addr[2]);
-	efm_eth_writeReg(MAADR4, eth_addr[3]);
-	efm_eth_writeReg(MAADR5, eth_addr[4]);
-	efm_eth_writeReg(MAADR6, eth_addr[5]);
+    /* Set MAC address
+        NOTE: MAC address in ENC28J60 is byte-backward */
+    efm_eth_writeReg(MAADR1, eth_addr[0]);
+    efm_eth_writeReg(MAADR2, eth_addr[1]);
+    efm_eth_writeReg(MAADR3, eth_addr[2]);
+    efm_eth_writeReg(MAADR4, eth_addr[3]);
+    efm_eth_writeReg(MAADR5, eth_addr[4]);
+    efm_eth_writeReg(MAADR6, eth_addr[5]);
 
-	/* Init PHY */
+    /* Init PHY */
 #if defined(ETH_HALF_DUPLEX)
-	reg_phy = efm_eth_readPhy(PHCON2);
-	efm_eth_writePhy(PHCON2, reg_phy | PHCON2_HDLDIS);
+    reg_phy = efm_eth_readPhy(PHCON2);
+    efm_eth_writePhy(PHCON2, reg_phy | PHCON2_HDLDIS);
 #else
-	reg_phy = efm_eth_readPhy(PHCON1);
-	efm_eth_writePhy(PHCON1, reg_phy | PHCON1_PDPXMD);
+    reg_phy = efm_eth_readPhy(PHCON1);
+    efm_eth_writePhy(PHCON1, reg_phy | PHCON1_PDPXMD);
 #endif
-	/* LEDA: Display link status;
-	   LEDB: Display transmit and receive activity */
-	reg_phy = efm_eth_readPhy(PHLCON);
-	efm_eth_writePhy(PHLCON, (reg_phy & 0xF00F) | 0x0470);
+    /* LEDA: Display link status;
+       LEDB: Display transmit and receive activity */
+    reg_phy = efm_eth_readPhy(PHLCON);
+    efm_eth_writePhy(PHLCON, (reg_phy & 0xF00F) | 0x0470);
 
-	/* Disable clock output */
-	efm_eth_writeReg(ECOCON, 0x00);
+    /* Disable clock output */
+    efm_eth_writeReg(ECOCON, 0x00);
 
-	/* Clear interrutp flags */
-	data = EIR_DMAIF | EIR_TXIF | EIR_TXERIF | EIR_RXERIF;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
-	/* Enable interrutps */
-	data = EIE_INTIE | EIE_PKTIE | EIE_TXIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
-	/* Enable RX */
-	data = ECON1_RXEN;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
+    /* Clear interrutp flags */
+    data = EIR_DMAIF | EIR_TXIF | EIR_TXERIF | EIR_RXERIF;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
+    /* Enable interrutps */
+    data = EIE_INTIE | EIE_PKTIE | EIE_TXIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
+    /* Enable RX */
+    data = ECON1_RXEN;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
 
-	eth_debug("ETH: Init OK\n");
-	return RT_EOK;
+    eth_debug("ETH: Init OK\n");
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -569,8 +569,8 @@ static rt_err_t efm_eth_init(rt_device_t dev)
  ******************************************************************************/
 static rt_err_t efm_eth_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	eth_debug("ETH: Open, flag %x\n", eth_dev.parent.flag);
-	return RT_EOK;
+    eth_debug("ETH: Open, flag %x\n", eth_dev.parent.flag);
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -589,8 +589,8 @@ static rt_err_t efm_eth_open(rt_device_t dev, rt_uint16_t oflag)
  ******************************************************************************/
 static rt_err_t efm_eth_close(rt_device_t dev)
 {
-	eth_debug("ETH: Close, flag %x\n", eth_dev.parent.flag);
-	return RT_EOK;
+    eth_debug("ETH: Close, flag %x\n", eth_dev.parent.flag);
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -617,10 +617,10 @@ static rt_err_t efm_eth_close(rt_device_t dev)
  *   Number of read bytes
  ******************************************************************************/
 static rt_size_t efm_eth_read(
-	rt_device_t 	dev,
-	rt_off_t 		pos,
-	void 			*buffer,
-	rt_size_t 		size)
+    rt_device_t     dev,
+    rt_off_t        pos,
+    void            *buffer,
+    rt_size_t       size)
 {
     rt_set_errno(-RT_ENOSYS);
     return 0;
@@ -650,10 +650,10 @@ static rt_size_t efm_eth_read(
  *   Number of written bytes
  ******************************************************************************/
 static rt_size_t efm_eth_write (
-	rt_device_t 	dev,
-	rt_off_t 		pos,
-	const void 		*buffer,
-	rt_size_t 		size)
+    rt_device_t     dev,
+    rt_off_t        pos,
+    const void      *buffer,
+    rt_size_t       size)
 {
     rt_set_errno(-RT_ENOSYS);
     return 0;
@@ -674,35 +674,35 @@ static rt_size_t efm_eth_write (
 *   Ethernet control command
 *
 * @param[in] args
-*	Arguments
+*   Arguments
 *
 * @return
 *   Error code
 ******************************************************************************/
 static rt_err_t efm_eth_control (
-	rt_device_t 	dev,
-	rt_uint8_t 		cmd,
-	void 			*args)
+    rt_device_t     dev,
+    rt_uint8_t      cmd,
+    void            *args)
 {
-	rt_err_t ret;
+    rt_err_t ret;
 
-	ret = -RT_ERROR;
-	switch(cmd)
-	{
-	case NIOCTL_GADDR:
-		/* Get MAC address */
-		if(args)
-		{
-			rt_memcpy(args, eth_addr, sizeof(eth_addr));
-			ret = RT_EOK;
-		}
-		break;
+    ret = -RT_ERROR;
+    switch(cmd)
+    {
+    case NIOCTL_GADDR:
+        /* Get MAC address */
+        if(args)
+        {
+            rt_memcpy(args, eth_addr, sizeof(eth_addr));
+            ret = RT_EOK;
+        }
+        break;
 
-	default :
-		break;
-	}
+    default :
+        break;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -721,43 +721,43 @@ static rt_err_t efm_eth_control (
 ******************************************************************************/
 struct pbuf *efm_eth_rx(rt_device_t dev)
 {
-	rt_uint8_t buf_ins[5], buf_read[6];
-	rt_uint8_t data, reg_eie;
-	rt_uint16_t len_rx, sta_rx;
-	struct pbuf* p;
+    rt_uint8_t buf_ins[5], buf_read[6];
+    rt_uint8_t data, reg_eie;
+    rt_uint16_t len_rx, sta_rx;
+    struct pbuf* p;
 
     /* Lock device */
     rt_sem_take(ðLock, RT_WAITING_FOREVER);
 
     /* Disable interrupts */
-	data = EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
+    data = EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
 
-	p = RT_NULL;
-	reg_eie = 0;
+    p = RT_NULL;
+    reg_eie = 0;
     if (efm_eth_readReg(EPKTCNT))
     {
         /* Set read pointer to the start of RX packet */
         efm_eth_writeReg(ERDPTL, ethNxtPkt & 0xFF);
         efm_eth_writeReg(ERDPTH, ethNxtPkt >> 8);
 
-		/* Send read buffer command */
-		efm_eth_sendCmd(ENC28J60_READ_BUF_MEM, EFM32_NO_DATA, EFM32_NO_POINTER);
-		/* Build instruction buffer */
-		buf_ins[0] = 0x00;
-		*(rt_uint8_t **)(&buf_ins[1]) = buf_read;
-		/* Read packet header */
-		if (spi->read(spi, EFM32_NO_DATA, buf_ins, sizeof(buf_read)) == 0)
-		{
-			eth_debug("ETH: RX header failed!\n");
-		}
+        /* Send read buffer command */
+        efm_eth_sendCmd(ENC28J60_READ_BUF_MEM, EFM32_NO_DATA, EFM32_NO_POINTER);
+        /* Build instruction buffer */
+        buf_ins[0] = 0x00;
+        *(rt_uint8_t **)(&buf_ins[1]) = buf_read;
+        /* Read packet header */
+        if (spi->read(spi, EFM32_NO_DATA, buf_ins, sizeof(buf_read)) == 0)
+        {
+            eth_debug("ETH: RX header failed!\n");
+        }
 
-		ethNxtPkt = buf_read[0] | (buf_read[1] << 8);
-		len_rx = buf_read[2] | (buf_read[3] << 8);
-		sta_rx = buf_read[4] | (buf_read[5] << 8);
-		eth_debug("ETH: RX header ethNxtPkt %x, len_rx %x, sta_rx %x\n",
-			ethNxtPkt, len_rx, sta_rx);
-		/* Check if OK */
+        ethNxtPkt = buf_read[0] | (buf_read[1] << 8);
+        len_rx = buf_read[2] | (buf_read[3] << 8);
+        sta_rx = buf_read[4] | (buf_read[5] << 8);
+        eth_debug("ETH: RX header ethNxtPkt %x, len_rx %x, sta_rx %x\n",
+            ethNxtPkt, len_rx, sta_rx);
+        /* Check if OK */
         if (sta_rx & 0x80)
         {
             /* Allocate pbuf */
@@ -768,67 +768,67 @@ struct pbuf *efm_eth_rx(rt_device_t dev)
 
                 for (q = p; q != RT_NULL; q= q->next)
                 {
-					/* Build instruction buffer */
-					buf_ins[0] = 0x00;
-					*(rt_uint8_t **)(&buf_ins[1]) = q->payload;
-					/* Read packet header */
-					if (spi->read(spi, EFM32_NO_DATA, buf_ins, q->len) == 0)
-					{
-						eth_debug("ETH: RX payload failed!\n");
-					}
+                    /* Build instruction buffer */
+                    buf_ins[0] = 0x00;
+                    *(rt_uint8_t **)(&buf_ins[1]) = q->payload;
+                    /* Read packet header */
+                    if (spi->read(spi, EFM32_NO_DATA, buf_ins, q->len) == 0)
+                    {
+                        eth_debug("ETH: RX payload failed!\n");
+                    }
 #ifdef EFM32_ETHERNET_DEBUG
-					{
-						rt_uint8_t *temp = (rt_uint8_t *)q->payload;
-						rt_uint32_t i;
+                    {
+                        rt_uint8_t *temp = (rt_uint8_t *)q->payload;
+                        rt_uint32_t i;
 
-						eth_debug("ETH: ***** read RX (q->len %x) *****\n", q->len);
-						for (i = 0; i < q->len; i += 8)
-						{
-							eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n",
-								temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
-								temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7],
-								temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
-								temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]);
-						}
-					}
+                        eth_debug("ETH: ***** read RX (q->len %x) *****\n", q->len);
+                        for (i = 0; i < q->len; i += 8)
+                        {
+                            eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n",
+                                temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
+                                temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7],
+                                temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
+                                temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]);
+                        }
+                    }
 #endif
                 }
             }
-			else
-			{
-				eth_debug("ETH: No memory for pbuf!!!\n");
-			}
+            else
+            {
+                eth_debug("ETH: No memory for pbuf!!!\n");
+            }
         }
-		else
-		{
+        else
+        {
             eth_debug("ETH: Invalid CRC or symbol error occurred!\n");
         }
-		efm_eth_cs(0);
+        efm_eth_cs(0);
 
         /* Free buffer */
         efm_eth_writeReg(ERXRDPTL, ethNxtPkt & 0xFF);
         efm_eth_writeReg(ERXRDPTH, ethNxtPkt >> 8);
 
         /* Decrease counter */
-		data = ECON2_PKTDEC;
+        data = ECON2_PKTDEC;
         efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON2, &data);
     }
-	else
-	{
-		/* Enable RX */
-		data = ECON1_RXEN;
-		efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
+    else
+    {
+        /* Enable RX */
+        data = ECON1_RXEN;
+        efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
 
-	    reg_eie |= EIE_PKTIE;
-		eth_debug("ETH: Enable RX interrupt\n");
-	}
-	eth_debug("ETH: RX counter %x\n", efm_eth_readReg(EPKTCNT));
+        reg_eie |= EIE_PKTIE;
+        eth_debug("ETH: Enable RX interrupt\n");
+    }
+    eth_debug("ETH: RX counter %x\n", efm_eth_readReg(EPKTCNT));
 
     /* Enable interrupts */
-	reg_eie |= EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, ®_eie);
+    reg_eie |= EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, ®_eie);
 
-	/* Unlock device */
+    /* Unlock device */
     rt_sem_release(ðLock);
 
     return p;
@@ -849,76 +849,76 @@ struct pbuf *efm_eth_rx(rt_device_t dev)
 *   Pointer to packet buffer
 *
 * @return
-*	Error code
+*   Error code
 ******************************************************************************/
 rt_err_t efm_eth_tx(rt_device_t dev, struct pbuf* p)
 {
-	rt_uint8_t data;
-	struct pbuf* q;
+    rt_uint8_t data;
+    struct pbuf* q;
 
     /* Lock device */
     rt_sem_take(ðLock, RT_WAITING_FOREVER);
 
     /* Disable interrupts */
-	data = EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
+    data = EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
 
-	/* Set write pointer to the start of TX buffer */
-	efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF);
-	efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8);
-	/* Set buffer end pointer according to the packet size */
-	efm_eth_writeReg(ETXNDL, (TXSTART_INIT + p->tot_len + 1) & 0xFF);
-	efm_eth_writeReg(ETXNDH, (TXSTART_INIT + p->tot_len + 1) >> 8);
+    /* Set write pointer to the start of TX buffer */
+    efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF);
+    efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8);
+    /* Set buffer end pointer according to the packet size */
+    efm_eth_writeReg(ETXNDL, (TXSTART_INIT + p->tot_len + 1) & 0xFF);
+    efm_eth_writeReg(ETXNDH, (TXSTART_INIT + p->tot_len + 1) >> 8);
 
-	/* Send write buffer command */
-	data = 0x00; 	/* Control byte */
-	efm_eth_sendCmd(ENC28J60_WRITE_BUF_MEM, EFM32_NO_DATA, &data);
-	/* Send data */
-	for (q = p; q != NULL; q = q->next)
-	{
-		if (spi->write(spi, EFM32_NO_DATA, q->payload, q->len) == 0)
-		{
-			eth_debug("ETH: TX failed!\n");
-			return -RT_ERROR;
-		}
+    /* Send write buffer command */
+    data = 0x00;    /* Control byte */
+    efm_eth_sendCmd(ENC28J60_WRITE_BUF_MEM, EFM32_NO_DATA, &data);
+    /* Send data */
+    for (q = p; q != NULL; q = q->next)
+    {
+        if (spi->write(spi, EFM32_NO_DATA, q->payload, q->len) == 0)
+        {
+            eth_debug("ETH: TX failed!\n");
+            return -RT_ERROR;
+        }
 #ifdef EFM32_ETHERNET_DEBUG
-		{
-			rt_uint8_t *temp = (rt_uint8_t *)q->payload;
-			rt_uint32_t i;
+        {
+            rt_uint8_t *temp = (rt_uint8_t *)q->payload;
+            rt_uint32_t i;
 
-			eth_debug("ETH: ***** write TX (len %d) *****\n", p->len);
-			for (i = 0; i < q->len; i += 8)
-			{
-				eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n",
-					temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
-					temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7],
-					temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
-					temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]);
-			}
-		}
+            eth_debug("ETH: ***** write TX (len %d) *****\n", p->len);
+            for (i = 0; i < q->len; i += 8)
+            {
+                eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n",
+                    temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
+                    temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7],
+                    temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
+                    temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]);
+            }
+        }
 #endif
-	}
-	efm_eth_cs(0);
-	/* Start TX */
-	data = ECON1_TXRTS;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
-	/* Errata 12 */
-	if (efm_eth_readReg(EIR) & EIR_TXERIF)
-	{
-		efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, ECON1, &data);
-		data = EIR_TXERIF;
-		efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
-		data = ECON1_TXRTS;
-		efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
-	}
+    }
+    efm_eth_cs(0);
+    /* Start TX */
+    data = ECON1_TXRTS;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
+    /* Errata 12 */
+    if (efm_eth_readReg(EIR) & EIR_TXERIF)
+    {
+        efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, ECON1, &data);
+        data = EIR_TXERIF;
+        efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
+        data = ECON1_TXRTS;
+        efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
+    }
 
-	/* Waiting for a while */
-	rt_thread_delay(ETH_PERIOD_WAIT_INIT);
+    /* Waiting for a while */
+    rt_thread_delay(ETH_PERIOD_WAIT_INIT);
     /* Enable interrupts */
-	data = EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
+    data = EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
 
-	/* Unlock device */
+    /* Unlock device */
     rt_sem_release(ðLock);
 
     return RT_EOK;
@@ -926,164 +926,164 @@ rt_err_t efm_eth_tx(rt_device_t dev, struct pbuf* p)
 
 /***************************************************************************//**
 * @brief
-*	Initialize all Ethernet related hardware and register the device to kernel
+*   Initialize all Ethernet related hardware and register the device to kernel
 *
 * @details
 *
 * @note
 *
 * @return
-*	Error code
+*   Error code
 ******************************************************************************/
 rt_err_t efm_hw_eth_init(void)
 {
-	struct efm32_usart_device_t *usart;
-	efm32_irq_hook_init_t 		hook;
+    struct efm32_usart_device_t *usart;
+    efm32_irq_hook_init_t       hook;
 
-	do
-	{
-		/* Find SPI device */
-		spi = rt_device_find(ETH_USING_DEVICE_NAME);
-		if (spi == RT_NULL)
-		{
-			eth_debug("ETH: Can't find device %s!\n",
-				ETH_USING_DEVICE_NAME);
-			break;
-		}
-		eth_debug("ETH: Find device %s\n", ETH_USING_DEVICE_NAME);
+    do
+    {
+        /* Find SPI device */
+        spi = rt_device_find(ETH_USING_DEVICE_NAME);
+        if (spi == RT_NULL)
+        {
+            eth_debug("ETH: Can't find device %s!\n",
+                ETH_USING_DEVICE_NAME);
+            break;
+        }
+        eth_debug("ETH: Find device %s\n", ETH_USING_DEVICE_NAME);
 
-		/* Config chip slect pin */
-		usart = (struct efm32_usart_device_t *)(spi->user_data);
-		if (!(usart->state & USART_STATE_AUTOCS))
-		{
-			GPIO_PinModeSet(ETH_CS_PORT, ETH_CS_PIN, gpioModePushPull, 1);
-			ethAutoCs = false;
-		}
-		/* Config reset pin */
-		GPIO_PinModeSet(ETH_RESET_PORT, ETH_RESET_PIN, gpioModePushPull, 0);
-		/* Config interrupt pin */
-		GPIO_PinModeSet(ETH_INT_PORT, ETH_INT_PIN, gpioModeInput, 1);
+        /* Config chip slect pin */
+        usart = (struct efm32_usart_device_t *)(spi->user_data);
+        if (!(usart->state & USART_STATE_AUTOCS))
+        {
+            GPIO_PinModeSet(ETH_CS_PORT, ETH_CS_PIN, gpioModePushPull, 1);
+            ethAutoCs = false;
+        }
+        /* Config reset pin */
+        GPIO_PinModeSet(ETH_RESET_PORT, ETH_RESET_PIN, gpioModePushPull, 0);
+        /* Config interrupt pin */
+        GPIO_PinModeSet(ETH_INT_PORT, ETH_INT_PIN, gpioModeInput, 1);
 
-		/* Config interrupt */
-		hook.type		= efm32_irq_type_gpio;
-		hook.unit		= ETH_INT_PIN;
-		hook.cbFunc 	= efm_eth_isr;
-		hook.userPtr	= RT_NULL;
-		efm32_irq_hook_register(&hook);
-		/* Clear pending interrupt */
-		BITBAND_Peripheral(&(GPIO->IFC), ETH_INT_PIN, 0x1UL);
-		/* Set falling edge interrupt and clear/enable it */
-		GPIO_IntConfig(
-			ETH_INT_PORT,
-			ETH_INT_PIN,
-			false,
-			true,
-			true);
-		if ((rt_uint8_t)ETH_INT_PIN % 2)
-		{
-			NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
-			NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT);
-			NVIC_EnableIRQ(GPIO_ODD_IRQn);
-		}
-		else
-		{
-			NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn);
-			NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT);
-			NVIC_EnableIRQ(GPIO_EVEN_IRQn);
-		}
+        /* Config interrupt */
+        hook.type       = efm32_irq_type_gpio;
+        hook.unit       = ETH_INT_PIN;
+        hook.cbFunc     = efm_eth_isr;
+        hook.userPtr    = RT_NULL;
+        efm32_irq_hook_register(&hook);
+        /* Clear pending interrupt */
+        BITBAND_Peripheral(&(GPIO->IFC), ETH_INT_PIN, 0x1UL);
+        /* Set falling edge interrupt and clear/enable it */
+        GPIO_IntConfig(
+            ETH_INT_PORT,
+            ETH_INT_PIN,
+            false,
+            true,
+            true);
+        if ((rt_uint8_t)ETH_INT_PIN % 2)
+        {
+            NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
+            NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT);
+            NVIC_EnableIRQ(GPIO_ODD_IRQn);
+        }
+        else
+        {
+            NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn);
+            NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT);
+            NVIC_EnableIRQ(GPIO_EVEN_IRQn);
+        }
 
-		/* Set SPI speed */
-		USART_BaudrateSyncSet(usart->usart_device, 0, ETH_CLK_MAX);
+        /* Set SPI speed */
+        USART_BaudrateSyncSet(usart->usart_device, 0, ETH_CLK_MAX);
 
-		/* Initialize semaphore */
-		rt_sem_init(ðLock, ETH_DEVICE_NAME, 1, RT_IPC_FLAG_FIFO);
+        /* Initialize semaphore */
+        rt_sem_init(ðLock, ETH_DEVICE_NAME, 1, RT_IPC_FLAG_FIFO);
 
-		/* Register Ethernet device */
-		eth_dev.parent.init 	= efm_eth_init;
-		eth_dev.parent.open 	= efm_eth_open;
-		eth_dev.parent.close 	= efm_eth_close;
-		eth_dev.parent.read 	= efm_eth_read;
-		eth_dev.parent.write 	= efm_eth_write;
-		eth_dev.parent.control 	= efm_eth_control;
-		eth_dev.eth_rx 			= efm_eth_rx;
-		eth_dev.eth_tx 			= efm_eth_tx;
-		eth_device_init(ð_dev, ETH_DEVICE_NAME);
+        /* Register Ethernet device */
+        eth_dev.parent.init     = efm_eth_init;
+        eth_dev.parent.open     = efm_eth_open;
+        eth_dev.parent.close    = efm_eth_close;
+        eth_dev.parent.read     = efm_eth_read;
+        eth_dev.parent.write    = efm_eth_write;
+        eth_dev.parent.control  = efm_eth_control;
+        eth_dev.eth_rx          = efm_eth_rx;
+        eth_dev.eth_tx          = efm_eth_tx;
+        eth_device_init(ð_dev, ETH_DEVICE_NAME);
 
-		/* Start device */
-		GPIO_PinOutSet(ETH_RESET_PORT, ETH_RESET_PIN);
+        /* Start device */
+        GPIO_PinOutSet(ETH_RESET_PORT, ETH_RESET_PIN);
 
-		eth_debug("ETH: HW init OK\n");
-		return RT_EOK;
-	} while (0);
+        eth_debug("ETH: HW init OK\n");
+        return RT_EOK;
+    } while (0);
 
-	/* Release buffer */
-	rt_kprintf("ETH: HW init failed!\n");
-	return -RT_ERROR;
+    /* Release buffer */
+    rt_kprintf("ETH: HW init failed!\n");
+    return -RT_ERROR;
 }
 
 /*******************************************************************************
- * 	Export to FINSH
+ *  Export to FINSH
  ******************************************************************************/
-#if	defined(EFM32_USING_ETH_UTILS)
+#if defined(EFM32_USING_ETH_UTILS)
 #ifdef RT_USING_FINSH
 #include 
 
 void list_eth(void)
 {
-	rt_uint16_t reg_phy;
-	rt_uint8_t data;
+    rt_uint16_t reg_phy;
+    rt_uint8_t data;
 
-	rt_kprintf("    ENC28J60 on %s\n", ETH_USING_DEVICE_NAME);
-	rt_kprintf(" ------------------------------\n");
-	reg_phy = efm_eth_readPhy(PHSTAT2);
-	if (reg_phy & PHSTAT2_PLRITY)
-	{
-		rt_kprintf(" Cable polarity is reversed\n");
-	}
-	else
-	{
-		rt_kprintf(" Cable polarity is correct\n");
-	}
-	if (reg_phy & PHSTAT2_DPXSTAT)
-	{
-		rt_kprintf(" Full-duplex mode\n");
-	}
-	else
-	{
-		rt_kprintf(" Half-duplex mode\n");
-	}
-	if (reg_phy & PHSTAT2_LSTAT)
-	{
-		rt_kprintf(" Link is up\n");
-	}
-	else
-	{
-		rt_kprintf(" Link is down\n");
-	}
-	if (reg_phy & PHSTAT2_COLSTAT)
-	{
-		rt_kprintf(" Collision is occuring\n");
-	}
-	else
-	{
-		rt_kprintf(" No collision\n");
-	}
-	if (reg_phy & PHSTAT2_RXSTAT)
-	{
-		rt_kprintf(" RX is busy\n");
-	}
-	else
-	{
-		rt_kprintf(" RX is idle\n");
-	}
-	if (reg_phy & PHSTAT2_TXSTAT)
-	{
-		rt_kprintf(" TX is busy\n");
-	}
-	else
-	{
-		rt_kprintf(" TX is idle\n");
-	}
+    rt_kprintf("    ENC28J60 on %s\n", ETH_USING_DEVICE_NAME);
+    rt_kprintf(" ------------------------------\n");
+    reg_phy = efm_eth_readPhy(PHSTAT2);
+    if (reg_phy & PHSTAT2_PLRITY)
+    {
+        rt_kprintf(" Cable polarity is reversed\n");
+    }
+    else
+    {
+        rt_kprintf(" Cable polarity is correct\n");
+    }
+    if (reg_phy & PHSTAT2_DPXSTAT)
+    {
+        rt_kprintf(" Full-duplex mode\n");
+    }
+    else
+    {
+        rt_kprintf(" Half-duplex mode\n");
+    }
+    if (reg_phy & PHSTAT2_LSTAT)
+    {
+        rt_kprintf(" Link is up\n");
+    }
+    else
+    {
+        rt_kprintf(" Link is down\n");
+    }
+    if (reg_phy & PHSTAT2_COLSTAT)
+    {
+        rt_kprintf(" Collision is occuring\n");
+    }
+    else
+    {
+        rt_kprintf(" No collision\n");
+    }
+    if (reg_phy & PHSTAT2_RXSTAT)
+    {
+        rt_kprintf(" RX is busy\n");
+    }
+    else
+    {
+        rt_kprintf(" RX is idle\n");
+    }
+    if (reg_phy & PHSTAT2_TXSTAT)
+    {
+        rt_kprintf(" TX is busy\n");
+    }
+    else
+    {
+        rt_kprintf(" TX is idle\n");
+    }
 }
 FINSH_FUNCTION_EXPORT(list_eth, list the Ethernet device status.)
 
@@ -1091,108 +1091,108 @@ FINSH_FUNCTION_EXPORT(list_eth, list the Ethernet device status.)
 
 rt_err_t get_ip(char *ip)
 {
-	err_t ret;
-	struct ip_addr server_ip;
-	struct netconn *conn;
-	struct netbuf *buf;
-	char *rq, *rq2;
-	u16_t len;
-	const char query[] = "GET / HTTP/1.0\r\nHOST: checkip.dyndns.com\r\n\r\n";
-	const char find[] = "body";
+    err_t ret;
+    struct ip_addr server_ip;
+    struct netconn *conn;
+    struct netbuf *buf;
+    char *rq, *rq2;
+    u16_t len;
+    const char query[] = "GET / HTTP/1.0\r\nHOST: checkip.dyndns.com\r\n\r\n";
+    const char find[] = "body";
 
-	do
-	{
+    do
+    {
 #if defined(RT_LWIP_DNS)
-		ret = netconn_gethostbyname("checkip.dyndns.com", &server_ip);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        ret = netconn_gethostbyname("checkip.dyndns.com", &server_ip);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 #else
-		IP4_ADDR(&server_ip, 216,146,38,70);	// IP address of "checkip.dyndns.com"
+        IP4_ADDR(&server_ip, 216,146,38,70);    // IP address of "checkip.dyndns.com"
 #endif
 
-		conn = netconn_new(NETCONN_TCP);
-		if (conn == NULL)
-		{
-			break;
-		}
+        conn = netconn_new(NETCONN_TCP);
+        if (conn == NULL)
+        {
+            break;
+        }
 
-		ret = netconn_connect(conn, &server_ip, 80);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        ret = netconn_connect(conn, &server_ip, 80);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 
-		/* Send the query */
-		ret = netconn_write(conn, query, sizeof(query) - 1, 0);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        /* Send the query */
+        ret = netconn_write(conn, query, sizeof(query) - 1, 0);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 
-		buf = netconn_recv(conn);
-		if (buf != NULL)
-		{
-			/* Get the response */
-			ret = netbuf_data(buf, (void **)&rq, &len);
-			if (ret != ERR_OK)
-			{
-				break;
-			}
+        buf = netconn_recv(conn);
+        if (buf != NULL)
+        {
+            /* Get the response */
+            ret = netbuf_data(buf, (void **)&rq, &len);
+            if (ret != ERR_OK)
+            {
+                break;
+            }
 
-			/* Find the IP address */
-			rq = rt_strstr(rq, find);
-			if (rq == RT_NULL)
-			{
-				break;
-			}
-			rq += 5;
-			rq2 = rq;
-			rq2 = rt_strstr(rq2, find);
-			if (rq2 == RT_NULL)
-			{
-				break;
-			}
-			rq2 -= 2;
-			*rq2 = 0x0;
-//			rt_kprintf("[%s]\n", rq);
-		}
-		else
-		{
-			break;
-		}
+            /* Find the IP address */
+            rq = rt_strstr(rq, find);
+            if (rq == RT_NULL)
+            {
+                break;
+            }
+            rq += 5;
+            rq2 = rq;
+            rq2 = rt_strstr(rq2, find);
+            if (rq2 == RT_NULL)
+            {
+                break;
+            }
+            rq2 -= 2;
+            *rq2 = 0x0;
+//          rt_kprintf("[%s]\n", rq);
+        }
+        else
+        {
+            break;
+        }
 
-		/* Copy the IP address to buffer */
-		if (ip != NULL)
-		{
-			while(*rq < '0' || *rq > '9')
-			{
-				rq++;
-			}
-			rt_memcpy(ip, rq, rq2 - rq + 1);
-		}
-		netconn_delete(conn);
-		netbuf_delete(buf);
-		return RT_EOK;
-	} while (0);
+        /* Copy the IP address to buffer */
+        if (ip != NULL)
+        {
+            while(*rq < '0' || *rq > '9')
+            {
+                rq++;
+            }
+            rt_memcpy(ip, rq, rq2 - rq + 1);
+        }
+        netconn_delete(conn);
+        netbuf_delete(buf);
+        return RT_EOK;
+    } while (0);
 
-	netconn_delete(conn);
-	netbuf_delete(buf);
-	return -RT_ERROR;
+    netconn_delete(conn);
+    netbuf_delete(buf);
+    return -RT_ERROR;
 }
 
 void list_myip(void)
 {
-	rt_uint8_t ip[20];
+    rt_uint8_t ip[20];
 
-	if (get_ip(ip) != RT_EOK)
-	{
-		rt_kprintf("Get IP failed!\n");
-		return;
-	}
+    if (get_ip(ip) != RT_EOK)
+    {
+        rt_kprintf("Get IP failed!\n");
+        return;
+    }
 
-	rt_kprintf("Current IP: [%s]\n", ip);
+    rt_kprintf("Current IP: [%s]\n", ip);
 }
 FINSH_FUNCTION_EXPORT(list_myip, list the current IP address.)
 
@@ -1202,122 +1202,122 @@ FINSH_FUNCTION_EXPORT(list_myip, list the current IP address.)
 
 rt_err_t update_ip(char *ip)
 {
-	err_t ret;
-	struct ip_addr server_ip;
-	struct netconn *conn;
-	struct netbuf *buf;
-	char *rq;
-	u16_t len, len2;
-	char query[200] = "GET /nic/update?hostname=";
-	const char query2[] = "&myip=";
-	const char query3[] = " HTTP/1.0\r\nHost: members.dyndns.org\r\nAuthorization: Basic ";
-	const char query4[] = "\r\nUser-Agent: onelife - EFM32 - 0.4\r\n\r\n";
-	const char find[] = "good";
+    err_t ret;
+    struct ip_addr server_ip;
+    struct netconn *conn;
+    struct netbuf *buf;
+    char *rq;
+    u16_t len, len2;
+    char query[200] = "GET /nic/update?hostname=";
+    const char query2[] = "&myip=";
+    const char query3[] = " HTTP/1.0\r\nHost: members.dyndns.org\r\nAuthorization: Basic ";
+    const char query4[] = "\r\nUser-Agent: onelife - EFM32 - 0.4\r\n\r\n";
+    const char find[] = "good";
 
-	/* Make the query */
-	len = rt_strlen(query);
-	len2 = sizeof(hostName) - 1;
-	rt_memcpy(&query[len], hostName, len2);
-	len += len2;
+    /* Make the query */
+    len = rt_strlen(query);
+    len2 = sizeof(hostName) - 1;
+    rt_memcpy(&query[len], hostName, len2);
+    len += len2;
 
-	len2 = sizeof(query2) - 1;
-	rt_memcpy(&query[len], query2, len2);
-	len += len2;
+    len2 = sizeof(query2) - 1;
+    rt_memcpy(&query[len], query2, len2);
+    len += len2;
 
-	len2 = rt_strlen(ip);
-	rt_memcpy(&query[len], ip, len2);
-	len += len2;
+    len2 = rt_strlen(ip);
+    rt_memcpy(&query[len], ip, len2);
+    len += len2;
 
-	len2 = sizeof(query3) - 1;
-	rt_memcpy(&query[len], query3, len2);
-	len += len2;
+    len2 = sizeof(query3) - 1;
+    rt_memcpy(&query[len], query3, len2);
+    len += len2;
 
-	len2 = sizeof(userPwdB64) - 1;
-	rt_memcpy(&query[len], userPwdB64, len2);
-	len += len2;
+    len2 = sizeof(userPwdB64) - 1;
+    rt_memcpy(&query[len], userPwdB64, len2);
+    len += len2;
 
-	len2 = sizeof(query4) - 1;
-	rt_memcpy(&query[len], query4, len2);
-	len += len2;
+    len2 = sizeof(query4) - 1;
+    rt_memcpy(&query[len], query4, len2);
+    len += len2;
 
-	query[len] = 0x0;
-//	rt_kprintf("Query: %s\n", &query[100]);
+    query[len] = 0x0;
+//  rt_kprintf("Query: %s\n", &query[100]);
 
-	do
-	{
+    do
+    {
 #if defined(RT_LWIP_DNS)
-		ret = netconn_gethostbyname("members.dyndns.org", &server_ip);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        ret = netconn_gethostbyname("members.dyndns.org", &server_ip);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 #else
-		IP4_ADDR(&server_ip, 204,13,248,112);	// IP address of "members.dyndns.org"
+        IP4_ADDR(&server_ip, 204,13,248,112);   // IP address of "members.dyndns.org"
 #endif
 
-		conn = netconn_new(NETCONN_TCP);
-		if (conn == NULL)
-		{
-			break;
-		}
+        conn = netconn_new(NETCONN_TCP);
+        if (conn == NULL)
+        {
+            break;
+        }
 
-		ret = netconn_connect(conn, &server_ip, 80);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        ret = netconn_connect(conn, &server_ip, 80);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 
-		/* Send the query */
-		ret = netconn_write(conn, query, len, 0);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        /* Send the query */
+        ret = netconn_write(conn, query, len, 0);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 
-		/* Get the response */
-		buf = netconn_recv(conn);
-		if (buf != NULL)
-		{
-			ret = netbuf_data(buf, (void **)&rq, &len);
-			if (ret != ERR_OK)
-			{
-				break;
-			}
+        /* Get the response */
+        buf = netconn_recv(conn);
+        if (buf != NULL)
+        {
+            ret = netbuf_data(buf, (void **)&rq, &len);
+            if (ret != ERR_OK)
+            {
+                break;
+            }
 
-			/* Find the result */
-			rq = rt_strstr(rq, find);
-			if (rq == RT_NULL)
-			{
-				break;
-			}
-//			rt_kprintf("[%s]\n", rq);
-		}
-		else
-		{
-			break;
-		}
+            /* Find the result */
+            rq = rt_strstr(rq, find);
+            if (rq == RT_NULL)
+            {
+                break;
+            }
+//          rt_kprintf("[%s]\n", rq);
+        }
+        else
+        {
+            break;
+        }
 
-		netconn_delete(conn);
-		netbuf_delete(buf);
-		return RT_EOK;
-	} while (0);
+        netconn_delete(conn);
+        netbuf_delete(buf);
+        return RT_EOK;
+    } while (0);
 
-	netconn_delete(conn);
-	netbuf_delete(buf);
-	return -RT_ERROR;
+    netconn_delete(conn);
+    netbuf_delete(buf);
+    return -RT_ERROR;
 }
 
 void update_myip(char *ip)
 {
-	rt_kprintf("Update host, \"%s\", to new IP address %s: ", hostName, ip);
+    rt_kprintf("Update host, \"%s\", to new IP address %s: ", hostName, ip);
 
-	if (update_ip(ip) != RT_EOK)
-	{
-		rt_kprintf("failed!\n");
-		return;
-	}
+    if (update_ip(ip) != RT_EOK)
+    {
+        rt_kprintf("failed!\n");
+        return;
+    }
 
-	rt_kprintf("succeeded.\n", ip);
+    rt_kprintf("succeeded.\n", ip);
 }
 FINSH_FUNCTION_EXPORT(update_myip, update DDNS with specified IP address.)
 
diff --git a/bsp/efm32/drv_ethernet.h b/bsp/efm32/drv_ethernet.h
index 146182f86d..87e12493f6 100644
--- a/bsp/efm32/drv_ethernet.h
+++ b/bsp/efm32/drv_ethernet.h
@@ -1,11 +1,11 @@
 /***************************************************************************//**
- * @file 	drv_ethernet.h
- * @brief 	Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART
+ * @file    drv_ethernet.h
+ * @brief   Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART
  *  module
- * 	 This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet
+ *   This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet
  *  controller with SPI interface.
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -13,8 +13,8 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-06-22	onelife		Initial creation for using EFM32 USART module
+ * Date         Author      Notes
+ * 2011-06-22   onelife     Initial creation for using EFM32 USART module
  ******************************************************************************/
 #ifndef __DEV_ETHERNET_H__
 #define __DEV_ETHERNET_H__
@@ -25,18 +25,18 @@
 /* Exported types ------------------------------------------------------------*/
 /* Exported constants --------------------------------------------------------*/
 /* Exported macro ------------------------------------------------------------*/
-#define ETH_ADDR_LEN 			(6)
-#define ETH_CLK_MAX 			(10000000) 	/* Should be more than 8 Mz (Errata 1) */
+#define ETH_ADDR_LEN            (6)
+#define ETH_CLK_MAX             (10000000)  /* Should be more than 8 Mz (Errata 1) */
 //#define ETH_HALF_DUPLEX
 
-#define ETH_PERIOD_WAIT_INIT 	(RT_TICK_PER_SECOND/100)
-#define ETH_PERIOD_WAIT_TX 		(RT_TICK_PER_SECOND/100)
-#define ETH_SPI_RX_SKIP 		(1)
+#define ETH_PERIOD_WAIT_INIT    (RT_TICK_PER_SECOND/100)
+#define ETH_PERIOD_WAIT_TX      (RT_TICK_PER_SECOND/100)
+#define ETH_SPI_RX_SKIP         (1)
 
-#define ETH_RESET_PORT 			(gpioPortB)
-#define ETH_RESET_PIN 			(9)
-#define ETH_INT_PORT 			(gpioPortB)
-#define ETH_INT_PIN 			(10)
+#define ETH_RESET_PORT          (gpioPortB)
+#define ETH_RESET_PIN           (9)
+#define ETH_INT_PORT            (gpioPortB)
+#define ETH_INT_PIN             (10)
 
 /* Exported functions ------------------------------------------------------- */
 rt_err_t efm_hw_eth_init(void);
diff --git a/bsp/efm32/drv_leuart.c b/bsp/efm32/drv_leuart.c
index 23addb48a9..7422956003 100644
--- a/bsp/efm32/drv_leuart.c
+++ b/bsp/efm32/drv_leuart.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_leuart.c
- * @brief 	LEUART driver of RT-Thread RTOS for EFM32
+ * @file    drv_leuart.c
+ * @brief   LEUART driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,9 +10,9 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-12-09	onelife		Initial creation for EFM32
- * 2011-12-27	onelife		Utilize "LEUART_PRESENT" and "LEUART_COUNT"
+ * Date         Author      Notes
+ * 2011-12-09   onelife     Initial creation for EFM32
+ * 2011-12-27   onelife     Utilize "LEUART_PRESENT" and "LEUART_COUNT"
  ******************************************************************************/
 
 /***************************************************************************//**
@@ -41,10 +41,10 @@
 /* Private variables ---------------------------------------------------------*/
 #if defined(RT_USING_LEUART0)
  #if (RT_USING_LEUART0 >= EFM32_LEUART_LOCATION_COUNT)
- 	#error "Wrong location number"
+    #error "Wrong location number"
  #endif
-	struct rt_device leuart0_device;
-	static struct rt_semaphore leuart0_lock;
+    struct rt_device leuart0_device;
+    static struct rt_semaphore leuart0_lock;
 #endif
 
 #if defined(RT_USING_LEUART1)
@@ -52,10 +52,10 @@
  #error "Wrong unit number"
  #endif
  #if (RT_USING_LEUART1 >= EFM32_LEUART_LOCATION_COUNT)
- 	#error "Wrong location number"
+    #error "Wrong location number"
  #endif
-	struct rt_device leuart1_device;
-	static struct rt_semaphore leuart1_lock;
+    struct rt_device leuart1_device;
+    static struct rt_semaphore leuart1_lock;
 #endif
 
 /* Private function prototypes -----------------------------------------------*/
@@ -76,37 +76,37 @@
  ******************************************************************************/
 static rt_err_t rt_leuart_init (rt_device_t dev)
 {
-	struct efm32_leuart_device_t *leuart;
+    struct efm32_leuart_device_t *leuart;
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
 
-	if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
-	{
-		if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
-		{
-			struct efm32_leuart_dma_mode_t *dma_tx;
+    if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
+    {
+        if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
+        {
+            struct efm32_leuart_dma_mode_t *dma_tx;
 
-			dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
+            dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
 
-			leuart->state |= LEUART_STATE_RX_BUSY;
-		}
+            leuart->state |= LEUART_STATE_RX_BUSY;
+        }
 
-		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			struct efm32_leuart_int_mode_t *int_rx;
+        if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            struct efm32_leuart_int_mode_t *int_rx;
 
-			int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
+            int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
 
-			int_rx->data_ptr = RT_NULL;
-		}
+            int_rx->data_ptr = RT_NULL;
+        }
 
-		/* Enable LEUART */
-		LEUART_Enable(leuart->leuart_device, leuartEnable);
+        /* Enable LEUART */
+        LEUART_Enable(leuart->leuart_device, leuartEnable);
 
-		dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
-	}
+        dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -128,68 +128,68 @@ static rt_err_t rt_leuart_init (rt_device_t dev)
  ******************************************************************************/
 static rt_err_t rt_leuart_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_leuart_device_t	*leuart;
+    struct efm32_leuart_device_t    *leuart;
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		IRQn_Type 					rxIrq;
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        IRQn_Type                   rxIrq;
 
-		//if (leuart->state & LEUART_STATE_CONSOLE)
-		{	/* Allocate new RX buffer */
-			struct efm32_leuart_int_mode_t	*int_mode;
+        //if (leuart->state & LEUART_STATE_CONSOLE)
+        {   /* Allocate new RX buffer */
+            struct efm32_leuart_int_mode_t  *int_mode;
 
-			int_mode = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
+            int_mode = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
 
-			if ((int_mode->data_ptr = rt_malloc(LEUART_RX_BUFFER_SIZE)) == RT_NULL)
-			{
-				leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
-				return -RT_ENOMEM;
-			}
-			rt_memset(int_mode->data_ptr, 0, LEUART_RX_BUFFER_SIZE);
-			int_mode->data_size = LEUART_RX_BUFFER_SIZE;
-			int_mode->read_index = 0;
-			int_mode->save_index = 0;
-		}
+            if ((int_mode->data_ptr = rt_malloc(LEUART_RX_BUFFER_SIZE)) == RT_NULL)
+            {
+                leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
+                return -RT_ENOMEM;
+            }
+            rt_memset(int_mode->data_ptr, 0, LEUART_RX_BUFFER_SIZE);
+            int_mode->data_size = LEUART_RX_BUFFER_SIZE;
+            int_mode->read_index = 0;
+            int_mode->save_index = 0;
+        }
 
-		/* Enable RX interrupt */
-        leuart->leuart_device->IEN 	= LEUART_IEN_RXDATAV;
+        /* Enable RX interrupt */
+        leuart->leuart_device->IEN  = LEUART_IEN_RXDATAV;
 
-		/* Enable IRQ */
-		switch (leuart->unit)
-		{
-		case 0:
+        /* Enable IRQ */
+        switch (leuart->unit)
+        {
+        case 0:
             rxIrq   = LEUART0_IRQn;
-			break;
+            break;
 #if (LEUART_COUNT > 1)
-		case 1:
+        case 1:
             rxIrq   = LEUART1_IRQn;
-			break;
+            break;
 #endif
         }
-		if (oflag != RT_DEVICE_OFLAG_WRONLY)
-		{
-			NVIC_ClearPendingIRQ(rxIrq);
-			NVIC_SetPriority(rxIrq, EFM32_IRQ_PRI_DEFAULT);
-			NVIC_EnableIRQ(rxIrq);
-		}
-	}
+        if (oflag != RT_DEVICE_OFLAG_WRONLY)
+        {
+            NVIC_ClearPendingIRQ(rxIrq);
+            NVIC_SetPriority(rxIrq, EFM32_IRQ_PRI_DEFAULT);
+            NVIC_EnableIRQ(rxIrq);
+        }
+    }
 
     /* Clear Flag */
     leuart->leuart_device->IFC      = _LEUART_IFC_MASK;
 
-	if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (oflag != RT_DEVICE_OFLAG_RDONLY))
-	{
-		/* DMA IRQ is enabled by DMA_Init() */
-		NVIC_SetPriority(DMA_IRQn, EFM32_IRQ_PRI_DEFAULT);
-	}
+    if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (oflag != RT_DEVICE_OFLAG_RDONLY))
+    {
+        /* DMA IRQ is enabled by DMA_Init() */
+        NVIC_SetPriority(DMA_IRQn, EFM32_IRQ_PRI_DEFAULT);
+    }
 
-	leuart->counter++;
-	leuart_debug("LEUART%d: Open with flag %x\n", leuart->unit, oflag);
-	return RT_EOK;
+    leuart->counter++;
+    leuart_debug("LEUART%d: Open with flag %x\n", leuart->unit, oflag);
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -208,26 +208,26 @@ static rt_err_t rt_leuart_open(rt_device_t dev, rt_uint16_t oflag)
  ******************************************************************************/
 static rt_err_t rt_leuart_close(rt_device_t dev)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_leuart_device_t    *leuart;
+    struct efm32_leuart_device_t    *leuart;
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
 
-	if (--leuart->counter == 0)
-	{
-		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			struct efm32_leuart_int_mode_t *int_rx;
+    if (--leuart->counter == 0)
+    {
+        if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            struct efm32_leuart_int_mode_t *int_rx;
 
-			int_rx = (struct efm32_leuart_int_mode_t *)leuart->rx_mode;
+            int_rx = (struct efm32_leuart_int_mode_t *)leuart->rx_mode;
 
-			rt_free(int_rx->data_ptr);
-			int_rx->data_ptr = RT_NULL;
-		}
-	}
+            rt_free(int_rx->data_ptr);
+            int_rx->data_ptr = RT_NULL;
+        }
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -254,105 +254,105 @@ static rt_err_t rt_leuart_close(rt_device_t dev)
  *   Number of read bytes
  ******************************************************************************/
 static rt_size_t rt_leuart_read (
-	rt_device_t 	dev,
-	rt_off_t 		pos,
-	void 			*buffer,
-	rt_size_t 		size)
+    rt_device_t     dev,
+    rt_off_t        pos,
+    void            *buffer,
+    rt_size_t       size)
 {
-	struct efm32_leuart_device_t *leuart;
-	rt_uint8_t 	*ptr;
-	rt_err_t 	err_code;
-	rt_size_t 	read_len;
+    struct efm32_leuart_device_t *leuart;
+    rt_uint8_t  *ptr;
+    rt_err_t    err_code;
+    rt_size_t   read_len;
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
 
-	/* Lock device */
-	if (rt_hw_interrupt_check())
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
-	}
-	else
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
-	}
-	if (err_code != RT_EOK)
-	{
-		rt_set_errno(err_code);
-		return 0;
-	}
+    /* Lock device */
+    if (rt_hw_interrupt_check())
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
+    }
+    else
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
+    }
+    if (err_code != RT_EOK)
+    {
+        rt_set_errno(err_code);
+        return 0;
+    }
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		ptr = buffer;
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        ptr = buffer;
 
-		/* interrupt mode Rx */
-		while (size)
-		{
-			rt_base_t level;
-			struct efm32_leuart_int_mode_t *int_rx;
+        /* interrupt mode Rx */
+        while (size)
+        {
+            rt_base_t level;
+            struct efm32_leuart_int_mode_t *int_rx;
 
-			int_rx = (struct efm32_leuart_int_mode_t *)\
-				(((struct efm32_leuart_device_t *)(dev->user_data))->rx_mode);
+            int_rx = (struct efm32_leuart_int_mode_t *)\
+                (((struct efm32_leuart_device_t *)(dev->user_data))->rx_mode);
 
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
+            /* disable interrupt */
+            level = rt_hw_interrupt_disable();
 
-			if (int_rx->read_index != int_rx->save_index)
-			{
-				/* read a character */
-				*ptr++ = int_rx->data_ptr[int_rx->read_index];
-				size--;
+            if (int_rx->read_index != int_rx->save_index)
+            {
+                /* read a character */
+                *ptr++ = int_rx->data_ptr[int_rx->read_index];
+                size--;
 
-				/* move to next position */
-				int_rx->read_index ++;
-				if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE)
-				{
-					int_rx->read_index = 0;
-				}
-			}
-			else
-			{
-				/* set error code */
-				err_code = -RT_EEMPTY;
+                /* move to next position */
+                int_rx->read_index ++;
+                if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE)
+                {
+                    int_rx->read_index = 0;
+                }
+            }
+            else
+            {
+                /* set error code */
+                err_code = -RT_EEMPTY;
 
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-				break;
-			}
+                /* enable interrupt */
+                rt_hw_interrupt_enable(level);
+                break;
+            }
 
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
-		}
+            /* enable interrupt */
+            rt_hw_interrupt_enable(level);
+        }
 
-		read_len = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
-	}
-	else
-	{
-		LEUART_TypeDef *leuart_device;
+        read_len = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+    }
+    else
+    {
+        LEUART_TypeDef *leuart_device;
 
-		leuart = (struct efm32_leuart_device_t *)(dev->user_data);
-		leuart_device = ((struct efm32_leuart_device_t *)(dev->user_data))->leuart_device;
-		ptr = buffer;
+        leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+        leuart_device = ((struct efm32_leuart_device_t *)(dev->user_data))->leuart_device;
+        ptr = buffer;
 
-		/* polling mode */
-		while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
-		{
-			while (leuart_device->STATUS & LEUART_STATUS_RXDATAV)
-			{
-				*ptr = leuart_device->RXDATA & 0xff;
-				ptr ++;
-			}
-		}
+        /* polling mode */
+        while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
+        {
+            while (leuart_device->STATUS & LEUART_STATUS_RXDATAV)
+            {
+                *ptr = leuart_device->RXDATA & 0xff;
+                ptr ++;
+            }
+        }
 
-		read_len = size;
-	}
+        read_len = size;
+    }
 
-	/* Unlock device */
-	rt_sem_release(leuart->lock);
+    /* Unlock device */
+    rt_sem_release(leuart->lock);
 
-	/* set error code */
-	rt_set_errno(err_code);
-	return read_len;
+    /* set error code */
+    rt_set_errno(err_code);
+    return read_len;
 }
 
 /***************************************************************************//**
@@ -379,504 +379,504 @@ static rt_size_t rt_leuart_read (
  *   Number of written bytes
  ******************************************************************************/
 static rt_size_t rt_leuart_write (
-	rt_device_t 	dev,
-	rt_off_t 		pos,
-	const void* 	buffer,
-	rt_size_t 		size)
+    rt_device_t     dev,
+    rt_off_t        pos,
+    const void*     buffer,
+    rt_size_t       size)
 {
-	rt_err_t 						err_code;
-	rt_size_t 						write_size;
-	struct efm32_leuart_device_t* 	leuart;
+    rt_err_t                        err_code;
+    rt_size_t                       write_size;
+    struct efm32_leuart_device_t*   leuart;
 
-	write_size = 0;
-	leuart = (struct efm32_leuart_device_t*)(dev->user_data);
+    write_size = 0;
+    leuart = (struct efm32_leuart_device_t*)(dev->user_data);
 
-	/* Lock device */
-	if (rt_hw_interrupt_check())
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
-	}
-	else
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
-	}
-	if (err_code != RT_EOK)
-	{
-		rt_set_errno(err_code);
-		return 0;
-	}
+    /* Lock device */
+    if (rt_hw_interrupt_check())
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
+    }
+    else
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
+    }
+    if (err_code != RT_EOK)
+    {
+        rt_set_errno(err_code);
+        return 0;
+    }
 
-	if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (size > 2))
-	{	/* DMA mode Tx */
-		struct efm32_leuart_dma_mode_t *dma_tx;
+    if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (size > 2))
+    {   /* DMA mode Tx */
+        struct efm32_leuart_dma_mode_t *dma_tx;
 
-		if (dev->flag & RT_DEVICE_FLAG_STREAM)
-		{
-			if (*((rt_uint8_t *)buffer + size - 1) == '\n')
-			{
-				*((rt_uint8_t *)buffer + size - 1) = '\r';
-				*((rt_uint8_t *)buffer + size++) = '\n';
-				*((rt_uint8_t *)buffer + size) = 0;
-			}
-		}
+        if (dev->flag & RT_DEVICE_FLAG_STREAM)
+        {
+            if (*((rt_uint8_t *)buffer + size - 1) == '\n')
+            {
+                *((rt_uint8_t *)buffer + size - 1) = '\r';
+                *((rt_uint8_t *)buffer + size++) = '\n';
+                *((rt_uint8_t *)buffer + size) = 0;
+            }
+        }
 
-		dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
-		dma_tx->data_ptr = (rt_uint32_t *)buffer;
-		dma_tx->data_size = size;
+        dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
+        dma_tx->data_ptr = (rt_uint32_t *)buffer;
+        dma_tx->data_size = size;
 
-		leuart->state |= LEUART_STATE_TX_BUSY;
+        leuart->state |= LEUART_STATE_TX_BUSY;
 
-		DMA_ActivateBasic(
-			dma_tx->dma_channel,
-			true,
-			false,
-			(void *)&(leuart->leuart_device->TXDATA),
-			(void *)buffer,
-			(rt_uint32_t)(size - 1));
+        DMA_ActivateBasic(
+            dma_tx->dma_channel,
+            true,
+            false,
+            (void *)&(leuart->leuart_device->TXDATA),
+            (void *)buffer,
+            (rt_uint32_t)(size - 1));
 
-		/* Wait, otherwise the TX buffer is overwrite */
-//		if (leuart->state & LEUART_STATE_CONSOLE)
-//		{
-			while(leuart->state & LEUART_STATE_TX_BUSY);
-//		}
-//		else
-//		{
-//			while(leuart->state & LEUART_STATE_TX_BUSY)
-//			{
-//				rt_thread_sleep(LEUART_WAIT_TIME_TX);
-//			}
-//		}
+        /* Wait, otherwise the TX buffer is overwrite */
+//      if (leuart->state & LEUART_STATE_CONSOLE)
+//      {
+            while(leuart->state & LEUART_STATE_TX_BUSY);
+//      }
+//      else
+//      {
+//          while(leuart->state & LEUART_STATE_TX_BUSY)
+//          {
+//              rt_thread_sleep(LEUART_WAIT_TIME_TX);
+//          }
+//      }
 // TODO: This function blocks the process
-		write_size = size;
-	}
-	else
-	{	/* polling mode */
-		rt_uint8_t *ptr = (rt_uint8_t *)buffer;
+        write_size = size;
+    }
+    else
+    {   /* polling mode */
+        rt_uint8_t *ptr = (rt_uint8_t *)buffer;
 
-		if (dev->flag & RT_DEVICE_FLAG_STREAM)
-		{
-			/* stream mode */
-			while (size)
-			{
-				if (*ptr == '\n')
-				{
-					while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
-					leuart->leuart_device->TXDATA = '\r';
-				}
+        if (dev->flag & RT_DEVICE_FLAG_STREAM)
+        {
+            /* stream mode */
+            while (size)
+            {
+                if (*ptr == '\n')
+                {
+                    while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
+                    leuart->leuart_device->TXDATA = '\r';
+                }
 
-				while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
-				leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr;
-				++ptr; --size;
-			}
-		}
-		else
-		{
-			/* write data directly */
-			while (size)
-			{
-				while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
-				leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr;
-				++ptr; --size;
-			}
-		}
+                while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
+                leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr;
+                ++ptr; --size;
+            }
+        }
+        else
+        {
+            /* write data directly */
+            while (size)
+            {
+                while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
+                leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr;
+                ++ptr; --size;
+            }
+        }
 
-		write_size = (rt_size_t)ptr - (rt_size_t)buffer;
-	}
+        write_size = (rt_size_t)ptr - (rt_size_t)buffer;
+    }
 
-	/* Unlock device */
-	rt_sem_release(leuart->lock);
+    /* Unlock device */
+    rt_sem_release(leuart->lock);
 
-	/* set error code */
-	rt_set_errno(err_code);
-	return write_size;
+    /* set error code */
+    rt_set_errno(err_code);
+    return write_size;
 }
 
 /***************************************************************************//**
 * @brief
-*	Configure LEUART device
+*   Configure LEUART device
 *
 * @details
 *
 * @note
 *
 * @param[in] dev
-*	Pointer to device descriptor
+*   Pointer to device descriptor
 *
 * @param[in] cmd
-*	IIC control command
+*   IIC control command
 *
 * @param[in] args
-*	Arguments
+*   Arguments
 *
 * @return
-*	Error code
+*   Error code
 ******************************************************************************/
 static rt_err_t rt_leuart_control (
-	rt_device_t 	dev,
-	rt_uint8_t 		cmd,
-	void 			*args)
+    rt_device_t     dev,
+    rt_uint8_t      cmd,
+    void            *args)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	rt_err_t	err_code;
-	struct efm32_leuart_device_t *leuart;
+    rt_err_t    err_code;
+    struct efm32_leuart_device_t *leuart;
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
 
-	/* Lock device */
-	if (rt_hw_interrupt_check())
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
-	}
-	else
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
-	}
-	if (err_code != RT_EOK)
-	{
-		return err_code;
-	}
+    /* Lock device */
+    if (rt_hw_interrupt_check())
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
+    }
+    else
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
+    }
+    if (err_code != RT_EOK)
+    {
+        return err_code;
+    }
 
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* Suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		LEUART_Enable(leuart->leuart_device, leuartDisable);
-		break;
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* Suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        LEUART_Enable(leuart->leuart_device, leuartDisable);
+        break;
 
-	case RT_DEVICE_CTRL_RESUME:
-		/* Resume device */
-		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
-		LEUART_Enable(leuart->leuart_device, leuartEnable);
-		break;
+    case RT_DEVICE_CTRL_RESUME:
+        /* Resume device */
+        dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+        LEUART_Enable(leuart->leuart_device, leuartEnable);
+        break;
 
-	case RT_DEVICE_CTRL_LEUART_RBUFFER:
-		/* Set RX buffer */
-		{
-			struct efm32_leuart_int_mode_t *int_rx;
-			rt_uint8_t size;
+    case RT_DEVICE_CTRL_LEUART_RBUFFER:
+        /* Set RX buffer */
+        {
+            struct efm32_leuart_int_mode_t *int_rx;
+            rt_uint8_t size;
 
-			int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
-			size = (rt_uint8_t)((rt_uint32_t)args & 0xFFUL);
+            int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
+            size = (rt_uint8_t)((rt_uint32_t)args & 0xFFUL);
 
-			/* Free previous RX buffer */
-			if (int_rx->data_ptr != RT_NULL)
-			{
-				if (size == 0)
-				{	/* Free RX buffer */
-					rt_free(int_rx->data_ptr);
-					int_rx->data_ptr = RT_NULL;
-				}
-				else if (size != int_rx->data_size)
-				{
-					/* Re-allocate RX buffer */
-					if ((int_rx->data_ptr = rt_realloc(int_rx->data_ptr, size)) \
-						== RT_NULL)
-					{
-						leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
-						err_code = -RT_ENOMEM;
-						break;
-					}
-					// TODO: Is the following line necessary?
-					//rt_memset(int_rx->data_ptr, 0, size);
-				}
-			}
-			else
-			{
-				/* Allocate new RX buffer */
-				if ((int_rx->data_ptr = rt_malloc(size)) == RT_NULL)
-				{
-					leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
-					err_code = -RT_ENOMEM;
-					break;
-				}
-			}
-			int_rx->data_size = size;
-			int_rx->read_index = 0;
-			int_rx->save_index = 0;
-		}
-		break;
+            /* Free previous RX buffer */
+            if (int_rx->data_ptr != RT_NULL)
+            {
+                if (size == 0)
+                {   /* Free RX buffer */
+                    rt_free(int_rx->data_ptr);
+                    int_rx->data_ptr = RT_NULL;
+                }
+                else if (size != int_rx->data_size)
+                {
+                    /* Re-allocate RX buffer */
+                    if ((int_rx->data_ptr = rt_realloc(int_rx->data_ptr, size)) \
+                        == RT_NULL)
+                    {
+                        leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
+                        err_code = -RT_ENOMEM;
+                        break;
+                    }
+                    // TODO: Is the following line necessary?
+                    //rt_memset(int_rx->data_ptr, 0, size);
+                }
+            }
+            else
+            {
+                /* Allocate new RX buffer */
+                if ((int_rx->data_ptr = rt_malloc(size)) == RT_NULL)
+                {
+                    leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
+                    err_code = -RT_ENOMEM;
+                    break;
+                }
+            }
+            int_rx->data_size = size;
+            int_rx->read_index = 0;
+            int_rx->save_index = 0;
+        }
+        break;
 
-	}
+    }
 
-	/* Unlock device */
-	rt_sem_release(leuart->lock);
+    /* Unlock device */
+    rt_sem_release(leuart->lock);
 
-	return err_code;
+    return err_code;
 }
 
 /***************************************************************************//**
  * @brief
- *	LEUART RX data valid interrupt handler
+ *  LEUART RX data valid interrupt handler
  *
  * @details
  *
  * @note
  *
  * @param[in] dev
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  ******************************************************************************/
 void rt_hw_leuart_rx_isr(rt_device_t dev)
 {
-	struct efm32_leuart_device_t 	*leuart;
-	struct efm32_leuart_int_mode_t 	*int_rx;
+    struct efm32_leuart_device_t    *leuart;
+    struct efm32_leuart_int_mode_t  *int_rx;
     rt_uint32_t                     flag;
 
-	/* interrupt mode receive */
-	RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
+    /* interrupt mode receive */
+    RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
-	int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
 
-	RT_ASSERT(int_rx->data_ptr != RT_NULL);
+    RT_ASSERT(int_rx->data_ptr != RT_NULL);
 
-	/* Set status */
-	leuart->state |= LEUART_STATE_RX_BUSY;
+    /* Set status */
+    leuart->state |= LEUART_STATE_RX_BUSY;
 
-	/* save into rx buffer */
-	while (leuart->leuart_device->STATUS & LEUART_STATUS_RXDATAV)
-	{
-		rt_base_t level;
+    /* save into rx buffer */
+    while (leuart->leuart_device->STATUS & LEUART_STATUS_RXDATAV)
+    {
+        rt_base_t level;
 
-		/* disable interrupt */
-		level = rt_hw_interrupt_disable();
+        /* disable interrupt */
+        level = rt_hw_interrupt_disable();
 
-		/* save character */
-		int_rx->data_ptr[int_rx->save_index] = \
-			(rt_uint8_t)(leuart->leuart_device->RXDATA & 0xFFUL);
-		int_rx->save_index ++;
-		if (int_rx->save_index >= LEUART_RX_BUFFER_SIZE)
-			int_rx->save_index = 0;
+        /* save character */
+        int_rx->data_ptr[int_rx->save_index] = \
+            (rt_uint8_t)(leuart->leuart_device->RXDATA & 0xFFUL);
+        int_rx->save_index ++;
+        if (int_rx->save_index >= LEUART_RX_BUFFER_SIZE)
+            int_rx->save_index = 0;
 
-		/* if the next position is read index, discard this 'read char' */
-		if (int_rx->save_index == int_rx->read_index)
-		{
-			int_rx->read_index ++;
-			if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE)
-			{
-				int_rx->read_index = 0;
-			}
-		}
+        /* if the next position is read index, discard this 'read char' */
+        if (int_rx->save_index == int_rx->read_index)
+        {
+            int_rx->read_index ++;
+            if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE)
+            {
+                int_rx->read_index = 0;
+            }
+        }
 
-		/* enable interrupt */
-		rt_hw_interrupt_enable(level);
-	}
+        /* enable interrupt */
+        rt_hw_interrupt_enable(level);
+    }
 
-	/* invoke callback */
-	if (dev->rx_indicate != RT_NULL)
-	{
-		rt_size_t rx_length;
+    /* invoke callback */
+    if (dev->rx_indicate != RT_NULL)
+    {
+        rt_size_t rx_length;
 
-		/* get rx length */
-		rx_length = int_rx->read_index > int_rx->save_index ?
-			LEUART_RX_BUFFER_SIZE - int_rx->read_index + int_rx->save_index : \
-			int_rx->save_index - int_rx->read_index;
+        /* get rx length */
+        rx_length = int_rx->read_index > int_rx->save_index ?
+            LEUART_RX_BUFFER_SIZE - int_rx->read_index + int_rx->save_index : \
+            int_rx->save_index - int_rx->read_index;
 
-		dev->rx_indicate(dev, rx_length);
-	}
+        dev->rx_indicate(dev, rx_length);
+    }
 }
 
 /***************************************************************************//**
  * @brief
- *	DMA for LEUART TX interrupt handler
+ *  DMA for LEUART TX interrupt handler
  *
  * @details
  *
  * @note
  *
  * @param[in] dev
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  ******************************************************************************/
 void rt_hw_leuart_dma_tx_isr(rt_device_t dev)
 {
-	/* DMA mode receive */
-	struct efm32_leuart_device_t 	*leuart;
-	struct efm32_leuart_dma_mode_t 	*dma_tx;
+    /* DMA mode receive */
+    struct efm32_leuart_device_t    *leuart;
+    struct efm32_leuart_dma_mode_t  *dma_tx;
 
-	RT_ASSERT(dev->flag & RT_DEVICE_FLAG_DMA_TX);
+    RT_ASSERT(dev->flag & RT_DEVICE_FLAG_DMA_TX);
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
-	dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
 
-	/* invoke call to notify tx complete */
-	if (dev->tx_complete != RT_NULL)
-	{
-		dev->tx_complete(dev, dma_tx->data_ptr);
-	}
+    /* invoke call to notify tx complete */
+    if (dev->tx_complete != RT_NULL)
+    {
+        dev->tx_complete(dev, dma_tx->data_ptr);
+    }
 
-	/* Set status */
-	leuart->state &= ~(rt_uint32_t)LEUART_STATE_TX_BUSY;
+    /* Set status */
+    leuart->state &= ~(rt_uint32_t)LEUART_STATE_TX_BUSY;
 }
 
 /***************************************************************************//**
 * @brief
-*	Register LEUART device
+*   Register LEUART device
 *
 * @details
 *
 * @note
 *
 * @param[in] device
-*	Pointer to device descriptor
+*   Pointer to device descriptor
 *
 * @param[in] name
-*	Device name
+*   Device name
 *
 * @param[in] flag
-*	Configuration flags
+*   Configuration flags
 *
 * @param[in] leuart
-*	Pointer to LEUART device descriptor
+*   Pointer to LEUART device descriptor
 *
 * @return
-*	Error code
+*   Error code
 ******************************************************************************/
 rt_err_t rt_hw_leuart_register(
-	rt_device_t		device,
-	const char		*name,
-	rt_uint32_t		flag,
-	struct efm32_leuart_device_t *leuart)
+    rt_device_t     device,
+    const char      *name,
+    rt_uint32_t     flag,
+    struct efm32_leuart_device_t *leuart)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
-		(flag & RT_DEVICE_FLAG_INT_TX))
-	{
-		RT_ASSERT(0);
-	}
+    if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
+        (flag & RT_DEVICE_FLAG_INT_TX))
+    {
+        RT_ASSERT(0);
+    }
 
-	device->type 		= RT_Device_Class_Char;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_leuart_init;
-	device->open		= rt_leuart_open;
-	device->close		= rt_leuart_close;
-	device->read 		= rt_leuart_read;
-	device->write 		= rt_leuart_write;
-	device->control 	= rt_leuart_control;
-	device->user_data	= leuart;
+    device->type        = RT_Device_Class_Char;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = rt_leuart_init;
+    device->open        = rt_leuart_open;
+    device->close       = rt_leuart_close;
+    device->read        = rt_leuart_read;
+    device->write       = rt_leuart_write;
+    device->control     = rt_leuart_control;
+    device->user_data   = leuart;
 
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
 }
 
 /***************************************************************************//**
 * @brief
-*	Initialize the specified LEUART unit
+*   Initialize the specified LEUART unit
 *
 * @details
 *
 * @note
 *
 * @param[in] device
-*	Pointer to device descriptor
+*   Pointer to device descriptor
 *
 * @param[in] unitNumber
-*	Unit number
+*   Unit number
 *
 * @param[in] location
-*	Pin location number
+*   Pin location number
 *
 * @param[in] flag
-*	Configuration flag
+*   Configuration flag
 *
 * @param[in] dmaChannel
-*	DMA channel number for TX
+*   DMA channel number for TX
 *
 * @param[in] console
-*	Indicate if using as console
+*   Indicate if using as console
 *
 * @return
-*	Pointer to LEUART device
+*   Pointer to LEUART device
 ******************************************************************************/
 static struct efm32_leuart_device_t *rt_hw_leuart_unit_init(
-	rt_device_t device,
-	rt_uint8_t 	unitNumber,
-	rt_uint8_t 	location,
-	rt_uint32_t flag,
-	rt_uint32_t	dmaChannel,
-	rt_uint8_t 	config)
+    rt_device_t device,
+    rt_uint8_t  unitNumber,
+    rt_uint8_t  location,
+    rt_uint32_t flag,
+    rt_uint32_t dmaChannel,
+    rt_uint8_t  config)
 {
-	struct efm32_leuart_device_t 	*leuart;
-	struct efm32_leuart_dma_mode_t	*dma_mode;
-	DMA_CB_TypeDef					*callback;
-	CMU_Clock_TypeDef				leuartClock;
-	rt_uint32_t						txDmaSelect;
-	GPIO_Port_TypeDef 				port_tx, port_rx, port_clk, port_cs;
-	rt_uint32_t 					pin_tx, pin_rx, pin_clk, pin_cs;
+    struct efm32_leuart_device_t    *leuart;
+    struct efm32_leuart_dma_mode_t  *dma_mode;
+    DMA_CB_TypeDef                  *callback;
+    CMU_Clock_TypeDef               leuartClock;
+    rt_uint32_t                     txDmaSelect;
+    GPIO_Port_TypeDef               port_tx, port_rx, port_clk, port_cs;
+    rt_uint32_t                     pin_tx, pin_rx, pin_clk, pin_cs;
     LEUART_Init_TypeDef             init = LEUART_INIT_DEFAULT;
-	efm32_irq_hook_init_t			hook;
+    efm32_irq_hook_init_t           hook;
 
-	do
-	{
-		/* Allocate device */
-		leuart = rt_malloc(sizeof(struct efm32_leuart_device_t));
-		if (leuart == RT_NULL)
-		{
-			leuart_debug("LEUART%d err: no mem\n", unitNumber);
-			break;
-		}
-		leuart->counter = 0;
-		leuart->unit    = unitNumber;
-		leuart->state   = config;
-		leuart->tx_mode = RT_NULL;
-		leuart->rx_mode = RT_NULL;
+    do
+    {
+        /* Allocate device */
+        leuart = rt_malloc(sizeof(struct efm32_leuart_device_t));
+        if (leuart == RT_NULL)
+        {
+            leuart_debug("LEUART%d err: no mem\n", unitNumber);
+            break;
+        }
+        leuart->counter = 0;
+        leuart->unit    = unitNumber;
+        leuart->state   = config;
+        leuart->tx_mode = RT_NULL;
+        leuart->rx_mode = RT_NULL;
 
-		/* Allocate TX */
-		dma_mode = RT_NULL;
-		if (flag & RT_DEVICE_FLAG_DMA_TX)
-		{
-			leuart->tx_mode = dma_mode = rt_malloc(sizeof(struct efm32_leuart_dma_mode_t));
-			if (dma_mode == RT_NULL)
-			{
-				leuart_debug("LEUART%d err: no mem for DMA TX\n", unitNumber);
-				break;
-			}
-			dma_mode->dma_channel = dmaChannel;
-		}
+        /* Allocate TX */
+        dma_mode = RT_NULL;
+        if (flag & RT_DEVICE_FLAG_DMA_TX)
+        {
+            leuart->tx_mode = dma_mode = rt_malloc(sizeof(struct efm32_leuart_dma_mode_t));
+            if (dma_mode == RT_NULL)
+            {
+                leuart_debug("LEUART%d err: no mem for DMA TX\n", unitNumber);
+                break;
+            }
+            dma_mode->dma_channel = dmaChannel;
+        }
 
-		/* Allocate RX */
-		if (flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			leuart->rx_mode = rt_malloc(sizeof(struct efm32_leuart_int_mode_t));
-			if (leuart->rx_mode == RT_NULL)
-			{
-				leuart_debug("LEUART%d err: no mem for INT RX\n, unitNumber");
-				break;
-			}
-		}
+        /* Allocate RX */
+        if (flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            leuart->rx_mode = rt_malloc(sizeof(struct efm32_leuart_int_mode_t));
+            if (leuart->rx_mode == RT_NULL)
+            {
+                leuart_debug("LEUART%d err: no mem for INT RX\n, unitNumber");
+                break;
+            }
+        }
 
-		/* Initialization */
-		if (unitNumber >= LEUART_COUNT)
-		{
-			break;
-		}
-		switch (unitNumber)
-		{
-		case 0:
-			leuart->leuart_device    = LEUART0;
-			leuartClock             = (CMU_Clock_TypeDef)cmuClock_LEUART0;
-			txDmaSelect             = DMAREQ_LEUART0_TXBL;
-			port_tx                 = AF_LEUART0_TX_PORT(location);
-			pin_tx                  = AF_LEUART0_TX_PIN(location);
-			port_rx                 = AF_LEUART0_RX_PORT(location);
-			pin_rx                  = AF_LEUART0_RX_PIN(location);
-			break;
+        /* Initialization */
+        if (unitNumber >= LEUART_COUNT)
+        {
+            break;
+        }
+        switch (unitNumber)
+        {
+        case 0:
+            leuart->leuart_device    = LEUART0;
+            leuartClock             = (CMU_Clock_TypeDef)cmuClock_LEUART0;
+            txDmaSelect             = DMAREQ_LEUART0_TXBL;
+            port_tx                 = AF_LEUART0_TX_PORT(location);
+            pin_tx                  = AF_LEUART0_TX_PIN(location);
+            port_rx                 = AF_LEUART0_RX_PORT(location);
+            pin_rx                  = AF_LEUART0_RX_PIN(location);
+            break;
 #if (LEUART_COUNT > 1)
-		case 1:
-			leuart->leuart_device    = LEUART1;
-			leuartClock             = (CMU_Clock_TypeDef)cmuClock_LEUART1;
-			txDmaSelect             = DMAREQ_LEUART1_TXBL;
-			port_tx                 = AF_LEUART1_TX_PORT(location);
-			pin_tx                  = AF_LEUART1_TX_PIN(location);
-			port_rx                 = AF_LEUART1_RX_PORT(location);
-			pin_rx                  = AF_LEUART1_RX_PIN(location);
-			break;
+        case 1:
+            leuart->leuart_device    = LEUART1;
+            leuartClock             = (CMU_Clock_TypeDef)cmuClock_LEUART1;
+            txDmaSelect             = DMAREQ_LEUART1_TXBL;
+            port_tx                 = AF_LEUART1_TX_PORT(location);
+            pin_tx                  = AF_LEUART1_TX_PIN(location);
+            port_rx                 = AF_LEUART1_RX_PORT(location);
+            pin_rx                  = AF_LEUART1_RX_PIN(location);
+            break;
 #endif
-		default:
-			break;
-		}
+        default:
+            break;
+        }
 
         /* Do not prescale clock */
         CMU_ClockDivSet(leuartClock, cmuClkDiv_1);
@@ -884,98 +884,98 @@ static struct efm32_leuart_device_t *rt_hw_leuart_unit_init(
         /* Enable LEUART clock */
         CMU_ClockEnable(leuartClock, true);
 
-		/* Config GPIO */
-		GPIO_PinModeSet(
-			port_tx,
-			pin_tx,
-			gpioModePushPull,
-			0);
-		GPIO_PinModeSet(
-			port_rx,
-			pin_rx,
-			gpioModeInputPull,
-			1);
+        /* Config GPIO */
+        GPIO_PinModeSet(
+            port_tx,
+            pin_tx,
+            gpioModePushPull,
+            0);
+        GPIO_PinModeSet(
+            port_rx,
+            pin_rx,
+            gpioModeInputPull,
+            1);
 
-		/* Config interrupt and NVIC */
-		if (flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			hook.type		= efm32_irq_type_leuart;
-			hook.unit		= unitNumber;
-			hook.cbFunc 	= rt_hw_leuart_rx_isr;
-			hook.userPtr	= device;
-			efm32_irq_hook_register(&hook);
-		}
+        /* Config interrupt and NVIC */
+        if (flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            hook.type       = efm32_irq_type_leuart;
+            hook.unit       = unitNumber;
+            hook.cbFunc     = rt_hw_leuart_rx_isr;
+            hook.userPtr    = device;
+            efm32_irq_hook_register(&hook);
+        }
 
-		/* Config DMA */
-		if (flag & RT_DEVICE_FLAG_DMA_TX)
-		{
-			DMA_CfgChannel_TypeDef	chnlCfg;
-			DMA_CfgDescr_TypeDef	descrCfg;
+        /* Config DMA */
+        if (flag & RT_DEVICE_FLAG_DMA_TX)
+        {
+            DMA_CfgChannel_TypeDef  chnlCfg;
+            DMA_CfgDescr_TypeDef    descrCfg;
 
-			hook.type 			= efm32_irq_type_dma;
-			hook.unit 			= dmaChannel;
-			hook.cbFunc			= rt_hw_leuart_dma_tx_isr;
-			hook.userPtr 		= device;
-			efm32_irq_hook_register(&hook);
+            hook.type           = efm32_irq_type_dma;
+            hook.unit           = dmaChannel;
+            hook.cbFunc         = rt_hw_leuart_dma_tx_isr;
+            hook.userPtr        = device;
+            efm32_irq_hook_register(&hook);
 
-			callback = (DMA_CB_TypeDef *)rt_malloc(sizeof(DMA_CB_TypeDef));
-			if (callback == RT_NULL)
-			{
-				leuart_debug("LEUART%d err: no mem for callback\n", unitNumber);
-				break;
-			}
-			callback->cbFunc	= DMA_IRQHandler_All;
-			callback->userPtr	= RT_NULL;
-			callback->primary	= 0;
+            callback = (DMA_CB_TypeDef *)rt_malloc(sizeof(DMA_CB_TypeDef));
+            if (callback == RT_NULL)
+            {
+                leuart_debug("LEUART%d err: no mem for callback\n", unitNumber);
+                break;
+            }
+            callback->cbFunc    = DMA_IRQHandler_All;
+            callback->userPtr   = RT_NULL;
+            callback->primary   = 0;
 
-			/* Setting up DMA channel */
-			chnlCfg.highPri		= false;	/* Can't use with peripherals */
-			chnlCfg.enableInt 	= true;		/* Interrupt for callback function */
-			chnlCfg.select 		= txDmaSelect;
-			chnlCfg.cb			= callback;
-			DMA_CfgChannel(dmaChannel, &chnlCfg);
+            /* Setting up DMA channel */
+            chnlCfg.highPri     = false;    /* Can't use with peripherals */
+            chnlCfg.enableInt   = true;     /* Interrupt for callback function */
+            chnlCfg.select      = txDmaSelect;
+            chnlCfg.cb          = callback;
+            DMA_CfgChannel(dmaChannel, &chnlCfg);
 
-			/* Setting up DMA channel descriptor */
-			descrCfg.dstInc 	= dmaDataIncNone;
-			descrCfg.srcInc 	= dmaDataInc1;
-			descrCfg.size 		= dmaDataSize1;
-			descrCfg.arbRate 	= dmaArbitrate1;
-			descrCfg.hprot 		= 0;
-			DMA_CfgDescr(dmaChannel, true, &descrCfg);
-		}
+            /* Setting up DMA channel descriptor */
+            descrCfg.dstInc     = dmaDataIncNone;
+            descrCfg.srcInc     = dmaDataInc1;
+            descrCfg.size       = dmaDataSize1;
+            descrCfg.arbRate    = dmaArbitrate1;
+            descrCfg.hprot      = 0;
+            DMA_CfgDescr(dmaChannel, true, &descrCfg);
+        }
 
-		/* Init specified LEUART unit */
+        /* Init specified LEUART unit */
         LEUART_Init(leuart->leuart_device, &init);
 
-		/* Enable RX and TX pins and set location */
-		leuart->leuart_device->ROUTE = LEUART_ROUTE_RXPEN | LEUART_ROUTE_TXPEN | \
-						(location << _LEUART_ROUTE_LOCATION_SHIFT);
+        /* Enable RX and TX pins and set location */
+        leuart->leuart_device->ROUTE = LEUART_ROUTE_RXPEN | LEUART_ROUTE_TXPEN | \
+                        (location << _LEUART_ROUTE_LOCATION_SHIFT);
 
-		/* Clear RX/TX buffers */
-		leuart->leuart_device->CMD = LEUART_CMD_CLEARRX | LEUART_CMD_CLEARTX;
+        /* Clear RX/TX buffers */
+        leuart->leuart_device->CMD = LEUART_CMD_CLEARRX | LEUART_CMD_CLEARTX;
 
-		return leuart;
-	} while(0);
+        return leuart;
+    } while(0);
 
-	if (leuart->rx_mode)
-	{
-		rt_free(leuart->rx_mode);
-	}
-	if (leuart->tx_mode)
-	{
-		rt_free(leuart->tx_mode);
-	}
-	if (leuart)
-	{
-		rt_free(leuart);
-	}
-	if (callback)
-	{
-		rt_free(leuart);
-	}
+    if (leuart->rx_mode)
+    {
+        rt_free(leuart->rx_mode);
+    }
+    if (leuart->tx_mode)
+    {
+        rt_free(leuart->tx_mode);
+    }
+    if (leuart)
+    {
+        rt_free(leuart);
+    }
+    if (callback)
+    {
+        rt_free(leuart);
+    }
 
     leuart_debug("LEUART%d err: init failed!\n", unitNumber);
-	return RT_NULL;
+    return RT_NULL;
 }
 
 /***************************************************************************//**
@@ -989,12 +989,12 @@ static struct efm32_leuart_device_t *rt_hw_leuart_unit_init(
 ******************************************************************************/
 void rt_hw_leuart_init(void)
 {
-	struct efm32_leuart_device_t    *leuart;
-	rt_uint32_t 				    flag;
-	rt_uint8_t					    config;
+    struct efm32_leuart_device_t    *leuart;
+    rt_uint32_t                     flag;
+    rt_uint8_t                      config;
 
-	do
-	{
+    do
+    {
 #ifdef RT_USING_LEUART0
         config = 0;
         flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
@@ -1073,11 +1073,11 @@ void rt_hw_leuart_init(void)
         }
 #endif
 
-		leuart_debug("LEUART: H/W init OK!\n");
-		return;
-	} while (0);
+        leuart_debug("LEUART: H/W init OK!\n");
+        return;
+    } while (0);
 
-	rt_kprintf("LEUART: H/W init failed!\n");
+    rt_kprintf("LEUART: H/W init failed!\n");
 }
 
 #endif /* (defined(RT_USING_LEUART0) || defined(RT_USING_LEUART1)) */
diff --git a/bsp/efm32/drv_leuart.h b/bsp/efm32/drv_leuart.h
index 692ff0d520..b7c24bb025 100644
--- a/bsp/efm32/drv_leuart.h
+++ b/bsp/efm32/drv_leuart.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_leuart.h
- * @brief 	LEUART driver of RT-Thread RTOS for EFM32
+ * @file    drv_leuart.h
+ * @brief   LEUART driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,8 +10,8 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-12-09	onelife		Initial creation for EFM32
+ * Date         Author      Notes
+ * 2011-12-09   onelife     Initial creation for EFM32
  ******************************************************************************/
 #ifndef __DRV_LEUSART_H__
 #define __DRV_LEUSART_H__
@@ -20,37 +20,37 @@
 /* Exported types ------------------------------------------------------------*/
 struct efm32_leuart_int_mode_t
 {
-	rt_uint8_t  		*data_ptr;
-	rt_uint8_t  		data_size;
-	rt_uint32_t 		read_index, save_index;
+    rt_uint8_t          *data_ptr;
+    rt_uint8_t          data_size;
+    rt_uint32_t         read_index, save_index;
 };
 
 struct efm32_leuart_dma_mode_t
 {
-	/* DMA Channel */
-	rt_uint32_t 		dma_channel;
+    /* DMA Channel */
+    rt_uint32_t         dma_channel;
 
-	/* buffer info */
-	rt_uint32_t 		*data_ptr;
-	rt_uint8_t  		data_size;
+    /* buffer info */
+    rt_uint32_t         *data_ptr;
+    rt_uint8_t          data_size;
 };
 
 struct efm32_leuart_device_t
 {
-	/* Counter */
-	rt_uint32_t 		counter;
-	/* Lock */
-	struct rt_semaphore	*lock;
-	/* Unit number */
-	rt_uint8_t 			unit;
-	/* State */
-	volatile rt_uint8_t	state;
-	/*  Pointer to LEUART device structure */
-	LEUART_TypeDef 		*leuart_device;
-	/* Pointer to RX structure */
-	void 				*rx_mode;
-	/* Pointer to TX structure */
-	void 				*tx_mode;
+    /* Counter */
+    rt_uint32_t         counter;
+    /* Lock */
+    struct rt_semaphore *lock;
+    /* Unit number */
+    rt_uint8_t          unit;
+    /* State */
+    volatile rt_uint8_t state;
+    /*  Pointer to LEUART device structure */
+    LEUART_TypeDef      *leuart_device;
+    /* Pointer to RX structure */
+    void                *rx_mode;
+    /* Pointer to TX structure */
+    void                *tx_mode;
 };
 
 /* Exported constants --------------------------------------------------------*/
diff --git a/bsp/efm32/drv_rtc.c b/bsp/efm32/drv_rtc.c
index 16604a3919..75713fe3b4 100644
--- a/bsp/efm32/drv_rtc.c
+++ b/bsp/efm32/drv_rtc.c
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2009-01-05   Bernard     the first version
  * 2010-12-27   onelife     Modify for EFM32
  * 2011-06-16   onelife     Modify init function for efm32lib v2 upgrading
@@ -33,7 +33,7 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef RT_RTC_DEBUG
-#define rtc_debug(format,args...) 			rt_kprintf(format, ##args)
+#define rtc_debug(format,args...)           rt_kprintf(format, ##args)
 #else
 #define rtc_debug(format,args...)
 #endif
@@ -55,10 +55,10 @@ static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
 }
 
 static rt_size_t rt_rtc_read(
-	rt_device_t 	dev,
-	rt_off_t 		pos,
-	void* 			buffer,
-	rt_size_t 		size)
+    rt_device_t     dev,
+    rt_off_t        pos,
+    void*           buffer,
+    rt_size_t       size)
 {
     return 0;
 }
@@ -91,16 +91,16 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
     {
     case RT_DEVICE_CTRL_RTC_GET_TIME:
         *(rt_uint32_t *)args = rtc_time + RTC_CounterGet();
-		rtc_debug("RTC: get rtc_time %x + %x\n", rtc_time, RTC_CounterGet());
+        rtc_debug("RTC: get rtc_time %x + %x\n", rtc_time, RTC_CounterGet());
         break;
 
     case RT_DEVICE_CTRL_RTC_SET_TIME:
     {
         rtc_time = *(rt_uint32_t *)args;
-		rtc_debug("RTC: set rtc_time %x\n", rtc_time);
+        rtc_debug("RTC: set rtc_time %x\n", rtc_time);
 
-		/* Reset counter */
-		RTC_CounterReset();
+        /* Reset counter */
+        RTC_CounterReset();
     }
     break;
     }
@@ -118,12 +118,12 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
  ******************************************************************************/
 void rt_hw_rtc_isr(rt_device_t device)
 {
-	if (RTC->IF & RTC_IFC_OF)
-	{
-		rtc_time += _RTC_CNT_MASK;
-	}
+    if (RTC->IF & RTC_IFC_OF)
+    {
+        rtc_time += _RTC_CNT_MASK;
+    }
 
-	RTC->IFC = _RTC_IFC_MASK;
+    RTC->IFC = _RTC_IFC_MASK;
 }
 
 /***************************************************************************//**
@@ -147,25 +147,25 @@ void rt_hw_rtc_isr(rt_device_t device)
  *  Error code
  ******************************************************************************/
 rt_err_t rt_hw_rtc_register(
-	rt_device_t		device,
-	const char		*name,
-	rt_uint32_t		flag)
+    rt_device_t     device,
+    const char      *name,
+    rt_uint32_t     flag)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	device->type 		= RT_Device_Class_RTC;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= RT_NULL;
-	device->open		= rt_rtc_open;
-	device->close		= RT_NULL;
-	device->read 		= rt_rtc_read;
-	device->write 		= RT_NULL;
-	device->control 	= rt_rtc_control;
-	device->user_data	= RT_NULL; /* no private */
+    device->type        = RT_Device_Class_RTC;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = RT_NULL;
+    device->open        = rt_rtc_open;
+    device->close       = RT_NULL;
+    device->read        = rt_rtc_read;
+    device->write       = RT_NULL;
+    device->control     = rt_rtc_control;
+    device->user_data   = RT_NULL; /* no private */
 
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
 }
 
 
@@ -179,50 +179,50 @@ rt_err_t rt_hw_rtc_register(
  ******************************************************************************/
 void rt_hw_rtc_init(void)
 {
-	rt_uint32_t reset;
+    rt_uint32_t reset;
 
-	reset = RMU_ResetCauseGet();
+    reset = RMU_ResetCauseGet();
 
-	// TODO: What is the current reset mode?
-	if (reset & RMU_RSTCAUSE_PORST || reset & RMU_RSTCAUSE_EXTRST)
+    // TODO: What is the current reset mode?
+    if (reset & RMU_RSTCAUSE_PORST || reset & RMU_RSTCAUSE_EXTRST)
     {
-    	RTC_Init_TypeDef rtcInit;
-		efm32_irq_hook_init_t hook;
+        RTC_Init_TypeDef rtcInit;
+        efm32_irq_hook_init_t hook;
 
-		rtcInit.enable = true;
-		rtcInit.debugRun = false;
-		rtcInit.comp0Top = false;
+        rtcInit.enable = true;
+        rtcInit.debugRun = false;
+        rtcInit.comp0Top = false;
 
-		rtc_time = 0UL;
+        rtc_time = 0UL;
 
         rt_kprintf("rtc is not configured\n");
         rt_kprintf("please configure with set_date and set_time\n");
 
-		/* Configuring clock */
+        /* Configuring clock */
         CMU_ClockDivSet(cmuClock_RTC,cmuClkDiv_32768);
         CMU_ClockEnable(cmuClock_RTC, true);
 
-		/* Initialize and enable RTC */
-		RTC_Reset();
-		RTC_Init(&rtcInit);
+        /* Initialize and enable RTC */
+        RTC_Reset();
+        RTC_Init(&rtcInit);
 
-		hook.type		= efm32_irq_type_rtc;
-		hook.unit		= 0;
-		hook.cbFunc 	= rt_hw_rtc_isr;
-		hook.userPtr	= RT_NULL;
-		efm32_irq_hook_register(&hook);
+        hook.type       = efm32_irq_type_rtc;
+        hook.unit       = 0;
+        hook.cbFunc     = rt_hw_rtc_isr;
+        hook.userPtr    = RT_NULL;
+        efm32_irq_hook_register(&hook);
 
-		/* Enabling Interrupt from RTC */
-		RTC_IntEnable(RTC_IFC_OF);
-		RTC_IntClear(RTC_IFC_OF);
+        /* Enabling Interrupt from RTC */
+        RTC_IntEnable(RTC_IFC_OF);
+        RTC_IntClear(RTC_IFC_OF);
 
-		NVIC_ClearPendingIRQ(RTC_IRQn);
-		NVIC_SetPriority(RTC_IRQn, EFM32_IRQ_PRI_DEFAULT);
-		NVIC_EnableIRQ(RTC_IRQn);
+        NVIC_ClearPendingIRQ(RTC_IRQn);
+        NVIC_SetPriority(RTC_IRQn, EFM32_IRQ_PRI_DEFAULT);
+        NVIC_EnableIRQ(RTC_IRQn);
     }
 
     /* register rtc device */
-	rt_hw_rtc_register(&rtc, RT_RTC_NAME, EFM32_NO_DATA);
+    rt_hw_rtc_register(&rtc, RT_RTC_NAME, EFM32_NO_DATA);
 }
 
 #endif
diff --git a/bsp/efm32/drv_rtc.h b/bsp/efm32/drv_rtc.h
index 492fc59d56..7e33c03896 100644
--- a/bsp/efm32/drv_rtc.h
+++ b/bsp/efm32/drv_rtc.h
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2009-01-05   Bernard     the first version
  * 2010-12-27   onelife     Modification for EFM32
  *********************************************************************/
diff --git a/bsp/efm32/drv_sdcard.h b/bsp/efm32/drv_sdcard.h
index 17c94209c9..2c9a1bfc39 100644
--- a/bsp/efm32/drv_sdcard.h
+++ b/bsp/efm32/drv_sdcard.h
@@ -1,9 +1,9 @@
 /***************************************************************************//**
- * @file 	drv_sdcard.h
- * @brief 	Memory card driver (SPI mode) of RT-Thread RTOS for using EFM32
+ * @file    drv_sdcard.h
+ * @brief   Memory card driver (SPI mode) of RT-Thread RTOS for using EFM32
  *  USART module
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -11,9 +11,9 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-05-13	onelife		Initial creation for using EFM32 USART module
- * 2011-07-07	onelife		Modify initialization function to return error code
+ * Date         Author      Notes
+ * 2011-05-13   onelife     Initial creation for using EFM32 USART module
+ * 2011-07-07   onelife     Modify initialization function to return error code
  ******************************************************************************/
 #ifndef __DEV_SDCARD_H__
 #define __DEV_SDCARD_H__
@@ -33,43 +33,43 @@
 #error "EFM32 SPI clock should not be more than (EFM32_HFXO_FREQUENCY/2)"
 #endif
 
-#define SD_SPEED_LOW 			(0)
-#define SD_SPEED_HIGH 			(1)
-#define SD_WAIT_PERIOD 			(RT_TICK_PER_SECOND)
+#define SD_SPEED_LOW            (0)
+#define SD_SPEED_HIGH           (1)
+#define SD_WAIT_PERIOD          (RT_TICK_PER_SECOND)
 
-#define SD_SECTOR_SIZE_SHIFT	(9)
-#define SD_SECTOR_SIZE 			(1 << SD_SECTOR_SIZE_SHIFT)
-#define SD_BLOCK_SIZE_CSD 		(16)
-#define SD_BLOCK_SIZE_CID 		(16)
-#define SD_BLOCK_SIZE_OCR 		(4)
-#define SD_BLOCK_SIZE_SDSTAT 	(64)
+#define SD_SECTOR_SIZE_SHIFT    (9)
+#define SD_SECTOR_SIZE          (1 << SD_SECTOR_SIZE_SHIFT)
+#define SD_BLOCK_SIZE_CSD       (16)
+#define SD_BLOCK_SIZE_CID       (16)
+#define SD_BLOCK_SIZE_OCR       (4)
+#define SD_BLOCK_SIZE_SDSTAT    (64)
 
 /* Card type definitions (CardType) */
-#define CT_MMC					(0x01)
-#define CT_SD1					(0x02)
-#define CT_SD2					(0x04)
-#define CT_SDC					(CT_SD1|CT_SD2)
-#define CT_BLOCK				(0x08)
+#define CT_MMC                  (0x01)
+#define CT_SD1                  (0x02)
+#define CT_SD2                  (0x04)
+#define CT_SDC                  (CT_SD1|CT_SD2)
+#define CT_BLOCK                (0x08)
 
 /* Definitions for MMC/SDC command */
-#define CMD0 					(0) 		/* GO_IDLE_STATE */
-#define CMD1 					(1) 		/* SEND_OP_COND */
-#define ACMD41 					(41|0x80) 	/* SEND_OP_COND (SDC) */
-#define CMD8 					(8) 		/* SEND_IF_COND */
-#define CMD9 					(9) 		/* SEND_CSD */
-#define CMD10 					(10) 		/* SEND_CID */
-#define CMD12 					(12) 		/* STOP_TRANSMISSION */
-#define ACMD13 					(13|0x80) 	/* SD_STATUS (SDC) */
-#define CMD16 					(16) 		/* SET_BLOCKLEN */
-#define CMD17 					(17) 		/* READ_SINGLE_BLOCK */
-#define CMD18 					(18) 		/* READ_MULTIPLE_BLOCK */
-#define CMD23 					(23) 		/* SET_BLOCK_COUNT */
-#define ACMD23 					(23|0x80) 	/* SET_WR_BLK_ERASE_COUNT (SDC) */
-#define CMD24 					(24) 		/* WRITE_BLOCK */
-#define CMD25 					(25) 		/* WRITE_MULTIPLE_BLOCK */
-#define CMD41 					(41) 		/* SEND_OP_COND (ACMD) */
-#define CMD55 					(55) 		/* APP_CMD */
-#define CMD58 					(58) 		/* READ_OCR */
+#define CMD0                    (0)         /* GO_IDLE_STATE */
+#define CMD1                    (1)         /* SEND_OP_COND */
+#define ACMD41                  (41|0x80)   /* SEND_OP_COND (SDC) */
+#define CMD8                    (8)         /* SEND_IF_COND */
+#define CMD9                    (9)         /* SEND_CSD */
+#define CMD10                   (10)        /* SEND_CID */
+#define CMD12                   (12)        /* STOP_TRANSMISSION */
+#define ACMD13                  (13|0x80)   /* SD_STATUS (SDC) */
+#define CMD16                   (16)        /* SET_BLOCKLEN */
+#define CMD17                   (17)        /* READ_SINGLE_BLOCK */
+#define CMD18                   (18)        /* READ_MULTIPLE_BLOCK */
+#define CMD23                   (23)        /* SET_BLOCK_COUNT */
+#define ACMD23                  (23|0x80)   /* SET_WR_BLK_ERASE_COUNT (SDC) */
+#define CMD24                   (24)        /* WRITE_BLOCK */
+#define CMD25                   (25)        /* WRITE_MULTIPLE_BLOCK */
+#define CMD41                   (41)        /* SEND_OP_COND (ACMD) */
+#define CMD55                   (55)        /* APP_CMD */
+#define CMD58                   (58)        /* READ_OCR */
 
 /* Exported functions ------------------------------------------------------- */
 rt_err_t efm_spiSd_init(void);
diff --git a/bsp/efm32/drv_timer.c b/bsp/efm32/drv_timer.c
index ccfb96ab0e..12e347544c 100644
--- a/bsp/efm32/drv_timer.c
+++ b/bsp/efm32/drv_timer.c
@@ -10,7 +10,7 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-01-18   onelife     Initial creation for EFM32
  * 2011-06-17   onelife     Modify init function for efm32lib v2 upgrading
  ******************************************************************************/
diff --git a/bsp/efm32/drv_usart.c b/bsp/efm32/drv_usart.c
index 7cfb50b0a7..c511a31475 100644
--- a/bsp/efm32/drv_usart.c
+++ b/bsp/efm32/drv_usart.c
@@ -34,9 +34,9 @@
  * 2011-12-20   onelife     Add 9-bit SPI mode support
  * 2011-12-20   onelife     Change SPI write format (same as SPI read)
  * 2011-12-20   onelife     Change USART status format
- * 2011-12-27	onelife		Utilize "USART_PRESENT", "USART_COUNT",
+ * 2011-12-27   onelife     Utilize "USART_PRESENT", "USART_COUNT",
  *  "UART_PRESENT" and "UART_COUNT"
- * 2012-05-16	onelife		Fix a bug in rt_hw_usart_init()
+ * 2012-05-16   onelife     Fix a bug in rt_hw_usart_init()
  ******************************************************************************/
 
 /***************************************************************************//**
diff --git a/bsp/efm32/enc28j60.h b/bsp/efm32/enc28j60.h
index 1351e145a3..1c97d9e10c 100644
--- a/bsp/efm32/enc28j60.h
+++ b/bsp/efm32/enc28j60.h
@@ -197,9 +197,9 @@
 #define MACON3_FRMLNEN   0x02
 #define MACON3_FULDPX    0x01
 // ENC28J60 MACON4 Register Bit Definitions
-#define	MACON4_DEFER	(1<<6)
-#define	MACON4_BPEN		(1<<5)
-#define	MACON4_NOBKOFF	(1<<4)
+#define MACON4_DEFER    (1<<6)
+#define MACON4_BPEN     (1<<5)
+#define MACON4_NOBKOFF  (1<<4)
 // ENC28J60 MICMD Register Bit Definitions
 #define MICMD_MIISCAN    0x02
 #define MICMD_MIIRD      0x01
@@ -218,12 +218,12 @@
 #define PHSTAT1_LLSTAT   0x0004
 #define PHSTAT1_JBSTAT   0x0002
 /* ENC28J60 PHY PHSTAT2 Register Bit Definitions */
-#define PHSTAT2_TXSTAT	(1 << 13)
-#define PHSTAT2_RXSTAT	(1 << 12)
-#define PHSTAT2_COLSTAT	(1 << 11)
-#define PHSTAT2_LSTAT	(1 << 10)
-#define PHSTAT2_DPXSTAT	(1 << 9)
-#define PHSTAT2_PLRITY	(1 << 5)
+#define PHSTAT2_TXSTAT  (1 << 13)
+#define PHSTAT2_RXSTAT  (1 << 12)
+#define PHSTAT2_COLSTAT (1 << 11)
+#define PHSTAT2_LSTAT   (1 << 10)
+#define PHSTAT2_DPXSTAT (1 << 9)
+#define PHSTAT2_PLRITY  (1 << 5)
 // ENC28J60 PHY PHCON2 Register Bit Definitions
 #define PHCON2_FRCLINK   0x4000
 #define PHCON2_TXDIS     0x2000
@@ -282,13 +282,13 @@
 #define RSV_GETBIT(x, y)        (((x) & RSV_BITMASK(y)) ? 1 : 0)
 
 // SPI operation codes
-#define ENC28J60_READ_CTRL_REG 		(0x00)
-#define ENC28J60_READ_BUF_MEM 		(0x20 | 0x1A)
-#define ENC28J60_WRITE_CTRL_REG 	(0x40)
-#define ENC28J60_WRITE_BUF_MEM 		(0x60 | 0x1A)
-#define ENC28J60_BIT_FIELD_SET 		(0x80)
-#define ENC28J60_BIT_FIELD_CLR 		(0xA0)
-#define ENC28J60_SOFT_RESET 		(0xE0 | 0x1F)
+#define ENC28J60_READ_CTRL_REG      (0x00)
+#define ENC28J60_READ_BUF_MEM       (0x20 | 0x1A)
+#define ENC28J60_WRITE_CTRL_REG     (0x40)
+#define ENC28J60_WRITE_BUF_MEM      (0x60 | 0x1A)
+#define ENC28J60_BIT_FIELD_SET      (0x80)
+#define ENC28J60_BIT_FIELD_CLR      (0xA0)
+#define ENC28J60_SOFT_RESET         (0xE0 | 0x1F)
 
 // The RXSTART_INIT should be zero. See Rev. B4 Silicon Errata
 // buffer boundaries applied to internal 8K ram
@@ -296,17 +296,17 @@
 //
 
 // start with recbuf at 0/
-#define RXSTART_INIT	0x0
+#define RXSTART_INIT    0x0
 // receive buffer end
-#define RXSTOP_INIT		(0x1FFF - 0x0600 - 1)
+#define RXSTOP_INIT     (0x1FFF - 0x0600 - 1)
 // start TX buffer at 0x1FFF-0x0600, pace for one full ethernet frame (~1500 bytes)
 
-#define TXSTART_INIT	(0x1FFF - 0x0600)
+#define TXSTART_INIT    (0x1FFF - 0x0600)
 // stp TX buffer at end of mem
-#define TXSTOP_INIT		0x1FFF
+#define TXSTOP_INIT     0x1FFF
 
 // max frame length which the conroller will accept:
-#define MAX_FRAMELEN	1518
+#define MAX_FRAMELEN    1518
 
 void rt_hw_enc28j60_init(void);
 
diff --git a/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119.h b/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119.h
index bb7b7b571b..f6a53d04f9 100644
--- a/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119.h
+++ b/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119.h
@@ -127,11 +127,11 @@ EMSTATUS DMD_setClippingArea(uint16_t xStart, uint16_t yStart,
                              uint16_t width, uint16_t height);
 EMSTATUS DMD_writeData(uint16_t x, uint16_t y,
                        const uint8_t data[], uint32_t numPixels);
-EMSTATUS DMD_writeDataRLE(uint16_t x, uint16_t y, uint16_t xlen, uint16_t ylen, 
+EMSTATUS DMD_writeDataRLE(uint16_t x, uint16_t y, uint16_t xlen, uint16_t ylen,
                           const uint8_t *data);
-EMSTATUS DMD_writeDataRLEFade(uint16_t x, uint16_t y, uint16_t xlen, uint16_t ylen, 
-			      const uint8_t *data,
-			      int red, int green, int blue, int weight);
+EMSTATUS DMD_writeDataRLEFade(uint16_t x, uint16_t y, uint16_t xlen, uint16_t ylen,
+                  const uint8_t *data,
+                  int red, int green, int blue, int weight);
 EMSTATUS DMD_readData(uint16_t x, uint16_t y,
                       uint8_t data[], uint32_t numPixels);
 EMSTATUS DMD_writeColor(uint16_t x, uint16_t y, uint8_t red,
diff --git a/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119_16bit.c b/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119_16bit.c
index 73ba5b4ab5..7925891f95 100644
--- a/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119_16bit.c
+++ b/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119_16bit.c
@@ -425,8 +425,8 @@ EMSTATUS DMD_writeData(uint16_t x, uint16_t y, const uint8_t data[],
 *  DMD_OK on success, otherwise error code
 ******************************************************************************/
 EMSTATUS DMD_writeDataRLEFade(uint16_t x, uint16_t y, uint16_t xlen, uint16_t ylen,
-			      const uint8_t *data,
-			      int red, int green, int blue, int weight)
+                  const uint8_t *data,
+                  int red, int green, int blue, int weight)
 {
    uint32_t color = 0;
    int xpos, ypos;
diff --git a/bsp/efm32/graphics/tftspi.h b/bsp/efm32/graphics/tftspi.h
index 1399fc552e..27e8ce8078 100644
--- a/bsp/efm32/graphics/tftspi.h
+++ b/bsp/efm32/graphics/tftspi.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	tftspi.h
- * @brief 	Stub functions of EFM32 LCD driver
+ * @file    tftspi.h
+ * @brief   Stub functions of EFM32 LCD driver
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-12-20   onelife     Initial creation for EFM32
  ******************************************************************************/
 #ifndef __TFTSPI_H__
diff --git a/bsp/efm32/hdl_interrupt.c b/bsp/efm32/hdl_interrupt.c
index de91a9f9a0..8017414e55 100644
--- a/bsp/efm32/hdl_interrupt.c
+++ b/bsp/efm32/hdl_interrupt.c
@@ -13,10 +13,10 @@
  * Date         Author      Notes
  * 2010-12-29   onelife     Initial creation for EFM32
  * 2011-07-12   onelife     Disable interrupts in GPIO handler
- * 2011-12-09	onelife		Add giant gecko support
+ * 2011-12-09   onelife     Add giant gecko support
  * 2011-12-09   onelife     Add UART module support
  * 2011-12-09   onelife     Add LEUART module support
- * 2011-12-27	onelife		Utilize "XXX_PRESENT" and "XXX_COUNT"
+ * 2011-12-27   onelife     Utilize "XXX_PRESENT" and "XXX_COUNT"
  ******************************************************************************/
 
 /* Includes ------------------------------------------------------------------*/
@@ -32,20 +32,20 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef RT_IRQHDL_DEBUG
-#define hdl_debug(format,args...) 			rt_kprintf(format, ##args)
+#define hdl_debug(format,args...)           rt_kprintf(format, ##args)
 #else
 #define hdl_debug(format,args...)
 #endif
 
 /* Private variables ---------------------------------------------------------*/
-efm32_irq_hook_t dmaCbTable[DMA_CHAN_COUNT * 2]	= {RT_NULL};
-efm32_irq_hook_t timerCbTable[TIMER_COUNT] 		= {RT_NULL};
+efm32_irq_hook_t dmaCbTable[DMA_CHAN_COUNT * 2] = {RT_NULL};
+efm32_irq_hook_t timerCbTable[TIMER_COUNT]      = {RT_NULL};
 #if defined(LETIMER_PRESENT)
 efm32_irq_hook_t letimerCbTable[LETIMER_COUNT]  = {RT_NULL};
 #endif
-efm32_irq_hook_t rtcCbTable[RTC_COUNT] 			= {RT_NULL};
-efm32_irq_hook_t gpioCbTable[16] 				= {RT_NULL};
-efm32_irq_hook_t acmpCbTable[ACMP_COUNT] 		= {RT_NULL};
+efm32_irq_hook_t rtcCbTable[RTC_COUNT]          = {RT_NULL};
+efm32_irq_hook_t gpioCbTable[16]                = {RT_NULL};
+efm32_irq_hook_t acmpCbTable[ACMP_COUNT]        = {RT_NULL};
 #if defined(USART_PRESENT)
  #if defined(UART_PRESENT)
 efm32_irq_hook_t usartCbTable[USART_COUNT * 2 + UART_COUNT * 2] = {RT_NULL};
@@ -57,7 +57,7 @@ efm32_irq_hook_t usartCbTable[USART_COUNT * 2]  = {RT_NULL};
 efm32_irq_hook_t leuartCbTable[LEUART_COUNT]    = {RT_NULL};
 #endif
 #if defined(I2C_PRESENT)
-efm32_irq_hook_t iicCbTable[I2C_COUNT] 			= {RT_NULL};
+efm32_irq_hook_t iicCbTable[I2C_COUNT]          = {RT_NULL};
 #endif
 
 /* Private function prototypes -----------------------------------------------*/
@@ -65,7 +65,7 @@ efm32_irq_hook_t iicCbTable[I2C_COUNT] 			= {RT_NULL};
 
 /***************************************************************************//**
  * @brief
- *	NMI exception handler
+ *  NMI exception handler
  *
  * @details
  *
@@ -73,12 +73,12 @@ efm32_irq_hook_t iicCbTable[I2C_COUNT] 			= {RT_NULL};
  ******************************************************************************/
 void NMI_Handler(void)
 {
-	hdl_debug("[NMI_Handler: NOP]\n");
+    hdl_debug("[NMI_Handler: NOP]\n");
 }
 
 /***************************************************************************//**
  * @brief
- *	Memory manage exception handler
+ *  Memory manage exception handler
  *
  * @details
  *
@@ -86,13 +86,13 @@ void NMI_Handler(void)
  ******************************************************************************/
 void MemManage_Handler(void)
 {
-	hdl_debug("[MemManage_Handler: infinite loop]\n");
-	while (1);
+    hdl_debug("[MemManage_Handler: infinite loop]\n");
+    while (1);
 }
 
 /***************************************************************************//**
  * @brief
- *	Bus fault exception handler
+ *  Bus fault exception handler
  *
  * @details
  *
@@ -100,13 +100,13 @@ void MemManage_Handler(void)
  ******************************************************************************/
 void BusFault_Handler(void)
 {
-	hdl_debug("[BusFault_Handler: infinite loop]\n");
-	while (1);
+    hdl_debug("[BusFault_Handler: infinite loop]\n");
+    while (1);
 }
 
 /***************************************************************************//**
  * @brief
- *	Usage fault exception handler
+ *  Usage fault exception handler
  *
  * @details
  *
@@ -114,13 +114,13 @@ void BusFault_Handler(void)
  ******************************************************************************/
 void UsageFault_Handler(void)
 {
-	hdl_debug("[UsageFault_Handler: infinite loop]\n");
-	while (1);
+    hdl_debug("[UsageFault_Handler: infinite loop]\n");
+    while (1);
 }
 
 /***************************************************************************//**
  * @brief
- *	Supervisor call exception handler
+ *  Supervisor call exception handler
  *
  * @details
  *
@@ -128,12 +128,12 @@ void UsageFault_Handler(void)
  ******************************************************************************/
 void SVC_Handler(void)
 {
-	hdl_debug("[SVC_Handler: NOP]\n");
+    hdl_debug("[SVC_Handler: NOP]\n");
 }
 
 /***************************************************************************//**
  * @brief
- *	 Debug monitor exception handler
+ *   Debug monitor exception handler
  *
  * @details
  *
@@ -141,12 +141,12 @@ void SVC_Handler(void)
  ******************************************************************************/
 void DebugMon_Handler(void)
 {
-	hdl_debug("[DebugMon_Handler: NOP]\n");
+    hdl_debug("[DebugMon_Handler: NOP]\n");
 }
 
 /***************************************************************************//**
  * @brief
- * 	System tick timer interrupt handler
+ *  System tick timer interrupt handler
  *
  * @details
  *
@@ -155,13 +155,13 @@ void DebugMon_Handler(void)
  ******************************************************************************/
 void SysTick_Handler(void)
 {
-	/* enter interrupt */
-	rt_interrupt_enter();
+    /* enter interrupt */
+    rt_interrupt_enter();
 
-	rt_tick_increase();
+    rt_tick_increase();
 
-	/* leave interrupt */
-	rt_interrupt_leave();
+    /* leave interrupt */
+    rt_interrupt_leave();
 }
 
 /*******************************************************************************
@@ -173,7 +173,7 @@ void SysTick_Handler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common DMA interrupt handler
+ *  Common DMA interrupt handler
  *
  * @details
  *
@@ -185,11 +185,11 @@ void DMA_IRQHandler_All(rt_uint32_t channel, rt_bool_t primary, void *user)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	/* invoke callback function */
-	if (dmaCbTable[channel].cbFunc != RT_NULL)
-	{
-		(dmaCbTable[channel].cbFunc)(dmaCbTable[channel].userPtr);
-	}
+    /* invoke callback function */
+    if (dmaCbTable[channel].cbFunc != RT_NULL)
+    {
+        (dmaCbTable[channel].cbFunc)(dmaCbTable[channel].userPtr);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -197,95 +197,95 @@ void DMA_IRQHandler_All(rt_uint32_t channel, rt_bool_t primary, void *user)
 
 /***************************************************************************//**
  * @brief
- * 	Common Timer0 interrupt handler
+ *  Common Timer0 interrupt handler
  *
  * @details
- * 	This function handles Timer0 counter overflow interrupt request
+ *  This function handles Timer0 counter overflow interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void TIMER0_IRQHandler(void)
 {
-	if (TIMER0->IF & TIMER_IF_OF)
-	{
-		/* invoke callback function */
-		if (timerCbTable[0].cbFunc != RT_NULL)
-		{
-			(timerCbTable[0].cbFunc)(timerCbTable[0].userPtr);
-		}
+    if (TIMER0->IF & TIMER_IF_OF)
+    {
+        /* invoke callback function */
+        if (timerCbTable[0].cbFunc != RT_NULL)
+        {
+            (timerCbTable[0].cbFunc)(timerCbTable[0].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(TIMER0->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(TIMER0->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
+    }
 }
 
 
 /***************************************************************************//**
  * @brief
- * 	Common Timer1 interrupt handler
+ *  Common Timer1 interrupt handler
  *
  * @details
- * 	This function handles Timer1 counter overflow interrupt request
+ *  This function handles Timer1 counter overflow interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void TIMER1_IRQHandler(void)
 {
-	if (TIMER1->IF & TIMER_IF_OF)
-	{
-		/* invoke callback function */
-		if (timerCbTable[1].cbFunc != RT_NULL)
-		{
-			(timerCbTable[1].cbFunc)(timerCbTable[1].userPtr);
-		}
+    if (TIMER1->IF & TIMER_IF_OF)
+    {
+        /* invoke callback function */
+        if (timerCbTable[1].cbFunc != RT_NULL)
+        {
+            (timerCbTable[1].cbFunc)(timerCbTable[1].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(TIMER1->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(TIMER1->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
+    }
 }
 
 /***************************************************************************//**
  * @brief
- * 	Common Timer2 interrupt handler
+ *  Common Timer2 interrupt handler
  *
  * @details
- * 	This function handles Timer2 counter overflow interrupt request
+ *  This function handles Timer2 counter overflow interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void TIMER2_IRQHandler(void)
 {
-	if (TIMER2->IF & TIMER_IF_OF)
-	{
-		/* invoke callback function */
-		if (timerCbTable[2].cbFunc != RT_NULL)
-		{
-			(timerCbTable[2].cbFunc)(timerCbTable[2].userPtr);
-		}
+    if (TIMER2->IF & TIMER_IF_OF)
+    {
+        /* invoke callback function */
+        if (timerCbTable[2].cbFunc != RT_NULL)
+        {
+            (timerCbTable[2].cbFunc)(timerCbTable[2].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(TIMER2->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(TIMER2->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
+    }
 }
 
 #if defined(LETIMER_PRESENT)
 /***************************************************************************//**
  * @brief
- * 	Common Low Energy Timer0 interrupt handler
+ *  Common Low Energy Timer0 interrupt handler
  *
  * @details
- * 	This function handles Timer0 counter overflow interrupt request
+ *  This function handles Timer0 counter overflow interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void LETIMER0_IRQHandler(void)
 {
-	if (LETIMER0->IF & LETIMER_IF_UF)
-	{
+    if (LETIMER0->IF & LETIMER_IF_UF)
+    {
         /* enter interrupt */
         rt_interrupt_enter();
 
@@ -294,24 +294,24 @@ void LETIMER0_IRQHandler(void)
         /* leave interrupt */
         rt_interrupt_leave();
 
-		/* invoke callback function */
-/*		if (letimerCbTable[0].cbFunc != RT_NULL)
-		{
-			(letimerCbTable[0].cbFunc)(letimerCbTable[0].userPtr);
-		}
+        /* invoke callback function */
+/*      if (letimerCbTable[0].cbFunc != RT_NULL)
+        {
+            (letimerCbTable[0].cbFunc)(letimerCbTable[0].userPtr);
+        }
 */
-		/* clear interrupt */
-		BITBAND_Peripheral(&(LETIMER0->IFC), _LETIMER_IF_UF_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(LETIMER0->IFC), _LETIMER_IF_UF_SHIFT, 0x1UL);
+    }
 }
 #endif
 
 /***************************************************************************//**
  * @brief
- * 	Common RTC interrupt handler
+ *  Common RTC interrupt handler
  *
  * @details
- * 	This function handles RTC counter overflow interrupt request
+ *  This function handles RTC counter overflow interrupt request
  *
  * @note
  *
@@ -321,14 +321,14 @@ void RTC_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (RTC->IF & RTC_IF_OF)
-	{
-		/* invoke callback function */
-		if (rtcCbTable[0].cbFunc != RT_NULL)
-		{
-			(rtcCbTable[0].cbFunc)(rtcCbTable[0].userPtr);
-		}
-	}
+    if (RTC->IF & RTC_IF_OF)
+    {
+        /* invoke callback function */
+        if (rtcCbTable[0].cbFunc != RT_NULL)
+        {
+            (rtcCbTable[0].cbFunc)(rtcCbTable[0].userPtr);
+        }
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -336,7 +336,7 @@ void RTC_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common even number GPIO interrupt handler
+ *  Common even number GPIO interrupt handler
  *
  * @details
  *
@@ -345,36 +345,36 @@ void RTC_IRQHandler(void)
  ******************************************************************************/
 void GPIO_EVEN_IRQHandler(void)
 {
-	rt_uint16_t flag, n;
-	rt_base_t level;
+    rt_uint16_t flag, n;
+    rt_base_t level;
 
-	/* Disable interrupt */
-	level = rt_hw_interrupt_disable();
+    /* Disable interrupt */
+    level = rt_hw_interrupt_disable();
     /* Enter ISR */
     rt_interrupt_enter();
 
-	 /* invoke callback function */
-	flag = (rt_uint16_t)(GPIO->IF & 0xFFFF);
-	for ( n = 0; flag > 0; flag = flag >> 2, n = n + 2)
-	{
-		if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL))
-		{
-			(gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr);
-		}
-	}
+     /* invoke callback function */
+    flag = (rt_uint16_t)(GPIO->IF & 0xFFFF);
+    for ( n = 0; flag > 0; flag = flag >> 2, n = n + 2)
+    {
+        if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL))
+        {
+            (gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr);
+        }
+    }
 
-	/* clear interrupt */
-	GPIO->IFC = 0x5555UL;
+    /* clear interrupt */
+    GPIO->IFC = 0x5555UL;
 
     /* Leave ISR */
-	rt_interrupt_leave();
-	/* Enable interrupt */
+    rt_interrupt_leave();
+    /* Enable interrupt */
     rt_hw_interrupt_enable(level);
 }
 
 /***************************************************************************//**
  * @brief
- * 	Common odd number GPIO interrupt handler
+ *  Common odd number GPIO interrupt handler
  *
  * @details
  *
@@ -383,39 +383,39 @@ void GPIO_EVEN_IRQHandler(void)
  ******************************************************************************/
 void GPIO_ODD_IRQHandler(void)
 {
-	rt_uint16_t flag, n;
-	rt_base_t level;
+    rt_uint16_t flag, n;
+    rt_base_t level;
 
-	/* Disable interrupt */
-	level = rt_hw_interrupt_disable();
-	/* Enter ISR */
+    /* Disable interrupt */
+    level = rt_hw_interrupt_disable();
+    /* Enter ISR */
     rt_interrupt_enter();
 
-	 /* invoke callback function */
-	flag = (rt_uint16_t)(GPIO->IF & 0xFFFF) >> 1;
-	for ( n = 1; flag > 0; flag = flag >> 2, n = n + 2)
-	{
-		if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL))
-		{
-			(gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr);
-		}
-	}
+     /* invoke callback function */
+    flag = (rt_uint16_t)(GPIO->IF & 0xFFFF) >> 1;
+    for ( n = 1; flag > 0; flag = flag >> 2, n = n + 2)
+    {
+        if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL))
+        {
+            (gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr);
+        }
+    }
 
-	/* clear interrupt */
-	GPIO->IFC = 0xAAAAUL;
+    /* clear interrupt */
+    GPIO->IFC = 0xAAAAUL;
 
     /* Leave ISR */
-	rt_interrupt_leave();
-	/* Enable interrupt */
+    rt_interrupt_leave();
+    /* Enable interrupt */
     rt_hw_interrupt_enable(level);
 }
 
 /***************************************************************************//**
  * @brief
- * 	Common ACMP interrupt handler
+ *  Common ACMP interrupt handler
  *
  * @details
- * 	This function handles ACMP edge trigger interrupt request
+ *  This function handles ACMP edge trigger interrupt request
  *
  * @note
  *
@@ -425,29 +425,29 @@ void ACMP0_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (ACMP0->IF & ACMP_IF_EDGE)
-	{
-		/* invoke callback function */
-		if (acmpCbTable[0].cbFunc != RT_NULL)
-		{
-			(acmpCbTable[0].cbFunc)(acmpCbTable[0].userPtr);
-		}
+    if (ACMP0->IF & ACMP_IF_EDGE)
+    {
+        /* invoke callback function */
+        if (acmpCbTable[0].cbFunc != RT_NULL)
+        {
+            (acmpCbTable[0].cbFunc)(acmpCbTable[0].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(ACMP0->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(ACMP0->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL);
+    }
 
-	if (ACMP1->IF & ACMP_IF_EDGE)
-	{
-		/* invoke callback function */
-		if (acmpCbTable[1].cbFunc != RT_NULL)
-		{
-			(acmpCbTable[1].cbFunc)(acmpCbTable[1].userPtr);
-		}
+    if (ACMP1->IF & ACMP_IF_EDGE)
+    {
+        /* invoke callback function */
+        if (acmpCbTable[1].cbFunc != RT_NULL)
+        {
+            (acmpCbTable[1].cbFunc)(acmpCbTable[1].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(ACMP1->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(ACMP1->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -456,10 +456,10 @@ void ACMP0_IRQHandler(void)
 #if defined(USART_PRESENT)
 /***************************************************************************//**
  * @brief
- * 	Common USART0 TX interrupt handler
+ *  Common USART0 TX interrupt handler
  *
  * @details
- * 	This function handles USART0 TX complete interrupt request
+ *  This function handles USART0 TX complete interrupt request
  *
  * @note
  *
@@ -469,17 +469,17 @@ void USART0_TX_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (USART0->IF & USART_IF_TXC)
-	{
-		/* invoke callback function */
-		if (usartCbTable[0].cbFunc != RT_NULL)
-		{
-			(usartCbTable[0].cbFunc)(usartCbTable[0].userPtr);
-		}
+    if (USART0->IF & USART_IF_TXC)
+    {
+        /* invoke callback function */
+        if (usartCbTable[0].cbFunc != RT_NULL)
+        {
+            (usartCbTable[0].cbFunc)(usartCbTable[0].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(USART0->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(USART0->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -487,34 +487,34 @@ void USART0_TX_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common USART0 RX interrupt handler
+ *  Common USART0 RX interrupt handler
  *
  * @details
- * 	This function handles USART0 RX data valid interrupt request
+ *  This function handles USART0 RX data valid interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void USART0_RX_IRQHandler(void)
 {
-	if (USART0->IF & USART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (usartCbTable[1].cbFunc != RT_NULL)
-		{
-			(usartCbTable[1].cbFunc)(usartCbTable[1].userPtr);
-		}
-	}
+    if (USART0->IF & USART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (usartCbTable[1].cbFunc != RT_NULL)
+        {
+            (usartCbTable[1].cbFunc)(usartCbTable[1].userPtr);
+        }
+    }
 }
 #endif
 
 #if (defined(USART_PRESENT) && (USART_COUNT > 1))
 /***************************************************************************//**
  * @brief
- * 	Common USART1 TX interrupt handler
+ *  Common USART1 TX interrupt handler
  *
  * @details
- * 	This function handles USART1 TX complete interrupt request
+ *  This function handles USART1 TX complete interrupt request
  *
  * @note
  *
@@ -524,17 +524,17 @@ void USART1_TX_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (USART1->IF & USART_IF_TXC)
-	{
-		/* invoke callback function */
-		if (usartCbTable[2].cbFunc != RT_NULL)
-		{
-			(usartCbTable[2].cbFunc)(usartCbTable[2].userPtr);
-		}
+    if (USART1->IF & USART_IF_TXC)
+    {
+        /* invoke callback function */
+        if (usartCbTable[2].cbFunc != RT_NULL)
+        {
+            (usartCbTable[2].cbFunc)(usartCbTable[2].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(USART1->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(USART1->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -542,34 +542,34 @@ void USART1_TX_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common USART1 RX interrupt handler
+ *  Common USART1 RX interrupt handler
  *
  * @details
- * 	This function handles USART1 RX data valid interrupt request
+ *  This function handles USART1 RX data valid interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void USART1_RX_IRQHandler(void)
 {
-	if (USART1->IF & USART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (usartCbTable[3].cbFunc != RT_NULL)
-		{
-			(usartCbTable[3].cbFunc)(usartCbTable[3].userPtr);
-		}
-	}
+    if (USART1->IF & USART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (usartCbTable[3].cbFunc != RT_NULL)
+        {
+            (usartCbTable[3].cbFunc)(usartCbTable[3].userPtr);
+        }
+    }
 }
 #endif
 
 #if (defined(USART_PRESENT) && (USART_COUNT > 2))
 /***************************************************************************//**
  * @brief
- * 	Common USART2 TX interrupt handler
+ *  Common USART2 TX interrupt handler
  *
  * @details
- * 	This function handles USART2 TX complete interrupt request
+ *  This function handles USART2 TX complete interrupt request
  *
  * @note
  *
@@ -579,17 +579,17 @@ void USART2_TX_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (USART2->IF & USART_IF_TXC)
-	{
-		/* invoke callback function */
-		if (usartCbTable[4].cbFunc != RT_NULL)
-		{
-			(usartCbTable[4].cbFunc)(usartCbTable[4].userPtr);
-		}
+    if (USART2->IF & USART_IF_TXC)
+    {
+        /* invoke callback function */
+        if (usartCbTable[4].cbFunc != RT_NULL)
+        {
+            (usartCbTable[4].cbFunc)(usartCbTable[4].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(USART2->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(USART2->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -597,34 +597,34 @@ void USART2_TX_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common USART2 RX interrupt handler
+ *  Common USART2 RX interrupt handler
  *
  * @details
- * 	This function handles USART2 RX data valid interrupt request
+ *  This function handles USART2 RX data valid interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void USART2_RX_IRQHandler(void)
 {
-	if (USART2->IF & USART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (usartCbTable[5].cbFunc != RT_NULL)
-		{
-			(usartCbTable[5].cbFunc)(usartCbTable[5].userPtr);
-		}
-	}
+    if (USART2->IF & USART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (usartCbTable[5].cbFunc != RT_NULL)
+        {
+            (usartCbTable[5].cbFunc)(usartCbTable[5].userPtr);
+        }
+    }
 }
 #endif
 
 #if defined(UART_PRESENT)
 /***************************************************************************//**
  * @brief
- * 	Common UART0 TX interrupt handler
+ *  Common UART0 TX interrupt handler
  *
  * @details
- * 	This function handles UART0 TX complete interrupt request
+ *  This function handles UART0 TX complete interrupt request
  *
  * @note
  *
@@ -634,17 +634,17 @@ void UART0_TX_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (UART0->IF & UART_IF_TXC)
-	{
-		/* invoke callback function */
-		if (usartCbTable[USART_COUNT * 2].cbFunc != RT_NULL)
-		{
-			(usartCbTable[USART_COUNT * 2].cbFunc)(usartCbTable[USART_COUNT * 2].userPtr);
-		}
+    if (UART0->IF & UART_IF_TXC)
+    {
+        /* invoke callback function */
+        if (usartCbTable[USART_COUNT * 2].cbFunc != RT_NULL)
+        {
+            (usartCbTable[USART_COUNT * 2].cbFunc)(usartCbTable[USART_COUNT * 2].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(UART0->IFC), _UART_IF_TXC_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(UART0->IFC), _UART_IF_TXC_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -652,34 +652,34 @@ void UART0_TX_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common UART0 RX interrupt handler
+ *  Common UART0 RX interrupt handler
  *
  * @details
- * 	This function handles UART0 RX data valid interrupt request
+ *  This function handles UART0 RX data valid interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void UART0_RX_IRQHandler(void)
 {
-	if (UART0->IF & UART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (usartCbTable[USART_COUNT * 2 + 1].cbFunc != RT_NULL)
-		{
-			(usartCbTable[USART_COUNT * 2 + 1].cbFunc)(usartCbTable[USART_COUNT * 2 + 1].userPtr);
-		}
-	}
+    if (UART0->IF & UART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (usartCbTable[USART_COUNT * 2 + 1].cbFunc != RT_NULL)
+        {
+            (usartCbTable[USART_COUNT * 2 + 1].cbFunc)(usartCbTable[USART_COUNT * 2 + 1].userPtr);
+        }
+    }
 }
 #endif
 
 #if (defined(UART_PRESENT) && (UART_COUNT > 1))
 /***************************************************************************//**
  * @brief
- * 	Common UART1 TX interrupt handler
+ *  Common UART1 TX interrupt handler
  *
  * @details
- * 	This function handles UART1 TX complete interrupt request
+ *  This function handles UART1 TX complete interrupt request
  *
  * @note
  *
@@ -689,17 +689,17 @@ void UART1_TX_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (UART1->IF & UART_IF_TXC)
-	{
-		/* invoke callback function */
-		if (usartCbTable[USART_COUNT * 2 + 2].cbFunc != RT_NULL)
-		{
-			(usartCbTable[USART_COUNT * 2 + 2].cbFunc)(usartCbTable[USART_COUNT * 2 + 2].userPtr);
-		}
+    if (UART1->IF & UART_IF_TXC)
+    {
+        /* invoke callback function */
+        if (usartCbTable[USART_COUNT * 2 + 2].cbFunc != RT_NULL)
+        {
+            (usartCbTable[USART_COUNT * 2 + 2].cbFunc)(usartCbTable[USART_COUNT * 2 + 2].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(UART1->IFC), _UART_IF_TXC_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(UART1->IFC), _UART_IF_TXC_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -707,106 +707,106 @@ void UART1_TX_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common UART1 RX interrupt handler
+ *  Common UART1 RX interrupt handler
  *
  * @details
- * 	This function handles UART1 RX data valid interrupt request
+ *  This function handles UART1 RX data valid interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void UART1_RX_IRQHandler(void)
 {
-	if (UART1->IF & UART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (usartCbTable[USART_COUNT * 2 + 3].cbFunc != RT_NULL)
-		{
-			(usartCbTable[USART_COUNT * 2 + 3].cbFunc)(usartCbTable[USART_COUNT * 2 + 3].userPtr);
-		}
-	}
+    if (UART1->IF & UART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (usartCbTable[USART_COUNT * 2 + 3].cbFunc != RT_NULL)
+        {
+            (usartCbTable[USART_COUNT * 2 + 3].cbFunc)(usartCbTable[USART_COUNT * 2 + 3].userPtr);
+        }
+    }
 }
 #endif
 
 #if defined(LEUART_PRESENT)
 /***************************************************************************//**
  * @brief
- * 	Common LEUART0 interrupt handler
+ *  Common LEUART0 interrupt handler
  *
  * @details
- * 	This function handles LEUART0 interrupt request
+ *  This function handles LEUART0 interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void LEUART0_IRQHandler(void)
 {
-	if (LEUART0->IF & LEUART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (leuartCbTable[0].cbFunc != RT_NULL)
-		{
-			(leuartCbTable[0].cbFunc)(leuartCbTable[0].userPtr);
-		}
-	}
+    if (LEUART0->IF & LEUART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (leuartCbTable[0].cbFunc != RT_NULL)
+        {
+            (leuartCbTable[0].cbFunc)(leuartCbTable[0].userPtr);
+        }
+    }
 }
 #endif
 
 #if (defined(LEUART_PRESENT) && (LEUART_COUNT > 1))
 /***************************************************************************//**
  * @brief
- * 	Common LEUART1 interrupt handler
+ *  Common LEUART1 interrupt handler
  *
  * @details
- * 	This function handles LEUART1 interrupt request
+ *  This function handles LEUART1 interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void LEUART1_IRQHandler(void)
 {
-	if (LEUART1->IF & LEUART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (leuartCbTable[1].cbFunc != RT_NULL)
-		{
-			(leuartCbTable[1].cbFunc)(leuartCbTable[1].userPtr);
-		}
-	}
+    if (LEUART1->IF & LEUART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (leuartCbTable[1].cbFunc != RT_NULL)
+        {
+            (leuartCbTable[1].cbFunc)(leuartCbTable[1].userPtr);
+        }
+    }
 }
 #endif
 
 #if defined(I2C_PRESENT)
 /***************************************************************************//**
  * @brief
- * 	Common IIC0 interrupt handler
+ *  Common IIC0 interrupt handler
  *
  * @details
- * 	This function handles IIC0 slave mode interrupt requests
+ *  This function handles IIC0 slave mode interrupt requests
  *
  * @note
  *
  ******************************************************************************/
 void I2C0_IRQHandler(void)
 {
-	if ((I2C0->IF & I2C_IF_ADDR) || \
-		(I2C0->IF & I2C_IF_RXDATAV) || \
-		(I2C0->IF & I2C_IF_SSTOP))
-	{
-		/* invoke callback function */
-		if (iicCbTable[0].cbFunc != RT_NULL)
-		{
-			(iicCbTable[0].cbFunc)(iicCbTable[0].userPtr);
-		}
-	}
+    if ((I2C0->IF & I2C_IF_ADDR) || \
+        (I2C0->IF & I2C_IF_RXDATAV) || \
+        (I2C0->IF & I2C_IF_SSTOP))
+    {
+        /* invoke callback function */
+        if (iicCbTable[0].cbFunc != RT_NULL)
+        {
+            (iicCbTable[0].cbFunc)(iicCbTable[0].userPtr);
+        }
+    }
 
-	I2C_IntClear(I2C0, I2C_IFC_ADDR | I2C_IFC_SSTOP);
+    I2C_IntClear(I2C0, I2C_IFC_ADDR | I2C_IFC_SSTOP);
 }
 #endif
 
 /***************************************************************************//**
  * @brief
- * 	EFM32 common interrupt handlers register function
+ *  EFM32 common interrupt handlers register function
  *
  * @details
  *
@@ -815,42 +815,42 @@ void I2C0_IRQHandler(void)
  ******************************************************************************/
 void efm32_irq_hook_register(efm32_irq_hook_init_t *hook)
 {
-	switch (hook->type)
-	{
-	case efm32_irq_type_dma:
-		dmaCbTable[hook->unit].cbFunc = hook->cbFunc;
-		dmaCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    switch (hook->type)
+    {
+    case efm32_irq_type_dma:
+        dmaCbTable[hook->unit].cbFunc = hook->cbFunc;
+        dmaCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 
-	case efm32_irq_type_rtc:
-		rtcCbTable[hook->unit].cbFunc = hook->cbFunc;
-		rtcCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_rtc:
+        rtcCbTable[hook->unit].cbFunc = hook->cbFunc;
+        rtcCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 
-	case efm32_irq_type_timer:
-		timerCbTable[hook->unit].cbFunc = hook->cbFunc;
-		timerCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_timer:
+        timerCbTable[hook->unit].cbFunc = hook->cbFunc;
+        timerCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 
-	case efm32_irq_type_letimer:
-		letimerCbTable[hook->unit].cbFunc = hook->cbFunc;
-		letimerCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_letimer:
+        letimerCbTable[hook->unit].cbFunc = hook->cbFunc;
+        letimerCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 
-	case efm32_irq_type_gpio:
-		gpioCbTable[hook->unit].cbFunc = hook->cbFunc;
-		gpioCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_gpio:
+        gpioCbTable[hook->unit].cbFunc = hook->cbFunc;
+        gpioCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 
-	case efm32_irq_type_acmp:
-		acmpCbTable[hook->unit].cbFunc = hook->cbFunc;
-		acmpCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_acmp:
+        acmpCbTable[hook->unit].cbFunc = hook->cbFunc;
+        acmpCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 #if defined(USART_PRESENT)
-	case efm32_irq_type_usart:
-		usartCbTable[hook->unit].cbFunc = hook->cbFunc;
-		usartCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_usart:
+        usartCbTable[hook->unit].cbFunc = hook->cbFunc;
+        usartCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 #endif
 #if defined(LEUART_PRESENT)
     case efm32_irq_type_leuart:
@@ -859,17 +859,17 @@ void efm32_irq_hook_register(efm32_irq_hook_init_t *hook)
         break;
 #endif
 #if defined(I2C_PRESENT)
-	case efm32_irq_type_iic:
-		iicCbTable[hook->unit].cbFunc = hook->cbFunc;
-		iicCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_iic:
+        iicCbTable[hook->unit].cbFunc = hook->cbFunc;
+        iicCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 #endif
-	default:
-		break;
-	}
+    default:
+        break;
+    }
 
-	hdl_debug("Hook Registered: type: %s, unit: %x, cbFunc: %x, userPtr: %x\n", \
-		hook->type, hook->unit, hook->cbFunc, hook->userPtr);
+    hdl_debug("Hook Registered: type: %s, unit: %x, cbFunc: %x, userPtr: %x\n", \
+        hook->type, hook->unit, hook->cbFunc, hook->userPtr);
 }
 
 /***************************************************************************//**
diff --git a/bsp/efm32/hdl_interrupt.h b/bsp/efm32/hdl_interrupt.h
index 01f7adf9f8..d2f73bda57 100644
--- a/bsp/efm32/hdl_interrupt.h
+++ b/bsp/efm32/hdl_interrupt.h
@@ -21,31 +21,31 @@
 /* Exported types ------------------------------------------------------------*/
 enum efm32_irq_hook_type_t
 {
-	efm32_irq_type_dma = 0,
-	efm32_irq_type_rtc,
-	efm32_irq_type_timer,
+    efm32_irq_type_dma = 0,
+    efm32_irq_type_rtc,
+    efm32_irq_type_timer,
     efm32_irq_type_letimer,
-	efm32_irq_type_gpio,
-	efm32_irq_type_acmp,
-	efm32_irq_type_usart,
-	efm32_irq_type_leuart,
-	efm32_irq_type_iic
+    efm32_irq_type_gpio,
+    efm32_irq_type_acmp,
+    efm32_irq_type_usart,
+    efm32_irq_type_leuart,
+    efm32_irq_type_iic
 };
 
 typedef void (*efm32_irq_callback_t)(rt_device_t device);
 
 typedef struct
 {
-	enum efm32_irq_hook_type_t type;
-	rt_uint8_t unit;
-	efm32_irq_callback_t cbFunc;
-	void *userPtr;
+    enum efm32_irq_hook_type_t type;
+    rt_uint8_t unit;
+    efm32_irq_callback_t cbFunc;
+    void *userPtr;
 } efm32_irq_hook_init_t;
 
 typedef struct
 {
-	efm32_irq_callback_t cbFunc;
-	void *userPtr;
+    efm32_irq_callback_t cbFunc;
+    void *userPtr;
 } efm32_irq_hook_t;
 
 /* Exported constants --------------------------------------------------------*/
diff --git a/bsp/efm32/httpd.c b/bsp/efm32/httpd.c
index c7094d509a..02c81be84d 100644
--- a/bsp/efm32/httpd.c
+++ b/bsp/efm32/httpd.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	httpd.c
- * @brief 	Simple http server demo application
+ * @file    httpd.c
+ * @brief   Simple http server demo application
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,8 +10,8 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-07-04	onelife		Derive from Energy Micro demo application
+ * Date         Author      Notes
+ * 2011-07-04   onelife     Derive from Energy Micro demo application
  ******************************************************************************/
 
 /**************************************************************************//**
@@ -94,29 +94,29 @@
 static int temp, vdd;
 static char indexdata[700];
 static const char indexdata1[] =
-	"HTTP/1.0 200 OK\r\n\
-	Content-type: text/html\r\n\
-	Pragma: no-cache\r\n\
-	Refresh: 5\r\n\
-	\r\n\
-	\
-	EFM32 HTTPD DEMO\
-	\
-	
This is a simple http server
\
-	

Ethernet controller: ENC28J60\
-	

Refreshing timers: ";
+    "HTTP/1.0 200 OK\r\n\
+    Content-type: text/html\r\n\
+    Pragma: no-cache\r\n\
+    Refresh: 5\r\n\
+    \r\n\
+    \
+    EFM32 HTTPD DEMO\
+    \
+    
This is a simple http server
\
+    

Ethernet controller: ENC28J60\
+    

Refreshing timers: ";
 
 static const char indexdata2[] =
-	"

Current Vdd: ";
+    "

Current Vdd: ";
 
 static const char indexdata3[] =
-	" V\
-	

Current temperature: ";
+    " V\
+    

Current temperature: ";
 
 static const char indexdata4[] =
-	" C\
-	\
-	";
+    " C\
+    \
+    ";
 
 /* Private function prototypes -----------------------------------------------*/
 /* Private functions ---------------------------------------------------------*/
@@ -169,9 +169,9 @@ static err_t http_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err
         counter++;
       }
 
-	  vdd = rt_hw_get_vdd();
-	  rt_sprintf(&indexdata[counter], "%1d.%02d", vdd / 100, vdd % 100);
-	  counter += 4;
+      vdd = rt_hw_get_vdd();
+      rt_sprintf(&indexdata[counter], "%1d.%02d", vdd / 100, vdd % 100);
+      counter += 4;
 
       for (i = 0; i < sizeof(indexdata3) - 1; i++)
       {
@@ -179,15 +179,15 @@ static err_t http_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err
         counter++;
       }
 
-	  temp = rt_hw_get_temp();
+      temp = rt_hw_get_temp();
       /*Set temperature sign*/
       if (temp < 0)
       {
         indexdata[counter] = '-';
         counter++;
       }
-	  rt_sprintf(&indexdata[counter], "%02d.%02d\n", temp / 100, temp % 100);
-	  counter += 5;
+      rt_sprintf(&indexdata[counter], "%02d.%02d\n", temp / 100, temp % 100);
+      counter += 5;
 
       for (i = 0; i < sizeof(indexdata4); i++)
       {
diff --git a/bsp/efm32/mma7455l.h b/bsp/efm32/mma7455l.h
index 2ea2cdf34e..c746fd45da 100644
--- a/bsp/efm32/mma7455l.h
+++ b/bsp/efm32/mma7455l.h
@@ -1,9 +1,9 @@
 /***************************************************************************//**
- * @file 	mma7455l.c
- * @brief 	Header file of Freescale MMA7455L 3 axis Low-g digital output
+ * @file    mma7455l.c
+ * @brief   Header file of Freescale MMA7455L 3 axis Low-g digital output
  *  accelerometer
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -11,101 +11,101 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-08-02	onelife		Initial creation
+ * Date         Author      Notes
+ * 2011-08-02   onelife     Initial creation
  ******************************************************************************/
 #ifndef __MMA7455L_H__
 #define __MMA7455L_H__
 
-#define XOUTL 		0x00 	//00  10 bits output value X LSB (Read only)
-#define XOUTH 		0x01 	//01  10 bits output value X MSB (Read only)
-#define YOUTL 		0x02 	//02  10 bits output value Y LSB (Read only)
-#define YOUTH 		0x03 	//03  10 bits output value Y MSB (Read only)
-#define ZOUTL 		0x04 	//04  10 bits output value Z LSB (Read only)
-#define ZOUTH 		0x05 	//05  10 bits output value Z MSB (Read only)
-#define XOUT8 		0x06 	//06   8 bits Output value X (Read only)
-#define YOUT8 		0x07 	//07   8 bits Output value Y (Read only)
-#define ZOUT8 		0x08 	//08   8 bits Output value Z (Read only)
-#define STATUS 		0x09 	//09  Status registers (Read only)
-#define DETSRC 		0x0A 	//10  Detection source registers (Read only)
-#define TOUT 		0x0B 	//11  Temperature output value (Optional)
-#define RESERVED1 	0x0C 	//12  Reserved
-#define I2CAD 		0x0D 	//13  I2C device address (Bit[6:0]: Read only, Bit[7]: Read/Write)
-#define USRINF 		0x0E 	//14  User information  (Optional, Read only)
-#define WHOAMI 		0x0F 	//15  Who am I value (Optional, Read only)
-#define XOFFL 		0x10 	//16  Offset drift X value (LSB) (Read/Write)
-#define XOFFH 		0x11 	//17  Offset drift X value (MSB) (Read/Write)
-#define YOFFL 		0x12 	//18  Offset drift Y value (LSB) (Read/Write)
-#define YOFFH 		0x13 	//19  Offset drift Y value (MSB) (Read/Write)
-#define ZOFFL 		0x14 	//20  Offset drift Z value (LSB) (Read/Write)
-#define ZOFFH 		0x15 	//21  Offset drift Z value (MSB) (Read/Write)
-#define MCTL  		0x16 	//22  Mode control (Read/Write)
-#define INTRST 		0x17 	//23  Interrupt latch reset (Read/Write)
-#define CTL1 		0x18 	//24  Control 1 (Read/Write)
-#define CTL2 		0x19 	//25  Control 2 (Read/Write)
-#define LDTH 		0x1A 	//26  Level detection threshold limit value (Read/Write)
-#define PDTH 		0x1B 	//27  Pulse detection threshold limit value (Read/Write)
-#define PW 			0x1C 	//28  Pulse duration value (Read/Write)
-#define LT 			0x1D 	//29  Latency time value  (Read/Write)
-#define TW 			0x1E 	//30  Time window for second pulse value(Read/Write)
-#define RESERVED2 	0x1F 	//31 Reserved
+#define XOUTL       0x00    //00  10 bits output value X LSB (Read only)
+#define XOUTH       0x01    //01  10 bits output value X MSB (Read only)
+#define YOUTL       0x02    //02  10 bits output value Y LSB (Read only)
+#define YOUTH       0x03    //03  10 bits output value Y MSB (Read only)
+#define ZOUTL       0x04    //04  10 bits output value Z LSB (Read only)
+#define ZOUTH       0x05    //05  10 bits output value Z MSB (Read only)
+#define XOUT8       0x06    //06   8 bits Output value X (Read only)
+#define YOUT8       0x07    //07   8 bits Output value Y (Read only)
+#define ZOUT8       0x08    //08   8 bits Output value Z (Read only)
+#define STATUS      0x09    //09  Status registers (Read only)
+#define DETSRC      0x0A    //10  Detection source registers (Read only)
+#define TOUT        0x0B    //11  Temperature output value (Optional)
+#define RESERVED1   0x0C    //12  Reserved
+#define I2CAD       0x0D    //13  I2C device address (Bit[6:0]: Read only, Bit[7]: Read/Write)
+#define USRINF      0x0E    //14  User information  (Optional, Read only)
+#define WHOAMI      0x0F    //15  Who am I value (Optional, Read only)
+#define XOFFL       0x10    //16  Offset drift X value (LSB) (Read/Write)
+#define XOFFH       0x11    //17  Offset drift X value (MSB) (Read/Write)
+#define YOFFL       0x12    //18  Offset drift Y value (LSB) (Read/Write)
+#define YOFFH       0x13    //19  Offset drift Y value (MSB) (Read/Write)
+#define ZOFFL       0x14    //20  Offset drift Z value (LSB) (Read/Write)
+#define ZOFFH       0x15    //21  Offset drift Z value (MSB) (Read/Write)
+#define MCTL        0x16    //22  Mode control (Read/Write)
+#define INTRST      0x17    //23  Interrupt latch reset (Read/Write)
+#define CTL1        0x18    //24  Control 1 (Read/Write)
+#define CTL2        0x19    //25  Control 2 (Read/Write)
+#define LDTH        0x1A    //26  Level detection threshold limit value (Read/Write)
+#define PDTH        0x1B    //27  Pulse detection threshold limit value (Read/Write)
+#define PW          0x1C    //28  Pulse duration value (Read/Write)
+#define LT          0x1D    //29  Latency time value  (Read/Write)
+#define TW          0x1E    //30  Time window for second pulse value(Read/Write)
+#define RESERVED2   0x1F    //31 Reserved
 
 /* For DETSRC */
-#define DETSRC_INT_1		 		(0x01 << 0)
-#define DETSRC_INT_2		 		(0x01 << 1)
-#define DETSRC_PULSE_Z		 		(0x01 << 2)
-#define DETSRC_PULSE_Y		 		(0x01 << 3)
-#define DETSRC_PULSE_X		 		(0x01 << 4)
-#define DETSRC_LEVEL_Z		 		(0x01 << 5)
-#define DETSRC_LEVEL_Y		 		(0x01 << 6)
-#define DETSRC_LEVEL_X		 		(0x01 << 7)
+#define DETSRC_INT_1                (0x01 << 0)
+#define DETSRC_INT_2                (0x01 << 1)
+#define DETSRC_PULSE_Z              (0x01 << 2)
+#define DETSRC_PULSE_Y              (0x01 << 3)
+#define DETSRC_PULSE_X              (0x01 << 4)
+#define DETSRC_LEVEL_Z              (0x01 << 5)
+#define DETSRC_LEVEL_Y              (0x01 << 6)
+#define DETSRC_LEVEL_X              (0x01 << 7)
 
 /* For MCTL */
-#define MCTL_SHIFT_MODE 			(0)
-#define MCTL_SHIFT_G 				(2)
-#define MCTL_MASK_MODE 				(0x03)
-#define MCTL_MASK_G 				(0x0c)
-#define MCTL_MODE_STANDBY 			(0x00 << MCTL_SHIFT_MODE)
-#define MCTL_MODE_MEASUREMENT 		(0x01 << MCTL_SHIFT_MODE)
-#define MCTL_MODE_LEVEL 			(0x02 << MCTL_SHIFT_MODE)
-#define MCTL_MODE_PULSE 			(0x03 << MCTL_SHIFT_MODE)
-#define MCTL_RANGE_8G				(0x00 << MCTL_SHIFT_G)
-#define MCTL_RANGE_4G				(0x02 << MCTL_SHIFT_G)
-#define MCTL_RANGE_2G				(0x01 << MCTL_SHIFT_G)
-#define MCTL_PIN_INT1				(0x01 << 6)
+#define MCTL_SHIFT_MODE             (0)
+#define MCTL_SHIFT_G                (2)
+#define MCTL_MASK_MODE              (0x03)
+#define MCTL_MASK_G                 (0x0c)
+#define MCTL_MODE_STANDBY           (0x00 << MCTL_SHIFT_MODE)
+#define MCTL_MODE_MEASUREMENT       (0x01 << MCTL_SHIFT_MODE)
+#define MCTL_MODE_LEVEL             (0x02 << MCTL_SHIFT_MODE)
+#define MCTL_MODE_PULSE             (0x03 << MCTL_SHIFT_MODE)
+#define MCTL_RANGE_8G               (0x00 << MCTL_SHIFT_G)
+#define MCTL_RANGE_4G               (0x02 << MCTL_SHIFT_G)
+#define MCTL_RANGE_2G               (0x01 << MCTL_SHIFT_G)
+#define MCTL_PIN_INT1               (0x01 << 6)
 
 /* For INTRST */
-#define INTRST_INT_1 				(0x01 << 0)
-#define INTRST_INT_2 				(0x01 << 1)
+#define INTRST_INT_1                (0x01 << 0)
+#define INTRST_INT_2                (0x01 << 1)
 
 /* For CTL1 */
-#define CTL1_SHIFT_INTPIN 			(0)
-#define CTL1_SHIFT_INT 				(1)
-#define CTL1_SHIFT_AXES 			(3)
-#define CTL1_SHIFT_THRESHOLD 		(6)
-#define CTL1_SHIFT_BANDWIDTH 		(7)
-#define CTL1_MASK_AXES 				(0x38)
-#define CTL1_INTPIN_INVERSE 		(0x01 << CTL1_SHIFT_INTPIN)
-#define CTL1_INT_LEVEL_PULSE 		(0x00 << CTL1_SHIFT_INT)
-#define CTL1_INT_PULSE_LEVEL 		(0x01 << CTL1_SHIFT_INT)
-#define CTL1_INT_SINGLE_DOUBLE 		(0x02 << CTL1_SHIFT_INT)
-#define CTL1_X_DISABLE 				(0x01 << CTL1_SHIFT_AXES)
-#define CTL1_Y_DISABLE 				(0x02 << CTL1_SHIFT_AXES)
-#define CTL1_Z_DISABLE 				(0x04 << CTL1_SHIFT_AXES)
-#define CTL1_THRESHOLD_ABSOLUTE		(0x00 << CTL1_SHIFT_THRESHOLD)
-#define CTL1_THRESHOLD_INTEGER		(0x01 << CTL1_SHIFT_THRESHOLD)
-#define CTL1_BANDWIDTH_62_5HZ 		(0x00 << CTL1_SHIFT_BANDWIDTH)
-#define CTL1_BANDWIDTH_125HZ 		(0x01 << CTL1_SHIFT_BANDWIDTH)
+#define CTL1_SHIFT_INTPIN           (0)
+#define CTL1_SHIFT_INT              (1)
+#define CTL1_SHIFT_AXES             (3)
+#define CTL1_SHIFT_THRESHOLD        (6)
+#define CTL1_SHIFT_BANDWIDTH        (7)
+#define CTL1_MASK_AXES              (0x38)
+#define CTL1_INTPIN_INVERSE         (0x01 << CTL1_SHIFT_INTPIN)
+#define CTL1_INT_LEVEL_PULSE        (0x00 << CTL1_SHIFT_INT)
+#define CTL1_INT_PULSE_LEVEL        (0x01 << CTL1_SHIFT_INT)
+#define CTL1_INT_SINGLE_DOUBLE      (0x02 << CTL1_SHIFT_INT)
+#define CTL1_X_DISABLE              (0x01 << CTL1_SHIFT_AXES)
+#define CTL1_Y_DISABLE              (0x02 << CTL1_SHIFT_AXES)
+#define CTL1_Z_DISABLE              (0x04 << CTL1_SHIFT_AXES)
+#define CTL1_THRESHOLD_ABSOLUTE     (0x00 << CTL1_SHIFT_THRESHOLD)
+#define CTL1_THRESHOLD_INTEGER      (0x01 << CTL1_SHIFT_THRESHOLD)
+#define CTL1_BANDWIDTH_62_5HZ       (0x00 << CTL1_SHIFT_BANDWIDTH)
+#define CTL1_BANDWIDTH_125HZ        (0x01 << CTL1_SHIFT_BANDWIDTH)
 
 /* For CTL2 */
-#define CTL1_SHIFT_LEVEL			(0)
-#define CTL1_SHIFT_PULSE			(1)
-#define CTL1_SHIFT_DRIVE			(2)
-#define CTL2_LEVEL_OR		 		(0x00 << CTL1_SHIFT_LEVEL)
-#define CTL2_LEVEL_AND		 		(0x01 << CTL1_SHIFT_LEVEL)
-#define CTL2_PULSE_OR		 		(0x00 << CTL1_SHIFT_PULSE)
-#define CTL2_PULSE_AND		 		(0x01 << CTL1_SHIFT_PULSE)
-#define CTL2_DRIVE_STANDARD	 		(0x00 << CTL1_SHIFT_DRIVE)
-#define CTL2_DRIVE_STRONG	 		(0x01 << CTL1_SHIFT_DRIVE)
+#define CTL1_SHIFT_LEVEL            (0)
+#define CTL1_SHIFT_PULSE            (1)
+#define CTL1_SHIFT_DRIVE            (2)
+#define CTL2_LEVEL_OR               (0x00 << CTL1_SHIFT_LEVEL)
+#define CTL2_LEVEL_AND              (0x01 << CTL1_SHIFT_LEVEL)
+#define CTL2_PULSE_OR               (0x00 << CTL1_SHIFT_PULSE)
+#define CTL2_PULSE_AND              (0x01 << CTL1_SHIFT_PULSE)
+#define CTL2_DRIVE_STANDARD         (0x00 << CTL1_SHIFT_DRIVE)
+#define CTL2_DRIVE_STRONG           (0x01 << CTL1_SHIFT_DRIVE)
 
 #endif /* __MMA7455L_H__ */
diff --git a/bsp/efm32/rtconfig.h b/bsp/efm32/rtconfig.h
index 58159f90b3..3f62ec7195 100644
--- a/bsp/efm32/rtconfig.h
+++ b/bsp/efm32/rtconfig.h
@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file    rtconfig.h
  * @brief   RT-Thread config file
- * 	COPYRIGHT (C) 2009, RT-Thread Development Team
+ *  COPYRIGHT (C) 2009, RT-Thread Development Team
  * @author
  * @version 1.0
  *******************************************************************************
@@ -22,23 +22,23 @@
 #define EFM32GG_DK3750
 
 /* RT_NAME_MAX */
-#define RT_NAME_MAX					(8)
+#define RT_NAME_MAX                 (8)
 
 /* RT_ALIGN_SIZE */
-#define RT_ALIGN_SIZE				(4)
+#define RT_ALIGN_SIZE               (4)
 
 /* PRIORITY_MAX */
-#define RT_THREAD_PRIORITY_MAX		(32)
+#define RT_THREAD_PRIORITY_MAX      (32)
 
 /* Tick per Second */
-#define RT_TICK_PER_SECOND			(100)
+#define RT_TICK_PER_SECOND          (100)
 
 /* SECTION: RT_DEBUG */
 #define RT_DEBUG
 #define RT_DEBUG_COLOR
-//#define RT_DEBUG_MEM 				(1)
-//#define RT_DEBUG_SCHEDULER 			(1)
-//#define RT_DEBUG_IPC 				(1)
+//#define RT_DEBUG_MEM              (1)
+//#define RT_DEBUG_SCHEDULER            (1)
+//#define RT_DEBUG_IPC              (1)
 //#define THREAD_DEBUG
 //#define IRQ_DEBUG
 #define RT_USING_OVERFLOW_CHECK
@@ -69,9 +69,9 @@
 
 /* Using Software Timer */
 /* #define RT_USING_TIMER_SOFT */
-#define RT_TIMER_THREAD_PRIO		(4)
-#define RT_TIMER_THREAD_STACK_SIZE	(512)
-#define RT_TIMER_TICK_PER_SECOND	(10)
+#define RT_TIMER_THREAD_PRIO        (4)
+#define RT_TIMER_THREAD_STACK_SIZE  (512)
+#define RT_TIMER_TICK_PER_SECOND    (10)
 
 /* SECTION: IPC */
 /* Using Semaphore*/
@@ -134,10 +134,10 @@
 #define EFM32_SPI_CLK_MODE(mode)    (mode << 3) /* clock mode */
 
 #if defined(EFM32_G8XX_STK)
-//#define RT_USING_USART0				(0x0UL)
-//#define RT_USART0_SYNC_MODE			(EFM32_SPI_MASTER)
-//#define RT_USART0_NAME				"spi0"
-//#define RT_USART0_USING_DMA			(0x1UL)
+//#define RT_USING_USART0               (0x0UL)
+//#define RT_USART0_SYNC_MODE           (EFM32_SPI_MASTER)
+//#define RT_USART0_NAME                "spi0"
+//#define RT_USART0_USING_DMA           (0x1UL)
 #elif defined(EFM32_GXXX_DK)
 #define RT_USING_USART0             (0x2UL)
 #define RT_USART0_SYNC_MODE         (EFM32_SPI_MASTER | EFM32_SPI_AUTOCS | \
@@ -165,28 +165,28 @@
 #endif
 
 /* SECTION: IIC options */
-//#define RT_USING_IIC0				0x3UL
-#define RT_IIC0_NAME				"iic0"
+//#define RT_USING_IIC0             0x3UL
+#define RT_IIC0_NAME                "iic0"
 
 /* SECTION: ACMP options */
 //#define RT_USING_ACMP0
-#define RT_ACMP0_NAME 				"acmp0"
+#define RT_ACMP0_NAME               "acmp0"
 
 /* SECTION: ADC options */
 #define RT_USING_ADC0
-#define RT_ADC0_NAME 				"adc0"
+#define RT_ADC0_NAME                "adc0"
 #if defined(RT_USING_ADC0)
 #define RT_USING_MISC
 #endif
 
 /* SECTION: TIMER options */
-//#define RT_USING_TIMER2				(0x00) 		/* Continuous mode */
-#define RT_TIMER2_NAME				"tmr2"
+//#define RT_USING_TIMER2               (0x00)      /* Continuous mode */
+#define RT_TIMER2_NAME              "tmr2"
 
 /* SECTION: RTC options */
 #if (defined(EFM32_G8XX_STK) || defined(EFM32_GXXX_DK) || defined(EFM32GG_DK3750))
 #define RT_USING_RTC
-#define RT_RTC_NAME 				"rtc"
+#define RT_RTC_NAME                 "rtc"
 #endif
 
 /* SECTION: Serial options */
@@ -199,9 +199,9 @@
 #define EFM_LEUART1                 (0x21UL)
 
 #if defined(EFM32_G8XX_STK)
-#define RT_CONSOLE_DEVICE			(EFM_USART1)
+#define RT_CONSOLE_DEVICE           (EFM_USART1)
 #elif defined(EFM32_GXXX_DK)
-#define RT_CONSOLE_DEVICE			(EFM_USART1)
+#define RT_CONSOLE_DEVICE           (EFM_USART1)
 #elif defined(EFM32GG_DK3750)
  #if defined(EFM32GG_DK3750_USING_LEUART1)
  #define RT_CONSOLE_DEVICE          (EFM_LEUART1)
@@ -217,7 +217,7 @@
 /* SECTION: Console options */
 #define RT_USING_CONSOLE
 /* the buffer size of console*/
-#define RT_CONSOLEBUF_SIZE			(128)
+#define RT_CONSOLEBUF_SIZE          (128)
 
 /* SECTION: finsh, a C-Express shell */
 #define RT_USING_FINSH
@@ -226,12 +226,12 @@
 #define FINSH_USING_DESCRIPTION
 
 /* SECTION: Peripheral devices */
-#define EFM32_INTERFACE_ADC 		(0)
-#define EFM32_INTERFACE_IIC 		(1)
-#define EFM32_INTERFACE_SPI 		(2)
+#define EFM32_INTERFACE_ADC         (0)
+#define EFM32_INTERFACE_IIC         (1)
+#define EFM32_INTERFACE_SPI         (2)
 #if (defined(EFM32_GXXX_DK) || defined(EFM32GG_DK3750))
-//#define EFM32_USING_ACCEL 			EFM32_INTERFACE_IIC	/* Three axis accelerometer */
-//#define EFM32_USING_SFLASH 							/* SPI Flash */
+//#define EFM32_USING_ACCEL             EFM32_INTERFACE_IIC /* Three axis accelerometer */
+//#define EFM32_USING_SFLASH                            /* SPI Flash */
 #define EFM32_USING_SPISD                       /* MicroSD card */
 //#define EFM32_USING_ETHERNET                    /* Ethernet controller */
 //#define EFM32_USING_LCD                         /* TFT LCD */
@@ -240,30 +240,30 @@
 
 #if defined(EFM32_USING_ACCEL)
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-#define ACCEL_USING_DEVICE_NAME 	RT_ADC0_NAME
-#define ACCEL_USING_DMA				(0x3UL) 			/* For multiple channels scan mode */
+#define ACCEL_USING_DEVICE_NAME     RT_ADC0_NAME
+#define ACCEL_USING_DMA             (0x3UL)             /* For multiple channels scan mode */
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-#define ACCEL_USING_DEVICE_NAME 	RT_IIC0_NAME
+#define ACCEL_USING_DEVICE_NAME     RT_IIC0_NAME
 #endif
 #endif
 
 #if defined(EFM32_USING_SFLASH)
-#define SFLASH_USING_DEVICE_NAME 	RT_USART0_NAME
+#define SFLASH_USING_DEVICE_NAME    RT_USART0_NAME
 #endif
 
 #if defined(EFM32_USING_SPISD)
-#define SPISD_USING_DEVICE_NAME 	RT_USART0_NAME
-#define SPISD_DEVICE_NAME 			"spiSd"
+#define SPISD_USING_DEVICE_NAME     RT_USART0_NAME
+#define SPISD_DEVICE_NAME           "spiSd"
 #endif
 
 #if defined(EFM32_USING_ETHERNET)
  #if defined(EFM32_GXXX_DK)
- #define ETH_USING_DEVICE_NAME 		RT_USART2_NAME
+ #define ETH_USING_DEVICE_NAME      RT_USART2_NAME
  #elif defined(EFM32GG_DK3750)
- #define ETH_USING_DEVICE_NAME 		RT_USART1_NAME
+ #define ETH_USING_DEVICE_NAME      RT_USART1_NAME
  #endif
-#define ETH_DEVICE_NAME 			"spiEth"
-#define ETH_ADDR_DEFAULT 			{0x00, 0x01, 0x02, 0x03, 0x04, 0x05}
+#define ETH_DEVICE_NAME             "spiEth"
+#define ETH_ADDR_DEFAULT            {0x00, 0x01, 0x02, 0x03, 0x04, 0x05}
 #endif
 
 /* SECTION: device filesystem */
@@ -271,9 +271,9 @@
 #define RT_USING_DFS
 /* the max number of mounted filesystem */
 #define DFS_FILESYSTEMS_MAX         (2)
-/* the max number of opened files 		*/
+/* the max number of opened files       */
 #define DFS_FD_MAX                  (4)
-/* the max number of cached sector 		*/
+/* the max number of cached sector      */
 #define DFS_CACHE_MAX_NUM           (4)
 #endif /* defined(RT_USING_NEWLIB) || defined(EFM32_USING_SPISD) */
 #if defined(EFM32_USING_SPISD)
@@ -288,8 +288,8 @@
 #if defined(EFM32_USING_ETHERNET)
 #define EFM32_USING_ETH_HTTPD
 //#define EFM32_USING_ETH_UTILS
-//#define hostName 					"onelife.dyndns.org"
-//#define userPwdB64 					"dXNlcjpwYXNzd2Q="
+//#define hostName                  "onelife.dyndns.org"
+//#define userPwdB64                    "dXNlcjpwYXNzd2Q="
 
 //#define RT_USING_LWIP
 //#define RT_USING_NETUTILS
@@ -308,37 +308,37 @@
 //#define RT_LWIP_DNS
 
 /* the number of simulatenously active TCP connections*/
-#define RT_LWIP_TCP_PCB_NUM			(2)
+#define RT_LWIP_TCP_PCB_NUM         (2)
 
 /* ip address of target*/
-#define RT_LWIP_IPADDR0				(192)
-#define RT_LWIP_IPADDR1				(168)
-#define RT_LWIP_IPADDR2				(1)
-#define RT_LWIP_IPADDR3				(118)
+#define RT_LWIP_IPADDR0             (192)
+#define RT_LWIP_IPADDR1             (168)
+#define RT_LWIP_IPADDR2             (1)
+#define RT_LWIP_IPADDR3             (118)
 /* gateway address of target*/
-#define RT_LWIP_GWADDR0				(192)
-#define RT_LWIP_GWADDR1				(168)
-#define RT_LWIP_GWADDR2				(1)
-#define RT_LWIP_GWADDR3				(1)
+#define RT_LWIP_GWADDR0             (192)
+#define RT_LWIP_GWADDR1             (168)
+#define RT_LWIP_GWADDR2             (1)
+#define RT_LWIP_GWADDR3             (1)
 /* mask address of target*/
-#define RT_LWIP_MSKADDR0 			(255)
-#define RT_LWIP_MSKADDR1 			(255)
-#define RT_LWIP_MSKADDR2 			(255)
-#define RT_LWIP_MSKADDR3 			(0)
+#define RT_LWIP_MSKADDR0            (255)
+#define RT_LWIP_MSKADDR1            (255)
+#define RT_LWIP_MSKADDR2            (255)
+#define RT_LWIP_MSKADDR3            (0)
 
 /* tcp thread options */
-#define RT_LWIP_TCPTHREAD_PRIORITY	(12)
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE	(4)
-#define RT_LWIP_TCPTHREAD_STACKSIZE	(1024)
+#define RT_LWIP_TCPTHREAD_PRIORITY  (12)
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE (4)
+#define RT_LWIP_TCPTHREAD_STACKSIZE (1024)
 /* ethernet if thread options */
-#define RT_LWIP_ETHTHREAD_PRIORITY 	(15)
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE	(4)
-#define RT_LWIP_ETHTHREAD_STACKSIZE	(512)
+#define RT_LWIP_ETHTHREAD_PRIORITY  (15)
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE (4)
+#define RT_LWIP_ETHTHREAD_STACKSIZE (512)
 #endif /* defined(EFM32_USING_ETHERNET) */
 
 /* SECTION: RTGUI support */
 #if defined(EFM32_USING_LCD)
-#define LCD_USING_DEVICE_NAME 	    RT_USART1_NAME
+#define LCD_USING_DEVICE_NAME       RT_USART1_NAME
 #define LCD_DEVICE_NAME             "lcd"
 /* using RTGUI support */
 // #define RT_USING_RTGUI
diff --git a/bsp/efm32/startup.c b/bsp/efm32/startup.c
index 9a70f1278a..d769bbf99c 100644
--- a/bsp/efm32/startup.c
+++ b/bsp/efm32/startup.c
@@ -10,12 +10,12 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2006-08-31   Bernard     first implementation
  * 2010-12-29   onelife     Modify for EFM32
  * 2011-12-20   onelife     Add RTGUI initialization routine
  * 2012-02-21   onelife     Add energy management initialization routine
- * 2012-05-15	onelife		Modified to compatible with CMSIS v3
+ * 2012-05-15   onelife     Modified to compatible with CMSIS v3
  ******************************************************************************/
 
 /***************************************************************************//**
diff --git a/bsp/fh8620/applications/main.c b/bsp/fh8620/applications/main.c
index fe690504d1..366245b48a 100644
--- a/bsp/fh8620/applications/main.c
+++ b/bsp/fh8620/applications/main.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -27,18 +27,18 @@
 
 void init_thread(void *parameter)
 {
-	rt_components_init();
+    rt_components_init();
 
-	return ;
+    return ;
 }
 
 int rt_application_init(void)
 {
-	rt_thread_t tid;
+    rt_thread_t tid;
 
-	tid = rt_thread_create("init", init_thread, RT_NULL, 
-		4096, RT_THREAD_PRIORITY_MAX/3, 20);
-	if (tid) rt_thread_startup(tid);
+    tid = rt_thread_create("init", init_thread, RT_NULL,
+        4096, RT_THREAD_PRIORITY_MAX/3, 20);
+    if (tid) rt_thread_startup(tid);
 
-	return 0;
+    return 0;
 }
diff --git a/bsp/fh8620/drivers/acw.c b/bsp/fh8620/drivers/acw.c
index 49e10a3bda..6099ff0aa3 100644
--- a/bsp/fh8620/drivers/acw.c
+++ b/bsp/fh8620/drivers/acw.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -30,12 +30,12 @@
 #include "dma.h"
 #ifdef RT_USING_FH_ACW
 #if 1
-typedef struct 
+typedef struct
 {
-	unsigned int 			base;
-	void 					*vbase;
-	unsigned int 			size;
-	unsigned int 			align;
+    unsigned int            base;
+    void                    *vbase;
+    unsigned int            size;
+    unsigned int            align;
 }MEM_DESC;
 #define ACW_SELFTEST 0
 int buffer_malloc_withname(MEM_DESC *mem, int size, int align,  char* name);
@@ -222,9 +222,9 @@ void fh_acw_stop_playback(struct fh_audio_cfg *audio_config)
     audio_config->playback.state = stopping;
     writel(0, audio_dev.reg_base + ACW_TXFIFO_CTRL);//tx fifo disable
     if(audio_config->plauback_trans->channel_number != ACW_PLY_DMA_CHAN)
-    	goto free_mem;
+        goto free_mem;
     if(!audio_config->plauback_trans->first_lli)
-    	goto free_channel;
+        goto free_channel;
     audio_config->playback_dma->ops->control(audio_config->playback_dma,RT_DEVICE_CTRL_DMA_CYCLIC_STOP,audio_config->plauback_trans);
     audio_config->playback_dma->ops->control(audio_config->playback_dma,RT_DEVICE_CTRL_DMA_CYCLIC_FREE,audio_config->plauback_trans);
 free_channel:
@@ -259,9 +259,9 @@ void fh_acw_stop_capture(struct fh_audio_cfg *audio_config)
 
     writel(0, audio_dev.reg_base + 8);//rx fifo disable
     if(audio_config->capture_trans->channel_number != ACW_CAP_DMA_CHAN)
-    	goto free_mem;
+        goto free_mem;
     if(!audio_config->capture_trans->first_lli)
-    	goto free_channel;
+        goto free_channel;
     audio_config->capture_dma->ops->control(audio_config->capture_dma,RT_DEVICE_CTRL_DMA_CYCLIC_STOP,audio_config->capture_trans);
 
     audio_config->capture_dma->ops->control(audio_config->capture_dma,RT_DEVICE_CTRL_DMA_CYCLIC_FREE,audio_config->capture_trans);
@@ -286,10 +286,10 @@ void switch_io_type(enum audio_type type, enum io_select io_type)
         {
             rt_kprintf("audio input changed to mic_in\n");
             writel( reg & (~(1<<1)),audio_dev.reg_base + ACW_ADC_PATH_CTRL);
-        	reg = readl(audio_dev.reg_base + ACW_ADC_PATH_CTRL);
-       	    reg = reg & (~(1<<3));
-       	    reg |=(0x1<<3);
-       	    writel(reg, audio_dev.reg_base + ACW_ADC_PATH_CTRL);
+            reg = readl(audio_dev.reg_base + ACW_ADC_PATH_CTRL);
+            reg = reg & (~(1<<3));
+            reg |=(0x1<<3);
+            writel(reg, audio_dev.reg_base + ACW_ADC_PATH_CTRL);
         }
         else if (line_in == io_type)
         {
@@ -397,7 +397,7 @@ void switch_input_volume(int volume)
     param = get_param_from_volume(volume);
     if (param < 0)
     {
-    	rt_kprintf("capture volume error\n");
+        rt_kprintf("capture volume error\n");
         return;
     }
 
@@ -511,25 +511,25 @@ int register_tx_dma(struct fh_audio_cfg  *audio_config)
 
     if(playback_trans->channel_number == ACW_PLY_DMA_CHAN){
 
-    	ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,playback_trans);
-    	if(ret){
-    		rt_kprintf("can't playback cyclic prepare \n");
-    		return RT_ERROR;
-    	}
-    	ret = 	rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,playback_trans);
-    	if(ret){
-    		rt_kprintf("can't playback cyclic start \n");
-    		return RT_ERROR;
-    	}
+        ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,playback_trans);
+        if(ret){
+            rt_kprintf("can't playback cyclic prepare \n");
+            return RT_ERROR;
+        }
+        ret =   rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,playback_trans);
+        if(ret){
+            rt_kprintf("can't playback cyclic start \n");
+            return RT_ERROR;
+        }
     }
     else
-    	return RT_ERROR;
+        return RT_ERROR;
     return 0;
 }
 
 int register_rx_dma( struct fh_audio_cfg  *audio_config)
 {
-	int ret;
+    int ret;
     struct dma_transfer *capture_slave;
     capture_slave = audio_config->capture_trans;
     struct rt_dma_device *rt_dma_dev;
@@ -546,19 +546,19 @@ int register_rx_dma( struct fh_audio_cfg  *audio_config)
         return RT_ERROR;
     }
     if(capture_slave->channel_number==ACW_CAP_DMA_CHAN){
-    	ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,capture_slave);
-    	if(ret){
-    		rt_kprintf("can't capture cyclic prepare \n");
-    		return RT_ERROR;
-    	}
-    	ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,capture_slave);
-    	if(ret){
-    		rt_kprintf("can't capture cyclic start \n");
-    		return RT_ERROR;
-    	}
+        ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE,capture_slave);
+        if(ret){
+            rt_kprintf("can't capture cyclic prepare \n");
+            return RT_ERROR;
+        }
+        ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_CYCLIC_START,capture_slave);
+        if(ret){
+            rt_kprintf("can't capture cyclic start \n");
+            return RT_ERROR;
+        }
     }
     else
-    	return RT_ERROR;
+        return RT_ERROR;
     writel(0x11,audio_dev.reg_base  + ACW_RXFIFO_CTRL);//clear rx fifo
     writel(0x30029,audio_dev.reg_base + ACW_RXFIFO_CTRL);/*enable rx fifo*/
 
@@ -614,13 +614,13 @@ int fh_acw_start_playback(struct fh_audio_cfg *audio_config)
     audio_config->playback.state = running;
     ret =  audio_request_playback_channel(audio_config);
     if(ret){
-    	rt_kprintf("can't request playback channel\n");
-    	return ret;
+        rt_kprintf("can't request playback channel\n");
+        return ret;
     }
     ret = register_tx_dma(audio_config);
     if (ret < 0)
     {
-    	rt_kprintf("can't register tx dma\n");
+        rt_kprintf("can't register tx dma\n");
         return ret;
     }
     rt_list_init(&(playback_wq.list));
@@ -638,7 +638,7 @@ int fh_acw_start_playback(struct fh_audio_cfg *audio_config)
 
 int fh_acw_start_capture(struct fh_audio_cfg *audio_config)
 {
-	int ret;
+    int ret;
     if(audio_config->capture.state == running)
     {
         return 0;
@@ -654,8 +654,8 @@ int fh_acw_start_capture(struct fh_audio_cfg *audio_config)
     audio_config->capture.state = running;
     ret = audio_request_capture_channel(audio_config);
     if(ret){
-    	rt_kprintf("can't request capture channel \n");
-    	return ret;
+        rt_kprintf("can't request capture channel \n");
+        return ret;
     }
 
     return register_rx_dma(audio_config);
@@ -698,12 +698,12 @@ static void fh_acw_tx_dma_done(void *arg)
         audio_config->playback.hw_ptr = audio_config->playback.hw_ptr - audio_config->playback.size;
     }
 
-	int avail = avail_data_len(playback,audio_config);
-	if (avail > audio_config->playback.cfg.period_bytes)
-	{
+    int avail = avail_data_len(playback,audio_config);
+    if (avail > audio_config->playback.cfg.period_bytes)
+    {
 
-		rt_sem_release(&audio_config->sem_playback);
-	}
+        rt_sem_release(&audio_config->sem_playback);
+    }
 
 #endif
 }
@@ -719,12 +719,12 @@ int arg_config_support(struct fh_audio_cfg_arg * cfg)
 
     ret = get_param_from_volume(cfg->volume);
     if (ret < 0) {
-    	rt_kprintf("invalid volume\n");
+        rt_kprintf("invalid volume\n");
         return -EINVAL;
     }
     ret = get_factor_from_table(cfg->rate);
     if (ret < 0) {
-    	rt_kprintf("invalid rate\n");
+        rt_kprintf("invalid rate\n");
         return -EINVAL;
     }
     return 0;
@@ -1084,7 +1084,7 @@ static void fh_audio_interrupt(int irq, void *param)
 void audio_prealloc_dma_buffer(int aiaotype,struct fh_audio_cfg  *audio_config)
 {
 
-	 if(aiaotype == mic_in || aiaotype == line_in){
+     if(aiaotype == mic_in || aiaotype == line_in){
     audio_config->capture.area  = (void *)fh_dma_mem_malloc(audio_config->capture.cfg.buffer_bytes \
             + audio_config->capture.cfg.period_bytes);
 
@@ -1093,8 +1093,8 @@ void audio_prealloc_dma_buffer(int aiaotype,struct fh_audio_cfg  *audio_config)
         rt_kprintf("no enough mem for capture  buffer alloc\n");
         return ;
     }
-	 }
-	 if(aiaotype == speaker_out || aiaotype == line_out){
+     }
+     if(aiaotype == speaker_out || aiaotype == line_out){
     audio_config->playback.area  = (void *)fh_dma_mem_malloc(audio_config->playback.cfg.buffer_bytes \
             + audio_config->playback.cfg.period_bytes);
 
@@ -1169,9 +1169,9 @@ int audio_request_capture_channel(struct fh_audio_cfg  *audio_config){
     rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_OPEN,dma_rx_transfer);
     ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,dma_rx_transfer);
     if(ret){
-    	rt_kprintf("can't request capture channel\n");
-    	dma_rx_transfer->channel_number =0xff;
-    	return -ret;
+        rt_kprintf("can't request capture channel\n");
+        dma_rx_transfer->channel_number =0xff;
+        return -ret;
     }
 
 }
@@ -1219,9 +1219,9 @@ int audio_request_playback_channel(struct fh_audio_cfg  *audio_config)
     rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_OPEN,dma_tx_transfer);
     ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,dma_tx_transfer);
     if(ret){
-    	rt_kprintf("can't request playbak channel\n");
-    	dma_tx_transfer->channel_number = 0xff;
-    	return -ret;
+        rt_kprintf("can't request playbak channel\n");
+        dma_tx_transfer->channel_number = 0xff;
+        return -ret;
     }
     return 0;
 
@@ -1320,7 +1320,7 @@ void fh_acw_test(){
     cfg.frame_bit = 16;
 
     cfg.io_type = mic_in;
-    
+
     cfg.period_size = BUFF_SIZE/8;
     cfg.rate = 8000;
     cfg.volume = 80;
@@ -1344,18 +1344,18 @@ void fh_acw_test(){
 
     ret = acw_dev->control(acw_dev,AC_AI_EN,&cfg);
     if(ret)
-    	acw_dev->control(acw_dev,AC_AI_DISABLE,&cfg);
+        acw_dev->control(acw_dev,AC_AI_DISABLE,&cfg);
     cfg.io_type = line_out;
     acw_dev->control(acw_dev,AC_INIT_PLAYBACK_MEM,&cfg);
     ret = acw_dev->control(acw_dev,AC_AO_EN,&cfg);
     if(ret){
-    	acw_dev->control(acw_dev,AC_AO_DISABLE,&cfg);
+        acw_dev->control(acw_dev,AC_AO_DISABLE,&cfg);
    // acw_dev->control(acw_dev,AC_SET_OUTPUT_MODE,&output);
-    	return ;
+        return ;
     }
 
 
-	 for(i=0;i<100;i++)
+     for(i=0;i<100;i++)
  {
 
 rx:
@@ -1374,7 +1374,7 @@ tx:
         acw_dev->write(acw_dev,0,&rx_buff[0],1024*8);
 
     }
- 	acw_dev->close(acw_dev);
+    acw_dev->close(acw_dev);
 
 }
 #ifdef RT_USING_FINSH
diff --git a/bsp/fh8620/drivers/acw.h b/bsp/fh8620/drivers/acw.h
index 2156d343f4..82fce3b9ff 100644
--- a/bsp/fh8620/drivers/acw.h
+++ b/bsp/fh8620/drivers/acw.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef ACW_H_
 #define ACW_H_
 #include 
@@ -37,86 +37,86 @@
 typedef unsigned long long dma_addr_t;
 struct scatterlist {
 #ifdef CONFIG_DEBUG_SG
-	unsigned long	sg_magic;
+    unsigned long   sg_magic;
 #endif
-	unsigned long	page_link;
-	unsigned int	offset;
-	unsigned int	length;
-	dma_addr_t	dma_address;
+    unsigned long   page_link;
+    unsigned int    offset;
+    unsigned int    length;
+    dma_addr_t  dma_address;
 #ifdef CONFIG_NEED_SG_DMA_LENGTH
-	unsigned int	dma_length;
+    unsigned int    dma_length;
 #endif
 };
 #define readl(a)          (*(volatile rt_uint32_t   *)(a))
-#define rkqueue_struct		rt_workqueue
-#define work_struct				rt_work
-#define INIT_WORK(work,func)	rt_work_init(work,func,RT_NULL);
-#define queue_work				rt_workqueue_dowork
+#define rkqueue_struct      rt_workqueue
+#define work_struct             rt_work
+#define INIT_WORK(work,func)    rt_work_init(work,func,RT_NULL);
+#define queue_work              rt_workqueue_dowork
 
 
 //timer
-#define timer_list				rt_timer
-#define wait_queue_head_t				struct rt_event
-#define init_waitqueue_head(event_t) 		rt_event_init(event_t, "audio_event", RT_IPC_FLAG_FIFO)
+#define timer_list              rt_timer
+#define wait_queue_head_t               struct rt_event
+#define init_waitqueue_head(event_t)        rt_event_init(event_t, "audio_event", RT_IPC_FLAG_FIFO)
 typedef enum{
-	AC_SR_8K   = 8000,
-	AC_SR_16K  = 16000,
-	AC_SR_32K  = 32000,
-	AC_SR_441K = 44100,
-	AC_SR_48K  = 48000,
+    AC_SR_8K   = 8000,
+    AC_SR_16K  = 16000,
+    AC_SR_32K  = 32000,
+    AC_SR_441K = 44100,
+    AC_SR_48K  = 48000,
 } FH_AC_SAMPLE_RATE_E;
 
 typedef enum{
-	AC_BW_8  = 8,
-	AC_BW_16 = 16,
-	AC_BW_24 = 24,
+    AC_BW_8  = 8,
+    AC_BW_16 = 16,
+    AC_BW_24 = 24,
 } FH_AC_BIT_WIDTH_E;
 
 enum io_select{
-	mic_in = 0,
-	line_in = 1,
-	speaker_out = 2,
-	line_out = 3,
+    mic_in = 0,
+    line_in = 1,
+    speaker_out = 2,
+    line_out = 3,
 };
 
 struct fh_audio_cfg_arg{
-	enum io_select io_type;
-	int volume;
-	int rate;
-	int frame_bit;
-	int channels;
-	int buffer_size;
-	int period_size;
+    enum io_select io_type;
+    int volume;
+    int rate;
+    int frame_bit;
+    int channels;
+    int buffer_size;
+    int period_size;
 };
 typedef struct{
-	unsigned int len;
-	unsigned char *data;
+    unsigned int len;
+    unsigned char *data;
 }FH_AC_FRAME_S;
 
 typedef enum{
-	FH_AC_MIC_IN = 0,
-	FH_AC_LINE_IN = 1,
-	FH_AC_SPK_OUT = 2,
-	FH_AC_LINE_OUT = 3
+    FH_AC_MIC_IN = 0,
+    FH_AC_LINE_IN = 1,
+    FH_AC_SPK_OUT = 2,
+    FH_AC_LINE_OUT = 3
 }FH_AC_IO_TYPE_E;
 
 
 typedef struct {
-	FH_AC_IO_TYPE_E io_type;
-	FH_AC_SAMPLE_RATE_E sample_rate;
-	FH_AC_BIT_WIDTH_E bit_width;
-	unsigned int channels;
-	unsigned int period_size;
-	unsigned int volume;
+    FH_AC_IO_TYPE_E io_type;
+    FH_AC_SAMPLE_RATE_E sample_rate;
+    FH_AC_BIT_WIDTH_E bit_width;
+    unsigned int channels;
+    unsigned int period_size;
+    unsigned int volume;
 } FH_AC_CONFIG;
 
 struct device_dma_parameters {
-	/*
-	 * a low level driver may set these to teach IOMMU code about
-	 * sg limitations.
-	 */
-	unsigned int max_segment_size;
-	unsigned long segment_boundary_mask;
+    /*
+     * a low level driver may set these to teach IOMMU code about
+     * sg limitations.
+     */
+    unsigned int max_segment_size;
+    unsigned long segment_boundary_mask;
 };
 
 struct list_head {
@@ -124,32 +124,32 @@ struct list_head {
     struct list_head *prev;
 };
 struct dma_coherent_mem {
-	void		*virt_base;
-	dma_addr_t	device_base;
-	int		size;
-	int		flags;
-	unsigned long	*bitmap;
+    void        *virt_base;
+    dma_addr_t  device_base;
+    int     size;
+    int     flags;
+    unsigned long   *bitmap;
 };
 struct device_acw{
-	unsigned long long		*dma_mask;	/* dma mask (if dma'able device) */
-	unsigned long long		coherent_dma_mask;/* Like dma_mask, but for
-					     alloc_coherent mappings as
-					     not all hardware supports
-					     64 bit addresses for consistent
-					     allocations such descriptors. */
-	struct device_dma_parameters *dma_parms;
+    unsigned long long      *dma_mask;  /* dma mask (if dma'able device) */
+    unsigned long long      coherent_dma_mask;/* Like dma_mask, but for
+                         alloc_coherent mappings as
+                         not all hardware supports
+                         64 bit addresses for consistent
+                         allocations such descriptors. */
+    struct device_dma_parameters *dma_parms;
 
-	struct list_head	dma_pools;
+    struct list_head    dma_pools;
 
-	struct dma_coherent_mem	*dma_mem;
+    struct dma_coherent_mem *dma_mem;
 };
 #define false 0
 #define true  1
 
 
 
-#define	AC_INIT_CAPTURE_MEM    	    0x10
-#define	AC_INIT_PLAYBACK_MEM        0x11
+#define AC_INIT_CAPTURE_MEM         0x10
+#define AC_INIT_PLAYBACK_MEM        0x11
 
 
 #define AC_SET_VOL                  0x12
@@ -160,73 +160,73 @@ struct device_acw{
 #define AC_AI_EN                    0x15
 #define AC_AO_EN                    0x16
 #define AC_AI_DISABLE               0x17
-#define AC_AO_DISABLE       		0x18
-#define AC_AI_PAUSE               	0x19
-#define AC_AI_RESUME          		0x1a
-#define AC_AO_PAUSE              	0x1b
-#define AC_AO_RESUME          		0x1c
-#define AC_MIC_BOOST          		0x1d
+#define AC_AO_DISABLE               0x18
+#define AC_AI_PAUSE                 0x19
+#define AC_AI_RESUME                0x1a
+#define AC_AO_PAUSE                 0x1b
+#define AC_AO_RESUME                0x1c
+#define AC_MIC_BOOST                0x1d
 
-#define POLLIN		0x001		/* There is data to read.  */
-#define POLLPRI		0x002		/* There is urgent data to read.  */
-#define POLLOUT		0x004		/* Writing now will not block.  */
+#define POLLIN      0x001       /* There is data to read.  */
+#define POLLPRI     0x002       /* There is urgent data to read.  */
+#define POLLOUT     0x004       /* Writing now will not block.  */
 
 
 /* These values are defined in XPG4.2.  */
-# define POLLRDNORM	0x040		/* Normal data may be read.  */
-# define POLLRDBAND	0x080		/* Priority data may be read.  */
-# define POLLWRNORM	0x100		/* Writing now will not block.  */
-# define POLLWRBAND	0x200		/* Priority data may be written.  */
+# define POLLRDNORM 0x040       /* Normal data may be read.  */
+# define POLLRDBAND 0x080       /* Priority data may be read.  */
+# define POLLWRNORM 0x100       /* Writing now will not block.  */
+# define POLLWRBAND 0x200       /* Priority data may be written.  */
 
 
 
 /* These are extensions for Linux.  */
-# define POLLMSG	0x400
-# define POLLREMOVE	0x1000
-# define POLLRDHUP	0x2000
+# define POLLMSG    0x400
+# define POLLREMOVE 0x1000
+# define POLLRDHUP  0x2000
 
 
 /* Event types always implicitly polled for.  These bits need not be set in
    `events', but they will appear in `revents' to indicate the status of
    the file descriptor.  */
-#define POLLERR		0x008		/* Error condition.  */
-#define POLLHUP		0x010		/* Hung up.  */
-#define POLLNVAL	0x020		/* Invalid polling request.  */
+#define POLLERR     0x008       /* Error condition.  */
+#define POLLHUP     0x010       /* Hung up.  */
+#define POLLNVAL    0x020       /* Invalid polling request.  */
 
-#define	EPERM		 1	/* Operation not permitted */
-#define	ENOENT		 2	/* No such file or directory */
-#define	ESRCH		 3	/* No such process */
-#define	EINTR		 4	/* Interrupted system call */
-#define	EIO		 5	/* I/O error */
-#define	ENXIO		 6	/* No such device or address */
-#define	E2BIG		 7	/* Argument list too long */
-#define	ENOEXEC		 8	/* Exec format error */
-#define	EBADF		 9	/* Bad file number */
-#define	ECHILD		10	/* No child processes */
-#define	EAGAIN		11	/* Try again */
-#define	ENOMEM		12	/* Out of memory */
-#define	EACCES		13	/* Permission denied */
-#define	EFAULT		14	/* Bad address */
-#define	ENOTBLK		15	/* Block device required */
-#define	EBUSY		16	/* Device or resource busy */
-#define	EEXIST		17	/* File exists */
-#define	EXDEV		18	/* Cross-device link */
-#define	ENODEV		19	/* No such device */
-#define	ENOTDIR		20	/* Not a directory */
-#define	EISDIR		21	/* Is a directory */
-#define	EINVAL		22	/* Invalid argument */
-#define	ENFILE		23	/* File table overflow */
-#define	EMFILE		24	/* Too many open files */
-#define	ENOTTY		25	/* Not a typewriter */
-#define	ETXTBSY		26	/* Text file busy */
-#define	EFBIG		27	/* File too large */
-#define	ENOSPC		28	/* No space left on device */
-#define	ESPIPE		29	/* Illegal seek */
-#define	EROFS		30	/* Read-only file system */
-#define	EMLINK		31	/* Too many links */
-#define	EPIPE		32	/* Broken pipe */
-#define	EDOM		33	/* Math argument out of domain of func */
-#define	ERANGE		34	/* Math result not representable */
+#define EPERM        1  /* Operation not permitted */
+#define ENOENT       2  /* No such file or directory */
+#define ESRCH        3  /* No such process */
+#define EINTR        4  /* Interrupted system call */
+#define EIO      5  /* I/O error */
+#define ENXIO        6  /* No such device or address */
+#define E2BIG        7  /* Argument list too long */
+#define ENOEXEC      8  /* Exec format error */
+#define EBADF        9  /* Bad file number */
+#define ECHILD      10  /* No child processes */
+#define EAGAIN      11  /* Try again */
+#define ENOMEM      12  /* Out of memory */
+#define EACCES      13  /* Permission denied */
+#define EFAULT      14  /* Bad address */
+#define ENOTBLK     15  /* Block device required */
+#define EBUSY       16  /* Device or resource busy */
+#define EEXIST      17  /* File exists */
+#define EXDEV       18  /* Cross-device link */
+#define ENODEV      19  /* No such device */
+#define ENOTDIR     20  /* Not a directory */
+#define EISDIR      21  /* Is a directory */
+#define EINVAL      22  /* Invalid argument */
+#define ENFILE      23  /* File table overflow */
+#define EMFILE      24  /* Too many open files */
+#define ENOTTY      25  /* Not a typewriter */
+#define ETXTBSY     26  /* Text file busy */
+#define EFBIG       27  /* File too large */
+#define ENOSPC      28  /* No space left on device */
+#define ESPIPE      29  /* Illegal seek */
+#define EROFS       30  /* Read-only file system */
+#define EMLINK      31  /* Too many links */
+#define EPIPE       32  /* Broken pipe */
+#define EDOM        33  /* Math argument out of domain of func */
+#define ERANGE      34  /* Math result not representable */
 extern void  fh_audio_init(void);
 extern void fh_acw_test();
 #endif
diff --git a/bsp/fh8620/drivers/dma.c b/bsp/fh8620/drivers/dma.c
index 394ac2a6a3..3105f9261b 100644
--- a/bsp/fh8620/drivers/dma.c
+++ b/bsp/fh8620/drivers/dma.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 /*****************************************************************************
  *  Include Section
  *  add all #include here
@@ -88,7 +88,7 @@ static rt_err_t rt_dma_control(struct rt_device *dev,
  *****************************************************************************/
 static rt_err_t rt_dma_init(struct rt_device *dev)
 {
-	struct rt_dma_device *dma;
+    struct rt_dma_device *dma;
 
     RT_ASSERT(dev != RT_NULL);
     dma = (struct rt_dma_device *)dev;
@@ -107,7 +107,7 @@ static rt_err_t rt_dma_open(struct rt_device *dev, rt_uint16_t oflag)
 
 static rt_err_t rt_dma_close(struct rt_device *dev)
 {
-	struct rt_dma_device *dma;
+    struct rt_dma_device *dma;
 
     RT_ASSERT(dev != RT_NULL);
     dma = (struct rt_dma_device *)dev;
@@ -124,7 +124,7 @@ static rt_err_t rt_dma_control(struct rt_device *dev,
                                     rt_uint8_t        cmd,
                                     void             *args)
 {
-	struct rt_dma_device *dma;
+    struct rt_dma_device *dma;
 
     RT_ASSERT(dev != RT_NULL);
     dma = (struct rt_dma_device *)dev;
@@ -141,7 +141,7 @@ rt_err_t rt_hw_dma_register(struct rt_dma_device *dma,
                                  rt_uint32_t                flag,
                                  void                      *data)
 {
-	rt_uint32_t ret;
+    rt_uint32_t ret;
     struct rt_device *device;
     RT_ASSERT(dma != RT_NULL);
 
diff --git a/bsp/fh8620/drivers/dma.h b/bsp/fh8620/drivers/dma.h
index c8c3fbf574..2ef3253196 100644
--- a/bsp/fh8620/drivers/dma.h
+++ b/bsp/fh8620/drivers/dma.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -29,31 +29,31 @@
 #include 
 /****************************************************************************
 * #include section
-*	add #include here if any
+*   add #include here if any
 ***************************************************************************/
 
 
 /****************************************************************************
 * #define section
-*	add constant #define here if any
+*   add constant #define here if any
 ***************************************************************************/
-#define RT_DEVICE_CTRL_DMA_OPEN						(1)
-#define RT_DEVICE_CTRL_DMA_CLOSE					(2)
-#define RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL    		(3)
-#define RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL   	 	(4)
-#define RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER			(5)
+#define RT_DEVICE_CTRL_DMA_OPEN                     (1)
+#define RT_DEVICE_CTRL_DMA_CLOSE                    (2)
+#define RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL          (3)
+#define RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL          (4)
+#define RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER          (5)
 
 
 //cyclic add func below....
 
 
-#define RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE			(6)
-#define RT_DEVICE_CTRL_DMA_CYCLIC_START				(7)
-#define RT_DEVICE_CTRL_DMA_CYCLIC_STOP				(8)
-#define RT_DEVICE_CTRL_DMA_CYCLIC_FREE				(9)
+#define RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE           (6)
+#define RT_DEVICE_CTRL_DMA_CYCLIC_START             (7)
+#define RT_DEVICE_CTRL_DMA_CYCLIC_STOP              (8)
+#define RT_DEVICE_CTRL_DMA_CYCLIC_FREE              (9)
 
 
-//#define RT_DEVICE_CTRL_  	 (3) /* get the left time before reboot(in seconds) */
+//#define RT_DEVICE_CTRL_    (3) /* get the left time before reboot(in seconds) */
 //#define RT_DEVICE_CTRL_      (4) /* refresh watchdog */
 //#define RT_DEVICE_CTRL_      (5) /* start watchdog */
 //#define RT_DEVICE_CTRL_      (6) /* stop watchdog */
@@ -64,13 +64,13 @@
 
 /****************************************************************************
 * ADT section
-*	add Abstract Data Type definition here
+*   add Abstract Data Type definition here
 ***************************************************************************/
 
 struct rt_dma_ops;
 struct rt_dma_device
 {
-	// the parent must be the fitst para..
+    // the parent must be the fitst para..
     struct rt_device parent;
     struct rt_dma_ops *ops;
 };
@@ -91,7 +91,7 @@ struct rt_dma_ops
 
 /****************************************************************************
 *  section
-*	add function prototype here if any
+*   add function prototype here if any
 ***************************************************************************/
 rt_err_t rt_hw_dma_register(struct rt_dma_device *dma,
                                  const char    *name,
diff --git a/bsp/fh8620/drivers/dma_mem.c b/bsp/fh8620/drivers/dma_mem.c
index 52c9e56b4a..9360ab5b81 100644
--- a/bsp/fh8620/drivers/dma_mem.c
+++ b/bsp/fh8620/drivers/dma_mem.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 /*****************************************************************************
  *  Include Section
  *  add all #include here
@@ -86,27 +86,27 @@ static struct rt_memheap dma_heap = {0};
  *      what does this function returned?
  *****************************************************************************/
 rt_err_t fh_dma_mem_init(rt_uint32_t *mem_start,rt_uint32_t size){
-	return rt_memheap_init(&dma_heap,"dma_heap",mem_start,size);
+    return rt_memheap_init(&dma_heap,"dma_heap",mem_start,size);
 }
 
 
 void *fh_dma_mem_malloc(rt_uint32_t size){
-	return rt_memheap_alloc(&dma_heap, size);
+    return rt_memheap_alloc(&dma_heap, size);
 }
 
 
 void fh_dma_mem_free(void *ptr){
-	rt_memheap_free(ptr);
+    rt_memheap_free(ptr);
 }
 
 #ifdef FH_TEST_DMA_MEM
 int dma_mem_debug(void *ptr){
-	//rt_memheap_free(ptr);
-	rt_kprintf("dma mem start 0x%08x\n",(rt_uint32_t)dma_heap.start_addr);
-	rt_kprintf("dma mem total size 0x%08x\n",dma_heap.pool_size);
-	rt_kprintf("dma mem left size 0x%08x\n",dma_heap.available_size);
-	rt_kprintf("dma mem max use size 0x%08x\n",dma_heap.max_used_size);
-	return 0;
+    //rt_memheap_free(ptr);
+    rt_kprintf("dma mem start 0x%08x\n",(rt_uint32_t)dma_heap.start_addr);
+    rt_kprintf("dma mem total size 0x%08x\n",dma_heap.pool_size);
+    rt_kprintf("dma mem left size 0x%08x\n",dma_heap.available_size);
+    rt_kprintf("dma mem max use size 0x%08x\n",dma_heap.max_used_size);
+    return 0;
 }
 #endif
 
diff --git a/bsp/fh8620/drivers/dma_mem.h b/bsp/fh8620/drivers/dma_mem.h
index b431703a4a..fea4222432 100644
--- a/bsp/fh8620/drivers/dma_mem.h
+++ b/bsp/fh8620/drivers/dma_mem.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef DMA_MEM_H_
 #define DMA_MEM_H_
 
@@ -36,20 +36,20 @@
 #include 
 /****************************************************************************
 * #include section
-*	add #include here if any
+*   add #include here if any
 ***************************************************************************/
 
 
 /****************************************************************************
 * #define section
-*	add constant #define here if any
+*   add constant #define here if any
 ***************************************************************************/
 
 
 
 /****************************************************************************
 * ADT section
-*	add Abstract Data Type definition here
+*   add Abstract Data Type definition here
 ***************************************************************************/
 
 
@@ -61,7 +61,7 @@
 
 /****************************************************************************
 *  section
-*	add function prototype here if any
+*   add function prototype here if any
 ***************************************************************************/
 #ifdef RT_USING_DMA_MEM
 rt_err_t fh_dma_mem_init(rt_uint32_t *mem_start,rt_uint32_t size);
diff --git a/bsp/fh8620/drivers/fh_dma.c b/bsp/fh8620/drivers/fh_dma.c
index c50ae1e1df..d44ecf4e1f 100644
--- a/bsp/fh8620/drivers/fh_dma.c
+++ b/bsp/fh8620/drivers/fh_dma.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 /*****************************************************************************
  *  Include Section
  *  add all #include here
@@ -45,187 +45,187 @@
 //#define DMA_DEBUG
 #ifdef DMA_DEBUG
 
-#define FH_DMA_DEBUG(fmt, args...)	    		\
-			rt_kprintf(fmt,##args);
+#define FH_DMA_DEBUG(fmt, args...)              \
+            rt_kprintf(fmt,##args);
 #else
 #define FH_DMA_DEBUG(fmt, args...)
 #endif
 
 
-#define		DMA_REG_BASE		(0xEE000000)
-#define 	DMA_CONTROLLER_NUMBER		(1)
+#define     DMA_REG_BASE        (0xEE000000)
+#define     DMA_CONTROLLER_NUMBER       (1)
 
 
 
-#define WORK_QUEUE_STACK_SIZE		512
-#define WORK_QUEUE_PRIORITY			12
+#define WORK_QUEUE_STACK_SIZE       512
+#define WORK_QUEUE_PRIORITY         12
 
 
-#define TEST_PER_NO			(10)
+#define TEST_PER_NO         (10)
 
-#define DESC_MAX_SIZE			(20)
+#define DESC_MAX_SIZE           (20)
 /*********************************
  *
  * copy from the linux core start
  *
  *********************************/
 //this is the ip reg offset....don't change!!!!!!!
-#define DW_DMA_MAX_NR_CHANNELS	8
+#define DW_DMA_MAX_NR_CHANNELS  8
 
 /*
  * Redefine this macro to handle differences between 32- and 64-bit
  * addressing, big vs. little endian, etc.
  */
-#define DW_REG(name)		rt_uint32_t name; rt_uint32_t __pad_##name
+#define DW_REG(name)        rt_uint32_t name; rt_uint32_t __pad_##name
 
 /* Hardware register definitions. */
 struct dw_dma_chan_regs {
-	DW_REG(SAR);		/* Source Address Register */
-	DW_REG(DAR);		/* Destination Address Register */
-	DW_REG(LLP);		/* Linked List Pointer */
-	rt_uint32_t	CTL_LO;		/* Control Register Low */
-	rt_uint32_t	CTL_HI;		/* Control Register High */
-	DW_REG(SSTAT);
-	DW_REG(DSTAT);
-	DW_REG(SSTATAR);
-	DW_REG(DSTATAR);
-	rt_uint32_t	CFG_LO;		/* Configuration Register Low */
-	rt_uint32_t	CFG_HI;		/* Configuration Register High */
-	DW_REG(SGR);
-	DW_REG(DSR);
+    DW_REG(SAR);        /* Source Address Register */
+    DW_REG(DAR);        /* Destination Address Register */
+    DW_REG(LLP);        /* Linked List Pointer */
+    rt_uint32_t CTL_LO;     /* Control Register Low */
+    rt_uint32_t CTL_HI;     /* Control Register High */
+    DW_REG(SSTAT);
+    DW_REG(DSTAT);
+    DW_REG(SSTATAR);
+    DW_REG(DSTATAR);
+    rt_uint32_t CFG_LO;     /* Configuration Register Low */
+    rt_uint32_t CFG_HI;     /* Configuration Register High */
+    DW_REG(SGR);
+    DW_REG(DSR);
 };
 
 struct dw_dma_irq_regs {
-	DW_REG(XFER);
-	DW_REG(BLOCK);
-	DW_REG(SRC_TRAN);
-	DW_REG(DST_TRAN);
-	DW_REG(ERROR);
+    DW_REG(XFER);
+    DW_REG(BLOCK);
+    DW_REG(SRC_TRAN);
+    DW_REG(DST_TRAN);
+    DW_REG(ERROR);
 };
 
 struct dw_dma_regs {
-	/* per-channel registers */
-	struct dw_dma_chan_regs	CHAN[DW_DMA_MAX_NR_CHANNELS];
+    /* per-channel registers */
+    struct dw_dma_chan_regs CHAN[DW_DMA_MAX_NR_CHANNELS];
 
-	/* irq handling */
-	struct dw_dma_irq_regs	RAW;		/* r */
-	struct dw_dma_irq_regs	STATUS;		/* r (raw & mask) */
-	struct dw_dma_irq_regs	MASK;		/* rw (set = irq enabled) */
-	struct dw_dma_irq_regs	CLEAR;		/* w (ack, affects "raw") */
+    /* irq handling */
+    struct dw_dma_irq_regs  RAW;        /* r */
+    struct dw_dma_irq_regs  STATUS;     /* r (raw & mask) */
+    struct dw_dma_irq_regs  MASK;       /* rw (set = irq enabled) */
+    struct dw_dma_irq_regs  CLEAR;      /* w (ack, affects "raw") */
 
-	DW_REG(STATUS_INT);			/* r */
+    DW_REG(STATUS_INT);         /* r */
 
-	/* software handshaking */
-	DW_REG(REQ_SRC);
-	DW_REG(REQ_DST);
-	DW_REG(SGL_REQ_SRC);
-	DW_REG(SGL_REQ_DST);
-	DW_REG(LAST_SRC);
-	DW_REG(LAST_DST);
+    /* software handshaking */
+    DW_REG(REQ_SRC);
+    DW_REG(REQ_DST);
+    DW_REG(SGL_REQ_SRC);
+    DW_REG(SGL_REQ_DST);
+    DW_REG(LAST_SRC);
+    DW_REG(LAST_DST);
 
-	/* miscellaneous */
-	DW_REG(CFG);
-	DW_REG(CH_EN);
-	DW_REG(ID);
-	DW_REG(TEST);
+    /* miscellaneous */
+    DW_REG(CFG);
+    DW_REG(CH_EN);
+    DW_REG(ID);
+    DW_REG(TEST);
 
-	/* optional encoded params, 0x3c8..0x3 */
+    /* optional encoded params, 0x3c8..0x3 */
 };
 
 
 
 
 /* Bitfields in CTL_LO */
-#define DWC_CTLL_INT_EN			(1 << 0)	/* irqs enabled? */
-#define DWC_CTLL_DST_WIDTH(n)	((n)<<1)	/* bytes per element */
-#define DWC_CTLL_SRC_WIDTH(n)	((n)<<4)
+#define DWC_CTLL_INT_EN         (1 << 0)    /* irqs enabled? */
+#define DWC_CTLL_DST_WIDTH(n)   ((n)<<1)    /* bytes per element */
+#define DWC_CTLL_SRC_WIDTH(n)   ((n)<<4)
 
 #define DWC_CTLL_DST_INC_MODE(n) ((n)<<7)
 
-#define DWC_CTLL_DST_INC		(0<<7)		/* DAR update/not */
-#define DWC_CTLL_DST_DEC		(1<<7)
-#define DWC_CTLL_DST_FIX		(2<<7)
+#define DWC_CTLL_DST_INC        (0<<7)      /* DAR update/not */
+#define DWC_CTLL_DST_DEC        (1<<7)
+#define DWC_CTLL_DST_FIX        (2<<7)
 
 
 #define DWC_CTLL_SRC_INC_MODE(n) ((n)<<9)
 
 
-#define DWC_CTLL_SRC_INC		(0<<9)		/* SAR update/not */
-#define DWC_CTLL_SRC_DEC		(1<<9)
-#define DWC_CTLL_SRC_FIX		(2<<9)
-#define DWC_CTLL_DST_MSIZE(n)	((n)<<11)	/* burst, #elements */
-#define DWC_CTLL_SRC_MSIZE(n)	((n)<<14)
-#define DWC_CTLL_S_GATH_EN		(1 << 17)	/* src gather, !FIX */
-#define DWC_CTLL_D_SCAT_EN		(1 << 18)	/* dst scatter, !FIX */
-#define DWC_CTLL_FC(n)			((n) << 20)
-#define DWC_CTLL_FC_M2M			(0 << 20)	/* mem-to-mem */
-#define DWC_CTLL_FC_M2P			(1 << 20)	/* mem-to-periph */
-#define DWC_CTLL_FC_P2M			(2 << 20)	/* periph-to-mem */
-#define DWC_CTLL_FC_P2P			(3 << 20)	/* periph-to-periph */
+#define DWC_CTLL_SRC_INC        (0<<9)      /* SAR update/not */
+#define DWC_CTLL_SRC_DEC        (1<<9)
+#define DWC_CTLL_SRC_FIX        (2<<9)
+#define DWC_CTLL_DST_MSIZE(n)   ((n)<<11)   /* burst, #elements */
+#define DWC_CTLL_SRC_MSIZE(n)   ((n)<<14)
+#define DWC_CTLL_S_GATH_EN      (1 << 17)   /* src gather, !FIX */
+#define DWC_CTLL_D_SCAT_EN      (1 << 18)   /* dst scatter, !FIX */
+#define DWC_CTLL_FC(n)          ((n) << 20)
+#define DWC_CTLL_FC_M2M         (0 << 20)   /* mem-to-mem */
+#define DWC_CTLL_FC_M2P         (1 << 20)   /* mem-to-periph */
+#define DWC_CTLL_FC_P2M         (2 << 20)   /* periph-to-mem */
+#define DWC_CTLL_FC_P2P         (3 << 20)   /* periph-to-periph */
 /* plus 4 transfer types for peripheral-as-flow-controller */
-#define DWC_CTLL_DMS(n)			((n)<<23)	/* dst master select */
-#define DWC_CTLL_SMS(n)			((n)<<25)	/* src master select */
-#define DWC_CTLL_LLP_D_EN		(1 << 27)	/* dest block chain */
-#define DWC_CTLL_LLP_S_EN		(1 << 28)	/* src block chain */
+#define DWC_CTLL_DMS(n)         ((n)<<23)   /* dst master select */
+#define DWC_CTLL_SMS(n)         ((n)<<25)   /* src master select */
+#define DWC_CTLL_LLP_D_EN       (1 << 27)   /* dest block chain */
+#define DWC_CTLL_LLP_S_EN       (1 << 28)   /* src block chain */
 
 /* Bitfields in CTL_HI */
-#define DWC_CTLH_DONE			0x00001000
-#define DWC_CTLH_BLOCK_TS_MASK	0x00000fff
+#define DWC_CTLH_DONE           0x00001000
+#define DWC_CTLH_BLOCK_TS_MASK  0x00000fff
 
 /* Bitfields in CFG_LO. Platform-configurable bits are in  */
-#define DWC_CFGL_CH_PRIOR_MASK	(0x7 << 5)	/* priority mask */
-#define DWC_CFGL_CH_PRIOR(x)	((x) << 5)	/* priority */
-#define DWC_CFGL_CH_SUSP		(1 << 8)	/* pause xfer */
-#define DWC_CFGL_FIFO_EMPTY		(1 << 9)	/* pause xfer */
+#define DWC_CFGL_CH_PRIOR_MASK  (0x7 << 5)  /* priority mask */
+#define DWC_CFGL_CH_PRIOR(x)    ((x) << 5)  /* priority */
+#define DWC_CFGL_CH_SUSP        (1 << 8)    /* pause xfer */
+#define DWC_CFGL_FIFO_EMPTY     (1 << 9)    /* pause xfer */
 
 
-#define DWC_CFGL_HS_DST			(1 << 10)	/* handshake w/dst */
-#define DWC_CFGL_HS_SRC			(1 << 11)	/* handshake w/src */
-#define DWC_CFGL_MAX_BURST(x)	((x) << 20)
-#define DWC_CFGL_RELOAD_SAR		(1 << 30)
-#define DWC_CFGL_RELOAD_DAR		(1 << 31)
+#define DWC_CFGL_HS_DST         (1 << 10)   /* handshake w/dst */
+#define DWC_CFGL_HS_SRC         (1 << 11)   /* handshake w/src */
+#define DWC_CFGL_MAX_BURST(x)   ((x) << 20)
+#define DWC_CFGL_RELOAD_SAR     (1 << 30)
+#define DWC_CFGL_RELOAD_DAR     (1 << 31)
 
 /* Bitfields in CFG_HI. Platform-configurable bits are in  */
-#define DWC_CFGH_DS_UPD_EN		(1 << 5)
-#define DWC_CFGH_SS_UPD_EN		(1 << 6)
+#define DWC_CFGH_DS_UPD_EN      (1 << 5)
+#define DWC_CFGH_SS_UPD_EN      (1 << 6)
 
 /* Bitfields in SGR */
-#define DWC_SGR_SGI(x)			((x) << 0)
-#define DWC_SGR_SGC(x)			((x) << 20)
+#define DWC_SGR_SGI(x)          ((x) << 0)
+#define DWC_SGR_SGC(x)          ((x) << 20)
 
 /* Bitfields in DSR */
-#define DWC_DSR_DSI(x)			((x) << 0)
-#define DWC_DSR_DSC(x)			((x) << 20)
+#define DWC_DSR_DSI(x)          ((x) << 0)
+#define DWC_DSR_DSC(x)          ((x) << 20)
 
 /* Bitfields in CFG */
-#define DW_CFG_DMA_EN			(1 << 0)
+#define DW_CFG_DMA_EN           (1 << 0)
 
-#define DW_REGLEN				0x400
+#define DW_REGLEN               0x400
 
 
 /* Platform-configurable bits in CFG_HI */
-#define DWC_CFGH_FCMODE		(1 << 0)
-#define DWC_CFGH_FIFO_MODE	(1 << 1)
-#define DWC_CFGH_PROTCTL(x)	((x) << 2)
-#define DWC_CFGH_SRC_PER(x)	((x) << 7)
-#define DWC_CFGH_DST_PER(x)	((x) << 11)
+#define DWC_CFGH_FCMODE     (1 << 0)
+#define DWC_CFGH_FIFO_MODE  (1 << 1)
+#define DWC_CFGH_PROTCTL(x) ((x) << 2)
+#define DWC_CFGH_SRC_PER(x) ((x) << 7)
+#define DWC_CFGH_DST_PER(x) ((x) << 11)
 
 /* Platform-configurable bits in CFG_LO */
-#define DWC_CFGL_LOCK_CH_XFER	(0 << 12)	/* scope of LOCK_CH */
-#define DWC_CFGL_LOCK_CH_BLOCK	(1 << 12)
-#define DWC_CFGL_LOCK_CH_XACT	(2 << 12)
-#define DWC_CFGL_LOCK_BUS_XFER	(0 << 14)	/* scope of LOCK_BUS */
-#define DWC_CFGL_LOCK_BUS_BLOCK	(1 << 14)
-#define DWC_CFGL_LOCK_BUS_XACT	(2 << 14)
-#define DWC_CFGL_LOCK_CH	(1 << 15)	/* channel lockout */
-#define DWC_CFGL_LOCK_BUS	(1 << 16)	/* busmaster lockout */
-#define DWC_CFGL_HS_DST_POL	(1 << 18)	/* dst handshake active low */
-#define DWC_CFGL_HS_SRC_POL	(1 << 19)	/* src handshake active low */
+#define DWC_CFGL_LOCK_CH_XFER   (0 << 12)   /* scope of LOCK_CH */
+#define DWC_CFGL_LOCK_CH_BLOCK  (1 << 12)
+#define DWC_CFGL_LOCK_CH_XACT   (2 << 12)
+#define DWC_CFGL_LOCK_BUS_XFER  (0 << 14)   /* scope of LOCK_BUS */
+#define DWC_CFGL_LOCK_BUS_BLOCK (1 << 14)
+#define DWC_CFGL_LOCK_BUS_XACT  (2 << 14)
+#define DWC_CFGL_LOCK_CH    (1 << 15)   /* channel lockout */
+#define DWC_CFGL_LOCK_BUS   (1 << 16)   /* busmaster lockout */
+#define DWC_CFGL_HS_DST_POL (1 << 18)   /* dst handshake active low */
+#define DWC_CFGL_HS_SRC_POL (1 << 19)   /* src handshake active low */
 
 
 
 
-#define lift_shift_bit_num(bit_num)			(1<regs)->name))
+    __raw_readl(&(((struct dw_dma_regs *)dw->regs)->name))
 #define dw_writel(dw, name, val) \
-	__raw_writel((val), &(((struct dw_dma_regs *)dw->regs)->name))
+    __raw_writel((val), &(((struct dw_dma_regs *)dw->regs)->name))
 #define dw_readw(dw, name) \
-	__raw_readw(&(((struct dw_dma_regs *)dw->regs)->name))
+    __raw_readw(&(((struct dw_dma_regs *)dw->regs)->name))
 #define dw_writew(dw, name, val) \
-	__raw_writew((val), &(((struct dw_dma_regs *)dw->regs)->name))
+    __raw_writew((val), &(((struct dw_dma_regs *)dw->regs)->name))
 
 
 
 
 
 
-#define CHANNEL0		(lift_shift_bit_num(0))
-#define CHANNEL1		(lift_shift_bit_num(1))
-#define CHANNEL2		(lift_shift_bit_num(2))
-#define CHANNEL3		(lift_shift_bit_num(3))
+#define CHANNEL0        (lift_shift_bit_num(0))
+#define CHANNEL1        (lift_shift_bit_num(1))
+#define CHANNEL2        (lift_shift_bit_num(2))
+#define CHANNEL3        (lift_shift_bit_num(3))
 
 #define channel_set_bit(dw, reg, mask) \
-	dw_writel(dw, reg, ((mask) << 8) | (mask))
+    dw_writel(dw, reg, ((mask) << 8) | (mask))
 #define channel_clear_bit(dw, reg, mask) \
-	dw_writel(dw, reg, ((mask) << 8) | 0)
+    dw_writel(dw, reg, ((mask) << 8) | 0)
 
 
 
@@ -275,83 +275,83 @@ struct dw_dma_regs {
  ***************************************************************************/
 
 struct dw_dma{
-	//vadd
-	void 				*regs;
-	//padd
-	rt_uint32_t			paddr;
-	rt_uint32_t			irq;
-	rt_uint32_t			channel_max_number;
+    //vadd
+    void                *regs;
+    //padd
+    rt_uint32_t         paddr;
+    rt_uint32_t         irq;
+    rt_uint32_t         channel_max_number;
 
-#define CONTROLLER_STATUS_CLOSED		(0)
-#define CONTROLLER_STATUS_OPEN			(1)
-	rt_uint32_t			controller_status;
-#define FH81_DMA_INIT_NOT_YET		(0)
-#define FH81_DMA_INIT_ALREADY		(1)
-	rt_uint32_t			init;
-	rt_uint32_t			id;
-	char	 *name;
-	rt_uint32_t channel_work_done;
+#define CONTROLLER_STATUS_CLOSED        (0)
+#define CONTROLLER_STATUS_OPEN          (1)
+    rt_uint32_t         controller_status;
+#define FH81_DMA_INIT_NOT_YET       (0)
+#define FH81_DMA_INIT_ALREADY       (1)
+    rt_uint32_t         init;
+    rt_uint32_t         id;
+    char     *name;
+    rt_uint32_t channel_work_done;
 };
 
 
 struct dma_channel {
-#define CHANNEL_STATUS_CLOSED	(0)
-#define CHANNEL_STATUS_OPEN		(1)
-#define CHANNEL_STATUS_IDLE		(2)
-#define CHANNEL_STATUS_BUSY		(3)
+#define CHANNEL_STATUS_CLOSED   (0)
+#define CHANNEL_STATUS_OPEN     (1)
+#define CHANNEL_STATUS_IDLE     (2)
+#define CHANNEL_STATUS_BUSY     (3)
 
-	rt_uint32_t channel_status;	//open, busy ,closed
-	rt_uint32_t	desc_trans_size;
+    rt_uint32_t channel_status; //open, busy ,closed
+    rt_uint32_t desc_trans_size;
 
-	//isr will set it complete.
-	struct rt_completion transfer_completion;
-	//add lock,when set the channel.lock it
-	struct rt_semaphore channel_lock;
-	//struct rt_mutex                 lock;
-	//rt_enter_critical();
-	rt_list_t queue;
-	//active transfer now!!!
-	struct dma_transfer *active_trans;
+    //isr will set it complete.
+    struct rt_completion transfer_completion;
+    //add lock,when set the channel.lock it
+    struct rt_semaphore channel_lock;
+    //struct rt_mutex                 lock;
+    //rt_enter_critical();
+    rt_list_t queue;
+    //active transfer now!!!
+    struct dma_transfer *active_trans;
 
-#define SINGLE_TRANSFER			(0)
-#define CYCLIC_TRANSFER			(1)
-#define DEFAULT_TRANSFER		SINGLE_TRANSFER
-	rt_uint32_t open_flag;
-	//
+#define SINGLE_TRANSFER         (0)
+#define CYCLIC_TRANSFER         (1)
+#define DEFAULT_TRANSFER        SINGLE_TRANSFER
+    rt_uint32_t open_flag;
+    //
 
 
 
-	//new add para...
-	rt_uint32_t desc_total_no;
-	rt_uint32_t free_index;
-	rt_uint32_t used_index;
-	rt_uint32_t desc_left_cnt;
+    //new add para...
+    rt_uint32_t desc_total_no;
+    rt_uint32_t free_index;
+    rt_uint32_t used_index;
+    rt_uint32_t desc_left_cnt;
 
-	rt_uint32_t allign_malloc;
-	struct dw_lli *base_lli;
+    rt_uint32_t allign_malloc;
+    struct dw_lli *base_lli;
 };
 
 
 struct fh81_dma{
-	//core use ,this must be the first para!!!!
-	struct rt_dma_device parent;
-	//myown
-	struct dw_dma dwc;
-	//channel obj
-	struct dma_channel dma_channel[FH81_MAX_CHANNEL];
+    //core use ,this must be the first para!!!!
+    struct rt_dma_device parent;
+    //myown
+    struct dw_dma dwc;
+    //channel obj
+    struct dma_channel dma_channel[FH81_MAX_CHANNEL];
 
-	//struct rt_workqueue* isr_workqueue;
-	//struct rt_work *isr_work;
+    //struct rt_workqueue* isr_workqueue;
+    //struct rt_work *isr_work;
 
 };
 
 
 
-#define list_for_each_entry_safe(pos, n, head, member)			\
-	for (pos = rt_list_entry((head)->next, typeof(*pos), member),	\
-		n = rt_list_entry(pos->member.next, typeof(*pos), member);	\
-	     &pos->member != (head); 					\
-	     pos = n, n = rt_list_entry(n->member.next, typeof(*n), member))
+#define list_for_each_entry_safe(pos, n, head, member)          \
+    for (pos = rt_list_entry((head)->next, typeof(*pos), member),   \
+        n = rt_list_entry(pos->member.next, typeof(*pos), member);  \
+         &pos->member != (head);                    \
+         pos = n, n = rt_list_entry(n->member.next, typeof(*n), member))
 
 
 /******************************************************************************
@@ -384,8 +384,8 @@ static void rt_fh_dma_cyclic_free(struct dma_transfer *p);
 
 static struct rt_dma_ops fh81_dma_ops =
 {
-		init,
-		control
+        init,
+        control
 };
 
 
@@ -398,7 +398,7 @@ static struct rt_dma_ops fh81_dma_ops =
  * e.g.
  *  static uint8_t ufoo;
  *****************************************************************************/
-static struct fh81_dma	fh81_dma_controller[DMA_CONTROLLER_NUMBER] = {0};
+static struct fh81_dma  fh81_dma_controller[DMA_CONTROLLER_NUMBER] = {0};
 
 /* function body */
 /*****************************************************************************
@@ -411,80 +411,80 @@ static struct fh81_dma	fh81_dma_controller[DMA_CONTROLLER_NUMBER] = {0};
  *****************************************************************************/
 
 static rt_uint32_t allign_func(rt_uint32_t in_addr,rt_uint32_t allign_size){
-	return (in_addr + allign_size-1) & (~(allign_size - 1));
+    return (in_addr + allign_size-1) & (~(allign_size - 1));
 }
 
 
 struct dw_lli * get_desc(struct fh81_dma  *p_dma,struct dma_transfer *p_transfer,rt_uint32_t lli_size){
-	struct dw_lli * ret_lli;
-	rt_uint32_t free_index;
-	rt_uint32_t allign_left;
-	rt_uint32_t totoal_desc;
-	rt_uint32_t actual_get_desc;
-	rt_uint32_t totoal_free_desc;
-	totoal_free_desc = p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt;
-	free_index = p_dma->dma_channel[p_transfer->channel_number].free_index;
-	totoal_desc = p_dma->dma_channel[p_transfer->channel_number].desc_total_no;
-	allign_left = totoal_desc - free_index;
+    struct dw_lli * ret_lli;
+    rt_uint32_t free_index;
+    rt_uint32_t allign_left;
+    rt_uint32_t totoal_desc;
+    rt_uint32_t actual_get_desc;
+    rt_uint32_t totoal_free_desc;
+    totoal_free_desc = p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt;
+    free_index = p_dma->dma_channel[p_transfer->channel_number].free_index;
+    totoal_desc = p_dma->dma_channel[p_transfer->channel_number].desc_total_no;
+    allign_left = totoal_desc - free_index;
 
-	//check first..
-	if(totoal_free_desc < lli_size){
-		rt_kprintf("not enough desc to get...\n");
-		rt_kprintf("get size is %d,left is %d\n",lli_size,totoal_free_desc);
-		return RT_NULL;
-	}
-	//rt_kprintf("get desc in...\n");
+    //check first..
+    if(totoal_free_desc < lli_size){
+        rt_kprintf("not enough desc to get...\n");
+        rt_kprintf("get size is %d,left is %d\n",lli_size,totoal_free_desc);
+        return RT_NULL;
+    }
+    //rt_kprintf("get desc in...\n");
 
-	//rt_kprintf("lli size is %d\n",lli_size);
-	if(lli_size > allign_left){
-		//if allign desc not enough...just reset null....
-		if((totoal_free_desc - allign_left) < lli_size){
-			rt_kprintf("not enough desc to get...\n");
-			rt_kprintf("app need size is %d, totoal left is %d, allign left is %d\n",lli_size,totoal_free_desc,allign_left);
-			rt_kprintf("from head to get desc size is %d, actual get is %d\n",(totoal_free_desc - allign_left),(allign_left +lli_size));
-			return RT_NULL;
-		}
-		else{
-			actual_get_desc = allign_left +lli_size;
-			free_index = 0;
-		}
-	}
+    //rt_kprintf("lli size is %d\n",lli_size);
+    if(lli_size > allign_left){
+        //if allign desc not enough...just reset null....
+        if((totoal_free_desc - allign_left) < lli_size){
+            rt_kprintf("not enough desc to get...\n");
+            rt_kprintf("app need size is %d, totoal left is %d, allign left is %d\n",lli_size,totoal_free_desc,allign_left);
+            rt_kprintf("from head to get desc size is %d, actual get is %d\n",(totoal_free_desc - allign_left),(allign_left +lli_size));
+            return RT_NULL;
+        }
+        else{
+            actual_get_desc = allign_left +lli_size;
+            free_index = 0;
+        }
+    }
 
 
-	//ret_lli = &p_dma->dma_channel[p_transfer->channel_number].base_lli[free_index];
+    //ret_lli = &p_dma->dma_channel[p_transfer->channel_number].base_lli[free_index];
 
-	ret_lli = &p_dma->dma_channel[p_transfer->channel_number].base_lli[free_index];
-//	rt_kprintf("get desc base index addr:%08x\n",(rt_uint32_t)&p_dma->dma_channel[p_transfer->channel_number].base_lli[0]);
-//	rt_kprintf("get desc free index addr:%08x\n",(rt_uint32_t)ret_lli);
-//	rt_kprintf("get desc request size:%08x\n",lli_size);
-//	rt_kprintf("get desc total size:%08x\n",p_dma->dma_channel[p_transfer->channel_number].desc_total_no);
-//	rt_kprintf("one desc size is:%08x\n",sizeof(	struct dw_lli));
+    ret_lli = &p_dma->dma_channel[p_transfer->channel_number].base_lli[free_index];
+//  rt_kprintf("get desc base index addr:%08x\n",(rt_uint32_t)&p_dma->dma_channel[p_transfer->channel_number].base_lli[0]);
+//  rt_kprintf("get desc free index addr:%08x\n",(rt_uint32_t)ret_lli);
+//  rt_kprintf("get desc request size:%08x\n",lli_size);
+//  rt_kprintf("get desc total size:%08x\n",p_dma->dma_channel[p_transfer->channel_number].desc_total_no);
+//  rt_kprintf("one desc size is:%08x\n",sizeof(    struct dw_lli));
 
-	p_dma->dma_channel[p_transfer->channel_number].free_index += actual_get_desc;
+    p_dma->dma_channel[p_transfer->channel_number].free_index += actual_get_desc;
 
-	//rt_kprintf("get desc free index addr:%08x\n",(rt_uint32_t)&p_dma->dma_channel[p_transfer->channel_number].base_lli[p_dma->dma_channel[p_transfer->channel_number].free_index]);
+    //rt_kprintf("get desc free index addr:%08x\n",(rt_uint32_t)&p_dma->dma_channel[p_transfer->channel_number].base_lli[p_dma->dma_channel[p_transfer->channel_number].free_index]);
 
-	p_dma->dma_channel[p_transfer->channel_number].free_index %= p_dma->dma_channel[p_transfer->channel_number].desc_total_no;
-	p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt -= actual_get_desc;
-	p_transfer->lli_size = lli_size;
-	p_transfer->actual_lli_size = actual_get_desc;
-	return ret_lli;
+    p_dma->dma_channel[p_transfer->channel_number].free_index %= p_dma->dma_channel[p_transfer->channel_number].desc_total_no;
+    p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt -= actual_get_desc;
+    p_transfer->lli_size = lli_size;
+    p_transfer->actual_lli_size = actual_get_desc;
+    return ret_lli;
 }
 
 
 rt_uint32_t put_desc(struct fh81_dma  *p_dma,struct dma_transfer *p_transfer){
-	struct dw_lli * ret_lli;
-	rt_uint32_t used_index;
-	rt_uint32_t lli_size;
-	//rt_kprintf("put desc in...\n");
-	used_index = p_dma->dma_channel[p_transfer->channel_number].used_index;
-	lli_size = p_transfer->actual_lli_size;
-	p_dma->dma_channel[p_transfer->channel_number].used_index += lli_size;
-	p_dma->dma_channel[p_transfer->channel_number].used_index %= p_dma->dma_channel[p_transfer->channel_number].desc_total_no;
-	p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt += lli_size;
-	p_transfer->lli_size  = 0;
-	p_transfer->actual_lli_size = 0;
-	return 0;
+    struct dw_lli * ret_lli;
+    rt_uint32_t used_index;
+    rt_uint32_t lli_size;
+    //rt_kprintf("put desc in...\n");
+    used_index = p_dma->dma_channel[p_transfer->channel_number].used_index;
+    lli_size = p_transfer->actual_lli_size;
+    p_dma->dma_channel[p_transfer->channel_number].used_index += lli_size;
+    p_dma->dma_channel[p_transfer->channel_number].used_index %= p_dma->dma_channel[p_transfer->channel_number].desc_total_no;
+    p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt += lli_size;
+    p_transfer->lli_size  = 0;
+    p_transfer->actual_lli_size = 0;
+    return 0;
 }
 
 /*****************************************************************************
@@ -499,17 +499,17 @@ rt_uint32_t put_desc(struct fh81_dma  *p_dma,struct dma_transfer *p_transfer){
 static rt_err_t init (struct rt_dma_device *dma){
 
 
-	//init the clk table
+    //init the clk table
 
 
-	struct fh81_dma *my_own = (struct  fh81_dma *)dma->parent.user_data;
+    struct fh81_dma *my_own = (struct  fh81_dma *)dma->parent.user_data;
 
-	FH_DMA_DEBUG("my_own value:0x%x\n",(rt_uint32_t)my_own);
+    FH_DMA_DEBUG("my_own value:0x%x\n",(rt_uint32_t)my_own);
 
-	//check the user data
-	RT_ASSERT(my_own != RT_NULL);
+    //check the user data
+    RT_ASSERT(my_own != RT_NULL);
 
-	return RT_EOK;
+    return RT_EOK;
 
 }
 
@@ -528,12 +528,12 @@ static rt_err_t init (struct rt_dma_device *dma){
 
 static void handle_dma_open(struct fh81_dma  *p_dma){
 
-	rt_uint32_t i;
-	struct dw_dma *temp_dwc;
-	temp_dwc = &p_dma->dwc;
+    rt_uint32_t i;
+    struct dw_dma *temp_dwc;
+    temp_dwc = &p_dma->dwc;
 
-	dw_writel(temp_dwc, CFG, 1);
-	p_dma->dwc.controller_status = CONTROLLER_STATUS_OPEN;
+    dw_writel(temp_dwc, CFG, 1);
+    p_dma->dwc.controller_status = CONTROLLER_STATUS_OPEN;
 
 }
 
@@ -549,27 +549,27 @@ static void handle_dma_open(struct fh81_dma  *p_dma){
 static void handle_dma_close(struct fh81_dma  *p_dma){
 
 
-	rt_uint32_t i;
-	struct dw_dma *temp_dwc;
-	temp_dwc = &p_dma->dwc;
+    rt_uint32_t i;
+    struct dw_dma *temp_dwc;
+    temp_dwc = &p_dma->dwc;
 
-	//take lock
-	for(i=0;idwc.channel_max_number;i++){
-		rt_sem_take(&p_dma->dma_channel[i].channel_lock, RT_WAITING_FOREVER);
+    //take lock
+    for(i=0;idwc.channel_max_number;i++){
+        rt_sem_take(&p_dma->dma_channel[i].channel_lock, RT_WAITING_FOREVER);
 
-		channel_clear_bit(temp_dwc, CH_EN, lift_shift_bit_num(i));
-		p_dma->dma_channel[i].channel_status = CHANNEL_STATUS_CLOSED;
-	}
-	dw_writel(temp_dwc, CFG, 0);
-	p_dma->dwc.controller_status = CONTROLLER_STATUS_CLOSED;
+        channel_clear_bit(temp_dwc, CH_EN, lift_shift_bit_num(i));
+        p_dma->dma_channel[i].channel_status = CHANNEL_STATUS_CLOSED;
+    }
+    dw_writel(temp_dwc, CFG, 0);
+    p_dma->dwc.controller_status = CONTROLLER_STATUS_CLOSED;
 
-	//release lock
-	for(i=0;idwc.channel_max_number;i++){
-		rt_sem_release(&p_dma->dma_channel[i].channel_lock);
-	}
+    //release lock
+    for(i=0;idwc.channel_max_number;i++){
+        rt_sem_release(&p_dma->dma_channel[i].channel_lock);
+    }
 
-	//destroy the workqueue..
-	//rt_workqueue_destroy(p_dma->isr_workqueue);
+    //destroy the workqueue..
+    //rt_workqueue_destroy(p_dma->isr_workqueue);
 
 
 }
@@ -584,26 +584,26 @@ static void handle_dma_close(struct fh81_dma  *p_dma){
  *      what does this function returned?
  *****************************************************************************/
 
-#define CHANNEL_REAL_FREE			(0)
-#define CHANNEL_NOT_FREE			(1)
+#define CHANNEL_REAL_FREE           (0)
+#define CHANNEL_NOT_FREE            (1)
 
 static rt_uint32_t check_channel_real_free(struct fh81_dma  *p_dma,rt_uint32_t channel_number){
 
 
-	struct dw_dma *temp_dwc;
-	temp_dwc = &p_dma->dwc;
-	rt_uint32_t ret_status;
+    struct dw_dma *temp_dwc;
+    temp_dwc = &p_dma->dwc;
+    rt_uint32_t ret_status;
 
 
-	RT_ASSERT(channel_number < p_dma->dwc.channel_max_number);
+    RT_ASSERT(channel_number < p_dma->dwc.channel_max_number);
 
-	ret_status = dw_readl(temp_dwc, CH_EN);
-	if(ret_status & lift_shift_bit_num(channel_number)){
-		//the channel is still busy!!!error here
-		//FH_DMA_DEBUG("auto request channel error\n");
-		return CHANNEL_NOT_FREE;
-	}
-	return CHANNEL_REAL_FREE;
+    ret_status = dw_readl(temp_dwc, CH_EN);
+    if(ret_status & lift_shift_bit_num(channel_number)){
+        //the channel is still busy!!!error here
+        //FH_DMA_DEBUG("auto request channel error\n");
+        return CHANNEL_NOT_FREE;
+    }
+    return CHANNEL_REAL_FREE;
 
 }
 
@@ -620,110 +620,110 @@ static rt_uint32_t check_channel_real_free(struct fh81_dma  *p_dma,rt_uint32_t c
 
 static rt_err_t handle_request_channel(struct fh81_dma  *p_dma,struct dma_transfer *p_transfer){
 
-	rt_uint32_t i;
-	struct dw_dma *temp_dwc;
-	temp_dwc = &p_dma->dwc;
-	rt_err_t ret_status = RT_EOK;
+    rt_uint32_t i;
+    struct dw_dma *temp_dwc;
+    temp_dwc = &p_dma->dwc;
+    rt_err_t ret_status = RT_EOK;
 
-	//handle if auto check channel...
-	if(p_transfer->channel_number == AUTO_FIND_CHANNEL){
-		//check each channel lock,find a free channel...
-		for(i=0;idwc.channel_max_number;i++){
-			ret_status = rt_sem_trytake(&p_dma->dma_channel[i].channel_lock);
-			if(ret_status == RT_EOK){
-				break;
-			}
-		}
+    //handle if auto check channel...
+    if(p_transfer->channel_number == AUTO_FIND_CHANNEL){
+        //check each channel lock,find a free channel...
+        for(i=0;idwc.channel_max_number;i++){
+            ret_status = rt_sem_trytake(&p_dma->dma_channel[i].channel_lock);
+            if(ret_status == RT_EOK){
+                break;
+            }
+        }
 
-		if(i < p_dma->dwc.channel_max_number){
-			ret_status = check_channel_real_free(p_dma,i);
-			if(ret_status!= CHANNEL_REAL_FREE){
-				FH_DMA_DEBUG("auto request channel error\n");
-				RT_ASSERT(ret_status == CHANNEL_REAL_FREE);
-			}
-			//caution : channel is already locked here....
-			p_transfer->channel_number = i;
-			//bind to the controller.
-			//p_transfer->dma_controller = p_dma;
-			p_dma->dma_channel[i].channel_status = CHANNEL_STATUS_OPEN;
-		}
-		else
-			return -RT_ENOMEM;
+        if(i < p_dma->dwc.channel_max_number){
+            ret_status = check_channel_real_free(p_dma,i);
+            if(ret_status!= CHANNEL_REAL_FREE){
+                FH_DMA_DEBUG("auto request channel error\n");
+                RT_ASSERT(ret_status == CHANNEL_REAL_FREE);
+            }
+            //caution : channel is already locked here....
+            p_transfer->channel_number = i;
+            //bind to the controller.
+            //p_transfer->dma_controller = p_dma;
+            p_dma->dma_channel[i].channel_status = CHANNEL_STATUS_OPEN;
+        }
+        else
+            return -RT_ENOMEM;
 
-	}
+    }
 
-	// request channel by user
-	else{
-		//
+    // request channel by user
+    else{
+        //
 
-		RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number);
-		ret_status = rt_sem_take(&p_dma->dma_channel[p_transfer->channel_number].channel_lock, RT_TICK_PER_SECOND*50);
-		if(ret_status != RT_EOK)
-			return -RT_ENOMEM;
-		//rt_enter_critical();
-		ret_status = check_channel_real_free(p_dma,p_transfer->channel_number);
-		if(ret_status!= CHANNEL_REAL_FREE){
-			FH_DMA_DEBUG("user request channel error\n");
-			RT_ASSERT(ret_status == CHANNEL_REAL_FREE);
-		}
+        RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number);
+        ret_status = rt_sem_take(&p_dma->dma_channel[p_transfer->channel_number].channel_lock, RT_TICK_PER_SECOND*50);
+        if(ret_status != RT_EOK)
+            return -RT_ENOMEM;
+        //rt_enter_critical();
+        ret_status = check_channel_real_free(p_dma,p_transfer->channel_number);
+        if(ret_status!= CHANNEL_REAL_FREE){
+            FH_DMA_DEBUG("user request channel error\n");
+            RT_ASSERT(ret_status == CHANNEL_REAL_FREE);
+        }
 
-		//bind to the controller
-		//p_transfer->dma_controller = p_dma;
-		p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_OPEN;
-		//rt_exit_critical();
-	}
+        //bind to the controller
+        //p_transfer->dma_controller = p_dma;
+        p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_OPEN;
+        //rt_exit_critical();
+    }
 
 
-	//malloc desc for this one channel...
-	//fix me....
+    //malloc desc for this one channel...
+    //fix me....
 
-	p_dma->dma_channel[p_transfer->channel_number].allign_malloc =	(rt_uint32_t) rt_malloc(
-			(p_dma->dma_channel[p_transfer->channel_number].desc_total_no
-					* sizeof(struct dw_lli)) + CACHE_LINE_SIZE);
+    p_dma->dma_channel[p_transfer->channel_number].allign_malloc =  (rt_uint32_t) rt_malloc(
+            (p_dma->dma_channel[p_transfer->channel_number].desc_total_no
+                    * sizeof(struct dw_lli)) + CACHE_LINE_SIZE);
 
 
-	if(!p_dma->dma_channel[p_transfer->channel_number].allign_malloc){
-		//release channel
-		rt_kprintf("[dma]: no mem to malloc channel%d desc..\n",p_transfer->channel_number);
-		p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_CLOSED;
-		rt_sem_release(&p_dma->dma_channel[p_transfer->channel_number].channel_lock);
-		return -RT_ENOMEM;
-	}
+    if(!p_dma->dma_channel[p_transfer->channel_number].allign_malloc){
+        //release channel
+        rt_kprintf("[dma]: no mem to malloc channel%d desc..\n",p_transfer->channel_number);
+        p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_CLOSED;
+        rt_sem_release(&p_dma->dma_channel[p_transfer->channel_number].channel_lock);
+        return -RT_ENOMEM;
+    }
 
 
-	p_dma->dma_channel[p_transfer->channel_number].base_lli =
-			(struct dw_lli *) allign_func(
-					p_dma->dma_channel[p_transfer->channel_number].allign_malloc,
-					CACHE_LINE_SIZE);
+    p_dma->dma_channel[p_transfer->channel_number].base_lli =
+            (struct dw_lli *) allign_func(
+                    p_dma->dma_channel[p_transfer->channel_number].allign_malloc,
+                    CACHE_LINE_SIZE);
 
-	FH_DMA_DEBUG("dma desc addr is %x\n",(rt_uint32_t)p_dma->dma_channel[p_transfer->channel_number].base_lli);
-	//t1 = (UINT32)rt_malloc(GMAC_TX_RING_SIZE * sizeof(Gmac_Tx_DMA_Descriptors) + CACHE_LINE_SIZE);
+    FH_DMA_DEBUG("dma desc addr is %x\n",(rt_uint32_t)p_dma->dma_channel[p_transfer->channel_number].base_lli);
+    //t1 = (UINT32)rt_malloc(GMAC_TX_RING_SIZE * sizeof(Gmac_Tx_DMA_Descriptors) + CACHE_LINE_SIZE);
 
 
-	if(!p_dma->dma_channel[p_transfer->channel_number].base_lli){
-		FH_DMA_DEBUG("request desc failed..\n");
-		RT_ASSERT(p_dma->dma_channel[p_transfer->channel_number].base_lli != RT_NULL);
-	}
+    if(!p_dma->dma_channel[p_transfer->channel_number].base_lli){
+        FH_DMA_DEBUG("request desc failed..\n");
+        RT_ASSERT(p_dma->dma_channel[p_transfer->channel_number].base_lli != RT_NULL);
+    }
 
-	if((rt_uint32_t)p_dma->dma_channel[p_transfer->channel_number].base_lli % 32){
-		rt_kprintf("malloc is not cache allign..");
+    if((rt_uint32_t)p_dma->dma_channel[p_transfer->channel_number].base_lli % 32){
+        rt_kprintf("malloc is not cache allign..");
 
-	}
+    }
 
 
 
-	//rt_memset((void *)dma_trans_desc->first_lli, 0, lli_size * sizeof(struct dw_lli));
-	rt_memset((void *) p_dma->dma_channel[p_transfer->channel_number].base_lli,
-			0,
-			p_dma->dma_channel[p_transfer->channel_number].desc_total_no
-					* sizeof(struct dw_lli));
+    //rt_memset((void *)dma_trans_desc->first_lli, 0, lli_size * sizeof(struct dw_lli));
+    rt_memset((void *) p_dma->dma_channel[p_transfer->channel_number].base_lli,
+            0,
+            p_dma->dma_channel[p_transfer->channel_number].desc_total_no
+                    * sizeof(struct dw_lli));
 
-	p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt = p_dma->dma_channel[p_transfer->channel_number].desc_total_no;
-	p_dma->dma_channel[p_transfer->channel_number].free_index = 0;
-	p_dma->dma_channel[p_transfer->channel_number].used_index = 0;
+    p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt = p_dma->dma_channel[p_transfer->channel_number].desc_total_no;
+    p_dma->dma_channel[p_transfer->channel_number].free_index = 0;
+    p_dma->dma_channel[p_transfer->channel_number].used_index = 0;
 
 
-	return RT_EOK;
+    return RT_EOK;
 
 }
 
@@ -747,40 +747,40 @@ static rt_err_t handle_request_channel(struct fh81_dma  *p_dma,struct dma_transf
 static rt_uint32_t handle_release_channel(struct fh81_dma  *p_dma,struct dma_transfer *p_transfer){
 
 
-	rt_uint32_t i;
-	struct dw_dma *temp_dwc;
-	temp_dwc = &p_dma->dwc;
-	rt_uint32_t ret_status;
+    rt_uint32_t i;
+    struct dw_dma *temp_dwc;
+    temp_dwc = &p_dma->dwc;
+    rt_uint32_t ret_status;
 
-	//rt_enter_critical();
-	ret_status = p_dma->dma_channel[p_transfer->channel_number].channel_status;
+    //rt_enter_critical();
+    ret_status = p_dma->dma_channel[p_transfer->channel_number].channel_status;
 
 
-	RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number);
+    RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number);
 
 
-	if(ret_status == CHANNEL_STATUS_CLOSED){
-		FH_DMA_DEBUG("release channel error,reason: release a closed channel!!\n");
-		RT_ASSERT(ret_status != CHANNEL_STATUS_CLOSED);
-	}
+    if(ret_status == CHANNEL_STATUS_CLOSED){
+        FH_DMA_DEBUG("release channel error,reason: release a closed channel!!\n");
+        RT_ASSERT(ret_status != CHANNEL_STATUS_CLOSED);
+    }
 
-	channel_clear_bit(temp_dwc, CH_EN, lift_shift_bit_num(p_transfer->channel_number));
-	rt_sem_release(&p_dma->dma_channel[p_transfer->channel_number].channel_lock);
-	//p_transfer->dma_controller = RT_NULL;
-	p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_CLOSED;
-	p_dma->dma_channel[p_transfer->channel_number].open_flag = DEFAULT_TRANSFER;
-	//rt_exit_critical();
+    channel_clear_bit(temp_dwc, CH_EN, lift_shift_bit_num(p_transfer->channel_number));
+    rt_sem_release(&p_dma->dma_channel[p_transfer->channel_number].channel_lock);
+    //p_transfer->dma_controller = RT_NULL;
+    p_dma->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_CLOSED;
+    p_dma->dma_channel[p_transfer->channel_number].open_flag = DEFAULT_TRANSFER;
+    //rt_exit_critical();
 
-	//release this channel malloc mem...
-	//fix me.....
-	rt_free((void *)p_dma->dma_channel[p_transfer->channel_number].allign_malloc);
-	p_dma->dma_channel[p_transfer->channel_number].allign_malloc = RT_NULL;
-	p_dma->dma_channel[p_transfer->channel_number].base_lli = RT_NULL;
-	p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt = p_dma->dma_channel[p_transfer->channel_number].desc_total_no;
-	p_dma->dma_channel[p_transfer->channel_number].free_index = 0;
-	p_dma->dma_channel[p_transfer->channel_number].used_index = 0;
+    //release this channel malloc mem...
+    //fix me.....
+    rt_free((void *)p_dma->dma_channel[p_transfer->channel_number].allign_malloc);
+    p_dma->dma_channel[p_transfer->channel_number].allign_malloc = RT_NULL;
+    p_dma->dma_channel[p_transfer->channel_number].base_lli = RT_NULL;
+    p_dma->dma_channel[p_transfer->channel_number].desc_left_cnt = p_dma->dma_channel[p_transfer->channel_number].desc_total_no;
+    p_dma->dma_channel[p_transfer->channel_number].free_index = 0;
+    p_dma->dma_channel[p_transfer->channel_number].used_index = 0;
 
-	return RT_EOK;
+    return RT_EOK;
 
 
 }
@@ -788,26 +788,26 @@ static rt_uint32_t handle_release_channel(struct fh81_dma  *p_dma,struct dma_tra
 
 
 static rt_uint32_t cal_lli_size(struct dma_transfer *p_transfer){
-	RT_ASSERT(p_transfer != RT_NULL);
-	RT_ASSERT(p_transfer->dma_controller != RT_NULL);
-	RT_ASSERT(p_transfer->src_width <= DW_DMA_SLAVE_WIDTH_32BIT);
-	rt_uint32_t lli_number = 0;
-	rt_uint32_t channel_max_trans_per_lli = 0;
-	channel_max_trans_per_lli = p_transfer->dma_controller->dma_channel[p_transfer->channel_number].desc_trans_size;
+    RT_ASSERT(p_transfer != RT_NULL);
+    RT_ASSERT(p_transfer->dma_controller != RT_NULL);
+    RT_ASSERT(p_transfer->src_width <= DW_DMA_SLAVE_WIDTH_32BIT);
+    rt_uint32_t lli_number = 0;
+    rt_uint32_t channel_max_trans_per_lli = 0;
+    channel_max_trans_per_lli = p_transfer->dma_controller->dma_channel[p_transfer->channel_number].desc_trans_size;
 
 
-	lli_number = (p_transfer->trans_len % channel_max_trans_per_lli) ? 1:0;
-	lli_number += p_transfer->trans_len / channel_max_trans_per_lli;
+    lli_number = (p_transfer->trans_len % channel_max_trans_per_lli) ? 1:0;
+    lli_number += p_transfer->trans_len / channel_max_trans_per_lli;
 
-	return lli_number;
+    return lli_number;
 
 }
 
 
 static void dump_lli(struct dw_lli *p_lli){
-	FH_DMA_DEBUG("link_mem padd:0x%x\n sar:0x%x\n dar:0x%x\n llp:0x%x\n ctllo:0x%x\n ctlhi:0x%x\n sstat:0x%x\n dstat:0x%x\n",
-			(rt_uint32_t)p_lli,p_lli->sar, p_lli->dar, p_lli->llp,
-			p_lli->ctllo, p_lli->ctlhi,p_lli->sstat,p_lli->dstat);
+    FH_DMA_DEBUG("link_mem padd:0x%x\n sar:0x%x\n dar:0x%x\n llp:0x%x\n ctllo:0x%x\n ctlhi:0x%x\n sstat:0x%x\n dstat:0x%x\n",
+            (rt_uint32_t)p_lli,p_lli->sar, p_lli->dar, p_lli->llp,
+            p_lli->ctllo, p_lli->ctlhi,p_lli->sstat,p_lli->dstat);
 }
 /*****************************************************************************
  * Description:
@@ -820,296 +820,296 @@ static void dump_lli(struct dw_lli *p_lli){
 static void handle_single_transfer(struct fh81_dma  *p_dma,struct dma_transfer *p_transfer){
 
 
-	rt_uint32_t i;
-	struct dw_dma *temp_dwc;
-	temp_dwc = &p_dma->dwc;
-	volatile rt_uint32_t ret_status;
-	rt_list_t *p_controller_list;
-	rt_uint32_t lli_size,max_trans_size;
-	struct dw_lli  *p_lli = RT_NULL;
-	struct dma_transfer *dma_trans_desc;
-	struct dma_transfer *_dma_trans_desc;
+    rt_uint32_t i;
+    struct dw_dma *temp_dwc;
+    temp_dwc = &p_dma->dwc;
+    volatile rt_uint32_t ret_status;
+    rt_list_t *p_controller_list;
+    rt_uint32_t lli_size,max_trans_size;
+    struct dw_lli  *p_lli = RT_NULL;
+    struct dma_transfer *dma_trans_desc;
+    struct dma_transfer *_dma_trans_desc;
 
 
-	rt_uint32_t temp_src_add;
-	rt_uint32_t temp_dst_add;
-	rt_uint32_t trans_total_len = 0;
-	rt_uint32_t temp_trans_size = 0;
-	//rt_uint32_t dma_channl_no = 0;
+    rt_uint32_t temp_src_add;
+    rt_uint32_t temp_dst_add;
+    rt_uint32_t trans_total_len = 0;
+    rt_uint32_t temp_trans_size = 0;
+    //rt_uint32_t dma_channl_no = 0;
 
-	RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number);
-	RT_ASSERT(p_transfer->dma_number < DMA_CONTROLLER_NUMBER);
-	RT_ASSERT(&fh81_dma_controller[p_transfer->dma_number] == p_dma);
-	//when the dma transfer....the lock should be 0!!!!
-	//or user may not request the channel...
-	RT_ASSERT(p_dma->dma_channel[p_transfer->channel_number].channel_lock.value == 0);
+    RT_ASSERT(p_transfer->channel_number < p_dma->dwc.channel_max_number);
+    RT_ASSERT(p_transfer->dma_number < DMA_CONTROLLER_NUMBER);
+    RT_ASSERT(&fh81_dma_controller[p_transfer->dma_number] == p_dma);
+    //when the dma transfer....the lock should be 0!!!!
+    //or user may not request the channel...
+    RT_ASSERT(p_dma->dma_channel[p_transfer->channel_number].channel_lock.value == 0);
 
 
-	ret_status = p_dma->dma_channel[p_transfer->channel_number].channel_status;
-	if(ret_status == CHANNEL_STATUS_CLOSED){
-		FH_DMA_DEBUG("transfer error,reason: use a closed channel..\n");
-		RT_ASSERT(ret_status != CHANNEL_STATUS_CLOSED);
-	}
-	p_transfer->dma_controller = p_dma;
+    ret_status = p_dma->dma_channel[p_transfer->channel_number].channel_status;
+    if(ret_status == CHANNEL_STATUS_CLOSED){
+        FH_DMA_DEBUG("transfer error,reason: use a closed channel..\n");
+        RT_ASSERT(ret_status != CHANNEL_STATUS_CLOSED);
+    }
+    p_transfer->dma_controller = p_dma;
 
 
 
-	rt_list_init(&p_transfer->transfer_list);
-	max_trans_size = p_transfer->dma_controller->dma_channel[p_transfer->channel_number].desc_trans_size;
-	//add transfer to the controller's queue list
-	//here should  insert before and handle after....this could be a fifo...
-	rt_list_insert_before(&p_dma->dma_channel[p_transfer->channel_number].queue , &p_transfer->transfer_list);
+    rt_list_init(&p_transfer->transfer_list);
+    max_trans_size = p_transfer->dma_controller->dma_channel[p_transfer->channel_number].desc_trans_size;
+    //add transfer to the controller's queue list
+    //here should  insert before and handle after....this could be a fifo...
+    rt_list_insert_before(&p_dma->dma_channel[p_transfer->channel_number].queue , &p_transfer->transfer_list);
 
 
-	p_controller_list = &p_dma->dma_channel[p_transfer->channel_number].queue;
+    p_controller_list = &p_dma->dma_channel[p_transfer->channel_number].queue;
 
 
-	//here the driver could make a queue to cache the transfer and kick a thread to handle the queue~~~
-	//but now,this is a easy version...,just handle the transfer now!!!
-	list_for_each_entry_safe(dma_trans_desc, _dma_trans_desc, p_controller_list, transfer_list) {
+    //here the driver could make a queue to cache the transfer and kick a thread to handle the queue~~~
+    //but now,this is a easy version...,just handle the transfer now!!!
+    list_for_each_entry_safe(dma_trans_desc, _dma_trans_desc, p_controller_list, transfer_list) {
 
-		//the dma controller could see the active transfer .....
-		p_transfer->dma_controller->dma_channel[p_transfer->channel_number].active_trans = dma_trans_desc;
+        //the dma controller could see the active transfer .....
+        p_transfer->dma_controller->dma_channel[p_transfer->channel_number].active_trans = dma_trans_desc;
 
 
-		trans_total_len = p_transfer->trans_len;
+        trans_total_len = p_transfer->trans_len;
 
 
-		//handle desc
-		//step1:cal lli size...
-		lli_size = cal_lli_size(dma_trans_desc);
-		//step2:malloc lli_size  mem
-		//dma_trans_desc->first_lli = (struct dw_lli *)rt_malloc(lli_size * sizeof(struct dw_lli));
+        //handle desc
+        //step1:cal lli size...
+        lli_size = cal_lli_size(dma_trans_desc);
+        //step2:malloc lli_size  mem
+        //dma_trans_desc->first_lli = (struct dw_lli *)rt_malloc(lli_size * sizeof(struct dw_lli));
 
-		dma_trans_desc->first_lli = get_desc(p_dma,p_transfer,lli_size);
+        dma_trans_desc->first_lli = get_desc(p_dma,p_transfer,lli_size);
 
-		//not enough mem..
-		if(dma_trans_desc->first_lli == RT_NULL){
+        //not enough mem..
+        if(dma_trans_desc->first_lli == RT_NULL){
 
-			FH_DMA_DEBUG("transfer error,reason: not enough mem..\n");
-			RT_ASSERT(dma_trans_desc->first_lli != RT_NULL);
-		}
+            FH_DMA_DEBUG("transfer error,reason: not enough mem..\n");
+            RT_ASSERT(dma_trans_desc->first_lli != RT_NULL);
+        }
 
 
-		//bug here....
-		rt_memset((void *)dma_trans_desc->first_lli, 0, lli_size * sizeof(struct dw_lli));
+        //bug here....
+        rt_memset((void *)dma_trans_desc->first_lli, 0, lli_size * sizeof(struct dw_lli));
 
-		p_lli = dma_trans_desc->first_lli;
+        p_lli = dma_trans_desc->first_lli;
 
-		//warnning!!!!must check if the add is 32bits ally...
-		RT_ASSERT(((rt_uint32_t)p_lli & 0x03) == 0);
+        //warnning!!!!must check if the add is 32bits ally...
+        RT_ASSERT(((rt_uint32_t)p_lli & 0x03) == 0);
 
-		RT_ASSERT(dma_trans_desc->dst_inc_mode <=DW_DMA_SLAVE_FIX);
-		RT_ASSERT(dma_trans_desc->src_inc_mode <=DW_DMA_SLAVE_FIX);
-		//step3: set the mem..
-		for(i=0;idst_inc_mode <=DW_DMA_SLAVE_FIX);
+        RT_ASSERT(dma_trans_desc->src_inc_mode <=DW_DMA_SLAVE_FIX);
+        //step3: set the mem..
+        for(i=0;idst_inc_mode){
-			case DW_DMA_SLAVE_INC:
-				temp_dst_add = dma_trans_desc->dst_add + i * max_trans_size * (1<dst_width);
-				break;
-			case DW_DMA_SLAVE_DEC:
-				temp_dst_add = dma_trans_desc->dst_add - i * max_trans_size * (1<dst_width);
-				break;
-			case DW_DMA_SLAVE_FIX:
-				temp_dst_add = dma_trans_desc->dst_add;
-				break;
+            switch(dma_trans_desc->dst_inc_mode){
+            case DW_DMA_SLAVE_INC:
+                temp_dst_add = dma_trans_desc->dst_add + i * max_trans_size * (1<dst_width);
+                break;
+            case DW_DMA_SLAVE_DEC:
+                temp_dst_add = dma_trans_desc->dst_add - i * max_trans_size * (1<dst_width);
+                break;
+            case DW_DMA_SLAVE_FIX:
+                temp_dst_add = dma_trans_desc->dst_add;
+                break;
 
-			}
+            }
 
 
-			switch(dma_trans_desc->src_inc_mode){
-			case DW_DMA_SLAVE_INC:
-				temp_src_add = dma_trans_desc->src_add + i * max_trans_size * (1<src_width);
-				break;
-			case DW_DMA_SLAVE_DEC:
-				temp_src_add = dma_trans_desc->src_add - i * max_trans_size * (1<src_width);
-				break;
-			case DW_DMA_SLAVE_FIX:
-				temp_src_add = dma_trans_desc->src_add ;
-				break;
+            switch(dma_trans_desc->src_inc_mode){
+            case DW_DMA_SLAVE_INC:
+                temp_src_add = dma_trans_desc->src_add + i * max_trans_size * (1<src_width);
+                break;
+            case DW_DMA_SLAVE_DEC:
+                temp_src_add = dma_trans_desc->src_add - i * max_trans_size * (1<src_width);
+                break;
+            case DW_DMA_SLAVE_FIX:
+                temp_src_add = dma_trans_desc->src_add ;
+                break;
 
-			}
+            }
 
 
-			p_lli[i].sar = temp_src_add;
-			p_lli[i].dar = temp_dst_add;
+            p_lli[i].sar = temp_src_add;
+            p_lli[i].dar = temp_dst_add;
 
-			//para ctl
-			temp_trans_size = (trans_total_len / max_trans_size)? max_trans_size : (trans_total_len % max_trans_size);
-			trans_total_len -= temp_trans_size;
+            //para ctl
+            temp_trans_size = (trans_total_len / max_trans_size)? max_trans_size : (trans_total_len % max_trans_size);
+            trans_total_len -= temp_trans_size;
 
-			RT_ASSERT(dma_trans_desc->dst_width <=DW_DMA_SLAVE_WIDTH_32BIT);
-			RT_ASSERT(dma_trans_desc->src_width <=DW_DMA_SLAVE_WIDTH_32BIT);
+            RT_ASSERT(dma_trans_desc->dst_width <=DW_DMA_SLAVE_WIDTH_32BIT);
+            RT_ASSERT(dma_trans_desc->src_width <=DW_DMA_SLAVE_WIDTH_32BIT);
 
-			RT_ASSERT(dma_trans_desc->dst_msize <=DW_DMA_SLAVE_MSIZE_256);
-			RT_ASSERT(dma_trans_desc->src_msize <=DW_DMA_SLAVE_MSIZE_256);
-			RT_ASSERT(dma_trans_desc->fc_mode <=DMA_P2P);
+            RT_ASSERT(dma_trans_desc->dst_msize <=DW_DMA_SLAVE_MSIZE_256);
+            RT_ASSERT(dma_trans_desc->src_msize <=DW_DMA_SLAVE_MSIZE_256);
+            RT_ASSERT(dma_trans_desc->fc_mode <=DMA_P2P);
 
 
 
-			p_lli[i].ctllo = DWC_CTLL_INT_EN|DWC_CTLL_DST_WIDTH(dma_trans_desc->dst_width)|DWC_CTLL_SRC_WIDTH(dma_trans_desc->src_width)
-					|DWC_CTLL_DST_INC_MODE(dma_trans_desc->dst_inc_mode)|DWC_CTLL_SRC_INC_MODE(dma_trans_desc->src_inc_mode)
-					|DWC_CTLL_DST_MSIZE(dma_trans_desc->dst_msize)|DWC_CTLL_SRC_MSIZE(dma_trans_desc->src_msize)|DWC_CTLL_FC(dma_trans_desc->fc_mode)
-					|DWC_CTLL_DMS(0)|DWC_CTLL_SMS(0);
-			//block size
-			p_lli[i].ctlhi = temp_trans_size;
+            p_lli[i].ctllo = DWC_CTLL_INT_EN|DWC_CTLL_DST_WIDTH(dma_trans_desc->dst_width)|DWC_CTLL_SRC_WIDTH(dma_trans_desc->src_width)
+                    |DWC_CTLL_DST_INC_MODE(dma_trans_desc->dst_inc_mode)|DWC_CTLL_SRC_INC_MODE(dma_trans_desc->src_inc_mode)
+                    |DWC_CTLL_DST_MSIZE(dma_trans_desc->dst_msize)|DWC_CTLL_SRC_MSIZE(dma_trans_desc->src_msize)|DWC_CTLL_FC(dma_trans_desc->fc_mode)
+                    |DWC_CTLL_DMS(0)|DWC_CTLL_SMS(0);
+            //block size
+            p_lli[i].ctlhi = temp_trans_size;
 
 
-			if(trans_total_len > 0){
-				p_lli[i].llp = (rt_uint32_t)&p_lli[i+1];
-				p_lli[i].ctllo |= DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN;
-			}
+            if(trans_total_len > 0){
+                p_lli[i].llp = (rt_uint32_t)&p_lli[i+1];
+                p_lli[i].ctllo |= DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN;
+            }
 
-			//flush cache to mem
-			mmu_clean_invalidated_dcache((rt_uint32_t)&p_lli[i],sizeof(struct dw_lli));
+            //flush cache to mem
+            mmu_clean_invalidated_dcache((rt_uint32_t)&p_lli[i],sizeof(struct dw_lli));
 
-			dump_lli(&p_lli[i]);
-		}
+            dump_lli(&p_lli[i]);
+        }
 
-		//clear the isr status
+        //clear the isr status
 
 
 
 
-		//set the dma config reg
-		//clear cfg reload reg
-		//ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
-		//ret_status &= ~(DWC_CFGL_RELOAD_SAR|DWC_CFGL_RELOAD_DAR);
-		dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,0);
+        //set the dma config reg
+        //clear cfg reload reg
+        //ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
+        //ret_status &= ~(DWC_CFGL_RELOAD_SAR|DWC_CFGL_RELOAD_DAR);
+        dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,0);
 
-		//set the first link add
-		//ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].LLP);
-		ret_status = 0;
-		ret_status = (rt_uint32_t)&p_lli[0];
-		dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].LLP,ret_status);
+        //set the first link add
+        //ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].LLP);
+        ret_status = 0;
+        ret_status = (rt_uint32_t)&p_lli[0];
+        dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].LLP,ret_status);
 
-		//set link enable
-		//ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_LO);
-		ret_status = 0;
-		ret_status =DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN;
-		dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_LO,ret_status);
+        //set link enable
+        //ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_LO);
+        ret_status = 0;
+        ret_status =DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN;
+        dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_LO,ret_status);
 
-		dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_HI,0);
-		//set handshaking
+        dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CTL_HI,0);
+        //set handshaking
 
-		RT_ASSERT(dma_trans_desc->dst_hs <=	DMA_SW_HANDSHAKING);
-		RT_ASSERT(dma_trans_desc->src_hs <=	DMA_SW_HANDSHAKING);
+        RT_ASSERT(dma_trans_desc->dst_hs <= DMA_SW_HANDSHAKING);
+        RT_ASSERT(dma_trans_desc->src_hs <= DMA_SW_HANDSHAKING);
 
-		if(dma_trans_desc->dst_hs == DMA_SW_HANDSHAKING){
-			ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
-			ret_status |= DWC_CFGL_HS_DST;
-			dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
-		}
-		else{
-			ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
-			ret_status &= ~DWC_CFGL_HS_DST;
-			dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
-		}
+        if(dma_trans_desc->dst_hs == DMA_SW_HANDSHAKING){
+            ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
+            ret_status |= DWC_CFGL_HS_DST;
+            dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
+        }
+        else{
+            ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
+            ret_status &= ~DWC_CFGL_HS_DST;
+            dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
+        }
 
-		if(dma_trans_desc->src_hs == DMA_SW_HANDSHAKING){
-			ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
-			ret_status |= DWC_CFGL_HS_SRC;
-			dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
-		}
-		else{
-			ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
-			ret_status &= ~DWC_CFGL_HS_SRC;
-			dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
-		}
+        if(dma_trans_desc->src_hs == DMA_SW_HANDSHAKING){
+            ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
+            ret_status |= DWC_CFGL_HS_SRC;
+            dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
+        }
+        else{
+            ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
+            ret_status &= ~DWC_CFGL_HS_SRC;
+            dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
+        }
 
 
-		//only hw handshaking need this..
-		switch(dma_trans_desc->fc_mode){
-		case	DMA_M2M:
-			break;
-		case	DMA_M2P:
-			//set dst per...
-			RT_ASSERT(dma_trans_desc->dst_per <	DMA_HW_HS_END);
+        //only hw handshaking need this..
+        switch(dma_trans_desc->fc_mode){
+        case    DMA_M2M:
+            break;
+        case    DMA_M2P:
+            //set dst per...
+            RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END);
 
-			ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
+            ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
 
-			//clear 43 ~ 46 bit
-			ret_status &= ~0x7800;
+            //clear 43 ~ 46 bit
+            ret_status &= ~0x7800;
 
-			ret_status |= DWC_CFGH_DST_PER(dma_trans_desc->dst_per);
-			dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
-			//DWC_CFGH_SRC_PER
+            ret_status |= DWC_CFGH_DST_PER(dma_trans_desc->dst_per);
+            dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
+            //DWC_CFGH_SRC_PER
 
 
-			break;
-		case 	DMA_P2M:
-			//set src per...
-			RT_ASSERT(dma_trans_desc->src_per <	DMA_HW_HS_END);
+            break;
+        case    DMA_P2M:
+            //set src per...
+            RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END);
 
 
-			ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
+            ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
 
-			//clear 39 ~ 42 bit
-			ret_status &= ~0x780;
+            //clear 39 ~ 42 bit
+            ret_status &= ~0x780;
 
 
-			ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per);
-			dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
+            ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per);
+            dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
 
-			break;
-		case 	DMA_P2P:
-			//set src and dst..
-			RT_ASSERT(dma_trans_desc->dst_per <	DMA_HW_HS_END);
-			RT_ASSERT(dma_trans_desc->src_per <	DMA_HW_HS_END);
+            break;
+        case    DMA_P2P:
+            //set src and dst..
+            RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END);
+            RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END);
 
-			ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
-			ret_status &= ~0x7800;
-			ret_status &= ~0x780;
-			ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per) | DWC_CFGH_DST_PER(dma_trans_desc->dst_per);
-			dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
+            ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
+            ret_status &= ~0x7800;
+            ret_status &= ~0x780;
+            ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per) | DWC_CFGH_DST_PER(dma_trans_desc->dst_per);
+            dw_writel(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
 
-			break;
-		default:
-			break;
-		}
+            break;
+        default:
+            break;
+        }
 
 
-		dma_trans_desc->dma_controller->dma_channel[dma_trans_desc->channel_number].channel_status = CHANNEL_STATUS_BUSY;
-		//enable isr...
-		channel_set_bit(temp_dwc, MASK.XFER, lift_shift_bit_num(dma_trans_desc->channel_number));
-		channel_set_bit(temp_dwc, MASK.ERROR, lift_shift_bit_num(dma_trans_desc->channel_number));
-		//close
-		channel_clear_bit(temp_dwc, MASK.BLOCK, lift_shift_bit_num(dma_trans_desc->channel_number));
+        dma_trans_desc->dma_controller->dma_channel[dma_trans_desc->channel_number].channel_status = CHANNEL_STATUS_BUSY;
+        //enable isr...
+        channel_set_bit(temp_dwc, MASK.XFER, lift_shift_bit_num(dma_trans_desc->channel_number));
+        channel_set_bit(temp_dwc, MASK.ERROR, lift_shift_bit_num(dma_trans_desc->channel_number));
+        //close
+        channel_clear_bit(temp_dwc, MASK.BLOCK, lift_shift_bit_num(dma_trans_desc->channel_number));
 
-		dw_writel(temp_dwc, CLEAR.XFER, 1<<(dma_trans_desc->channel_number));
-		dw_writel(temp_dwc, CLEAR.BLOCK, 1<<(dma_trans_desc->channel_number));
-		dw_writel(temp_dwc, CLEAR.SRC_TRAN, 1<<(dma_trans_desc->channel_number));
-		dw_writel(temp_dwc, CLEAR.DST_TRAN, 1<<(dma_trans_desc->channel_number));
-		dw_writel(temp_dwc, CLEAR.ERROR, 1<<(dma_trans_desc->channel_number));
+        dw_writel(temp_dwc, CLEAR.XFER, 1<<(dma_trans_desc->channel_number));
+        dw_writel(temp_dwc, CLEAR.BLOCK, 1<<(dma_trans_desc->channel_number));
+        dw_writel(temp_dwc, CLEAR.SRC_TRAN, 1<<(dma_trans_desc->channel_number));
+        dw_writel(temp_dwc, CLEAR.DST_TRAN, 1<<(dma_trans_desc->channel_number));
+        dw_writel(temp_dwc, CLEAR.ERROR, 1<<(dma_trans_desc->channel_number));
 
 
-		ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
-		FH_DMA_DEBUG("cfg_hi value:0x%x\n",ret_status);
+        ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
+        FH_DMA_DEBUG("cfg_hi value:0x%x\n",ret_status);
 
-		ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
-		FH_DMA_DEBUG("cfg_low value:0x%x\n",ret_status);
+        ret_status = dw_readl(temp_dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
+        FH_DMA_DEBUG("cfg_low value:0x%x\n",ret_status);
 
 
-		ret_status = dw_readl(temp_dwc, MASK.BLOCK);
-		FH_DMA_DEBUG("mask block value:0x%x\n",ret_status);
+        ret_status = dw_readl(temp_dwc, MASK.BLOCK);
+        FH_DMA_DEBUG("mask block value:0x%x\n",ret_status);
 
-		ret_status = dw_readl(temp_dwc, MASK.XFER);
-		FH_DMA_DEBUG("mask xfer value:0x%x\n",ret_status);
+        ret_status = dw_readl(temp_dwc, MASK.XFER);
+        FH_DMA_DEBUG("mask xfer value:0x%x\n",ret_status);
 
 
 
-		if(dma_trans_desc->prepare_callback){
-				dma_trans_desc->prepare_callback(dma_trans_desc->prepare_para);
-		}
-		//enable the channle to transfer
-		channel_set_bit(temp_dwc, CH_EN, lift_shift_bit_num(dma_trans_desc->channel_number));
+        if(dma_trans_desc->prepare_callback){
+                dma_trans_desc->prepare_callback(dma_trans_desc->prepare_para);
+        }
+        //enable the channle to transfer
+        channel_set_bit(temp_dwc, CH_EN, lift_shift_bit_num(dma_trans_desc->channel_number));
 
 
 
-	}
+    }
 
 }
 
@@ -1124,85 +1124,85 @@ static void handle_single_transfer(struct fh81_dma  *p_dma,struct dma_transfer *
 static rt_err_t control (struct rt_dma_device *dma, int cmd, void *arg){
 
 
-	struct fh81_dma *my_own = (struct fh81_dma *)dma->parent.user_data;
-	rt_uint32_t i;
-	struct dw_dma *dwc;
-	dwc = &my_own->dwc;
+    struct fh81_dma *my_own = (struct fh81_dma *)dma->parent.user_data;
+    rt_uint32_t i;
+    struct dw_dma *dwc;
+    dwc = &my_own->dwc;
 
-	rt_err_t ret = RT_EOK;
+    rt_err_t ret = RT_EOK;
 
-	struct dma_transfer *p_dma_transfer = (struct dma_transfer *)arg;
+    struct dma_transfer *p_dma_transfer = (struct dma_transfer *)arg;
 
-	//FH_DMA_DEBUG("p_dma_transfer value:0x%x\n",(rt_uint32_t)p_dma_transfer);
+    //FH_DMA_DEBUG("p_dma_transfer value:0x%x\n",(rt_uint32_t)p_dma_transfer);
 
 
-	RT_ASSERT(my_own != RT_NULL);
-	RT_ASSERT(dwc != RT_NULL);
+    RT_ASSERT(my_own != RT_NULL);
+    RT_ASSERT(dwc != RT_NULL);
 
 
 
-	switch(cmd){
-	case RT_DEVICE_CTRL_DMA_OPEN:
+    switch(cmd){
+    case RT_DEVICE_CTRL_DMA_OPEN:
 
-		//open the controller..
-		handle_dma_open(my_own);
-		break;
-	case RT_DEVICE_CTRL_DMA_CLOSE:
+        //open the controller..
+        handle_dma_open(my_own);
+        break;
+    case RT_DEVICE_CTRL_DMA_CLOSE:
 
-		//close the controller..
-		handle_dma_close(my_own);
-		break;
-	case RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL:
-		//request a channel for the user
-		RT_ASSERT(p_dma_transfer != RT_NULL);
-		ret = handle_request_channel(my_own,p_dma_transfer);
+        //close the controller..
+        handle_dma_close(my_own);
+        break;
+    case RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL:
+        //request a channel for the user
+        RT_ASSERT(p_dma_transfer != RT_NULL);
+        ret = handle_request_channel(my_own,p_dma_transfer);
 
-		break;
-	case RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL:
-		//release a channel
-		RT_ASSERT(p_dma_transfer != RT_NULL);
+        break;
+    case RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL:
+        //release a channel
+        RT_ASSERT(p_dma_transfer != RT_NULL);
 
-		ret = handle_release_channel(my_own,p_dma_transfer);
+        ret = handle_release_channel(my_own,p_dma_transfer);
 
 
-		break;
+        break;
 
-	case RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER:
-		//make a channel to transfer data.
-		RT_ASSERT(p_dma_transfer != RT_NULL);
-		//check if the dma channel is open,or return error.
+    case RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER:
+        //make a channel to transfer data.
+        RT_ASSERT(p_dma_transfer != RT_NULL);
+        //check if the dma channel is open,or return error.
 
-		my_own->dma_channel[p_dma_transfer->channel_number].open_flag = SINGLE_TRANSFER;
-		handle_single_transfer(my_own,p_dma_transfer);
-		//then wait for the channel is complete..
-		//caution that::we should be in the "rt_enter_critical()"when set the dma to work.
-		break;
+        my_own->dma_channel[p_dma_transfer->channel_number].open_flag = SINGLE_TRANSFER;
+        handle_single_transfer(my_own,p_dma_transfer);
+        //then wait for the channel is complete..
+        //caution that::we should be in the "rt_enter_critical()"when set the dma to work.
+        break;
 
 
-	case RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE:
-		RT_ASSERT(p_dma_transfer != RT_NULL);
-		my_own->dma_channel[p_dma_transfer->channel_number].open_flag = CYCLIC_TRANSFER;
-		rt_fh_dma_cyclic_prep(my_own,p_dma_transfer);
-		break;
+    case RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE:
+        RT_ASSERT(p_dma_transfer != RT_NULL);
+        my_own->dma_channel[p_dma_transfer->channel_number].open_flag = CYCLIC_TRANSFER;
+        rt_fh_dma_cyclic_prep(my_own,p_dma_transfer);
+        break;
 
-	case RT_DEVICE_CTRL_DMA_CYCLIC_START:
-		rt_fh_dma_cyclic_start(p_dma_transfer);
-		break;
+    case RT_DEVICE_CTRL_DMA_CYCLIC_START:
+        rt_fh_dma_cyclic_start(p_dma_transfer);
+        break;
 
-	case RT_DEVICE_CTRL_DMA_CYCLIC_STOP:
-		rt_fh_dma_cyclic_stop(p_dma_transfer);
-		break;
+    case RT_DEVICE_CTRL_DMA_CYCLIC_STOP:
+        rt_fh_dma_cyclic_stop(p_dma_transfer);
+        break;
 
-	case RT_DEVICE_CTRL_DMA_CYCLIC_FREE:
-		rt_fh_dma_cyclic_free(p_dma_transfer);
-		break;
+    case RT_DEVICE_CTRL_DMA_CYCLIC_FREE:
+        rt_fh_dma_cyclic_free(p_dma_transfer);
+        break;
 
-	default:
-		break;
+    default:
+        break;
 
-	}
+    }
 
-	return ret;
+    return ret;
 
 
 }
@@ -1213,55 +1213,55 @@ static void rt_fh81_dma_isr(int irq, void *param)
 {
 
 
-	RT_ASSERT(irq == DMAC_IRQn);
-	rt_uint32_t isr_channel_x,i,error,isr_channel_b;
-	struct fh81_dma *my_own = (struct fh81_dma *)param;
-	struct dw_dma *dwc;
-	struct dma_transfer *p_transfer;
-	dwc = &my_own->dwc;
-	//p_transfer =
-	//rt_kprintf("dma isr get in~~~\n");
-	error = dw_readl(dwc,STATUS.ERROR);
-	if(error != 0){
-		FH_DMA_DEBUG("dma isr error!!!!\n");
-		RT_ASSERT(error == RT_NULL);
-	}
+    RT_ASSERT(irq == DMAC_IRQn);
+    rt_uint32_t isr_channel_x,i,error,isr_channel_b;
+    struct fh81_dma *my_own = (struct fh81_dma *)param;
+    struct dw_dma *dwc;
+    struct dma_transfer *p_transfer;
+    dwc = &my_own->dwc;
+    //p_transfer =
+    //rt_kprintf("dma isr get in~~~\n");
+    error = dw_readl(dwc,STATUS.ERROR);
+    if(error != 0){
+        FH_DMA_DEBUG("dma isr error!!!!\n");
+        RT_ASSERT(error == RT_NULL);
+    }
 
-	isr_channel_x = dw_readl(dwc,STATUS.XFER);
-	isr_channel_b = dw_readl(dwc,STATUS.BLOCK);
-	//for single check the transfer status
-	//check which channel...
+    isr_channel_x = dw_readl(dwc,STATUS.XFER);
+    isr_channel_b = dw_readl(dwc,STATUS.BLOCK);
+    //for single check the transfer status
+    //check which channel...
 
-	for(i=0;idwc.channel_max_number;i++){
+    for(i=0;idwc.channel_max_number;i++){
 
-		if(my_own->dma_channel[i].open_flag == SINGLE_TRANSFER){
-			if(isr_channel_x & 1<dma_channel[i].open_flag == SINGLE_TRANSFER){
+            if(isr_channel_x & 1<dma_channel[i].active_trans;
+                p_transfer = my_own->dma_channel[i].active_trans;
 
-				if(p_transfer->complete_callback){
-						p_transfer->complete_callback(p_transfer->complete_para);
-				}
-				p_transfer->dma_controller->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_IDLE;
-				//here is a bug...do not free here
-				//rt_free(p_transfer->first_lli);
-				put_desc(my_own,p_transfer);
-				rt_list_remove(&p_transfer->transfer_list);
-			}
+                if(p_transfer->complete_callback){
+                        p_transfer->complete_callback(p_transfer->complete_para);
+                }
+                p_transfer->dma_controller->dma_channel[p_transfer->channel_number].channel_status = CHANNEL_STATUS_IDLE;
+                //here is a bug...do not free here
+                //rt_free(p_transfer->first_lli);
+                put_desc(my_own,p_transfer);
+                rt_list_remove(&p_transfer->transfer_list);
+            }
 
-		}
+        }
 
-		else if(my_own->dma_channel[i].open_flag == CYCLIC_TRANSFER){
-			if(isr_channel_b & 1<dma_channel[i].active_trans;
-				dw_writel(dwc, CLEAR.BLOCK, 1<<(p_transfer->channel_number));
-				if(p_transfer->complete_callback){
-						p_transfer->complete_callback(p_transfer->complete_para);
-				}
-			}
-		}
-	}
+        else if(my_own->dma_channel[i].open_flag == CYCLIC_TRANSFER){
+            if(isr_channel_b & 1<dma_channel[i].active_trans;
+                dw_writel(dwc, CLEAR.BLOCK, 1<<(p_transfer->channel_number));
+                if(p_transfer->complete_callback){
+                        p_transfer->complete_callback(p_transfer->complete_para);
+                }
+            }
+        }
+    }
 
 
 }
@@ -1278,55 +1278,55 @@ static void rt_fh81_dma_isr(int irq, void *param)
  *****************************************************************************/
 
 const char *channel_lock_name[FH81_MAX_CHANNEL] = {
-		"channel_0_lock",
-		"channel_1_lock",
-		"channel_2_lock",
-		"channel_3_lock",
+        "channel_0_lock",
+        "channel_1_lock",
+        "channel_2_lock",
+        "channel_3_lock",
 };
 
 rt_err_t fh81_dma_register(struct fh81_dma * fh81_dma_p,
                              char * dma_name){
 
-	rt_uint32_t i;
+    rt_uint32_t i;
 
-	RT_ASSERT(fh81_dma_p != RT_NULL);
-	RT_ASSERT(dma_name != RT_NULL);
-	//RT_ASSERT(fh81_dma_p->dwc.init != FH81_DMA_INIT_ALREADY);
+    RT_ASSERT(fh81_dma_p != RT_NULL);
+    RT_ASSERT(dma_name != RT_NULL);
+    //RT_ASSERT(fh81_dma_p->dwc.init != FH81_DMA_INIT_ALREADY);
 
 
-	if(fh81_dma_p->dwc.init == FH81_DMA_INIT_ALREADY)
-		return 0;
+    if(fh81_dma_p->dwc.init == FH81_DMA_INIT_ALREADY)
+        return 0;
 
-	struct rt_dma_device *rt_dma;
-	rt_dma = &fh81_dma_p->parent;
-	rt_dma->ops = &fh81_dma_ops;
+    struct rt_dma_device *rt_dma;
+    rt_dma = &fh81_dma_p->parent;
+    rt_dma->ops = &fh81_dma_ops;
 
 
-	//soc para set
-	fh81_dma_p->dwc.name = dma_name;
-	fh81_dma_p->dwc.regs =(void *)DMA_REG_BASE;
-	fh81_dma_p->dwc.paddr =	DMA_REG_BASE;
-	fh81_dma_p->dwc.irq = DMAC_IRQn;
-	fh81_dma_p->dwc.channel_max_number = FH81_MAX_CHANNEL;
-	fh81_dma_p->dwc.controller_status = CONTROLLER_STATUS_CLOSED;
-	fh81_dma_p->dwc.init = FH81_DMA_INIT_ALREADY;
-	fh81_dma_p->dwc.id = 0;
-	//channel set
-	for(i=0;idma_channel[i].channel_status = CHANNEL_STATUS_CLOSED;
-		fh81_dma_p->dma_channel[i].desc_total_no = DESC_MAX_SIZE;
-		//rt_completion_init(&(fh81_dma_p->dma_channel[i].transfer_completion));
-		rt_list_init(&(fh81_dma_p->dma_channel[i].queue));
-		fh81_dma_p->dma_channel[i].desc_trans_size = FH81_CHANNEL_MAX_TRANSFER_SIZE;
-		rt_sem_init(&fh81_dma_p->dma_channel[i].channel_lock, channel_lock_name[i], 1, RT_IPC_FLAG_FIFO);
-	}
+    //soc para set
+    fh81_dma_p->dwc.name = dma_name;
+    fh81_dma_p->dwc.regs =(void *)DMA_REG_BASE;
+    fh81_dma_p->dwc.paddr = DMA_REG_BASE;
+    fh81_dma_p->dwc.irq = DMAC_IRQn;
+    fh81_dma_p->dwc.channel_max_number = FH81_MAX_CHANNEL;
+    fh81_dma_p->dwc.controller_status = CONTROLLER_STATUS_CLOSED;
+    fh81_dma_p->dwc.init = FH81_DMA_INIT_ALREADY;
+    fh81_dma_p->dwc.id = 0;
+    //channel set
+    for(i=0;idma_channel[i].channel_status = CHANNEL_STATUS_CLOSED;
+        fh81_dma_p->dma_channel[i].desc_total_no = DESC_MAX_SIZE;
+        //rt_completion_init(&(fh81_dma_p->dma_channel[i].transfer_completion));
+        rt_list_init(&(fh81_dma_p->dma_channel[i].queue));
+        fh81_dma_p->dma_channel[i].desc_trans_size = FH81_CHANNEL_MAX_TRANSFER_SIZE;
+        rt_sem_init(&fh81_dma_p->dma_channel[i].channel_lock, channel_lock_name[i], 1, RT_IPC_FLAG_FIFO);
+    }
 
-	//isr
-	rt_hw_interrupt_install(fh81_dma_p->dwc.irq, rt_fh81_dma_isr,
-							(void *)fh81_dma_p, "dma_isr");
-	rt_hw_interrupt_umask(fh81_dma_p->dwc.irq);
+    //isr
+    rt_hw_interrupt_install(fh81_dma_p->dwc.irq, rt_fh81_dma_isr,
+                            (void *)fh81_dma_p, "dma_isr");
+    rt_hw_interrupt_umask(fh81_dma_p->dwc.irq);
 
-	return	rt_hw_dma_register(rt_dma,dma_name,RT_DEVICE_FLAG_RDWR,fh81_dma_p);
+    return  rt_hw_dma_register(rt_dma,dma_name,RT_DEVICE_FLAG_RDWR,fh81_dma_p);
 
 
 }
@@ -1334,10 +1334,10 @@ rt_err_t fh81_dma_register(struct fh81_dma * fh81_dma_p,
 
 static void rt_fh_dma_cyclic_stop(struct dma_transfer *p){
 
-	struct fh81_dma *my_own = p->dma_controller;
-	struct dw_dma *dwc;
-	dwc = &my_own->dwc;
-	channel_clear_bit(dwc, CH_EN, 1<<(p->channel_number));
+    struct fh81_dma *my_own = p->dma_controller;
+    struct dw_dma *dwc;
+    dwc = &my_own->dwc;
+    channel_clear_bit(dwc, CH_EN, 1<<(p->channel_number));
 }
 
 
@@ -1345,45 +1345,45 @@ static void rt_fh_dma_cyclic_stop(struct dma_transfer *p){
 
 static void rt_fh_dma_cyclic_start(struct dma_transfer *p){
 
-	struct fh81_dma *my_own = p->dma_controller;
-	struct dw_dma *dwc;
-	dwc = &my_own->dwc;
-	volatile uint32_t ret_status;
-	struct dw_lli  *p_lli = RT_NULL;
-	p_lli = p->first_lli;
+    struct fh81_dma *my_own = p->dma_controller;
+    struct dw_dma *dwc;
+    dwc = &my_own->dwc;
+    volatile uint32_t ret_status;
+    struct dw_lli  *p_lli = RT_NULL;
+    p_lli = p->first_lli;
 
-	//32bit ally
-	RT_ASSERT(((uint32_t)p_lli & 0x03) == 0);
+    //32bit ally
+    RT_ASSERT(((uint32_t)p_lli & 0x03) == 0);
 
-	dw_writel(dwc, CLEAR.XFER, 1<<(p->channel_number));
-	dw_writel(dwc, CLEAR.BLOCK, 1<<(p->channel_number));
-	dw_writel(dwc, CLEAR.ERROR, 1<<(p->channel_number));
+    dw_writel(dwc, CLEAR.XFER, 1<<(p->channel_number));
+    dw_writel(dwc, CLEAR.BLOCK, 1<<(p->channel_number));
+    dw_writel(dwc, CLEAR.ERROR, 1<<(p->channel_number));
 
 
-	//enable isr
-	channel_set_bit(dwc, MASK.BLOCK, lift_shift_bit_num(p->channel_number));
-	//disable isr
-	channel_clear_bit(dwc, MASK.XFER, lift_shift_bit_num(p->channel_number));
+    //enable isr
+    channel_set_bit(dwc, MASK.BLOCK, lift_shift_bit_num(p->channel_number));
+    //disable isr
+    channel_clear_bit(dwc, MASK.XFER, lift_shift_bit_num(p->channel_number));
 
-	ret_status = dw_readl(dwc,CHAN[p->channel_number].CFG_LO);
-	ret_status &= ~(DWC_CFGL_RELOAD_SAR|DWC_CFGL_RELOAD_DAR);
-	dw_writel(dwc,CHAN[p->channel_number].CFG_LO,ret_status);
+    ret_status = dw_readl(dwc,CHAN[p->channel_number].CFG_LO);
+    ret_status &= ~(DWC_CFGL_RELOAD_SAR|DWC_CFGL_RELOAD_DAR);
+    dw_writel(dwc,CHAN[p->channel_number].CFG_LO,ret_status);
 
-	//set the first link add
-	ret_status = dw_readl(dwc,CHAN[p->channel_number].LLP);
-	ret_status = (uint32_t)&p_lli[0];
-	dw_writel(dwc,CHAN[p->channel_number].LLP,ret_status);
+    //set the first link add
+    ret_status = dw_readl(dwc,CHAN[p->channel_number].LLP);
+    ret_status = (uint32_t)&p_lli[0];
+    dw_writel(dwc,CHAN[p->channel_number].LLP,ret_status);
 
-	//set link enable
-	//ret_status = dw_readl(dwc,CHAN[p->channel_number].CTL_LO);
-	ret_status =DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN;
-	dw_writel(dwc,CHAN[p->channel_number].CTL_LO,ret_status);
+    //set link enable
+    //ret_status = dw_readl(dwc,CHAN[p->channel_number].CTL_LO);
+    ret_status =DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN;
+    dw_writel(dwc,CHAN[p->channel_number].CTL_LO,ret_status);
 
-	//clear ctl_hi
-	dw_writel(dwc,CHAN[p->channel_number].CTL_HI,0);
+    //clear ctl_hi
+    dw_writel(dwc,CHAN[p->channel_number].CTL_HI,0);
 
-	//enable channle
-	channel_set_bit(dwc, CH_EN, 1<<(p->channel_number));
+    //enable channle
+    channel_set_bit(dwc, CH_EN, 1<<(p->channel_number));
 
 
 }
@@ -1391,228 +1391,228 @@ static void rt_fh_dma_cyclic_start(struct dma_transfer *p){
 
 static void rt_fh_dma_cyclic_prep(struct fh81_dma * fh81_dma_p,struct dma_transfer *p) {
 
-	//bind the controller to the transfer
-	p->dma_controller = fh81_dma_p;
-	//bind active transfer
-	fh81_dma_p->dma_channel[p->channel_number].active_trans = p;
-	//p_transfer->dma_controller->dma_channel[p_transfer->channel_number].active_trans = dma_trans_desc;
-	struct fh81_dma *my_own = p->dma_controller;
-	struct dw_dma *dwc;
-	dwc = &my_own->dwc;
-	volatile uint32_t ret_status;
-	struct dw_lli  *p_lli = RT_NULL;
-	uint32_t periods,i;
-	uint32_t temp_src_add;
-	uint32_t temp_dst_add;
-	uint32_t buf_len = p->trans_len;
-	uint32_t period_len = p->period_len;
+    //bind the controller to the transfer
+    p->dma_controller = fh81_dma_p;
+    //bind active transfer
+    fh81_dma_p->dma_channel[p->channel_number].active_trans = p;
+    //p_transfer->dma_controller->dma_channel[p_transfer->channel_number].active_trans = dma_trans_desc;
+    struct fh81_dma *my_own = p->dma_controller;
+    struct dw_dma *dwc;
+    dwc = &my_own->dwc;
+    volatile uint32_t ret_status;
+    struct dw_lli  *p_lli = RT_NULL;
+    uint32_t periods,i;
+    uint32_t temp_src_add;
+    uint32_t temp_dst_add;
+    uint32_t buf_len = p->trans_len;
+    uint32_t period_len = p->period_len;
 
-	struct dma_transfer * dma_trans_desc = p;
-	//check first...
-	RT_ASSERT(buf_len % period_len == 0);
+    struct dma_transfer * dma_trans_desc = p;
+    //check first...
+    RT_ASSERT(buf_len % period_len == 0);
 
-	//cal the periods...
-	periods = buf_len / period_len;
+    //cal the periods...
+    periods = buf_len / period_len;
 
 
-	//get desc....
-	//dma_trans_desc->first_lli = (struct dw_lli *)rt_malloc(periods * sizeof(struct dw_lli));
-	dma_trans_desc->first_lli  = get_desc(fh81_dma_p,dma_trans_desc,periods);
+    //get desc....
+    //dma_trans_desc->first_lli = (struct dw_lli *)rt_malloc(periods * sizeof(struct dw_lli));
+    dma_trans_desc->first_lli  = get_desc(fh81_dma_p,dma_trans_desc,periods);
 
-	if(dma_trans_desc->first_lli == RT_NULL){
+    if(dma_trans_desc->first_lli == RT_NULL){
 
-		FH_DMA_DEBUG("transfer error,reason: not enough mem..\n");
-		RT_ASSERT(dma_trans_desc->first_lli != RT_NULL);
-	}
+        FH_DMA_DEBUG("transfer error,reason: not enough mem..\n");
+        RT_ASSERT(dma_trans_desc->first_lli != RT_NULL);
+    }
 
-	rt_memset((void *)dma_trans_desc->first_lli, 0, periods * sizeof(struct dw_lli));
-	p_lli = dma_trans_desc->first_lli;
+    rt_memset((void *)dma_trans_desc->first_lli, 0, periods * sizeof(struct dw_lli));
+    p_lli = dma_trans_desc->first_lli;
 
-	RT_ASSERT(((uint32_t)p_lli & 0x03) == 0);
+    RT_ASSERT(((uint32_t)p_lli & 0x03) == 0);
 
 
-	RT_ASSERT(dma_trans_desc->dst_inc_mode <=DW_DMA_SLAVE_FIX);
-	RT_ASSERT(dma_trans_desc->src_inc_mode <=DW_DMA_SLAVE_FIX);
-	//step3: set the mem..
-	for(i=0;idst_inc_mode){
-		case DW_DMA_SLAVE_INC:
-			temp_dst_add = dma_trans_desc->dst_add + i * period_len * (1<dst_width);
-			break;
-		case DW_DMA_SLAVE_DEC:
-			temp_dst_add = dma_trans_desc->dst_add - i * period_len * (1<dst_width);
-			break;
-		case DW_DMA_SLAVE_FIX:
-			temp_dst_add = dma_trans_desc->dst_add;
-			break;
+    RT_ASSERT(dma_trans_desc->dst_inc_mode <=DW_DMA_SLAVE_FIX);
+    RT_ASSERT(dma_trans_desc->src_inc_mode <=DW_DMA_SLAVE_FIX);
+    //step3: set the mem..
+    for(i=0;idst_inc_mode){
+        case DW_DMA_SLAVE_INC:
+            temp_dst_add = dma_trans_desc->dst_add + i * period_len * (1<dst_width);
+            break;
+        case DW_DMA_SLAVE_DEC:
+            temp_dst_add = dma_trans_desc->dst_add - i * period_len * (1<dst_width);
+            break;
+        case DW_DMA_SLAVE_FIX:
+            temp_dst_add = dma_trans_desc->dst_add;
+            break;
 
-		}
+        }
 
 
-		switch(dma_trans_desc->src_inc_mode){
-		case DW_DMA_SLAVE_INC:
-			temp_src_add = dma_trans_desc->src_add + i * period_len * (1<src_width);
-			break;
-		case DW_DMA_SLAVE_DEC:
-			temp_src_add = dma_trans_desc->src_add - i * period_len * (1<src_width);
-			break;
-		case DW_DMA_SLAVE_FIX:
-			temp_src_add = dma_trans_desc->src_add ;
-			break;
+        switch(dma_trans_desc->src_inc_mode){
+        case DW_DMA_SLAVE_INC:
+            temp_src_add = dma_trans_desc->src_add + i * period_len * (1<src_width);
+            break;
+        case DW_DMA_SLAVE_DEC:
+            temp_src_add = dma_trans_desc->src_add - i * period_len * (1<src_width);
+            break;
+        case DW_DMA_SLAVE_FIX:
+            temp_src_add = dma_trans_desc->src_add ;
+            break;
 
-		}
+        }
 
 
-		p_lli[i].sar = temp_src_add;
-		p_lli[i].dar = temp_dst_add;
+        p_lli[i].sar = temp_src_add;
+        p_lli[i].dar = temp_dst_add;
 
-		//para ctl
+        //para ctl
 
 
-		RT_ASSERT(dma_trans_desc->dst_width <=DW_DMA_SLAVE_WIDTH_32BIT);
-		RT_ASSERT(dma_trans_desc->src_width <=DW_DMA_SLAVE_WIDTH_32BIT);
+        RT_ASSERT(dma_trans_desc->dst_width <=DW_DMA_SLAVE_WIDTH_32BIT);
+        RT_ASSERT(dma_trans_desc->src_width <=DW_DMA_SLAVE_WIDTH_32BIT);
 
-		RT_ASSERT(dma_trans_desc->dst_msize <=DW_DMA_SLAVE_MSIZE_256);
-		RT_ASSERT(dma_trans_desc->src_msize <=DW_DMA_SLAVE_MSIZE_256);
-		RT_ASSERT(dma_trans_desc->fc_mode <=DMA_P2P);
+        RT_ASSERT(dma_trans_desc->dst_msize <=DW_DMA_SLAVE_MSIZE_256);
+        RT_ASSERT(dma_trans_desc->src_msize <=DW_DMA_SLAVE_MSIZE_256);
+        RT_ASSERT(dma_trans_desc->fc_mode <=DMA_P2P);
 
 
 
-		p_lli[i].ctllo = DWC_CTLL_INT_EN|DWC_CTLL_DST_WIDTH(dma_trans_desc->dst_width)|DWC_CTLL_SRC_WIDTH(dma_trans_desc->src_width)
-				|DWC_CTLL_DST_INC_MODE(dma_trans_desc->dst_inc_mode)|DWC_CTLL_SRC_INC_MODE(dma_trans_desc->src_inc_mode)
-				|DWC_CTLL_DST_MSIZE(dma_trans_desc->dst_msize)|DWC_CTLL_SRC_MSIZE(dma_trans_desc->src_msize)|DWC_CTLL_FC(dma_trans_desc->fc_mode)
-				|DWC_CTLL_DMS(0)|DWC_CTLL_SMS(0);
-		//block size
-		p_lli[i].ctlhi = period_len;
+        p_lli[i].ctllo = DWC_CTLL_INT_EN|DWC_CTLL_DST_WIDTH(dma_trans_desc->dst_width)|DWC_CTLL_SRC_WIDTH(dma_trans_desc->src_width)
+                |DWC_CTLL_DST_INC_MODE(dma_trans_desc->dst_inc_mode)|DWC_CTLL_SRC_INC_MODE(dma_trans_desc->src_inc_mode)
+                |DWC_CTLL_DST_MSIZE(dma_trans_desc->dst_msize)|DWC_CTLL_SRC_MSIZE(dma_trans_desc->src_msize)|DWC_CTLL_FC(dma_trans_desc->fc_mode)
+                |DWC_CTLL_DMS(0)|DWC_CTLL_SMS(0);
+        //block size
+        p_lli[i].ctlhi = period_len;
 
 
 
-		p_lli[i].llp = (uint32_t)&p_lli[i+1];
-		p_lli[i].ctllo |= DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN;
+        p_lli[i].llp = (uint32_t)&p_lli[i+1];
+        p_lli[i].ctllo |= DWC_CTLL_LLP_D_EN|DWC_CTLL_LLP_S_EN;
 
 
-		//flush cache to mem
-		mmu_clean_invalidated_dcache((uint32_t)&p_lli[i],sizeof(struct dw_lli));
+        //flush cache to mem
+        mmu_clean_invalidated_dcache((uint32_t)&p_lli[i],sizeof(struct dw_lli));
 
-		dump_lli(&p_lli[i]);
-	}
-	//make a ring here
-	p_lli[periods -1 ].llp = (uint32_t)&p_lli[0];
+        dump_lli(&p_lli[i]);
+    }
+    //make a ring here
+    p_lli[periods -1 ].llp = (uint32_t)&p_lli[0];
 
-	mmu_clean_invalidated_dcache((uint32_t)&p_lli[periods -1 ],sizeof(struct dw_lli));
+    mmu_clean_invalidated_dcache((uint32_t)&p_lli[periods -1 ],sizeof(struct dw_lli));
 
 
 
-	//parse the handshake
-	RT_ASSERT(dma_trans_desc->dst_hs <=	DMA_SW_HANDSHAKING);
-	RT_ASSERT(dma_trans_desc->src_hs <=	DMA_SW_HANDSHAKING);
+    //parse the handshake
+    RT_ASSERT(dma_trans_desc->dst_hs <= DMA_SW_HANDSHAKING);
+    RT_ASSERT(dma_trans_desc->src_hs <= DMA_SW_HANDSHAKING);
 
-	//dst handshake
-	dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,0);
-	ret_status = 0;
-	if(dma_trans_desc->dst_hs == DMA_SW_HANDSHAKING){
-		ret_status |= DWC_CFGL_HS_DST;
-	}
-	else{
-		ret_status &= ~DWC_CFGL_HS_DST;
-	}
-	dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
+    //dst handshake
+    dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,0);
+    ret_status = 0;
+    if(dma_trans_desc->dst_hs == DMA_SW_HANDSHAKING){
+        ret_status |= DWC_CFGL_HS_DST;
+    }
+    else{
+        ret_status &= ~DWC_CFGL_HS_DST;
+    }
+    dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
 
 
 
-	//src handshake
-	ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
-	if(dma_trans_desc->src_hs == DMA_SW_HANDSHAKING){
-		ret_status |= DWC_CFGL_HS_SRC;
-	}
-	else{
-		ret_status &= ~DWC_CFGL_HS_SRC;
-	}
-	dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
+    //src handshake
+    ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO);
+    if(dma_trans_desc->src_hs == DMA_SW_HANDSHAKING){
+        ret_status |= DWC_CFGL_HS_SRC;
+    }
+    else{
+        ret_status &= ~DWC_CFGL_HS_SRC;
+    }
+    dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_LO,ret_status);
 
 
-	//only hw handshaking need this..
-	switch(dma_trans_desc->fc_mode){
-	case	DMA_M2M:
-		break;
-	case	DMA_M2P:
-		//set dst per...
-		RT_ASSERT(dma_trans_desc->dst_per <	DMA_HW_HS_END);
-		ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
-		//clear 43 ~ 46 bit
-		ret_status &= ~0x7800;
-		ret_status |= DWC_CFGH_DST_PER(dma_trans_desc->dst_per);
-		dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
-		//DWC_CFGH_SRC_PER
+    //only hw handshaking need this..
+    switch(dma_trans_desc->fc_mode){
+    case    DMA_M2M:
+        break;
+    case    DMA_M2P:
+        //set dst per...
+        RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END);
+        ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
+        //clear 43 ~ 46 bit
+        ret_status &= ~0x7800;
+        ret_status |= DWC_CFGH_DST_PER(dma_trans_desc->dst_per);
+        dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
+        //DWC_CFGH_SRC_PER
 
-		break;
-	case 	DMA_P2M:
-		//set src per...
-		RT_ASSERT(dma_trans_desc->src_per <	DMA_HW_HS_END);
-		ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
-		//clear 39 ~ 42 bit
-		ret_status &= ~0x780;
-		ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per);
-		dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
+        break;
+    case    DMA_P2M:
+        //set src per...
+        RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END);
+        ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
+        //clear 39 ~ 42 bit
+        ret_status &= ~0x780;
+        ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per);
+        dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
 
-		break;
-	case 	DMA_P2P:
-		//set src and dst..
-		RT_ASSERT(dma_trans_desc->dst_per <	DMA_HW_HS_END);
-		RT_ASSERT(dma_trans_desc->src_per <	DMA_HW_HS_END);
+        break;
+    case    DMA_P2P:
+        //set src and dst..
+        RT_ASSERT(dma_trans_desc->dst_per < DMA_HW_HS_END);
+        RT_ASSERT(dma_trans_desc->src_per < DMA_HW_HS_END);
 
-		ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
-		ret_status &= ~0x7800;
-		ret_status &= ~0x780;
-		ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per) | DWC_CFGH_DST_PER(dma_trans_desc->dst_per);
-		dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
+        ret_status = dw_readl(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI);
+        ret_status &= ~0x7800;
+        ret_status &= ~0x780;
+        ret_status |= DWC_CFGH_SRC_PER(dma_trans_desc->src_per) | DWC_CFGH_DST_PER(dma_trans_desc->dst_per);
+        dw_writel(dwc,CHAN[dma_trans_desc->channel_number].CFG_HI,ret_status);
 
-		break;
-	default:
-		break;
-	}
+        break;
+    default:
+        break;
+    }
 
-	dma_trans_desc->dma_controller->dma_channel[dma_trans_desc->channel_number].channel_status = CHANNEL_STATUS_BUSY;
+    dma_trans_desc->dma_controller->dma_channel[dma_trans_desc->channel_number].channel_status = CHANNEL_STATUS_BUSY;
 
-	if(dma_trans_desc->prepare_callback){
-			dma_trans_desc->prepare_callback(dma_trans_desc->prepare_para);
-	}
+    if(dma_trans_desc->prepare_callback){
+            dma_trans_desc->prepare_callback(dma_trans_desc->prepare_para);
+    }
 
 }
 
 
 static void rt_fh_dma_cyclic_free(struct dma_transfer *p){
 
-	struct fh81_dma *my_own = p->dma_controller;
-	struct dw_dma *dwc;
-	dwc = &my_own->dwc;
-	volatile uint32_t ret_status;
-	struct dw_lli  *p_lli = RT_NULL;
-	p_lli = p->first_lli;
+    struct fh81_dma *my_own = p->dma_controller;
+    struct dw_dma *dwc;
+    dwc = &my_own->dwc;
+    volatile uint32_t ret_status;
+    struct dw_lli  *p_lli = RT_NULL;
+    p_lli = p->first_lli;
 
 
-	//close channel first..
-	channel_clear_bit(dwc, CH_EN, 1<<(p->channel_number));
+    //close channel first..
+    channel_clear_bit(dwc, CH_EN, 1<<(p->channel_number));
 
-	//check if close really
-	while (dw_readl(dwc, CH_EN) & 1<<(p->channel_number));
+    //check if close really
+    while (dw_readl(dwc, CH_EN) & 1<<(p->channel_number));
 
-	dw_writel(dwc, CLEAR.XFER, 1<<(p->channel_number));
-	dw_writel(dwc, CLEAR.BLOCK, 1<<(p->channel_number));
-	dw_writel(dwc, CLEAR.ERROR, 1<<(p->channel_number));
+    dw_writel(dwc, CLEAR.XFER, 1<<(p->channel_number));
+    dw_writel(dwc, CLEAR.BLOCK, 1<<(p->channel_number));
+    dw_writel(dwc, CLEAR.ERROR, 1<<(p->channel_number));
 
 
 
 
-	//rt_free(p->first_lli);
-	put_desc(my_own,p);
+    //rt_free(p->first_lli);
+    put_desc(my_own,p);
 
 }
 
 
 void rt_fh_dma_init(void){
-	fh81_dma_register(&fh81_dma_controller[0],"fh81_dma");
+    fh81_dma_register(&fh81_dma_controller[0],"fh81_dma");
 
 }
diff --git a/bsp/fh8620/drivers/fh_dma.h b/bsp/fh8620/drivers/fh_dma.h
index faceac2deb..477718d0a5 100644
--- a/bsp/fh8620/drivers/fh_dma.h
+++ b/bsp/fh8620/drivers/fh_dma.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,19 +18,19 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef FH_DMA_H_
 #define FH_DMA_H_
 
 
 /****************************************************************************
 * #include section
-*	add #include here if any
+*   add #include here if any
 ***************************************************************************/
 
 #include 
@@ -43,24 +43,24 @@
  *********************************/
 
 
-#define FH81_MAX_CHANNEL					(4)
-#define FH81_CHANNEL_MAX_TRANSFER_SIZE		(4095)
+#define FH81_MAX_CHANNEL                    (4)
+#define FH81_CHANNEL_MAX_TRANSFER_SIZE      (4095)
 
 
 
 
 enum DMA_HW_HS_MAP{
-	ACODEC_RX = 0,
-	ACODEC_TX,
-	SPI0_RX,
-	SPI0_TX,
-	SPI1_RX,
-	SPI1_TX,
-	UART0_RX,
-	UART0_TX,
-	UART1_RX,
-	UART1_TX,
-	DMA_HW_HS_END,
+    ACODEC_RX = 0,
+    ACODEC_TX,
+    SPI0_RX,
+    SPI0_TX,
+    SPI1_RX,
+    SPI1_TX,
+    UART0_RX,
+    UART0_TX,
+    UART1_RX,
+    UART1_TX,
+    DMA_HW_HS_END,
 };
 
 /*********************************
@@ -76,7 +76,7 @@ typedef void (*user_prepare)(void *prepare_para);
 
 
 
-/****************************		i'm cut-off line		************************************/
+/****************************       i'm cut-off line        ************************************/
 
 
 
@@ -88,128 +88,128 @@ struct fh81_dma;
 
 
 struct dw_lli {
-	/* values that are not changed by hardware */
-	rt_uint32_t	sar;
-	rt_uint32_t	dar;
-	rt_uint32_t	llp;		/* chain to next lli */
-	rt_uint32_t		ctllo;
-	/* values that may get written back: */
-	rt_uint32_t		ctlhi;
-	/* sstat and dstat can snapshot peripheral register state.
-	 * silicon config may discard either or both...
-	 */
-	rt_uint32_t		sstat;
-	rt_uint32_t		dstat;
-	rt_uint32_t reserve;
+    /* values that are not changed by hardware */
+    rt_uint32_t sar;
+    rt_uint32_t dar;
+    rt_uint32_t llp;        /* chain to next lli */
+    rt_uint32_t     ctllo;
+    /* values that may get written back: */
+    rt_uint32_t     ctlhi;
+    /* sstat and dstat can snapshot peripheral register state.
+     * silicon config may discard either or both...
+     */
+    rt_uint32_t     sstat;
+    rt_uint32_t     dstat;
+    rt_uint32_t reserve;
 
 };
 
 //transfer use below
 struct dma_transfer{
-	//this is private for the dma drive....app don't touch it,the driver will manger it
-	//link interface for more transfer to the controller...
-	rt_list_t transfer_list;
-	struct fh81_dma *dma_controller;
-	//this the mem add....the dma controller will load the setting to move data ....
-	//user don't touch it
-	struct dw_lli *first_lli;
-	rt_uint32_t lli_size;
-	//new add for allign get desc...
-	rt_uint32_t actual_lli_size;
+    //this is private for the dma drive....app don't touch it,the driver will manger it
+    //link interface for more transfer to the controller...
+    rt_list_t transfer_list;
+    struct fh81_dma *dma_controller;
+    //this the mem add....the dma controller will load the setting to move data ....
+    //user don't touch it
+    struct dw_lli *first_lli;
+    rt_uint32_t lli_size;
+    //new add for allign get desc...
+    rt_uint32_t actual_lli_size;
 
 
-	//user could set paras below~~~
-#define AUTO_FIND_CHANNEL		(0xff)
-	//transfer with which dma channel...if the data is 0xff, the driver will auto find a free channel.
-	rt_uint32_t		channel_number;
-	//which dma you want to use...for fh81....only 0!!!
-	rt_uint32_t		dma_number;
+    //user could set paras below~~~
+#define AUTO_FIND_CHANNEL       (0xff)
+    //transfer with which dma channel...if the data is 0xff, the driver will auto find a free channel.
+    rt_uint32_t     channel_number;
+    //which dma you want to use...for fh81....only 0!!!
+    rt_uint32_t     dma_number;
 
 
-	//user should set the para below
-#define	DMA_M2M 			(0)		//	MEM <=> MEM
-#define	DMA_M2P 			(1)		//	MEM => peripheral A
-#define	DMA_P2M 			(2)		//	MEM <= peripheral A
-#define	DMA_P2P 			(3)		//	peripheral A <=> peripheral B
-	rt_uint32_t			fc_mode;//ip->mem. mem->mem. mem->ip
+    //user should set the para below
+#define DMA_M2M             (0)     //  MEM <=> MEM
+#define DMA_M2P             (1)     //  MEM => peripheral A
+#define DMA_P2M             (2)     //  MEM <= peripheral A
+#define DMA_P2P             (3)     //  peripheral A <=> peripheral B
+    rt_uint32_t         fc_mode;//ip->mem. mem->mem. mem->ip
 
 
 
 
-#define DMA_HW_HANDSHAKING	(0)
-#define DMA_SW_HANDSHAKING	(1)
-	rt_uint32_t			src_hs;			//src
-	//if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
-	rt_uint32_t			src_per;		//src hw handshake number
-	//rt_uint32_t			irq_mode;//for each transfer,irq maybe not same. suggest for the default(transfer isr)
+#define DMA_HW_HANDSHAKING  (0)
+#define DMA_SW_HANDSHAKING  (1)
+    rt_uint32_t         src_hs;         //src
+    //if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
+    rt_uint32_t         src_per;        //src hw handshake number
+    //rt_uint32_t           irq_mode;//for each transfer,irq maybe not same. suggest for the default(transfer isr)
 
-#define	DW_DMA_SLAVE_WIDTH_8BIT 	(0)
-#define	DW_DMA_SLAVE_WIDTH_16BIT 	(1)
-#define	DW_DMA_SLAVE_WIDTH_32BIT 	(2)
-	rt_uint32_t			src_width;
+#define DW_DMA_SLAVE_WIDTH_8BIT     (0)
+#define DW_DMA_SLAVE_WIDTH_16BIT    (1)
+#define DW_DMA_SLAVE_WIDTH_32BIT    (2)
+    rt_uint32_t         src_width;
 
-	//the user should reference the hw handshaking watermark..
-#define DW_DMA_SLAVE_MSIZE_1		 (0)
-#define DW_DMA_SLAVE_MSIZE_4		 (1)
-#define DW_DMA_SLAVE_MSIZE_8		 (2)
-#define DW_DMA_SLAVE_MSIZE_16		 (3)
-#define DW_DMA_SLAVE_MSIZE_32		 (4)
-#define DW_DMA_SLAVE_MSIZE_64		 (5)
-#define DW_DMA_SLAVE_MSIZE_128		 (6)
-#define DW_DMA_SLAVE_MSIZE_256		 (7)
-	rt_uint32_t			src_msize;
-	rt_uint32_t			src_add;
-#define DW_DMA_SLAVE_INC		(0)
-#define DW_DMA_SLAVE_DEC		(1)
-#define DW_DMA_SLAVE_FIX		(2)
-	rt_uint32_t			src_inc_mode;	//increase mode: increase or not change
+    //the user should reference the hw handshaking watermark..
+#define DW_DMA_SLAVE_MSIZE_1         (0)
+#define DW_DMA_SLAVE_MSIZE_4         (1)
+#define DW_DMA_SLAVE_MSIZE_8         (2)
+#define DW_DMA_SLAVE_MSIZE_16        (3)
+#define DW_DMA_SLAVE_MSIZE_32        (4)
+#define DW_DMA_SLAVE_MSIZE_64        (5)
+#define DW_DMA_SLAVE_MSIZE_128       (6)
+#define DW_DMA_SLAVE_MSIZE_256       (7)
+    rt_uint32_t         src_msize;
+    rt_uint32_t         src_add;
+#define DW_DMA_SLAVE_INC        (0)
+#define DW_DMA_SLAVE_DEC        (1)
+#define DW_DMA_SLAVE_FIX        (2)
+    rt_uint32_t         src_inc_mode;   //increase mode: increase or not change
 
 
-//#define DMA_DST_HW_HANDSHAKING	(0)
-//#define DMA_DST_SW_HANDSHAKING	(1)
-	rt_uint32_t			dst_hs;			//src
-	//if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
-	rt_uint32_t			dst_per;		//dst hw handshake number
-//#define	DW_DMA_SLAVE_WIDTH_8BIT 	(0)
-//#define	DW_DMA_SLAVE_WIDTH_16BIT 	(1)
-//#define	DW_DMA_SLAVE_WIDTH_32BIT 	(2)
-	rt_uint32_t			dst_width;
-//#define DW_DMA_SLAVE_MSIZE_1		 (0)
-//#define DW_DMA_SLAVE_MSIZE_4		 (1)
-//#define DW_DMA_SLAVE_MSIZE_8		 (2)
-//#define DW_DMA_SLAVE_MSIZE_16		 (3)
-//#define DW_DMA_SLAVE_MSIZE_32		 (4)
-//#define DW_DMA_SLAVE_MSIZE_64		 (5)
-//#define DW_DMA_SLAVE_MSIZE_128		 (6)
-//#define DW_DMA_SLAVE_MSIZE_256		 (7)
-	rt_uint32_t			dst_msize;
-	rt_uint32_t			dst_add;
-//#define DW_DMA_SLAVE_INC		(0)
-//#define DW_DMA_SLAVE_DEC		(1)
-//#define DW_DMA_SLAVE_FIX		(2)
-	rt_uint32_t			dst_inc_mode;	//increase mode: increase or not change
+//#define DMA_DST_HW_HANDSHAKING    (0)
+//#define DMA_DST_SW_HANDSHAKING    (1)
+    rt_uint32_t         dst_hs;         //src
+    //if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
+    rt_uint32_t         dst_per;        //dst hw handshake number
+//#define   DW_DMA_SLAVE_WIDTH_8BIT     (0)
+//#define   DW_DMA_SLAVE_WIDTH_16BIT    (1)
+//#define   DW_DMA_SLAVE_WIDTH_32BIT    (2)
+    rt_uint32_t         dst_width;
+//#define DW_DMA_SLAVE_MSIZE_1       (0)
+//#define DW_DMA_SLAVE_MSIZE_4       (1)
+//#define DW_DMA_SLAVE_MSIZE_8       (2)
+//#define DW_DMA_SLAVE_MSIZE_16      (3)
+//#define DW_DMA_SLAVE_MSIZE_32      (4)
+//#define DW_DMA_SLAVE_MSIZE_64      (5)
+//#define DW_DMA_SLAVE_MSIZE_128         (6)
+//#define DW_DMA_SLAVE_MSIZE_256         (7)
+    rt_uint32_t         dst_msize;
+    rt_uint32_t         dst_add;
+//#define DW_DMA_SLAVE_INC      (0)
+//#define DW_DMA_SLAVE_DEC      (1)
+//#define DW_DMA_SLAVE_FIX      (2)
+    rt_uint32_t         dst_inc_mode;   //increase mode: increase or not change
 
 
-	//total sizes, unit: src_width/DW_DMA_SLAVE_WIDTH_8BIT...
-	//exg: src_width = DW_DMA_SLAVE_WIDTH_32BIT. trans_len = 2...means that: the dma will transfer 2*4 bytes..
-	//exg: src_width = DW_DMA_SLAVE_WIDTH_8BIT. trans_len = 6...means that: the dma will transfer 1*6 bytes..
-	rt_uint32_t			trans_len;
+    //total sizes, unit: src_width/DW_DMA_SLAVE_WIDTH_8BIT...
+    //exg: src_width = DW_DMA_SLAVE_WIDTH_32BIT. trans_len = 2...means that: the dma will transfer 2*4 bytes..
+    //exg: src_width = DW_DMA_SLAVE_WIDTH_8BIT. trans_len = 6...means that: the dma will transfer 1*6 bytes..
+    rt_uint32_t         trans_len;
 
 
 
-	//this is used when dma finish transfer job
-	dma_complete_callback complete_callback;
-	void				*complete_para; //for the driver data use the dma driver.
+    //this is used when dma finish transfer job
+    dma_complete_callback complete_callback;
+    void                *complete_para; //for the driver data use the dma driver.
 
 
-	//this is used when dma before work..the user maybe need to set his own private para..
-	user_prepare	prepare_callback;
-	void				*prepare_para;
+    //this is used when dma before work..the user maybe need to set his own private para..
+    user_prepare    prepare_callback;
+    void                *prepare_para;
 
 
-	//add cyclic para...
-	//period len..
-	rt_uint32_t period_len;
+    //add cyclic para...
+    //period len..
+    rt_uint32_t period_len;
 
 
 };
@@ -223,13 +223,13 @@ struct dma_transfer{
 
 /****************************************************************************
 * #define section
-*	add constant #define here if any
+*   add constant #define here if any
 ***************************************************************************/
 
 
 /****************************************************************************
 * ADT section
-*	add Abstract Data Type definition here
+*   add Abstract Data Type definition here
 ***************************************************************************/
 
 
@@ -240,7 +240,7 @@ struct dma_transfer{
 
 /****************************************************************************
 *  section
-*	add function prototype here if any
+*   add function prototype here if any
 ***************************************************************************/
 rt_err_t fh81_dma_register(struct fh81_dma * fh81_dma_p,
                              char * dma_name);
diff --git a/bsp/fh8620/drivers/gpio.c b/bsp/fh8620/drivers/gpio.c
index fc3fff639e..7a0dca36df 100644
--- a/bsp/fh8620/drivers/gpio.c
+++ b/bsp/fh8620/drivers/gpio.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -410,10 +410,10 @@ int fh_gpio_probe(void *priv_data)
     int i;
 
     if(gpio_obj->id == 0){
-    	  rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_0");
+          rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_0");
     }
     else if(gpio_obj->id == 1){
-    	rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_1");
+        rt_hw_interrupt_install(gpio_obj->irq, fh_gpio_interrupt, (void *)gpio_obj, "gpio_1");
     }
 
 
diff --git a/bsp/fh8620/drivers/gpio.h b/bsp/fh8620/drivers/gpio.h
index 7fe4d236b7..97b613871b 100644
--- a/bsp/fh8620/drivers/gpio.h
+++ b/bsp/fh8620/drivers/gpio.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef GPIO_H_
 #define GPIO_H_
 
diff --git a/bsp/fh8620/drivers/i2c.c b/bsp/fh8620/drivers/i2c.c
index 0f9636853d..66931666ea 100644
--- a/bsp/fh8620/drivers/i2c.c
+++ b/bsp/fh8620/drivers/i2c.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include 
 #include 
 #include "i2c.h"
@@ -50,25 +50,25 @@ static void fh_i2c_xfer_init(struct rt_i2c_bus_device *dev, struct rt_i2c_msg ms
 {
     struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv;
     struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
-	rt_uint32_t ic_con;
+    rt_uint32_t ic_con;
 
-	/* if the slave address is ten bit address, ERROR*/
+    /* if the slave address is ten bit address, ERROR*/
     if (msgs[i2c_drv->msg_write_idx].flags & I2C_M_TEN)
     {
         rt_kprintf("ERROR: %s, ten bit address is NOT supported\n", __func__);
         return;
     }
 
-	/* Disable the adapter */
-	I2C_WaitMasterIdle(i2c_obj);
+    /* Disable the adapter */
+    I2C_WaitMasterIdle(i2c_obj);
 
-	I2C_Enable(i2c_obj, RT_FALSE);
+    I2C_Enable(i2c_obj, RT_FALSE);
 
-	/* set the slave (target) address */
-	I2C_SetSlaveAddress(i2c_obj, msgs[i2c_drv->msg_write_idx].addr);
+    /* set the slave (target) address */
+    I2C_SetSlaveAddress(i2c_obj, msgs[i2c_drv->msg_write_idx].addr);
 
-	/* Enable interrupts */
-	I2C_SetInterruptMask(i2c_obj, DW_IC_INTR_DEFAULT_MASK);
+    /* Enable interrupts */
+    I2C_SetInterruptMask(i2c_obj, DW_IC_INTR_DEFAULT_MASK);
 
     /* Enable the adapter */
     I2C_Enable(i2c_obj, RT_TRUE);
@@ -76,30 +76,30 @@ static void fh_i2c_xfer_init(struct rt_i2c_bus_device *dev, struct rt_i2c_msg ms
 
 
 static rt_size_t fh_i2c_xfer(struct rt_i2c_bus_device *dev,
-		struct rt_i2c_msg msgs[], rt_uint32_t num)
+        struct rt_i2c_msg msgs[], rt_uint32_t num)
 {
     struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv;
     struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
     int ret;
-	struct rt_i2c_msg *pmsg = RT_NULL;
+    struct rt_i2c_msg *pmsg = RT_NULL;
 
-	PRINT_I2C_DBG(">>>>>>>>>>>>>%s start\n", __func__);
+    PRINT_I2C_DBG(">>>>>>>>>>>>>%s start\n", __func__);
 
     rt_completion_init(&i2c_drv->transfer_completion);
 
     ret = rt_mutex_take(i2c_drv->lock, RT_WAITING_FOREVER);
-	if (ret != RT_EOK) {
-		goto done;
-	}
+    if (ret != RT_EOK) {
+        goto done;
+    }
 
-	i2c_drv->msgs = msgs;
-	i2c_drv->msgs_num = num;
-	i2c_drv->msg_read_idx = 0;
-	i2c_drv->msg_write_idx = 0;
-	i2c_drv->cmd_err = 0;
-	i2c_drv->msg_err = 0;
-	i2c_drv->status = STATUS_IDLE;
-	i2c_obj->abort_source = 0;
+    i2c_drv->msgs = msgs;
+    i2c_drv->msgs_num = num;
+    i2c_drv->msg_read_idx = 0;
+    i2c_drv->msg_write_idx = 0;
+    i2c_drv->cmd_err = 0;
+    i2c_drv->msg_err = 0;
+    i2c_drv->status = STATUS_IDLE;
+    i2c_obj->abort_source = 0;
 
     ret = I2C_WaitDeviceIdle(i2c_obj);
     if (ret < 0)
@@ -108,51 +108,51 @@ static rt_size_t fh_i2c_xfer(struct rt_i2c_bus_device *dev,
         //goto done;
     }
 
-	fh_i2c_xfer_init(dev, msgs, num);
+    fh_i2c_xfer_init(dev, msgs, num);
 
-	ret = rt_completion_wait(&i2c_drv->transfer_completion, RT_TICK_PER_SECOND);
-	PRINT_I2C_DBG("%s transfer finished\n", "rt_completion_wait");
+    ret = rt_completion_wait(&i2c_drv->transfer_completion, RT_TICK_PER_SECOND);
+    PRINT_I2C_DBG("%s transfer finished\n", "rt_completion_wait");
     if(ret)
-	{
+    {
         rt_kprintf("ERROR: %s, transfer timeout\n", __func__);
         I2C_SetDataCmd(i2c_obj, 0x200);
         I2C_Init(i2c_obj);
-		ret = -RT_ETIMEOUT;
-		goto done;
-	}
+        ret = -RT_ETIMEOUT;
+        goto done;
+    }
 
-	if (i2c_drv->msg_err)
-	{
-		rt_kprintf("i2c_priv->msg_err: %d\n", i2c_drv->msg_err);
-		ret = i2c_drv->msg_err;
-		goto done;
-	}
+    if (i2c_drv->msg_err)
+    {
+        rt_kprintf("i2c_priv->msg_err: %d\n", i2c_drv->msg_err);
+        ret = i2c_drv->msg_err;
+        goto done;
+    }
 
-	/* no error */
-	if (!i2c_drv->cmd_err)
-	{
-		/* Disable the adapter */
-	    I2C_WaitMasterIdle(i2c_obj);
-	    I2C_Enable(i2c_obj, RT_FALSE);
-		ret = num;
-		goto done;
-	}
+    /* no error */
+    if (!i2c_drv->cmd_err)
+    {
+        /* Disable the adapter */
+        I2C_WaitMasterIdle(i2c_obj);
+        I2C_Enable(i2c_obj, RT_FALSE);
+        ret = num;
+        goto done;
+    }
 
-	/* We have an error */
-	if (i2c_drv->cmd_err == DW_IC_ERR_TX_ABRT)
-	{
-		rt_kprintf("ERROR: %s, i2c_priv>cmd_err == DW_IC_ERR_TX_ABRT\n", __func__);
-		ret = I2C_HandleTxAbort(i2c_obj);
-		goto done;
-	}
+    /* We have an error */
+    if (i2c_drv->cmd_err == DW_IC_ERR_TX_ABRT)
+    {
+        rt_kprintf("ERROR: %s, i2c_priv>cmd_err == DW_IC_ERR_TX_ABRT\n", __func__);
+        ret = I2C_HandleTxAbort(i2c_obj);
+        goto done;
+    }
 
-	ret = 1;
+    ret = 1;
 
 done:
     I2C_Enable(i2c_obj, RT_FALSE);
     rt_mutex_release(i2c_drv->lock);
     PRINT_I2C_DBG(">>>>>>>>>>>>>%s end\n", __func__);
-	return ret;
+    return ret;
 
 }
 
@@ -167,164 +167,164 @@ static void i2c_fh_xfer_msg(struct rt_i2c_bus_device *dev)
 {
     struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv;
     struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
-	struct rt_i2c_msg *msgs = i2c_drv->msgs;
-	rt_uint32_t intr_mask, cmd;
-	int tx_limit, rx_limit;
-	rt_uint32_t addr = msgs[i2c_drv->msg_write_idx].addr;
-	rt_uint32_t buf_len = i2c_drv->tx_buf_len;
-	rt_uint8_t *buf = i2c_drv->tx_buf;
+    struct rt_i2c_msg *msgs = i2c_drv->msgs;
+    rt_uint32_t intr_mask, cmd;
+    int tx_limit, rx_limit;
+    rt_uint32_t addr = msgs[i2c_drv->msg_write_idx].addr;
+    rt_uint32_t buf_len = i2c_drv->tx_buf_len;
+    rt_uint8_t *buf = i2c_drv->tx_buf;
 
-	PRINT_I2C_DBG("%s start, msgs_num: %d, write_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_write_idx);
+    PRINT_I2C_DBG("%s start, msgs_num: %d, write_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_write_idx);
 
-	intr_mask = DW_IC_INTR_DEFAULT_MASK;
+    intr_mask = DW_IC_INTR_DEFAULT_MASK;
 
-	for (; i2c_drv->msg_write_idx < i2c_drv->msgs_num; i2c_drv->msg_write_idx++)
-	{
-		/*
-		 * if target address has changed, we need to
-		 * reprogram the target address in the i2c
-		 * adapter when we are done with this transfer
-		 */
-		if (msgs[i2c_drv->msg_write_idx].addr != addr) {
-			rt_kprintf(
-					"ERROR: %s, invalid target address\n", __func__);
-			i2c_drv->msg_err = 1;
-			break;
-		}
+    for (; i2c_drv->msg_write_idx < i2c_drv->msgs_num; i2c_drv->msg_write_idx++)
+    {
+        /*
+         * if target address has changed, we need to
+         * reprogram the target address in the i2c
+         * adapter when we are done with this transfer
+         */
+        if (msgs[i2c_drv->msg_write_idx].addr != addr) {
+            rt_kprintf(
+                    "ERROR: %s, invalid target address\n", __func__);
+            i2c_drv->msg_err = 1;
+            break;
+        }
 
-		if (msgs[i2c_drv->msg_write_idx].len == 0) {
-			rt_kprintf(
-					"ERROR: %s, invalid message length\n", __func__);
-			i2c_drv->msg_err = 1;
-			break;
-		}
+        if (msgs[i2c_drv->msg_write_idx].len == 0) {
+            rt_kprintf(
+                    "ERROR: %s, invalid message length\n", __func__);
+            i2c_drv->msg_err = 1;
+            break;
+        }
 
-		if (!(i2c_drv->status & STATUS_WRITE_IN_PROGRESS))
-		{
-			/* new i2c_msg */
-			buf = msgs[i2c_drv->msg_write_idx].buf;
-			buf_len = msgs[i2c_drv->msg_write_idx].len;
+        if (!(i2c_drv->status & STATUS_WRITE_IN_PROGRESS))
+        {
+            /* new i2c_msg */
+            buf = msgs[i2c_drv->msg_write_idx].buf;
+            buf_len = msgs[i2c_drv->msg_write_idx].len;
 
-			PRINT_I2C_DBG("new msg: len: %d, buf: 0x%x\n", buf_len, buf[0]);
-		}
+            PRINT_I2C_DBG("new msg: len: %d, buf: 0x%x\n", buf_len, buf[0]);
+        }
 
-		tx_limit = i2c_obj->config.tx_fifo_depth - I2C_GetTransmitFifoLevel(i2c_obj);
-		rx_limit = i2c_obj->config.rx_fifo_depth - I2C_GetReceiveFifoLevel(i2c_obj);
+        tx_limit = i2c_obj->config.tx_fifo_depth - I2C_GetTransmitFifoLevel(i2c_obj);
+        rx_limit = i2c_obj->config.rx_fifo_depth - I2C_GetReceiveFifoLevel(i2c_obj);
 
-		while (buf_len > 0 && tx_limit > 0 && rx_limit > 0)
-		{
-			if (msgs[i2c_drv->msg_write_idx].flags & RT_I2C_RD)
-			{
-				cmd = 0x100;
-				rx_limit--;
-			}
-			else
-			{
-				cmd = *buf++;
-			}
+        while (buf_len > 0 && tx_limit > 0 && rx_limit > 0)
+        {
+            if (msgs[i2c_drv->msg_write_idx].flags & RT_I2C_RD)
+            {
+                cmd = 0x100;
+                rx_limit--;
+            }
+            else
+            {
+                cmd = *buf++;
+            }
 
-			tx_limit--; buf_len--;
+            tx_limit--; buf_len--;
 
-			if(!buf_len)
-			{
-			    //2015-11-8 ar0130 bug fixed
-			    while(I2C_GetTransmitFifoLevel(i2c_obj));
-			    cmd |= 0x200;
-			}
+            if(!buf_len)
+            {
+                //2015-11-8 ar0130 bug fixed
+                while(I2C_GetTransmitFifoLevel(i2c_obj));
+                cmd |= 0x200;
+            }
 
-			I2C_SetDataCmd(i2c_obj, cmd);
-		}
+            I2C_SetDataCmd(i2c_obj, cmd);
+        }
 
-		i2c_drv->tx_buf = buf;
-		i2c_drv->tx_buf_len = buf_len;
+        i2c_drv->tx_buf = buf;
+        i2c_drv->tx_buf_len = buf_len;
 
-		if (buf_len > 0)
-		{
-			/* more bytes to be written */
-		    i2c_drv->status |= STATUS_WRITE_IN_PROGRESS;
-			break;
-		}
-		else
-		{
-		    i2c_drv->status &= ~STATUS_WRITE_IN_PROGRESS;
-		}
-	}
+        if (buf_len > 0)
+        {
+            /* more bytes to be written */
+            i2c_drv->status |= STATUS_WRITE_IN_PROGRESS;
+            break;
+        }
+        else
+        {
+            i2c_drv->status &= ~STATUS_WRITE_IN_PROGRESS;
+        }
+    }
 
-	/*
-	 * If i2c_msg index search is completed, we don't need TX_EMPTY
-	 * interrupt any more.
-	 */
+    /*
+     * If i2c_msg index search is completed, we don't need TX_EMPTY
+     * interrupt any more.
+     */
 
-	if (i2c_drv->msg_write_idx == i2c_drv->msgs_num)
-	    intr_mask &= ~DW_IC_INTR_TX_EMPTY;
+    if (i2c_drv->msg_write_idx == i2c_drv->msgs_num)
+        intr_mask &= ~DW_IC_INTR_TX_EMPTY;
 
-	if (i2c_drv->msg_err)
-	{
-	    rt_kprintf("ERROR: %s, msg_err: %d\n", __func__, i2c_drv->msg_err);
-	    intr_mask = 0;
-	}
+    if (i2c_drv->msg_err)
+    {
+        rt_kprintf("ERROR: %s, msg_err: %d\n", __func__, i2c_drv->msg_err);
+        intr_mask = 0;
+    }
 
-	I2C_SetInterruptMask(i2c_obj, intr_mask);
+    I2C_SetInterruptMask(i2c_obj, intr_mask);
 
-	PRINT_I2C_DBG("%s end\n", __func__);
+    PRINT_I2C_DBG("%s end\n", __func__);
 }
 
 static void i2c_fh_read(struct rt_i2c_bus_device *dev)
 {
-	struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv;
-	struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
-	struct rt_i2c_msg *msgs = i2c_drv->msgs;
-	int rx_valid;
+    struct i2c_driver *i2c_drv = (struct i2c_driver *)dev->priv;
+    struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
+    struct rt_i2c_msg *msgs = i2c_drv->msgs;
+    int rx_valid;
 
-	PRINT_I2C_DBG("%s start, msgs_num: %d, read_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_read_idx);
+    PRINT_I2C_DBG("%s start, msgs_num: %d, read_idx: %d\n", __func__, i2c_drv->msgs_num, i2c_drv->msg_read_idx);
 
-	for (; i2c_drv->msg_read_idx < i2c_drv->msgs_num; i2c_drv->msg_read_idx++)
-	{
-		rt_uint32_t len;
-		rt_uint8_t *buf;
+    for (; i2c_drv->msg_read_idx < i2c_drv->msgs_num; i2c_drv->msg_read_idx++)
+    {
+        rt_uint32_t len;
+        rt_uint8_t *buf;
 
-		if (!(msgs[i2c_drv->msg_read_idx].flags & RT_I2C_RD))
-		    continue;
+        if (!(msgs[i2c_drv->msg_read_idx].flags & RT_I2C_RD))
+            continue;
 
-		if (!(i2c_drv->status & STATUS_READ_IN_PROGRESS))
-		{
-			len = msgs[i2c_drv->msg_read_idx].len;
-			buf = msgs[i2c_drv->msg_read_idx].buf;
-		}
-		else
-		{
-		    PRINT_I2C_DBG("STATUS_READ_IN_PROGRESS\n");
-			len = i2c_drv->rx_buf_len;
-			buf = i2c_drv->rx_buf;
-		}
+        if (!(i2c_drv->status & STATUS_READ_IN_PROGRESS))
+        {
+            len = msgs[i2c_drv->msg_read_idx].len;
+            buf = msgs[i2c_drv->msg_read_idx].buf;
+        }
+        else
+        {
+            PRINT_I2C_DBG("STATUS_READ_IN_PROGRESS\n");
+            len = i2c_drv->rx_buf_len;
+            buf = i2c_drv->rx_buf;
+        }
 
-		rx_valid = I2C_GetReceiveFifoLevel(i2c_obj);
+        rx_valid = I2C_GetReceiveFifoLevel(i2c_obj);
 
-		if(rx_valid == 0)
-		{
-			rt_kprintf("ERROR: %s, rx_valid == 0\n", __func__);
-		}
-		PRINT_I2C_DBG("%s, len=%d, rx_valid=%d\n", __func__, len, rx_valid);
-		for (; len > 0 && rx_valid > 0; len--, rx_valid--)
-		{
-			*buf++ = I2C_GetData(i2c_obj);
-		}
+        if(rx_valid == 0)
+        {
+            rt_kprintf("ERROR: %s, rx_valid == 0\n", __func__);
+        }
+        PRINT_I2C_DBG("%s, len=%d, rx_valid=%d\n", __func__, len, rx_valid);
+        for (; len > 0 && rx_valid > 0; len--, rx_valid--)
+        {
+            *buf++ = I2C_GetData(i2c_obj);
+        }
 
-		PRINT_I2C_DBG("i2c_fh_read, len: %d, buf[0]: 0x%x\n", msgs[i2c_drv->msg_read_idx].len, msgs[i2c_drv->msg_read_idx].buf[0]);
+        PRINT_I2C_DBG("i2c_fh_read, len: %d, buf[0]: 0x%x\n", msgs[i2c_drv->msg_read_idx].len, msgs[i2c_drv->msg_read_idx].buf[0]);
 
-		if (len > 0)
-		{
-		    PRINT_I2C_DBG("len > 0\n");
-			i2c_drv->status |= STATUS_READ_IN_PROGRESS;
-			i2c_drv->rx_buf_len = len;
-			i2c_drv->rx_buf = buf;
-			return;
-		}
-		else
-		    i2c_drv->status &= ~STATUS_READ_IN_PROGRESS;
-	}
+        if (len > 0)
+        {
+            PRINT_I2C_DBG("len > 0\n");
+            i2c_drv->status |= STATUS_READ_IN_PROGRESS;
+            i2c_drv->rx_buf_len = len;
+            i2c_drv->rx_buf = buf;
+            return;
+        }
+        else
+            i2c_drv->status &= ~STATUS_READ_IN_PROGRESS;
+    }
 
-	PRINT_I2C_DBG("%s end\n", __func__);
+    PRINT_I2C_DBG("%s end\n", __func__);
 }
 
 /*
@@ -336,44 +336,44 @@ static void fh_i2c_interrupt(int this_irq, void *dev_id)
     struct i2c_driver *i2c_drv = dev_id;
     struct rt_i2c_bus_device *i2c_bus_dev = i2c_drv->i2c_bus_dev;
     struct fh_i2c_obj *i2c_obj = (struct fh_i2c_obj *)i2c_drv->priv;
-	rt_uint32_t stat;
+    rt_uint32_t stat;
 
-	stat = I2C_ClearAndGetInterrupts(i2c_obj);
-	PRINT_I2C_DBG("status: 0x%x, mask: 0x%x\n", stat, I2C_GetInterruptMask(i2c_obj));
+    stat = I2C_ClearAndGetInterrupts(i2c_obj);
+    PRINT_I2C_DBG("status: 0x%x, mask: 0x%x\n", stat, I2C_GetInterruptMask(i2c_obj));
 
-	if (stat & DW_IC_INTR_TX_ABRT)
-	{
-	    PRINT_I2C_DBG("DW_IC_INTR_TX_ABRT\n");
-		i2c_drv->cmd_err |= DW_IC_ERR_TX_ABRT;
-		i2c_drv->status = STATUS_IDLE;
+    if (stat & DW_IC_INTR_TX_ABRT)
+    {
+        PRINT_I2C_DBG("DW_IC_INTR_TX_ABRT\n");
+        i2c_drv->cmd_err |= DW_IC_ERR_TX_ABRT;
+        i2c_drv->status = STATUS_IDLE;
 
-		/*
-		 * Anytime TX_ABRT is set, the contents of the tx/rx
-		 * buffers are flushed.  Make sure to skip them.
-		 */
-		I2C_SetInterruptMask(i2c_obj, 0);
-		goto tx_aborted;
-	}
+        /*
+         * Anytime TX_ABRT is set, the contents of the tx/rx
+         * buffers are flushed.  Make sure to skip them.
+         */
+        I2C_SetInterruptMask(i2c_obj, 0);
+        goto tx_aborted;
+    }
 
-	if (stat & DW_IC_INTR_RX_FULL)
-	{
-		i2c_fh_read(i2c_bus_dev);
-	}
+    if (stat & DW_IC_INTR_RX_FULL)
+    {
+        i2c_fh_read(i2c_bus_dev);
+    }
 
-	if (stat & DW_IC_INTR_TX_EMPTY)
-	{
-		i2c_fh_xfer_msg(i2c_bus_dev);
-	}
+    if (stat & DW_IC_INTR_TX_EMPTY)
+    {
+        i2c_fh_xfer_msg(i2c_bus_dev);
+    }
 
-	/*
-	 * No need to modify or disable the interrupt mask here.
-	 * i2c_fh_xfer_msg() will take care of it according to
-	 * the current transmit status.
-	 */
+    /*
+     * No need to modify or disable the interrupt mask here.
+     * i2c_fh_xfer_msg() will take care of it according to
+     * the current transmit status.
+     */
 
 tx_aborted:
-	if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || i2c_drv->msg_err)
-	    rt_completion_done(&i2c_drv->transfer_completion);
+    if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || i2c_drv->msg_err)
+        rt_completion_done(&i2c_drv->transfer_completion);
 
 }
 
@@ -464,64 +464,64 @@ void rt_hw_i2c_init(void)
 }
 
 static rt_err_t fh_i2c_read_reg(struct rt_i2c_bus_device *fh81_i2c,
-		rt_uint16_t reg, rt_uint8_t *data) {
-	struct rt_i2c_msg msg[2];
-	rt_uint8_t send_buf[2];
-	rt_uint8_t recv_buf[1] = {0};
+        rt_uint16_t reg, rt_uint8_t *data) {
+    struct rt_i2c_msg msg[2];
+    rt_uint8_t send_buf[2];
+    rt_uint8_t recv_buf[1] = {0};
 
-	PRINT_I2C_DBG("%s start\n", __func__);
+    PRINT_I2C_DBG("%s start\n", __func__);
 
-	//  send_buf[0] = ((reg >> 8) & 0xff);
-	send_buf[0] = (reg & 0xFF);
+    //  send_buf[0] = ((reg >> 8) & 0xff);
+    send_buf[0] = (reg & 0xFF);
 
-	msg[0].addr = 0x51;
-	msg[0].flags = RT_I2C_WR;
-	msg[0].len = 1;
-	msg[0].buf = send_buf;
+    msg[0].addr = 0x51;
+    msg[0].flags = RT_I2C_WR;
+    msg[0].len = 1;
+    msg[0].buf = send_buf;
 
-	msg[1].addr = 0x51;
-	msg[1].flags = RT_I2C_RD;
-	msg[1].len = 1;
-	msg[1].buf = recv_buf;
+    msg[1].addr = 0x51;
+    msg[1].flags = RT_I2C_RD;
+    msg[1].len = 1;
+    msg[1].buf = recv_buf;
 
-	rt_i2c_transfer(fh81_i2c, msg, 2);
-	*data = recv_buf[0];
-	return RT_EOK;
+    rt_i2c_transfer(fh81_i2c, msg, 2);
+    *data = recv_buf[0];
+    return RT_EOK;
 }
 static rt_err_t fh_i2c_write_reg(struct rt_i2c_bus_device *fh81_i2c,
-		rt_uint16_t reg, rt_uint8_t data) {
-	struct rt_i2c_msg msg;
-	rt_uint8_t send_buf[3];
+        rt_uint16_t reg, rt_uint8_t data) {
+    struct rt_i2c_msg msg;
+    rt_uint8_t send_buf[3];
 
-	PRINT_I2C_DBG("%s start\n", __func__);
+    PRINT_I2C_DBG("%s start\n", __func__);
 
-	// send_buf[0] = ((reg >> 8) & 0xff);
-	send_buf[1] = (reg & 0xFF);
-	send_buf[2] = data;
+    // send_buf[0] = ((reg >> 8) & 0xff);
+    send_buf[1] = (reg & 0xFF);
+    send_buf[2] = data;
 
-	msg.addr = 0x51;
-	msg.flags = RT_I2C_WR;
-	msg.len = 2;
-	msg.buf = send_buf;
+    msg.addr = 0x51;
+    msg.flags = RT_I2C_WR;
+    msg.len = 2;
+    msg.buf = send_buf;
 
-	rt_i2c_transfer(fh81_i2c, &msg, 1);
-	PRINT_I2C_DBG("%s end\n", __func__);
-	return RT_EOK;
+    rt_i2c_transfer(fh81_i2c, &msg, 1);
+    PRINT_I2C_DBG("%s end\n", __func__);
+    return RT_EOK;
 }
 
 void i2c_test_sensor() {
-	struct rt_i2c_bus_device *fh81_i2c;
-	struct rt_i2c_msg msg[2];
-	rt_uint8_t data[1] = { 0x00 };
+    struct rt_i2c_bus_device *fh81_i2c;
+    struct rt_i2c_msg msg[2];
+    rt_uint8_t data[1] = { 0x00 };
 
-	fh81_i2c = rt_i2c_bus_device_find("i2c1");
+    fh81_i2c = rt_i2c_bus_device_find("i2c1");
 
-	fh_i2c_write_reg(fh81_i2c, 0x04, 0x02);
+    fh_i2c_write_reg(fh81_i2c, 0x04, 0x02);
 
-	fh_i2c_read_reg(fh81_i2c, 0x02, data);
+    fh_i2c_read_reg(fh81_i2c, 0x02, data);
 
-	rt_kprintf("data read from 0x3038 is 0x%x\r\n", data[0]);
-	PRINT_I2C_DBG("%s end\n", __func__);
+    rt_kprintf("data read from 0x3038 is 0x%x\r\n", data[0]);
+    PRINT_I2C_DBG("%s end\n", __func__);
 }
 #ifdef RT_USING_FINSH
 #include 
diff --git a/bsp/fh8620/drivers/i2c.h b/bsp/fh8620/drivers/i2c.h
index 9046bd81cb..15e4d7e8f2 100644
--- a/bsp/fh8620/drivers/i2c.h
+++ b/bsp/fh8620/drivers/i2c.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/fh8620/drivers/interrupt.c b/bsp/fh8620/drivers/interrupt.c
index ab522fab70..4cb250d8e5 100644
--- a/bsp/fh8620/drivers/interrupt.c
+++ b/bsp/fh8620/drivers/interrupt.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -105,10 +105,10 @@ void rt_hw_interrupt_init(void)
 {
     rt_int32_t i;
     register rt_uint32_t idx;
-	fh_intc *p = (fh_intc *)INTC_REG_BASE;
+    fh_intc *p = (fh_intc *)INTC_REG_BASE;
 
 
-	ictl_close_all_isr(p);
+    ictl_close_all_isr(p);
     /* init exceptions table */
     for(idx=0; idx < MAX_HANDLERS; idx++)
     {
@@ -137,27 +137,27 @@ void rt_hw_interrupt_init(void)
 void rt_hw_interrupt_mask(int irq)
 {
 
-	fh_intc *p = (fh_intc *)INTC_REG_BASE;
+    fh_intc *p = (fh_intc *)INTC_REG_BASE;
     /* Disable irq on AIC */
-	ictl_mask_isr(p,irq);
+    ictl_mask_isr(p,irq);
 
-//	if (irq < 32)
-//    	p->IRQ_EN_L &= ~(1 << irq);
-//	else
-//		p->IRQ_EN_H &= ~(1 << (irq - 32));
+//  if (irq < 32)
+//      p->IRQ_EN_L &= ~(1 << irq);
+//  else
+//      p->IRQ_EN_H &= ~(1 << (irq - 32));
 }
 
 
 void rt_hw_interrupt_umask(int irq)
 {
 
-	fh_intc *p = (fh_intc *)INTC_REG_BASE;
+    fh_intc *p = (fh_intc *)INTC_REG_BASE;
     /* Enable irq on AIC */
-	ictl_unmask_isr(p,irq);
+    ictl_unmask_isr(p,irq);
 //    if (irq < 32)
-//    	p->IRQ_EN_L |= 1 << irq;
-//	else
-//		p->IRQ_EN_H |= 1 << (irq - 32);
+//      p->IRQ_EN_L |= 1 << irq;
+//  else
+//      p->IRQ_EN_H |= 1 << (irq - 32);
 }
 
 /**
@@ -168,7 +168,7 @@ void rt_hw_interrupt_umask(int irq)
  * @param name the interrupt name
  * @return old handler
  */
-rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, 
+rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
                                     void *param, const char *name)
 {
     rt_isr_handler_t old_handler = RT_NULL;
@@ -182,7 +182,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
             irq_desc[vector].param = param;
 #ifdef RT_USING_INTERRUPT_INFO
             rt_snprintf(irq_desc[vector].name, RT_NAME_MAX - 1, "%s", name);
-			irq_desc[vector].counter = 0;
+            irq_desc[vector].counter = 0;
 #endif
         }
     }
@@ -195,7 +195,7 @@ void list_irq(void)
 {
 
 #ifdef RT_USING_INTERRUPT_INFO
-	int irq;
+    int irq;
     rt_kprintf("number\tcount\tname\n");
     for (irq = 0; irq < MAX_HANDLERS; irq++)
     {
diff --git a/bsp/fh8620/drivers/interrupt.h b/bsp/fh8620/drivers/interrupt.h
index fd4283b95c..6f62b0d95a 100644
--- a/bsp/fh8620/drivers/interrupt.h
+++ b/bsp/fh8620/drivers/interrupt.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -35,6 +35,6 @@ void rt_hw_interrupt_init(void);
 void rt_hw_interrupt_mask(int irq);
 void rt_hw_interrupt_umask(int irq);
 rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
-		void *param, const char *name);
+        void *param, const char *name);
 
 #endif /* INTERRUPT_H_ */
diff --git a/bsp/fh8620/drivers/mem_process.c b/bsp/fh8620/drivers/mem_process.c
index 4ef7e2d599..e1424bd6ac 100644
--- a/bsp/fh8620/drivers/mem_process.c
+++ b/bsp/fh8620/drivers/mem_process.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -28,52 +28,52 @@
 #include 
 #include "mmu.h"
 
-#define CHANGLINE_SIZE		(1)
+#define CHANGLINE_SIZE      (1)
 
 //#define FH_DBG_MEM_PROCESS
 
 #ifdef FH_DBG_MEM_PROCESS
 void mem_input(rt_uint32_t t_addr, rt_uint32_t t_size, rt_uint8_t t_value) {
 
-	rt_kprintf("mem process add:%x \tsize:%x\tvalue:%x\n", t_addr, t_size,
-			t_value);
+    rt_kprintf("mem process add:%x \tsize:%x\tvalue:%x\n", t_addr, t_size,
+            t_value);
 
-	rt_memset((void *) t_addr, t_value, t_size);
+    rt_memset((void *) t_addr, t_value, t_size);
 
-	mmu_clean_invalidated_dcache(t_addr, t_size);
+    mmu_clean_invalidated_dcache(t_addr, t_size);
 
 }
 
 void mem_output(rt_uint32_t t_addr, rt_uint32_t t_size) {
 
-	rt_uint32_t i;
-	rt_uint32_t cnt = 0;
-	rt_uint32_t value;
-	rt_uint32_t addr, size;
+    rt_uint32_t i;
+    rt_uint32_t cnt = 0;
+    rt_uint32_t value;
+    rt_uint32_t addr, size;
 
-	addr = t_addr;
-	if (t_size % 4) {
-		rt_kprintf("mem must be alligned\n");
-	}
-	size = t_size / 4;
-	rt_int32_t *p = (rt_uint32_t *) t_addr;
+    addr = t_addr;
+    if (t_size % 4) {
+        rt_kprintf("mem must be alligned\n");
+    }
+    size = t_size / 4;
+    rt_int32_t *p = (rt_uint32_t *) t_addr;
 
-	//mmu_clean_invalidated_dcache(addr,t_size);
-	rt_kprintf("mem process add:0x%x \tsize:0x%x\n", addr, t_size);
-	rt_kprintf("0x%08x:", addr);
-	for (i = 0; i < size; i++) {
-		value = *p++;
-		if ((cnt / CHANGLINE_SIZE) && (cnt % CHANGLINE_SIZE == 0)) {
-			rt_kprintf("\n");
-		}
-		if (cnt / CHANGLINE_SIZE && (cnt % CHANGLINE_SIZE) == 0) {
-			rt_kprintf("0x%08x:", addr + i * 4);
-		}
-		rt_kprintf("\t%08x", value);
-		cnt++;
+    //mmu_clean_invalidated_dcache(addr,t_size);
+    rt_kprintf("mem process add:0x%x \tsize:0x%x\n", addr, t_size);
+    rt_kprintf("0x%08x:", addr);
+    for (i = 0; i < size; i++) {
+        value = *p++;
+        if ((cnt / CHANGLINE_SIZE) && (cnt % CHANGLINE_SIZE == 0)) {
+            rt_kprintf("\n");
+        }
+        if (cnt / CHANGLINE_SIZE && (cnt % CHANGLINE_SIZE) == 0) {
+            rt_kprintf("0x%08x:", addr + i * 4);
+        }
+        rt_kprintf("\t%08x", value);
+        cnt++;
 
-	}
-	rt_kprintf("\n");
+    }
+    rt_kprintf("\n");
 
 }
 #endif
diff --git a/bsp/fh8620/drivers/mmc.c b/bsp/fh8620/drivers/mmc.c
index 399efd5829..1b10974975 100644
--- a/bsp/fh8620/drivers/mmc.c
+++ b/bsp/fh8620/drivers/mmc.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/fh8620/drivers/mmc.h b/bsp/fh8620/drivers/mmc.h
index 5de1f5643f..1a0a6c66dc 100644
--- a/bsp/fh8620/drivers/mmc.h
+++ b/bsp/fh8620/drivers/mmc.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/fh8620/drivers/pwm.c b/bsp/fh8620/drivers/pwm.c
index 58c9703d78..497527a2f4 100644
--- a/bsp/fh8620/drivers/pwm.c
+++ b/bsp/fh8620/drivers/pwm.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -193,7 +193,7 @@ int fh_pwm_probe(void *priv_data)
         rt_kprintf("ERROR: %s rt_device calloc failed\n", __func__);
         return -RT_ENOMEM;
     }
-    
+
     pwm_dev->user_data = &pwm_drv;
     pwm_dev->open =fh_pwm_open;
     pwm_dev->close = fh_pwm_close;
diff --git a/bsp/fh8620/drivers/pwm.h b/bsp/fh8620/drivers/pwm.h
index 3693ab7973..b40fa89ff9 100644
--- a/bsp/fh8620/drivers/pwm.h
+++ b/bsp/fh8620/drivers/pwm.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef PWM_H_
 #define PWM_H_
 
diff --git a/bsp/fh8620/drivers/sadc.c b/bsp/fh8620/drivers/sadc.c
index b1654d295c..403b92cd71 100644
--- a/bsp/fh8620/drivers/sadc.c
+++ b/bsp/fh8620/drivers/sadc.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -50,123 +50,123 @@
 
 
 
-#define __raw_writeb(v,a)	( *(volatile unsigned char  *)(a) = (v))
-#define __raw_writew(v,a)	( *(volatile unsigned short *)(a) = (v))
-#define __raw_writel(v,a)	( *(volatile unsigned int   *)(a) = (v))
+#define __raw_writeb(v,a)   ( *(volatile unsigned char  *)(a) = (v))
+#define __raw_writew(v,a)   ( *(volatile unsigned short *)(a) = (v))
+#define __raw_writel(v,a)   ( *(volatile unsigned int   *)(a) = (v))
 
-#define __raw_readb(a)		( *(volatile unsigned char   *)(a))
-#define __raw_readw(a)		( *(volatile unsigned short  *)(a))
-#define __raw_readl(a)		( *(volatile unsigned int    *)(a))
+#define __raw_readb(a)      ( *(volatile unsigned char   *)(a))
+#define __raw_readw(a)      ( *(volatile unsigned short  *)(a))
+#define __raw_readl(a)      ( *(volatile unsigned int    *)(a))
 
 
 #define wrap_readl(wrap, name) \
-	__raw_readl(&(((struct wrap_sadc_reg *)wrap->regs)->name))
+    __raw_readl(&(((struct wrap_sadc_reg *)wrap->regs)->name))
 
 #define wrap_writel(wrap, name, val) \
-	__raw_writel((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
+    __raw_writel((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
 
 #define wrap_readw(wrap, name) \
-	__raw_readw(&(((struct wrap_sadc_reg *)wrap->regs)->name))
+    __raw_readw(&(((struct wrap_sadc_reg *)wrap->regs)->name))
 
 #define wrap_writew(wrap, name, val) \
-	__raw_writew((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
+    __raw_writew((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
 
 #define wrap_readb(wrap, name) \
-	__raw_readb(&(((struct wrap_sadc_reg *)wrap->regs)->name))
+    __raw_readb(&(((struct wrap_sadc_reg *)wrap->regs)->name))
 
 #define wrap_writeb(wrap, name, val) \
-	__raw_writeb((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
+    __raw_writeb((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
 
 
 
-#define IOCTL_GET_SADC_DATA 	1
-#define IOCTL_SADC_POWER_DOWN 	0xff
-#define SADC_WRAP_BASE			(0xf1200000)
-#define SADC_IRQn         		(23)
-#define SADC_MAX_CONTROLLER		(1)
-#define SADC_STATUS_COLESD		(0)
-#define SADC_STATUS_OPEN		(1)
+#define IOCTL_GET_SADC_DATA     1
+#define IOCTL_SADC_POWER_DOWN   0xff
+#define SADC_WRAP_BASE          (0xf1200000)
+#define SADC_IRQn               (23)
+#define SADC_MAX_CONTROLLER     (1)
+#define SADC_STATUS_COLESD      (0)
+#define SADC_STATUS_OPEN        (1)
 
 
 
 rt_err_t fh_sadc_isr_read_data(struct wrap_sadc_obj *sadc, rt_uint32_t channel,
-		rt_uint16_t *buf) {
-	rt_uint32_t xainsel = 1 << channel;
-	rt_uint32_t xversel = 0;
-	rt_uint32_t xpwdb = 1;
-	//cnt
-	rt_uint32_t sel2sam_pre_cnt = 2;
-	rt_uint32_t sam_cnt = 2;
-	rt_uint32_t sam2sel_pos_cnt = 2;
-	//time out
-	rt_uint32_t eoc_tos = 0xff;
-	rt_uint32_t eoc_toe = 0xff;
-	rt_uint32_t time_out = 0xffff;
-	//set isr en..
-	rt_uint32_t sadc_isr = 0x01;
-	//start
-	rt_uint32_t sadc_cmd = 0x01;
-	//get data
-	rt_uint32_t temp_data = 0;
-	rt_err_t ret;
+        rt_uint16_t *buf) {
+    rt_uint32_t xainsel = 1 << channel;
+    rt_uint32_t xversel = 0;
+    rt_uint32_t xpwdb = 1;
+    //cnt
+    rt_uint32_t sel2sam_pre_cnt = 2;
+    rt_uint32_t sam_cnt = 2;
+    rt_uint32_t sam2sel_pos_cnt = 2;
+    //time out
+    rt_uint32_t eoc_tos = 0xff;
+    rt_uint32_t eoc_toe = 0xff;
+    rt_uint32_t time_out = 0xffff;
+    //set isr en..
+    rt_uint32_t sadc_isr = 0x01;
+    //start
+    rt_uint32_t sadc_cmd = 0x01;
+    //get data
+    rt_uint32_t temp_data = 0;
+    rt_err_t ret;
 
 
-	//control...
-	wrap_writel(sadc, sadc_control, xainsel | (xversel << 8) | (xpwdb << 12));
+    //control...
+    wrap_writel(sadc, sadc_control, xainsel | (xversel << 8) | (xpwdb << 12));
 
 
-	wrap_writel(sadc, sadc_cnt,
-			sel2sam_pre_cnt | (sam_cnt << 8) | (sam2sel_pos_cnt << 16));
+    wrap_writel(sadc, sadc_cnt,
+            sel2sam_pre_cnt | (sam_cnt << 8) | (sam2sel_pos_cnt << 16));
 
-	wrap_writel(sadc, sadc_timeout,
-			eoc_tos | (eoc_toe << 8) | (time_out << 16));
+    wrap_writel(sadc, sadc_timeout,
+            eoc_tos | (eoc_toe << 8) | (time_out << 16));
 
-	wrap_writel(sadc, sadc_ier, sadc_isr);
+    wrap_writel(sadc, sadc_ier, sadc_isr);
 
-	wrap_writel(sadc, sadc_cmd, sadc_cmd);
+    wrap_writel(sadc, sadc_cmd, sadc_cmd);
 
 
    // ret = rt_completion_wait(&sadc->completion, RT_TICK_PER_SECOND / 2);
 
-	ret = rt_sem_take(&sadc->completion, 5000);
-	if(ret != RT_EOK)
-		return ret;
+    ret = rt_sem_take(&sadc->completion, 5000);
+    if(ret != RT_EOK)
+        return ret;
 
-	switch (channel) {
-	case 0:
-	case 1:
-		//read channel 0 1
-		temp_data = wrap_readl(sadc, sadc_dout0);
-		break;
+    switch (channel) {
+    case 0:
+    case 1:
+        //read channel 0 1
+        temp_data = wrap_readl(sadc, sadc_dout0);
+        break;
 
-	case 2:
-	case 3:
-		//read channel 2 3
-		temp_data = wrap_readl(sadc, sadc_dout1);
-		break;
+    case 2:
+    case 3:
+        //read channel 2 3
+        temp_data = wrap_readl(sadc, sadc_dout1);
+        break;
 
-	case 4:
-	case 5:
-		//read channel 4 5
-		temp_data = wrap_readl(sadc, sadc_dout2);
-		break;
+    case 4:
+    case 5:
+        //read channel 4 5
+        temp_data = wrap_readl(sadc, sadc_dout2);
+        break;
 
-	case 6:
-	case 7:
-		//read channel 6 7
-		temp_data = wrap_readl(sadc, sadc_dout3);
-		break;
-	default:
-		break;
-	}
-	if (channel % 2) {
-		//read low 16bit
-		*buf = (rt_uint16_t) (temp_data & 0xffff);
-	} else {
-		//read high 16bit
-		*buf = (rt_uint16_t) (temp_data >> 16);
-	}
-	return RT_EOK;
+    case 6:
+    case 7:
+        //read channel 6 7
+        temp_data = wrap_readl(sadc, sadc_dout3);
+        break;
+    default:
+        break;
+    }
+    if (channel % 2) {
+        //read low 16bit
+        *buf = (rt_uint16_t) (temp_data & 0xffff);
+    } else {
+        //read high 16bit
+        *buf = (rt_uint16_t) (temp_data >> 16);
+    }
+    return RT_EOK;
 
 }
 
@@ -204,41 +204,41 @@ static rt_err_t fh_sadc_close(rt_device_t dev)
 static rt_err_t fh_sadc_ioctl(rt_device_t dev, int cmd, void *arg)
 {
 
-	rt_uint32_t control_reg;
-	struct wrap_sadc_obj *sadc_pri =(struct wrap_sadc_obj *)dev->user_data;
-	rt_uint32_t ad_data;
-	rt_uint16_t ad_raw_data;
+    rt_uint32_t control_reg;
+    struct wrap_sadc_obj *sadc_pri =(struct wrap_sadc_obj *)dev->user_data;
+    rt_uint32_t ad_data;
+    rt_uint16_t ad_raw_data;
 
-	SADC_INFO *sadc_info = (SADC_INFO *)arg;
-	rt_err_t ret;
-	switch(cmd){
-	case SADC_CMD_READ_RAW_DATA:
-		ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data);
-		if(ret != RT_EOK)
-			return ret;
-		sadc_info->sadc_data = ad_raw_data;
+    SADC_INFO *sadc_info = (SADC_INFO *)arg;
+    rt_err_t ret;
+    switch(cmd){
+    case SADC_CMD_READ_RAW_DATA:
+        ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data);
+        if(ret != RT_EOK)
+            return ret;
+        sadc_info->sadc_data = ad_raw_data;
 
-		break;
-	case SADC_CMD_READ_VOLT:
-		ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data);
-		if(ret != RT_EOK)
-			return ret;
+        break;
+    case SADC_CMD_READ_VOLT:
+        ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data);
+        if(ret != RT_EOK)
+            return ret;
 
-		ad_data = ad_raw_data * SADC_REF;
-		ad_data /= SADC_MAX_AD_VALUE;
-		sadc_info->sadc_data = ad_data;
+        ad_data = ad_raw_data * SADC_REF;
+        ad_data /= SADC_MAX_AD_VALUE;
+        sadc_info->sadc_data = ad_data;
 
-		break;
-	case SADC_CMD_DISABLE:
-		control_reg = wrap_readl(sadc_pri, sadc_control);
-		control_reg &= ~(1 << 12);
-		wrap_writel(sadc_pri, sadc_control, control_reg);
+        break;
+    case SADC_CMD_DISABLE:
+        control_reg = wrap_readl(sadc_pri, sadc_control);
+        control_reg &= ~(1 << 12);
+        wrap_writel(sadc_pri, sadc_control, control_reg);
 
-		break;
-	default :
-		rt_kprintf("wrong para...\n");
-		return RT_EIO;
-	}
+        break;
+    default :
+        rt_kprintf("wrong para...\n");
+        return RT_EIO;
+    }
 
     return RT_EOK;
 }
@@ -249,25 +249,25 @@ static void fh_sadc_interrupt(int irq, void *param)
 {
 
     rt_uint32_t isr_status;
-	struct wrap_sadc_obj *sadc = (struct wrap_sadc_obj *) param;
+    struct wrap_sadc_obj *sadc = (struct wrap_sadc_obj *) param;
 
-	isr_status = wrap_readl(sadc, sadc_int_status);
+    isr_status = wrap_readl(sadc, sadc_int_status);
 
-	if (isr_status & 0x01) {
-		//close isr
-		rt_uint32_t sadc_isr = 0x00;
+    if (isr_status & 0x01) {
+        //close isr
+        rt_uint32_t sadc_isr = 0x00;
 
-		wrap_writel(sadc, sadc_ier, sadc_isr);
-		//clear status..
+        wrap_writel(sadc, sadc_ier, sadc_isr);
+        //clear status..
 
-		wrap_writel(sadc, sadc_int_status, isr_status);
+        wrap_writel(sadc, sadc_int_status, isr_status);
 
-		rt_sem_release(&sadc->completion);
-	   // rt_completion_done(&sadc->completion);
-	} else {
-		//add error handle process
-		rt_kprintf("sadc maybe error!\n");
-	}
+        rt_sem_release(&sadc->completion);
+       // rt_completion_done(&sadc->completion);
+    } else {
+        //add error handle process
+        rt_kprintf("sadc maybe error!\n");
+    }
 
 
 }
@@ -282,13 +282,13 @@ int fh_sadc_probe(void *priv_data)
     //caution this is a read only data...if the driver want to use.malloc and copy it..
     struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data;
     if(sadc_obj->init_flag == SADC_INIT_ALREADY)
-     	return RT_EFULL;
+        return RT_EFULL;
 
 
     //malloc a rt device..
     sadc_dev = RT_KERNEL_MALLOC(sizeof(struct rt_device));
     if(!sadc_dev){
-    	return RT_ENOMEM;
+        return RT_ENOMEM;
     }
     rt_memset(sadc_dev, 0, sizeof(struct rt_device));
     PRINT_SADC_DBG("id:%d,\treg:%x,\tirq:%d\n",sadc_obj->id,(rt_uint32_t)sadc_obj->regs,sadc_obj->irq_no);
@@ -304,8 +304,8 @@ int fh_sadc_probe(void *priv_data)
     struct wrap_sadc_obj *sadc_pri = RT_KERNEL_MALLOC(sizeof(struct wrap_sadc_obj));
     if(!sadc_pri){
 
-    	RT_KERNEL_FREE(sadc_dev);
-    	return RT_ENOMEM;
+        RT_KERNEL_FREE(sadc_dev);
+        return RT_ENOMEM;
     }
 
     //copy platform data to pri data..
@@ -349,23 +349,23 @@ int fh_sadc_probe(void *priv_data)
 int fh_sadc_exit(void *priv_data)
 {
 
-	PRINT_SADC_DBG("%s\n",__func__);
-	struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data;
+    PRINT_SADC_DBG("%s\n",__func__);
+    struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data;
 
-	struct wrap_sadc_obj *sadc_pri = sadc_obj->rt_dev->user_data;
-	//release sem;
-	rt_sem_detach(&sadc_pri->completion);
-	//sadc_pri->completion = RT_NULL;
+    struct wrap_sadc_obj *sadc_pri = sadc_obj->rt_dev->user_data;
+    //release sem;
+    rt_sem_detach(&sadc_pri->completion);
+    //sadc_pri->completion = RT_NULL;
 
-	//release lock;
-	rt_mutex_detach(&sadc_pri->lock);
+    //release lock;
+    rt_mutex_detach(&sadc_pri->lock);
 
-	RT_KERNEL_FREE(sadc_obj->rt_dev->user_data);
+    RT_KERNEL_FREE(sadc_obj->rt_dev->user_data);
 
 
-	sadc_obj->rt_dev->user_data = RT_NULL;
-	RT_KERNEL_FREE(sadc_obj->rt_dev);
-	sadc_obj->rt_dev = RT_NULL;
+    sadc_obj->rt_dev->user_data = RT_NULL;
+    RT_KERNEL_FREE(sadc_obj->rt_dev);
+    sadc_obj->rt_dev = RT_NULL;
 
     return 0;
 }
@@ -386,23 +386,23 @@ void rt_hw_sadc_init(void)
 #ifdef FH_TEST_SADC
 int fh_sadc_test(void){
 
-	rt_device_t sadc_dev;
-	SADC_INFO info;
-	info.channel = 0;
-	info.sadc_data = 0;
-	sadc_dev = rt_device_find("sadc");
-	if(!sadc_dev){
-		rt_kprintf("cann't find the sadc dev\n");
-	}
-	sadc_dev->init(sadc_dev);
-	sadc_dev->open(sadc_dev,0);
-	while(1)
-	{
-		sadc_dev->control(sadc_dev,SADC_CMD_READ_VOLT,&info);
-		rt_kprintf("channel:%d,volt:%dmv\n",info.channel,info.sadc_data);
-	}
+    rt_device_t sadc_dev;
+    SADC_INFO info;
+    info.channel = 0;
+    info.sadc_data = 0;
+    sadc_dev = rt_device_find("sadc");
+    if(!sadc_dev){
+        rt_kprintf("cann't find the sadc dev\n");
+    }
+    sadc_dev->init(sadc_dev);
+    sadc_dev->open(sadc_dev,0);
+    while(1)
+    {
+        sadc_dev->control(sadc_dev,SADC_CMD_READ_VOLT,&info);
+        rt_kprintf("channel:%d,volt:%dmv\n",info.channel,info.sadc_data);
+    }
 
-	return 0;
+    return 0;
 }
 #endif
 
diff --git a/bsp/fh8620/drivers/sadc.h b/bsp/fh8620/drivers/sadc.h
index d28ed9ba24..afe168bd2e 100644
--- a/bsp/fh8620/drivers/sadc.h
+++ b/bsp/fh8620/drivers/sadc.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef SADC_H_
 #define SADC_H_
 
@@ -33,57 +33,57 @@
 
 /****************************************************************************
  * #define section
- *	add constant #define here if any
+ *  add constant #define here if any
  ***************************************************************************/
 //#define FH_SADC_PROC_FILE    "driver/sadc"
-#define MAX_CHANNEL_NO		(8)
-#define SADC_REF			(3300)
-#define SADC_MAX_AD_VALUE	(0x3ff)
-#define LOOP_MODE			(0x55)
-#define ISR_MODE			(0xAA)
+#define MAX_CHANNEL_NO      (8)
+#define SADC_REF            (3300)
+#define SADC_MAX_AD_VALUE   (0x3ff)
+#define LOOP_MODE           (0x55)
+#define ISR_MODE            (0xAA)
 
 
-#define SADC_INIT_ALREADY		(0x33)
-#define SADC_INIT_NOT_YET		(0)
+#define SADC_INIT_ALREADY       (0x33)
+#define SADC_INIT_NOT_YET       (0)
 
 
-#define SADC_CMD_READ_RAW_DATA			(0x22)
-#define SADC_CMD_READ_VOLT				(0x33)
-#define SADC_CMD_DISABLE				(0x44)
+#define SADC_CMD_READ_RAW_DATA          (0x22)
+#define SADC_CMD_READ_VOLT              (0x33)
+#define SADC_CMD_DISABLE                (0x44)
 
 /****************************************************************************
  * ADT section
- *	add Abstract Data Type definition here
+ *  add Abstract Data Type definition here
  ***************************************************************************/
 
 struct wrap_sadc_reg {
-	rt_uint32_t sadc_cmd;
-	rt_uint32_t sadc_control;
-	rt_uint32_t sadc_ier;
-	rt_uint32_t sadc_int_status;
-	rt_uint32_t sadc_dout0;
-	rt_uint32_t sadc_dout1;
-	rt_uint32_t sadc_dout2;
-	rt_uint32_t sadc_dout3;
-	rt_uint32_t sadc_debuge0;
-	rt_uint32_t sadc_status;
-	rt_uint32_t sadc_cnt;
-	rt_uint32_t sadc_timeout;
+    rt_uint32_t sadc_cmd;
+    rt_uint32_t sadc_control;
+    rt_uint32_t sadc_ier;
+    rt_uint32_t sadc_int_status;
+    rt_uint32_t sadc_dout0;
+    rt_uint32_t sadc_dout1;
+    rt_uint32_t sadc_dout2;
+    rt_uint32_t sadc_dout3;
+    rt_uint32_t sadc_debuge0;
+    rt_uint32_t sadc_status;
+    rt_uint32_t sadc_cnt;
+    rt_uint32_t sadc_timeout;
 };
 
 struct wrap_sadc_obj {
-	rt_uint32_t id;
-	void *regs;
-	rt_uint32_t irq_no;
-	rt_uint32_t init_flag;
-	rt_uint32_t active_channel_no;
-	rt_uint32_t active_channel_status;
-	rt_uint16_t channel_data[MAX_CHANNEL_NO];
-	rt_uint32_t error_rec;
-	rt_uint32_t en_isr;
-	rt_uint32_t sample_mode;
-	struct rt_mutex lock;
-	struct rt_semaphore completion;
+    rt_uint32_t id;
+    void *regs;
+    rt_uint32_t irq_no;
+    rt_uint32_t init_flag;
+    rt_uint32_t active_channel_no;
+    rt_uint32_t active_channel_status;
+    rt_uint16_t channel_data[MAX_CHANNEL_NO];
+    rt_uint32_t error_rec;
+    rt_uint32_t en_isr;
+    rt_uint32_t sample_mode;
+    struct rt_mutex lock;
+    struct rt_semaphore completion;
 
     //bind to the rtdev..
     rt_device_t rt_dev;
@@ -91,8 +91,8 @@ struct wrap_sadc_obj {
 };
 
 typedef struct{
-	rt_uint32_t channel;
-	rt_uint32_t sadc_data;
+    rt_uint32_t channel;
+    rt_uint32_t sadc_data;
 }SADC_INFO;
 
 
@@ -102,7 +102,7 @@ typedef struct{
 
 /****************************************************************************
  *  section
- *	add function prototype here if any
+ *  add function prototype here if any
  ***************************************************************************/
 void rt_hw_sadc_init(void);
 #endif
diff --git a/bsp/fh8620/drivers/spi_fh_adapt.c b/bsp/fh8620/drivers/spi_fh_adapt.c
index 291fe9a4f9..437b30d1c9 100644
--- a/bsp/fh8620/drivers/spi_fh_adapt.c
+++ b/bsp/fh8620/drivers/spi_fh_adapt.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
  /*
  * spi_fh_adapt.c
  *
@@ -60,9 +60,9 @@
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
 
 
-#define WX_MANU_ID		0xEF
+#define WX_MANU_ID      0xEF
 #define AT_MANU_ID      0x1F /* atmel */
-#define SST_MANU_ID		0xBF
+#define SST_MANU_ID     0xBF
 #define GD_MANU_ID      0xC8
 
 
@@ -70,50 +70,50 @@
 #define SPI_ADAPT_DEBUG
 #ifdef SPI_ADAPT_DEBUG
 
-#define CMD_JEDEC_ID 			0x9f
+#define CMD_JEDEC_ID            0x9f
 
 
-#define FH_SPI_ADAPT_DEBUG(fmt, args...)	    		\
-			rt_kprintf(fmt,##args);
+#define FH_SPI_ADAPT_DEBUG(fmt, args...)                \
+            rt_kprintf(fmt,##args);
 #else
 #define FH_SPI_ADAPT_DEBUG(fmt, args...)
 #endif
 struct fh_flash_id{
-	unsigned char id;
-	rt_err_t (*fh_flash_init)(struct flash_platform_data *plat_flash);
-	char *name;
+    unsigned char id;
+    rt_err_t (*fh_flash_init)(struct flash_platform_data *plat_flash);
+    char *name;
 };
 const struct fh_flash_id id_map[] = {
 
 #ifdef RT_USING_W25QXX
-		WX_MANU_ID,w25qxx_init,"winbond",
+        WX_MANU_ID,w25qxx_init,"winbond",
 #endif
 
 #ifdef RT_USING_AT45DBXX
-		AT_MANU_ID,at45dbxx_init,"atmel",
+        AT_MANU_ID,at45dbxx_init,"atmel",
 #endif
 
 #ifdef RT_USING_SST25VFXX
-		SST_MANU_ID,sst25vfxx_init,"SST",
+        SST_MANU_ID,sst25vfxx_init,"SST",
 #endif
 
 #ifdef RT_USING_GD
-		GD_MANU_ID,gd_init,"GD",
+        GD_MANU_ID,gd_init,"GD",
 #endif
 
 };
 
 
 struct fh_flash_id * fh_flash_check_id_map(unsigned char id){
-	struct fh_flash_id *p_map = RT_NULL;
-	unsigned int i;
-	for (i = 0; i < ARRAY_SIZE(id_map); i++) {
-		p_map = (struct fh_flash_id *)&id_map[i];
-		if (p_map->id == id){
-			return p_map;
-		}
-	}
-	return RT_NULL;
+    struct fh_flash_id *p_map = RT_NULL;
+    unsigned int i;
+    for (i = 0; i < ARRAY_SIZE(id_map); i++) {
+        p_map = (struct fh_flash_id *)&id_map[i];
+        if (p_map->id == id){
+            return p_map;
+        }
+    }
+    return RT_NULL;
 }
 
 
@@ -144,50 +144,50 @@ int fh_flash_adapt_probe(void *priv_data)
 
     /* init flash */
 
-	rt_uint8_t cmd;
-	rt_uint8_t id_recv[3];
-	uint16_t memory_type_capacity;
-	rt_err_t ret;
+    rt_uint8_t cmd;
+    rt_uint8_t id_recv[3];
+    uint16_t memory_type_capacity;
+    rt_err_t ret;
 
-	cmd = 0xFF; /* reset SPI FLASH, cancel all cmd in processing. */
-	rt_spi_send(rt_spi_device, &cmd, 1);
-	/* read flash id */
-	cmd = CMD_JEDEC_ID;
-	rt_spi_send_then_recv(rt_spi_device, &cmd, 1, id_recv, 3);
+    cmd = 0xFF; /* reset SPI FLASH, cancel all cmd in processing. */
+    rt_spi_send(rt_spi_device, &cmd, 1);
+    /* read flash id */
+    cmd = CMD_JEDEC_ID;
+    rt_spi_send_then_recv(rt_spi_device, &cmd, 1, id_recv, 3);
 
-	//if the flash is already connect.
-	if(id_recv[0] != 0xff){
-		flash_model =fh_flash_check_id_map(id_recv[0]);
-		if(flash_model){
-			ret = flash_model->fh_flash_init(plat_flash);
-			if(ret != RT_EOK){
-				rt_kprintf("flash:%s init error\n",flash_model->name);
-				rt_kprintf("use default flash ops..\n");
-				//flash_model->fh_flash_adapt_init =flash_default_init;
-				ret = flash_default_init(plat_flash);
-			}
-		}
-		else{
-			rt_kprintf(
-					"use default flash ops...\nunrecognized flash id is :%02X %02X %02X\n",
-					id_recv[0], id_recv[1], id_recv[2]);
-			ret = flash_default_init(plat_flash);
+    //if the flash is already connect.
+    if(id_recv[0] != 0xff){
+        flash_model =fh_flash_check_id_map(id_recv[0]);
+        if(flash_model){
+            ret = flash_model->fh_flash_init(plat_flash);
+            if(ret != RT_EOK){
+                rt_kprintf("flash:%s init error\n",flash_model->name);
+                rt_kprintf("use default flash ops..\n");
+                //flash_model->fh_flash_adapt_init =flash_default_init;
+                ret = flash_default_init(plat_flash);
+            }
+        }
+        else{
+            rt_kprintf(
+                    "use default flash ops...\nunrecognized flash id is :%02X %02X %02X\n",
+                    id_recv[0], id_recv[1], id_recv[2]);
+            ret = flash_default_init(plat_flash);
 
-		}
+        }
 
-		int i;
-		for(i=0; inr_parts; i++)
-		{
-		    fh_spi_partition_register(plat_flash->flash_name, &plat_flash->parts[i]);
-		}
+        int i;
+        for(i=0; inr_parts; i++)
+        {
+            fh_spi_partition_register(plat_flash->flash_name, &plat_flash->parts[i]);
+        }
 
-		return ret;
+        return ret;
 
-	}
-	else{
-		rt_kprintf("please check if you connect the flash already...\n");
-		return RT_ENOSYS;
-	}
+    }
+    else{
+        rt_kprintf("please check if you connect the flash already...\n");
+        return RT_ENOSYS;
+    }
 
 
 }
diff --git a/bsp/fh8620/drivers/spi_fh_adapt.h b/bsp/fh8620/drivers/spi_fh_adapt.h
index 171fdf7184..3e3cc365ab 100644
--- a/bsp/fh8620/drivers/spi_fh_adapt.h
+++ b/bsp/fh8620/drivers/spi_fh_adapt.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
  /*
  * spi_fh_adapt.h
  *
diff --git a/bsp/fh8620/drivers/ssi.c b/bsp/fh8620/drivers/ssi.c
index e5cb99042e..c87a4352ae 100644
--- a/bsp/fh8620/drivers/ssi.c
+++ b/bsp/fh8620/drivers/ssi.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include 
 #include 
 #include "fh_arch.h"
@@ -49,20 +49,20 @@
 #endif
 
 
-#define RX_DMA_CHANNEL	AUTO_FIND_CHANNEL
-#define TX_DMA_CHANNEL	AUTO_FIND_CHANNEL
+#define RX_DMA_CHANNEL  AUTO_FIND_CHANNEL
+#define TX_DMA_CHANNEL  AUTO_FIND_CHANNEL
 
-#define DMA_OR_ISR_THRESHOLD		20
-#define MALLOC_DMA_MEM_SIZE			0x1000
+#define DMA_OR_ISR_THRESHOLD        20
+#define MALLOC_DMA_MEM_SIZE         0x1000
 
 
 //static rt_uint32_t allign_func(rt_uint32_t in_addr,rt_uint32_t allign_size){
-//	return (in_addr + allign_size-1) & (~(allign_size - 1));
+//  return (in_addr + allign_size-1) & (~(allign_size - 1));
 //}
 
 
 void * fh_get_spi_dev_pri_data(struct rt_spi_device* device){
-	return device->parent.user_data;
+    return device->parent.user_data;
 }
 
 static rt_err_t fh_spi_configure(struct rt_spi_device* device,
@@ -87,54 +87,54 @@ static rt_err_t fh_spi_configure(struct rt_spi_device* device,
     PRINT_SPI_DBG("\tmax_hz: 0x%x\n", configuration->max_hz);
 
     do{
-	  status = SPI_ReadStatus(spi_obj);
-	}
+      status = SPI_ReadStatus(spi_obj);
+    }
     while(status & SPI_STATUS_BUSY);
 
 
-	/* data_width */
-	if(configuration->data_width <= 8){
-	  config->data_size = SPI_DATA_SIZE_8BIT;
-	}
-	else if(configuration->data_width <= 16){
-	  config->data_size = SPI_DATA_SIZE_16BIT;
-	}
-	else{
-	  return -RT_ERROR;
-	}
+    /* data_width */
+    if(configuration->data_width <= 8){
+      config->data_size = SPI_DATA_SIZE_8BIT;
+    }
+    else if(configuration->data_width <= 16){
+      config->data_size = SPI_DATA_SIZE_16BIT;
+    }
+    else{
+      return -RT_ERROR;
+    }
 
-	if(configuration->max_hz > spi_control->max_hz)
-		spi_hz = spi_control->max_hz;
-	else
-		spi_hz = configuration->max_hz;
+    if(configuration->max_hz > spi_control->max_hz)
+        spi_hz = spi_control->max_hz;
+    else
+        spi_hz = configuration->max_hz;
 
-	//fixme: div
-	config->clk_div = spi_control->clk_in/spi_hz;
-	//config->clk_div = 8;
-	PRINT_SPI_DBG("config hz:%d spi div:%d\n",spi_hz,config->clk_div);
-	/* CPOL */
-	if(configuration->mode & RT_SPI_CPOL){
-	  config->clk_polarity = SPI_POLARITY_HIGH;
-	}
-	else{
-	  config->clk_polarity = SPI_POLARITY_LOW;
-	}
+    //fixme: div
+    config->clk_div = spi_control->clk_in/spi_hz;
+    //config->clk_div = 8;
+    PRINT_SPI_DBG("config hz:%d spi div:%d\n",spi_hz,config->clk_div);
+    /* CPOL */
+    if(configuration->mode & RT_SPI_CPOL){
+      config->clk_polarity = SPI_POLARITY_HIGH;
+    }
+    else{
+      config->clk_polarity = SPI_POLARITY_LOW;
+    }
 
-	/* CPHA */
-	if(configuration->mode & RT_SPI_CPHA){
-	  config->clk_phase = SPI_PHASE_TX_FIRST;
-	}
-	else{
-	  config->clk_phase = SPI_PHASE_RX_FIRST;
-	}
+    /* CPHA */
+    if(configuration->mode & RT_SPI_CPHA){
+      config->clk_phase = SPI_PHASE_TX_FIRST;
+    }
+    else{
+      config->clk_phase = SPI_PHASE_RX_FIRST;
+    }
 
-	config->frame_format = SPI_FORMAT_MOTOROLA;
-	config->transfer_mode = SPI_MODE_TX_RX;
+    config->frame_format = SPI_FORMAT_MOTOROLA;
+    config->transfer_mode = SPI_MODE_TX_RX;
 
-	SPI_Enable(spi_obj, 0);
-	SPI_SetParameter(spi_obj);
-	SPI_DisableInterrupt(spi_obj, SPI_IRQ_ALL);
-	SPI_Enable(spi_obj, 1);
+    SPI_Enable(spi_obj, 0);
+    SPI_SetParameter(spi_obj);
+    SPI_DisableInterrupt(spi_obj, SPI_IRQ_ALL);
+    SPI_Enable(spi_obj, 1);
 
     return RT_EOK;
 }
@@ -142,8 +142,8 @@ static rt_err_t fh_spi_configure(struct rt_spi_device* device,
 
 static void xfer_dma_done(void *arg)
 {
-	struct spi_controller *spi_control = (struct spi_controller *)arg;
-	spi_control->dma_complete_times++;
+    struct spi_controller *spi_control = (struct spi_controller *)arg;
+    spi_control->dma_complete_times++;
 
     struct fh_spi_obj *spi_obj;
     int ret;
@@ -151,72 +151,72 @@ static void xfer_dma_done(void *arg)
     spi_obj = &spi_control->obj;
 
 
-	//rt_kprintf("spi dma isr done.....\n");
-	if (spi_control->dma_complete_times == 2) {
-		spi_control->dma_complete_times = 0;
+    //rt_kprintf("spi dma isr done.....\n");
+    if (spi_control->dma_complete_times == 2) {
+        spi_control->dma_complete_times = 0;
 
-		//add memcpy to user buff
-		if(spi_control->current_message->recv_buf){
-			rt_memcpy((void*)spi_control->current_message->recv_buf,(void*)spi_control->dma.rx_dummy_buff,spi_control->current_message->length);
-		}
+        //add memcpy to user buff
+        if(spi_control->current_message->recv_buf){
+            rt_memcpy((void*)spi_control->current_message->recv_buf,(void*)spi_control->dma.rx_dummy_buff,spi_control->current_message->length);
+        }
 
-		SPI_Enable(spi_obj,0);
-		SPI_DisableDma(spi_obj,SPI_TX_DMA|SPI_RX_DMA);
-		SPI_Enable(spi_obj,1);
+        SPI_Enable(spi_obj,0);
+        SPI_DisableDma(spi_obj,SPI_TX_DMA|SPI_RX_DMA);
+        SPI_Enable(spi_obj,1);
 
-		rt_completion_done(&spi_control->transfer_completion);
-	}
+        rt_completion_done(&spi_control->transfer_completion);
+    }
 
 }
 
 void dma_set_tx_data(struct spi_controller *spi_control){
 
-	struct dma_transfer *trans;
-	rt_uint32_t hs_no;
-	struct rt_spi_message* current_message = spi_control->current_message;
-	trans = &spi_control->dma.tx_trans;
-	hs_no = spi_control->dma.tx_hs;
+    struct dma_transfer *trans;
+    rt_uint32_t hs_no;
+    struct rt_spi_message* current_message = spi_control->current_message;
+    trans = &spi_control->dma.tx_trans;
+    hs_no = spi_control->dma.tx_hs;
 
-	struct fh_spi_obj *spi_obj;
-	spi_obj = &spi_control->obj;
+    struct fh_spi_obj *spi_obj;
+    spi_obj = &spi_control->obj;
 
 
 
-	if(current_message->length > MALLOC_DMA_MEM_SIZE){
-		rt_kprintf("[spi_dma]message len too large..\n");
-		rt_kprintf("[spi_dma] message len is %d,max len is %d\n",current_message->length,MALLOC_DMA_MEM_SIZE);
-		RT_ASSERT(current_message->length <= MALLOC_DMA_MEM_SIZE);
-	}
+    if(current_message->length > MALLOC_DMA_MEM_SIZE){
+        rt_kprintf("[spi_dma]message len too large..\n");
+        rt_kprintf("[spi_dma] message len is %d,max len is %d\n",current_message->length,MALLOC_DMA_MEM_SIZE);
+        RT_ASSERT(current_message->length <= MALLOC_DMA_MEM_SIZE);
+    }
 
 
-	rt_memset((void*)spi_control->dma.tx_dummy_buff,0xff,current_message->length);
-	//copy tx data....
-	if(current_message->send_buf){
-		rt_memcpy(spi_control->dma.tx_dummy_buff,current_message->send_buf,current_message->length);
-	}
+    rt_memset((void*)spi_control->dma.tx_dummy_buff,0xff,current_message->length);
+    //copy tx data....
+    if(current_message->send_buf){
+        rt_memcpy(spi_control->dma.tx_dummy_buff,current_message->send_buf,current_message->length);
+    }
 
 
-	trans->dma_number = 0;
-	trans->dst_add = (rt_uint32_t)(spi_obj->base + OFFSET_SPI_DR);
+    trans->dma_number = 0;
+    trans->dst_add = (rt_uint32_t)(spi_obj->base + OFFSET_SPI_DR);
 
-	trans->dst_hs = DMA_HW_HANDSHAKING;
-	trans->dst_inc_mode = DW_DMA_SLAVE_FIX;
-	trans->dst_msize = DW_DMA_SLAVE_MSIZE_1;
-	trans->dst_per = hs_no;
-	trans->dst_width = DW_DMA_SLAVE_WIDTH_8BIT;
-	trans->fc_mode = DMA_M2P;
+    trans->dst_hs = DMA_HW_HANDSHAKING;
+    trans->dst_inc_mode = DW_DMA_SLAVE_FIX;
+    trans->dst_msize = DW_DMA_SLAVE_MSIZE_1;
+    trans->dst_per = hs_no;
+    trans->dst_width = DW_DMA_SLAVE_WIDTH_8BIT;
+    trans->fc_mode = DMA_M2P;
 
-	trans->src_add = (rt_uint32_t)spi_control->dma.tx_dummy_buff;
+    trans->src_add = (rt_uint32_t)spi_control->dma.tx_dummy_buff;
 
-	trans->src_inc_mode = DW_DMA_SLAVE_INC;
-	trans->src_msize = DW_DMA_SLAVE_MSIZE_1;
+    trans->src_inc_mode = DW_DMA_SLAVE_INC;
+    trans->src_msize = DW_DMA_SLAVE_MSIZE_1;
 
-	trans->src_width = DW_DMA_SLAVE_WIDTH_8BIT;
-	trans->trans_len = current_message->length;
+    trans->src_width = DW_DMA_SLAVE_WIDTH_8BIT;
+    trans->trans_len = current_message->length;
 
 
-	trans->complete_callback = (void *)xfer_dma_done;
-	trans->complete_para = (void *)spi_control;
+    trans->complete_callback = (void *)xfer_dma_done;
+    trans->complete_para = (void *)spi_control;
 
 
 
@@ -225,153 +225,153 @@ void dma_set_tx_data(struct spi_controller *spi_control){
 
 void dma_set_rx_data(struct spi_controller *spi_control){
 
-	struct dma_transfer *trans;
-	rt_uint32_t hs_no;
-	struct rt_spi_message* current_message = spi_control->current_message;
-	trans = &spi_control->dma.rx_trans;
-	hs_no = spi_control->dma.rx_hs;
+    struct dma_transfer *trans;
+    rt_uint32_t hs_no;
+    struct rt_spi_message* current_message = spi_control->current_message;
+    trans = &spi_control->dma.rx_trans;
+    hs_no = spi_control->dma.rx_hs;
 
-	struct fh_spi_obj *spi_obj;
-	spi_obj = &spi_control->obj;
+    struct fh_spi_obj *spi_obj;
+    spi_obj = &spi_control->obj;
 
-	if(current_message->length > MALLOC_DMA_MEM_SIZE){
-		rt_kprintf("[spi_dma]message len too large..len is %d\n",current_message->length);
-		RT_ASSERT(current_message->length <= MALLOC_DMA_MEM_SIZE);
-	}
+    if(current_message->length > MALLOC_DMA_MEM_SIZE){
+        rt_kprintf("[spi_dma]message len too large..len is %d\n",current_message->length);
+        RT_ASSERT(current_message->length <= MALLOC_DMA_MEM_SIZE);
+    }
 
 
-	//rt_memset((void *)spi_control->dma.rx_dummy_buff,0,MALLOC_DMA_MEM_SIZE);
+    //rt_memset((void *)spi_control->dma.rx_dummy_buff,0,MALLOC_DMA_MEM_SIZE);
 
-	trans->dma_number = 0;
-	trans->fc_mode = DMA_P2M;
+    trans->dma_number = 0;
+    trans->fc_mode = DMA_P2M;
 
-	trans->dst_add = (rt_uint32_t)spi_control->dma.rx_dummy_buff;
-	trans->dst_inc_mode = DW_DMA_SLAVE_INC;
-	trans->dst_msize = DW_DMA_SLAVE_MSIZE_1;
-	trans->dst_width = DW_DMA_SLAVE_WIDTH_8BIT;
+    trans->dst_add = (rt_uint32_t)spi_control->dma.rx_dummy_buff;
+    trans->dst_inc_mode = DW_DMA_SLAVE_INC;
+    trans->dst_msize = DW_DMA_SLAVE_MSIZE_1;
+    trans->dst_width = DW_DMA_SLAVE_WIDTH_8BIT;
 
 
 
-	trans->src_add = (rt_uint32_t)(spi_obj->base + OFFSET_SPI_DR);
-	trans->src_inc_mode = DW_DMA_SLAVE_FIX;
-	trans->src_msize = DW_DMA_SLAVE_MSIZE_1;
-	trans->src_width = DW_DMA_SLAVE_WIDTH_8BIT;
-	trans->src_hs = DMA_HW_HANDSHAKING;
-	trans->src_per = hs_no;
-	trans->trans_len = current_message->length;
+    trans->src_add = (rt_uint32_t)(spi_obj->base + OFFSET_SPI_DR);
+    trans->src_inc_mode = DW_DMA_SLAVE_FIX;
+    trans->src_msize = DW_DMA_SLAVE_MSIZE_1;
+    trans->src_width = DW_DMA_SLAVE_WIDTH_8BIT;
+    trans->src_hs = DMA_HW_HANDSHAKING;
+    trans->src_per = hs_no;
+    trans->trans_len = current_message->length;
 
 
 
-	trans->complete_callback = (void *)xfer_dma_done;
-	trans->complete_para = (void *)spi_control;
+    trans->complete_callback = (void *)xfer_dma_done;
+    trans->complete_para = (void *)spi_control;
 
 
 }
 
 
 rt_uint32_t xfer_data_dma(struct spi_controller *spi_control){
-	int ret;
+    int ret;
 
-	struct fh_spi_obj *spi_obj;
-	spi_obj = &spi_control->obj;
+    struct fh_spi_obj *spi_obj;
+    spi_obj = &spi_control->obj;
 
-	struct rt_dma_device *dma_dev = spi_control->dma.dma_dev;
+    struct rt_dma_device *dma_dev = spi_control->dma.dma_dev;
 
 
-	//tx data prepare
-	dma_set_tx_data(spi_control);
-	//rx data prepare
-	dma_set_rx_data(spi_control);
-	//dma go...
+    //tx data prepare
+    dma_set_tx_data(spi_control);
+    //rx data prepare
+    dma_set_rx_data(spi_control);
+    //dma go...
 
 
-	SPI_Enable(spi_obj,0);
+    SPI_Enable(spi_obj,0);
 
-	//SPI_WriteTxDmaLevel(spi_obj,SPI_FIFO_DEPTH / 4);
-	SPI_WriteTxDmaLevel(spi_obj,1);
-	//SPI_WriteTxDmaLevel(spi_obj,0);
-	SPI_WriteRxDmaLevel(spi_obj,0);
-	SPI_EnableDma(spi_obj,SPI_TX_DMA|SPI_RX_DMA);
-	SPI_Enable(spi_obj,1);
+    //SPI_WriteTxDmaLevel(spi_obj,SPI_FIFO_DEPTH / 4);
+    SPI_WriteTxDmaLevel(spi_obj,1);
+    //SPI_WriteTxDmaLevel(spi_obj,0);
+    SPI_WriteRxDmaLevel(spi_obj,0);
+    SPI_EnableDma(spi_obj,SPI_TX_DMA|SPI_RX_DMA);
+    SPI_Enable(spi_obj,1);
 
-	dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER,(void *)&spi_control->dma.rx_trans);
-	dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER,(void *)&spi_control->dma.tx_trans);
+    dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER,(void *)&spi_control->dma.rx_trans);
+    dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER,(void *)&spi_control->dma.tx_trans);
 
-	ret = rt_completion_wait(&spi_control->transfer_completion, RT_TICK_PER_SECOND*50);
-	//release channel..
+    ret = rt_completion_wait(&spi_control->transfer_completion, RT_TICK_PER_SECOND*50);
+    //release channel..
 
-	//dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&spi_control->dma.tx_trans);
-	//dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&spi_control->dma.rx_trans);
+    //dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&spi_control->dma.tx_trans);
+    //dma_dev->ops->control(dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&spi_control->dma.rx_trans);
 
-	if(ret)
-	{
-		rt_kprintf("ERROR: %s, transfer timeout\n", __func__);
-		return -RT_ETIMEOUT;
-	}
+    if(ret)
+    {
+        rt_kprintf("ERROR: %s, transfer timeout\n", __func__);
+        return -RT_ETIMEOUT;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 rt_uint32_t xfer_data_isr(struct spi_controller *spi_control){
 
-	int ret;
-	struct fh_spi_obj *spi_obj;
-	spi_obj = &spi_control->obj;
+    int ret;
+    struct fh_spi_obj *spi_obj;
+    spi_obj = &spi_control->obj;
     SPI_SetTxLevel(spi_obj, SPI_FIFO_DEPTH / 2);
     SPI_EnableInterrupt(spi_obj, SPI_IRQ_TXEIM);
-	ret = rt_completion_wait(&spi_control->transfer_completion, RT_TICK_PER_SECOND*50);
-	if(ret)
-	{
-		rt_kprintf("ERROR: %s, transfer timeout\n", __func__);
-		return -RT_ETIMEOUT;
-	}
+    ret = rt_completion_wait(&spi_control->transfer_completion, RT_TICK_PER_SECOND*50);
+    if(ret)
+    {
+        rt_kprintf("ERROR: %s, transfer timeout\n", __func__);
+        return -RT_ETIMEOUT;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 
 void fix_spi_xfer_mode(struct spi_controller *spi_control){
-	 //switch dma or isr....first check dma ...is error .use isr xfer...
-	struct rt_dma_device * rt_dma_dev;
-	struct dma_transfer *tx_trans;
-	struct dma_transfer *rx_trans;
-	int ret;
-	//retry to check if the dma status...
-	if(spi_control->dma.dma_flag == DMA_BIND_OK){
-		//if transfer data too short...use isr..
-		if(spi_control->current_message->length < DMA_OR_ISR_THRESHOLD){
-			spi_control->xfer_mode = XFER_USE_ISR;
-			return;
-		}
+     //switch dma or isr....first check dma ...is error .use isr xfer...
+    struct rt_dma_device * rt_dma_dev;
+    struct dma_transfer *tx_trans;
+    struct dma_transfer *rx_trans;
+    int ret;
+    //retry to check if the dma status...
+    if(spi_control->dma.dma_flag == DMA_BIND_OK){
+        //if transfer data too short...use isr..
+        if(spi_control->current_message->length < DMA_OR_ISR_THRESHOLD){
+            spi_control->xfer_mode = XFER_USE_ISR;
+            return;
+        }
 #if(0)
-		rt_dma_dev = spi_control->dma.dma_dev;
-		//first request channel
+        rt_dma_dev = spi_control->dma.dma_dev;
+        //first request channel
 
-		tx_trans = &spi_control->dma.tx_trans;
-		rx_trans = &spi_control->dma.rx_trans;
-		tx_trans->channel_number = TX_DMA_CHANNEL;
-		rx_trans->channel_number = RX_DMA_CHANNEL;
+        tx_trans = &spi_control->dma.tx_trans;
+        rx_trans = &spi_control->dma.rx_trans;
+        tx_trans->channel_number = TX_DMA_CHANNEL;
+        rx_trans->channel_number = RX_DMA_CHANNEL;
 
 
-		ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)tx_trans);
-		if(ret != RT_EOK){
-			spi_control->xfer_mode = XFER_USE_ISR;
-			return;
-		}
+        ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)tx_trans);
+        if(ret != RT_EOK){
+            spi_control->xfer_mode = XFER_USE_ISR;
+            return;
+        }
 
-		ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)rx_trans);
-		if(ret != RT_EOK){
-			//release tx channel...
-			rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&tx_trans);
-			spi_control->xfer_mode = XFER_USE_ISR;
-			return;
-		}
+        ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)rx_trans);
+        if(ret != RT_EOK){
+            //release tx channel...
+            rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&tx_trans);
+            spi_control->xfer_mode = XFER_USE_ISR;
+            return;
+        }
 #endif
-		spi_control->xfer_mode = XFER_USE_DMA;
-		//if error use isr mode
-	}
-	else
-		spi_control->xfer_mode = XFER_USE_ISR;
+        spi_control->xfer_mode = XFER_USE_DMA;
+        //if error use isr mode
+    }
+    else
+        spi_control->xfer_mode = XFER_USE_ISR;
 
 
 
@@ -392,7 +392,7 @@ static rt_uint32_t fh_spi_xfer(struct rt_spi_device* device, struct rt_spi_messa
     spi_control->transfered_len = 0;
     spi_control->received_len = 0;
 
-	rt_sem_take(&spi_control->xfer_lock, RT_WAITING_FOREVER);
+    rt_sem_take(&spi_control->xfer_lock, RT_WAITING_FOREVER);
 
     rt_completion_init(&spi_control->transfer_completion);
 
@@ -400,52 +400,52 @@ static rt_uint32_t fh_spi_xfer(struct rt_spi_device* device, struct rt_spi_messa
     /* take CS */
     if(message->cs_take)
     {
-    	if(spi_slave->plat_slave.actice_level == ACTIVE_LOW)
-    		gpio_direction_output(spi_slave->plat_slave.cs_pin, 0);
-    	else
-    		gpio_direction_output(spi_slave->plat_slave.cs_pin, 1);
+        if(spi_slave->plat_slave.actice_level == ACTIVE_LOW)
+            gpio_direction_output(spi_slave->plat_slave.cs_pin, 0);
+        else
+            gpio_direction_output(spi_slave->plat_slave.cs_pin, 1);
 
-    	//here will always use the slave_0 because that the cs is gpio...
-    	SPI_EnableSlaveen(spi_obj, 0);
+        //here will always use the slave_0 because that the cs is gpio...
+        SPI_EnableSlaveen(spi_obj, 0);
     }
 
     //fix transfer mode .....
     fix_spi_xfer_mode(spi_control);
 
 
-	switch(spi_control->xfer_mode){
-	case XFER_USE_DMA:
-		PRINT_SPI_DBG("use dma xfer.....###############\n");
-		ret = xfer_data_dma(spi_control);
-		if(ret == RT_EOK){
-			break;
-		}
-		else{
-			//use the isr mode to transfer
-			spi_control->xfer_mode = XFER_USE_ISR;
-			rt_kprintf("%s dma transfer error no:%x\n",__func__,ret);
-		}
-	case XFER_USE_ISR:
-		PRINT_SPI_DBG("use isr xfer.....&&&&&&&&&&&&&\n");
-		ret = xfer_data_isr(spi_control);
-		if(ret != RT_EOK)
-			rt_kprintf("%s isr transfer error no:%x\n",__func__,ret);
-		break;
+    switch(spi_control->xfer_mode){
+    case XFER_USE_DMA:
+        PRINT_SPI_DBG("use dma xfer.....###############\n");
+        ret = xfer_data_dma(spi_control);
+        if(ret == RT_EOK){
+            break;
+        }
+        else{
+            //use the isr mode to transfer
+            spi_control->xfer_mode = XFER_USE_ISR;
+            rt_kprintf("%s dma transfer error no:%x\n",__func__,ret);
+        }
+    case XFER_USE_ISR:
+        PRINT_SPI_DBG("use isr xfer.....&&&&&&&&&&&&&\n");
+        ret = xfer_data_isr(spi_control);
+        if(ret != RT_EOK)
+            rt_kprintf("%s isr transfer error no:%x\n",__func__,ret);
+        break;
 
-	default:
-		rt_kprintf("%s unknow xfer func...\n",__func__);
-		while(1)
-			;
-	}
+    default:
+        rt_kprintf("%s unknow xfer func...\n",__func__);
+        while(1)
+            ;
+    }
 
     /* release CS */
     if(message->cs_release)
     {
-    	if(spi_slave->plat_slave.actice_level == ACTIVE_LOW)
-    		gpio_direction_output(spi_slave->plat_slave.cs_pin, 1);
-    	else
-    		gpio_direction_output(spi_slave->plat_slave.cs_pin, 0);
-    	SPI_DisableSlaveen(spi_obj, 0);
+        if(spi_slave->plat_slave.actice_level == ACTIVE_LOW)
+            gpio_direction_output(spi_slave->plat_slave.cs_pin, 1);
+        else
+            gpio_direction_output(spi_slave->plat_slave.cs_pin, 0);
+        SPI_DisableSlaveen(spi_obj, 0);
     }
 
     rt_sem_release(&spi_control->xfer_lock);
@@ -479,73 +479,73 @@ static void fh_spi_interrupt(int irq, void *param)
 
 //
 
-	if(spi_control->current_message == RT_NULL){
-		rt_kprintf("ERROR: %s, current_message is incorrect\n", __func__);
-	}
+    if(spi_control->current_message == RT_NULL){
+        rt_kprintf("ERROR: %s, current_message is incorrect\n", __func__);
+    }
 
-	status =  SPI_InterruptStatus(spi_obj);
-	PRINT_SPI_DBG("status: 0x%x\n", status);
-	//fixme: ??recv overflow, underflow; tran overflow??
-	if(status & SPI_ISR_ERROR){
-		rt_kprintf("ERROR: %s, status=%d\n", __func__, status);
-		SPI_ClearInterrupt(spi_obj);
-		//fixme: handle error
-		return;
-	}
+    status =  SPI_InterruptStatus(spi_obj);
+    PRINT_SPI_DBG("status: 0x%x\n", status);
+    //fixme: ??recv overflow, underflow; tran overflow??
+    if(status & SPI_ISR_ERROR){
+        rt_kprintf("ERROR: %s, status=%d\n", __func__, status);
+        SPI_ClearInterrupt(spi_obj);
+        //fixme: handle error
+        return;
+    }
 
-	rx_fifo_capability = SPI_ReadRxFifoLevel(spi_obj);
-	tx_fifo_capability = MIN(
-			(SPI_FIFO_DEPTH - SPI_ReadTxFifoLevel(spi_obj)) / 2,
-			(spi_control->current_message->length - spi_control->transfered_len));
+    rx_fifo_capability = SPI_ReadRxFifoLevel(spi_obj);
+    tx_fifo_capability = MIN(
+            (SPI_FIFO_DEPTH - SPI_ReadTxFifoLevel(spi_obj)) / 2,
+            (spi_control->current_message->length - spi_control->transfered_len));
 
 
-	PRINT_SPI_DBG("rx_fifo_capability=%d\n", rx_fifo_capability);
+    PRINT_SPI_DBG("rx_fifo_capability=%d\n", rx_fifo_capability);
 
-	//rx
-	spi_control->received_len += rx_fifo_capability;
-	while(rx_fifo_capability)
-	{
-		data = SPI_ReadData(spi_obj);
-		if(spi_control->current_message->recv_buf){
-			*(rt_uint8_t *)spi_control->current_message->recv_buf++ = data;
-		}
-		PRINT_SPI_DBG("rx, data: 0x%x\n", data);
-		//rt_kprintf("rx, data: 0x%x\n", data);
-		rx_fifo_capability--;
-	}
+    //rx
+    spi_control->received_len += rx_fifo_capability;
+    while(rx_fifo_capability)
+    {
+        data = SPI_ReadData(spi_obj);
+        if(spi_control->current_message->recv_buf){
+            *(rt_uint8_t *)spi_control->current_message->recv_buf++ = data;
+        }
+        PRINT_SPI_DBG("rx, data: 0x%x\n", data);
+        //rt_kprintf("rx, data: 0x%x\n", data);
+        rx_fifo_capability--;
+    }
 
-	if(spi_control->received_len == spi_control->current_message->length)
-	{
+    if(spi_control->received_len == spi_control->current_message->length)
+    {
 
-		//rt_kprintf("asdasdq4902834908dklfkldjsdhgkljshfgljkhsgfkljhsdfkljghklj");
-		SPI_DisableInterrupt(spi_obj, SPI_ISR_FLAG);
-		PRINT_SPI_DBG("finished, length=%d, received_len=%d\n", spi_control->current_message->length, spi_control->received_len);
-		rt_completion_done(&spi_control->transfer_completion);
+        //rt_kprintf("asdasdq4902834908dklfkldjsdhgkljshfgljkhsgfkljhsdfkljghklj");
+        SPI_DisableInterrupt(spi_obj, SPI_ISR_FLAG);
+        PRINT_SPI_DBG("finished, length=%d, received_len=%d\n", spi_control->current_message->length, spi_control->received_len);
+        rt_completion_done(&spi_control->transfer_completion);
 
 
-		return;
-	}
+        return;
+    }
 
-	//tx
+    //tx
 
-	spi_control->transfered_len +=tx_fifo_capability;
-	if(spi_control->current_message->send_buf){
-		p = (rt_uint8_t *)spi_control->current_message->send_buf;
-		while(tx_fifo_capability){
-			PRINT_SPI_DBG("tx, data: 0x%x\n", *p);
-			//rt_kprintf("tx, data: 0x%x\n", *p);
-			SPI_WriteData(spi_obj, *p++);
-			tx_fifo_capability--;
-		}
-		spi_control->current_message->send_buf = p;
-	}
-	else{
-		while(tx_fifo_capability){
+    spi_control->transfered_len +=tx_fifo_capability;
+    if(spi_control->current_message->send_buf){
+        p = (rt_uint8_t *)spi_control->current_message->send_buf;
+        while(tx_fifo_capability){
+            PRINT_SPI_DBG("tx, data: 0x%x\n", *p);
+            //rt_kprintf("tx, data: 0x%x\n", *p);
+            SPI_WriteData(spi_obj, *p++);
+            tx_fifo_capability--;
+        }
+        spi_control->current_message->send_buf = p;
+    }
+    else{
+        while(tx_fifo_capability){
 
-			SPI_WriteData(spi_obj, 0xff);
-			tx_fifo_capability--;
-		}
-	}
+            SPI_WriteData(spi_obj, 0xff);
+            tx_fifo_capability--;
+        }
+    }
 
 
 
@@ -568,28 +568,28 @@ int fh_spi_probe(void *priv_data)
     struct spi_control_platform_data *plat_data;
     int i,ret;
 
-	struct rt_dma_device * rt_dma_dev;
-	struct dma_transfer *tx_trans;
-	struct dma_transfer *rx_trans;
+    struct rt_dma_device * rt_dma_dev;
+    struct dma_transfer *tx_trans;
+    struct dma_transfer *rx_trans;
 
     //check data...
     plat_data = (struct spi_control_platform_data *)priv_data;
 
     if(!plat_data){
-		rt_kprintf("ERROR:platform data null...\n");
-		return -RT_ENOMEM;
+        rt_kprintf("ERROR:platform data null...\n");
+        return -RT_ENOMEM;
     }
     if(plat_data->slave_no > FH_SPI_SLAVE_MAX_NO){
-    	rt_kprintf("ERROR:spi controller not support %d slave..\n",plat_data->slave_no);
-    	return -RT_ENOMEM;
+        rt_kprintf("ERROR:spi controller not support %d slave..\n",plat_data->slave_no);
+        return -RT_ENOMEM;
     }
 
 
     //malloc data
     spi_control = (struct spi_controller*)rt_malloc(sizeof(struct spi_controller));
     if(!spi_control){
-    	rt_kprintf("ERROR:no mem for malloc the spi controller..\n");
-    	goto error_malloc_bus;
+        rt_kprintf("ERROR:no mem for malloc the spi controller..\n");
+        goto error_malloc_bus;
     }
 
     rt_memset(spi_control, 0, sizeof(struct spi_controller));
@@ -624,77 +624,77 @@ int fh_spi_probe(void *priv_data)
     if(plat_data->transfer_mode == USE_DMA_TRANSFER){
 
         spi_control->dma.dma_dev = (struct rt_dma_device *)rt_device_find(plat_data->dma_name);
-    	if(spi_control->dma.dma_dev == RT_NULL){
-    		rt_kprintf("can't find dma dev\n");
-    		//goto error_malloc_slave;
-    		//spi_control->dma_xfer_flag = USE_ISR_TRANSFER;
-//    		spi_control->dma.dma_flag = DMA_BIND_ERROR;
-//    		spi_control->xfer_mode = XFER_USE_ISR;
-    		goto BIND_DMA_ERROR;
-    	}
-    	else{
+        if(spi_control->dma.dma_dev == RT_NULL){
+            rt_kprintf("can't find dma dev\n");
+            //goto error_malloc_slave;
+            //spi_control->dma_xfer_flag = USE_ISR_TRANSFER;
+//          spi_control->dma.dma_flag = DMA_BIND_ERROR;
+//          spi_control->xfer_mode = XFER_USE_ISR;
+            goto BIND_DMA_ERROR;
+        }
+        else{
 
-			spi_control->dma.control = spi_control;
-			spi_control->dma.rx_hs = plat_data->rx_hs_no;
-			spi_control->dma.tx_hs = plat_data->tx_hs_no;
-			spi_control->dma.dma_name = plat_data->dma_name;
+            spi_control->dma.control = spi_control;
+            spi_control->dma.rx_hs = plat_data->rx_hs_no;
+            spi_control->dma.tx_hs = plat_data->tx_hs_no;
+            spi_control->dma.dma_name = plat_data->dma_name;
 
-			spi_control->dma.rx_dummy_buff = fh_dma_mem_malloc(MALLOC_DMA_MEM_SIZE);
-			if(!spi_control->dma.rx_dummy_buff){
-				rt_kprintf("malloc rx dma buff failed...\n");
-				//spi_control->xfer_mode = XFER_USE_ISR;
-				goto BIND_DMA_ERROR;
-			}
+            spi_control->dma.rx_dummy_buff = fh_dma_mem_malloc(MALLOC_DMA_MEM_SIZE);
+            if(!spi_control->dma.rx_dummy_buff){
+                rt_kprintf("malloc rx dma buff failed...\n");
+                //spi_control->xfer_mode = XFER_USE_ISR;
+                goto BIND_DMA_ERROR;
+            }
 
 
 
-			spi_control->dma.tx_dummy_buff = fh_dma_mem_malloc(MALLOC_DMA_MEM_SIZE);
-			if(!spi_control->dma.tx_dummy_buff){
-				rt_kprintf("malloc tx dma buff failed...\n");
-				fh_dma_mem_free(spi_control->dma.rx_dummy_buff);
-				//spi_control->xfer_mode = XFER_USE_ISR;
-				goto BIND_DMA_ERROR;
-			}
+            spi_control->dma.tx_dummy_buff = fh_dma_mem_malloc(MALLOC_DMA_MEM_SIZE);
+            if(!spi_control->dma.tx_dummy_buff){
+                rt_kprintf("malloc tx dma buff failed...\n");
+                fh_dma_mem_free(spi_control->dma.rx_dummy_buff);
+                //spi_control->xfer_mode = XFER_USE_ISR;
+                goto BIND_DMA_ERROR;
+            }
 
-			if(((rt_uint32_t)spi_control->dma.tx_dummy_buff % 4)||((rt_uint32_t)spi_control->dma.rx_dummy_buff % 4)){
-				rt_kprintf("dma malloc buff not allign..\n");
-				fh_dma_mem_free(spi_control->dma.rx_dummy_buff);
-				fh_dma_mem_free(spi_control->dma.tx_dummy_buff);
-				goto BIND_DMA_ERROR;
-			}
+            if(((rt_uint32_t)spi_control->dma.tx_dummy_buff % 4)||((rt_uint32_t)spi_control->dma.rx_dummy_buff % 4)){
+                rt_kprintf("dma malloc buff not allign..\n");
+                fh_dma_mem_free(spi_control->dma.rx_dummy_buff);
+                fh_dma_mem_free(spi_control->dma.tx_dummy_buff);
+                goto BIND_DMA_ERROR;
+            }
 
-	    	//open dma dev.
-	    	spi_control->dma.dma_dev->ops->control(spi_control->dma.dma_dev,RT_DEVICE_CTRL_DMA_OPEN,RT_NULL);
+            //open dma dev.
+            spi_control->dma.dma_dev->ops->control(spi_control->dma.dma_dev,RT_DEVICE_CTRL_DMA_OPEN,RT_NULL);
 
-	    	//request channel
-	    	rt_dma_dev = spi_control->dma.dma_dev;
-			//first request channel
-			tx_trans = &spi_control->dma.tx_trans;
-			rx_trans = &spi_control->dma.rx_trans;
-			tx_trans->channel_number = TX_DMA_CHANNEL;
-			rx_trans->channel_number = RX_DMA_CHANNEL;
+            //request channel
+            rt_dma_dev = spi_control->dma.dma_dev;
+            //first request channel
+            tx_trans = &spi_control->dma.tx_trans;
+            rx_trans = &spi_control->dma.rx_trans;
+            tx_trans->channel_number = TX_DMA_CHANNEL;
+            rx_trans->channel_number = RX_DMA_CHANNEL;
 
-			ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)tx_trans);
-			if(ret != RT_EOK){
-				goto BIND_DMA_ERROR;
-			}
+            ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)tx_trans);
+            if(ret != RT_EOK){
+                goto BIND_DMA_ERROR;
+            }
 
-			ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)rx_trans);
-			if(ret != RT_EOK){
-				//release tx channel...
-				rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&tx_trans);
-				goto BIND_DMA_ERROR;
-			}
+            ret = rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL,(void *)rx_trans);
+            if(ret != RT_EOK){
+                //release tx channel...
+                rt_dma_dev->ops->control(rt_dma_dev,RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL,(void *)&tx_trans);
+                goto BIND_DMA_ERROR;
+            }
 
-	    	//spi_control->xfer_mode = XFER_USE_DMA;
-	    	spi_control->dma.dma_flag = DMA_BIND_OK;
-    	}
+            //spi_control->xfer_mode = XFER_USE_DMA;
+            spi_control->dma.dma_flag = DMA_BIND_OK;
+        }
     }
     else{
 
 BIND_DMA_ERROR:
-			spi_control->dma.dma_flag = DMA_BIND_ERROR;
-			//spi_control->xfer_mode = XFER_USE_ISR;
+            spi_control->dma.dma_flag = DMA_BIND_ERROR;
+            //spi_control->xfer_mode = XFER_USE_ISR;
     }
 
 
@@ -702,80 +702,80 @@ BIND_DMA_ERROR:
 
     control_slave = &spi_control->spi_slave;
     for(i=0;islave_no;i++){
-    	spi_slave = (struct spi_slave_info*)rt_malloc(sizeof(struct spi_slave_info));
-    	if(!spi_slave){
-    		rt_kprintf("ERROR:no mem for malloc the spi_slave%d..\n",i);
-    		goto error_malloc_slave;
-    	}
-    	rt_memset(spi_slave, 0, sizeof(struct spi_slave_info));
+        spi_slave = (struct spi_slave_info*)rt_malloc(sizeof(struct spi_slave_info));
+        if(!spi_slave){
+            rt_kprintf("ERROR:no mem for malloc the spi_slave%d..\n",i);
+            goto error_malloc_slave;
+        }
+        rt_memset(spi_slave, 0, sizeof(struct spi_slave_info));
 
-    	//parse platform data...
-    	spi_slave->id = i;
-    	//bind to the spi control....will easy to find all the data...
-    	spi_slave->control = spi_control;
-    	spi_slave->plat_slave.cs_pin = plat_data->plat_slave[i].cs_pin;
-    	spi_slave->plat_slave.actice_level = plat_data->plat_slave[i].actice_level;
-    	rt_sprintf(spi_dev_name, "%s%d%s%d", "ssi", spi_control->id,"_",spi_slave->id);
+        //parse platform data...
+        spi_slave->id = i;
+        //bind to the spi control....will easy to find all the data...
+        spi_slave->control = spi_control;
+        spi_slave->plat_slave.cs_pin = plat_data->plat_slave[i].cs_pin;
+        spi_slave->plat_slave.actice_level = plat_data->plat_slave[i].actice_level;
+        rt_sprintf(spi_dev_name, "%s%d%s%d", "ssi", spi_control->id,"_",spi_slave->id);
 
-    	*control_slave = spi_slave;
-    	control_slave = &spi_slave->next;
+        *control_slave = spi_slave;
+        control_slave = &spi_slave->next;
 
-    	//register slave dev...
-    	ret = rt_spi_bus_attach_device(&spi_slave->spi_device,spi_dev_name,spi_bus_name,spi_slave);
-    	if(ret != RT_EOK){
-    		rt_kprintf("register dev to bus failed...\n");
-    		goto error_malloc_slave;
-    	}
+        //register slave dev...
+        ret = rt_spi_bus_attach_device(&spi_slave->spi_device,spi_dev_name,spi_bus_name,spi_slave);
+        if(ret != RT_EOK){
+            rt_kprintf("register dev to bus failed...\n");
+            goto error_malloc_slave;
+        }
 
     }
 
 
 
     //request gpio...
-	spi_slave = spi_control->spi_slave;
-	while(spi_slave != RT_NULL)
-	{
-		next_slave = spi_slave->next;
+    spi_slave = spi_control->spi_slave;
+    while(spi_slave != RT_NULL)
+    {
+        next_slave = spi_slave->next;
 
-		ret = gpio_request(spi_slave->plat_slave.cs_pin);
-		if(ret!=0){
-			rt_kprintf("request gpio_%d failed...\n",spi_slave->plat_slave.cs_pin);
-			goto error_malloc_slave;
-		}
+        ret = gpio_request(spi_slave->plat_slave.cs_pin);
+        if(ret!=0){
+            rt_kprintf("request gpio_%d failed...\n",spi_slave->plat_slave.cs_pin);
+            goto error_malloc_slave;
+        }
 
 
-		PRINT_SPI_DBG("spi_slave info addr:%x,id:%d,cs:%d,active:%d\n",(rt_uint32_t)spi_slave, spi_slave->id,
-				spi_slave->plat_slave.cs_pin,
-				spi_slave->plat_slave.actice_level);
-		spi_slave = next_slave;
-	}
+        PRINT_SPI_DBG("spi_slave info addr:%x,id:%d,cs:%d,active:%d\n",(rt_uint32_t)spi_slave, spi_slave->id,
+                spi_slave->plat_slave.cs_pin,
+                spi_slave->plat_slave.actice_level);
+        spi_slave = next_slave;
+    }
 
-	//this will be used in platform exit..
-	plat_data->control = spi_control;
+    //this will be used in platform exit..
+    plat_data->control = spi_control;
     return RT_EOK;
 
 error_malloc_slave:
-	//free the slaveinfo already malloc
-	spi_slave = spi_control->spi_slave;
-	while(spi_slave != RT_NULL)
-	{
-		next_slave = spi_slave->next;
-		gpio_release(spi_slave->plat_slave.cs_pin);
-		rt_free(spi_slave);
-		spi_slave = next_slave;
-	}
-	//mask isr
-	rt_hw_interrupt_mask(spi_control->irq);
-	//release sem ..
-	rt_sem_detach(&spi_control->xfer_lock);
+    //free the slaveinfo already malloc
+    spi_slave = spi_control->spi_slave;
+    while(spi_slave != RT_NULL)
+    {
+        next_slave = spi_slave->next;
+        gpio_release(spi_slave->plat_slave.cs_pin);
+        rt_free(spi_slave);
+        spi_slave = next_slave;
+    }
+    //mask isr
+    rt_hw_interrupt_mask(spi_control->irq);
+    //release sem ..
+    rt_sem_detach(&spi_control->xfer_lock);
 
-	//free the control malloc .
-	rt_free(spi_control);
+    //free the control malloc .
+    rt_free(spi_control);
 
-	//fixme:unregister spi_bus...
+    //fixme:unregister spi_bus...
 
 error_malloc_bus:
-	return -RT_ENOMEM;
+    return -RT_ENOMEM;
 
 
 
@@ -793,22 +793,22 @@ int fh_spi_exit(void *priv_data)
 
     plat_data = (struct spi_control_platform_data *)priv_data;
     spi_control = plat_data->control;
-	spi_slave = spi_control->spi_slave;
+    spi_slave = spi_control->spi_slave;
 
-	while(spi_slave != RT_NULL)
-	{
-		next_slave = spi_slave->next;
-		gpio_release(spi_slave->plat_slave.cs_pin);
-		rt_free(spi_slave);
-		spi_slave = next_slave;
-	}
-	//mask isr
-	rt_hw_interrupt_mask(spi_control->irq);
-	//release sem ..
-	rt_sem_detach(&spi_control->xfer_lock);
+    while(spi_slave != RT_NULL)
+    {
+        next_slave = spi_slave->next;
+        gpio_release(spi_slave->plat_slave.cs_pin);
+        rt_free(spi_slave);
+        spi_slave = next_slave;
+    }
+    //mask isr
+    rt_hw_interrupt_mask(spi_control->irq);
+    //release sem ..
+    rt_sem_detach(&spi_control->xfer_lock);
 
-	//free the control malloc .
-	rt_free(spi_control);
+    //free the control malloc .
+    rt_free(spi_control);
     //fixme free all the malloc data ...
 
     return 0;
@@ -835,20 +835,20 @@ void rt_hw_spi_init(void)
 
 }
 #if(0)
-#define TEST_SPI_BUFF_SIZE			0x100
+#define TEST_SPI_BUFF_SIZE          0x100
 static rt_uint8_t tx_buf[TEST_SPI_BUFF_SIZE] = {0};
 static rt_uint8_t rx_buf[TEST_SPI_BUFF_SIZE] = {0};
 int ssi_test(void){
-	struct rt_spi_device * rt_spi_device;
+    struct rt_spi_device * rt_spi_device;
 
-	int ret;
-	rt_spi_device = (struct rt_spi_device *)rt_device_find("ssi1_0");
+    int ret;
+    rt_spi_device = (struct rt_spi_device *)rt_device_find("ssi1_0");
 
-	if(rt_spi_device == RT_NULL)
-	{
-		rt_kprintf("%s spi device %s not found!\r\n",__func__ ,"ssi1_0");
-		return -RT_ENOSYS;
-	}
+    if(rt_spi_device == RT_NULL)
+    {
+        rt_kprintf("%s spi device %s not found!\r\n",__func__ ,"ssi1_0");
+        return -RT_ENOSYS;
+    }
 
     /* config spi */
     {
@@ -865,7 +865,7 @@ int ssi_test(void){
 
     ret = rt_memcmp(tx_buf,rx_buf,TEST_SPI_BUFF_SIZE);
     if(ret != 0){
-    	rt_kprintf("compare error ..error data %x\n",ret);
+        rt_kprintf("compare error ..error data %x\n",ret);
     }
     rt_kprintf("test done \n");
     return 0;
diff --git a/bsp/fh8620/drivers/ssi.h b/bsp/fh8620/drivers/ssi.h
index 3559729ca3..bad2df8381 100644
--- a/bsp/fh8620/drivers/ssi.h
+++ b/bsp/fh8620/drivers/ssi.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef SSI_H_
 #define SSI_H_
 #include "libraries/inc/fh_driverlib.h"
@@ -32,37 +32,37 @@
 #include "fh_dma.h"
 #define SPI_PRIV(drv)   ( (struct fh_spi_obj)(drv->priv) )
 
-#define FH_SPI_SLAVE_MAX_NO			2
+#define FH_SPI_SLAVE_MAX_NO         2
 
 struct spi_controller;
 //platform use below
 struct spi_slave_platform_data{
 
-	rt_uint32_t cs_pin;
-#define ACTIVE_LOW			1
-#define ACTIVE_HIGH			2
-	rt_uint32_t actice_level;
+    rt_uint32_t cs_pin;
+#define ACTIVE_LOW          1
+#define ACTIVE_HIGH         2
+    rt_uint32_t actice_level;
 };
 
 
 struct spi_control_platform_data{
-	rt_uint32_t id;
-	rt_uint32_t irq;
-	rt_uint32_t base;
-	rt_uint32_t max_hz;
-	rt_uint32_t slave_no;
-	rt_uint32_t clk_in;
-	//handshake no...
-	rt_uint32_t rx_hs_no;
-	rt_uint32_t tx_hs_no;
+    rt_uint32_t id;
+    rt_uint32_t irq;
+    rt_uint32_t base;
+    rt_uint32_t max_hz;
+    rt_uint32_t slave_no;
+    rt_uint32_t clk_in;
+    //handshake no...
+    rt_uint32_t rx_hs_no;
+    rt_uint32_t tx_hs_no;
 
-	char *dma_name;
-	//isr will be the default...
-#define USE_ISR_TRANSFER			0
-#define USE_DMA_TRANSFER			1
-	rt_uint32_t transfer_mode;
-	struct spi_controller *control;
-	struct spi_slave_platform_data plat_slave[FH_SPI_SLAVE_MAX_NO];
+    char *dma_name;
+    //isr will be the default...
+#define USE_ISR_TRANSFER            0
+#define USE_DMA_TRANSFER            1
+    rt_uint32_t transfer_mode;
+    struct spi_controller *control;
+    struct spi_slave_platform_data plat_slave[FH_SPI_SLAVE_MAX_NO];
 
 };
 
@@ -81,15 +81,15 @@ struct spi_slave_info
 
 struct spi_dma
 {
-	char *dma_name;
-#define DMA_BIND_OK			0
-#define DMA_BIND_ERROR		1
-	rt_uint32_t dma_flag;
+    char *dma_name;
+#define DMA_BIND_OK         0
+#define DMA_BIND_ERROR      1
+    rt_uint32_t dma_flag;
     //bind to the dma dev..
-	rt_uint32_t rx_hs;
-	rt_uint32_t tx_hs;
-	rt_uint8_t *rx_dummy_buff;
-	rt_uint8_t *tx_dummy_buff;
+    rt_uint32_t rx_hs;
+    rt_uint32_t tx_hs;
+    rt_uint8_t *rx_dummy_buff;
+    rt_uint8_t *tx_dummy_buff;
     struct rt_dma_device *dma_dev;
     struct dma_transfer tx_trans;
     struct dma_transfer rx_trans;
@@ -98,28 +98,28 @@ struct spi_dma
 
 struct spi_controller
 {
-	rt_uint32_t id;
-	rt_uint32_t irq;
-	rt_uint32_t base;
-	rt_uint32_t max_hz;
-	rt_uint32_t slave_no;
-	rt_uint32_t clk_in;
-	//bind to the platform data....
-	struct spi_control_platform_data *plat_data;
+    rt_uint32_t id;
+    rt_uint32_t irq;
+    rt_uint32_t base;
+    rt_uint32_t max_hz;
+    rt_uint32_t slave_no;
+    rt_uint32_t clk_in;
+    //bind to the platform data....
+    struct spi_control_platform_data *plat_data;
 
-	//rt_uint32_t dma_xfer_flag;
+    //rt_uint32_t dma_xfer_flag;
 
-#define XFER_USE_ISR		0
-#define XFER_USE_DMA		1
-	rt_uint32_t xfer_mode;
+#define XFER_USE_ISR        0
+#define XFER_USE_DMA        1
+    rt_uint32_t xfer_mode;
 
-	struct spi_dma dma;
-	rt_uint32_t dma_complete_times;
+    struct spi_dma dma;
+    rt_uint32_t dma_complete_times;
     struct rt_spi_bus spi_bus;
     struct spi_slave_info *spi_slave;
     struct rt_spi_message* current_message;
     struct rt_completion transfer_completion;
-	struct rt_semaphore xfer_lock;
+    struct rt_semaphore xfer_lock;
     struct fh_spi_obj obj;
     rt_uint32_t received_len;
     rt_uint32_t transfered_len;
diff --git a/bsp/fh8620/drivers/trap.c b/bsp/fh8620/drivers/trap.c
index 7d81057956..b12004918a 100644
--- a/bsp/fh8620/drivers/trap.c
+++ b/bsp/fh8620/drivers/trap.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include 
 #include 
 #include "fh_arch.h"
@@ -47,13 +47,13 @@ extern long list_thread(void);
 
 void rt_hw_show_register (struct rt_hw_register *regs)
 {
-	rt_kprintf("Execption:\n");
-	rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
-	rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
-	rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
-	rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
-	rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
-	rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
+    rt_kprintf("Execption:\n");
+    rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
+    rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
+    rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
+    rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
+    rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
+    rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
 }
 
 /**
@@ -66,15 +66,15 @@ void rt_hw_show_register (struct rt_hw_register *regs)
  */
 void rt_hw_trap_udef(struct rt_hw_register *regs)
 {
-	rt_hw_show_register(regs);
+    rt_hw_show_register(regs);
 
-	rt_kprintf("undefined instruction\n");
-	rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
+    rt_kprintf("undefined instruction\n");
+    rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
 
 #ifdef RT_USING_FINSH
-	list_thread();
+    list_thread();
 #endif
-	rt_hw_cpu_shutdown();
+    rt_hw_cpu_shutdown();
 }
 
 /**
@@ -88,10 +88,10 @@ void rt_hw_trap_udef(struct rt_hw_register *regs)
  */
 void rt_hw_trap_swi(struct rt_hw_register *regs)
 {
-	rt_hw_show_register(regs);
+    rt_hw_show_register(regs);
 
-	rt_kprintf("software interrupt\n");
-	rt_hw_cpu_shutdown();
+    rt_kprintf("software interrupt\n");
+    rt_hw_cpu_shutdown();
 }
 
 /**
@@ -104,15 +104,15 @@ void rt_hw_trap_swi(struct rt_hw_register *regs)
  */
 void rt_hw_trap_pabt(struct rt_hw_register *regs)
 {
-	rt_hw_show_register(regs);
+    rt_hw_show_register(regs);
 
-	rt_kprintf("prefetch abort\n");
-	rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
+    rt_kprintf("prefetch abort\n");
+    rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
 
 #ifdef RT_USING_FINSH
-	list_thread();
+    list_thread();
 #endif
-	rt_hw_cpu_shutdown();
+    rt_hw_cpu_shutdown();
 }
 
 /**
@@ -125,15 +125,15 @@ void rt_hw_trap_pabt(struct rt_hw_register *regs)
  */
 void rt_hw_trap_dabt(struct rt_hw_register *regs)
 {
-	rt_hw_show_register(regs);
+    rt_hw_show_register(regs);
 
-	rt_kprintf("data abort\n");
-	rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
+    rt_kprintf("data abort\n");
+    rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
 
 #ifdef RT_USING_FINSH
-	list_thread();
+    list_thread();
 #endif
-	rt_hw_cpu_shutdown();
+    rt_hw_cpu_shutdown();
 }
 
 /**
@@ -145,45 +145,45 @@ void rt_hw_trap_dabt(struct rt_hw_register *regs)
  */
 void rt_hw_trap_resv(struct rt_hw_register *regs)
 {
-	rt_kprintf("not used\n");
-	rt_hw_show_register(regs);
-	rt_hw_cpu_shutdown();
+    rt_kprintf("not used\n");
+    rt_hw_show_register(regs);
+    rt_hw_cpu_shutdown();
 }
 
 extern struct rt_irq_desc irq_desc[];
 
 void rt_hw_trap_irq()
 {
-	rt_isr_handler_t isr_func;
-	rt_uint32_t irqstat_l, irqstat_h, irq;
-	void *param;
+    rt_isr_handler_t isr_func;
+    rt_uint32_t irqstat_l, irqstat_h, irq;
+    void *param;
 
-	fh_intc *p = (fh_intc *)INTC_REG_BASE;
+    fh_intc *p = (fh_intc *)INTC_REG_BASE;
 
-	irqstat_l = p->IRQ_FINALSTATUS_L;
-	irqstat_h = p->IRQ_FINALSTATUS_H;
-	if (irqstat_l)
-	{
-		irq = __rt_ffs(irqstat_l) - 1;
-	}
-	else if(irqstat_h)
-	{
-		irq = __rt_ffs(irqstat_h) - 1 + 32;
-	}
-	else
-	{
-		rt_kprintf("No interrupt occur\n");
-		return;
-	}
+    irqstat_l = p->IRQ_FINALSTATUS_L;
+    irqstat_h = p->IRQ_FINALSTATUS_H;
+    if (irqstat_l)
+    {
+        irq = __rt_ffs(irqstat_l) - 1;
+    }
+    else if(irqstat_h)
+    {
+        irq = __rt_ffs(irqstat_h) - 1 + 32;
+    }
+    else
+    {
+        rt_kprintf("No interrupt occur\n");
+        return;
+    }
 
-	/* get interrupt service routine */
-	isr_func = irq_desc[irq].handler;
-	param = irq_desc[irq].param;
+    /* get interrupt service routine */
+    isr_func = irq_desc[irq].handler;
+    param = irq_desc[irq].param;
 
-	/* turn to interrupt service routine */
-	if(isr_func){
-		isr_func(irq, param);
-	}
+    /* turn to interrupt service routine */
+    if(isr_func){
+        isr_func(irq, param);
+    }
 #ifdef RT_USING_INTERRUPT_INFO
     irq_desc[irq].counter ++;
 #endif
@@ -191,7 +191,7 @@ void rt_hw_trap_irq()
 
 void rt_hw_trap_fiq()
 {
-	rt_kprintf("fast interrupt request\n");
+    rt_kprintf("fast interrupt request\n");
 }
 
 /*@}*/
diff --git a/bsp/fh8620/drivers/uart.c b/bsp/fh8620/drivers/uart.c
index 4b264d9206..89df32d753 100644
--- a/bsp/fh8620/drivers/uart.c
+++ b/bsp/fh8620/drivers/uart.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include 
 #include 
 #include "fh_arch.h"
@@ -32,35 +32,35 @@
 
 void rt_fh_uart_handler(int vector, void *param)
 {
-	int status;
-	unsigned int ret;
-	struct fh_uart *uart;
-	unsigned int reg_status;
-	rt_device_t dev = (rt_device_t)param;
-	uart = (struct fh_uart *)dev->user_data;
-	status = uart_get_iir_status(uart->uart_port);
-	if (status & UART_IIR_NOINT)
-	{
-		return;
-	}
-	if(status & UART_IIR_THREMPTY){
-		//first close tx isr
-		uart_disable_irq(uart->uart_port,UART_IER_ETBEI);
+    int status;
+    unsigned int ret;
+    struct fh_uart *uart;
+    unsigned int reg_status;
+    rt_device_t dev = (rt_device_t)param;
+    uart = (struct fh_uart *)dev->user_data;
+    status = uart_get_iir_status(uart->uart_port);
+    if (status & UART_IIR_NOINT)
+    {
+        return;
+    }
+    if(status & UART_IIR_THREMPTY){
+        //first close tx isr
+        uart_disable_irq(uart->uart_port,UART_IER_ETBEI);
 
-		rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_TX_DONE);
-	}
-	else if((status & UART_IIR_CHRTOUT)==UART_IIR_CHRTOUT){
-		//bug....
-		//if no data in rx fifo
-		reg_status = uart_get_status(uart->uart_port);
-		if((reg_status & 1<<3) == 0)
-			ret = uart_getc(uart->uart_port);
-	}
-	else{
-		rt_interrupt_enter();
-		rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_RX_IND);
-		rt_interrupt_leave();
-	}
+        rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_TX_DONE);
+    }
+    else if((status & UART_IIR_CHRTOUT)==UART_IIR_CHRTOUT){
+        //bug....
+        //if no data in rx fifo
+        reg_status = uart_get_status(uart->uart_port);
+        if((reg_status & 1<<3) == 0)
+            ret = uart_getc(uart->uart_port);
+    }
+    else{
+        rt_interrupt_enter();
+        rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_RX_IND);
+        rt_interrupt_leave();
+    }
 }
 
 /**
@@ -69,67 +69,67 @@ void rt_fh_uart_handler(int vector, void *param)
 static rt_err_t fh_uart_configure(struct rt_serial_device *serial,
                                 struct serial_configure *cfg)
 {
-	int div;
-	enum data_bits data_mode;
-	enum stop_bits stop_mode;
-	enum parity parity_mode;
-	struct fh_uart *uart;
+    int div;
+    enum data_bits data_mode;
+    enum stop_bits stop_mode;
+    enum parity parity_mode;
+    struct fh_uart *uart;
 
-	RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(serial != RT_NULL);
     RT_ASSERT(cfg != RT_NULL);
-	uart = (struct fh_uart *)serial->parent.user_data;
+    uart = (struct fh_uart *)serial->parent.user_data;
 
-	switch (cfg->data_bits)
-	{
-	case DATA_BITS_8:
-		data_mode = UART_DATA_BIT8;
-		break;
-	case DATA_BITS_7:
-		data_mode = UART_DATA_BIT7;
-		break;
-	case DATA_BITS_6:
-		data_mode = UART_DATA_BIT6;
-		break;
-	case DATA_BITS_5:
-		data_mode = UART_DATA_BIT5;
-		break;
-	default:
-		data_mode = UART_DATA_BIT8;
-		break;
-	}
+    switch (cfg->data_bits)
+    {
+    case DATA_BITS_8:
+        data_mode = UART_DATA_BIT8;
+        break;
+    case DATA_BITS_7:
+        data_mode = UART_DATA_BIT7;
+        break;
+    case DATA_BITS_6:
+        data_mode = UART_DATA_BIT6;
+        break;
+    case DATA_BITS_5:
+        data_mode = UART_DATA_BIT5;
+        break;
+    default:
+        data_mode = UART_DATA_BIT8;
+        break;
+    }
 
-	switch (cfg->stop_bits)
-	{
-	case STOP_BITS_2:
-		stop_mode = UART_STOP_BIT2;
-		break;
-	case STOP_BITS_1:
-	default:
-		stop_mode = UART_STOP_BIT1;
-		break;
-	}
+    switch (cfg->stop_bits)
+    {
+    case STOP_BITS_2:
+        stop_mode = UART_STOP_BIT2;
+        break;
+    case STOP_BITS_1:
+    default:
+        stop_mode = UART_STOP_BIT1;
+        break;
+    }
 
-	switch (cfg->parity)
-	{
-	case PARITY_ODD:
-		parity_mode = UART_PARITY_ODD;
-		break;
-	case PARITY_EVEN:
-		parity_mode = UART_PARITY_EVEN;
-		break;
-	case PARITY_NONE:
-	default:
-		parity_mode = UART_PARITY_NONE;
-		break;
-	}
+    switch (cfg->parity)
+    {
+    case PARITY_ODD:
+        parity_mode = UART_PARITY_ODD;
+        break;
+    case PARITY_EVEN:
+        parity_mode = UART_PARITY_EVEN;
+        break;
+    case PARITY_NONE:
+    default:
+        parity_mode = UART_PARITY_NONE;
+        break;
+    }
 
     uart_disable_irq(uart->uart_port, UART_IER_ERBFI);
 
-	uart_configure(uart->uart_port, data_mode,
-					stop_mode, parity_mode,
-					cfg->baud_rate, UART_CLOCK_FREQ);
+    uart_configure(uart->uart_port, data_mode,
+                    stop_mode, parity_mode,
+                    cfg->baud_rate, UART_CLOCK_FREQ);
 
-	uart_enable_irq(uart->uart_port, UART_IER_ERBFI);
+    uart_enable_irq(uart->uart_port, UART_IER_ERBFI);
 
     return RT_EOK;
 }
@@ -146,13 +146,13 @@ static rt_err_t fh_uart_control(struct rt_serial_device *serial,
     {
     case RT_DEVICE_CTRL_CLR_INT:
         /* disable rx irq */
-		rt_hw_interrupt_mask(uart->irq);
-		uart_disable_irq(uart->uart_port,UART_IER_ERBFI);
+        rt_hw_interrupt_mask(uart->irq);
+        uart_disable_irq(uart->uart_port,UART_IER_ERBFI);
         break;
     case RT_DEVICE_CTRL_SET_INT:
         /* enable rx irq */
-		rt_hw_interrupt_umask(uart->irq);
-		uart_enable_irq(uart->uart_port,UART_IER_ERBFI);
+        rt_hw_interrupt_umask(uart->irq);
+        uart_enable_irq(uart->uart_port,UART_IER_ERBFI);
         break;
     }
 
@@ -161,33 +161,33 @@ static rt_err_t fh_uart_control(struct rt_serial_device *serial,
 
 static int fh_uart_putc(struct rt_serial_device *serial, char c)
 {
-	struct fh_uart *uart = serial->parent.user_data;
-	unsigned int ret;
-	ret = uart_get_status(uart->uart_port);
-	if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX){
-		//RT_DEVICE_FLAG_INT_TX
+    struct fh_uart *uart = serial->parent.user_data;
+    unsigned int ret;
+    ret = uart_get_status(uart->uart_port);
+    if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX){
+        //RT_DEVICE_FLAG_INT_TX
 
-		if(c == '\n'){
-			fh_uart_putc(serial,'\r');
-		}
-		if(ret & UART_USR_TFNF){
-			uart_putc(uart->uart_port, c);
-			return 1;
-		}
-		//open tx isr here..
-		uart_enable_irq(uart->uart_port,UART_IER_ETBEI);
-	    return -1;
-	}
-	//poll mode
-	else{
+        if(c == '\n'){
+            fh_uart_putc(serial,'\r');
+        }
+        if(ret & UART_USR_TFNF){
+            uart_putc(uart->uart_port, c);
+            return 1;
+        }
+        //open tx isr here..
+        uart_enable_irq(uart->uart_port,UART_IER_ETBEI);
+        return -1;
+    }
+    //poll mode
+    else{
 
-		while(!(uart_get_status(uart->uart_port) & UART_USR_TFNF))
-			;
-		uart_putc(uart->uart_port, c);
-		return 1;
+        while(!(uart_get_status(uart->uart_port) & UART_USR_TFNF))
+            ;
+        uart_putc(uart->uart_port, c);
+        return 1;
 
 
-	}
+    }
 
 
 
@@ -196,16 +196,16 @@ static int fh_uart_putc(struct rt_serial_device *serial, char c)
 static int fh_uart_getc(struct rt_serial_device *serial)
 {
     int result;
-	struct fh_uart *uart = serial->parent.user_data;
+    struct fh_uart *uart = serial->parent.user_data;
 
-	if (uart_is_rx_ready(uart->uart_port))
-	{
-		result = uart_getc(uart->uart_port);
-	}
-	else
-	{
-		result = -1;
-	}
+    if (uart_is_rx_ready(uart->uart_port))
+    {
+        result = uart_getc(uart->uart_port);
+    }
+    else
+    {
+        result = -1;
+    }
 
     return result;
 }
@@ -222,8 +222,8 @@ static const struct rt_uart_ops fh_uart_ops =
 #if defined(RT_USING_UART0)
 static struct rt_serial_device serial0;
 struct fh_uart uart0 = {
-	(uart *)UART0_REG_BASE,
-	UART0_IRQn
+    (uart *)UART0_REG_BASE,
+    UART0_IRQn
 };
 
 #endif
@@ -231,8 +231,8 @@ struct fh_uart uart0 = {
 #if defined(RT_USING_UART1)
 static struct rt_serial_device serial1;
 struct fh_uart uart1 = {
-	(uart *)UART1_REG_BASE,
-	UART1_IRQn
+    (uart *)UART1_REG_BASE,
+    UART1_IRQn
 };
 
 #endif
@@ -245,45 +245,45 @@ struct fh_uart uart1 = {
  */
 void rt_hw_uart_init(void)
 {
-	struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
 
 #if defined(RT_USING_UART0)
 #if(0)
-	serial0.ops = &fh_uart_ops;
-	serial0.config = config;
+    serial0.ops = &fh_uart_ops;
+    serial0.config = config;
 
-	/* register vcom device */
-	rt_hw_serial_register(&serial0, "uart0",
-			RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_STANDALONE,
-			&uart0);
-	rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler,
-			(void *)&(serial0.parent), "UART0");
-	rt_hw_interrupt_umask(uart0.irq);
+    /* register vcom device */
+    rt_hw_serial_register(&serial0, "uart0",
+            RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_STANDALONE,
+            &uart0);
+    rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler,
+            (void *)&(serial0.parent), "UART0");
+    rt_hw_interrupt_umask(uart0.irq);
 #endif
-	serial0.ops = &fh_uart_ops;
-	serial0.config = config;
+    serial0.ops = &fh_uart_ops;
+    serial0.config = config;
 
-	/* register vcom device */
-	rt_hw_serial_register(&serial0, "uart0",
-			RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM ,
-			&uart0);
-	rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler,
-			(void *)&(serial0.parent), "UART0");
-	rt_hw_interrupt_umask(uart0.irq);
+    /* register vcom device */
+    rt_hw_serial_register(&serial0, "uart0",
+            RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM ,
+            &uart0);
+    rt_hw_interrupt_install(uart0.irq, rt_fh_uart_handler,
+            (void *)&(serial0.parent), "UART0");
+    rt_hw_interrupt_umask(uart0.irq);
 
 #endif
 
 #if defined(RT_USING_UART1)
-	serial1.ops = &fh_uart_ops;
-	serial1.config = config;
+    serial1.ops = &fh_uart_ops;
+    serial1.config = config;
 
-	/* register vcom device */
-	rt_hw_serial_register(&serial1, "uart1",
-			RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM ,
-			&uart1);
-	rt_hw_interrupt_install(uart1.irq, rt_fh_uart_handler,
-			(void *)&(serial1.parent), "UART1");
-	rt_hw_interrupt_umask(uart1.irq);
+    /* register vcom device */
+    rt_hw_serial_register(&serial1, "uart1",
+            RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM ,
+            &uart1);
+    rt_hw_interrupt_install(uart1.irq, rt_fh_uart_handler,
+            (void *)&(serial1.parent), "UART1");
+    rt_hw_interrupt_umask(uart1.irq);
 
 #endif
 
diff --git a/bsp/fh8620/drivers/uart.h b/bsp/fh8620/drivers/uart.h
index d4459f02f8..c7af24523b 100644
--- a/bsp/fh8620/drivers/uart.h
+++ b/bsp/fh8620/drivers/uart.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef UART_H_
 #define UART_H_
 
diff --git a/bsp/fh8620/drivers/wdt.c b/bsp/fh8620/drivers/wdt.c
index 1d67007a6a..f7f292df86 100644
--- a/bsp/fh8620/drivers/wdt.c
+++ b/bsp/fh8620/drivers/wdt.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include "fh_def.h"
 #include "wdt.h"
 #include "interrupt.h"
diff --git a/bsp/fh8620/drivers/wdt.h b/bsp/fh8620/drivers/wdt.h
index 768a2e0739..71673d24aa 100644
--- a/bsp/fh8620/drivers/wdt.h
+++ b/bsp/fh8620/drivers/wdt.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef WDT_H_
 #define WDT_H_
 
diff --git a/bsp/fh8620/libraries/driverlib/fh_gpio.c b/bsp/fh8620/libraries/driverlib/fh_gpio.c
index e3e58f9a1f..7c39386968 100644
--- a/bsp/fh8620/libraries/driverlib/fh_gpio.c
+++ b/bsp/fh8620/libraries/driverlib/fh_gpio.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,10 +18,10 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
- 
\ No newline at end of file
+
+
diff --git a/bsp/fh8620/libraries/driverlib/fh_i2c.c b/bsp/fh8620/libraries/driverlib/fh_i2c.c
index 661703e71c..cc91561b9f 100644
--- a/bsp/fh8620/libraries/driverlib/fh_i2c.c
+++ b/bsp/fh8620/libraries/driverlib/fh_i2c.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include "inc/fh_driverlib.h"
 
 int I2C_WaitMasterIdle(struct fh_i2c_obj *i2c_obj)
diff --git a/bsp/fh8620/libraries/driverlib/fh_ictl.c b/bsp/fh8620/libraries/driverlib/fh_ictl.c
index a53c8dba34..10edbb27ff 100644
--- a/bsp/fh8620/libraries/driverlib/fh_ictl.c
+++ b/bsp/fh8620/libraries/driverlib/fh_ictl.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,25 +18,25 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include "inc/fh_driverlib.h"
 
 
 
 void ictl_close_all_isr(fh_intc *p){
-	if(p){
-		//enable all interrupts
-		p->IRQ_EN_L = 0xffffffff;
-		p->IRQ_EN_H = 0xffffffff;
-		//mask all  interrupts
-		p->IRQ_MASK_L = 0xffffffff;
-		p->IRQ_MASK_H = 0xffffffff;
-	}
+    if(p){
+        //enable all interrupts
+        p->IRQ_EN_L = 0xffffffff;
+        p->IRQ_EN_H = 0xffffffff;
+        //mask all  interrupts
+        p->IRQ_MASK_L = 0xffffffff;
+        p->IRQ_MASK_H = 0xffffffff;
+    }
 
 }
 
@@ -44,13 +44,13 @@ void ictl_close_all_isr(fh_intc *p){
 
 
 void ictl_mask_isr(fh_intc *p,int irq){
-	if(p){
+    if(p){
 
-		if (irq < 32)
-	    	p->IRQ_MASK_L |= (1 << irq);
-		else
-			p->IRQ_MASK_H |= (1 << (irq - 32));
-	}
+        if (irq < 32)
+            p->IRQ_MASK_L |= (1 << irq);
+        else
+            p->IRQ_MASK_H |= (1 << (irq - 32));
+    }
 }
 
 
@@ -58,12 +58,12 @@ void ictl_mask_isr(fh_intc *p,int irq){
 
 
 void ictl_unmask_isr(fh_intc *p,int irq){
-	if(p){
-	    if (irq < 32)
-	    	p->IRQ_MASK_L &= ~(1 << irq);
-		else
-			p->IRQ_MASK_H &= ~(1 << (irq - 32));
+    if(p){
+        if (irq < 32)
+            p->IRQ_MASK_L &= ~(1 << irq);
+        else
+            p->IRQ_MASK_H &= ~(1 << (irq - 32));
 
-	}
+    }
 
 }
diff --git a/bsp/fh8620/libraries/driverlib/fh_mmc.c b/bsp/fh8620/libraries/driverlib/fh_mmc.c
index 5995e634fa..0b644d29e5 100644
--- a/bsp/fh8620/libraries/driverlib/fh_mmc.c
+++ b/bsp/fh8620/libraries/driverlib/fh_mmc.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/fh8620/libraries/driverlib/fh_pwm.c b/bsp/fh8620/libraries/driverlib/fh_pwm.c
index af19110a46..7b71e78f2b 100644
--- a/bsp/fh8620/libraries/driverlib/fh_pwm.c
+++ b/bsp/fh8620/libraries/driverlib/fh_pwm.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/fh8620/libraries/driverlib/fh_sdio.c b/bsp/fh8620/libraries/driverlib/fh_sdio.c
index 8c9e69e07d..edc4151068 100644
--- a/bsp/fh8620/libraries/driverlib/fh_sdio.c
+++ b/bsp/fh8620/libraries/driverlib/fh_sdio.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -34,15 +34,15 @@
 #define SDC_USE_IDMA
 
 #define INSTRUCTIONS_PER_USEC          1000
-#define CMD_TIMEOUT_USEC 	               100000 
-#define DATA_READY_TIMEOUT_USEC 	200000
+#define CMD_TIMEOUT_USEC                   100000
+#define DATA_READY_TIMEOUT_USEC     200000
 #define DMA_TRANSFER_TIMEOUT_TICKS 300
 #define DATA_TRANSFER_OVER_TIMEOUT_USEC 1000
 #define ACMD41_RETRY_COUNT                             1000//100000
 
-#define CIU_CLK		       50000//25000//25000 //27MHz
-#define MMC_FOD_VALUE  125	/* 125 KHz */
-#define NORM_FOD_VALUE  25000//5000//25000	/* 25 MHz */
+#define CIU_CLK            50000//25000//25000 //27MHz
+#define MMC_FOD_VALUE  125  /* 125 KHz */
+#define NORM_FOD_VALUE  25000//5000//25000  /* 25 MHz */
 #define MMC_FOD_DIVIDER_VALUE   (((CIU_CLK+MMC_FOD_VALUE*2-1)/(MMC_FOD_VALUE*2)))
 #ifdef SDCARD_CLK_DIVIDER
 #define ONE_BIT_BUS_FREQ   SDCARD_CLK_DIVIDER
@@ -56,1118 +56,1118 @@ static sdc_t sdc_array[2];
 
 static void plat_loop(unsigned int macrosecond)
 {
-	unsigned int clk;
-	
-	while (macrosecond-- > 0) {
-		for(clk=INSTRUCTIONS_PER_USEC; clk>0; clk--);
-	}
+    unsigned int clk;
+
+    while (macrosecond-- > 0) {
+        for(clk=INSTRUCTIONS_PER_USEC; clk>0; clk--);
+    }
 }
 
 static int synopmob_execute_command(unsigned int base, unsigned int cmd_register, unsigned int arg_register)
 {
-	unsigned int retries = CMD_TIMEOUT_USEC;
+    unsigned int retries = CMD_TIMEOUT_USEC;
 
-	synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts, FIXME
-	synopmob_set_register(base+CMDARG, arg_register);
-	synopmob_set_register(base+CMD, cmd_register | (0x80000000|0x20000000/*fixed to use hold*/));
+    synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts, FIXME
+    synopmob_set_register(base+CMDARG, arg_register);
+    synopmob_set_register(base+CMD, cmd_register | (0x80000000|0x20000000/*fixed to use hold*/));
 
-	while (retries-- > 0) {
-		if (!(synopmob_read_register(base+CMD) & 0x80000000/*CMD done bit*/))
-			return 0;
-		plat_loop(1);
-	}
-	
-	return ERRCMDRETRIESOVER;
+    while (retries-- > 0) {
+        if (!(synopmob_read_register(base+CMD) & 0x80000000/*CMD done bit*/))
+            return 0;
+        plat_loop(1);
+    }
+
+    return ERRCMDRETRIESOVER;
 }
 
 static int synopmob_wait_command_done(unsigned int base, unsigned int* inst, unsigned int flag)
 {
-	unsigned int retries = CMD_TIMEOUT_USEC;
-	unsigned int sts;
+    unsigned int retries = CMD_TIMEOUT_USEC;
+    unsigned int sts;
 
-	while (retries-- > 0) {
-		sts = synopmob_read_register(base+RINTSTS);
-		if (sts && ((sts & flag) == flag) ) {
-			*inst = sts;
-			return 0;
-		}
-		plat_loop(1);
-	}
-	return ERRCMDRETRIESOVER;
+    while (retries-- > 0) {
+        sts = synopmob_read_register(base+RINTSTS);
+        if (sts && ((sts & flag) == flag) ) {
+            *inst = sts;
+            return 0;
+        }
+        plat_loop(1);
+    }
+    return ERRCMDRETRIESOVER;
 }
 
 static int synopmob_wait_data_ready(unsigned int base)
 {
-	unsigned int retries = DATA_READY_TIMEOUT_USEC;
+    unsigned int retries = DATA_READY_TIMEOUT_USEC;
 
-	while (retries-- > 0) {
-		if  (!((synopmob_read_register(base+STATUS)) & 0x00000200)) {
-			return 0;
-		}
-		
-		plat_loop(1);
-	}
-	return ERRDATANOTREADY;
+    while (retries-- > 0) {
+        if  (!((synopmob_read_register(base+STATUS)) & 0x00000200)) {
+            return 0;
+        }
+
+        plat_loop(1);
+    }
+    return ERRDATANOTREADY;
 }
 
 static int synopmob_handle_standard_rinsts(unsigned int raw_int_stat)
 {
-	int error_status = 0;
-	
-	if ( raw_int_stat &  INTMASK_ERROR) {
-		if (raw_int_stat & INTMSK_RESP_ERR) {
-			error_status = ERRRESPRECEP;
-		}
-		if (raw_int_stat & INTMSK_RCRC) {
-			error_status = ERRRESPCRC;
-		}
-		if (raw_int_stat & INTMSK_DCRC) {
-			error_status = ERRDCRC;
-		}		
-		if (raw_int_stat & INTMSK_RTO) {
-			error_status = ERRRESPTIMEOUT;
-		}		
-		if (raw_int_stat & INTMSK_DTO) {
-			error_status = ERRDRTIMEOUT;
-		}
-		if (raw_int_stat & INTMSK_HTO) {
-			error_status = ERRUNDERWRITE;
-		}
-		if (raw_int_stat & INTMSK_FRUN) {
-			error_status = ERROVERREAD;
-		}
-		if (raw_int_stat & INTMSK_HLE) {
-			error_status = ERRHLE;
-		}
-		if (raw_int_stat & INTMSK_SBE) {
-			error_status = ERRSTARTBIT;
-		}		
-		if (raw_int_stat & INTMSK_EBE) {
-			error_status = ERRENDBITERR;
-		}
-	}
+    int error_status = 0;
+
+    if ( raw_int_stat &  INTMASK_ERROR) {
+        if (raw_int_stat & INTMSK_RESP_ERR) {
+            error_status = ERRRESPRECEP;
+        }
+        if (raw_int_stat & INTMSK_RCRC) {
+            error_status = ERRRESPCRC;
+        }
+        if (raw_int_stat & INTMSK_DCRC) {
+            error_status = ERRDCRC;
+        }
+        if (raw_int_stat & INTMSK_RTO) {
+            error_status = ERRRESPTIMEOUT;
+        }
+        if (raw_int_stat & INTMSK_DTO) {
+            error_status = ERRDRTIMEOUT;
+        }
+        if (raw_int_stat & INTMSK_HTO) {
+            error_status = ERRUNDERWRITE;
+        }
+        if (raw_int_stat & INTMSK_FRUN) {
+            error_status = ERROVERREAD;
+        }
+        if (raw_int_stat & INTMSK_HLE) {
+            error_status = ERRHLE;
+        }
+        if (raw_int_stat & INTMSK_SBE) {
+            error_status = ERRSTARTBIT;
+        }
+        if (raw_int_stat & INTMSK_EBE) {
+            error_status = ERRENDBITERR;
+        }
+    }
 
 //SDIO_PRINTF("------- %s, line %d raw_int_stat = %08x-------\n", __FUNCTION__, __LINE__, raw_int_stat);
-	return error_status;
+    return error_status;
 }
 
 static int synopmob_check_r1_resp(unsigned int the_response)
 {
-	int retval = 0;
-	
-	if (the_response & R1CS_ERROR_OCCURED_MAP) {
-		if (the_response & R1CS_ADDRESS_OUT_OF_RANGE) {
-			retval = ERRADDRESSRANGE;
-		} else if (the_response & R1CS_ADDRESS_MISALIGN) {
-			retval = ERRADDRESSMISALIGN;
-		} else if (the_response & R1CS_BLOCK_LEN_ERR) {
-			retval = ERRBLOCKLEN;
-		} else if (the_response & R1CS_ERASE_SEQ_ERR) {
-			retval = ERRERASESEQERR;
-		} else if (the_response & R1CS_ERASE_PARAM) {
-			retval = ERRERASEPARAM;
-		} else if (the_response & R1CS_WP_VIOLATION) {
-			retval = ERRPROT;
-		} else if (the_response & R1CS_CARD_IS_LOCKED) {
-			retval = ERRCARDLOCKED;
-		} else if (the_response & R1CS_LCK_UNLCK_FAILED) {
-			retval = ERRCARDLOCKED;
-		} else if (the_response & R1CS_COM_CRC_ERROR) {
-			retval = ERRCRC;
-		} else if (the_response & R1CS_ILLEGAL_COMMAND) {
-			retval = ERRILLEGALCOMMAND;
-		} else if (the_response & R1CS_CARD_ECC_FAILED) {
-			retval = ERRECCFAILED;
-		} else if (the_response & R1CS_CC_ERROR) {
-			retval = ERRCCERR;
-		} else if (the_response & R1CS_ERROR) {
-			retval = ERRUNKNOWN;
-		} else if (the_response & R1CS_UNDERRUN) {
-			retval = ERRUNDERRUN;
-		} else if (the_response & R1CS_OVERRUN) {
-			retval = ERROVERRUN;
-		} else if (the_response & R1CS_CSD_OVERWRITE) {
-			retval = ERRCSDOVERWRITE;
-		} else if (the_response & R1CS_WP_ERASE_SKIP) {
-			retval = ERRPROT;
-		} else if (the_response & R1CS_ERASE_RESET) {
-			retval = ERRERASERESET;
-		} else if (the_response & R1CS_SWITCH_ERROR) {
-			retval = ERRFSMSTATE;
-		}
-	}
-	
-	return retval;
+    int retval = 0;
+
+    if (the_response & R1CS_ERROR_OCCURED_MAP) {
+        if (the_response & R1CS_ADDRESS_OUT_OF_RANGE) {
+            retval = ERRADDRESSRANGE;
+        } else if (the_response & R1CS_ADDRESS_MISALIGN) {
+            retval = ERRADDRESSMISALIGN;
+        } else if (the_response & R1CS_BLOCK_LEN_ERR) {
+            retval = ERRBLOCKLEN;
+        } else if (the_response & R1CS_ERASE_SEQ_ERR) {
+            retval = ERRERASESEQERR;
+        } else if (the_response & R1CS_ERASE_PARAM) {
+            retval = ERRERASEPARAM;
+        } else if (the_response & R1CS_WP_VIOLATION) {
+            retval = ERRPROT;
+        } else if (the_response & R1CS_CARD_IS_LOCKED) {
+            retval = ERRCARDLOCKED;
+        } else if (the_response & R1CS_LCK_UNLCK_FAILED) {
+            retval = ERRCARDLOCKED;
+        } else if (the_response & R1CS_COM_CRC_ERROR) {
+            retval = ERRCRC;
+        } else if (the_response & R1CS_ILLEGAL_COMMAND) {
+            retval = ERRILLEGALCOMMAND;
+        } else if (the_response & R1CS_CARD_ECC_FAILED) {
+            retval = ERRECCFAILED;
+        } else if (the_response & R1CS_CC_ERROR) {
+            retval = ERRCCERR;
+        } else if (the_response & R1CS_ERROR) {
+            retval = ERRUNKNOWN;
+        } else if (the_response & R1CS_UNDERRUN) {
+            retval = ERRUNDERRUN;
+        } else if (the_response & R1CS_OVERRUN) {
+            retval = ERROVERRUN;
+        } else if (the_response & R1CS_CSD_OVERWRITE) {
+            retval = ERRCSDOVERWRITE;
+        } else if (the_response & R1CS_WP_ERASE_SKIP) {
+            retval = ERRPROT;
+        } else if (the_response & R1CS_ERASE_RESET) {
+            retval = ERRERASERESET;
+        } else if (the_response & R1CS_SWITCH_ERROR) {
+            retval = ERRFSMSTATE;
+        }
+    }
+
+    return retval;
 }
 
 
 static int synopmob_check_r5_resp(unsigned int the_resp)
 {
-	int ret = 0;
-	
-	if (the_resp & R5_IO_ERR_BITS) {
-		if (the_resp & R5_IO_CRC_ERR) {
-			ret = ERRDCRC;
-		} else if (the_resp & R5_IO_BAD_CMD) {
-			ret = ERRILLEGALCOMMAND;
-		} else if (the_resp & R5_IO_GEN_ERR) {
-			ret = ERRUNKNOWN;
-		} else if (the_resp & R5_IO_FUNC_ERR) {
-			ret = ERRBADFUNC;
-		} else if (the_resp & R5_IO_OUT_RANGE) {
-			ret = ERRADDRESSRANGE;
-		}
-	}
-	
-	return ret;
+    int ret = 0;
+
+    if (the_resp & R5_IO_ERR_BITS) {
+        if (the_resp & R5_IO_CRC_ERR) {
+            ret = ERRDCRC;
+        } else if (the_resp & R5_IO_BAD_CMD) {
+            ret = ERRILLEGALCOMMAND;
+        } else if (the_resp & R5_IO_GEN_ERR) {
+            ret = ERRUNKNOWN;
+        } else if (the_resp & R5_IO_FUNC_ERR) {
+            ret = ERRBADFUNC;
+        } else if (the_resp & R5_IO_OUT_RANGE) {
+            ret = ERRADDRESSRANGE;
+        }
+    }
+
+    return ret;
 }
 
 static int sd_send_cmd0(sdc_t* sdc)
 {
-	int   ret;
-	unsigned int intst;
-	unsigned int base = sdc->ip_base;
+    int   ret;
+    unsigned int intst;
+    unsigned int base = sdc->ip_base;
 
-	ret = synopmob_execute_command(base, 0x4000, 0);
-	if (!ret) {
-		ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
-		if (!ret) {
-			synopmob_set_register(base+RINTSTS, intst);
-			return synopmob_handle_standard_rinsts(intst);
-		}
-	}
+    ret = synopmob_execute_command(base, 0x4000, 0);
+    if (!ret) {
+        ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
+        if (!ret) {
+            synopmob_set_register(base+RINTSTS, intst);
+            return synopmob_handle_standard_rinsts(intst);
+        }
+    }
 
-	return ret;
+    return ret;
 }
 
 static int sd_send_cmd2(sdc_t* sdc)
 {
-	int   ret;
-	unsigned int intst;
-	unsigned int base = sdc->ip_base;
+    int   ret;
+    unsigned int intst;
+    unsigned int base = sdc->ip_base;
 
-	ret = synopmob_execute_command(base, 0xC2, 0);
-	if (!ret) {
-		ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
-		if (!ret) {
-			synopmob_set_register(base+RINTSTS, intst);
-			return synopmob_handle_standard_rinsts(intst);
-		}
-	}
+    ret = synopmob_execute_command(base, 0xC2, 0);
+    if (!ret) {
+        ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
+        if (!ret) {
+            synopmob_set_register(base+RINTSTS, intst);
+            return synopmob_handle_standard_rinsts(intst);
+        }
+    }
 
-	return ret;
+    return ret;
 }
 
 static int sd_send_cmd3(sdc_t* sdc)
 {
-	int   ret;
-	unsigned int intst;
-	unsigned int resp;
-	unsigned int base = sdc->ip_base;
+    int   ret;
+    unsigned int intst;
+    unsigned int resp;
+    unsigned int base = sdc->ip_base;
 
-	ret = synopmob_execute_command(base, 0x43, 0);
-	if (!ret) {
-		ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
-		if (!ret) {
-			synopmob_set_register(base+RINTSTS, intst);
-			ret = synopmob_handle_standard_rinsts(intst);
-			if (!ret) {
-				resp = synopmob_read_register(base+RESP0);
-				sdc->rca = resp >> 16;
-				resp = (resp & 0x1fff) | (((resp>>13)&1)<<19) | (((resp>>14)&3)<<22);
-				return synopmob_check_r1_resp(resp);
-			}
-		}		
-	}
+    ret = synopmob_execute_command(base, 0x43, 0);
+    if (!ret) {
+        ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
+        if (!ret) {
+            synopmob_set_register(base+RINTSTS, intst);
+            ret = synopmob_handle_standard_rinsts(intst);
+            if (!ret) {
+                resp = synopmob_read_register(base+RESP0);
+                sdc->rca = resp >> 16;
+                resp = (resp & 0x1fff) | (((resp>>13)&1)<<19) | (((resp>>14)&3)<<22);
+                return synopmob_check_r1_resp(resp);
+            }
+        }
+    }
 
-	return ret;
+    return ret;
 }
 
 static int sd_send_cmd_r1(sdc_t* sdc, unsigned int cmd, unsigned int arg, unsigned int buzy)
 {
-	int   ret;
-	unsigned int intst;
-	unsigned int resp;
-	unsigned int base = sdc->ip_base;
-	
-	ret = synopmob_execute_command(base, cmd,  arg);
-	if (!ret) {
-		ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
-		if (!ret) {
-			synopmob_set_register(base+RINTSTS, intst);
-			ret = synopmob_handle_standard_rinsts(intst);
-			if (!ret) {
-				resp = synopmob_read_register(base+RESP0);
-				ret = synopmob_check_r1_resp(resp);
-				if (buzy && !ret) {
-					ret = synopmob_wait_data_ready(base);
-				}
-			}
-		}
-	}
+    int   ret;
+    unsigned int intst;
+    unsigned int resp;
+    unsigned int base = sdc->ip_base;
 
-	return ret;
+    ret = synopmob_execute_command(base, cmd,  arg);
+    if (!ret) {
+        ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
+        if (!ret) {
+            synopmob_set_register(base+RINTSTS, intst);
+            ret = synopmob_handle_standard_rinsts(intst);
+            if (!ret) {
+                resp = synopmob_read_register(base+RESP0);
+                ret = synopmob_check_r1_resp(resp);
+                if (buzy && !ret) {
+                    ret = synopmob_wait_data_ready(base);
+                }
+            }
+        }
+    }
+
+    return ret;
 }
 
 static int sd_send_cmd7(sdc_t* sdc)
 {
-	return sd_send_cmd_r1(sdc, 0x47, sdc->rca<<16, 1);
+    return sd_send_cmd_r1(sdc, 0x47, sdc->rca<<16, 1);
 }
 
 static int sd_send_uncmd7(sdc_t* sdc)
 {
-	int   ret;
-	unsigned int intst;
-	unsigned int base = sdc->ip_base;
+    int   ret;
+    unsigned int intst;
+    unsigned int base = sdc->ip_base;
 
-	ret = synopmob_execute_command(base, 0x7, 0);
-	if (!ret) {
-		ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
-		if (!ret) {
-			synopmob_set_register(base+RINTSTS, intst);
-			ret = synopmob_handle_standard_rinsts(intst);
-		}
-	}
+    ret = synopmob_execute_command(base, 0x7, 0);
+    if (!ret) {
+        ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
+        if (!ret) {
+            synopmob_set_register(base+RINTSTS, intst);
+            ret = synopmob_handle_standard_rinsts(intst);
+        }
+    }
 
-	return ret;
+    return ret;
 }
 
 static int sd_send_cmd16(sdc_t* sdc)
 {
-	return sd_send_cmd_r1(sdc, 0x50, 512, 0);
+    return sd_send_cmd_r1(sdc, 0x50, 512, 0);
 }
 
 static int sd_send_cmd55(sdc_t* sdc)
 {
-	return sd_send_cmd_r1(sdc, 0x77, sdc->rca<<16, 0);
+    return sd_send_cmd_r1(sdc, 0x77, sdc->rca<<16, 0);
 }
 
 static int sd_send_acmd6(sdc_t* sdc, unsigned int bitwidth)
 {
-	unsigned int cmd_arg;
-	int   ret;
-	unsigned int base = sdc->ip_base;
+    unsigned int cmd_arg;
+    int   ret;
+    unsigned int base = sdc->ip_base;
 
-	ret = sd_send_cmd55(sdc);
-	if (!ret) {	
-		cmd_arg = 0; //default to 1bit mode
-		if (bitwidth == 4) {
-			cmd_arg = 2; // 4bit mode
-		}
-		ret = sd_send_cmd_r1(sdc, 0x2046, cmd_arg, 0);
-		if (!ret) {
-			if (bitwidth == 4) {
-				synopmob_set_register(base+CTYPE, FOUR_BIT_MODE);
-			}
-			else {
-				synopmob_set_register(base+CTYPE, ONE_BIT_MODE);
-			}
-		}
-	}
+    ret = sd_send_cmd55(sdc);
+    if (!ret) {
+        cmd_arg = 0; //default to 1bit mode
+        if (bitwidth == 4) {
+            cmd_arg = 2; // 4bit mode
+        }
+        ret = sd_send_cmd_r1(sdc, 0x2046, cmd_arg, 0);
+        if (!ret) {
+            if (bitwidth == 4) {
+                synopmob_set_register(base+CTYPE, FOUR_BIT_MODE);
+            }
+            else {
+                synopmob_set_register(base+CTYPE, ONE_BIT_MODE);
+            }
+        }
+    }
 
-	return ret;
+    return ret;
 }
 
 #ifdef SDC_USE_IDMA
 static int sdc_read_write_block(HSDC handle, unsigned int rw, unsigned int blk, unsigned int num, unsigned char* buffer)
 {
-	sdc_t* sdc = (sdc_t*)handle;
-	volatile DmaDesc *pDmaDesc = sdc->pDmaDesc;
-	int   ret;
-	unsigned int intsts = 0;
-	unsigned int cmd;
-	unsigned int multi = 0;
-	unsigned int base = sdc->ip_base;
-	int   loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC;
-	rt_err_t err;	
+    sdc_t* sdc = (sdc_t*)handle;
+    volatile DmaDesc *pDmaDesc = sdc->pDmaDesc;
+    int   ret;
+    unsigned int intsts = 0;
+    unsigned int cmd;
+    unsigned int multi = 0;
+    unsigned int base = sdc->ip_base;
+    int   loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC;
+    rt_err_t err;
 
-	// valid check
-	if (synopmob_read_register(base+CDETECT) & 1) {
-		return ERRCARDNOTCONN;
-	}
-	if (!num || num > 16) {
-		return ERRNOTSUPPORTED;
-	}
-	if (blk + num > sdc->sectors) {
-		return ERRADDRESSRANGE;
-	}
-
-	if ( rw ) {
-		flush_dcache_range((unsigned long)buffer, num << 9);
-	}
-	else {
-	    // to avoid memset bug?
-		inv_dcache_range((unsigned long)buffer, num << 9);
+    // valid check
+    if (synopmob_read_register(base+CDETECT) & 1) {
+        return ERRCARDNOTCONN;
+    }
+    if (!num || num > 16) {
+        return ERRNOTSUPPORTED;
+    }
+    if (blk + num > sdc->sectors) {
+        return ERRADDRESSRANGE;
     }
 
-	err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
-	if (err != RT_EOK) {
-		return ERRNORES;
-	}
+    if ( rw ) {
+        flush_dcache_range((unsigned long)buffer, num << 9);
+    }
+    else {
+        // to avoid memset bug?
+        inv_dcache_range((unsigned long)buffer, num << 9);
+    }
 
-	// reset
-	synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
-	while (synopmob_read_register(base+CTRL) & FIFO_RESET);
-	synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
+    err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
+    if (err != RT_EOK) {
+        return ERRNORES;
+    }
 
-	cmd = 0x2658; // write
-	if ( !rw ) {
-		cmd = 0x2251; //read
-	}
-	//if (num > 1) {
-	if (num >= 1) { // some card fail on sigle-block mode, so use multi-block instead of sigle-block mode.
-		cmd++;
-		multi++;
-	}
-	if (sdc->card_type == SD_TYPE) {
-		blk <<= 9; //SD stadand capability card use 512 unit.
-	}
-	num <<= 9;
-	
-	pDmaDesc->desc0 |= DescOwnByDma | DescFirstDesc | DescLastDesc;
-	pDmaDesc->desc1 = ((num << DescBuf1SizeShift) & DescBuf1SizMsk);
-	pDmaDesc->desc2 = (unsigned int)buffer;
-	flush_dcache_range((unsigned long)pDmaDesc, sizeof(DmaDesc)); // add SZ_ADJUST
-	synopmob_set_register(base + DBADDR, (unsigned int)(pDmaDesc)); // add SZ_ADJUST
-	synopmob_set_register(base+BLKSIZ, 512);
-	synopmob_set_register(base+BYTCNT, num);
-	synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC);
-	synopmob_set_bits(base + BMOD,BMOD_DE);
-	
-	ret = synopmob_execute_command(base, cmd,  blk);
-	if ( !ret ) {
-		ret = ERRIDMA;
-		synopmob_set_bits(base+CTRL, INT_ENABLE);
-		err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS);
-		if ( !err ) {
-			while (--loop_for_command_done_check > 0) {
-				intsts = synopmob_read_register(base+RINTSTS);
-				if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) {
-					break;
-				}
-				plat_loop(1);
-			}
-			ret = synopmob_handle_standard_rinsts(intsts);
-			if (!ret ) {
-				if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt
-					ret = ERRIDMA;
-				}
-			}
-		}
-	}
+    // reset
+    synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
+    while (synopmob_read_register(base+CTRL) & FIFO_RESET);
+    synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
 
-	if (ret) {
-	   	char* op = "read";
-	   	if (rw) 
-	   		op = "write";
-	   		
-	        SDIO_PRINTF("sdc_read_write_block(%s) fail:, ret = %d\n", op, ret);
-	}
+    cmd = 0x2658; // write
+    if ( !rw ) {
+        cmd = 0x2251; //read
+    }
+    //if (num > 1) {
+    if (num >= 1) { // some card fail on sigle-block mode, so use multi-block instead of sigle-block mode.
+        cmd++;
+        multi++;
+    }
+    if (sdc->card_type == SD_TYPE) {
+        blk <<= 9; //SD stadand capability card use 512 unit.
+    }
+    num <<= 9;
 
-	synopmob_clear_bits(base+CTRL, INT_ENABLE);
-	synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC);
-	synopmob_clear_bits(base + BMOD,BMOD_DE);
+    pDmaDesc->desc0 |= DescOwnByDma | DescFirstDesc | DescLastDesc;
+    pDmaDesc->desc1 = ((num << DescBuf1SizeShift) & DescBuf1SizMsk);
+    pDmaDesc->desc2 = (unsigned int)buffer;
+    flush_dcache_range((unsigned long)pDmaDesc, sizeof(DmaDesc)); // add SZ_ADJUST
+    synopmob_set_register(base + DBADDR, (unsigned int)(pDmaDesc)); // add SZ_ADJUST
+    synopmob_set_register(base+BLKSIZ, 512);
+    synopmob_set_register(base+BYTCNT, num);
+    synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC);
+    synopmob_set_bits(base + BMOD,BMOD_DE);
 
-	synopmob_set_register(base+BLKSIZ, 512);
-	synopmob_set_register(base+BYTCNT, 512);
+    ret = synopmob_execute_command(base, cmd,  blk);
+    if ( !ret ) {
+        ret = ERRIDMA;
+        synopmob_set_bits(base+CTRL, INT_ENABLE);
+        err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS);
+        if ( !err ) {
+            while (--loop_for_command_done_check > 0) {
+                intsts = synopmob_read_register(base+RINTSTS);
+                if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) {
+                    break;
+                }
+                plat_loop(1);
+            }
+            ret = synopmob_handle_standard_rinsts(intsts);
+            if (!ret ) {
+                if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt
+                    ret = ERRIDMA;
+                }
+            }
+        }
+    }
 
-	synopmob_set_register(base + RINTSTS, 0xfffe);
+    if (ret) {
+        char* op = "read";
+        if (rw)
+            op = "write";
 
-	if ( !ret && rw) {
-		ret = synopmob_wait_data_ready(base);
-	}
+            SDIO_PRINTF("sdc_read_write_block(%s) fail:, ret = %d\n", op, ret);
+    }
 
-	if (!ret && multi ) { //send STOP_TRANSACTION command
-		ret = sd_send_cmd_r1(sdc, 0x404c, 0, 1);
-	}
+    synopmob_clear_bits(base+CTRL, INT_ENABLE);
+    synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC);
+    synopmob_clear_bits(base + BMOD,BMOD_DE);
 
-	rt_sem_release(sdc->mutex);
-	
-	if ( !rw && !ret ) { //read
-		inv_dcache_range((unsigned long)buffer, num);
-	}
-	
-	return ret;
+    synopmob_set_register(base+BLKSIZ, 512);
+    synopmob_set_register(base+BYTCNT, 512);
+
+    synopmob_set_register(base + RINTSTS, 0xfffe);
+
+    if ( !ret && rw) {
+        ret = synopmob_wait_data_ready(base);
+    }
+
+    if (!ret && multi ) { //send STOP_TRANSACTION command
+        ret = sd_send_cmd_r1(sdc, 0x404c, 0, 1);
+    }
+
+    rt_sem_release(sdc->mutex);
+
+    if ( !rw && !ret ) { //read
+        inv_dcache_range((unsigned long)buffer, num);
+    }
+
+    return ret;
 }
 #else  //no IDMA
 static int sdc_read_write_block(HSDC handle, unsigned int rw, unsigned int blk, unsigned int num, unsigned char* buffer)
 {
-	sdc_t* sdc = (sdc_t*)handle;
-	volatile DmaDesc *pDmaDesc = sdc->pDmaDesc;
-	int   ret;
-	unsigned int intsts = 0;
-	unsigned int entries;
-	unsigned int cmd;
-	unsigned int multi = 0;
-	unsigned int base = sdc->ip_base;
-	int   loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC;
-	rt_err_t err;	
+    sdc_t* sdc = (sdc_t*)handle;
+    volatile DmaDesc *pDmaDesc = sdc->pDmaDesc;
+    int   ret;
+    unsigned int intsts = 0;
+    unsigned int entries;
+    unsigned int cmd;
+    unsigned int multi = 0;
+    unsigned int base = sdc->ip_base;
+    int   loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC;
+    rt_err_t err;
 
-	// valid check
-	if (synopmob_read_register(base+CDETECT) & 1) {
-		return ERRCARDNOTCONN;
-	}
-	if (!num || num > 16) {
-		return ERRNOTSUPPORTED;
-	}
-	if (blk + num > sdc->sectors) {
-		return ERRADDRESSRANGE;
-	}
-
-	if ( rw ) {
-		flush_dcache_range((unsigned long)buffer, num << 9);
-	}
-	else {
-	    // to avoid memset bug?
-		inv_dcache_range((unsigned long)buffer, num << 9);
+    // valid check
+    if (synopmob_read_register(base+CDETECT) & 1) {
+        return ERRCARDNOTCONN;
+    }
+    if (!num || num > 16) {
+        return ERRNOTSUPPORTED;
+    }
+    if (blk + num > sdc->sectors) {
+        return ERRADDRESSRANGE;
     }
 
-	err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
-	if (err != RT_EOK) {
-		return ERRNORES;
-	}
+    if ( rw ) {
+        flush_dcache_range((unsigned long)buffer, num << 9);
+    }
+    else {
+        // to avoid memset bug?
+        inv_dcache_range((unsigned long)buffer, num << 9);
+    }
 
-	// reset
-	synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
-	while (synopmob_read_register(base+CTRL) & FIFO_RESET);
-	synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
+    err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
+    if (err != RT_EOK) {
+        return ERRNORES;
+    }
 
-	cmd = 0x2658; // write
-	if ( !rw ) {
-		cmd = 0x2251; //read
-	}
-	if (num > 1) {
-		cmd++;
-		multi++;
-	}
-	if (sdc->card_type == SD_TYPE) {
-		blk <<= 9; //SD stadand capability card use 512 unit.
-	}
-	num <<= 9;
-	
-	synopmob_set_register(base+BLKSIZ, 512);
-	synopmob_set_register(base+BYTCNT, num);
-	
-	ret = synopmob_execute_command(base, cmd,  blk);
-	if ( !ret ) {
-		while (1) {
-			ret = synopmob_wait_command_done(base, &intsts, 0);
-			if (ret)
-				break;
+    // reset
+    synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
+    while (synopmob_read_register(base+CTRL) & FIFO_RESET);
+    synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
 
-			ret = synopmob_handle_standard_rinsts(intsts);
-			if (ret)
-				break;
+    cmd = 0x2658; // write
+    if ( !rw ) {
+        cmd = 0x2251; //read
+    }
+    if (num > 1) {
+        cmd++;
+        multi++;
+    }
+    if (sdc->card_type == SD_TYPE) {
+        blk <<= 9; //SD stadand capability card use 512 unit.
+    }
+    num <<= 9;
 
-			if (!rw && (intsts & (INTMSK_RXDR|INTMSK_DAT_OVER)) ){
-				while (num > 0 ) {
-					entries = synopmob_read_register(base + STATUS);
-					if (!GET_FIFO_COUNT(entries))
-						break;
-					*((volatile unsigned int*)buffer) = synopmob_read_register(base + FIFODAT);
-					buffer += 4;
-					num -= 4;
-				}
-			}
-			
-			if (rw && ( intsts & INTMSK_TXDR ) ) {
-				while (num > 0) {
-					entries = synopmob_read_register(base+STATUS);
-					if ( entries & 8 ) { //FIFO is full
-						break;
-					}
-					synopmob_set_register(base+FIFODAT, *((volatile unsigned int*)buffer));
-					buffer += 4;
-					num -= 4;
-				}
-			}
-			
-			if ( intsts & INTMSK_DAT_OVER ) {
-				break;
-			}
+    synopmob_set_register(base+BLKSIZ, 512);
+    synopmob_set_register(base+BYTCNT, num);
 
-			if (intsts & INTMSK_CMD_DONE) {
-				entries = synopmob_read_register(base+RESP0);
-				ret = synopmob_check_r1_resp(entries);
-				if (ret) {
-					break;
-				}
-			}
+    ret = synopmob_execute_command(base, cmd,  blk);
+    if ( !ret ) {
+        while (1) {
+            ret = synopmob_wait_command_done(base, &intsts, 0);
+            if (ret)
+                break;
 
-			synopmob_set_register(base+RINTSTS, intsts); //write to clear
-			intsts = 0;
-		}		
-		
-		if (intsts) {
-			synopmob_set_register(base+RINTSTS, intsts); //write to clear
-		}
-	}
+            ret = synopmob_handle_standard_rinsts(intsts);
+            if (ret)
+                break;
 
-	synopmob_set_register(base+BLKSIZ, 512);
-	synopmob_set_register(base+BYTCNT, 512);
-	synopmob_set_register(base + RINTSTS, 0xfffe);
+            if (!rw && (intsts & (INTMSK_RXDR|INTMSK_DAT_OVER)) ){
+                while (num > 0 ) {
+                    entries = synopmob_read_register(base + STATUS);
+                    if (!GET_FIFO_COUNT(entries))
+                        break;
+                    *((volatile unsigned int*)buffer) = synopmob_read_register(base + FIFODAT);
+                    buffer += 4;
+                    num -= 4;
+                }
+            }
 
-	if ( !ret && rw) {
-		ret = synopmob_wait_data_ready(base);
-	}
+            if (rw && ( intsts & INTMSK_TXDR ) ) {
+                while (num > 0) {
+                    entries = synopmob_read_register(base+STATUS);
+                    if ( entries & 8 ) { //FIFO is full
+                        break;
+                    }
+                    synopmob_set_register(base+FIFODAT, *((volatile unsigned int*)buffer));
+                    buffer += 4;
+                    num -= 4;
+                }
+            }
 
-	if (!ret && multi ) { //send STOP_TRANSACTION command
-		ret = sd_send_cmd_r1(sdc, 0x404c, 0, 1);
-	}
+            if ( intsts & INTMSK_DAT_OVER ) {
+                break;
+            }
 
-	rt_sem_release(sdc->mutex);
-	
-	if ( !rw && !ret ) { //read
-		inv_dcache_range((unsigned long)buffer, num);
-	}
-	
-	return ret;
+            if (intsts & INTMSK_CMD_DONE) {
+                entries = synopmob_read_register(base+RESP0);
+                ret = synopmob_check_r1_resp(entries);
+                if (ret) {
+                    break;
+                }
+            }
+
+            synopmob_set_register(base+RINTSTS, intsts); //write to clear
+            intsts = 0;
+        }
+
+        if (intsts) {
+            synopmob_set_register(base+RINTSTS, intsts); //write to clear
+        }
+    }
+
+    synopmob_set_register(base+BLKSIZ, 512);
+    synopmob_set_register(base+BYTCNT, 512);
+    synopmob_set_register(base + RINTSTS, 0xfffe);
+
+    if ( !ret && rw) {
+        ret = synopmob_wait_data_ready(base);
+    }
+
+    if (!ret && multi ) { //send STOP_TRANSACTION command
+        ret = sd_send_cmd_r1(sdc, 0x404c, 0, 1);
+    }
+
+    rt_sem_release(sdc->mutex);
+
+    if ( !rw && !ret ) { //read
+        inv_dcache_range((unsigned long)buffer, num);
+    }
+
+    return ret;
 }
 #endif //SDC_USE_IDMA
 
 int sdc_write_block(HSDC handle, unsigned int blk, unsigned int num, unsigned char* buffer)
 {
-	return sdc_read_write_block(handle, 1, blk, num, buffer);
+    return sdc_read_write_block(handle, 1, blk, num, buffer);
 }
 
 int sdc_read_block(HSDC handle, unsigned int blk, unsigned int num, unsigned char* buffer)
 {
-	return sdc_read_write_block(handle, 0, blk, num, buffer);
+    return sdc_read_write_block(handle, 0, blk, num, buffer);
 }
 
 int sdc_erase_block(HSDC handle, unsigned int blk, unsigned int num)
 {
-	int   ret;
-	sdc_t* sdc = (sdc_t*)handle;
-	
-	if (sdc->card_type == SD_TYPE) {
-		blk <<= 9; //SD stadand capability card use 512 unit.
-		num = ((num-1)<<9) + blk;
-	}
-	else {
-		num = blk + num - 1;
-	}
-	
-	ret = sd_send_cmd_r1(sdc, 0x40|32, blk, 0); // cmd32
-	if (!ret) {
-		ret = sd_send_cmd_r1(sdc, 0x40|33, num, 0); // cmd33
-		if (!ret) {
-			ret = sd_send_cmd_r1(sdc, 0x40|38, 0, 1); // cmd38
-		}
-	}
+    int   ret;
+    sdc_t* sdc = (sdc_t*)handle;
 
-	return ret;
+    if (sdc->card_type == SD_TYPE) {
+        blk <<= 9; //SD stadand capability card use 512 unit.
+        num = ((num-1)<<9) + blk;
+    }
+    else {
+        num = blk + num - 1;
+    }
+
+    ret = sd_send_cmd_r1(sdc, 0x40|32, blk, 0); // cmd32
+    if (!ret) {
+        ret = sd_send_cmd_r1(sdc, 0x40|33, num, 0); // cmd33
+        if (!ret) {
+            ret = sd_send_cmd_r1(sdc, 0x40|38, 0, 1); // cmd38
+        }
+    }
+
+    return ret;
 }
 
 int sdc_get_sector_num(HSDC handle)
 {
-	return ((sdc_t*)handle)->sectors;
+    return ((sdc_t*)handle)->sectors;
 }
 
 static int sd_send_cmd9(sdc_t* sdc)
 {
-	int   ret;
-	unsigned int intst;
-	unsigned int resp0;
-	unsigned int resp1;
-	unsigned int resp2;
-	unsigned int resp3;
-	unsigned int base = sdc->ip_base;
-	unsigned int C_SIZE;
-	unsigned int C_SIZE_MULT;
-	unsigned int READ_BL_LEN;
+    int   ret;
+    unsigned int intst;
+    unsigned int resp0;
+    unsigned int resp1;
+    unsigned int resp2;
+    unsigned int resp3;
+    unsigned int base = sdc->ip_base;
+    unsigned int C_SIZE;
+    unsigned int C_SIZE_MULT;
+    unsigned int READ_BL_LEN;
 
-	ret = synopmob_execute_command(base, 0xC9, sdc->rca<<16);
-	if (!ret) {
-		ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
-		if (!ret) {
-			synopmob_set_register(base+RINTSTS, intst);
-			ret = synopmob_handle_standard_rinsts(intst);
-			if (!ret) {
-				sdc->csd[0] = resp0 = synopmob_read_register(base+RESP0);
-				sdc->csd[1] = resp1 = synopmob_read_register(base+RESP1);
-				sdc->csd[2] = resp2 = synopmob_read_register(base+RESP2);
-				sdc->csd[3] = resp3 = synopmob_read_register(base+RESP3);
-				
-				if ((resp3>>30) == 0) { //CSD version 1.0
-					C_SIZE = (resp1 >> 30) | ((resp2 & 0x3ff)<<2);
-					C_SIZE_MULT = ((resp1 >> 15) & 0x07);				
-					READ_BL_LEN = ((resp2 >> 16) & 0xf);
-					sdc->sectors = ((((C_SIZE+1)<<(C_SIZE_MULT+2))<<(READ_BL_LEN))>>9);
-				}
-				else { //CSD version 2.0
-					sdc->sectors = (((resp1 >> 16)+1)<<10);
-				}
-			}
-		}		
-	}
+    ret = synopmob_execute_command(base, 0xC9, sdc->rca<<16);
+    if (!ret) {
+        ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
+        if (!ret) {
+            synopmob_set_register(base+RINTSTS, intst);
+            ret = synopmob_handle_standard_rinsts(intst);
+            if (!ret) {
+                sdc->csd[0] = resp0 = synopmob_read_register(base+RESP0);
+                sdc->csd[1] = resp1 = synopmob_read_register(base+RESP1);
+                sdc->csd[2] = resp2 = synopmob_read_register(base+RESP2);
+                sdc->csd[3] = resp3 = synopmob_read_register(base+RESP3);
 
-	return ret;
+                if ((resp3>>30) == 0) { //CSD version 1.0
+                    C_SIZE = (resp1 >> 30) | ((resp2 & 0x3ff)<<2);
+                    C_SIZE_MULT = ((resp1 >> 15) & 0x07);
+                    READ_BL_LEN = ((resp2 >> 16) & 0xf);
+                    sdc->sectors = ((((C_SIZE+1)<<(C_SIZE_MULT+2))<<(READ_BL_LEN))>>9);
+                }
+                else { //CSD version 2.0
+                    sdc->sectors = (((resp1 >> 16)+1)<<10);
+                }
+            }
+        }
+    }
+
+    return ret;
 }
 
 static int sd_send_cmd5(sdc_t* sdc, unsigned int arg, unsigned int* resp)
 {
-	unsigned int cmd_reg = 0x45;
-	unsigned int intst;
-	int   ret;
-	unsigned int base = sdc->ip_base;
+    unsigned int cmd_reg = 0x45;
+    unsigned int intst;
+    int   ret;
+    unsigned int base = sdc->ip_base;
 
-	ret = synopmob_execute_command(base, cmd_reg, arg);
-	if (!ret) {
-		ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
-		if (!ret) {
-			synopmob_set_register(base+RINTSTS, intst);
-			ret = synopmob_handle_standard_rinsts(intst);
-			if (!ret) {
-				*resp = synopmob_read_register(base+RESP0);
-			}
-		}
-	}
-	
-	return ret;	
+    ret = synopmob_execute_command(base, cmd_reg, arg);
+    if (!ret) {
+        ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
+        if (!ret) {
+            synopmob_set_register(base+RINTSTS, intst);
+            ret = synopmob_handle_standard_rinsts(intst);
+            if (!ret) {
+                *resp = synopmob_read_register(base+RESP0);
+            }
+        }
+    }
+
+    return ret;
 }
 
 static int sd_send_cmd8(sdc_t* sdc)
 {
-	int   ret;
-	unsigned int cmd_reg = 0x48;
-	unsigned int intst;
-	unsigned int err = 0;
-	unsigned int base = sdc->ip_base;
-	
-	ret = synopmob_execute_command(base, cmd_reg, 0x000001A5);
-	if (!ret) {
-		while (1) {
-			ret = synopmob_wait_command_done(base, &intst, 0);
-			if (!ret) {
-				synopmob_set_register(base+RINTSTS, intst);
-				err |= synopmob_handle_standard_rinsts(intst);
-				if (intst & INTMSK_CMD_DONE) {
-					break;
-				}
-			}
-		}
-	}
+    int   ret;
+    unsigned int cmd_reg = 0x48;
+    unsigned int intst;
+    unsigned int err = 0;
+    unsigned int base = sdc->ip_base;
 
-	return err;
+    ret = synopmob_execute_command(base, cmd_reg, 0x000001A5);
+    if (!ret) {
+        while (1) {
+            ret = synopmob_wait_command_done(base, &intst, 0);
+            if (!ret) {
+                synopmob_set_register(base+RINTSTS, intst);
+                err |= synopmob_handle_standard_rinsts(intst);
+                if (intst & INTMSK_CMD_DONE) {
+                    break;
+                }
+            }
+        }
+    }
+
+    return err;
 }
 
 static int sd_send_acmd41(sdc_t* sdc, int* hcs)
 {
-	unsigned int cmd_reg = 0x69;
-	unsigned int resp;
-	int   ret = 0;
-	unsigned int count = ACMD41_RETRY_COUNT;
-	unsigned int cmd_arg = 0xff8000;
-	unsigned int base = sdc->ip_base;
+    unsigned int cmd_reg = 0x69;
+    unsigned int resp;
+    int   ret = 0;
+    unsigned int count = ACMD41_RETRY_COUNT;
+    unsigned int cmd_arg = 0xff8000;
+    unsigned int base = sdc->ip_base;
 
-	if (*hcs) {
-		cmd_arg |= (1<<30);
-	}
-	while ( count > 0) {
-		SDC_WHERE();
-		ret = sd_send_cmd55(sdc);
-		if (ret)
-			break;
+    if (*hcs) {
+        cmd_arg |= (1<<30);
+    }
+    while ( count > 0) {
+        SDC_WHERE();
+        ret = sd_send_cmd55(sdc);
+        if (ret)
+            break;
 
-		SDC_WHERE();
-		ret = synopmob_execute_command(base, cmd_reg, cmd_arg);
-		if (ret)
-			break;
+        SDC_WHERE();
+        ret = synopmob_execute_command(base, cmd_reg, cmd_arg);
+        if (ret)
+            break;
 
-		SDC_WHERE();
-		ret = synopmob_wait_command_done(base, &resp, INTMSK_CMD_DONE);
-		if ( ret ) 
-			break;
+        SDC_WHERE();
+        ret = synopmob_wait_command_done(base, &resp, INTMSK_CMD_DONE);
+        if ( ret )
+            break;
 
-		SDC_WHERE();
-		synopmob_set_register(base+RINTSTS, resp);
-		ret = synopmob_handle_standard_rinsts(resp);
-		if (!ret) {
-			SDC_WHERE();
-			resp = synopmob_read_register(base+RESP0);
-			if (resp & 0x80000000) { //card is ready.
-				SDC_WHERE();
-				if ( !(resp & (1<<30)) ) {
-					SDC_WHERE();
-					*hcs = 0;
-				}
-				if ( (resp & 0x00ff8000) != 0x00ff8000 ) { //not supported voltage
-					ret = ERRHARDWARE;
-				}
-				break;
-			}
-		}
+        SDC_WHERE();
+        synopmob_set_register(base+RINTSTS, resp);
+        ret = synopmob_handle_standard_rinsts(resp);
+        if (!ret) {
+            SDC_WHERE();
+            resp = synopmob_read_register(base+RESP0);
+            if (resp & 0x80000000) { //card is ready.
+                SDC_WHERE();
+                if ( !(resp & (1<<30)) ) {
+                    SDC_WHERE();
+                    *hcs = 0;
+                }
+                if ( (resp & 0x00ff8000) != 0x00ff8000 ) { //not supported voltage
+                    ret = ERRHARDWARE;
+                }
+                break;
+            }
+        }
 
-		--count;
-		plat_loop(1);
-	}
+        --count;
+        plat_loop(1);
+    }
 
-	if (!count)
-		ret = ERRACMD41TIMEOUT;
-	
-	return ret;
+    if (!count)
+        ret = ERRACMD41TIMEOUT;
+
+    return ret;
 }
 
 static int sd_send_acmd51(sdc_t* sdc) //Send SCR
 {
-	unsigned int cmd_reg = 0x2273;
-	unsigned int resp;
-	int   ret;
-	unsigned int intst = 0;
-	unsigned int entries;
-	int   count = 1;
-	unsigned int base = sdc->ip_base;
+    unsigned int cmd_reg = 0x2273;
+    unsigned int resp;
+    int   ret;
+    unsigned int intst = 0;
+    unsigned int entries;
+    int   count = 1;
+    unsigned int base = sdc->ip_base;
 
-	ret = sd_send_cmd55(sdc);
-	if (!ret) {	
-		synopmob_set_register(base+BLKSIZ, 8);
-		synopmob_set_register(base+BYTCNT, 8);
-		ret = synopmob_execute_command(base, cmd_reg, 0);
-		if (!ret) {
-			while (1) {
-				ret = synopmob_wait_command_done(base, &intst, 0);
-				if (ret) {
-					break;
-				}
+    ret = sd_send_cmd55(sdc);
+    if (!ret) {
+        synopmob_set_register(base+BLKSIZ, 8);
+        synopmob_set_register(base+BYTCNT, 8);
+        ret = synopmob_execute_command(base, cmd_reg, 0);
+        if (!ret) {
+            while (1) {
+                ret = synopmob_wait_command_done(base, &intst, 0);
+                if (ret) {
+                    break;
+                }
 
-				ret = synopmob_handle_standard_rinsts(intst);
-				if (ret) {
-					break;
-				}
-				
-				if (intst & INTMSK_CMD_DONE) {
-					resp = synopmob_read_register(base+RESP0);
-					ret = synopmob_check_r1_resp(resp);
-					if (ret) 
-						break;
-				}
+                ret = synopmob_handle_standard_rinsts(intst);
+                if (ret) {
+                    break;
+                }
 
-				if (intst & INTMSK_DAT_OVER) {
-					entries = synopmob_read_register(base + STATUS);
-					if (GET_FIFO_COUNT(entries) == 2) {
-						while (count >= 0) {
-							entries = synopmob_read_register(base + FIFODAT);
-							sdc->scr[count--] = BE32_TO_CPU(entries);
-						}
-					}
-					break;
-				}
+                if (intst & INTMSK_CMD_DONE) {
+                    resp = synopmob_read_register(base+RESP0);
+                    ret = synopmob_check_r1_resp(resp);
+                    if (ret)
+                        break;
+                }
 
-				synopmob_set_register(base+RINTSTS, intst);
-				intst = 0;
-			}
+                if (intst & INTMSK_DAT_OVER) {
+                    entries = synopmob_read_register(base + STATUS);
+                    if (GET_FIFO_COUNT(entries) == 2) {
+                        while (count >= 0) {
+                            entries = synopmob_read_register(base + FIFODAT);
+                            sdc->scr[count--] = BE32_TO_CPU(entries);
+                        }
+                    }
+                    break;
+                }
 
-			if (intst) {
-				synopmob_set_register(base+RINTSTS, intst);
-			}
-		}
+                synopmob_set_register(base+RINTSTS, intst);
+                intst = 0;
+            }
 
-		synopmob_set_register(base+BLKSIZ, 512);
-		synopmob_set_register(base+BYTCNT, 512);
-	}
+            if (intst) {
+                synopmob_set_register(base+RINTSTS, intst);
+            }
+        }
 
-	return ret;
+        synopmob_set_register(base+BLKSIZ, 512);
+        synopmob_set_register(base+BYTCNT, 512);
+    }
+
+    return ret;
 }
 
 
-static int sd_send_cmd6(sdc_t* sdc, unsigned int cmd_arg, unsigned int* data_buff) 
+static int sd_send_cmd6(sdc_t* sdc, unsigned int cmd_arg, unsigned int* data_buff)
 {
-	unsigned int cmd_reg = 0x2246;
-	unsigned int resp;
-	int   ret;
-	unsigned int intst = 0;
-	unsigned int entries;
-	int   count = 64;
-	unsigned int base = sdc->ip_base;
+    unsigned int cmd_reg = 0x2246;
+    unsigned int resp;
+    int   ret;
+    unsigned int intst = 0;
+    unsigned int entries;
+    int   count = 64;
+    unsigned int base = sdc->ip_base;
 
-	synopmob_set_register(base+BLKSIZ, 64);
-	synopmob_set_register(base+BYTCNT, 64);
-	ret = synopmob_execute_command(base, cmd_reg, cmd_arg);
-	if (!ret) {
-		while (1) {
-			ret = synopmob_wait_command_done(base, &intst, 0);
-			if (ret) {
-				break;
-			}
+    synopmob_set_register(base+BLKSIZ, 64);
+    synopmob_set_register(base+BYTCNT, 64);
+    ret = synopmob_execute_command(base, cmd_reg, cmd_arg);
+    if (!ret) {
+        while (1) {
+            ret = synopmob_wait_command_done(base, &intst, 0);
+            if (ret) {
+                break;
+            }
 
-			ret = synopmob_handle_standard_rinsts(intst);
-			if (ret) {
-				break;
-			}
-				
-			if (intst & INTMSK_CMD_DONE) {
-				resp = synopmob_read_register(base+RESP0);
-				ret = synopmob_check_r1_resp(resp);
-				if (ret) 
-					break;
-			}
+            ret = synopmob_handle_standard_rinsts(intst);
+            if (ret) {
+                break;
+            }
 
-			while (count > 0) {
-				entries = synopmob_read_register(base + STATUS);
-				if ( !GET_FIFO_COUNT(entries) ) {
-					break;
-				}
-				*(data_buff++) = synopmob_read_register(base + FIFODAT);
-				count -= 4;
-			}
+            if (intst & INTMSK_CMD_DONE) {
+                resp = synopmob_read_register(base+RESP0);
+                ret = synopmob_check_r1_resp(resp);
+                if (ret)
+                    break;
+            }
 
-			if (intst & INTMSK_DAT_OVER) {
-				break;
-			}
+            while (count > 0) {
+                entries = synopmob_read_register(base + STATUS);
+                if ( !GET_FIFO_COUNT(entries) ) {
+                    break;
+                }
+                *(data_buff++) = synopmob_read_register(base + FIFODAT);
+                count -= 4;
+            }
 
-			synopmob_set_register(base+RINTSTS, intst); //write to clear
-			intst = 0;
-		}
+            if (intst & INTMSK_DAT_OVER) {
+                break;
+            }
 
-		if (intst) {
-			synopmob_set_register(base+RINTSTS, intst); //write to clear
-		}
-	}
+            synopmob_set_register(base+RINTSTS, intst); //write to clear
+            intst = 0;
+        }
 
-	synopmob_set_register(base+BLKSIZ, 512);
-	synopmob_set_register(base+BYTCNT, 512);
+        if (intst) {
+            synopmob_set_register(base+RINTSTS, intst); //write to clear
+        }
+    }
 
-	return ret;
+    synopmob_set_register(base+BLKSIZ, 512);
+    synopmob_set_register(base+BYTCNT, 512);
+
+    return ret;
 }
 
 static int synopmob_send_clock_only_cmd(unsigned int base)
 {
-	return synopmob_execute_command(base, 0x202000, 0);
+    return synopmob_execute_command(base, 0x202000, 0);
 }
 
 
 static int synopmob_disable_all_clocks(unsigned int base)
 {
-	synopmob_set_register(base+CLKENA, 0);
-	return synopmob_send_clock_only_cmd(base);
+    synopmob_set_register(base+CLKENA, 0);
+    return synopmob_send_clock_only_cmd(base);
 }
 
 static int synopmob_enable_clocks_with_val(unsigned int base, unsigned int val)
 {
-	synopmob_set_register(base+CLKENA, val);
-	return synopmob_send_clock_only_cmd(base);
+    synopmob_set_register(base+CLKENA, val);
+    return synopmob_send_clock_only_cmd(base);
 }
 
 
 static int synopmob_set_clk_freq(sdc_t* sdc, unsigned int divider)
 {
-	#define MAX_DIVIDER_VALUE      0xff
-	
-	unsigned int orig_clkena;
-	int  retval;
-	unsigned int base = sdc->ip_base;
+    #define MAX_DIVIDER_VALUE      0xff
 
-	if (divider > MAX_DIVIDER_VALUE) {
-		return 0xffffffff;
-	}
+    unsigned int orig_clkena;
+    int  retval;
+    unsigned int base = sdc->ip_base;
 
-	/* To make sure we dont disturb enable/disable settings of the cards*/
-	orig_clkena = synopmob_read_register(base+CLKENA);
+    if (divider > MAX_DIVIDER_VALUE) {
+        return 0xffffffff;
+    }
 
-	/* Disable all clocks before changing frequency the of card clocks */
-	if ((retval = synopmob_disable_all_clocks(base)) != 0) {
-		return retval;
-	}
-	/* Program the clock divider in our case it is divider 0 */
-	synopmob_clear_bits(base+CLKDIV, MAX_DIVIDER_VALUE);
-	synopmob_set_bits(base+CLKDIV, divider);
-	
-	/*Send the command to CIU using synopmob_send_clock_only_cmd and enable the clocks in CLKENA register */
-	if ((retval = synopmob_send_clock_only_cmd(base)) != 0) {
-		synopmob_enable_clocks_with_val(base, orig_clkena);
-		return retval;
-	}
+    /* To make sure we dont disturb enable/disable settings of the cards*/
+    orig_clkena = synopmob_read_register(base+CLKENA);
 
-	return synopmob_enable_clocks_with_val(base, orig_clkena);
+    /* Disable all clocks before changing frequency the of card clocks */
+    if ((retval = synopmob_disable_all_clocks(base)) != 0) {
+        return retval;
+    }
+    /* Program the clock divider in our case it is divider 0 */
+    synopmob_clear_bits(base+CLKDIV, MAX_DIVIDER_VALUE);
+    synopmob_set_bits(base+CLKDIV, divider);
+
+    /*Send the command to CIU using synopmob_send_clock_only_cmd and enable the clocks in CLKENA register */
+    if ((retval = synopmob_send_clock_only_cmd(base)) != 0) {
+        synopmob_enable_clocks_with_val(base, orig_clkena);
+        return retval;
+    }
+
+    return synopmob_enable_clocks_with_val(base, orig_clkena);
 }
 
 static int enum_sd_card(sdc_t* sdc)
 {
-	int ret;
-	int count = 1000;
-	int hcs = 0;
-	unsigned int buffer[16];
-	unsigned int base = sdc->ip_base;
+    int ret;
+    int count = 1000;
+    int hcs = 0;
+    unsigned int buffer[16];
+    unsigned int base = sdc->ip_base;
 
-	if (synopmob_read_register(base+CDETECT) & 1) {
-		return ERRCARDNOTCONN;
-	}
-	
-	#if 0
-	synopmob_set_bits(0x98500004, (1<<24)); //set to output mode
-	synopmob_set_bits(0x98500000, (1<<24)); //power off
-	plat_loop(1000000/5); //Lets give some ramp down period
-	synopmob_clear_bits(0x98500000, (1<<24)); //power on
-	plat_loop(1000000/5);//Lets give some ramp down period
-	#endif
-	
-	synopmob_set_register(base+CTYPE, ONE_BIT_MODE);
+    if (synopmob_read_register(base+CDETECT) & 1) {
+        return ERRCARDNOTCONN;
+    }
 
-	synopmob_set_register(base+CLKENA, 0x00000001); /*enable clock, non-low-power mode*/
-	ret = synopmob_set_clk_freq(sdc, MMC_FOD_DIVIDER_VALUE);
-	
-	if ( !ret ) {
-		plat_loop(1000); //enough for 74 clock.	
-		SDC_WHERE();
-		ret = sd_send_cmd0(sdc); //CMD0 has no response
-	}
-	
-	if ( !ret ) {
-		SDC_WHERE();
-		ret = sd_send_cmd8(sdc); //even if CMD8 get response, it may be V1.0 card.
-		if (!ret) {
-			hcs = 1;
-		}
-		SDC_WHERE();
-		ret = sd_send_acmd41(sdc, &hcs);
-	}
+    #if 0
+    synopmob_set_bits(0x98500004, (1<<24)); //set to output mode
+    synopmob_set_bits(0x98500000, (1<<24)); //power off
+    plat_loop(1000000/5); //Lets give some ramp down period
+    synopmob_clear_bits(0x98500000, (1<<24)); //power on
+    plat_loop(1000000/5);//Lets give some ramp down period
+    #endif
 
-	if (!ret) {
-		SDC_WHERE();
-		ret = sd_send_cmd2(sdc); //CID
-	}
+    synopmob_set_register(base+CTYPE, ONE_BIT_MODE);
 
-	if (!ret) {
-		SDC_WHERE();
-		ret = sd_send_cmd3(sdc); //get RCA
-	}
+    synopmob_set_register(base+CLKENA, 0x00000001); /*enable clock, non-low-power mode*/
+    ret = synopmob_set_clk_freq(sdc, MMC_FOD_DIVIDER_VALUE);
 
-	if (!ret) {
-		SDC_WHERE();
-		ret = sd_send_cmd9(sdc); //CSD
-	}
+    if ( !ret ) {
+        plat_loop(1000); //enough for 74 clock.
+        SDC_WHERE();
+        ret = sd_send_cmd0(sdc); //CMD0 has no response
+    }
 
-	if (!ret) {
-		SDC_WHERE();
-		ret = sd_send_cmd7(sdc); //select the card
-	}
+    if ( !ret ) {
+        SDC_WHERE();
+        ret = sd_send_cmd8(sdc); //even if CMD8 get response, it may be V1.0 card.
+        if (!ret) {
+            hcs = 1;
+        }
+        SDC_WHERE();
+        ret = sd_send_acmd41(sdc, &hcs);
+    }
 
-	if (!ret && (sdc->wkmod & SDC_WKMOD_4WIRE) ) {
-		SDC_WHERE();
-		ret = sd_send_acmd51(sdc); //SCR
-		if (!ret && (sdc->scr[1] & 0x00040000)) { // 4bit mode supported?
-			ret = sd_send_acmd6(sdc, 4); //switch to 4bit mode
-		}
-	}
-	
-	if (!ret && (sdc->wkmod & SDC_WKMOD_50M_HI_SPEED) && (sdc->csd[2] & 0x40000000) ) { //judge whether class10 is supported? CMD6 is belonging to class10.
-		SDC_WHERE();
-		ret = sd_send_cmd6(sdc, 0x00fffff1, buffer); //switch to high speed mode.
-		if ( !ret &&  (*(((unsigned char*)buffer)+13)&0x02) ) { //the card support high speed mode?
-			SDC_WHERE();
-			ret = sd_send_cmd6(sdc, 0x80fffff1, buffer); //switch to high speed mode.
-			if (!ret && ((*(((unsigned char*)buffer)+16) & 0xf) == 1) ) {
-				//switch to high speed mode sucess.
-				sd_send_uncmd7(sdc); //deselect the card
-				sd_send_cmd9(sdc); //CSD
-				ret = sd_send_cmd7(sdc); //select the card
-			}
-		}
-	}
-	
-	if (!ret && (sdc->wkmod & (SDC_WKMOD_50M_HI_SPEED|SDC_WKMOD_25M_STAND_SPEED))) {
-		if ( (sdc->csd[3] & 0xff) == 0x5A ) { //50MHz high speed mode.			
-			SDC_WHERE();
-			ret = synopmob_set_clk_freq(sdc, (((CIU_CLK)/(50000*2))));
-		}
-		else if ( (sdc->csd[3] & 0xff) == 0x32 ) {
-			SDC_WHERE(); //25MHz standard speed mode.
-			ret = synopmob_set_clk_freq(sdc, sdc_clk_divider/*ONE_BIT_BUS_FREQ*/);
-		}
-	}
+    if (!ret) {
+        SDC_WHERE();
+        ret = sd_send_cmd2(sdc); //CID
+    }
 
-	if (!ret) {
-		sdc->card_type = SD_TYPE;
-		if (hcs) {
-			sdc->card_type = SD_2_0_TYPE;
-		}
-	}
+    if (!ret) {
+        SDC_WHERE();
+        ret = sd_send_cmd3(sdc); //get RCA
+    }
 
-	return ret;
+    if (!ret) {
+        SDC_WHERE();
+        ret = sd_send_cmd9(sdc); //CSD
+    }
+
+    if (!ret) {
+        SDC_WHERE();
+        ret = sd_send_cmd7(sdc); //select the card
+    }
+
+    if (!ret && (sdc->wkmod & SDC_WKMOD_4WIRE) ) {
+        SDC_WHERE();
+        ret = sd_send_acmd51(sdc); //SCR
+        if (!ret && (sdc->scr[1] & 0x00040000)) { // 4bit mode supported?
+            ret = sd_send_acmd6(sdc, 4); //switch to 4bit mode
+        }
+    }
+
+    if (!ret && (sdc->wkmod & SDC_WKMOD_50M_HI_SPEED) && (sdc->csd[2] & 0x40000000) ) { //judge whether class10 is supported? CMD6 is belonging to class10.
+        SDC_WHERE();
+        ret = sd_send_cmd6(sdc, 0x00fffff1, buffer); //switch to high speed mode.
+        if ( !ret &&  (*(((unsigned char*)buffer)+13)&0x02) ) { //the card support high speed mode?
+            SDC_WHERE();
+            ret = sd_send_cmd6(sdc, 0x80fffff1, buffer); //switch to high speed mode.
+            if (!ret && ((*(((unsigned char*)buffer)+16) & 0xf) == 1) ) {
+                //switch to high speed mode sucess.
+                sd_send_uncmd7(sdc); //deselect the card
+                sd_send_cmd9(sdc); //CSD
+                ret = sd_send_cmd7(sdc); //select the card
+            }
+        }
+    }
+
+    if (!ret && (sdc->wkmod & (SDC_WKMOD_50M_HI_SPEED|SDC_WKMOD_25M_STAND_SPEED))) {
+        if ( (sdc->csd[3] & 0xff) == 0x5A ) { //50MHz high speed mode.
+            SDC_WHERE();
+            ret = synopmob_set_clk_freq(sdc, (((CIU_CLK)/(50000*2))));
+        }
+        else if ( (sdc->csd[3] & 0xff) == 0x32 ) {
+            SDC_WHERE(); //25MHz standard speed mode.
+            ret = synopmob_set_clk_freq(sdc, sdc_clk_divider/*ONE_BIT_BUS_FREQ*/);
+        }
+    }
+
+    if (!ret) {
+        sdc->card_type = SD_TYPE;
+        if (hcs) {
+            sdc->card_type = SD_2_0_TYPE;
+        }
+    }
+
+    return ret;
 }
 
 int sdio_drv_creg_read(HSDC handle, int addr, int fn, unsigned int *resp)
 {
-	sdc_t* sdc = (sdc_t*)handle;
-	unsigned int arg;
-	unsigned int cmd_reg = 0x74;
-	unsigned int intst;
-	int   ret;
-	unsigned int base = sdc->ip_base;
-	rt_err_t err;
+    sdc_t* sdc = (sdc_t*)handle;
+    unsigned int arg;
+    unsigned int cmd_reg = 0x74;
+    unsigned int intst;
+    int   ret;
+    unsigned int base = sdc->ip_base;
+    rt_err_t err;
 
     if(resp) {
         *resp = 0;
     }
-    
-	err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
-	if (err != RT_EOK) {
-		return ERRNORES;
-	}
 
-	arg = (fn << 28) | (addr << 9);
-	ret = synopmob_execute_command(base, cmd_reg, arg);
-	if (!ret) {
-		ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
-		if (!ret) {
-			synopmob_set_register(base+RINTSTS, intst); //write to clear
-			ret = synopmob_handle_standard_rinsts(intst);
-			if (!ret) {
-				*resp = synopmob_read_register(base+RESP0);
-				ret = synopmob_check_r5_resp(*resp);
-			}
-		}
-	}
+    err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
+    if (err != RT_EOK) {
+        return ERRNORES;
+    }
 
-	rt_sem_release(sdc->mutex);
-	
-	if (ret) {
-		ret++;
-		ret--;
-		SDIO_PRINTF("sdio_drv_creg_read fail:, ret = %d\n", ret);
-	}
-	
-	return ret;
+    arg = (fn << 28) | (addr << 9);
+    ret = synopmob_execute_command(base, cmd_reg, arg);
+    if (!ret) {
+        ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
+        if (!ret) {
+            synopmob_set_register(base+RINTSTS, intst); //write to clear
+            ret = synopmob_handle_standard_rinsts(intst);
+            if (!ret) {
+                *resp = synopmob_read_register(base+RESP0);
+                ret = synopmob_check_r5_resp(*resp);
+            }
+        }
+    }
+
+    rt_sem_release(sdc->mutex);
+
+    if (ret) {
+        ret++;
+        ret--;
+        SDIO_PRINTF("sdio_drv_creg_read fail:, ret = %d\n", ret);
+    }
+
+    return ret;
 }
 
 int sdio_drv_creg_write(HSDC handle, int addr, int fn, unsigned char data, unsigned int *resp)
 {
-	sdc_t* sdc = (sdc_t*)handle;
-	unsigned int arg;
-	unsigned int cmd_reg = 0x74;
-	unsigned int intst;
-	int   ret;
-	unsigned int base = sdc->ip_base;
-	rt_err_t err;
+    sdc_t* sdc = (sdc_t*)handle;
+    unsigned int arg;
+    unsigned int cmd_reg = 0x74;
+    unsigned int intst;
+    int   ret;
+    unsigned int base = sdc->ip_base;
+    rt_err_t err;
 
-	err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
-	if (err != RT_EOK) {
-		return ERRNORES;
-	}
-	
-	arg = (1 << 31) | (fn << 28) | (1 << 27) | (addr << 9) | data;
-	ret = synopmob_execute_command(base, cmd_reg, arg);
-	if (!ret) {
-		ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
-		if (!ret) {
-			synopmob_set_register(base+RINTSTS, intst); //write to clear
-			ret = synopmob_handle_standard_rinsts(intst);
-			if (!ret) {
-				*resp = synopmob_read_register(base+RESP0);
-				ret = synopmob_check_r5_resp(*resp);
-			}
-		}
-	}
+    err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
+    if (err != RT_EOK) {
+        return ERRNORES;
+    }
 
-	rt_sem_release(sdc->mutex);
-	if (ret) {
-		ret++;
-		ret--;
-		SDIO_PRINTF("sdio_drv_creg_write fail:, ret = %d\n", ret);
-	}
-	
-	return ret;
+    arg = (1 << 31) | (fn << 28) | (1 << 27) | (addr << 9) | data;
+    ret = synopmob_execute_command(base, cmd_reg, arg);
+    if (!ret) {
+        ret = synopmob_wait_command_done(base, &intst, INTMSK_CMD_DONE);
+        if (!ret) {
+            synopmob_set_register(base+RINTSTS, intst); //write to clear
+            ret = synopmob_handle_standard_rinsts(intst);
+            if (!ret) {
+                *resp = synopmob_read_register(base+RESP0);
+                ret = synopmob_check_r5_resp(*resp);
+            }
+        }
+    }
+
+    rt_sem_release(sdc->mutex);
+    if (ret) {
+        ret++;
+        ret--;
+        SDIO_PRINTF("sdio_drv_creg_write fail:, ret = %d\n", ret);
+    }
+
+    return ret;
 }
 
 #define ARC_REG_DC_IVDL 0x4A
@@ -1184,153 +1184,153 @@ extern void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size);
 extern void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size);
 void inv_dcache_range(unsigned long start, unsigned long len)
 {
-	mmu_invalidate_dcache(start, len);
+    mmu_invalidate_dcache(start, len);
 }
 
 void flush_dcache_range(unsigned long start, unsigned long len)
 {
-	mmu_clean_dcache(start, len);
+    mmu_clean_dcache(start, len);
 }
 
 int g_use_bcm43362 = 0;
 static int sdio_drv_read_write(sdc_t* sdc, unsigned int rw, unsigned int addr, unsigned int fn, unsigned int bcnt,
-								   unsigned int bsize, unsigned char *buf)
+                                   unsigned int bsize, unsigned char *buf)
 {
-	volatile DmaDesc *pDmaDesc = sdc->pDmaDesc;
-	int   ret;	
-	unsigned int intsts = 0;
-	unsigned int cmd = 0x2275;
-	unsigned int base = sdc->ip_base;
-	unsigned int arg;
-	unsigned int num;
-	int   loop_for_command_done_check = 10000;//DATA_TRANSFER_OVER_TIMEOUT_USEC;	
-	rt_err_t err;	
+    volatile DmaDesc *pDmaDesc = sdc->pDmaDesc;
+    int   ret;
+    unsigned int intsts = 0;
+    unsigned int cmd = 0x2275;
+    unsigned int base = sdc->ip_base;
+    unsigned int arg;
+    unsigned int num;
+    int   loop_for_command_done_check = 10000;//DATA_TRANSFER_OVER_TIMEOUT_USEC;
+    rt_err_t err;
 
 //SDIO_PRINTF("------- %s, line %d buf = %08x size = %d -------\n", __FUNCTION__, __LINE__, buf, bsize);
-	arg = (fn << 28) | (addr << 9);
+    arg = (fn << 28) | (addr << 9);
 
-	if (g_use_bcm43362) {
-		arg |= (1 << 26); //OPcode = 1............, for AP6181.
-	}
-
-	if (bcnt == 1 && bsize <= 512)
-		arg |= (bsize & 0x1ff);
-	else
-		arg |= ((1 << 27) | bcnt);	
-	if ( rw ) {
-		cmd |= 0x400;
-		arg |= (1 << 31);
-	}
-	num = bsize*bcnt;
-
-	if ( rw ) {
-		flush_dcache_range((unsigned long)buf, num);
-	}
-	else {
-		inv_dcache_range((unsigned long)buf, num);
+    if (g_use_bcm43362) {
+        arg |= (1 << 26); //OPcode = 1............, for AP6181.
     }
 
-	err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
-	if (err != RT_EOK) {
-	return ERRNORES;
-	}
+    if (bcnt == 1 && bsize <= 512)
+        arg |= (bsize & 0x1ff);
+    else
+        arg |= ((1 << 27) | bcnt);
+    if ( rw ) {
+        cmd |= 0x400;
+        arg |= (1 << 31);
+    }
+    num = bsize*bcnt;
+
+    if ( rw ) {
+        flush_dcache_range((unsigned long)buf, num);
+    }
+    else {
+        inv_dcache_range((unsigned long)buf, num);
+    }
+
+    err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
+    if (err != RT_EOK) {
+    return ERRNORES;
+    }
 
 //synopmob_set_bits(base+FIFOTH, 0x2 << 28);
-	// reset
-	synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
-	while (synopmob_read_register(base+CTRL) & FIFO_RESET);
-	synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
+    // reset
+    synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
+    while (synopmob_read_register(base+CTRL) & FIFO_RESET);
+    synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
 
-	//pDmaDesc->desc0 = 0;
-	pDmaDesc->desc0 |= DescOwnByDma | DescFirstDesc | DescLastDesc;
-	pDmaDesc->desc1 = ((num << DescBuf1SizeShift) & DescBuf1SizMsk);
-	pDmaDesc->desc2 = (unsigned int)buf;
-	//pDmaDesc->desc3 = 0;
-	flush_dcache_range((unsigned int)pDmaDesc, sizeof(DmaDesc));
-	synopmob_set_register(base+DBADDR, (unsigned int)pDmaDesc);
-	synopmob_set_register(base+BLKSIZ, bsize);
-	synopmob_set_register(base+BYTCNT, num);
-	synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC);
-	synopmob_set_bits(base + BMOD,BMOD_DE);
+    //pDmaDesc->desc0 = 0;
+    pDmaDesc->desc0 |= DescOwnByDma | DescFirstDesc | DescLastDesc;
+    pDmaDesc->desc1 = ((num << DescBuf1SizeShift) & DescBuf1SizMsk);
+    pDmaDesc->desc2 = (unsigned int)buf;
+    //pDmaDesc->desc3 = 0;
+    flush_dcache_range((unsigned int)pDmaDesc, sizeof(DmaDesc));
+    synopmob_set_register(base+DBADDR, (unsigned int)pDmaDesc);
+    synopmob_set_register(base+BLKSIZ, bsize);
+    synopmob_set_register(base+BYTCNT, num);
+    synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC);
+    synopmob_set_bits(base + BMOD,BMOD_DE);
 
 //SDIO_PRINTF("pDmaDesc = %08x, %08x / %08x / %08x / %08x\n", pDmaDesc, pDmaDesc->desc0, pDmaDesc->desc1, pDmaDesc->desc2, pDmaDesc->desc3);
-	ret = synopmob_execute_command(base, cmd,  arg);
-	if ( !ret ) {
-		ret = ERRIDMA;
-		err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS);
-		if ( !err ) {
-			while (--loop_for_command_done_check > 0) {
-				intsts = synopmob_read_register(base+RINTSTS);
-				if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) {
-					break;
-				}
-				plat_loop(1);
-			}
-			ret = synopmob_handle_standard_rinsts(intsts);
-			if (!ret ) {
-				if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt
+    ret = synopmob_execute_command(base, cmd,  arg);
+    if ( !ret ) {
+        ret = ERRIDMA;
+        err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS);
+        if ( !err ) {
+            while (--loop_for_command_done_check > 0) {
+                intsts = synopmob_read_register(base+RINTSTS);
+                if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) {
+                    break;
+                }
+                plat_loop(1);
+            }
+            ret = synopmob_handle_standard_rinsts(intsts);
+            if (!ret ) {
+                if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt
 SDIO_PRINTF("------- %s, line %d idsts = %08x check = %d -------\n", __FUNCTION__, __LINE__, sdc->idsts, loop_for_command_done_check);
-					ret = ERRIDMA;
-				}
-			}
-			else
+                    ret = ERRIDMA;
+                }
+            }
+            else
                 SDIO_PRINTF("------- %s, line %d intsts = %08x buf = %08x -------\n", __FUNCTION__, __LINE__, intsts, buf);
-		}
-	}
+        }
+    }
+
+    if (!ret) {
+        synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
+        synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC);
+        synopmob_clear_bits(base + BMOD,BMOD_DE);
+        synopmob_set_register(base+BLKSIZ, 512);
+        synopmob_set_register(base+BYTCNT, 512);
+    }
+    else {
+        char* op = "read";
+        if (rw)
+            op = "write";
 
-	if (!ret) {
-		synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
-		synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC);
-		synopmob_clear_bits(base + BMOD,BMOD_DE);
-		synopmob_set_register(base+BLKSIZ, 512);
-		synopmob_set_register(base+BYTCNT, 512);
-	}
-	else {
-   		char* op = "read";
-   		if (rw) 
-   			op = "write";
-   		
         SDIO_PRINTF("sdio_drv_read_write1(%s) fail:, ret = %d\n", op, ret);
-	}
-		
-	if ( rw && !ret ) { //write
-		ret = synopmob_wait_data_ready(base);
-	}
+    }
 
-	rt_sem_release(sdc->mutex);
+    if ( rw && !ret ) { //write
+        ret = synopmob_wait_data_ready(base);
+    }
+
+    rt_sem_release(sdc->mutex);
+
+    if ( !rw && !ret ) { //read
+        inv_dcache_range((unsigned long)buf, num);
+    }
 
-	if ( !rw && !ret ) { //read
-		inv_dcache_range((unsigned long)buf, num);
-	}
-	
        if (ret) {
-       		char* op = "read";
-       		if (rw) 
-       			op = "write";
-       		
-	        SDIO_PRINTF("sdio_drv_read_write2(%s) fail:, ret = %d\n", op, ret);
+            char* op = "read";
+            if (rw)
+                op = "write";
+
+            SDIO_PRINTF("sdio_drv_read_write2(%s) fail:, ret = %d\n", op, ret);
        }
-	return ret;
-	//return ret ? 0/*false*/ : 1/*true*/;
+    return ret;
+    //return ret ? 0/*false*/ : 1/*true*/;
 }
 
 int sdio_drv_read(HSDC handle, unsigned int addr, unsigned int fn, unsigned int bcnt,
-		   unsigned int bsize, unsigned char *buf)
+           unsigned int bsize, unsigned char *buf)
 {
-	return sdio_drv_read_write((sdc_t*)handle, 0, addr, fn, bcnt, bsize, buf);
+    return sdio_drv_read_write((sdc_t*)handle, 0, addr, fn, bcnt, bsize, buf);
 }
 
 int sdio_drv_write(HSDC handle, unsigned int addr, unsigned int fn, unsigned int bcnt,
-		   unsigned int bsize, unsigned char *buf)
+           unsigned int bsize, unsigned char *buf)
 {
-	return sdio_drv_read_write((sdc_t*)handle, 1, addr, fn, bcnt, bsize, buf);
+    return sdio_drv_read_write((sdc_t*)handle, 1, addr, fn, bcnt, bsize, buf);
 }
 
 static void dumpchain(DmaDesc *pChain)
 {
     int i = 0;
     DmaDesc *tmp_pChain = pChain;
-    
+
     while(tmp_pChain && i < 10)
     {
         SDIO_PRINTF("[%d]: chain =%p, buf = %p, size = %d, csi = %08x, next = %p\n", i, tmp_pChain, (DmaDesc *)tmp_pChain->desc2, tmp_pChain->desc1, tmp_pChain->desc0, (DmaDesc *)tmp_pChain->desc3);
@@ -1346,711 +1346,711 @@ static void dumpchain(DmaDesc *pChain)
 #if 1
 int sdio_drv_chain_write(sdc_t* sdc, unsigned int addr, unsigned int fn, unsigned int bcnt, unsigned int bsize, buf_chain_t *chain)
 {
-	int   ret;	
-	unsigned int intsts = 0;
-	unsigned int cmd = 0x2275;
-	unsigned int base = sdc->ip_base;
-	unsigned int arg;
-	unsigned int num;
-	unsigned int chain_len = 0;
-	int   loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC;	
-	rt_err_t err;	
-	unsigned int rw = 1;
-	DmaDesc *tmpDesc = (DmaDesc *)chain;
-	DmaDesc *lastDesc = (void*)0;
+    int   ret;
+    unsigned int intsts = 0;
+    unsigned int cmd = 0x2275;
+    unsigned int base = sdc->ip_base;
+    unsigned int arg;
+    unsigned int num;
+    unsigned int chain_len = 0;
+    int   loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC;
+    rt_err_t err;
+    unsigned int rw = 1;
+    DmaDesc *tmpDesc = (DmaDesc *)chain;
+    DmaDesc *lastDesc = (void*)0;
 
-	arg = (fn << 28) | (addr << 9);
-	if (bcnt == 1 && bsize <= 512)
-		arg |= (bsize & 0x1ff);
-	else
-		arg |= ((1 << 27) | bcnt);	
-	if ( rw ) {
-		cmd |= 0x400;
-		arg |= (1 << 31);
-	}
-	num = bsize*bcnt;
+    arg = (fn << 28) | (addr << 9);
+    if (bcnt == 1 && bsize <= 512)
+        arg |= (bsize & 0x1ff);
+    else
+        arg |= ((1 << 27) | bcnt);
+    if ( rw ) {
+        cmd |= 0x400;
+        arg |= (1 << 31);
+    }
+    num = bsize*bcnt;
+
+    err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
+    if (err != RT_EOK) {
+        return ERRNORES;
+    }
+
+    // reset
+    synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
+    while (synopmob_read_register(base+CTRL) & FIFO_RESET);
+        synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
 
-	err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
-	if (err != RT_EOK) {
-		return ERRNORES;
-	}
-	
-	// reset
-	synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
-	while (synopmob_read_register(base+CTRL) & FIFO_RESET);
-    	synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
-	
     while(tmpDesc != 0) {
         // make sure size is little than DescBuf1SizMsk
         if(tmpDesc->desc1 > (DescBuf1SizMsk >> DescBuf1SizeShift)) {
-            // TBD... fix me 
+            // TBD... fix me
             rt_sem_release(sdc->mutex);
             return 0;
         }
         // TBD... fix me, we must align tmpDesc->desc2 to 4 ?
-        
+
         tmpDesc->desc0 = DescOwnByDma | DescSecAddrChained;
-        
+
         // is it last node?
         if(tmpDesc->desc3 == 0 || tmpDesc->desc3 == (unsigned int)chain) {
-    		tmpDesc->desc0 |= DescLastDesc;
-    		lastDesc = tmpDesc;
+            tmpDesc->desc0 |= DescLastDesc;
+            lastDesc = tmpDesc;
         }
         else {
-        	tmpDesc->desc0 |= DescDisInt; //disable interrupt...        	
+            tmpDesc->desc0 |= DescDisInt; //disable interrupt...
         }
-        
+
         // is it first node?
         if((char *)tmpDesc == (char *)chain) {
-    		tmpDesc->desc0 |= DescFirstDesc;
-        } 
+            tmpDesc->desc0 |= DescFirstDesc;
+        }
 
         flush_dcache_range(tmpDesc->desc2, tmpDesc->desc1);
-        
+
         tmpDesc = (DmaDesc *)tmpDesc->desc3;
         chain_len += sizeof(buf_chain_t);
 
         if((char *)tmpDesc == (char *)chain) {
-        	break;
+            break;
         }
     }
 
     lastDesc->desc3 = (unsigned int)chain;
 
-	//FIXME, chain must be continuous arrry.
-	flush_dcache_range((unsigned long)chain, chain_len);
+    //FIXME, chain must be continuous arrry.
+    flush_dcache_range((unsigned long)chain, chain_len);
 
-	synopmob_set_register(base+DBADDR, (unsigned int)(chain));
-    
-	synopmob_set_register(base+BLKSIZ, bsize);
-	synopmob_set_register(base+BYTCNT, num);
-	synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC);
-	synopmob_set_bits(base + BMOD,BMOD_DE);
-	
-	ret = synopmob_execute_command(base, cmd,  arg);
-	if ( !ret ) {
-		ret = ERRIDMA;
-		err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS);
-		if ( !err ) {
-			while (--loop_for_command_done_check > 0) {
-				intsts = synopmob_read_register(base+RINTSTS);
-				if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) {
-					break;
-				}
-				plat_loop(1);
-			}
-			ret = synopmob_handle_standard_rinsts(intsts);
-			if (!ret ) {
-				if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt
-					ret = ERRIDMA;
-				}
-			}
-		}
-	}
+    synopmob_set_register(base+DBADDR, (unsigned int)(chain));
 
-	if (!ret) {
-		synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
-		synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC);
-		synopmob_clear_bits(base + BMOD,BMOD_DE);
-		synopmob_set_register(base+BLKSIZ, 512);
-		synopmob_set_register(base+BYTCNT, 512);
-	}
-	else {
-	   		char* op = "read";
-	   		if (rw) 
-	   			op = "write";
-	   		
-	        SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d, bsize = %d * %d\n", op, ret, bsize, bcnt);
-	        dumpchain((DmaDesc *)chain);
-	}
+    synopmob_set_register(base+BLKSIZ, bsize);
+    synopmob_set_register(base+BYTCNT, num);
+    synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC);
+    synopmob_set_bits(base + BMOD,BMOD_DE);
 
-	if ( rw && !ret ) {
-		ret = synopmob_wait_data_ready(base);
-	}
+    ret = synopmob_execute_command(base, cmd,  arg);
+    if ( !ret ) {
+        ret = ERRIDMA;
+        err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS);
+        if ( !err ) {
+            while (--loop_for_command_done_check > 0) {
+                intsts = synopmob_read_register(base+RINTSTS);
+                if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) {
+                    break;
+                }
+                plat_loop(1);
+            }
+            ret = synopmob_handle_standard_rinsts(intsts);
+            if (!ret ) {
+                if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt
+                    ret = ERRIDMA;
+                }
+            }
+        }
+    }
 
-	rt_sem_release(sdc->mutex);
+    if (!ret) {
+        synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
+        synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC);
+        synopmob_clear_bits(base + BMOD,BMOD_DE);
+        synopmob_set_register(base+BLKSIZ, 512);
+        synopmob_set_register(base+BYTCNT, 512);
+    }
+    else {
+            char* op = "read";
+            if (rw)
+                op = "write";
 
-	if (ret) {
-		ret++;
-		ret--;
-	        SDIO_PRINTF("sdio_drv_chain_write2, fail:, ret = %d\n", ret);
-	}
+            SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d, bsize = %d * %d\n", op, ret, bsize, bcnt);
+            dumpchain((DmaDesc *)chain);
+    }
 
-	return ret;
-	//return ret ? 0/*false*/ : 1/*true*/;
+    if ( rw && !ret ) {
+        ret = synopmob_wait_data_ready(base);
+    }
+
+    rt_sem_release(sdc->mutex);
+
+    if (ret) {
+        ret++;
+        ret--;
+            SDIO_PRINTF("sdio_drv_chain_write2, fail:, ret = %d\n", ret);
+    }
+
+    return ret;
+    //return ret ? 0/*false*/ : 1/*true*/;
 }
 #elif 0
 int sdio_drv_chain_write(sdc_t* sdc, unsigned int addr, unsigned int fn, unsigned int bcnt, unsigned int bsize, buf_chain_t *chain)
 {
-	//static volatile DmaDesc __attribute__ ((aligned(32))) st_pchain[4];
-	volatile DmaDesc *st_pchain = (DmaDesc *)0x9a700000;
-		
-	int   ret;	
-	unsigned int intsts = 0;
-	unsigned int cmd = 0x2275;
-	unsigned int base = sdc->ip_base;
-	unsigned int arg;
-	unsigned int num;
-	unsigned int chain_len = 0;
-	int   loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC;	
-	char err;	
-	unsigned int rw = 1;
+    //static volatile DmaDesc __attribute__ ((aligned(32))) st_pchain[4];
+    volatile DmaDesc *st_pchain = (DmaDesc *)0x9a700000;
 
-	buf_chain_t *usrchain;
-	unsigned int desc0;
-	unsigned int length = 0;
+    int   ret;
+    unsigned int intsts = 0;
+    unsigned int cmd = 0x2275;
+    unsigned int base = sdc->ip_base;
+    unsigned int arg;
+    unsigned int num;
+    unsigned int chain_len = 0;
+    int   loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC;
+    char err;
+    unsigned int rw = 1;
 
-	if (!chain) {
-		return 0;
-	}
+    buf_chain_t *usrchain;
+    unsigned int desc0;
+    unsigned int length = 0;
 
-	arg = (fn << 28) | (addr << 9);
-	if (bcnt == 1 && bsize <= 512)
-		arg |= (bsize & 0x1ff);
-	else
-		arg |= ((1 << 27) | bcnt);	
-	if ( rw ) {
-		cmd |= 0x400;
-		arg |= (1 << 31);
-	}
-	num = bsize*bcnt;
+    if (!chain) {
+        return 0;
+    }
 
-	OSSemPend(sdc->mutex, 0, &err);
-	if (err != OS_NO_ERR) {
-		return ERRNORES;
-	}
-	
-	// reset
-	synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
-	while (synopmob_read_register(base+CTRL) & FIFO_RESET);
-    	synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
+    arg = (fn << 28) | (addr << 9);
+    if (bcnt == 1 && bsize <= 512)
+        arg |= (bsize & 0x1ff);
+    else
+        arg |= ((1 << 27) | bcnt);
+    if ( rw ) {
+        cmd |= 0x400;
+        arg |= (1 << 31);
+    }
+    num = bsize*bcnt;
 
-	usrchain = chain;
-    	while (1) {
-		if(usrchain->size > (DescBuf1SizMsk >> DescBuf1SizeShift)) {
-            		// TBD... fix me 
-	            OSSemPost (sdc->mutex);
-        	    return 0;
-		}
-		length += usrchain->size;
-    		desc0 = DescOwnByDma | DescSecAddrChained;
-    		if (!usrchain->next || usrchain->next == chain) {
-    			desc0 |= DescLastDesc;
-    		}
-		else {
-        		desc0 |= DescDisInt; //disable interrupt...        	
-		}        
+    OSSemPend(sdc->mutex, 0, &err);
+    if (err != OS_NO_ERR) {
+        return ERRNORES;
+    }
 
-		if(usrchain == chain) {
-			desc0 |= DescFirstDesc;
-		}
+    // reset
+    synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
+    while (synopmob_read_register(base+CTRL) & FIFO_RESET);
+        synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
 
-    		st_pchain[chain_len].desc0 = desc0;
-		st_pchain[chain_len].desc1 = (unsigned int)usrchain->size;
-		st_pchain[chain_len].desc2 = (unsigned int)usrchain->buf;
-		st_pchain[chain_len].desc3 = (unsigned int)(&st_pchain[chain_len+1]);
-		flush_dcache_range((unsigned int)usrchain->buf, usrchain->size);
-		
-		usrchain = usrchain->next;
-		if( !usrchain || usrchain == chain) {
-	        	break;
-		}
-		if (++chain_len >= 4) {
-			while(1) SDIO_PRINTF("sdio_drv_chain_write:long chain!\n");
-		}
-    	}
-	st_pchain[chain_len].desc3 = (unsigned int)(&st_pchain[0]);
+    usrchain = chain;
+        while (1) {
+        if(usrchain->size > (DescBuf1SizMsk >> DescBuf1SizeShift)) {
+                    // TBD... fix me
+                OSSemPost (sdc->mutex);
+                return 0;
+        }
+        length += usrchain->size;
+            desc0 = DescOwnByDma | DescSecAddrChained;
+            if (!usrchain->next || usrchain->next == chain) {
+                desc0 |= DescLastDesc;
+            }
+        else {
+                desc0 |= DescDisInt; //disable interrupt...
+        }
 
-	if (length != num) {
-		while (1) SDIO_PRINTF("sdio_drv_chain_write:too long packet!\n");
-	}
+        if(usrchain == chain) {
+            desc0 |= DescFirstDesc;
+        }
 
-	synopmob_set_register(base+DBADDR, (unsigned int)(st_pchain));
-    
-	synopmob_set_register(base+BLKSIZ, bsize);
-	synopmob_set_register(base+BYTCNT, num);
-	synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC);
-	synopmob_set_bits(base + BMOD,BMOD_DE);
-	
-	ret = synopmob_execute_command(base, cmd,  arg);
-	if ( !ret ) {
-		ret = ERRIDMA;
-		OSSemPend(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS, &err);
-		if ( !err ) {
-			while (--loop_for_command_done_check > 0) {
-				intsts = synopmob_read_register(base+RINTSTS);
-				if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) {
-					break;
-				}
-				plat_loop(1);
-			}
-			ret = synopmob_handle_standard_rinsts(intsts);
-			if (!ret ) {
-				if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt
-					ret = ERRIDMA;
-				}
-			}
-		}
-	}
+            st_pchain[chain_len].desc0 = desc0;
+        st_pchain[chain_len].desc1 = (unsigned int)usrchain->size;
+        st_pchain[chain_len].desc2 = (unsigned int)usrchain->buf;
+        st_pchain[chain_len].desc3 = (unsigned int)(&st_pchain[chain_len+1]);
+        flush_dcache_range((unsigned int)usrchain->buf, usrchain->size);
 
-	if (!ret) {
-		synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
-		synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC);
-		synopmob_clear_bits(base + BMOD,BMOD_DE);
-		synopmob_set_register(base+BLKSIZ, 512);
-		synopmob_set_register(base+BYTCNT, 512);
-	}
-	else {
-	   	char* op = "read";
-	   	if (rw) 
-	   		op = "write";
-	   		
-	        SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d\n", op, ret);
-	}
+        usrchain = usrchain->next;
+        if( !usrchain || usrchain == chain) {
+                break;
+        }
+        if (++chain_len >= 4) {
+            while(1) SDIO_PRINTF("sdio_drv_chain_write:long chain!\n");
+        }
+        }
+    st_pchain[chain_len].desc3 = (unsigned int)(&st_pchain[0]);
 
-	if ( rw && !ret ) {
-		ret = synopmob_wait_data_ready(base);
-	}
+    if (length != num) {
+        while (1) SDIO_PRINTF("sdio_drv_chain_write:too long packet!\n");
+    }
 
-	OSSemPost (sdc->mutex);
+    synopmob_set_register(base+DBADDR, (unsigned int)(st_pchain));
 
-	return ret;
-	//return ret ? 0/*false*/ : 1/*true*/;
+    synopmob_set_register(base+BLKSIZ, bsize);
+    synopmob_set_register(base+BYTCNT, num);
+    synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC);
+    synopmob_set_bits(base + BMOD,BMOD_DE);
+
+    ret = synopmob_execute_command(base, cmd,  arg);
+    if ( !ret ) {
+        ret = ERRIDMA;
+        OSSemPend(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS, &err);
+        if ( !err ) {
+            while (--loop_for_command_done_check > 0) {
+                intsts = synopmob_read_register(base+RINTSTS);
+                if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) {
+                    break;
+                }
+                plat_loop(1);
+            }
+            ret = synopmob_handle_standard_rinsts(intsts);
+            if (!ret ) {
+                if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt
+                    ret = ERRIDMA;
+                }
+            }
+        }
+    }
+
+    if (!ret) {
+        synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
+        synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC);
+        synopmob_clear_bits(base + BMOD,BMOD_DE);
+        synopmob_set_register(base+BLKSIZ, 512);
+        synopmob_set_register(base+BYTCNT, 512);
+    }
+    else {
+        char* op = "read";
+        if (rw)
+            op = "write";
+
+            SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d\n", op, ret);
+    }
+
+    if ( rw && !ret ) {
+        ret = synopmob_wait_data_ready(base);
+    }
+
+    OSSemPost (sdc->mutex);
+
+    return ret;
+    //return ret ? 0/*false*/ : 1/*true*/;
 }
 #else
 static unsigned char __attribute__ ((aligned(32))) st_net_buf[2*1024];
 int sdio_drv_chain_write(sdc_t* sdc, unsigned int addr, unsigned int fn, unsigned int bcnt, unsigned int bsize, buf_chain_t *chain)
 {
-	static volatile DmaDesc __attribute__ ((aligned(32))) st_pchain;
-		
-	int   ret;	
-	unsigned int intsts = 0;
-	unsigned int cmd = 0x2275;
-	unsigned int base = sdc->ip_base;
-	unsigned int arg;
-	unsigned int num;
-	int   loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC;	
-	rt_err_t err;	
-	unsigned int rw = 1;
+    static volatile DmaDesc __attribute__ ((aligned(32))) st_pchain;
 
-	buf_chain_t *usrchain;
-	unsigned int length = 0;
+    int   ret;
+    unsigned int intsts = 0;
+    unsigned int cmd = 0x2275;
+    unsigned int base = sdc->ip_base;
+    unsigned int arg;
+    unsigned int num;
+    int   loop_for_command_done_check = DATA_TRANSFER_OVER_TIMEOUT_USEC;
+    rt_err_t err;
+    unsigned int rw = 1;
 
-	if (!chain) {
-		return 0;
-	}
+    buf_chain_t *usrchain;
+    unsigned int length = 0;
 
-	arg = (fn << 28) | (addr << 9);
-	if (bcnt == 1 && bsize <= 512)
-		arg |= (bsize & 0x1ff);
-	else
-		arg |= ((1 << 27) | bcnt);	
-	if ( rw ) {
-		cmd |= 0x400;
-		arg |= (1 << 31);
-	}
-	num = bsize*bcnt;
+    if (!chain) {
+        return 0;
+    }
 
-	err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
-	if (err != RT_EOK) {
-		return ERRNORES;
-	}
-	
-	
-	// reset
-	synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
-	while (synopmob_read_register(base+CTRL) & FIFO_RESET);
-    	synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
+    arg = (fn << 28) | (addr << 9);
+    if (bcnt == 1 && bsize <= 512)
+        arg |= (bsize & 0x1ff);
+    else
+        arg |= ((1 << 27) | bcnt);
+    if ( rw ) {
+        cmd |= 0x400;
+        arg |= (1 << 31);
+    }
+    num = bsize*bcnt;
 
-	usrchain = chain;
-    	while (1) {    		
-    		if (length + usrchain->size >= sizeof(st_net_buf)) {
-    			while(1) SDIO_PRINTF("too long net pkt\n");
-    		}
-    		
-    		memcpy(st_net_buf + length, usrchain->buf, usrchain->size);
-    		length += usrchain->size;
-    		usrchain = usrchain->next;
-    		if (!usrchain || usrchain->next == chain) {
-    			break;
-    		}
-    	}
-    	
-    	st_pchain.desc0 = DescOwnByDma | DescSecAddrChained | DescLastDesc | DescFirstDesc;
-    	st_pchain.desc1 = length;
-    	st_pchain.desc2 = (unsigned int)st_net_buf;
- 	st_pchain.desc3 = (unsigned int)&st_pchain;
-	flush_dcache_range((unsigned long)st_net_buf, length);	
-	
-	if (length != num) {
-		while (1) SDIO_PRINTF("sdio_drv_chain_write:too long packet!\n");
-	}
+    err = rt_sem_take(sdc->mutex, RT_WAITING_FOREVER);
+    if (err != RT_EOK) {
+        return ERRNORES;
+    }
 
-	synopmob_set_register(base+DBADDR, (unsigned int)(&st_pchain));
-    
-	synopmob_set_register(base+BLKSIZ, bsize);
-	synopmob_set_register(base+BYTCNT, num);
-	synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC);
-	synopmob_set_bits(base + BMOD,BMOD_DE);
-	
-	ret = synopmob_execute_command(base, cmd,  arg);
-	if ( !ret ) {
-		ret = ERRIDMA;
-		err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS);
-		if ( !err ) {
-			while (--loop_for_command_done_check > 0) {
-				intsts = synopmob_read_register(base+RINTSTS);
-				if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) {
-					break;
-				}
-				plat_loop(1);
-			}
-			ret = synopmob_handle_standard_rinsts(intsts);
-			if (!ret ) {
-				if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt
-					ret = ERRIDMA;
-				}
-			}
-		}
-	}
 
-	if (!ret) {
-		synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
-		synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC);
-		synopmob_clear_bits(base + BMOD,BMOD_DE);
-		synopmob_set_register(base+BLKSIZ, 512);
-		synopmob_set_register(base+BYTCNT, 512);
-	}
-	else {
-	   	char* op = "read";
-	   	if (rw) 
-	   		op = "write";
-	   		
-	        SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d\n", op, ret);
-	}
+    // reset
+    synopmob_set_bits(base+CTRL, FIFO_RESET); //reset FIFO
+    while (synopmob_read_register(base+CTRL) & FIFO_RESET);
+        synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
 
-	if ( rw && !ret ) {
-		ret = synopmob_wait_data_ready(base);
-	}
+    usrchain = chain;
+        while (1) {
+            if (length + usrchain->size >= sizeof(st_net_buf)) {
+                while(1) SDIO_PRINTF("too long net pkt\n");
+            }
 
-	rt_sem_release(sdc->mutex);
+            memcpy(st_net_buf + length, usrchain->buf, usrchain->size);
+            length += usrchain->size;
+            usrchain = usrchain->next;
+            if (!usrchain || usrchain->next == chain) {
+                break;
+            }
+        }
 
-	return ret;
-	//return ret ? 0/*false*/ : 1/*true*/;
+        st_pchain.desc0 = DescOwnByDma | DescSecAddrChained | DescLastDesc | DescFirstDesc;
+        st_pchain.desc1 = length;
+        st_pchain.desc2 = (unsigned int)st_net_buf;
+    st_pchain.desc3 = (unsigned int)&st_pchain;
+    flush_dcache_range((unsigned long)st_net_buf, length);
+
+    if (length != num) {
+        while (1) SDIO_PRINTF("sdio_drv_chain_write:too long packet!\n");
+    }
+
+    synopmob_set_register(base+DBADDR, (unsigned int)(&st_pchain));
+
+    synopmob_set_register(base+BLKSIZ, bsize);
+    synopmob_set_register(base+BYTCNT, num);
+    synopmob_set_bits(base + CTRL, CTRL_USE_IDMAC);
+    synopmob_set_bits(base + BMOD,BMOD_DE);
+
+    ret = synopmob_execute_command(base, cmd,  arg);
+    if ( !ret ) {
+        ret = ERRIDMA;
+        err = rt_sem_take(sdc->sem, DMA_TRANSFER_TIMEOUT_TICKS);
+        if ( !err ) {
+            while (--loop_for_command_done_check > 0) {
+                intsts = synopmob_read_register(base+RINTSTS);
+                if ((intsts & (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) == (INTMSK_CMD_DONE|INTMSK_DAT_OVER)) {
+                    break;
+                }
+                plat_loop(1);
+            }
+            ret = synopmob_handle_standard_rinsts(intsts);
+            if (!ret ) {
+                if( !loop_for_command_done_check || !(sdc->idsts & 0x100)) { //normal interrupt
+                    ret = ERRIDMA;
+                }
+            }
+        }
+    }
+
+    if (!ret) {
+        synopmob_set_register(base + RINTSTS, 0xfffe); //clear interrupts
+        synopmob_clear_bits(base + CTRL, CTRL_USE_IDMAC);
+        synopmob_clear_bits(base + BMOD,BMOD_DE);
+        synopmob_set_register(base+BLKSIZ, 512);
+        synopmob_set_register(base+BYTCNT, 512);
+    }
+    else {
+        char* op = "read";
+        if (rw)
+            op = "write";
+
+            SDIO_PRINTF("sdio_drv_chain_write1(%s) fail:, ret = %d\n", op, ret);
+    }
+
+    if ( rw && !ret ) {
+        ret = synopmob_wait_data_ready(base);
+    }
+
+    rt_sem_release(sdc->mutex);
+
+    return ret;
+    //return ret ? 0/*false*/ : 1/*true*/;
 }
 #endif
 #endif
 
 static int sdio_card_reset(sdc_t* sdc)
 {
-	unsigned int resp;
-	int ret;
+    unsigned int resp;
+    int ret;
 
-	/* Soft Reset card */
+    /* Soft Reset card */
     sdio_drv_creg_write(sdc, 0x6, 0, 0x8, &resp);
 
-	return 0;
+    return 0;
 }
 
 static int enum_sdio_card(sdc_t* sdc)
 {
-	int ret;
-	unsigned int resp;
-	unsigned int base = sdc->ip_base;
+    int ret;
+    unsigned int resp;
+    unsigned int base = sdc->ip_base;
 
-	#if 0
-	synopmob_set_bits(0x98500004, (1<<24)); //set to output mode
-	synopmob_set_bits(0x98500000, (1<<24)); //power off
-	plat_loop(1000000/5); //Lets give some ramp down period
-	synopmob_clear_bits(0x98500000, (1<<24)); //power on
-	plat_loop(1000000/5);//Lets give some ramp down period
-	#endif
+    #if 0
+    synopmob_set_bits(0x98500004, (1<<24)); //set to output mode
+    synopmob_set_bits(0x98500000, (1<<24)); //power off
+    plat_loop(1000000/5); //Lets give some ramp down period
+    synopmob_clear_bits(0x98500000, (1<<24)); //power on
+    plat_loop(1000000/5);//Lets give some ramp down period
+    #endif
 
-	synopmob_set_register(base+CTYPE, ONE_BIT_MODE);
+    synopmob_set_register(base+CTYPE, ONE_BIT_MODE);
 
-	synopmob_set_register(base+CLKENA, 0x00000001); /*enable clock, non-low-power mode*/
-	ret = synopmob_set_clk_freq(sdc, MMC_FOD_DIVIDER_VALUE);
-	
-	if ( !ret ) {
-		plat_loop(100); //enough for 74 clock.	
-		#if 0
-		sdio_card_reset(sdc);
-		plat_loop(100000);
-		#endif
-		ret = sd_send_cmd5(sdc, 0, &resp);
-		if (!ret) {
-			resp &= 0x00ffffff;
-			ret = sd_send_cmd5(sdc, resp, &resp);
-		}
-	}
+    synopmob_set_register(base+CLKENA, 0x00000001); /*enable clock, non-low-power mode*/
+    ret = synopmob_set_clk_freq(sdc, MMC_FOD_DIVIDER_VALUE);
 
-	if (!ret) {
-		ret = sd_send_cmd3(sdc); //get RCA
-	}
-	
-	if (!ret) {
-		ret = sd_send_cmd7(sdc); //select the card
-	}
+    if ( !ret ) {
+        plat_loop(100); //enough for 74 clock.
+        #if 0
+        sdio_card_reset(sdc);
+        plat_loop(100000);
+        #endif
+        ret = sd_send_cmd5(sdc, 0, &resp);
+        if (!ret) {
+            resp &= 0x00ffffff;
+            ret = sd_send_cmd5(sdc, resp, &resp);
+        }
+    }
+
+    if (!ret) {
+        ret = sd_send_cmd3(sdc); //get RCA
+    }
+
+    if (!ret) {
+        ret = sd_send_cmd7(sdc); //select the card
+    }
 
 
-	if (!g_use_bcm43362)
-	{
-	sdio_drv_creg_read(sdc, 0x13, 0, &resp);
-	if ((resp & 1) && (sdc->wkmod & (SDC_WKMOD_4WIRE|SDC_WKMOD_25M_STAND_SPEED|SDC_WKMOD_50M_HI_SPEED))){ //high speed support?
-		if (sdc->wkmod & SDC_WKMOD_4WIRE) {
-			sdio_drv_creg_read(sdc, 0x7, 0, &resp);
-			resp &= 0xfc;
-			resp |= (1 << 1);
-			sdio_drv_creg_write(sdc, 0x7, 0, resp, &resp); //switch to 4bit mode
-			sdio_drv_creg_read(sdc, 0x7, 0, &resp);
-			if ((resp & 0x3) != 0x2) {
-				return  ERRCARDINTERNAL; // 4bit mode failed
-			}
-			synopmob_set_register(base+CTYPE, FOUR_BIT_MODE);
-		}
-		if (sdc->wkmod & (SDC_WKMOD_25M_STAND_SPEED|SDC_WKMOD_50M_HI_SPEED)) {
-			ret = synopmob_set_clk_freq(sdc, ONE_BIT_BUS_FREQ);
-			//ret = synopmob_set_clk_freq(sdc, 0);
-		}
-	}
+    if (!g_use_bcm43362)
+    {
+    sdio_drv_creg_read(sdc, 0x13, 0, &resp);
+    if ((resp & 1) && (sdc->wkmod & (SDC_WKMOD_4WIRE|SDC_WKMOD_25M_STAND_SPEED|SDC_WKMOD_50M_HI_SPEED))){ //high speed support?
+        if (sdc->wkmod & SDC_WKMOD_4WIRE) {
+            sdio_drv_creg_read(sdc, 0x7, 0, &resp);
+            resp &= 0xfc;
+            resp |= (1 << 1);
+            sdio_drv_creg_write(sdc, 0x7, 0, resp, &resp); //switch to 4bit mode
+            sdio_drv_creg_read(sdc, 0x7, 0, &resp);
+            if ((resp & 0x3) != 0x2) {
+                return  ERRCARDINTERNAL; // 4bit mode failed
+            }
+            synopmob_set_register(base+CTYPE, FOUR_BIT_MODE);
+        }
+        if (sdc->wkmod & (SDC_WKMOD_25M_STAND_SPEED|SDC_WKMOD_50M_HI_SPEED)) {
+            ret = synopmob_set_clk_freq(sdc, ONE_BIT_BUS_FREQ);
+            //ret = synopmob_set_clk_freq(sdc, 0);
+        }
+    }
 
-	sdio_drv_creg_read(sdc, 0x3, 0, &resp); 
-	if (!ret) {
-		sdio_drv_creg_read(sdc, 0x0, 0, &resp); //card version
-		sdio_drv_creg_write(sdc, 0x4, 0, 0x3, &resp); //enable interrupts in card
-		sdio_drv_creg_write(sdc, 0x2, 0, 0x2, &resp); //Eable IO in card
-		do {
-			sdio_drv_creg_read(sdc, 0x3, 0, &resp); 
-		} while (!(resp & 2));
-	}
-	} //g_use_bcm43362
+    sdio_drv_creg_read(sdc, 0x3, 0, &resp);
+    if (!ret) {
+        sdio_drv_creg_read(sdc, 0x0, 0, &resp); //card version
+        sdio_drv_creg_write(sdc, 0x4, 0, 0x3, &resp); //enable interrupts in card
+        sdio_drv_creg_write(sdc, 0x2, 0, 0x2, &resp); //Eable IO in card
+        do {
+            sdio_drv_creg_read(sdc, 0x3, 0, &resp);
+        } while (!(resp & 2));
+    }
+    } //g_use_bcm43362
 
-	sdc->card_type = SDIO_TYPE;
+    sdc->card_type = SDIO_TYPE;
 
-	synopmob_set_bits(base+CTRL, INT_ENABLE);
-	
-	return ret;
+    synopmob_set_bits(base+CTRL, INT_ENABLE);
+
+    return ret;
 }
 
 int sdio_high_speed_mode(HSDC handle, int bitwidth, int freq)
 {
-	int ret;
-	sdc_t* sdc = (sdc_t*)handle;
+    int ret;
+    sdc_t* sdc = (sdc_t*)handle;
 
-	if (bitwidth == 4)
-	{
-		synopmob_set_register(sdc->ip_base+CTYPE, FOUR_BIT_MODE);
-	}
+    if (bitwidth == 4)
+    {
+        synopmob_set_register(sdc->ip_base+CTYPE, FOUR_BIT_MODE);
+    }
 
-	ret = synopmob_set_clk_freq(sdc, /*ONE_BIT_BUS_FREQ*/1);
-	if (ret != 0)
-	{
-		SDIO_PRINTF("sdio_high_speed_mode fail:, ret = %d\n", ret);
-	}
+    ret = synopmob_set_clk_freq(sdc, /*ONE_BIT_BUS_FREQ*/1);
+    if (ret != 0)
+    {
+        SDIO_PRINTF("sdio_high_speed_mode fail:, ret = %d\n", ret);
+    }
 
-	return ret;
+    return ret;
 }
 
 static int common_init(unsigned int which, unsigned int sdio, unsigned int wkmod, unsigned int* dma_desc, HSDC* phandle)
 {
-	int    ret = ERRNORES;
-	sdc_t* sdc;
-	unsigned int  base;
-	unsigned int  temp;
-	unsigned int  fifo_thresh;
-	volatile DmaDesc *pDmaDesc;
-	rt_sem_t sem;
-	rt_sem_t mutex;
-	
-	base = SDC0_REG_BASE;
-	temp = PMU_SDC0_RST_BIT;
-	if (which > 0) {
-		base = SDC1_REG_BASE;
-		temp = PMU_SDC1_RST_BIT;
-	}
-	
+    int    ret = ERRNORES;
+    sdc_t* sdc;
+    unsigned int  base;
+    unsigned int  temp;
+    unsigned int  fifo_thresh;
+    volatile DmaDesc *pDmaDesc;
+    rt_sem_t sem;
+    rt_sem_t mutex;
+
+    base = SDC0_REG_BASE;
+    temp = PMU_SDC0_RST_BIT;
+    if (which > 0) {
+        base = SDC1_REG_BASE;
+        temp = PMU_SDC1_RST_BIT;
+    }
+
 #if 0
-	//PMU_RST_MODULE(temp); plat_loop(1);
-	temp = synopmob_read_register(PMU_REG_CLK_DIV3);
-	temp &= (~(0x0f<<8));
-	temp |= (0xf<<8);
-	synopmob_set_register(PMU_REG_CLK_DIV3, temp);
+    //PMU_RST_MODULE(temp); plat_loop(1);
+    temp = synopmob_read_register(PMU_REG_CLK_DIV3);
+    temp &= (~(0x0f<<8));
+    temp |= (0xf<<8);
+    synopmob_set_register(PMU_REG_CLK_DIV3, temp);
 #endif
-	*phandle = (HSDC)0;
-	
-	sdc = &sdc_array[which];
-	sem = sdc->sem;
-	mutex = sdc->mutex;
-	memset((void *)sdc, 0, sizeof(*sdc));
-	sdc->wkmod = wkmod;
-	sdc->idma_support = 0;
-	sdc->ip_base = base;
-	sdc->rca = 0;
-	sdc->card_type = NONE_TYPE;
-	if (!sem) {
-		sem = rt_sem_create("fh_sdio_sem", 0, RT_IPC_FLAG_PRIO);//OSSemCreate (0);
-		if ( !sem ) {
-			return ret;
-		}
-	}
-	sdc->sem = sem;
+    *phandle = (HSDC)0;
 
-	if (!mutex) {
-		mutex = rt_sem_create("fh_sdio_mutex", 1, RT_IPC_FLAG_PRIO);//OSSemCreate (1);
-		if ( !mutex ) {
-			return ret;
-		}
-	}
-	sdc->mutex = mutex;
-	
-	synopmob_set_bits(base + CTRL, CTRL_RESET); //reset host controller
-	plat_loop(100);
+    sdc = &sdc_array[which];
+    sem = sdc->sem;
+    mutex = sdc->mutex;
+    memset((void *)sdc, 0, sizeof(*sdc));
+    sdc->wkmod = wkmod;
+    sdc->idma_support = 0;
+    sdc->ip_base = base;
+    sdc->rca = 0;
+    sdc->card_type = NONE_TYPE;
+    if (!sem) {
+        sem = rt_sem_create("fh_sdio_sem", 0, RT_IPC_FLAG_PRIO);//OSSemCreate (0);
+        if ( !sem ) {
+            return ret;
+        }
+    }
+    sdc->sem = sem;
 
-	synopmob_clear_bits(base + CTRL,CTRL_USE_IDMAC);
-	sdc->idma_support = 1; //fixed to support IDMA
+    if (!mutex) {
+        mutex = rt_sem_create("fh_sdio_mutex", 1, RT_IPC_FLAG_PRIO);//OSSemCreate (1);
+        if ( !mutex ) {
+            return ret;
+        }
+    }
+    sdc->mutex = mutex;
 
-	pDmaDesc = (volatile DmaDesc *)dma_desc;
-	sdc->pDmaDesc = pDmaDesc;
-	if (sdc->idma_support) {
-		synopmob_set_bits(base + CTRL, DMA_RESET);
-		plat_loop(100);
-		synopmob_set_bits(base + CTRL, FIFO_RESET);
-		plat_loop(100);
-		synopmob_set_bits(base + BMOD, BMOD_SWR);
-		plat_loop(100);
-		
-		//synopmob_set_bits(base + BMOD,BMOD_DE);		
-		pDmaDesc->desc0 = DescSecAddrChained;
-		pDmaDesc->desc1 = 0;
-		pDmaDesc->desc2 = 0;
-		pDmaDesc->desc3 = (unsigned int)(pDmaDesc);
-		synopmob_set_register(base + DBADDR, (unsigned int)(pDmaDesc));
-	}
+    synopmob_set_bits(base + CTRL, CTRL_RESET); //reset host controller
+    plat_loop(100);
 
-	synopmob_set_register(base+CTYPE, ONE_BIT_MODE);
+    synopmob_clear_bits(base + CTRL,CTRL_USE_IDMAC);
+    sdc->idma_support = 1; //fixed to support IDMA
 
-	synopmob_set_register(base+RINTSTS, 0xffffffff);//clear interrupt.
-	synopmob_clear_bits(base+CTRL, INT_ENABLE);
-	synopmob_set_register(base+INTMSK, 0); // mask all INTR
-	synopmob_set_register(base+IDINTEN, IDMAINTBITS); //Enable DMA INTR
+    pDmaDesc = (volatile DmaDesc *)dma_desc;
+    sdc->pDmaDesc = pDmaDesc;
+    if (sdc->idma_support) {
+        synopmob_set_bits(base + CTRL, DMA_RESET);
+        plat_loop(100);
+        synopmob_set_bits(base + CTRL, FIFO_RESET);
+        plat_loop(100);
+        synopmob_set_bits(base + BMOD, BMOD_SWR);
+        plat_loop(100);
+
+        //synopmob_set_bits(base + BMOD,BMOD_DE);
+        pDmaDesc->desc0 = DescSecAddrChained;
+        pDmaDesc->desc1 = 0;
+        pDmaDesc->desc2 = 0;
+        pDmaDesc->desc3 = (unsigned int)(pDmaDesc);
+        synopmob_set_register(base + DBADDR, (unsigned int)(pDmaDesc));
+    }
+
+    synopmob_set_register(base+CTYPE, ONE_BIT_MODE);
+
+    synopmob_set_register(base+RINTSTS, 0xffffffff);//clear interrupt.
+    synopmob_clear_bits(base+CTRL, INT_ENABLE);
+    synopmob_set_register(base+INTMSK, 0); // mask all INTR
+    synopmob_set_register(base+IDINTEN, IDMAINTBITS); //Enable DMA INTR
 
 
-	synopmob_set_register(base+TMOUT, 0xffffffff); /* Set Data and Response timeout to Maximum Value*/
+    synopmob_set_register(base+TMOUT, 0xffffffff); /* Set Data and Response timeout to Maximum Value*/
 
-	/* Set the card Debounce to allow the CDETECT fluctuations to settle down*/	
-	synopmob_set_register(base+DEBNCE, 0x0FFFFF);
+    /* Set the card Debounce to allow the CDETECT fluctuations to settle down*/
+    synopmob_set_register(base+DEBNCE, 0x0FFFFF);
 
-	fifo_thresh = synopmob_read_register(base+FIFOTH);
-	//fifo_thresh = GET_FIFO_DEPTH(fifo_thresh) / 2;
-	fifo_thresh = (GET_FIFO_DEPTH(fifo_thresh) + 1) / 2;
-	sdc->fifo_depth = fifo_thresh * 2;	
-	sdc->fifo_threth = fifo_thresh;
-	/* Tx Watermark */
-	synopmob_clear_bits(base+FIFOTH, 0xfff);
-	synopmob_set_bits(base+FIFOTH, fifo_thresh);
-	/* Rx Watermark */
-	synopmob_clear_bits(base+FIFOTH, 0x0fff0000);
-	synopmob_set_bits(base+FIFOTH, (fifo_thresh-1) << 16);
-	//synopmob_set_bits(base+FIFOTH, 2<< 28);
+    fifo_thresh = synopmob_read_register(base+FIFOTH);
+    //fifo_thresh = GET_FIFO_DEPTH(fifo_thresh) / 2;
+    fifo_thresh = (GET_FIFO_DEPTH(fifo_thresh) + 1) / 2;
+    sdc->fifo_depth = fifo_thresh * 2;
+    sdc->fifo_threth = fifo_thresh;
+    /* Tx Watermark */
+    synopmob_clear_bits(base+FIFOTH, 0xfff);
+    synopmob_set_bits(base+FIFOTH, fifo_thresh);
+    /* Rx Watermark */
+    synopmob_clear_bits(base+FIFOTH, 0x0fff0000);
+    synopmob_set_bits(base+FIFOTH, (fifo_thresh-1) << 16);
+    //synopmob_set_bits(base+FIFOTH, 2<< 28);
 
-	if (!sdio) {
-		ret = enum_sd_card(sdc);
-	}
-	else {
-		ret = enum_sdio_card(sdc);
-	}
+    if (!sdio) {
+        ret = enum_sd_card(sdc);
+    }
+    else {
+        ret = enum_sdio_card(sdc);
+    }
 
-	if (!ret) {
-		*phandle = (HSDC)sdc;
-	}
+    if (!ret) {
+        *phandle = (HSDC)sdc;
+    }
 
-	return ret;
+    return ret;
 }
 
 int sdc_is_connected(unsigned int which)
 {
-	unsigned int base = SDC0_REG_BASE;
-	
-	if (which > 0)
-		base = SDC1_REG_BASE;
+    unsigned int base = SDC0_REG_BASE;
 
-	return !(synopmob_read_register(base+CDETECT) & 1);
+    if (which > 0)
+        base = SDC1_REG_BASE;
+
+    return !(synopmob_read_register(base+CDETECT) & 1);
 }
 
 int sdc_init(unsigned int which, unsigned int wkmod, unsigned int* dma_desc, HSDC* phandle)
 {
-	return common_init(which, 0, wkmod, dma_desc, phandle);
+    return common_init(which, 0, wkmod, dma_desc, phandle);
 }
 
 int sdio_init(unsigned int which, unsigned int wkmod, unsigned int* dma_desc, HSDC* phandle)
 {
-	return common_init(which, 1, wkmod, dma_desc, phandle);
+    return common_init(which, 1, wkmod, dma_desc, phandle);
 }
 
 int sdio_enable_card_int(HSDC handle, int enable)
 {
-	unsigned int base = ((sdc_t*)handle)->ip_base;
+    unsigned int base = ((sdc_t*)handle)->ip_base;
 
-	if (enable) {
-		//synopmob_set_register(base+INTMSK, INTMSK_SDIO);
-		synopmob_set_register(base+INTMSK, (synopmob_read_register(base+INTMSK) | INTMSK_SDIO ));
-	}
-	else {
-		//synopmob_set_register(base+INTMSK, 0);
-		synopmob_set_register(base+INTMSK, (synopmob_read_register(base+INTMSK) & ~INTMSK_SDIO ));
-	}
+    if (enable) {
+        //synopmob_set_register(base+INTMSK, INTMSK_SDIO);
+        synopmob_set_register(base+INTMSK, (synopmob_read_register(base+INTMSK) | INTMSK_SDIO ));
+    }
+    else {
+        //synopmob_set_register(base+INTMSK, 0);
+        synopmob_set_register(base+INTMSK, (synopmob_read_register(base+INTMSK) & ~INTMSK_SDIO ));
+    }
 
-	return 0;
+    return 0;
 }
 
 int sdio_set_card_int_cb(HSDC handle, void (*cb)(void))
 {
-	((sdc_t*)handle)->cb = cb;
+    ((sdc_t*)handle)->cb = cb;
 
-	return 0;
+    return 0;
 }
 
 static void OSSDCISR(sdc_t* sdc)
 {
-	unsigned int sts;
-	unsigned int base;
+    unsigned int sts;
+    unsigned int base;
 
-	base = sdc->ip_base;
-	sts = synopmob_read_register(base+IDSTS);
-	if ( sts ) {
-		synopmob_set_register(base+IDSTS, sts);
-		sdc->idsts = sts;
-		rt_sem_release(sdc->sem);
-	}
+    base = sdc->ip_base;
+    sts = synopmob_read_register(base+IDSTS);
+    if ( sts ) {
+        synopmob_set_register(base+IDSTS, sts);
+        sdc->idsts = sts;
+        rt_sem_release(sdc->sem);
+    }
 
-	//sts = synopmob_read_register(base+RINTSTS);
-	sts = synopmob_read_register(base+MINTSTS);
-	sts &= INTMSK_SDIO;
-	if ( sts ) { //interrupt from WIFI card.
-		//synopmob_set_register(base+INTMSK, 0); //mask all the interrupt	
-		synopmob_set_register(base+INTMSK, synopmob_read_register(base+INTMSK) & ~INTMSK_SDIO ); //mask sdio interrupt	
-		synopmob_set_register(base+RINTSTS, sts);
-		synopmob_set_register(base+MINTSTS, sts);
-		if (sdc->cb) {
-			sdc->cb();
-		}
-	}
+    //sts = synopmob_read_register(base+RINTSTS);
+    sts = synopmob_read_register(base+MINTSTS);
+    sts &= INTMSK_SDIO;
+    if ( sts ) { //interrupt from WIFI card.
+        //synopmob_set_register(base+INTMSK, 0); //mask all the interrupt
+        synopmob_set_register(base+INTMSK, synopmob_read_register(base+INTMSK) & ~INTMSK_SDIO ); //mask sdio interrupt
+        synopmob_set_register(base+RINTSTS, sts);
+        synopmob_set_register(base+MINTSTS, sts);
+        if (sdc->cb) {
+            sdc->cb();
+        }
+    }
 }
 
 void OSSDCINTR_0(int vector, void *param)
 {
-	OSSDCISR(&sdc_array[0]);
+    OSSDCISR(&sdc_array[0]);
 }
 
 void OSSDCINTR_1(int vector, void *param)
 {
-	OSSDCISR(&sdc_array[1]);
+    OSSDCISR(&sdc_array[1]);
 }
 
 void fh_sdio0_init(void)
 {
     int sd0_irq = SDC0_IRQn;
-    
+
     rt_hw_interrupt_install(sd0_irq, OSSDCINTR_0, NULL, NULL);
     rt_hw_interrupt_umask(sd0_irq);
 }
@@ -2058,7 +2058,7 @@ void fh_sdio0_init(void)
 void fh_sdio1_init(void)
 {
     int sd1_irq = SDC1_IRQn;
-    
+
     rt_hw_interrupt_install(sd1_irq, OSSDCINTR_1, NULL, NULL);
     rt_hw_interrupt_umask(sd1_irq);
 }
@@ -2071,14 +2071,14 @@ void fh_sdio_init(void)
 
 int sdc_deinit(HSDC handle)
 {
-	return -1;  // TBD... fix me
+    return -1;  // TBD... fix me
 }
 
 int sdc_set_clk_divider(unsigned int divider)
 {
     if(divider > 255)
         return -1;
-    
+
     sdc_clk_divider = divider;
     return 0;
 }
diff --git a/bsp/fh8620/libraries/driverlib/fh_spi.c b/bsp/fh8620/libraries/driverlib/fh_spi.c
index 14d8039732..14e47ad73b 100644
--- a/bsp/fh8620/libraries/driverlib/fh_spi.c
+++ b/bsp/fh8620/libraries/driverlib/fh_spi.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/fh8620/libraries/driverlib/fh_timer.c b/bsp/fh8620/libraries/driverlib/fh_timer.c
index f3034adeaa..eab30888a5 100644
--- a/bsp/fh8620/libraries/driverlib/fh_timer.c
+++ b/bsp/fh8620/libraries/driverlib/fh_timer.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 /*****************************************************************************
  *  Include Section
  *  add all #include here
@@ -79,66 +79,66 @@
  *****************************************************************************/
 int timer_init(timer *tim)
 {
-	tim->TIMER_CTRL_REG = 0;
+    tim->TIMER_CTRL_REG = 0;
 }
 
 int timer_set_mode(timer *tim, enum timer_mode mode)
 {
-	switch (mode)
-	{
-		case TIMER_MODE_PERIODIC:
-			tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE;
-			break;
-		case TIMER_MODE_ONESHOT:
-			tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE;
-			break;
-		default:
-			rt_kprintf("Not support TIMER mode\n");
-			return -1;
-			break;
-	}
+    switch (mode)
+    {
+        case TIMER_MODE_PERIODIC:
+            tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE;
+            break;
+        case TIMER_MODE_ONESHOT:
+            tim->TIMER_CTRL_REG |= TIMER_CTRL_MODE;
+            break;
+        default:
+            rt_kprintf("Not support TIMER mode\n");
+            return -1;
+            break;
+    }
 
-	return 0;
+    return 0;
 }
 
 void timer_set_period(timer *tim, UINT32 period, UINT32 clock)
 {
-	tim->TIMER_LOAD_COUNT = clock/period;
+    tim->TIMER_LOAD_COUNT = clock/period;
 }
 
 
 
 void timer_enable(timer *tim)
 {
-	tim->TIMER_CTRL_REG |= TIMER_CTRL_ENABLE;
+    tim->TIMER_CTRL_REG |= TIMER_CTRL_ENABLE;
 }
 
 void timer_disable(timer *tim)
 {
-	tim->TIMER_CTRL_REG &= ~TIMER_CTRL_ENABLE;
+    tim->TIMER_CTRL_REG &= ~TIMER_CTRL_ENABLE;
 }
 
 void timer_enable_irq(timer *tim)
 {
-	tim->TIMER_CTRL_REG &= ~TIMER_CTRL_INTMASK;
+    tim->TIMER_CTRL_REG &= ~TIMER_CTRL_INTMASK;
 }
 
 void timer_disable_irq(timer *tim)
 {
-	tim->TIMER_CTRL_REG |= TIMER_CTRL_INTMASK;
+    tim->TIMER_CTRL_REG |= TIMER_CTRL_INTMASK;
 }
 
 UINT32 timer_get_status(timer *tim)
 {
-	return tim->TIMER_INT_STATUS;
+    return tim->TIMER_INT_STATUS;
 }
 
 UINT32 timer_get_eoi(timer *tim)
 {
-	return tim->TIMER_EOI;
+    return tim->TIMER_EOI;
 }
 
 UINT32 timer_get_value(timer *tim)
 {
-	return tim->TIMER_LOAD_COUNT - tim->TIMER_CURRENT_VALUE;
+    return tim->TIMER_LOAD_COUNT - tim->TIMER_CURRENT_VALUE;
 }
diff --git a/bsp/fh8620/libraries/driverlib/fh_uart.c b/bsp/fh8620/libraries/driverlib/fh_uart.c
index 0d9ad1f35d..75b453c9fb 100644
--- a/bsp/fh8620/libraries/driverlib/fh_uart.c
+++ b/bsp/fh8620/libraries/driverlib/fh_uart.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 /*****************************************************************************
  *  Include Section
  *  add all #include here
@@ -79,33 +79,33 @@
 
 int uart_init(uart *port)
 {
-	port->UART_IER = 0;
-	port->UART_LCR = 0;
-	//port->UART_DLL = 0;
-	//port->UART_DLH = 0;
+    port->UART_IER = 0;
+    port->UART_LCR = 0;
+    //port->UART_DLL = 0;
+    //port->UART_DLH = 0;
 }
 
 UINT32 uart_get_status(uart *port)
 {
-	return port->UART_USR;
+    return port->UART_USR;
 }
 
 
 void uart_configure(uart *port, enum data_bits data_bit,
-					enum stop_bits stop_bit, enum parity parity,
-					UINT32 buard_rate, UINT32 uart_clk)
+                    enum stop_bits stop_bit, enum parity parity,
+                    UINT32 buard_rate, UINT32 uart_clk)
 {
-	UINT32 divisor;
-	UINT32 freq;
-	UINT32 baud_div;
-	UINT32 lcr_reg = 0;
-	UINT32 ret;
+    UINT32 divisor;
+    UINT32 freq;
+    UINT32 baud_div;
+    UINT32 lcr_reg = 0;
+    UINT32 ret;
 
-	/*divisor = DIV(buard_rate);
-	port->UART_LCR |= UART_LCR_DLAB;
-	port->UART_DLL = divisor & 0xFF;
-	port->UART_DLH = (divisor >> 8) & 0xFF;
-	port->UART_LCR &= ~UART_LCR_DLAB;*/
+    /*divisor = DIV(buard_rate);
+    port->UART_LCR |= UART_LCR_DLAB;
+    port->UART_DLL = divisor & 0xFF;
+    port->UART_DLH = (divisor >> 8) & 0xFF;
+    port->UART_LCR &= ~UART_LCR_DLAB;*/
 
     do{
         //clear fifo...
@@ -113,141 +113,141 @@ void uart_configure(uart *port, enum data_bits data_bit,
         //read status..
         ret = uart_get_status(port);
     }while(ret & UART_USR_BUSY);
-	switch (data_bit) {
-		case UART_DATA_BIT5:
-			lcr_reg |= UART_LCR_DLS5;
-			break;
-		case UART_DATA_BIT6:
-			lcr_reg |= UART_LCR_DLS6;
-			break;
-		case UART_DATA_BIT7:
-			lcr_reg |= UART_LCR_DLS7;
-			break;
-		case UART_DATA_BIT8:
-			lcr_reg |= UART_LCR_DLS8;
-			break;
-		default:
-			lcr_reg |= UART_LCR_DLS8;
-			break;
-	}
+    switch (data_bit) {
+        case UART_DATA_BIT5:
+            lcr_reg |= UART_LCR_DLS5;
+            break;
+        case UART_DATA_BIT6:
+            lcr_reg |= UART_LCR_DLS6;
+            break;
+        case UART_DATA_BIT7:
+            lcr_reg |= UART_LCR_DLS7;
+            break;
+        case UART_DATA_BIT8:
+            lcr_reg |= UART_LCR_DLS8;
+            break;
+        default:
+            lcr_reg |= UART_LCR_DLS8;
+            break;
+    }
 
-	switch (stop_bit) {
-		case UART_STOP_BIT1:
-			lcr_reg |= UART_LCR_STOP1;
-			break;
-		case UART_STOP_BIT2:
-			lcr_reg |= UART_LCR_STOP2;
-			break;
-		default:
-			lcr_reg |= UART_LCR_STOP1;
-			break;
-	}
+    switch (stop_bit) {
+        case UART_STOP_BIT1:
+            lcr_reg |= UART_LCR_STOP1;
+            break;
+        case UART_STOP_BIT2:
+            lcr_reg |= UART_LCR_STOP2;
+            break;
+        default:
+            lcr_reg |= UART_LCR_STOP1;
+            break;
+    }
 
-	switch (parity) {
-		case UART_PARITY_EVEN:
-			lcr_reg |= UART_LCR_EVEN | UART_LCR_PEN;
-			break;
-		case UART_PARITY_ODD:
-			lcr_reg |= UART_LCR_PEN;
-			break;
-		case UART_PARITY_ST:
-			lcr_reg |= UART_LCR_SP;
-			break;
-		case UART_PARITY_NONE:
-		default:
-			break;
-	}
+    switch (parity) {
+        case UART_PARITY_EVEN:
+            lcr_reg |= UART_LCR_EVEN | UART_LCR_PEN;
+            break;
+        case UART_PARITY_ODD:
+            lcr_reg |= UART_LCR_PEN;
+            break;
+        case UART_PARITY_ST:
+            lcr_reg |= UART_LCR_SP;
+            break;
+        case UART_PARITY_NONE:
+        default:
+            break;
+    }
 
 
 
-	switch (buard_rate) {
-		case 115200:
-			baud_div =  BAUDRATE_115200;
-			break;
-		case 57600:
-			baud_div =  BAUDRATE_57600;
-			break;
-		case 38400:
-			baud_div =  BAUDRATE_38400;
-			break;
-		case 19200:
-			baud_div =  BAUDRATE_19200;
-			break;
-		case 9600:
-			baud_div =  BAUDRATE_9600;
-			break;
-		default:
-			baud_div = BAUDRATE_115200;
-			break;
-	}
+    switch (buard_rate) {
+        case 115200:
+            baud_div =  BAUDRATE_115200;
+            break;
+        case 57600:
+            baud_div =  BAUDRATE_57600;
+            break;
+        case 38400:
+            baud_div =  BAUDRATE_38400;
+            break;
+        case 19200:
+            baud_div =  BAUDRATE_19200;
+            break;
+        case 9600:
+            baud_div =  BAUDRATE_9600;
+            break;
+        default:
+            baud_div = BAUDRATE_115200;
+            break;
+    }
 
-	//clear fifo
-	port->UART_FCR = UART_FCR_RFIFOR | UART_FCR_XFIFOR;
+    //clear fifo
+    port->UART_FCR = UART_FCR_RFIFOR | UART_FCR_XFIFOR;
 
-	//div
-	ret = port->UART_LCR;
-	ret |= UART_LCR_DLAB;
-	port->UART_LCR = ret;
-	port->RBRTHRDLL = baud_div & 0x00ff;
-	port->DLHIER = (baud_div & 0x00ff)>>8;
-	/* clear DLAB */
-	ret = ret & 0x7f;
-	port->UART_LCR = ret;
+    //div
+    ret = port->UART_LCR;
+    ret |= UART_LCR_DLAB;
+    port->UART_LCR = ret;
+    port->RBRTHRDLL = baud_div & 0x00ff;
+    port->DLHIER = (baud_div & 0x00ff)>>8;
+    /* clear DLAB */
+    ret = ret & 0x7f;
+    port->UART_LCR = ret;
 
-	//line control
-	port->UART_LCR = lcr_reg;
-	//fifo control
-	port->UART_FCR = UART_FCR_FIFOE | UART_FCR_RFIFOR | UART_FCR_XFIFOR | UART_FCR_TET_1_4 | UART_FCR_RT_ONE;
+    //line control
+    port->UART_LCR = lcr_reg;
+    //fifo control
+    port->UART_FCR = UART_FCR_FIFOE | UART_FCR_RFIFOR | UART_FCR_XFIFOR | UART_FCR_TET_1_4 | UART_FCR_RT_ONE;
 
 }
 
 
 int uart_enable_irq(uart *port, UINT32 mode)
 {
-	unsigned int ret;
-	ret = port->UART_IER;
-	ret |= mode;
-	port->UART_IER = ret;
+    unsigned int ret;
+    ret = port->UART_IER;
+    ret |= mode;
+    port->UART_IER = ret;
 }
 
 int uart_disable_irq(uart *port, UINT32 mode)
 {
-	unsigned int ret;
-	ret = port->UART_IER;
-	ret &= ~mode;
+    unsigned int ret;
+    ret = port->UART_IER;
+    ret &= ~mode;
 
-	port->UART_IER = ret;
+    port->UART_IER = ret;
 }
 
 UINT32 uart_get_iir_status(uart *port)
 {
-	return port->UART_IIR;
+    return port->UART_IIR;
 }
 
 UINT32 uart_get_line_status(uart *port)
 {
-	return port->UART_LSR;
+    return port->UART_LSR;
 }
 
 UINT32 uart_is_rx_ready(uart *port)
 {
-	return port->UART_LSR & UART_LSR_DR;
+    return port->UART_LSR & UART_LSR_DR;
 }
 
 UINT8 uart_getc(uart *port)
 {
-	return port->UART_RBR & 0xFF;
+    return port->UART_RBR & 0xFF;
 }
 
 void uart_putc(uart *port, UINT8 c)
 {
-	//while(!(port->UART_USR & UART_USR_TFNF));
-	port->UART_THR = c;
+    //while(!(port->UART_USR & UART_USR_TFNF));
+    port->UART_THR = c;
 }
 
 void uart_set_fifo_mode(uart *port, UINT32 fifo_mode)
 {
-	port->UART_FCR = fifo_mode;
+    port->UART_FCR = fifo_mode;
 }
 
 
diff --git a/bsp/fh8620/libraries/driverlib/fh_wdt.c b/bsp/fh8620/libraries/driverlib/fh_wdt.c
index 002a929bba..33e3defa1e 100644
--- a/bsp/fh8620/libraries/driverlib/fh_wdt.c
+++ b/bsp/fh8620/libraries/driverlib/fh_wdt.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/fh8620/libraries/inc/fh_driverlib.h b/bsp/fh8620/libraries/inc/fh_driverlib.h
index 9bb6b8c75d..9f45eb836f 100644
--- a/bsp/fh8620/libraries/inc/fh_driverlib.h
+++ b/bsp/fh8620/libraries/inc/fh_driverlib.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include 
 #include 
 #include "fh_def.h"
diff --git a/bsp/fh8620/libraries/inc/fh_gpio.h b/bsp/fh8620/libraries/inc/fh_gpio.h
index 62d1823eba..3d98a44be3 100644
--- a/bsp/fh8620/libraries/inc/fh_gpio.h
+++ b/bsp/fh8620/libraries/inc/fh_gpio.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef FH_GPIO_H_
 #define FH_GPIO_H_
 
diff --git a/bsp/fh8620/libraries/inc/fh_i2c.h b/bsp/fh8620/libraries/inc/fh_i2c.h
index 4debd9926d..069aa8f275 100644
--- a/bsp/fh8620/libraries/inc/fh_i2c.h
+++ b/bsp/fh8620/libraries/inc/fh_i2c.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef FH_I2C_H_
 #define FH_I2C_H_
 
diff --git a/bsp/fh8620/libraries/inc/fh_ictl.h b/bsp/fh8620/libraries/inc/fh_ictl.h
index 9796c99afc..6959715377 100644
--- a/bsp/fh8620/libraries/inc/fh_ictl.h
+++ b/bsp/fh8620/libraries/inc/fh_ictl.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -30,21 +30,21 @@
 #include "fh_def.h"
 
 typedef struct {
-	RwReg IRQ_EN_L;
-	RwReg IRQ_EN_H;
-	RwReg IRQ_MASK_L;
-	RwReg IRQ_MASK_H;
-	RwReg IRQ_FORCE_L;
-	RwReg IRQ_FORCE_H;
-	RwReg IRQ_RAWSTARUS_L;
-	RwReg IRQ_RAWSTARUS_H;
-	RwReg IRQ_STATUS_L;
-	RwReg IRQ_STATUS_H;
-	RwReg IRQ_MASKSTATUS_L;
-	RwReg IRQ_MASKSTATUS_H;
-	RwReg IRQ_FINALSTATUS_L;
-	RwReg IRQ_FINALSTATUS_H;
-	RwReg IRQ_VECTOR;
+    RwReg IRQ_EN_L;
+    RwReg IRQ_EN_H;
+    RwReg IRQ_MASK_L;
+    RwReg IRQ_MASK_H;
+    RwReg IRQ_FORCE_L;
+    RwReg IRQ_FORCE_H;
+    RwReg IRQ_RAWSTARUS_L;
+    RwReg IRQ_RAWSTARUS_H;
+    RwReg IRQ_STATUS_L;
+    RwReg IRQ_STATUS_H;
+    RwReg IRQ_MASKSTATUS_L;
+    RwReg IRQ_MASKSTATUS_H;
+    RwReg IRQ_FINALSTATUS_L;
+    RwReg IRQ_FINALSTATUS_H;
+    RwReg IRQ_VECTOR;
 }fh_intc;
 
 
diff --git a/bsp/fh8620/libraries/inc/fh_mmc.h b/bsp/fh8620/libraries/inc/fh_mmc.h
index 4aaf416ce6..d999ecf7dd 100644
--- a/bsp/fh8620/libraries/inc/fh_mmc.h
+++ b/bsp/fh8620/libraries/inc/fh_mmc.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/fh8620/libraries/inc/fh_pwm.h b/bsp/fh8620/libraries/inc/fh_pwm.h
index 011da43905..6281a5f128 100644
--- a/bsp/fh8620/libraries/inc/fh_pwm.h
+++ b/bsp/fh8620/libraries/inc/fh_pwm.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/fh8620/libraries/inc/fh_sdio.h b/bsp/fh8620/libraries/inc/fh_sdio.h
index b268dbd322..f4791605e1 100644
--- a/bsp/fh8620/libraries/inc/fh_sdio.h
+++ b/bsp/fh8620/libraries/inc/fh_sdio.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -32,53 +32,53 @@
 //#define __ASIC_BRANCH__
 
 enum {
-	CTRL        = 0x0, 	/** Control */
-	PWREN    = 0x4, 	/** Power-enable */
-	CLKDIV   = 0x8, 	/** Clock divider */
-	CLKSRC   = 0xC, 	/** Clock source */
-	CLKENA   = 0x10,    /** Clock enable */
-	TMOUT    = 0x14,    /** Timeout */
-	CTYPE    = 0x18,    /** Card type */
-	BLKSIZ   = 0x1C,    /** Block Size */
-	BYTCNT   = 0x20,    /** Byte count */
-	INTMSK   = 0x24,    /** Interrupt Mask */
-	CMDARG   = 0x28,    /** Command Argument */
-	CMD      = 0x2C,    /** Command */
-	RESP0    = 0x30,    /** Response 0 */
-	RESP1    = 0x34,    /** Response 1 */
-	RESP2    = 0x38,    /** Response 2 */
-	RESP3    = 0x3C,    /** Response 3 */
-	MINTSTS  = 0x40,    /** Masked interrupt status */
-	RINTSTS  = 0x44,    /** Raw interrupt status */
-	STATUS   = 0x48,    /** Status */
-	FIFOTH   = 0x4C,    /** FIFO threshold */
-	CDETECT  = 0x50,    /** Card detect */
-	WRTPRT   = 0x54,    /** Write protect */
-	GPIO     = 0x58,    /** General Purpose IO */
-	TCBCNT   = 0x5C,    /** Transferred CIU byte count */
-	TBBCNT   = 0x60,    /** Transferred host/DMA to/from byte count */
-	DEBNCE   = 0x64,    /** Card detect debounce */
-	USRID    = 0x68,    /** User ID */
-	VERID    = 0x6C,    /** Version ID */
-	HCON     = 0x70,    /** Hardware Configuration */
-	UHSREG   = 0x74,    /** Reserved */
- 	BMOD	 = 0x80,    /** Bus mode Register */
-	PLDMND	 = 0x84,    /** Poll Demand */
-	DBADDR	 = 0x88,    /** Descriptor Base Address */
-	IDSTS	 = 0x8C,    /** Internal DMAC Status */
-	IDINTEN  = 0x90,    /** Internal DMAC Interrupt Enable */
-	DSCADDR  = 0x94,    /** Current Host Descriptor Address */
-	BUFADDR	 = 0x98,    /** Current Host Buffer Address */
-	FIFODAT  = 0x200,   /** FIFO data read write */
+    CTRL        = 0x0,  /** Control */
+    PWREN    = 0x4,     /** Power-enable */
+    CLKDIV   = 0x8,     /** Clock divider */
+    CLKSRC   = 0xC,     /** Clock source */
+    CLKENA   = 0x10,    /** Clock enable */
+    TMOUT    = 0x14,    /** Timeout */
+    CTYPE    = 0x18,    /** Card type */
+    BLKSIZ   = 0x1C,    /** Block Size */
+    BYTCNT   = 0x20,    /** Byte count */
+    INTMSK   = 0x24,    /** Interrupt Mask */
+    CMDARG   = 0x28,    /** Command Argument */
+    CMD      = 0x2C,    /** Command */
+    RESP0    = 0x30,    /** Response 0 */
+    RESP1    = 0x34,    /** Response 1 */
+    RESP2    = 0x38,    /** Response 2 */
+    RESP3    = 0x3C,    /** Response 3 */
+    MINTSTS  = 0x40,    /** Masked interrupt status */
+    RINTSTS  = 0x44,    /** Raw interrupt status */
+    STATUS   = 0x48,    /** Status */
+    FIFOTH   = 0x4C,    /** FIFO threshold */
+    CDETECT  = 0x50,    /** Card detect */
+    WRTPRT   = 0x54,    /** Write protect */
+    GPIO     = 0x58,    /** General Purpose IO */
+    TCBCNT   = 0x5C,    /** Transferred CIU byte count */
+    TBBCNT   = 0x60,    /** Transferred host/DMA to/from byte count */
+    DEBNCE   = 0x64,    /** Card detect debounce */
+    USRID    = 0x68,    /** User ID */
+    VERID    = 0x6C,    /** Version ID */
+    HCON     = 0x70,    /** Hardware Configuration */
+    UHSREG   = 0x74,    /** Reserved */
+    BMOD     = 0x80,    /** Bus mode Register */
+    PLDMND   = 0x84,    /** Poll Demand */
+    DBADDR   = 0x88,    /** Descriptor Base Address */
+    IDSTS    = 0x8C,    /** Internal DMAC Status */
+    IDINTEN  = 0x90,    /** Internal DMAC Interrupt Enable */
+    DSCADDR  = 0x94,    /** Current Host Descriptor Address */
+    BUFADDR  = 0x98,    /** Current Host Buffer Address */
+    FIFODAT  = 0x200,   /** FIFO data read write */
 };
 
 /* Control register definitions */
-#define CTRL_RESET	          0x00000001
+#define CTRL_RESET            0x00000001
 #define FIFO_RESET              0x00000002
-#define DMA_RESET	          0x00000004
-#define INT_ENABLE	          0x00000010
-#define READ_WAIT	          0x00000040
-#define CTRL_USE_IDMAC	   0x02000000
+#define DMA_RESET             0x00000004
+#define INT_ENABLE            0x00000010
+#define READ_WAIT             0x00000040
+#define CTRL_USE_IDMAC     0x02000000
 
 /* Interrupt mask defines */
 #define INTMSK_CDETECT        0x00000001
@@ -102,11 +102,11 @@ enum {
 #define INTMASK_ERROR        (INTMSK_RESP_ERR|INTMSK_RCRC|INTMSK_DCRC|INTMSK_RTO|INTMSK_DTO|INTMSK_HTO|INTMSK_FRUN|INTMSK_HLE|INTMSK_SBE|INTMSK_EBE)
 
 /*BMOD register define */
-#define  BMOD_SWR 	  	   0x00000001
-#define  BMOD_DE 		   0x00000080
+#define  BMOD_SWR          0x00000001
+#define  BMOD_DE           0x00000080
 
 /* for STATUS register */
-#define GET_FIFO_COUNT(x)           	(((x)&0x3ffe0000)>>17)
+#define GET_FIFO_COUNT(x)               (((x)&0x3ffe0000)>>17)
 #define GET_FIFO_DEPTH(x)       ((((x)&0x0FFF0000)>>16)+1)
 
 /* for IDMA intr register */
@@ -122,62 +122,62 @@ enum {
 
 /* Define Card status bits (R1 response) */
 #define R1CS_ADDRESS_OUT_OF_RANGE       0x80000000
-#define R1CS_ADDRESS_MISALIGN		    0x40000000
-#define R1CS_BLOCK_LEN_ERR       		0x20000000
-#define R1CS_ERASE_SEQ_ERR	           	0x10000000
-#define R1CS_ERASE_PARAM	            0x08000000
-#define R1CS_WP_VIOLATION		        0x04000000
-#define R1CS_CARD_IS_LOCKED	            0x02000000
-#define R1CS_LCK_UNLCK_FAILED		    0x01000000
-#define R1CS_COM_CRC_ERROR		        0x00800000
-#define R1CS_ILLEGAL_COMMAND		    0x00400000
-#define R1CS_CARD_ECC_FAILED		    0x00200000
-#define R1CS_CC_ERROR		        	0x00100000
-#define R1CS_ERROR		            	0x00080000
-#define R1CS_UNDERRUN		        	0x00040000
-#define R1CS_OVERRUN		        	0x00020000
-#define R1CS_CSD_OVERWRITE	        	0x00010000
-#define R1CS_WP_ERASE_SKIP	        	0x00008000
-#define R1CS_RESERVED_0	        		0x00004000
-#define R1CS_ERASE_RESET        		0x00002000
-#define R1CS_CURRENT_STATE_MASK    		0x00001e00
-#define R1CS_READY_FOR_DATA	        	0x00000100
-#define R1CS_SWITCH_ERROR        		0x00000080
-#define R1CS_RESERVED_1		        	0x00000040
-#define R1CS_APP_CMD		        	0x00000020
-#define R1CS_RESERVED_2		        	0x00000010
-#define R1CS_APP_SPECIFIC_MASK	    	0x0000000c
-#define R1CS_MANUFAC_TEST_MASK    		0x00000003
-#define R1CS_ERROR_OCCURED_MAP	    	0xfdffa080
-#define R1CS_CURRENT_STATE(x)	    	(((x)&R1CS_CURRENT_STATE_MASK)>>9)
+#define R1CS_ADDRESS_MISALIGN           0x40000000
+#define R1CS_BLOCK_LEN_ERR              0x20000000
+#define R1CS_ERASE_SEQ_ERR              0x10000000
+#define R1CS_ERASE_PARAM                0x08000000
+#define R1CS_WP_VIOLATION               0x04000000
+#define R1CS_CARD_IS_LOCKED             0x02000000
+#define R1CS_LCK_UNLCK_FAILED           0x01000000
+#define R1CS_COM_CRC_ERROR              0x00800000
+#define R1CS_ILLEGAL_COMMAND            0x00400000
+#define R1CS_CARD_ECC_FAILED            0x00200000
+#define R1CS_CC_ERROR                   0x00100000
+#define R1CS_ERROR                      0x00080000
+#define R1CS_UNDERRUN                   0x00040000
+#define R1CS_OVERRUN                    0x00020000
+#define R1CS_CSD_OVERWRITE              0x00010000
+#define R1CS_WP_ERASE_SKIP              0x00008000
+#define R1CS_RESERVED_0                 0x00004000
+#define R1CS_ERASE_RESET                0x00002000
+#define R1CS_CURRENT_STATE_MASK         0x00001e00
+#define R1CS_READY_FOR_DATA             0x00000100
+#define R1CS_SWITCH_ERROR               0x00000080
+#define R1CS_RESERVED_1                 0x00000040
+#define R1CS_APP_CMD                    0x00000020
+#define R1CS_RESERVED_2                 0x00000010
+#define R1CS_APP_SPECIFIC_MASK          0x0000000c
+#define R1CS_MANUFAC_TEST_MASK          0x00000003
+#define R1CS_ERROR_OCCURED_MAP          0xfdffa080
+#define R1CS_CURRENT_STATE(x)           (((x)&R1CS_CURRENT_STATE_MASK)>>9)
 
 /* R5 response */
-#define R5_IO_CRC_ERR	  0x00008000
-#define R5_IO_BAD_CMD	  0x00004000
-#define R5_IO_GEN_ERR	  0x00000800
-#define R5_IO_FUNC_ERR	  0x00000200
+#define R5_IO_CRC_ERR     0x00008000
+#define R5_IO_BAD_CMD     0x00004000
+#define R5_IO_GEN_ERR     0x00000800
+#define R5_IO_FUNC_ERR    0x00000200
 #define R5_IO_OUT_RANGE 0x00000100
-#define R5_IO_ERR_BITS	  0x0000cb00
+#define R5_IO_ERR_BITS    0x0000cb00
 
 enum {
-	NONE_TYPE = 0,
-	SD_TYPE,
-	SD_2_0_TYPE,
-	SDIO_TYPE,
+    NONE_TYPE = 0,
+    SD_TYPE,
+    SD_2_0_TYPE,
+    SDIO_TYPE,
 };
 
 enum {
-	CARD_STATE_EMPTY = -1,
-	CARD_STATE_IDLE = 0,
-	CARD_STATE_READY = 1,
-	CARD_STATE_IDENT = 2,
-	CARD_STATE_STBY = 3,
-	CARD_STATE_TRAN = 4,
-	CARD_STATE_DATA = 5,
-	CARD_STATE_RCV = 6,
-	CARD_STATE_PRG = 7,
-	CARD_STATE_DIS = 8,
-	CARD_STATE_INA = 9
+    CARD_STATE_EMPTY = -1,
+    CARD_STATE_IDLE = 0,
+    CARD_STATE_READY = 1,
+    CARD_STATE_IDENT = 2,
+    CARD_STATE_STBY = 3,
+    CARD_STATE_TRAN = 4,
+    CARD_STATE_DATA = 5,
+    CARD_STATE_RCV = 6,
+    CARD_STATE_PRG = 7,
+    CARD_STATE_DIS = 8,
+    CARD_STATE_INA = 9
 };
 
 enum DmaDescriptorDES1    // Buffer's size field of Descriptor
@@ -204,28 +204,28 @@ enum DmaDescriptorDES0    // Control and status word of DMA descriptor DES0
 };
 
 typedef struct DmaDescStruct {
-		unsigned int desc0;   	 /* control and status information of descriptor */
-		unsigned int desc1;   	 /* buffer sizes                                 */
-		unsigned int desc2;   	 /* physical address of the buffer 1             */
-		unsigned int desc3;    	 /* physical address of the buffer 2             */
+        unsigned int desc0;      /* control and status information of descriptor */
+        unsigned int desc1;      /* buffer sizes                                 */
+        unsigned int desc2;      /* physical address of the buffer 1             */
+        unsigned int desc3;      /* physical address of the buffer 2             */
 }DmaDesc;
 
 typedef struct {
-	unsigned int wkmod;
-	volatile DmaDesc *pDmaDesc;
-	unsigned int idma_support;
-	unsigned int rca;
-	unsigned int ip_base;
-	unsigned int card_type;
-	unsigned int fifo_depth;
-	unsigned int fifo_threth;
-	unsigned int sectors;
-	unsigned int scr[2];
-	unsigned int csd[4];
-	unsigned int idsts;
-	rt_sem_t sem;
-	rt_sem_t mutex;
-	void (*cb)(void);
+    unsigned int wkmod;
+    volatile DmaDesc *pDmaDesc;
+    unsigned int idma_support;
+    unsigned int rca;
+    unsigned int ip_base;
+    unsigned int card_type;
+    unsigned int fifo_depth;
+    unsigned int fifo_threth;
+    unsigned int sectors;
+    unsigned int scr[2];
+    unsigned int csd[4];
+    unsigned int idsts;
+    rt_sem_t sem;
+    rt_sem_t mutex;
+    void (*cb)(void);
 } sdc_t;
 
 #define ONE_BIT_MODE     (0)
@@ -244,55 +244,55 @@ typedef struct {
 
 
 enum {
-	ERRNOERROR = 0,
-		
-	// for raw interrupt status error
-	ERRRESPRECEP,    // 1
-	ERRRESPCRC,
-	ERRDCRC,
-	ERRRESPTIMEOUT,
-	ERRDRTIMEOUT,
-	ERRUNDERWRITE,
-	ERROVERREAD,
-	ERRHLE,
-	ERRSTARTBIT,
-	ERRENDBITERR,  // 10
+    ERRNOERROR = 0,
 
-	// for R1 response
-	ERRADDRESSRANGE,  // 11
-	ERRADDRESSMISALIGN,
-	ERRBLOCKLEN,
-	ERRERASESEQERR,
-	ERRERASEPARAM,
-	ERRPROT,
-	ERRCARDLOCKED,
-	ERRCRC,
-	ERRILLEGALCOMMAND,
-	ERRECCFAILED,
-	ERRCCERR,
-	ERRUNKNOWN,
-	ERRUNDERRUN,
-	ERROVERRUN,
-	ERRCSDOVERWRITE,
-	ERRERASERESET,
-	ERRFSMSTATE,  // 27
+    // for raw interrupt status error
+    ERRRESPRECEP,    // 1
+    ERRRESPCRC,
+    ERRDCRC,
+    ERRRESPTIMEOUT,
+    ERRDRTIMEOUT,
+    ERRUNDERWRITE,
+    ERROVERREAD,
+    ERRHLE,
+    ERRSTARTBIT,
+    ERRENDBITERR,  // 10
 
-	// for R5 response
-	ERRBADFUNC,   // 28
+    // for R1 response
+    ERRADDRESSRANGE,  // 11
+    ERRADDRESSMISALIGN,
+    ERRBLOCKLEN,
+    ERRERASESEQERR,
+    ERRERASEPARAM,
+    ERRPROT,
+    ERRCARDLOCKED,
+    ERRCRC,
+    ERRILLEGALCOMMAND,
+    ERRECCFAILED,
+    ERRCCERR,
+    ERRUNKNOWN,
+    ERRUNDERRUN,
+    ERROVERRUN,
+    ERRCSDOVERWRITE,
+    ERRERASERESET,
+    ERRFSMSTATE,  // 27
 
-	// others
-	ERRCARDNOTCONN,  // 29
-	ERRCARDWPROTECT,
-	ERRCMDRETRIESOVER,
-	ERRNOTSUPPORTED,
-	ERRHARDWARE,
-	ERRDATANOTREADY,
-	ERRCARDINTERNAL,
-	ERRACMD41TIMEOUT,
-	ERRIDMA,
-	ERRNORES,
+    // for R5 response
+    ERRBADFUNC,   // 28
 
-	ERRNOTEQUAL,
+    // others
+    ERRCARDNOTCONN,  // 29
+    ERRCARDWPROTECT,
+    ERRCMDRETRIESOVER,
+    ERRNOTSUPPORTED,
+    ERRHARDWARE,
+    ERRDATANOTREADY,
+    ERRCARDINTERNAL,
+    ERRACMD41TIMEOUT,
+    ERRIDMA,
+    ERRNORES,
+
+    ERRNOTEQUAL,
 };
 
 #ifdef __ASIC_BRANCH__
@@ -352,5 +352,5 @@ extern int sdio_drv_creg_write(HSDC handle, int addr, int fn, unsigned char data
 
 extern void inv_dcache_range(unsigned long start, unsigned long len);
 extern void flush_dcache_range(unsigned long start, unsigned long len);
- 
+
 #endif //__sdcard_h__
diff --git a/bsp/fh8620/libraries/inc/fh_spi.h b/bsp/fh8620/libraries/inc/fh_spi.h
index d81c2428bc..689a85b3f4 100644
--- a/bsp/fh8620/libraries/inc/fh_spi.h
+++ b/bsp/fh8620/libraries/inc/fh_spi.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef FH_SPI_H_
 #define FH_SPI_H_
 
@@ -97,8 +97,8 @@
 #define SPI_STATUS_BUSY             (1)
 
 
-#define SPI_TX_DMA			(1<<1)
-#define SPI_RX_DMA			(1<<0)
+#define SPI_TX_DMA          (1<<1)
+#define SPI_RX_DMA          (1<<0)
 
 
 struct spi_config
diff --git a/bsp/fh8620/libraries/inc/fh_timer.h b/bsp/fh8620/libraries/inc/fh_timer.h
index 715a73b252..9f88bff22e 100644
--- a/bsp/fh8620/libraries/inc/fh_timer.h
+++ b/bsp/fh8620/libraries/inc/fh_timer.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -29,7 +29,7 @@
 
  /****************************************************************************
  * #include section
- *	add #include here if any
+ *  add #include here if any
  ***************************************************************************/
 #include "fh_def.h"
 
@@ -38,7 +38,7 @@
 
  /****************************************************************************
  * #define section
- *	add constant #define here if any
+ *  add constant #define here if any
  ***************************************************************************/
 #define TIMER_CTRL_ENABLE   (1u << 0)
 #define TIMER_CTRL_MODE     (1u << 1)
@@ -49,19 +49,19 @@
 
  /****************************************************************************
  * ADT section
- *	add Abstract Data Type definition here
+ *  add Abstract Data Type definition here
  ***************************************************************************/
 typedef struct {
-	RwReg TIMER_LOAD_COUNT;
-	RwReg TIMER_CURRENT_VALUE;
-	RwReg TIMER_CTRL_REG;
-	RwReg TIMER_EOI;
-	RwReg TIMER_INT_STATUS;
+    RwReg TIMER_LOAD_COUNT;
+    RwReg TIMER_CURRENT_VALUE;
+    RwReg TIMER_CTRL_REG;
+    RwReg TIMER_EOI;
+    RwReg TIMER_INT_STATUS;
 }timer;
 
  enum timer_mode {
- 	TIMER_MODE_PERIODIC = 0,
- 	TIMER_MODE_ONESHOT = 1,
+    TIMER_MODE_PERIODIC = 0,
+    TIMER_MODE_ONESHOT = 1,
  };
 
 
@@ -73,7 +73,7 @@ typedef struct {
 
 /****************************************************************************
 *  section
-*	add function prototype here if any
+*   add function prototype here if any
 ***************************************************************************/
 
 
diff --git a/bsp/fh8620/libraries/inc/fh_uart.h b/bsp/fh8620/libraries/inc/fh_uart.h
index 87da9ee2f7..34d2a9bb9a 100644
--- a/bsp/fh8620/libraries/inc/fh_uart.h
+++ b/bsp/fh8620/libraries/inc/fh_uart.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -29,13 +29,13 @@
 
  /****************************************************************************
  * #include section
- *	add #include here if any
+ *  add #include here if any
  ***************************************************************************/
 #include "fh_def.h"
 
  /****************************************************************************
  * #define section
- *	add constant #define here if any
+ *  add constant #define here if any
  ***************************************************************************/
 
 #define UART_RBR RBRTHRDLL
@@ -120,53 +120,53 @@
 #define UART_IIR_FIFOSE  (0x03 << 6)
 
 //uart baudrate cofig
-//#define 	UART_CLOCK_FREQ   	(27000000)   //27MHZ
+//#define   UART_CLOCK_FREQ     (27000000)   //27MHZ
 //
-//#define DIV(n)	(((UART_CLOCK_FREQ/(n))+8)/16)
+//#define DIV(n)    (((UART_CLOCK_FREQ/(n))+8)/16)
 
 
  /****************************************************************************
  * ADT section
- *	add Abstract Data Type definition here
+ *  add Abstract Data Type definition here
  ***************************************************************************/
 
 
 
 
 typedef struct {
-	RwReg RBRTHRDLL; /* UART_RBR, UART_THR, UART_DLL */
-	RwReg DLHIER;    /* UART_DLH, UART_IER */
-	RwReg IIRFCR;    /* UART_IIR, UART_FCR */
-	RwReg UART_LCR; /*(0x000c) */
-	RwReg UART_MCR; /*(0x0010) */
-	RwReg UART_LSR; /*(0x0014) */
-	RwReg UART_MSR; /*(0x0018) */
-	RwReg UART_SCR; /*(0x001c) */
-	RwReg reserved[20];
-	RwReg UART_FAR; /* (0x0070) */
-	RwReg UART_TFR; /* (0x0074) */
-	RwReg UART_RFW; /* (0x0078) */
-	RwReg UART_USR; /* (0x007c) */
-	RwReg UART_TFL; /* (0x0080) */
-	RwReg UART_RFL; /* (0x0084) */
-	RwReg UART_SRR; /* (0x0088) */
-	RwReg reserved1[3];
-	RwReg UART_SFE;  /* (0x0098) */
-	RwReg UART_SRT;  /* (0x009c) */
-	RwReg UART_STET; /* (0x00a0) */
-	RwReg UART_HTX;  /* (0x00a4) */
-	RwReg UART_DMASA; /* (0x00a8) */
-	RwReg reserved2[18];
-	RwReg UART_CPR;  /* (0x00f4) */
-	RwReg UART_UCV;  /* (0x00f8) */
-	RwReg UART_CTR;  /* (0x00fc) */
+    RwReg RBRTHRDLL; /* UART_RBR, UART_THR, UART_DLL */
+    RwReg DLHIER;    /* UART_DLH, UART_IER */
+    RwReg IIRFCR;    /* UART_IIR, UART_FCR */
+    RwReg UART_LCR; /*(0x000c) */
+    RwReg UART_MCR; /*(0x0010) */
+    RwReg UART_LSR; /*(0x0014) */
+    RwReg UART_MSR; /*(0x0018) */
+    RwReg UART_SCR; /*(0x001c) */
+    RwReg reserved[20];
+    RwReg UART_FAR; /* (0x0070) */
+    RwReg UART_TFR; /* (0x0074) */
+    RwReg UART_RFW; /* (0x0078) */
+    RwReg UART_USR; /* (0x007c) */
+    RwReg UART_TFL; /* (0x0080) */
+    RwReg UART_RFL; /* (0x0084) */
+    RwReg UART_SRR; /* (0x0088) */
+    RwReg reserved1[3];
+    RwReg UART_SFE;  /* (0x0098) */
+    RwReg UART_SRT;  /* (0x009c) */
+    RwReg UART_STET; /* (0x00a0) */
+    RwReg UART_HTX;  /* (0x00a4) */
+    RwReg UART_DMASA; /* (0x00a8) */
+    RwReg reserved2[18];
+    RwReg UART_CPR;  /* (0x00f4) */
+    RwReg UART_UCV;  /* (0x00f8) */
+    RwReg UART_CTR;  /* (0x00fc) */
 }uart;
 
 
 
 struct fh_uart {
-	uart *uart_port;
-	int irq;
+    uart *uart_port;
+    int irq;
 };
 
 
@@ -174,34 +174,34 @@ struct fh_uart {
 
 
 enum data_bits {
-	UART_DATA_BIT5 = 0,
-	UART_DATA_BIT6 = 1,
-	UART_DATA_BIT7 = 2,
-	UART_DATA_BIT8 = 3
+    UART_DATA_BIT5 = 0,
+    UART_DATA_BIT6 = 1,
+    UART_DATA_BIT7 = 2,
+    UART_DATA_BIT8 = 3
 };
 
 enum stop_bits {
-	UART_STOP_BIT1   = 0,
-	UART_STOP_BIT1_5 = 1,
-	UART_STOP_BIT2   = 2
+    UART_STOP_BIT1   = 0,
+    UART_STOP_BIT1_5 = 1,
+    UART_STOP_BIT2   = 2
 };
 
 enum parity {
-	UART_PARITY_NONE = 0,
-	UART_PARITY_EVEN = 1,
-	UART_PARITY_ODD  = 2,
-	UART_PARITY_ST   = 3 /* Stick Parity */
+    UART_PARITY_NONE = 0,
+    UART_PARITY_EVEN = 1,
+    UART_PARITY_ODD  = 2,
+    UART_PARITY_ST   = 3 /* Stick Parity */
 };
 
 
-#define 	UART_CLOCK_FREQ   	(30000000)   //30MHZ
+#define     UART_CLOCK_FREQ     (30000000)   //30MHZ
 typedef enum enum_uart_baudrate{
-	BAUDRATE_9600 	= (((UART_CLOCK_FREQ/9600)+8)/16),
-	BAUDRATE_19200 	= (((UART_CLOCK_FREQ/19200)+8)/16),
-	BAUDRATE_38400  = (((UART_CLOCK_FREQ/38400)+8)/16),
-	BAUDRATE_57600  = (((UART_CLOCK_FREQ/57600)+8)/16),
-	BAUDRATE_115200 = (((UART_CLOCK_FREQ/115200)+8)/16),
-	BAUDRATE_194000 = (((UART_CLOCK_FREQ/194000)+8)/16),
+    BAUDRATE_9600   = (((UART_CLOCK_FREQ/9600)+8)/16),
+    BAUDRATE_19200  = (((UART_CLOCK_FREQ/19200)+8)/16),
+    BAUDRATE_38400  = (((UART_CLOCK_FREQ/38400)+8)/16),
+    BAUDRATE_57600  = (((UART_CLOCK_FREQ/57600)+8)/16),
+    BAUDRATE_115200 = (((UART_CLOCK_FREQ/115200)+8)/16),
+    BAUDRATE_194000 = (((UART_CLOCK_FREQ/194000)+8)/16),
 }uart_baudrate_e;
 
 /****************************************************************************
@@ -213,8 +213,8 @@ extern int uart_init(uart *port);
 extern UINT32 uart_get_status(uart *port);
 
 extern void uart_configure(uart *port, enum data_bits data_bit,
-					enum stop_bits stop_bit, enum parity parity,
-					UINT32 buard_rate, UINT32 uart_clk);
+                    enum stop_bits stop_bit, enum parity parity,
+                    UINT32 buard_rate, UINT32 uart_clk);
 
 
 extern int uart_enable_irq(uart *port, UINT32 mode);
@@ -235,7 +235,7 @@ extern void uart_set_fifo_mode(uart *port, UINT32 fifo_mode);
 
 /****************************************************************************
 *  section
-*	add function prototype here if any
+*   add function prototype here if any
 ***************************************************************************/
 
 
diff --git a/bsp/fh8620/libraries/inc/fh_wdt.h b/bsp/fh8620/libraries/inc/fh_wdt.h
index a90331dbd5..7804a3a536 100644
--- a/bsp/fh8620/libraries/inc/fh_wdt.h
+++ b/bsp/fh8620/libraries/inc/fh_wdt.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef FH_WDT_H_
 #define FH_WDT_H_
 
diff --git a/bsp/fh8620/platform/board.h b/bsp/fh8620/platform/board.h
index 46b276b052..ac8708ec9e 100644
--- a/bsp/fh8620/platform/board.h
+++ b/bsp/fh8620/platform/board.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef __BOARD_H__
 #define __BOARD_H__
 #include "platform_def.h"
diff --git a/bsp/fh8620/platform/board_info.h b/bsp/fh8620/platform/board_info.h
index 71f8d3c19e..d86907621f 100644
--- a/bsp/fh8620/platform/board_info.h
+++ b/bsp/fh8620/platform/board_info.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef __BOARD_INFO_H__
 #define __BOARD_INFO_H__
 
@@ -33,32 +33,32 @@ extern "C" {
 
 /****************************************************************************
  * #include section
- *	add #include here if any
+ *  add #include here if any
  ***************************************************************************/
 
 /****************************************************************************
  * #define section
- *	add constant #define here if any
+ *  add constant #define here if any
  ***************************************************************************/
 
 /****************************************************************************
  * ADT section
- *	add Abstract Data Type definition here
+ *  add Abstract Data Type definition here
  ***************************************************************************/
 
 typedef int (*probe_p)(void *);
 typedef int (*exit_p)(void *);
 
 struct fh_board_ops {
-	//void *ops_data;
-	probe_p probe;
-	probe_p exit;
+    //void *ops_data;
+    probe_p probe;
+    probe_p exit;
 };
 
 struct fh_board_info {
-	char *name;
-	void *data;
-	struct fh_board_ops *ops;
+    char *name;
+    void *data;
+    struct fh_board_ops *ops;
 
 };
 
@@ -73,7 +73,7 @@ void fh_print_all_board_info(void);
 void fh_free_all_info(void);
 /****************************************************************************
  *  section
- *	add function prototype here if any
+ *  add function prototype here if any
  ***************************************************************************/
 
 #ifdef __cplusplus
diff --git a/bsp/fh8620/platform/common/board_info.c b/bsp/fh8620/platform/common/board_info.c
index aa56cbac62..6bb95bfaa9 100644
--- a/bsp/fh8620/platform/common/board_info.c
+++ b/bsp/fh8620/platform/common/board_info.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 /*****************************************************************************
  *  Include Section
  *  add all #include here
@@ -36,27 +36,27 @@
  * add all #define here
  *****************************************************************************/
 struct fh_board_info_list_node {
-	struct fh_board_info obj;
-	rt_list_t list;
+    struct fh_board_info obj;
+    rt_list_t list;
 };
 
-#define CHECK_TEST_LIST_EMPTY		\
-		if(rt_list_isempty(&board_info_head.list)) \
-		rt_kprintf("board info is null...please register first..\n")
+#define CHECK_TEST_LIST_EMPTY       \
+        if(rt_list_isempty(&board_info_head.list)) \
+        rt_kprintf("board info is null...please register first..\n")
 
 /****************************************************************************
  * ADT section
  *  add definition of user defined Data Type that only be used in this file  here
  ***************************************************************************/
 
-#define list_for_each_entry_safe(pos, n, head, member)			\
-	for (pos = rt_list_entry((head)->next, typeof(*pos), member),	\
-		n = rt_list_entry(pos->member.next, typeof(*pos), member);	\
-	     &pos->member != (head); 					\
-	     pos = n, n = rt_list_entry(n->member.next, typeof(*n), member))
+#define list_for_each_entry_safe(pos, n, head, member)          \
+    for (pos = rt_list_entry((head)->next, typeof(*pos), member),   \
+        n = rt_list_entry(pos->member.next, typeof(*pos), member);  \
+         &pos->member != (head);                    \
+         pos = n, n = rt_list_entry(n->member.next, typeof(*n), member))
 
-#define PARA_ERROR			(-1)
-#define PROBE_FUNC_MISS		(-2)
+#define PARA_ERROR          (-1)
+#define PROBE_FUNC_MISS     (-2)
 
 /******************************************************************************
  * Function prototype section
@@ -104,45 +104,45 @@ static struct fh_board_info_list_node board_info_head;
 
 int fh_board_info_init(void) {
 
-	memset(&board_info_head, 0x0, sizeof(struct fh_board_info_list_node));
-	rt_list_init(&board_info_head.list);
-	board_info_head.obj.name = "NO INFO";
-	return 0;
+    memset(&board_info_head, 0x0, sizeof(struct fh_board_info_list_node));
+    rt_list_init(&board_info_head.list);
+    board_info_head.obj.name = "NO INFO";
+    return 0;
 }
 
 void fh_free_all_info(void) {
-	rt_list_t *p_list;
-	struct fh_board_info_list_node *info_node;
-	struct fh_board_info_list_node *_info_node;
-	p_list = &board_info_head.list;
+    rt_list_t *p_list;
+    struct fh_board_info_list_node *info_node;
+    struct fh_board_info_list_node *_info_node;
+    p_list = &board_info_head.list;
 
-	CHECK_TEST_LIST_EMPTY;
+    CHECK_TEST_LIST_EMPTY;
 
-	list_for_each_entry_safe(info_node, _info_node, p_list, list)
-	{
+    list_for_each_entry_safe(info_node, _info_node, p_list, list)
+    {
 
-		if (info_node->obj.ops->exit) {
-			info_node->obj.ops->exit(info_node->obj.data);
-		}
-		rt_kprintf("soc free list name:(%s)\n", info_node->obj.name);
-		rt_free(info_node);
-	}
-	fh_board_info_init();
+        if (info_node->obj.ops->exit) {
+            info_node->obj.ops->exit(info_node->obj.data);
+        }
+        rt_kprintf("soc free list name:(%s)\n", info_node->obj.name);
+        rt_free(info_node);
+    }
+    fh_board_info_init();
 }
 
 void fh_print_all_board_info(void) {
-	rt_list_t *p_list;
+    rt_list_t *p_list;
 
-	struct fh_board_info_list_node *info_node;
-	struct fh_board_info_list_node *_info_node;
-	p_list = &board_info_head.list;
+    struct fh_board_info_list_node *info_node;
+    struct fh_board_info_list_node *_info_node;
+    p_list = &board_info_head.list;
 
-	CHECK_TEST_LIST_EMPTY;
+    CHECK_TEST_LIST_EMPTY;
 
-	list_for_each_entry_safe(info_node, _info_node, p_list, list)
-	{
-		rt_kprintf("%s\n", info_node->obj.name);
-	}
+    list_for_each_entry_safe(info_node, _info_node, p_list, list)
+    {
+        rt_kprintf("%s\n", info_node->obj.name);
+    }
 }
 
 /*****************************************************************************
@@ -157,94 +157,94 @@ void fh_print_all_board_info(void) {
 //register the platform info such as base add,isr no..
 //caution:do not free the name and data because of here not copy
 struct fh_board_info *fh_board_info_register(char *info_name, void *data) {
-	rt_list_t *p_list;
-	struct fh_board_info_list_node *new_node;
-	struct fh_board_info_list_node *info_node;
-	struct fh_board_info_list_node *_info_node;
-	p_list = &board_info_head.list;
+    rt_list_t *p_list;
+    struct fh_board_info_list_node *new_node;
+    struct fh_board_info_list_node *info_node;
+    struct fh_board_info_list_node *_info_node;
+    p_list = &board_info_head.list;
 
-	if (RT_NULL == info_name || RT_NULL == data) {
-		rt_kprintf("info name or info data is NULL!\n");
-		return RT_NULL;
-	}
+    if (RT_NULL == info_name || RT_NULL == data) {
+        rt_kprintf("info name or info data is NULL!\n");
+        return RT_NULL;
+    }
 
-	//check if the func is already in the test list....
+    //check if the func is already in the test list....
 #if(0)
-	list_for_each_entry_safe(info_node, _info_node, p_list, list) {
-		if (!memcmp(info_node->obj.name, info_name, strlen(info_name))) {
-			rt_kprintf("info_name(%s) is already registered\n", info_name);
-			return RT_NULL;
-		}
-	}
+    list_for_each_entry_safe(info_node, _info_node, p_list, list) {
+        if (!memcmp(info_node->obj.name, info_name, strlen(info_name))) {
+            rt_kprintf("info_name(%s) is already registered\n", info_name);
+            return RT_NULL;
+        }
+    }
 #endif
 
-	new_node = (struct fh_board_info_list_node *) rt_malloc(
-			sizeof(struct fh_board_info_list_node));
-	if (!new_node) {
-		rt_kprintf("malloc new_list_node failed~\n");
-		return RT_NULL;
-	}
+    new_node = (struct fh_board_info_list_node *) rt_malloc(
+            sizeof(struct fh_board_info_list_node));
+    if (!new_node) {
+        rt_kprintf("malloc new_list_node failed~\n");
+        return RT_NULL;
+    }
 
-	new_node->obj.name = info_name;
-	new_node->obj.data = data;
-	//here insert "before" and test is "after" will make the list like a fifo...
-	rt_list_insert_before(&board_info_head.list, &new_node->list);
-	return &new_node->obj;
+    new_node->obj.name = info_name;
+    new_node->obj.data = data;
+    //here insert "before" and test is "after" will make the list like a fifo...
+    rt_list_insert_before(&board_info_head.list, &new_node->list);
+    return &new_node->obj;
 }
 
 //back the platform info
 static void *fh_get_board_info_data(char *info_name) {
 
-	rt_list_t *p_list;
-	struct fh_board_info_list_node *info_node;
-	struct fh_board_info_list_node *_info_node;
-	p_list = &board_info_head.list;
+    rt_list_t *p_list;
+    struct fh_board_info_list_node *info_node;
+    struct fh_board_info_list_node *_info_node;
+    p_list = &board_info_head.list;
 
-	//check info name
-	if (RT_NULL == info_name) {
-		rt_kprintf("info name is NULL!\n");
-		return RT_NULL;
-	}
+    //check info name
+    if (RT_NULL == info_name) {
+        rt_kprintf("info name is NULL!\n");
+        return RT_NULL;
+    }
 
-	CHECK_TEST_LIST_EMPTY;
+    CHECK_TEST_LIST_EMPTY;
 
-	list_for_each_entry_safe(info_node, _info_node, p_list, list)
-	{
-		if (!strcmp(info_node->obj.name, info_name)) {
-			return info_node->obj.data;
-		}
-	}
+    list_for_each_entry_safe(info_node, _info_node, p_list, list)
+    {
+        if (!strcmp(info_node->obj.name, info_name)) {
+            return info_node->obj.data;
+        }
+    }
 
-	rt_kprintf("Can't find the board info name:%s\n", info_name);
+    rt_kprintf("Can't find the board info name:%s\n", info_name);
 }
 
 int fh_board_driver_register(char *info_name, struct fh_board_ops *ops) {
 
-	rt_list_t *p_list;
-	struct fh_board_info_list_node *new_node;
-	struct fh_board_info_list_node *info_node;
-	struct fh_board_info_list_node *_info_node;
-	p_list = &board_info_head.list;
+    rt_list_t *p_list;
+    struct fh_board_info_list_node *new_node;
+    struct fh_board_info_list_node *info_node;
+    struct fh_board_info_list_node *_info_node;
+    p_list = &board_info_head.list;
 
-	if (RT_NULL == info_name || RT_NULL == ops) {
-		rt_kprintf("info name or ops func is NULL!\n");
-		return PARA_ERROR;
-	}
+    if (RT_NULL == info_name || RT_NULL == ops) {
+        rt_kprintf("info name or ops func is NULL!\n");
+        return PARA_ERROR;
+    }
 
-	list_for_each_entry_safe(info_node, _info_node, p_list, list)
-	{
-		if (!strcmp(info_node->obj.name, info_name)) {
+    list_for_each_entry_safe(info_node, _info_node, p_list, list)
+    {
+        if (!strcmp(info_node->obj.name, info_name)) {
 
-			info_node->obj.ops = ops;
-			if (info_node->obj.ops->probe) {
-				info_node->obj.ops->probe(info_node->obj.data);
-			}
+            info_node->obj.ops = ops;
+            if (info_node->obj.ops->probe) {
+                info_node->obj.ops->probe(info_node->obj.data);
+            }
 
-			//return info_node->obj.data;
-		}
-	}
+            //return info_node->obj.data;
+        }
+    }
 
-	//rt_kprintf("Can't find the board info name:%s\n",info_name);
+    //rt_kprintf("Can't find the board info name:%s\n",info_name);
 
-	return 0;
+    return 0;
 }
diff --git a/bsp/fh8620/platform/common/chkenv.c b/bsp/fh8620/platform/common/chkenv.c
index 563b5bb55a..e2d8f18b22 100644
--- a/bsp/fh8620/platform/common/chkenv.c
+++ b/bsp/fh8620/platform/common/chkenv.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 /*****************************************************************************
  *  Include Section
  *  add all #include here
@@ -47,11 +47,11 @@
  *
  *
  **************************/
-#if RT_NAME_MAX	!= 16
+#if RT_NAME_MAX != 16
 #error "define RT_NAME_MAX 16"
 #endif
 
-#if RT_TICK_PER_SECOND	!= 100
+#if RT_TICK_PER_SECOND  != 100
 #warning "RT_TICK_PER_SECOND = 100"
 #endif
 
diff --git a/bsp/fh8620/platform/fh8620/arch.h b/bsp/fh8620/platform/fh8620/arch.h
index df0e7f1965..306c1239e8 100644
--- a/bsp/fh8620/platform/fh8620/arch.h
+++ b/bsp/fh8620/platform/fh8620/arch.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef ARCH_H_
 #define ARCH_H_
 
@@ -31,37 +31,37 @@
 /*****************************/
 /* BSP CONTROLLER BASE       */
 /*****************************/
-#define		INTC_REG_BASE		(0xE0200000)
-#define		SDC0_REG_BASE		(0xE2000000)
-#define		SDC1_REG_BASE		(0xE2100000)
-#define		TVE_REG_BASE		(0xE8000000)
-#define		VOU_REG_BASE		(0xE8100000)
-#define		AES_REG_BASE		(0xE8200000)
-#define		JPEG_REG_BASE		(0xE8300000)
-#define		ISPB_REG_BASE		(0xEA000000)
-#define		ISPF_REG_BASE		(0xEA100000)
-#define		VPU_REG_BASE		(0xEC000000)
-#define		VCU_REG_BASE		(0xEC100000)
-#define		DDRC_REG_BASE		(0xED000000)
-#define 	DMAC_REG_BASE		(0xEE000000)
-#define 	GMAC_REG_BASE		(0xEF000000)
-#define 	PMU_REG_BASE		(0xF0000000)
-#define 	I2C0_REG_BASE		(0xF0200000)
-#define 	GPIO0_REG_BASE		(0xF0300000)
+#define     INTC_REG_BASE       (0xE0200000)
+#define     SDC0_REG_BASE       (0xE2000000)
+#define     SDC1_REG_BASE       (0xE2100000)
+#define     TVE_REG_BASE        (0xE8000000)
+#define     VOU_REG_BASE        (0xE8100000)
+#define     AES_REG_BASE        (0xE8200000)
+#define     JPEG_REG_BASE       (0xE8300000)
+#define     ISPB_REG_BASE       (0xEA000000)
+#define     ISPF_REG_BASE       (0xEA100000)
+#define     VPU_REG_BASE        (0xEC000000)
+#define     VCU_REG_BASE        (0xEC100000)
+#define     DDRC_REG_BASE       (0xED000000)
+#define     DMAC_REG_BASE       (0xEE000000)
+#define     GMAC_REG_BASE       (0xEF000000)
+#define     PMU_REG_BASE        (0xF0000000)
+#define     I2C0_REG_BASE       (0xF0200000)
+#define     GPIO0_REG_BASE      (0xF0300000)
 #define     GPIO1_REG_BASE      (0xf4000000)
-#define 	PWM_REG_BASE		(0xF0400000)
-#define 	SPI0_REG_BASE		(0xF0500000)
-#define 	SPI1_REG_BASE		(0xF0600000)
-#define		UART0_REG_BASE		(0xF0700000)
-#define		UART1_REG_BASE		(0xF0800000)
-#define		I2S_REG_BASE		(0xF0900000)
-#define		ACODEC_REG_BASE		(0xF0A00000)
-#define		I2C1_REG_BASE		(0xF0B00000)
-#define		TMR_REG_BASE		(0xF0C00000)
-#define		WDT_REG_BASE		(0xF0D00000)
-#define		DPHY_REG_BASE		(0xF1000000)
-#define		MIPIC_REG_BASE		(0xF1100000)
-#define		SADC_REG_BASE		(0xF1200000)
+#define     PWM_REG_BASE        (0xF0400000)
+#define     SPI0_REG_BASE       (0xF0500000)
+#define     SPI1_REG_BASE       (0xF0600000)
+#define     UART0_REG_BASE      (0xF0700000)
+#define     UART1_REG_BASE      (0xF0800000)
+#define     I2S_REG_BASE        (0xF0900000)
+#define     ACODEC_REG_BASE     (0xF0A00000)
+#define     I2C1_REG_BASE       (0xF0B00000)
+#define     TMR_REG_BASE        (0xF0C00000)
+#define     WDT_REG_BASE        (0xF0D00000)
+#define     DPHY_REG_BASE       (0xF1000000)
+#define     MIPIC_REG_BASE      (0xF1100000)
+#define     SADC_REG_BASE       (0xF1200000)
 
 
 
diff --git a/bsp/fh8620/platform/fh8620/iot_cam/board.c b/bsp/fh8620/platform/fh8620/iot_cam/board.c
index 8e45b9be90..a726ce5efe 100644
--- a/bsp/fh8620/platform/fh8620/iot_cam/board.c
+++ b/bsp/fh8620/platform/fh8620/iot_cam/board.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 /*****************************************************************************
  *  Include Section
  *  add all #include here
@@ -67,15 +67,15 @@
 
 
 #ifndef HW_SDCARD_POWER_GPIO
-	#define HW_SDCARD_POWER_GPIO  63   //not used
+    #define HW_SDCARD_POWER_GPIO  63   //not used
 #endif
 /****************************************************************************
  * ADT section
  *  add definition of user defined Data Type that only be used in this file  here
  ***************************************************************************/
 struct st_platform_info {
-	char *name;
-	void *private_data;
+    char *name;
+    void *private_data;
 };
 
 /******************************************************************************
@@ -101,14 +101,14 @@ struct st_platform_info {
 
 void fh_mmc_reset(struct fh_mmc_obj *mmc_obj)
 {
-	rt_uint32_t value;
-	if (mmc_obj->id)
-		fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffd);
-	else
-		fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffb);
-	do {
-		fh_pmu_read(REG_PMU_SWRST_AHB_CTRL, &value);
-	} while (value != 0xffffffff);
+    rt_uint32_t value;
+    if (mmc_obj->id)
+        fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffd);
+    else
+        fh_pmu_write(REG_PMU_SWRST_AHB_CTRL, 0xfffffffb);
+    do {
+        fh_pmu_read(REG_PMU_SWRST_AHB_CTRL, &value);
+    } while (value != 0xffffffff);
 }
 
 static struct fh_mmc_obj mmc0_obj =
@@ -130,8 +130,8 @@ static struct fh_mmc_obj mmc1_obj =
 };
 
 #ifdef RT_USING_SPI
-#define SPI0_CLK_IN					(50000000)
-#define SPI0_MAX_BAUD				(SPI0_CLK_IN/2)
+#define SPI0_CLK_IN                 (50000000)
+#define SPI0_MAX_BAUD               (SPI0_CLK_IN/2)
 
 static struct spi_control_platform_data spi0_platform_data =
 {
@@ -152,8 +152,8 @@ static struct spi_control_platform_data spi0_platform_data =
 };
 
 
-#define SPI1_CLK_IN					(50000000)
-#define SPI1_MAX_BAUD				(SPI1_CLK_IN/2)
+#define SPI1_CLK_IN                 (50000000)
+#define SPI1_MAX_BAUD               (SPI1_CLK_IN/2)
 
 static struct spi_control_platform_data spi1_platform_data =
 {
@@ -217,10 +217,10 @@ static struct fh_wdt_obj wdt_obj =
 #ifdef RT_USING_SADC
 static struct wrap_sadc_obj sadc_obj =
 {
-		.id = 0,
-		.regs = (void *)SADC_REG_BASE,
-		.irq_no = SADC_IRQn,
-		.sample_mode = ISR_MODE,
+        .id = 0,
+        .regs = (void *)SADC_REG_BASE,
+        .irq_no = SADC_IRQn,
+        .sample_mode = ISR_MODE,
 };
 #endif
 
@@ -366,8 +366,8 @@ struct st_platform_info plat_sadc =
 #endif
 
 const static struct st_platform_info *platform_info[] = {
-		&plat_mmc0,
-		//&plat_mmc1,//by PeterJiang, wifi don't use SDIO framework...
+        &plat_mmc0,
+        //&plat_mmc1,//by PeterJiang, wifi don't use SDIO framework...
 #ifdef RT_USING_SPI
         &plat_spi0,
 #endif
@@ -400,168 +400,168 @@ const static struct st_platform_info *platform_info[] = {
 
  void clock_init(void)
  {
- 	//UINT32 reg;
- 	//gate enable, spi0, gmac, uart0, timer0, wdt, pts
+    //UINT32 reg;
+    //gate enable, spi0, gmac, uart0, timer0, wdt, pts
 #ifdef YG_TEK
-	fh_pmu_write_mask(REG_PMU_PAD_MAC_TXER_CFG, 0x100000, 0x100000);
+    fh_pmu_write_mask(REG_PMU_PAD_MAC_TXER_CFG, 0x100000, 0x100000);
 #endif
- 	//SPI0
-	fh_pmu_write_mask(REG_PMU_CLK_DIV3, 0xb, 0xff);
+    //SPI0
+    fh_pmu_write_mask(REG_PMU_CLK_DIV3, 0xb, 0xff);
 
- 	//GMAC
-	fh_pmu_write_mask(REG_PMU_CLK_DIV6, 0x5000000, 0xf000000);
+    //GMAC
+    fh_pmu_write_mask(REG_PMU_CLK_DIV6, 0x5000000, 0xf000000);
 
- 	//UART0
-	fh_pmu_write_mask(REG_PMU_CLK_DIV4, 0x1, 0xf);
+    //UART0
+    fh_pmu_write_mask(REG_PMU_CLK_DIV4, 0x1, 0xf);
 
- 	//TIMER0
-	fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d0000, 0x3f0000);
+    //TIMER0
+    fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d0000, 0x3f0000);
 
- 	//PTS
-	fh_pmu_write_mask(REG_PMU_CLK_DIV2, 0x23, 0x3f);
+    //PTS
+    fh_pmu_write_mask(REG_PMU_CLK_DIV2, 0x23, 0x3f);
 
- 	//WDT
-	//fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d00, 0x3f00);
-	fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x3500, 0x3f00);
+    //WDT
+    //fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x1d00, 0x3f00);
+    fh_pmu_write_mask(REG_PMU_CLK_DIV5, 0x3500, 0x3f00);
 
- 	//clock enable
-	fh_pmu_write_mask(REG_PMU_CLK_GATE, 0, 0x720ba080);
+    //clock enable
+    fh_pmu_write_mask(REG_PMU_CLK_GATE, 0, 0x720ba080);
 
     //sd0_drv_sel
-	fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x200000, 0x300000);
+    fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x200000, 0x300000);
     //sd0_sample_sel
-	fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x00000, 0x30000);
+    fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x00000, 0x30000);
 
- 	//sd1_drv_sel
-	fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x2000, 0x3000);
- 	//sd1_sample_sel
-	fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x000, 0x300);
+    //sd1_drv_sel
+    fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x2000, 0x3000);
+    //sd1_sample_sel
+    fh_pmu_write_mask(REG_PMU_CLK_SEL, 0x000, 0x300);
 
  }
 
 
 void fh_platform_info_register(void){
-	struct fh_board_info *test_info;
-	int i;
+    struct fh_board_info *test_info;
+    int i;
 
-	for(i=0;iname,platform_info[i]->private_data);
-		if(!test_info){
-			rt_kprintf("info_name(%s) failed registered\n", platform_info[i]->name);
-		}
-	}
+    for(i=0;iname,platform_info[i]->private_data);
+        if(!test_info){
+            rt_kprintf("info_name(%s) failed registered\n", platform_info[i]->name);
+        }
+    }
 }
 
 void rt_hw_board_init()
 {
-	/* initialize the system clock */
-	rt_hw_clock_init();
-	//add iomux init 2015-3-11 by yu.zhang for fh81(fullhan)
-	//iomux_init();
+    /* initialize the system clock */
+    rt_hw_clock_init();
+    //add iomux init 2015-3-11 by yu.zhang for fh81(fullhan)
+    //iomux_init();
     fh_iomux_init(PMU_REG_BASE + 0x5c);
-	//add clk init  2015-3-11 by yu.zhang for fh81(fullhan)
-	clock_init();
-	/* initialize uart */
-	rt_hw_uart_init();
-	rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
-	/* initialize timer1 */
-	rt_hw_timer_init();
-	//board data info init...
-	fh_board_info_init();
-	fh_platform_info_register();
+    //add clk init  2015-3-11 by yu.zhang for fh81(fullhan)
+    clock_init();
+    /* initialize uart */
+    rt_hw_uart_init();
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+    /* initialize timer1 */
+    rt_hw_timer_init();
+    //board data info init...
+    fh_board_info_init();
+    fh_platform_info_register();
 
 }
 
 void rt_board_driver_init(){
 
-	//add board init lock here...
-	/*rt_show_version();*/
-	int ret;
+    //add board init lock here...
+    /*rt_show_version();*/
+    int ret;
 
 /* Filesystem Initialization */
 #ifdef RT_USING_DFS
-	{
-		/* init the device filesystem */
-		dfs_init();
-		rt_kprintf("DFS initialized!\n");
+    {
+        /* init the device filesystem */
+        dfs_init();
+        rt_kprintf("DFS initialized!\n");
 #if defined(RT_USING_DFS_ELMFAT)
-		/* init the elm chan FatFs filesystam*/
-		elm_init();
-		rt_kprintf("ELM initialized!\n");
+        /* init the elm chan FatFs filesystam*/
+        elm_init();
+        rt_kprintf("ELM initialized!\n");
 #endif
 
 #if defined(RT_USING_DFS_ROMFS)
-		dfs_romfs_init();
-		if (dfs_mount(RT_NULL, "/rom", "rom", 0, &romfs_root) == 0)
-		{
-			rt_kprintf("ROM File System initialized!\n");
-		}
-		else
-			rt_kprintf("ROM File System initialzation failed!\n");
+        dfs_romfs_init();
+        if (dfs_mount(RT_NULL, "/rom", "rom", 0, &romfs_root) == 0)
+        {
+            rt_kprintf("ROM File System initialized!\n");
+        }
+        else
+            rt_kprintf("ROM File System initialzation failed!\n");
 #endif
 
 #if defined(RT_USING_DFS_DEVFS)
-		devfs_init();
-		if (dfs_mount(RT_NULL, "/dev", "devfs", 0, 0) == 0)
-			rt_kprintf("Device File System initialized!\n");
-		else
-			rt_kprintf("Device File System initialzation failed!\n");
+        devfs_init();
+        if (dfs_mount(RT_NULL, "/dev", "devfs", 0, 0) == 0)
+            rt_kprintf("Device File System initialized!\n");
+        else
+            rt_kprintf("Device File System initialzation failed!\n");
 
-		#ifdef RT_USING_NEWLIB
-		/* init libc */
-		libc_system_init(RT_CONSOLE_DEVICE_NAME);
-		#endif
+        #ifdef RT_USING_NEWLIB
+        /* init libc */
+        libc_system_init(RT_CONSOLE_DEVICE_NAME);
+        #endif
 #endif
 
 #if defined(RT_USING_DFS_UFFS)
-	{
-		/* init the uffs filesystem */
-		dfs_uffs_init();
+    {
+        /* init the uffs filesystem */
+        dfs_uffs_init();
 
-		/* mount flash device as flash directory */
-		if(dfs_mount("nand0", "/nand0", "uffs", 0, 0) == 0)
-			rt_kprintf("UFFS File System initialized!\n");
-		else
-			rt_kprintf("UFFS File System initialzation failed!\n");
-	}
+        /* mount flash device as flash directory */
+        if(dfs_mount("nand0", "/nand0", "uffs", 0, 0) == 0)
+            rt_kprintf("UFFS File System initialized!\n");
+        else
+            rt_kprintf("UFFS File System initialzation failed!\n");
+    }
 #endif
 
 
 #ifdef RT_USING_DFS_RAMFS
-	dfs_ramfs_init();
-	{
-		rt_uint8_t *ramfs_pool = RT_NULL;
-		struct dfs_ramfs* ramfs;
-		ramfs_pool = rt_malloc(0x800000);
-		if(ramfs_pool)
-		{
-			ramfs =(struct dfs_ramfs*) dfs_ramfs_create((rt_uint8_t*)ramfs_pool, 0x800000);
-			if (ramfs != RT_NULL)
-			{
-				if (dfs_mount(RT_NULL, "/", "ram", 0, ramfs) == 0)
-				{
-					rt_kprintf("Mount RAMDisk done!\n");
-				}
-				else
-				{
-					rt_kprintf("Mount RAMDisk failed.\n");
-				}
-			}
-		}
-		else
-		{
-			rt_kprintf("alloc ramfs poll failed\n");
-		}
-	}
+    dfs_ramfs_init();
+    {
+        rt_uint8_t *ramfs_pool = RT_NULL;
+        struct dfs_ramfs* ramfs;
+        ramfs_pool = rt_malloc(0x800000);
+        if(ramfs_pool)
+        {
+            ramfs =(struct dfs_ramfs*) dfs_ramfs_create((rt_uint8_t*)ramfs_pool, 0x800000);
+            if (ramfs != RT_NULL)
+            {
+                if (dfs_mount(RT_NULL, "/", "ram", 0, ramfs) == 0)
+                {
+                    rt_kprintf("Mount RAMDisk done!\n");
+                }
+                else
+                {
+                    rt_kprintf("Mount RAMDisk failed.\n");
+                }
+            }
+        }
+        else
+        {
+            rt_kprintf("alloc ramfs poll failed\n");
+        }
+    }
 #endif
-	}
+    }
 #endif
 /* Filesystem Initialization end*/
 
 #ifdef RT_USING_GPIO
     {
         rt_hw_gpio_init();
-	rt_kprintf("GPIO initialized!\n");
+    rt_kprintf("GPIO initialized!\n");
 
 #ifdef RT_USING_SDIO
         //wifi
@@ -572,7 +572,7 @@ void rt_board_driver_init(){
         //micro sd
         gpio_request(HW_SDCARD_POWER_GPIO);
         gpio_direction_output(HW_SDCARD_POWER_GPIO, 0);
-	rt_kprintf("SDIO initialized!\n");
+    rt_kprintf("SDIO initialized!\n");
 #endif
         //sensor
         gpio_request(HW_CIS_RST_GPIO);
@@ -585,7 +585,7 @@ void rt_board_driver_init(){
 #ifdef RT_USING_SDIO
 #ifndef RT_USING_WIFI_MARVEL
     rt_hw_mmc_init();
-	rt_kprintf("MMC initialized!\n");
+    rt_kprintf("MMC initialized!\n");
     rt_thread_delay(RT_TICK_PER_SECOND*2);
     /* mount sd card fat partition 1 as root directory */
     #ifdef RT_USING_DFS_ELMFAT
@@ -601,56 +601,56 @@ void rt_board_driver_init(){
 
 
 #ifdef RT_USING_FH_DMA
-	{
+    {
         rt_fh_dma_init();
-	rt_kprintf("DMA initialized!\n");
-	}
+    rt_kprintf("DMA initialized!\n");
+    }
 #endif
 
 
 
 #ifdef RT_USING_FH_ACW
-	{
-		 fh_audio_init();
-			rt_kprintf("AUDIO initialized!\n");
-	}
+    {
+         fh_audio_init();
+            rt_kprintf("AUDIO initialized!\n");
+    }
 #endif
 
 #ifdef RT_USING_LWIP
-	{
-		/* init lwip system */
-		lwip_sys_init();
-		rt_kprintf("LWIP SYS initialized!\n");
-		eth_system_device_init();
-		rt_kprintf("ETH initialized!\n");
-	}
+    {
+        /* init lwip system */
+        lwip_sys_init();
+        rt_kprintf("LWIP SYS initialized!\n");
+        eth_system_device_init();
+        rt_kprintf("ETH initialized!\n");
+    }
 #endif
 
 #ifdef RT_USING_GMAC
         /* register ethernetif device */
         rt_app_fh_gmac_init();
-	rt_kprintf("GMAC initialized!\n");
+    rt_kprintf("GMAC initialized!\n");
 #endif
 
 
 #ifdef RT_USING_I2C
-	{
-	    rt_hw_i2c_init();
-		rt_kprintf("I2C initialized!\n");
-	}
+    {
+        rt_hw_i2c_init();
+        rt_kprintf("I2C initialized!\n");
+    }
 #endif
 
 #ifdef RT_USING_PWM
     {
         rt_hw_pwm_init();
-	rt_kprintf("PWM initialized!\n");
+    rt_kprintf("PWM initialized!\n");
 }
 #endif
 
 #ifdef RT_USING_WDT
     {
         rt_hw_wdt_init();
-	rt_kprintf("WDT initialized!\n");
+    rt_kprintf("WDT initialized!\n");
 }
 #endif
 
@@ -658,7 +658,7 @@ void rt_board_driver_init(){
 #ifdef RT_USING_SPI
     {
         rt_hw_spi_init();
-	rt_kprintf("SPI initialized!\n");
+    rt_kprintf("SPI initialized!\n");
     }
 #endif
 
@@ -668,21 +668,21 @@ void rt_board_driver_init(){
     rt_kprintf("FLASH initialized!\n");
 #endif
 
-	rt_kprintf("init done\n");
+    rt_kprintf("init done\n");
 #ifdef RT_USING_SADC
     rt_hw_sadc_init();
-	rt_kprintf("SADC initialized!\n");
+    rt_kprintf("SADC initialized!\n");
 #endif
 
 #ifdef RT_USING_ENC28J60
-	gpio_request(ENC28J60_INT);
-	gpio_direction_input(ENC28J60_INT);
-	gpio_set_irq_type(ENC28J60_INT, IRQ_TYPE_EDGE_FALLING);
-	rt_hw_interrupt_install(gpio_to_irq(ENC28J60_INT), (void *)enc28j60_isr, RT_NULL, RT_NULL);
-	gpio_irq_enable(gpio_to_irq(ENC28J60_INT));
-	gpio_release(ENC28J60_INT);
+    gpio_request(ENC28J60_INT);
+    gpio_direction_input(ENC28J60_INT);
+    gpio_set_irq_type(ENC28J60_INT, IRQ_TYPE_EDGE_FALLING);
+    rt_hw_interrupt_install(gpio_to_irq(ENC28J60_INT), (void *)enc28j60_isr, RT_NULL, RT_NULL);
+    gpio_irq_enable(gpio_to_irq(ENC28J60_INT));
+    gpio_release(ENC28J60_INT);
 
-	enc28j60_attach(ENC28J60_SPI_DEV);
+    enc28j60_attach(ENC28J60_SPI_DEV);
 #endif
 }
 
diff --git a/bsp/fh8620/platform/fh8620/iot_cam/board_def.h b/bsp/fh8620/platform/fh8620/iot_cam/board_def.h
index 48551b7095..902375f429 100644
--- a/bsp/fh8620/platform/fh8620/iot_cam/board_def.h
+++ b/bsp/fh8620/platform/fh8620/iot_cam/board_def.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,18 +18,18 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef BOARD_DEF_H_
 #define BOARD_DEF_H_
 
 
 /* ***********************
- * SECTION:	DRIVE
+ * SECTION: DRIVE
  * ***********************/
 // Basic drive..
 #define RT_USING_UART1
@@ -49,22 +49,22 @@
 #define CONFIG_PLAT_V2
 
 #ifndef FH_DDR_START
-#define	FH_DDR_START		0xA0000000
-#define FH_DDR_END		0xA1000000
+#define FH_DDR_START        0xA0000000
+#define FH_DDR_END      0xA1000000
 
-#define FH_RTT_OS_MEM_SIZE	0x00600000
-#define FH_DMA_MEM_SIZE		0x20000 /* 128k */
+#define FH_RTT_OS_MEM_SIZE  0x00600000
+#define FH_DMA_MEM_SIZE     0x20000 /* 128k */
 
-#define FH_RTT_OS_MEM_END	(FH_DDR_START + FH_RTT_OS_MEM_SIZE)
-#define FH_SDK_MEM_START	(FH_RTT_OS_MEM_END + FH_DMA_MEM_SIZE)
-#define FH_RTT_OS_HEAP_END	FH_SDK_MEM_START
-#define FH_SDK_MEM_SIZE		(FH_DDR_END - FH_SDK_MEM_START)
+#define FH_RTT_OS_MEM_END   (FH_DDR_START + FH_RTT_OS_MEM_SIZE)
+#define FH_SDK_MEM_START    (FH_RTT_OS_MEM_END + FH_DMA_MEM_SIZE)
+#define FH_RTT_OS_HEAP_END  FH_SDK_MEM_START
+#define FH_SDK_MEM_SIZE     (FH_DDR_END - FH_SDK_MEM_START)
 #endif /* end of FH_DDR_START*/
- 
+
 /* ***********************
- * SECTION:	DRIVE COMPONENT
+ * SECTION: DRIVE COMPONENT
  * ***********************/
-#define UART_NAME 						"uart1"
+#define UART_NAME                       "uart1"
 #define RT_USING_DMA_MEM
 
 #define RT_USING_MCI0
diff --git a/bsp/fh8620/platform/fh8620/iot_cam/iomux.c b/bsp/fh8620/platform/fh8620/iot_cam/iomux.c
index ee0bb63260..dc699c4450 100644
--- a/bsp/fh8620/platform/fh8620/iot_cam/iomux.c
+++ b/bsp/fh8620/platform/fh8620/iot_cam/iomux.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,650 +18,650 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include "rtdef.h"
 #include "iomux.h"
 #include "rtconfig.h"
 
 
 Iomux_Pad fh_iomux_cfg[] = {
-		{
-			.func_name = { "RESETN", "", "", "", },
-			.reg_type  = 9,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = -1,
-		},
-		{
-			.func_name = { "TEST", "", "", "", },
-			.reg_type  = 9,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = -1,
-		},
-		{
-			.func_name = { "CIS_CLK", "", "", "", },
-			.reg_type  = 5,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_HSYNC", "GPIO20", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_VSYNC", "GPIO21", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_PCLK", "", "", "", },
-			.reg_type  = 9,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 0,
-		},
-		{
-			.func_name = { "CIS_D0", "GPIO22", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D1", "GPIO23", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D2", "GPIO24", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D3", "GPIO25", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D4", "GPIO26", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D5", "GPIO27", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D6", "GPIO28", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D7", "GPIO29", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D8", "GPIO30", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D9", "GPIO31", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D10", "GPIO32", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_D11", "GPIO33", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_REF_CLK", "", "", "", },
-			.reg_type  = 17,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "MAC_MDC", "GPIO34", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 0,
-		},
-		{
-			.func_name = { "MAC_MDIO", "", "", "", },
-			.reg_type  = 17,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_COL", "GPIO35", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_CRS", "GPIO36", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_RXCK", "", "", "", },
-			.reg_type  = 9,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = -1,
-		},
-		{
-			.func_name = { "MAC_RXD0", "", "", "", },
-			.reg_type  = 17,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = -1,
-		},
+        {
+            .func_name = { "RESETN", "", "", "", },
+            .reg_type  = 9,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = -1,
+        },
+        {
+            .func_name = { "TEST", "", "", "", },
+            .reg_type  = 9,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = -1,
+        },
+        {
+            .func_name = { "CIS_CLK", "", "", "", },
+            .reg_type  = 5,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_HSYNC", "GPIO20", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_VSYNC", "GPIO21", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_PCLK", "", "", "", },
+            .reg_type  = 9,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 0,
+        },
+        {
+            .func_name = { "CIS_D0", "GPIO22", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D1", "GPIO23", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D2", "GPIO24", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D3", "GPIO25", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D4", "GPIO26", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D5", "GPIO27", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D6", "GPIO28", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D7", "GPIO29", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D8", "GPIO30", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D9", "GPIO31", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D10", "GPIO32", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_D11", "GPIO33", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_REF_CLK", "", "", "", },
+            .reg_type  = 17,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "MAC_MDC", "GPIO34", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 0,
+        },
+        {
+            .func_name = { "MAC_MDIO", "", "", "", },
+            .reg_type  = 17,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_COL", "GPIO35", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_CRS", "GPIO36", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_RXCK", "", "", "", },
+            .reg_type  = 9,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = -1,
+        },
+        {
+            .func_name = { "MAC_RXD0", "", "", "", },
+            .reg_type  = 17,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = -1,
+        },
 
-		{
-			.func_name = { "MAC_RXD1", "GPIO38", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_RXD2", "GPIO39", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_RXD3", "GPIO40", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_RXDV", "GPIO41", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_TXCK", "", "", "", },
-			.reg_type  = 9,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = -1,
-		},
-		{
-			.func_name = { "MAC_TXD0", "GPIO42", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_TXD1", "GPIO43", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_TXD2", "GPIO44", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_TXD3", "GPIO45", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_TXEN", "GPIO46", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "MAC_RXER", "GPIO47", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "GPIO0", "ARC_JTAG_TCK", "GPIO0", "CIS_SSI0_CSN1", },
-			.reg_type  = 21,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "GPIO1", "ARC_JTAG_TRSTN", "GPIO1", "CIS_SSI0_RXD", },
-			.reg_type  = 21,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "GPIO2", "ARC_JTAG_TMS", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "GPIO3", "ARC_JTAG_TDI", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "GPIO4", "ARC_JTAG_TDO", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "JTAG_TCK", "GPIO5", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "JTAG_TRSTN", "GPIO6", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "JTAG_TMS", "GPIO7", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "JTAG_TDI", "GPIO8", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "JTAG_TDO", "GPIO9", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "GPIO10", "UART1_OUT", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "GPIO11", "UART1_IN", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "GPIO12", "PWM_OUT0", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "GPIO13", "PWM_OUT1", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "GPIO14", "PWM_OUT2", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "RESERVED", "", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-		},
-		{
-			.func_name = { "RESERVED", "", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-		},
-		{
-			.func_name = { "RESERVED", "", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-		},
-		{
-			.func_name = { "RESERVED", "", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-		},
-		{
-			.func_name = { "RESERVED", "", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-		},
-		{
-			.func_name = { "UART0_IN", "GPIO48", "UART0_IN", " I2S_WS", },
-			.reg_type  = 21,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "UART0_OUT", "GPIO49", "UART0_OUT", "I2S_CLK", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_SCL", "GPIO56", "CIS_SCL", "CIS_SSI0_CLK", },
-			.reg_type  = 13,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "CIS_SDA", "GPIO57", "CIS_SDA", "CIS_SSI0_TXD", },
-			.reg_type  = 13,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SCL1", "GPIO50", "SCL1", "I2S_DI", },
-			.reg_type  = 21,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SDA1", "GPIO51", "I2S_DO", "", },
-			.reg_type  = 21,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SSI0_CLK", "", "", "", },
-			.reg_type  = 5,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SSI0_TXD", "", "", "", },
-			.reg_type  = 5,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SSI0_CSN0", "GPIO54", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SSI0_CSN1", "GPIO55", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SSI0_RXD", "", "", "", },
-			.reg_type  = 17,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = -1,
-		},
-		{
-			.func_name = { "SD0_CD", "GPIO52", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SD0_WP", "GPIO53", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SD0_CLK", "", "", "", },
-			.reg_type  = 5,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "SD0_CMD_RSP", "", "", "", },
-			.reg_type  = 17,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "SD0_DATA0", "", "", "", },
-			.reg_type  = 17,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "SD0_DATA1", "", "", "", },
-			.reg_type  = 17,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 2,
-		},
-		{
-			.func_name = { "SD0_DATA2", "", "", "", },
-			.reg_type  = 17,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "SD0_DATA3", "", "", "", },
-			.reg_type  = 17,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "SD1_CLK", "SSI1_CLK", "", "", },
-			.reg_type  = 8,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_NONE,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SD1_CD", "GPIO_58", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SD1_WP", "GPIO_59", "", "", },
-			.reg_type  = 20,
-	        .func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
-		{
-			.func_name = { "SD1_DATA0", "SSI1_TXD", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "SD1_DATA1", "SSI1_CSN0", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "SD1_DATA2", "SSI1_CSN1", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "SD1_DATA3", "", "", "", },
-			.reg_type  = 17,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "SD1_CMD_RSP", "SSI1_RXD", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = 3,
-		},
-		{
-			.func_name = { "RESERVED", "", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-		},
-		{
-			.func_name = { "RESERVED", "", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-		},
-		{
-			.func_name = { "RESERVED", "", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-		},
-		{
-			.func_name = { "RESERVED", "", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-		},
-		{
-			.func_name = { "CLK_SW0", "", "", "", },
-			.reg_type  = 9,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = -1,
-		},
-		{
-			.func_name = { "CLK_SW1", "", "", "", },
-			.reg_type  = 9,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = -1,
-		},
-		{
-			.func_name = { "CLK_SW2", "", "", "", },
-			.reg_type  = 9,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = -1,
-		},
-		{
-			.func_name = { "CLK_SW3", "", "", "", },
-			.reg_type  = 9,
-			.func_sel  = 0,
-			.pupd 	   = IOMUX_PUPD_UP,
-			.drv_cur   = -1,
-		},
-		{
-			.func_name = { "RESERVED", "", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 0,
-		},
-		{
-			.func_name = { "MAC_TXER", "GPIO37", "", "", },
-			.reg_type  = 20,
-			.func_sel  = 1,
-			.pupd 	   = IOMUX_PUPD_DOWN,
-			.drv_cur   = 1,
-		},
+        {
+            .func_name = { "MAC_RXD1", "GPIO38", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_RXD2", "GPIO39", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_RXD3", "GPIO40", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_RXDV", "GPIO41", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_TXCK", "", "", "", },
+            .reg_type  = 9,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = -1,
+        },
+        {
+            .func_name = { "MAC_TXD0", "GPIO42", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_TXD1", "GPIO43", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_TXD2", "GPIO44", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_TXD3", "GPIO45", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_TXEN", "GPIO46", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "MAC_RXER", "GPIO47", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "GPIO0", "ARC_JTAG_TCK", "GPIO0", "CIS_SSI0_CSN1", },
+            .reg_type  = 21,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "GPIO1", "ARC_JTAG_TRSTN", "GPIO1", "CIS_SSI0_RXD", },
+            .reg_type  = 21,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "GPIO2", "ARC_JTAG_TMS", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "GPIO3", "ARC_JTAG_TDI", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "GPIO4", "ARC_JTAG_TDO", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "JTAG_TCK", "GPIO5", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "JTAG_TRSTN", "GPIO6", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "JTAG_TMS", "GPIO7", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "JTAG_TDI", "GPIO8", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "JTAG_TDO", "GPIO9", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "GPIO10", "UART1_OUT", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "GPIO11", "UART1_IN", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "GPIO12", "PWM_OUT0", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "GPIO13", "PWM_OUT1", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "GPIO14", "PWM_OUT2", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "RESERVED", "", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+        },
+        {
+            .func_name = { "RESERVED", "", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+        },
+        {
+            .func_name = { "RESERVED", "", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+        },
+        {
+            .func_name = { "RESERVED", "", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+        },
+        {
+            .func_name = { "RESERVED", "", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+        },
+        {
+            .func_name = { "UART0_IN", "GPIO48", "UART0_IN", " I2S_WS", },
+            .reg_type  = 21,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "UART0_OUT", "GPIO49", "UART0_OUT", "I2S_CLK", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_SCL", "GPIO56", "CIS_SCL", "CIS_SSI0_CLK", },
+            .reg_type  = 13,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "CIS_SDA", "GPIO57", "CIS_SDA", "CIS_SSI0_TXD", },
+            .reg_type  = 13,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SCL1", "GPIO50", "SCL1", "I2S_DI", },
+            .reg_type  = 21,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SDA1", "GPIO51", "I2S_DO", "", },
+            .reg_type  = 21,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SSI0_CLK", "", "", "", },
+            .reg_type  = 5,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SSI0_TXD", "", "", "", },
+            .reg_type  = 5,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SSI0_CSN0", "GPIO54", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SSI0_CSN1", "GPIO55", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SSI0_RXD", "", "", "", },
+            .reg_type  = 17,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = -1,
+        },
+        {
+            .func_name = { "SD0_CD", "GPIO52", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SD0_WP", "GPIO53", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SD0_CLK", "", "", "", },
+            .reg_type  = 5,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "SD0_CMD_RSP", "", "", "", },
+            .reg_type  = 17,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "SD0_DATA0", "", "", "", },
+            .reg_type  = 17,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "SD0_DATA1", "", "", "", },
+            .reg_type  = 17,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 2,
+        },
+        {
+            .func_name = { "SD0_DATA2", "", "", "", },
+            .reg_type  = 17,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "SD0_DATA3", "", "", "", },
+            .reg_type  = 17,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "SD1_CLK", "SSI1_CLK", "", "", },
+            .reg_type  = 8,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_NONE,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SD1_CD", "GPIO_58", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SD1_WP", "GPIO_59", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
+        {
+            .func_name = { "SD1_DATA0", "SSI1_TXD", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "SD1_DATA1", "SSI1_CSN0", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "SD1_DATA2", "SSI1_CSN1", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "SD1_DATA3", "", "", "", },
+            .reg_type  = 17,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "SD1_CMD_RSP", "SSI1_RXD", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = 3,
+        },
+        {
+            .func_name = { "RESERVED", "", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+        },
+        {
+            .func_name = { "RESERVED", "", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+        },
+        {
+            .func_name = { "RESERVED", "", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+        },
+        {
+            .func_name = { "RESERVED", "", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+        },
+        {
+            .func_name = { "CLK_SW0", "", "", "", },
+            .reg_type  = 9,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = -1,
+        },
+        {
+            .func_name = { "CLK_SW1", "", "", "", },
+            .reg_type  = 9,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = -1,
+        },
+        {
+            .func_name = { "CLK_SW2", "", "", "", },
+            .reg_type  = 9,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = -1,
+        },
+        {
+            .func_name = { "CLK_SW3", "", "", "", },
+            .reg_type  = 9,
+            .func_sel  = 0,
+            .pupd      = IOMUX_PUPD_UP,
+            .drv_cur   = -1,
+        },
+        {
+            .func_name = { "RESERVED", "", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 0,
+        },
+        {
+            .func_name = { "MAC_TXER", "GPIO37", "", "", },
+            .reg_type  = 20,
+            .func_sel  = 1,
+            .pupd      = IOMUX_PUPD_DOWN,
+            .drv_cur   = 1,
+        },
 };
 
 
diff --git a/bsp/fh8620/platform/fh8620/iot_cam/startup.c b/bsp/fh8620/platform/fh8620/iot_cam/startup.c
index ebadf0677b..6787dc7f37 100644
--- a/bsp/fh8620/platform/fh8620/iot_cam/startup.c
+++ b/bsp/fh8620/platform/fh8620/iot_cam/startup.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include 
 #include 
 #include 
@@ -50,13 +50,13 @@ extern void rt_system_heap_init(void*, void*);
 extern void rt_hw_finsh_init(void);
 extern void rt_application_init(void);
 
-static struct mem_desc fh_mem_desc[] = 
+static struct mem_desc fh_mem_desc[] =
 {
-		{ 0xA0000000, FH_RTT_OS_MEM_END-1, 0xA0000000, SECT_RWX_CB, 0, SECT_MAPPED },
-		{ FH_RTT_OS_MEM_END, FH_DDR_END-1, FH_RTT_OS_MEM_END, SECT_RWNX_NCNB, 0, SECT_MAPPED },
-		{ 0xFFFF0000, 0xFFFF1000-1, 0xA0000000, SECT_TO_PAGE, PAGE_ROX_CB, PAGE_MAPPED }, /* isr vector table */
-		{ 0xE0000000, 0xF1300000-1, 0xE0000000, SECT_RWNX_NCNB, 0, SECT_MAPPED },       /* io table */
-		{ 0xF4000000, 0xF4100000-1, 0xF4000000, SECT_RWNX_NCNB, 0, SECT_MAPPED },       /* GPIO#1 io table */
+        { 0xA0000000, FH_RTT_OS_MEM_END-1, 0xA0000000, SECT_RWX_CB, 0, SECT_MAPPED },
+        { FH_RTT_OS_MEM_END, FH_DDR_END-1, FH_RTT_OS_MEM_END, SECT_RWNX_NCNB, 0, SECT_MAPPED },
+        { 0xFFFF0000, 0xFFFF1000-1, 0xA0000000, SECT_TO_PAGE, PAGE_ROX_CB, PAGE_MAPPED }, /* isr vector table */
+        { 0xE0000000, 0xF1300000-1, 0xE0000000, SECT_RWNX_NCNB, 0, SECT_MAPPED },       /* io table */
+        { 0xF4000000, 0xF4100000-1, 0xF4000000, SECT_RWNX_NCNB, 0, SECT_MAPPED },       /* GPIO#1 io table */
 };
 
 rt_uint8_t _irq_stack_start[1024];
@@ -72,46 +72,46 @@ extern unsigned char __bss_end;
  */
 void rtthread_startup(void)
 {
-	/* disable interrupt first */
-	rt_hw_interrupt_disable();
-	/* initialize hardware interrupt */
-	rt_hw_interrupt_init();
+    /* disable interrupt first */
+    rt_hw_interrupt_disable();
+    /* initialize hardware interrupt */
+    rt_hw_interrupt_init();
 
-	/* initialize mmu */
-	rt_hw_mmu_init(fh_mem_desc, sizeof(fh_mem_desc)/sizeof(fh_mem_desc[0]));
+    /* initialize mmu */
+    rt_hw_mmu_init(fh_mem_desc, sizeof(fh_mem_desc)/sizeof(fh_mem_desc[0]));
 
-	rt_system_heap_init((void*)&__bss_end, (void*)FH_RTT_OS_MEM_END);
+    rt_system_heap_init((void*)&__bss_end, (void*)FH_RTT_OS_MEM_END);
 
 #ifdef RT_USING_DMA_MEM
-	//just use the last 100KB
-	fh_dma_mem_init((rt_uint32_t *)FH_RTT_OS_MEM_END, FH_DMA_MEM_SIZE);
+    //just use the last 100KB
+    fh_dma_mem_init((rt_uint32_t *)FH_RTT_OS_MEM_END, FH_DMA_MEM_SIZE);
 #endif
 
-	/* initialize board */
-	rt_hw_board_init();
+    /* initialize board */
+    rt_hw_board_init();
 
-	/* show version */
-	rt_show_version();
+    /* show version */
+    rt_show_version();
 
-	/* initialize timer system */
-	rt_system_timer_init();
+    /* initialize timer system */
+    rt_system_timer_init();
 
-	/* initialize scheduler system */
-	rt_system_scheduler_init();
+    /* initialize scheduler system */
+    rt_system_scheduler_init();
 
-	/* initialize application */
-	rt_application_init();
+    /* initialize application */
+    rt_application_init();
 
-	/* initialize system timer thread */
-	rt_system_timer_thread_init();
+    /* initialize system timer thread */
+    rt_system_timer_thread_init();
 
-	/* initialize idle thread */
-	rt_thread_idle_init();
+    /* initialize idle thread */
+    rt_thread_idle_init();
 
-	/* start scheduler */
-	rt_system_scheduler_start();
+    /* start scheduler */
+    rt_system_scheduler_start();
 
-	/* never reach here */
+    /* never reach here */
 
-	return ;
+    return ;
 }
diff --git a/bsp/fh8620/platform/fh_arch.h b/bsp/fh8620/platform/fh_arch.h
index 2cbe36718a..a8360cda54 100644
--- a/bsp/fh8620/platform/fh_arch.h
+++ b/bsp/fh8620/platform/fh_arch.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef FH_ARCH_H_
 #define FH_ARCH_H_
 
diff --git a/bsp/fh8620/platform/fh_def.h b/bsp/fh8620/platform/fh_def.h
index 57bedcb9e7..4a97709d54 100644
--- a/bsp/fh8620/platform/fh_def.h
+++ b/bsp/fh8620/platform/fh_def.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef FH_DEF_H_
 #define FH_DEF_H_
 
@@ -32,29 +32,29 @@
 #define MIN(a,b) ((a) < (b) ? (a) : (b))
 #define MAX(a,b) ((a) > (b) ? (a) : (b))
 
-typedef char				SINT8;
-typedef short				SINT16;
-typedef int					SINT32;
-typedef long long			SINT64;
-typedef unsigned char		UINT8;
-typedef unsigned short		UINT16;
-typedef unsigned int		UINT32;
-typedef unsigned long long	UINT64;
+typedef char                SINT8;
+typedef short               SINT16;
+typedef int                 SINT32;
+typedef long long           SINT64;
+typedef unsigned char       UINT8;
+typedef unsigned short      UINT16;
+typedef unsigned int        UINT32;
+typedef unsigned long long  UINT64;
 
 #ifndef TYPE_DEFINED
-typedef	unsigned char		uchar;
-typedef signed   char		int8;
-typedef unsigned char		uint8;
-typedef signed   short		int16;
-typedef unsigned short		uint16;
-typedef signed   int		int32;
-typedef unsigned int		uint32;
-typedef signed   long  long	int64;
-typedef unsigned long long	uint64;
-typedef float        		ieee_single;
-typedef double       		ieee_double;
+typedef unsigned char       uchar;
+typedef signed   char       int8;
+typedef unsigned char       uint8;
+typedef signed   short      int16;
+typedef unsigned short      uint16;
+typedef signed   int        int32;
+typedef unsigned int        uint32;
+typedef signed   long  long int64;
+typedef unsigned long long  uint64;
+typedef float               ieee_single;
+typedef double              ieee_double;
 
-typedef unsigned long  		boolean;
+typedef unsigned long       boolean;
 
 #define TYPE_DEFINED
 
diff --git a/bsp/fh8620/platform/plat-v2/arch.h b/bsp/fh8620/platform/plat-v2/arch.h
index bb32d96ea4..c8d23c0163 100644
--- a/bsp/fh8620/platform/plat-v2/arch.h
+++ b/bsp/fh8620/platform/plat-v2/arch.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,53 +18,53 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef ARCH_H_
 #define ARCH_H_
 
 /*****************************/
 /* BSP CONTROLLER BASE       */
 /*****************************/
-#define		INTC_REG_BASE		(0xE0200000)
-#define		SDC0_REG_BASE		(0xE2000000)
-#define		SDC1_REG_BASE		(0xE2100000)
-#define		TVE_REG_BASE		(0xE8000000)
-#define		VOU_REG_BASE		(0xE8100000)
-#define		AES_REG_BASE		(0xE8200000)
+#define     INTC_REG_BASE       (0xE0200000)
+#define     SDC0_REG_BASE       (0xE2000000)
+#define     SDC1_REG_BASE       (0xE2100000)
+#define     TVE_REG_BASE        (0xE8000000)
+#define     VOU_REG_BASE        (0xE8100000)
+#define     AES_REG_BASE        (0xE8200000)
 /*
-#define		JPEG_REG_BASE		(0xE8300000)
-#define		ISPB_REG_BASE		(0xEA000000)
-#define		ISPF_REG_BASE		(0xEA100000)
-#define		VPU_REG_BASE		(0xEC000000)
-#define		VCU_REG_BASE		(0xEC100000)
-#define		DDRC_REG_BASE		(0xED000000)
+#define     JPEG_REG_BASE       (0xE8300000)
+#define     ISPB_REG_BASE       (0xEA000000)
+#define     ISPF_REG_BASE       (0xEA100000)
+#define     VPU_REG_BASE        (0xEC000000)
+#define     VCU_REG_BASE        (0xEC100000)
+#define     DDRC_REG_BASE       (0xED000000)
 */
-#define 	DMAC_REG_BASE		(0xEE000000)
-#define 	GMAC_REG_BASE		(0xEF000000)
-#define 	PMU_REG_BASE		(0xF0000000)
-#define 	I2C0_REG_BASE		(0xF0200000)
-#define 	GPIO0_REG_BASE		(0xF0300000)
+#define     DMAC_REG_BASE       (0xEE000000)
+#define     GMAC_REG_BASE       (0xEF000000)
+#define     PMU_REG_BASE        (0xF0000000)
+#define     I2C0_REG_BASE       (0xF0200000)
+#define     GPIO0_REG_BASE      (0xF0300000)
 #define     GPIO1_REG_BASE      (0xf4000000)
-#define 	PWM_REG_BASE		(0xF0400000)
-#define 	SPI0_REG_BASE		(0xF0500000)
-#define 	SPI1_REG_BASE		(0xF0600000)
-#define		UART0_REG_BASE		(0xF0700000)
-#define		UART1_REG_BASE		(0xF0800000)
-/*#define		I2S_REG_BASE		(0xF0900000)*/
-#define		ACODEC_REG_BASE		(0xF0A00000)
-#define		I2C1_REG_BASE		(0xF0B00000)
-#define		TMR_REG_BASE		(0xF0C00000)
-#define		WDT_REG_BASE		(0xF0D00000)
+#define     PWM_REG_BASE        (0xF0400000)
+#define     SPI0_REG_BASE       (0xF0500000)
+#define     SPI1_REG_BASE       (0xF0600000)
+#define     UART0_REG_BASE      (0xF0700000)
+#define     UART1_REG_BASE      (0xF0800000)
+/*#define       I2S_REG_BASE        (0xF0900000)*/
+#define     ACODEC_REG_BASE     (0xF0A00000)
+#define     I2C1_REG_BASE       (0xF0B00000)
+#define     TMR_REG_BASE        (0xF0C00000)
+#define     WDT_REG_BASE        (0xF0D00000)
 /*
-#define		DPHY_REG_BASE		(0xF1000000)
-#define		MIPIC_REG_BASE		(0xF1100000)
+#define     DPHY_REG_BASE       (0xF1000000)
+#define     MIPIC_REG_BASE      (0xF1100000)
 */
-#define		SADC_REG_BASE		(0xF1200000)
+#define     SADC_REG_BASE       (0xF1200000)
 
 typedef enum IRQn
 {
diff --git a/bsp/fh8620/platform/plat-v2/clock.c b/bsp/fh8620/platform/plat-v2/clock.c
index 1c82348c7f..335b4c3ce9 100644
--- a/bsp/fh8620/platform/plat-v2/clock.c
+++ b/bsp/fh8620/platform/plat-v2/clock.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include "clock.h"
 #include 
 #include "fh_arch.h"
@@ -40,8 +40,8 @@
 
 //#define FH_DBG_CLK
 
-#define FH_CLK_DIV_DEFAULT_VALUE			0x55aaaa55
-#define FH_CLK_GATE_DEFAULT_VALUE			0xaa5555aa
+#define FH_CLK_DIV_DEFAULT_VALUE            0x55aaaa55
+#define FH_CLK_GATE_DEFAULT_VALUE           0xaa5555aa
 
 #define CONFIG_PAE_PTS_CLOCK   (1000000)
 #define TICKS_PER_USEC         (CONFIG_PAE_PTS_CLOCK / 1000000)
@@ -50,15 +50,15 @@
 
 
 #define fh_clk_err(p,fmt,args...)\
-		rt_kprintf("clk_err: %s->\t"fmt,p->name, ##args)
+        rt_kprintf("clk_err: %s->\t"fmt,p->name, ##args)
 
 #ifdef FH_CLK_DEBUG
 #define fh_clk_debug(p,fmt,args...)\
-		rt_kprintf("%s:\t\t"fmt,p->name, ##args)
+        rt_kprintf("%s:\t\t"fmt,p->name, ##args)
 
 
 #define fh_clk_debug_no_handle(fmt,args...)\
-		rt_kprintf(fmt, ##args)
+        rt_kprintf(fmt, ##args)
 #else
 //#define fh_clk_err(p,fmt,args...)
 #define fh_clk_debug(p,fmt,args...)
@@ -77,48 +77,48 @@ static struct fh_clk_tree fh_clk_tree;
 
 
 
-#define FH_TIMER_WRITEL(offset,value)		__raw_writel(value,(fh_clk_tree.c_base_addr + offset))
-#define FH_TIMER_READL(offset)				__raw_readl((fh_clk_tree.c_base_addr + offset))
+#define FH_TIMER_WRITEL(offset,value)       __raw_writel(value,(fh_clk_tree.c_base_addr + offset))
+#define FH_TIMER_READL(offset)              __raw_readl((fh_clk_tree.c_base_addr + offset))
 
 
 
 
 
 enum clk_gate_enum{
-#define CLK_GATE			(1)
-#define CLK_UNGATE			(0)
-	ISP_ACLK_GATE = (1<<0),
-	HCLK_GATE = (1<<1),
-	CPU_FCLK0_GATE = (1<<3),
-	VCU_CLK_GATE = (1<<4),
-	VOU_CLK_GATE = (1<<5),
-	MCLK_GATE = (1<<6),
-	SPI0_CLK_GATE = (1<<7),
-	SPI1_CLK_GATE = (1<<8),
-	SDC0_CLK_GATE = (1<<9),
-	SDC1_CLK_GATE = (1<<10),
-	AC_MCLK_GATE = (1<<11),  /////
-	I2C0_CLK_GATE = (1<<12),
-	UART0_CLK_GATE = (1<<13),
-	UART1_CLK_GATE = (1<<14),
-	//can't change
-	WDT_CLK_GATE = (1<<15),
+#define CLK_GATE            (1)
+#define CLK_UNGATE          (0)
+    ISP_ACLK_GATE = (1<<0),
+    HCLK_GATE = (1<<1),
+    CPU_FCLK0_GATE = (1<<3),
+    VCU_CLK_GATE = (1<<4),
+    VOU_CLK_GATE = (1<<5),
+    MCLK_GATE = (1<<6),
+    SPI0_CLK_GATE = (1<<7),
+    SPI1_CLK_GATE = (1<<8),
+    SDC0_CLK_GATE = (1<<9),
+    SDC1_CLK_GATE = (1<<10),
+    AC_MCLK_GATE = (1<<11),  /////
+    I2C0_CLK_GATE = (1<<12),
+    UART0_CLK_GATE = (1<<13),
+    UART1_CLK_GATE = (1<<14),
+    //can't change
+    WDT_CLK_GATE = (1<<15),
 
-	PWM_CLK_GATE = (1<<16),
-	TMR0_CLK_GATE = (1<<17),
-	TMR1_CLK_GATE = (1<<18),
-	PTS_CLK_GATE = (1<<19),
-	MIPI_DPHY_CLK20M_GATE = (1<<20),
-	MIPI_P32_CLK_GATE = (1<<21),
-	PIX_CLK_GATE = (1<<22),			////
-	CIS_CLK_OUT_GATE = (1<<23),
-	I2S_SCLK_GATE = (1<<24),		//////
-	ETH_REF_CLK_GATE = (1<<25),
-	SADC_CLK_GATE = (1<<26),
-	I2C1_CLK_GATE = (1<<27),
-	ETH_RX_CLK_GATE = (1<<28), /////
-	ETH_TX_CLK_GATE = (1<<29), /////
-	ETH_RMII_CLK_GATE = (1<<30),////
+    PWM_CLK_GATE = (1<<16),
+    TMR0_CLK_GATE = (1<<17),
+    TMR1_CLK_GATE = (1<<18),
+    PTS_CLK_GATE = (1<<19),
+    MIPI_DPHY_CLK20M_GATE = (1<<20),
+    MIPI_P32_CLK_GATE = (1<<21),
+    PIX_CLK_GATE = (1<<22),         ////
+    CIS_CLK_OUT_GATE = (1<<23),
+    I2S_SCLK_GATE = (1<<24),        //////
+    ETH_REF_CLK_GATE = (1<<25),
+    SADC_CLK_GATE = (1<<26),
+    I2C1_CLK_GATE = (1<<27),
+    ETH_RX_CLK_GATE = (1<<28), /////
+    ETH_TX_CLK_GATE = (1<<29), /////
+    ETH_RMII_CLK_GATE = (1<<30),////
 
 
 };
@@ -130,96 +130,96 @@ enum clk_gate_enum{
 typedef void (*clk_update)(struct fh_clk* p_clk);
 
 //update func...
-void 	clk_in_update(struct fh_clk* p_clk);
-void 	pll1_clk_update(struct fh_clk* p_clk);
-void	pll0_clk_update(struct fh_clk* p_clk);
+void    clk_in_update(struct fh_clk* p_clk);
+void    pll1_clk_update(struct fh_clk* p_clk);
+void    pll0_clk_update(struct fh_clk* p_clk);
 void    cis_pclk_update(struct fh_clk* p_clk);
-void	ddr_clk_update(struct fh_clk* p_clk);
-void	ddr_clk_update(struct fh_clk* p_clk);
-void	fclk_update(struct fh_clk* p_clk);
-void	aclk_update(struct fh_clk* p_clk);
-void	hclk_update(struct fh_clk* p_clk);
-void	pclk_update(struct fh_clk* p_clk);
-void	isp_aclk_update(struct fh_clk* p_clk);
-void	vcu_clk_update(struct fh_clk* p_clk);
-void	vou_clk_update(struct fh_clk* p_clk);
-void	mipi_p32_clk_update(struct fh_clk* p_clk);
-void	cis_clk_out_update(struct fh_clk* p_clk);
-void	pts_update(struct fh_clk* p_clk);
-void 	mipi_pix_clk_update(struct fh_clk* p_clk);
-void	spi0_clk_update(struct fh_clk* p_clk);
-void	spi1_clk_update(struct fh_clk* p_clk);
-void	mipi_dphy_clk20m_update(struct fh_clk* p_clk);
-void	i2c0_clk_update(struct fh_clk* p_clk);
-void	i2c1_clk_update(struct fh_clk* p_clk);
-void	uart0_clk_update(struct fh_clk* p_clk);
-void	uart1_clk_update(struct fh_clk* p_clk);
-void	pwm_clk_update(struct fh_clk* p_clk);
-void	time0_clk_update(struct fh_clk* p_clk);
-void	time1_clk_update(struct fh_clk* p_clk);
-void	sadc_clk_update(struct fh_clk* p_clk);
-void	sdc0_clk2x_update(struct fh_clk* p_clk);
-void	sdc0_clk_update(struct fh_clk* p_clk);
-void	sdc0_clk_out_update(struct fh_clk* p_clk);
-void	sdc0_clk_sample_update(struct fh_clk* p_clk);
-void	sdc0_clk_drv_update(struct fh_clk* p_clk);
-void	sdc1_clk2x_update(struct fh_clk* p_clk);
-void	sdc1_clk_update(struct fh_clk* p_clk);
-void	sdc1_clk_out_update(struct fh_clk* p_clkt);
-void	sdc1_clk_sample_update(struct fh_clk* p_clk);
-void	sdc1_clk_drv_update(struct fh_clk* p_clk);
-void 	eth_ref_clk_update(struct fh_clk* p_clk);
-void	wdt_clk_update(struct fh_clk* p_clk);
+void    ddr_clk_update(struct fh_clk* p_clk);
+void    ddr_clk_update(struct fh_clk* p_clk);
+void    fclk_update(struct fh_clk* p_clk);
+void    aclk_update(struct fh_clk* p_clk);
+void    hclk_update(struct fh_clk* p_clk);
+void    pclk_update(struct fh_clk* p_clk);
+void    isp_aclk_update(struct fh_clk* p_clk);
+void    vcu_clk_update(struct fh_clk* p_clk);
+void    vou_clk_update(struct fh_clk* p_clk);
+void    mipi_p32_clk_update(struct fh_clk* p_clk);
+void    cis_clk_out_update(struct fh_clk* p_clk);
+void    pts_update(struct fh_clk* p_clk);
+void    mipi_pix_clk_update(struct fh_clk* p_clk);
+void    spi0_clk_update(struct fh_clk* p_clk);
+void    spi1_clk_update(struct fh_clk* p_clk);
+void    mipi_dphy_clk20m_update(struct fh_clk* p_clk);
+void    i2c0_clk_update(struct fh_clk* p_clk);
+void    i2c1_clk_update(struct fh_clk* p_clk);
+void    uart0_clk_update(struct fh_clk* p_clk);
+void    uart1_clk_update(struct fh_clk* p_clk);
+void    pwm_clk_update(struct fh_clk* p_clk);
+void    time0_clk_update(struct fh_clk* p_clk);
+void    time1_clk_update(struct fh_clk* p_clk);
+void    sadc_clk_update(struct fh_clk* p_clk);
+void    sdc0_clk2x_update(struct fh_clk* p_clk);
+void    sdc0_clk_update(struct fh_clk* p_clk);
+void    sdc0_clk_out_update(struct fh_clk* p_clk);
+void    sdc0_clk_sample_update(struct fh_clk* p_clk);
+void    sdc0_clk_drv_update(struct fh_clk* p_clk);
+void    sdc1_clk2x_update(struct fh_clk* p_clk);
+void    sdc1_clk_update(struct fh_clk* p_clk);
+void    sdc1_clk_out_update(struct fh_clk* p_clkt);
+void    sdc1_clk_sample_update(struct fh_clk* p_clk);
+void    sdc1_clk_drv_update(struct fh_clk* p_clk);
+void    eth_ref_clk_update(struct fh_clk* p_clk);
+void    wdt_clk_update(struct fh_clk* p_clk);
 
 rt_int32_t check_pix_clk_source(rt_uint32_t offset,rt_uint32_t mask,rt_uint32_t *value);
-void	 pix_update(struct fh_clk* p_clk);
+void     pix_update(struct fh_clk* p_clk);
 
 struct fh_clk_div{
 //some has prediv....
 //this two could have or......
-#define PRE_DIV_CAL_ALREADY		(0x80000000)
-#define PRE_DIV_ENABLE		(0x01)
-#define DIV_ENABLE			(0x10)
-	rt_uint32_t div_flag;
+#define PRE_DIV_CAL_ALREADY     (0x80000000)
+#define PRE_DIV_ENABLE      (0x01)
+#define DIV_ENABLE          (0x10)
+    rt_uint32_t div_flag;
 
-	rt_uint32_t pdiv_value;
+    rt_uint32_t pdiv_value;
 
-	//rt_uint32_t hw_div_value;
-	rt_uint32_t sw_div_value;
-	rt_uint32_t sw_div_multi;
-	//rt_uint32_t clk_in_hz;
-	rt_uint32_t reg_offset;
-	rt_uint32_t reg_mask;
-	//rt_uint32_t rate;
+    //rt_uint32_t hw_div_value;
+    rt_uint32_t sw_div_value;
+    rt_uint32_t sw_div_multi;
+    //rt_uint32_t clk_in_hz;
+    rt_uint32_t reg_offset;
+    rt_uint32_t reg_mask;
+    //rt_uint32_t rate;
 };
 
 struct fh_clk_mux{
-//#define MUX_LEVEL_1		(1)
-//#define MUX_LEVEL_2		(2)
-//#define MAX_MUX_LEVEL	MUX_LEVEL_2
-//	rt_uint32_t lev;
-#define HAS_MUX				(0)
-#define HAS_NO_MUX			(1)
-	rt_uint32_t mux_flag;
-	rt_uint32_t hw_mux_value;
-	rt_uint32_t sw_mux_value;
-	rt_uint32_t reg_offset;
-	rt_uint32_t reg_mask;
+//#define MUX_LEVEL_1       (1)
+//#define MUX_LEVEL_2       (2)
+//#define MAX_MUX_LEVEL MUX_LEVEL_2
+//  rt_uint32_t lev;
+#define HAS_MUX             (0)
+#define HAS_NO_MUX          (1)
+    rt_uint32_t mux_flag;
+    rt_uint32_t hw_mux_value;
+    rt_uint32_t sw_mux_value;
+    rt_uint32_t reg_offset;
+    rt_uint32_t reg_mask;
 };
 
 struct fh_clk_gate{
 
-#define HAS_GATE			(0)
-#define HAS_NO_GATE			(1)
-	rt_uint32_t gate_flag;
-#define CLK_UNGATE			(0)
-#define CLK_GATE			(1)
-	//rt_uint32_t	hw_status;
-	rt_uint32_t	sw_status;
-	//rt_uint32_t value;
+#define HAS_GATE            (0)
+#define HAS_NO_GATE         (1)
+    rt_uint32_t gate_flag;
+#define CLK_UNGATE          (0)
+#define CLK_GATE            (1)
+    //rt_uint32_t   hw_status;
+    rt_uint32_t sw_status;
+    //rt_uint32_t value;
 
-	rt_uint32_t reg_offset;
-	rt_uint32_t reg_mask;
+    rt_uint32_t reg_offset;
+    rt_uint32_t reg_mask;
 
 };
 
@@ -234,7 +234,7 @@ struct fh_clk_gate{
  *
  ***************/
 struct fh_clk_level_1{
-	rt_uint32_t clk_in_out;
+    rt_uint32_t clk_in_out;
 };
 
 
@@ -244,7 +244,7 @@ struct fh_clk_level_1{
  *
  ***************/
 struct fh_clk_level_2{
-	rt_uint32_t clk_in_out;
+    rt_uint32_t clk_in_out;
 };
 
 /***************
@@ -253,19 +253,19 @@ struct fh_clk_level_2{
  *
  ***************/
 struct fh_clk_level_3_ddr{
-	//rt_uint32_t mux_level;
+    //rt_uint32_t mux_level;
 
-	struct fh_clk_mux mux[2];
-	struct fh_clk_gate gate;
-	struct fh_clk_div div;
+    struct fh_clk_mux mux[2];
+    struct fh_clk_gate gate;
+    struct fh_clk_div div;
 };
 
 struct fh_clk_level_3_sdc{
-#define DIFF_REFERENCE				(0x80000000)
+#define DIFF_REFERENCE              (0x80000000)
 
-	rt_uint32_t phase_diff;
-	rt_uint32_t reg_offset;
-	rt_uint32_t reg_mask;
+    rt_uint32_t phase_diff;
+    rt_uint32_t reg_offset;
+    rt_uint32_t reg_mask;
 
 };
 
@@ -274,26 +274,26 @@ struct fh_clk_level_3_gmac{
 };
 
 struct fh_clk_level_3_normal{
-	struct fh_clk_mux mux;
-	struct fh_clk_gate gate;
-	struct fh_clk_div div;
+    struct fh_clk_mux mux;
+    struct fh_clk_gate gate;
+    struct fh_clk_div div;
 };
 
 
 struct fh_clk_level_3 {
 
-#define LEVEL_PERI_NORMAL		(0x301)
-#define LEVEL_PERI_DDR			(0x302)
-#define LEVEL_PERI_SDC			(0x303)
-#define LEVEL_PERI_GMAC			(0x304)
-	rt_uint32_t peri_flag;
-	union
-	{
-		struct fh_clk_level_3_ddr ddr;
-		struct fh_clk_level_3_sdc sdc;
-		struct fh_clk_level_3_gmac gmac;
-		struct fh_clk_level_3_normal normal;
-	}obj;
+#define LEVEL_PERI_NORMAL       (0x301)
+#define LEVEL_PERI_DDR          (0x302)
+#define LEVEL_PERI_SDC          (0x303)
+#define LEVEL_PERI_GMAC         (0x304)
+    rt_uint32_t peri_flag;
+    union
+    {
+        struct fh_clk_level_3_ddr ddr;
+        struct fh_clk_level_3_sdc sdc;
+        struct fh_clk_level_3_gmac gmac;
+        struct fh_clk_level_3_normal normal;
+    }obj;
 
 };
 
@@ -301,34 +301,34 @@ struct fh_clk_level_3 {
 
 
 struct fh_clk {
-	char *name;
-#define LEVEL_CRYSTAL			(0x100)
-#define LEVEL_PLL				(0x200)
-#define LEVEL_PERIPHERAL		(0x300)
-	rt_uint32_t level;
+    char *name;
+#define LEVEL_CRYSTAL           (0x100)
+#define LEVEL_PLL               (0x200)
+#define LEVEL_PERIPHERAL        (0x300)
+    rt_uint32_t level;
 
-#define ROOT_NODE			(RT_NULL)
-	struct fh_clk *parent;
+#define ROOT_NODE           (RT_NULL)
+    struct fh_clk *parent;
 
-	union
-	{
-		struct fh_clk_level_1 crystal;
-		struct fh_clk_level_2 pll;
-		struct fh_clk_level_3 peri;
-	}clk;
+    union
+    {
+        struct fh_clk_level_1 crystal;
+        struct fh_clk_level_2 pll;
+        struct fh_clk_level_3 peri;
+    }clk;
 
-	rt_uint32_t clk_out_rate;
-#define CLK_HAS_NO_GATE				(0x80000000)
-	rt_uint32_t gate;
+    rt_uint32_t clk_out_rate;
+#define CLK_HAS_NO_GATE             (0x80000000)
+    rt_uint32_t gate;
 
-	clk_update update_func;
+    clk_update update_func;
 
-	//struct fh_clk_tree *p_tree;
+    //struct fh_clk_tree *p_tree;
 };
 
 struct fh_clk_tree{
-	rt_uint32_t c_base_addr;
-	struct fh_clk **clk_head;
+    rt_uint32_t c_base_addr;
+    struct fh_clk **clk_head;
 };
 
 
@@ -340,105 +340,105 @@ struct fh_clk_tree{
  *
  *
  ********/
-#define CRYSTAL_HZ			(24000000)
+#define CRYSTAL_HZ          (24000000)
 struct fh_clk clk_in = {
-	.name = "clk_in",
-	.level = LEVEL_CRYSTAL,
-	.parent = ROOT_NODE,
-	.clk.crystal.clk_in_out = CRYSTAL_HZ,
-	//.clk_out_rate = clk_in.clk.crystal.clk_in_out,
-	.clk_out_rate = CRYSTAL_HZ,
-	.update_func = clk_in_update,
+    .name = "clk_in",
+    .level = LEVEL_CRYSTAL,
+    .parent = ROOT_NODE,
+    .clk.crystal.clk_in_out = CRYSTAL_HZ,
+    //.clk_out_rate = clk_in.clk.crystal.clk_in_out,
+    .clk_out_rate = CRYSTAL_HZ,
+    .update_func = clk_in_update,
 };
 
 
 
-#define CIS_PCLK_HZ			(108000000)
+#define CIS_PCLK_HZ         (108000000)
 struct fh_clk cis_pclk = {
-	.name = "cis_pclk",
-	.level = LEVEL_CRYSTAL,
-	.parent = ROOT_NODE,
-	.clk.crystal.clk_in_out = CIS_PCLK_HZ,
-	//.clk_out_rate = clk_in.clk.crystal.clk_in_out,
-	.clk_out_rate = CIS_PCLK_HZ,
-	.update_func = cis_pclk_update,
+    .name = "cis_pclk",
+    .level = LEVEL_CRYSTAL,
+    .parent = ROOT_NODE,
+    .clk.crystal.clk_in_out = CIS_PCLK_HZ,
+    //.clk_out_rate = clk_in.clk.crystal.clk_in_out,
+    .clk_out_rate = CIS_PCLK_HZ,
+    .update_func = cis_pclk_update,
 };
 
 
-#define PLL0_HZ				(864000000)
+#define PLL0_HZ             (864000000)
 struct fh_clk pll0 = {
-	.name = "pll0",
-	.level = LEVEL_PLL,
-	.parent = &clk_in,
-	.clk.crystal.clk_in_out = PLL0_HZ,
-	//.clk_out_rate = pll0.clk.crystal.clk_in_out,
-	.clk_out_rate = PLL0_HZ,
-	.update_func = pll0_clk_update,
+    .name = "pll0",
+    .level = LEVEL_PLL,
+    .parent = &clk_in,
+    .clk.crystal.clk_in_out = PLL0_HZ,
+    //.clk_out_rate = pll0.clk.crystal.clk_in_out,
+    .clk_out_rate = PLL0_HZ,
+    .update_func = pll0_clk_update,
 };
 
 
-#define PLL1_HZ				(600000000)
+#define PLL1_HZ             (600000000)
 struct fh_clk pll1 = {
-	.name = "pll1",
-	.level = LEVEL_PLL,
-	.parent = &clk_in,
-	.clk.crystal.clk_in_out = PLL1_HZ,
-	.clk_out_rate  = PLL1_HZ,
-	.update_func = pll1_clk_update,
+    .name = "pll1",
+    .level = LEVEL_PLL,
+    .parent = &clk_in,
+    .clk.crystal.clk_in_out = PLL1_HZ,
+    .clk_out_rate  = PLL1_HZ,
+    .update_func = pll1_clk_update,
 
 };
 
 
 //NEED_CAUTION   parent not fix...
 static struct fh_clk ddr_clk_normal = {
-	.name = "ddr_normal",
-	.level = LEVEL_PERIPHERAL,
-	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_DDR,
-	//0:xtal_clk
-	//1:pll0_clk
-#define MUX0_XTAL_CLK				(0)
-#define MUX0_PLL0_CLK				(1)
+    .name = "ddr_normal",
+    .level = LEVEL_PERIPHERAL,
+    //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_DDR,
+    //0:xtal_clk
+    //1:pll0_clk
+#define MUX0_XTAL_CLK               (0)
+#define MUX0_PLL0_CLK               (1)
 
-	.clk.peri.obj.ddr.mux[0].reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.ddr.mux[0].reg_mask = 1<<0,
+    .clk.peri.obj.ddr.mux[0].reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.ddr.mux[0].reg_mask = 1<<0,
 
-	//0:pll0 clk  default 864/2M
-	//1:pll1 clk  default 600M
-#define MUX1_PLL0_CLK				(0)
-#define MUX1_PLL1_CLK				(1)
-	.clk.peri.obj.ddr.mux[1].reg_offset = REG_PMU_CLK_SEL,
-	.clk.peri.obj.ddr.mux[1].reg_mask = 1<<24,
+    //0:pll0 clk  default 864/2M
+    //1:pll1 clk  default 600M
+#define MUX1_PLL0_CLK               (0)
+#define MUX1_PLL1_CLK               (1)
+    .clk.peri.obj.ddr.mux[1].reg_offset = REG_PMU_CLK_SEL,
+    .clk.peri.obj.ddr.mux[1].reg_mask = 1<<24,
 
-	//gate
-	//.clk.peri.obj.ddr.gate.enable_status = CLK_ENABLE,
+    //gate
+    //.clk.peri.obj.ddr.gate.enable_status = CLK_ENABLE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.ddr.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.ddr.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.ddr.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.ddr.gate.sw_status = CLK_UNGATE,
 #endif
-	.clk.peri.obj.ddr.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.ddr.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.ddr.gate.reg_mask = MCLK_GATE,
+    .clk.peri.obj.ddr.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.ddr.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.ddr.gate.reg_mask = MCLK_GATE,
 
 
 
-	//div
-	//clk in maybe cry or pll
-	.clk.peri.obj.ddr.div.div_flag = DIV_ENABLE,
-	//.clk.peri.obj.ddr.div.pdiv_value = 2,
+    //div
+    //clk in maybe cry or pll
+    .clk.peri.obj.ddr.div.div_flag = DIV_ENABLE,
+    //.clk.peri.obj.ddr.div.pdiv_value = 2,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.ddr.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.ddr.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.ddr.div.sw_div_value = 1,
+    .clk.peri.obj.ddr.div.sw_div_value = 1,
 #endif
-	.clk.peri.obj.ddr.div.sw_div_multi =1,
-	.clk.peri.obj.ddr.div.reg_offset = REG_PMU_CLK_DIV1,
-	.clk.peri.obj.ddr.div.reg_mask = 0xff <<0,
+    .clk.peri.obj.ddr.div.sw_div_multi =1,
+    .clk.peri.obj.ddr.div.reg_offset = REG_PMU_CLK_DIV1,
+    .clk.peri.obj.ddr.div.reg_mask = 0xff <<0,
 
-	.update_func = ddr_clk_update,
+    .update_func = ddr_clk_update,
 };
 
 
@@ -450,121 +450,121 @@ static struct fh_clk ddr_clk_normal = {
 
 //NEED_CAUTION   parent not fix...
 static struct fh_clk ddr_clk_div2 = {
-	.name = "ddr_div2",
-	.level = LEVEL_PERIPHERAL,
-	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_DDR,
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.ddr.mux[0].reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.ddr.mux[0].reg_mask = 1<<0,
+    .name = "ddr_div2",
+    .level = LEVEL_PERIPHERAL,
+    //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_DDR,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.ddr.mux[0].reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.ddr.mux[0].reg_mask = 1<<0,
 
-	//0:pll0 clk  default 864/2M
-	//1:pll1 clk  default 600M
-	.clk.peri.obj.ddr.mux[1].reg_offset = REG_PMU_CLK_SEL,
-	.clk.peri.obj.ddr.mux[1].reg_mask = 1<<24,
+    //0:pll0 clk  default 864/2M
+    //1:pll1 clk  default 600M
+    .clk.peri.obj.ddr.mux[1].reg_offset = REG_PMU_CLK_SEL,
+    .clk.peri.obj.ddr.mux[1].reg_mask = 1<<24,
 
-	//gate
-	//.clk.peri.obj.ddr.gate.enable_status = CLK_ENABLE,
+    //gate
+    //.clk.peri.obj.ddr.gate.enable_status = CLK_ENABLE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.ddr.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.ddr.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.ddr.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.ddr.gate.sw_status = CLK_UNGATE,
 #endif
-	.clk.peri.obj.ddr.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.ddr.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.ddr.gate.reg_mask = MCLK_GATE,
+    .clk.peri.obj.ddr.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.ddr.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.ddr.gate.reg_mask = MCLK_GATE,
 
-	//div
-	//clk in maybe cry or pll
-	.clk.peri.obj.ddr.div.div_flag = PRE_DIV_ENABLE | DIV_ENABLE,
-	.clk.peri.obj.ddr.div.pdiv_value = 2,
+    //div
+    //clk in maybe cry or pll
+    .clk.peri.obj.ddr.div.div_flag = PRE_DIV_ENABLE | DIV_ENABLE,
+    .clk.peri.obj.ddr.div.pdiv_value = 2,
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.ddr.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.ddr.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.ddr.div.sw_div_value = 1,
+    .clk.peri.obj.ddr.div.sw_div_value = 1,
 #endif
-	.clk.peri.obj.ddr.div.sw_div_multi =1,
-	.clk.peri.obj.ddr.div.reg_offset = REG_PMU_CLK_DIV1,
-	.clk.peri.obj.ddr.div.reg_mask = 0xff <<0,
+    .clk.peri.obj.ddr.div.sw_div_multi =1,
+    .clk.peri.obj.ddr.div.reg_offset = REG_PMU_CLK_DIV1,
+    .clk.peri.obj.ddr.div.reg_mask = 0xff <<0,
 
 
-	.update_func = ddr_clk_update,
+    .update_func = ddr_clk_update,
 };
 
 
 
 static struct fh_clk cpu_fclk = {
-	.name = "cpu_fclk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "cpu_fclk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.normal.mux.reg_mask = 1<<0,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.normal.mux.reg_mask = 1<<0,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE,
-	//.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	//.clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE,
+    //.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    //.clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE,
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 0,
+    .clk.peri.obj.normal.div.sw_div_value = 0,
 #endif
 
-	.clk.peri.obj.normal.div.sw_div_multi =1,
-	.clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0,
-	.clk.peri.obj.normal.div.reg_mask = 0xff << 0,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
+    .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0,
+    .clk.peri.obj.normal.div.reg_mask = 0xff << 0,
 
-	.update_func = fclk_update,
+    .update_func = fclk_update,
 
 };
 
 
 //NEED_CAUTION   parent not fix...
 static struct fh_clk cpu_aclk = {
-	.name = "cpu_aclk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "cpu_aclk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
-//	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
-//	.clk.peri.obj.normal.mux.reg_mask = 1<<0,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+//  .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
+//  .clk.peri.obj.normal.mux.reg_mask = 1<<0,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE,
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.pdiv_value = 2,
-//	.clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0,
-//	.clk.peri.obj.normal.div.reg_mask = 0xff << 0,
+    //div
+    .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.pdiv_value = 2,
+//  .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0,
+//  .clk.peri.obj.normal.div.reg_mask = 0xff << 0,
 
-	.update_func = aclk_update,
+    .update_func = aclk_update,
 
 };
 
@@ -572,282 +572,282 @@ static struct fh_clk cpu_aclk = {
 
 
 static struct fh_clk cpu_hclk = {
-	.name = "cpu_hclk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "cpu_hclk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.normal.mux.reg_mask = 1<<0,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.normal.mux.reg_mask = 1<<0,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE,
-	//.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	//.clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE,
+    //.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    //.clk.peri.obj.normal.gate.reg_mask = CPU_FCLK0_GATE,
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 1,
+    .clk.peri.obj.normal.div.sw_div_value = 1,
 #endif
-	.clk.peri.obj.normal.div.sw_div_multi =1,
-	.clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0,
-	.clk.peri.obj.normal.div.reg_mask = 0xff << 16,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
+    .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0,
+    .clk.peri.obj.normal.div.reg_mask = 0xff << 16,
 
-	.update_func = hclk_update,
+    .update_func = hclk_update,
 };
 //NEED_CAUTION   parent not fix...
 
 static struct fh_clk cpu_pclk = {
-	.name = "cpu_pclk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "cpu_pclk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = HCLK_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = HCLK_GATE,
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.pdiv_value = 2,
-//	.clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0,
-//	.clk.peri.obj.normal.div.reg_mask = 0xff << 0,
+    //div
+    .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.pdiv_value = 2,
+//  .clk.peri.obj.normal.div.reg_offset =REG_PMU_CLK_DIV0,
+//  .clk.peri.obj.normal.div.reg_mask = 0xff << 0,
 
-	.update_func = pclk_update,
+    .update_func = pclk_update,
 
 };
 
 
 //NEED_CAUTION   parent not fix...
 static struct fh_clk isp_aclk = {
-	.name = "isp_aclk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "isp_aclk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.normal.mux.reg_mask = 1<<0,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.normal.mux.reg_mask = 1<<0,
 
-	//gate
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = ISP_ACLK_GATE,
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = ISP_ACLK_GATE,
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV0,
-	.clk.peri.obj.normal.div.reg_mask = 0x03 << 8,
-	.clk.peri.obj.normal.div.sw_div_multi =1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV0,
+    .clk.peri.obj.normal.div.reg_mask = 0x03 << 8,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
 
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 1,
+    .clk.peri.obj.normal.div.sw_div_value = 1,
 #endif
 
-	.update_func = isp_aclk_update,
+    .update_func = isp_aclk_update,
 
 };
 
 //
 ////NEED_CAUTION   parent not fix...
 static struct fh_clk vcu_clk = {
-	.name = "vcu_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "vcu_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.normal.mux.reg_mask = 1<<0,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.normal.mux.reg_mask = 1<<0,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = VCU_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = VCU_CLK_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV0,
-	.clk.peri.obj.normal.div.reg_mask = 0x03 << 24,
-	.clk.peri.obj.normal.div.sw_div_multi =1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV0,
+    .clk.peri.obj.normal.div.reg_mask = 0x03 << 24,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
 
 
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 1,
+    .clk.peri.obj.normal.div.sw_div_value = 1,
 #endif
 
 
-	.update_func = vcu_clk_update,
+    .update_func = vcu_clk_update,
 
 };
 
 static struct fh_clk vou_clk = {
-	.name = "vou_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "vou_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.normal.mux.reg_mask = 1<<0,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.normal.mux.reg_mask = 1<<0,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = VOU_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = VOU_CLK_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV1,
-	.clk.peri.obj.normal.div.reg_mask = 0x3f << 8,
-	.clk.peri.obj.normal.div.sw_div_multi =1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV1,
+    .clk.peri.obj.normal.div.reg_mask = 0x3f << 8,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
 
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 1,
+    .clk.peri.obj.normal.div.sw_div_value = 1,
 #endif
 
-	.update_func = vou_clk_update,
+    .update_func = vou_clk_update,
 };
 
 
 
 static struct fh_clk mipi_p32_clk = {
-	.name = "mipi_p32_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "mipi_p32_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.normal.mux.reg_mask = 1<<0,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.normal.mux.reg_mask = 1<<0,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = MIPI_P32_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = MIPI_P32_CLK_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2,
-	.clk.peri.obj.normal.div.reg_mask = 0x0f << 16,
-	.clk.peri.obj.normal.div.sw_div_multi =1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2,
+    .clk.peri.obj.normal.div.reg_mask = 0x0f << 16,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
 
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 1,
+    .clk.peri.obj.normal.div.sw_div_value = 1,
 #endif
 
 
-	.update_func = mipi_p32_clk_update,
+    .update_func = mipi_p32_clk_update,
 
 };
 
 
 
 static struct fh_clk cis_clk_out = {
-	.name = "cis_clk_out",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "cis_clk_out",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.normal.mux.reg_mask = 1<<0,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.normal.mux.reg_mask = 1<<0,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = CIS_CLK_OUT_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = CIS_CLK_OUT_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV1,
-	.clk.peri.obj.normal.div.reg_mask = 0xff << 16,
-	.clk.peri.obj.normal.div.sw_div_multi =1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV1,
+    .clk.peri.obj.normal.div.reg_mask = 0xff << 16,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
 
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 3,
+    .clk.peri.obj.normal.div.sw_div_value = 3,
 #endif
 
-	.update_func = cis_clk_out_update,
+    .update_func = cis_clk_out_update,
 
 };
 
@@ -855,43 +855,43 @@ static struct fh_clk cis_clk_out = {
 
 
 static struct fh_clk pts_clk = {
-	.name = "pts_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "pts_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.normal.mux.reg_mask = 1<<0,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.normal.mux.reg_mask = 1<<0,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = PTS_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = PTS_CLK_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2,
-	.clk.peri.obj.normal.div.reg_mask = 0xff << 0,
-	.clk.peri.obj.normal.div.sw_div_multi =1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2,
+    .clk.peri.obj.normal.div.reg_mask = 0xff << 0,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 35,
+    .clk.peri.obj.normal.div.sw_div_value = 35,
 #endif
 
-	.clk.peri.obj.normal.div.pdiv_value = 12,
+    .clk.peri.obj.normal.div.pdiv_value = 12,
 
-	.update_func = pts_update,
+    .update_func = pts_update,
 
 };
 
@@ -899,31 +899,31 @@ static struct fh_clk pts_clk = {
 
 
 static struct fh_clk mipi_pix_clk = {
-	.name = "mipi_pix_clk_i",
-	.level = LEVEL_PERIPHERAL,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "mipi_pix_clk_i",
+    .level = LEVEL_PERIPHERAL,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
-	.clk.peri.obj.normal.mux.reg_mask = 1<<0,
+    //0:xtal_clk
+    //1:pll0_clk
+    .clk.peri.obj.normal.mux.reg_offset = REG_PMU_SYS_CTRL,
+    .clk.peri.obj.normal.mux.reg_mask = 1<<0,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE,
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2,
-	.clk.peri.obj.normal.div.reg_mask = 0x0f << 24,
-	.clk.peri.obj.normal.div.sw_div_multi =1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV2,
+    .clk.peri.obj.normal.div.reg_mask = 0x0f << 24,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 3,
+    .clk.peri.obj.normal.div.sw_div_value = 3,
 #endif
 
-	.update_func = mipi_pix_clk_update,
+    .update_func = mipi_pix_clk_update,
 
 
 };
@@ -931,37 +931,37 @@ static struct fh_clk mipi_pix_clk = {
 
 
 static struct fh_clk pix_clk = {
-	.name = "pix_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "pix_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	//0:xtal_clk
-	//1:pll0_clk
-#define CIS_PIX_CLK				(0)
-#define CIS_PIX_CLK_OPPOSITE	(1)
-#define MIPI_PIX_CLK			(2)
+    //0:xtal_clk
+    //1:pll0_clk
+#define CIS_PIX_CLK             (0)
+#define CIS_PIX_CLK_OPPOSITE    (1)
+#define MIPI_PIX_CLK            (2)
 
-	.clk.peri.obj.normal.mux.reg_offset = REG_PMU_CLK_SEL,
-	.clk.peri.obj.normal.mux.reg_mask = 3<<4,
+    .clk.peri.obj.normal.mux.reg_offset = REG_PMU_CLK_SEL,
+    .clk.peri.obj.normal.mux.reg_mask = 3<<4,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = PIX_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = PIX_CLK_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = 0,
+    //div
+    .clk.peri.obj.normal.div.div_flag = 0,
 
 
 
-	.update_func = pix_update,
+    .update_func = pix_update,
 
 };
 
@@ -971,41 +971,41 @@ static struct fh_clk pix_clk = {
 
 
 static struct fh_clk spi0_clk = {
-	.name = "spi0_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "spi0_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
 
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = SPI0_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = SPI0_CLK_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3,
-	.clk.peri.obj.normal.div.reg_mask = 0xff << 0,
-	.clk.peri.obj.normal.div.sw_div_multi =1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3,
+    .clk.peri.obj.normal.div.reg_mask = 0xff << 0,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
 
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 11,
+    .clk.peri.obj.normal.div.sw_div_value = 11,
 #endif
 
-	.update_func = spi0_clk_update,
+    .update_func = spi0_clk_update,
 
 };
 
@@ -1013,46 +1013,46 @@ static struct fh_clk spi0_clk = {
 
 
 static struct fh_clk spi1_clk = {
-	.name = "spi1_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "spi1_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = SPI1_CLK_GATE,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = SPI1_CLK_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3,
-	.clk.peri.obj.normal.div.reg_mask = 0xff << 16,
-	.clk.peri.obj.normal.div.sw_div_multi =1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3,
+    .clk.peri.obj.normal.div.reg_mask = 0xff << 16,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
 
 
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 11,
+    .clk.peri.obj.normal.div.sw_div_value = 11,
 #endif
 
 #ifdef RT_USING_SPI1
-	.clk.peri.obj.normal.div.sw_div_value = 11,
+    .clk.peri.obj.normal.div.sw_div_value = 11,
 #endif
 
-	.update_func = spi1_clk_update,
+    .update_func = spi1_clk_update,
 
 };
 
@@ -1060,200 +1060,200 @@ static struct fh_clk spi1_clk = {
 
 
 static struct fh_clk mipi_dphy_clk20m = {
-	.name = "mipi_dphy_clk20m",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "mipi_dphy_clk20m",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = MIPI_DPHY_CLK20M_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = MIPI_DPHY_CLK20M_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE,
-//	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3,
-//	.clk.peri.obj.normal.div.reg_mask = 0xff << 16,
-	.clk.peri.obj.normal.div.sw_div_multi =1,
-	.clk.peri.obj.normal.div.pdiv_value = 30,
-//	.clk.peri.obj.normal.div.sw_div_value = 11,
+    //div
+    .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE,
+//  .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3,
+//  .clk.peri.obj.normal.div.reg_mask = 0xff << 16,
+    .clk.peri.obj.normal.div.sw_div_multi =1,
+    .clk.peri.obj.normal.div.pdiv_value = 30,
+//  .clk.peri.obj.normal.div.sw_div_value = 11,
 
-	.update_func = mipi_dphy_clk20m_update,
+    .update_func = mipi_dphy_clk20m_update,
 };
 
 
 
 static struct fh_clk i2c0_clk = {
-	.name = "i2c0_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "i2c0_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = I2C0_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = I2C0_CLK_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4,
-	.clk.peri.obj.normal.div.reg_mask = 0x3f << 16,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4,
+    .clk.peri.obj.normal.div.reg_mask = 0x3f << 16,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 1,
+    .clk.peri.obj.normal.div.sw_div_value = 1,
 #endif
 
-	.clk.peri.obj.normal.div.pdiv_value = 20,
+    .clk.peri.obj.normal.div.pdiv_value = 20,
 
-	.update_func = i2c0_clk_update,
+    .update_func = i2c0_clk_update,
 
 };
 
 
 static struct fh_clk i2c1_clk = {
-	.name = "i2c1_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "i2c1_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = I2C1_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = I2C1_CLK_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4,
-	.clk.peri.obj.normal.div.reg_mask = 0x3f << 24,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4,
+    .clk.peri.obj.normal.div.reg_mask = 0x3f << 24,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 1,
+    .clk.peri.obj.normal.div.sw_div_value = 1,
 #endif
-	.clk.peri.obj.normal.div.pdiv_value = 20,
+    .clk.peri.obj.normal.div.pdiv_value = 20,
 
 
-	.update_func = i2c1_clk_update,
+    .update_func = i2c1_clk_update,
 };
 
 
 static struct fh_clk uart0_clk = {
-	.name = "uart0_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "uart0_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = UART0_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = UART0_CLK_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4,
-	.clk.peri.obj.normal.div.reg_mask = 0x1f << 0,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4,
+    .clk.peri.obj.normal.div.reg_mask = 0x1f << 0,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 1,
+    .clk.peri.obj.normal.div.sw_div_value = 1,
 #endif
 
 
-	.clk.peri.obj.normal.div.pdiv_value = 10,
+    .clk.peri.obj.normal.div.pdiv_value = 10,
 
 
-	.update_func = uart0_clk_update,
+    .update_func = uart0_clk_update,
 
 };
 
 static struct fh_clk uart1_clk = {
-	.name = "uart1_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "uart1_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = UART1_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = UART1_CLK_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4,
-	.clk.peri.obj.normal.div.reg_mask = 0x1f << 8,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV4,
+    .clk.peri.obj.normal.div.reg_mask = 0x1f << 8,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 1,
+    .clk.peri.obj.normal.div.sw_div_value = 1,
 #endif
 
 
 
-	.clk.peri.obj.normal.div.pdiv_value = 10,
+    .clk.peri.obj.normal.div.pdiv_value = 10,
 
-	.update_func = uart1_clk_update,
+    .update_func = uart1_clk_update,
 
 };
 
@@ -1261,131 +1261,131 @@ static struct fh_clk uart1_clk = {
 
 
 static struct fh_clk pwm_clk = {
-	.name = "pwm_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "pwm_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = PWM_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = PWM_CLK_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5,
-	.clk.peri.obj.normal.div.reg_mask = 0x3f << 0,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5,
+    .clk.peri.obj.normal.div.reg_mask = 0x3f << 0,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 29,
+    .clk.peri.obj.normal.div.sw_div_value = 29,
 #endif
 
 
 
-	.clk.peri.obj.normal.div.pdiv_value = 20,
+    .clk.peri.obj.normal.div.pdiv_value = 20,
 
-	.update_func = pwm_clk_update,
+    .update_func = pwm_clk_update,
 };
 
 
 
 static struct fh_clk time0_clk = {
-	.name = "time0_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "time0_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = TMR0_CLK_GATE,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = TMR0_CLK_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5,
-	.clk.peri.obj.normal.div.reg_mask = 0x3f << 16,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5,
+    .clk.peri.obj.normal.div.reg_mask = 0x3f << 16,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 29,
+    .clk.peri.obj.normal.div.sw_div_value = 29,
 #endif
 
 
 
-	.clk.peri.obj.normal.div.pdiv_value = 20,
+    .clk.peri.obj.normal.div.pdiv_value = 20,
 
 
-	.update_func = time0_clk_update,
+    .update_func = time0_clk_update,
 
 };
 
 
 static struct fh_clk time1_clk = {
-	.name = "time1_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
+    .name = "time1_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
 
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = TMR1_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = TMR1_CLK_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5,
-	.clk.peri.obj.normal.div.reg_mask = 0x3f << 24,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5,
+    .clk.peri.obj.normal.div.reg_mask = 0x3f << 24,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 29,
+    .clk.peri.obj.normal.div.sw_div_value = 29,
 #endif
 
 
-	.clk.peri.obj.normal.div.pdiv_value = 20,
+    .clk.peri.obj.normal.div.pdiv_value = 20,
 
-	.update_func = time1_clk_update,
+    .update_func = time1_clk_update,
 
 };
 
@@ -1393,227 +1393,227 @@ static struct fh_clk time1_clk = {
 
 
 static struct fh_clk sadc_clk = {
-	.name = "sadc_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "sadc_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = SADC_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = SADC_CLK_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
-	.clk.peri.obj.normal.div.pdiv_value = 120,
+    //div
+    .clk.peri.obj.normal.div.div_flag = PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
+    .clk.peri.obj.normal.div.pdiv_value = 120,
 
-	.update_func = sadc_clk_update,
+    .update_func = sadc_clk_update,
 
 };
 
 
 
 static struct fh_clk sdc0_clk2x = {
-	.name = "sdc0_clk2x",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "sdc0_clk2x",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
 
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = SDC0_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = SDC0_CLK_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3,
-	.clk.peri.obj.normal.div.reg_mask = 0x0f << 8,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3,
+    .clk.peri.obj.normal.div.reg_mask = 0x0f << 8,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 5,
+    .clk.peri.obj.normal.div.sw_div_value = 5,
 #endif
 
 
-	.clk.peri.obj.normal.div.pdiv_value = 2,
+    .clk.peri.obj.normal.div.pdiv_value = 2,
 
-	.update_func = sdc0_clk2x_update,
+    .update_func = sdc0_clk2x_update,
 
 };
 
 
 
 static struct fh_clk sdc0_clk = {
-	.name = "sdc0_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_SDC,
-	.clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0 | DIFF_REFERENCE,
-//	.clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
-//	.clk.peri.obj.sdc.reg_mask = 0x0,
+    .name = "sdc0_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_SDC,
+    .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0 | DIFF_REFERENCE,
+//  .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
+//  .clk.peri.obj.sdc.reg_mask = 0x0,
 
-	.update_func = sdc0_clk_update,
+    .update_func = sdc0_clk_update,
 
 };
 
 
 
 static struct fh_clk sdc0_clk_out = {
-	.name = "sdc0_clk_out",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_SDC,
-	.clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
-//	.clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
-//	.clk.peri.obj.sdc.reg_mask = 0x0,
+    .name = "sdc0_clk_out",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_SDC,
+    .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
+//  .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
+//  .clk.peri.obj.sdc.reg_mask = 0x0,
 
-	.update_func = sdc0_clk_out_update,
+    .update_func = sdc0_clk_out_update,
 };
 
 
 
 static struct fh_clk sdc0_clk_sample = {
-	.name = "sdc0_clk_sample",
-	.level = LEVEL_PERIPHERAL,
+    .name = "sdc0_clk_sample",
+    .level = LEVEL_PERIPHERAL,
 
-	.clk.peri.peri_flag = LEVEL_PERI_SDC,
-	.clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
-	.clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
-	.clk.peri.obj.sdc.reg_mask = 3<16,
+    .clk.peri.peri_flag = LEVEL_PERI_SDC,
+    .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
+    .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
+    .clk.peri.obj.sdc.reg_mask = 3<16,
 
 
-	.update_func = sdc0_clk_sample_update,
+    .update_func = sdc0_clk_sample_update,
 };
 
 static struct fh_clk sdc0_clk_drive = {
-	.name = "sdc0_clk_drive",
-	.level = LEVEL_PERIPHERAL,
+    .name = "sdc0_clk_drive",
+    .level = LEVEL_PERIPHERAL,
 
-	.clk.peri.peri_flag = LEVEL_PERI_SDC,
-	.clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
-	.clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
-	.clk.peri.obj.sdc.reg_mask = 3<20,
+    .clk.peri.peri_flag = LEVEL_PERI_SDC,
+    .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
+    .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
+    .clk.peri.obj.sdc.reg_mask = 3<20,
 
 
-	.update_func = sdc0_clk_drv_update,
+    .update_func = sdc0_clk_drv_update,
 };
 
 
 
 
 static struct fh_clk sdc1_clk2x = {
-	.name = "sdc1_clk2x",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "sdc1_clk2x",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = SDC1_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = SDC1_CLK_GATE,
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3,
-	.clk.peri.obj.normal.div.reg_mask = 0x0f << 24,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV3,
+    .clk.peri.obj.normal.div.reg_mask = 0x0f << 24,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 5,
+    .clk.peri.obj.normal.div.sw_div_value = 5,
 #endif
 
 
-	.clk.peri.obj.normal.div.pdiv_value = 2,
+    .clk.peri.obj.normal.div.pdiv_value = 2,
 
 
-	.update_func = sdc1_clk2x_update,
+    .update_func = sdc1_clk2x_update,
 };
 
 
 
 static struct fh_clk sdc1_clk = {
-	.name = "sdc1_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_SDC,
-	.clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0 | DIFF_REFERENCE,
-//	.clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
-//	.clk.peri.obj.sdc.reg_mask = 0x0,
+    .name = "sdc1_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_SDC,
+    .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0 | DIFF_REFERENCE,
+//  .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
+//  .clk.peri.obj.sdc.reg_mask = 0x0,
 
-	.update_func = sdc1_clk_update,
+    .update_func = sdc1_clk_update,
 };
 
 
 
 static struct fh_clk sdc1_clk_out = {
-	.name = "sdc1_clk_out",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_SDC,
-	.clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
-//	.clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
-//	.clk.peri.obj.sdc.reg_mask = 0x0,
+    .name = "sdc1_clk_out",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_SDC,
+    .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
+//  .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
+//  .clk.peri.obj.sdc.reg_mask = 0x0,
 
-	.update_func = sdc1_clk_out_update,
+    .update_func = sdc1_clk_out_update,
 };
 
 
 
 static struct fh_clk sdc1_clk_sample = {
-	.name = "sdc1_clk_sample",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_SDC,
-	.clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
-	.clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
-	.clk.peri.obj.sdc.reg_mask = 3<8,
+    .name = "sdc1_clk_sample",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_SDC,
+    .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
+    .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
+    .clk.peri.obj.sdc.reg_mask = 3<8,
 
-	.update_func = sdc1_clk_sample_update,
+    .update_func = sdc1_clk_sample_update,
 };
 
 static struct fh_clk sdc1_clk_drive = {
-	.name = "sdc1_clk_drive",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_SDC,
-	.clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
-	.clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
-	.clk.peri.obj.sdc.reg_mask = 3<12,
+    .name = "sdc1_clk_drive",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_SDC,
+    .clk.peri.obj.sdc.phase_diff = DIFF_SDC_REFCLK_0,
+    .clk.peri.obj.sdc.reg_offset = REG_PMU_CLK_SEL,
+    .clk.peri.obj.sdc.reg_mask = 3<12,
 
-	.update_func = sdc1_clk_drv_update,
+    .update_func = sdc1_clk_drv_update,
 };
 
 
@@ -1621,826 +1621,826 @@ static struct fh_clk sdc1_clk_drive = {
 
 
 static struct fh_clk eth_ref_clk = {
-	.name = "eth_ref_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .name = "eth_ref_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
 
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
-	.clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
-	.clk.peri.obj.normal.gate.reg_mask = ETH_REF_CLK_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_GATE,
+    .clk.peri.obj.normal.gate.reg_offset = REG_PMU_CLK_GATE,
+    .clk.peri.obj.normal.gate.reg_mask = ETH_REF_CLK_GATE,
 
 
 #ifdef FH_CLK_GATE_DEFAULT
-	.clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
+    .clk.peri.obj.normal.gate.sw_status = FH_CLK_GATE_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
+    .clk.peri.obj.normal.gate.sw_status = CLK_UNGATE,
 #endif
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV6,
-	.clk.peri.obj.normal.div.reg_mask = 0x0f << 24,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE | PRE_DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV6,
+    .clk.peri.obj.normal.div.reg_mask = 0x0f << 24,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 5,
+    .clk.peri.obj.normal.div.sw_div_value = 5,
 #endif
 
 
 
 
-	.clk.peri.obj.normal.div.pdiv_value = 2,
+    .clk.peri.obj.normal.div.pdiv_value = 2,
 
 
-	.update_func = eth_ref_clk_update,
+    .update_func = eth_ref_clk_update,
 };
 
 
 
 
 static struct fh_clk wdt_clk = {
-	.name = "wdt_clk",
-	.level = LEVEL_PERIPHERAL,
-//	//.parent = &clk_in,
-	.clk.peri.peri_flag = LEVEL_PERI_NORMAL,
-	.clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
+    .name = "wdt_clk",
+    .level = LEVEL_PERIPHERAL,
+//  //.parent = &clk_in,
+    .clk.peri.peri_flag = LEVEL_PERI_NORMAL,
+    .clk.peri.obj.normal.mux.mux_flag = HAS_NO_MUX,
 
-	//gate
-	.clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE,
+    //gate
+    .clk.peri.obj.normal.gate.gate_flag = HAS_NO_GATE,
 
 
-	//div
-	.clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
-	.clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5,
-	.clk.peri.obj.normal.div.reg_mask = 0x3f << 8,
-	.clk.peri.obj.normal.div.sw_div_multi = 1,
+    //div
+    .clk.peri.obj.normal.div.div_flag = DIV_ENABLE,
+    .clk.peri.obj.normal.div.reg_offset = REG_PMU_CLK_DIV5,
+    .clk.peri.obj.normal.div.reg_mask = 0x3f << 8,
+    .clk.peri.obj.normal.div.sw_div_multi = 1,
 
 
 
 #ifdef FH_CLK_DIV_DEFAULT
-	.clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
+    .clk.peri.obj.normal.div.sw_div_value = FH_CLK_DIV_DEFAULT_VALUE,
 #else
-	.clk.peri.obj.normal.div.sw_div_value = 29,
+    .clk.peri.obj.normal.div.sw_div_value = 29,
 #endif
 
 
-	.update_func = wdt_clk_update,
+    .update_func = wdt_clk_update,
 };
 
 
 
 struct fh_clk *fh_clk_array[] = {
-		&clk_in,
-		&cis_pclk,
-		&pll0,
-		&pll1,
-		&ddr_clk_normal,
-		&ddr_clk_div2,
-		&cpu_fclk,
-		&cpu_aclk,
-		&cpu_hclk,
-		&cpu_pclk,
-		&isp_aclk,
-		&vcu_clk,
-		&vou_clk,
-		&mipi_p32_clk,
-		&cis_clk_out,
-		&pts_clk,
-		&mipi_pix_clk,
-		&pix_clk,
+        &clk_in,
+        &cis_pclk,
+        &pll0,
+        &pll1,
+        &ddr_clk_normal,
+        &ddr_clk_div2,
+        &cpu_fclk,
+        &cpu_aclk,
+        &cpu_hclk,
+        &cpu_pclk,
+        &isp_aclk,
+        &vcu_clk,
+        &vou_clk,
+        &mipi_p32_clk,
+        &cis_clk_out,
+        &pts_clk,
+        &mipi_pix_clk,
+        &pix_clk,
 
-		//pll1
-		&sdc0_clk2x,
-		&sdc0_clk,
-		&sdc0_clk_out,
-		&sdc0_clk_sample,
-		&sdc0_clk_drive,
+        //pll1
+        &sdc0_clk2x,
+        &sdc0_clk,
+        &sdc0_clk_out,
+        &sdc0_clk_sample,
+        &sdc0_clk_drive,
 
-		&sdc1_clk2x,
-		&sdc1_clk,
-		&sdc1_clk_out,
-		&sdc1_clk_sample,
-		&sdc1_clk_drive,
+        &sdc1_clk2x,
+        &sdc1_clk,
+        &sdc1_clk_out,
+        &sdc1_clk_sample,
+        &sdc1_clk_drive,
 
 
-		&spi0_clk,
-		&spi1_clk,
-		&mipi_dphy_clk20m,
-		&i2c0_clk,
-		&i2c1_clk,
-		&uart0_clk,
-		&uart1_clk,
-		&pwm_clk,
-		&time0_clk,
-		&time1_clk,
-		&sadc_clk,
-		ð_ref_clk,
+        &spi0_clk,
+        &spi1_clk,
+        &mipi_dphy_clk20m,
+        &i2c0_clk,
+        &i2c1_clk,
+        &uart0_clk,
+        &uart1_clk,
+        &pwm_clk,
+        &time0_clk,
+        &time1_clk,
+        &sadc_clk,
+        ð_ref_clk,
 
-		&wdt_clk,
+        &wdt_clk,
 
 
 };
 
 static inline rt_int32_t wrap_read_reg(rt_uint32_t offset, rt_uint32_t mask,
-		rt_uint32_t *value)
+        rt_uint32_t *value)
 {
-	rt_uint32_t temp_v, temp_shift;
+    rt_uint32_t temp_v, temp_shift;
 
-	/*	if(fh_pmu_status() == PMU_STATUS_CLOSE)
-	 return -1;*/
-	temp_v = FH_TIMER_READL(offset);
-	temp_v &= mask;
-	temp_shift = __rt_ffs(mask);
-	temp_v = temp_v >> (temp_shift - 1);
-	*value = temp_v;
-	return 0;
+    /*  if(fh_pmu_status() == PMU_STATUS_CLOSE)
+     return -1;*/
+    temp_v = FH_TIMER_READL(offset);
+    temp_v &= mask;
+    temp_shift = __rt_ffs(mask);
+    temp_v = temp_v >> (temp_shift - 1);
+    *value = temp_v;
+    return 0;
 }
 
 static inline rt_int32_t wrap_write_reg(rt_uint32_t offset, rt_uint32_t mask,
-		rt_uint32_t value)
+        rt_uint32_t value)
 {
-	rt_uint32_t temp_v, temp_shift;
+    rt_uint32_t temp_v, temp_shift;
 
-	/*
-	 if(fh_pmu_status() == PMU_STATUS_CLOSE)
-	 return -1;
-	 */
+    /*
+     if(fh_pmu_status() == PMU_STATUS_CLOSE)
+     return -1;
+     */
 
-	temp_v = FH_TIMER_READL(offset);
-	temp_v &= ~mask;
-	temp_shift = __rt_ffs(mask);
-	temp_v |= value << (temp_shift - 1);
-	FH_TIMER_WRITEL(offset, temp_v);
-	return 0;
+    temp_v = FH_TIMER_READL(offset);
+    temp_v &= ~mask;
+    temp_shift = __rt_ffs(mask);
+    temp_v |= value << (temp_shift - 1);
+    FH_TIMER_WRITEL(offset, temp_v);
+    return 0;
 }
 
 rt_int32_t check_pix_clk_source(rt_uint32_t offset, rt_uint32_t mask,
-		rt_uint32_t *value)
+        rt_uint32_t *value)
 {
-	rt_uint32_t mux0;
-	rt_int32_t ret;
-	ret = wrap_read_reg(offset, mask, &mux0);
+    rt_uint32_t mux0;
+    rt_int32_t ret;
+    ret = wrap_read_reg(offset, mask, &mux0);
 
-	if (ret != 0) {
-		return ret;
-	}
+    if (ret != 0) {
+        return ret;
+    }
 
-	*value = mux0;
-	return 0;
+    *value = mux0;
+    return 0;
 }
 
 rt_int32_t check_xtal_pll0(rt_uint32_t offset, rt_uint32_t mask,
-		rt_uint32_t *value)
+        rt_uint32_t *value)
 {
-	rt_uint32_t mux0;
-	rt_int32_t ret;
-	ret = wrap_read_reg(offset, mask, &mux0);
+    rt_uint32_t mux0;
+    rt_int32_t ret;
+    ret = wrap_read_reg(offset, mask, &mux0);
 
-	if (ret != 0) {
-		return ret;
-	}
-	if (mux0 == MUX0_PLL0_CLK)
-		*value = MUX0_PLL0_CLK;
-	else
-		*value = MUX0_XTAL_CLK;
+    if (ret != 0) {
+        return ret;
+    }
+    if (mux0 == MUX0_PLL0_CLK)
+        *value = MUX0_PLL0_CLK;
+    else
+        *value = MUX0_XTAL_CLK;
 
-	return 0;
+    return 0;
 }
 
 void cal_pll0_prediv(rt_uint32_t *div_flag, rt_uint32_t *pre_value)
 {
 
-	if (!(*div_flag & PRE_DIV_CAL_ALREADY)) {
-		//before has got the prediv value..
-		if (*div_flag & PRE_DIV_ENABLE) {
+    if (!(*div_flag & PRE_DIV_CAL_ALREADY)) {
+        //before has got the prediv value..
+        if (*div_flag & PRE_DIV_ENABLE) {
 
-			*pre_value *= 2;
-		} else {
-			*pre_value = 2;
-		}
-		*div_flag |= PRE_DIV_ENABLE | PRE_DIV_CAL_ALREADY;
-	}
+            *pre_value *= 2;
+        } else {
+            *pre_value = 2;
+        }
+        *div_flag |= PRE_DIV_ENABLE | PRE_DIV_CAL_ALREADY;
+    }
 
 }
 
 rt_int32_t sw_div_process(rt_uint32_t div_flag, rt_uint32_t offset,
-		rt_uint32_t mask, rt_uint32_t *div_value)
+        rt_uint32_t mask, rt_uint32_t *div_value)
 {
 
-	//rt_kprintf("----------div go----------\n");
-	rt_uint32_t div;
-	rt_int32_t ret;
-	if (div_flag & DIV_ENABLE) {
-		ret = wrap_read_reg(offset, mask, &div);
-		if (ret != 0) {
-			return ret;
-		}
+    //rt_kprintf("----------div go----------\n");
+    rt_uint32_t div;
+    rt_int32_t ret;
+    if (div_flag & DIV_ENABLE) {
+        ret = wrap_read_reg(offset, mask, &div);
+        if (ret != 0) {
+            return ret;
+        }
 
 //
-//		rt_kprintf("hw value is %x\n",div);
-//		rt_kprintf("sw value is %x\n",div_value);
+//      rt_kprintf("hw value is %x\n",div);
+//      rt_kprintf("sw value is %x\n",div_value);
 //
-//		rt_kprintf("offset is %x,value :%x\n",offset + 0xf0000000,*(rt_uint32_t*)(offset + 0xf0000000));
-//		rt_kprintf("mask is %x\n",mask);
+//      rt_kprintf("offset is %x,value :%x\n",offset + 0xf0000000,*(rt_uint32_t*)(offset + 0xf0000000));
+//      rt_kprintf("mask is %x\n",mask);
 
-		//if use the hw default value....
+        //if use the hw default value....
 
-		if (*div_value == FH_CLK_DIV_DEFAULT_VALUE) {
-			*div_value = div;
-			return 0;
-		}
+        if (*div_value == FH_CLK_DIV_DEFAULT_VALUE) {
+            *div_value = div;
+            return 0;
+        }
 
-		if (div != *div_value) {
-			ret = wrap_write_reg(offset, mask, *div_value);
-			if (ret != 0) {
-				return ret;
-			}
-		}
-	}
-	//rt_kprintf("----------div done----------\n");
-	return 0;
-	//*div_flag |= PRE_DIV_ENABLE;
+        if (div != *div_value) {
+            ret = wrap_write_reg(offset, mask, *div_value);
+            if (ret != 0) {
+                return ret;
+            }
+        }
+    }
+    //rt_kprintf("----------div done----------\n");
+    return 0;
+    //*div_flag |= PRE_DIV_ENABLE;
 }
 
 void cal_baud_hz(rt_uint32_t clk_in, rt_uint32_t div_flag, rt_uint32_t pre_div,
-		rt_uint32_t div, rt_uint32_t div_multi, rt_uint32_t *baud_out)
+        rt_uint32_t div, rt_uint32_t div_multi, rt_uint32_t *baud_out)
 {
-	//div += 1;
-	if (div_flag & PRE_DIV_ENABLE) {
-		*baud_out = (clk_in / pre_div);
-	} else {
-		*baud_out = clk_in;
-	}
+    //div += 1;
+    if (div_flag & PRE_DIV_ENABLE) {
+        *baud_out = (clk_in / pre_div);
+    } else {
+        *baud_out = clk_in;
+    }
 
-	if (div_flag & DIV_ENABLE) {
-		*baud_out /= ((div + 1) * div_multi);
-	}
+    if (div_flag & DIV_ENABLE) {
+        *baud_out /= ((div + 1) * div_multi);
+    }
 
 }
 
 void cal_baud_div(rt_uint32_t clk_in, rt_uint32_t div_flag, rt_uint32_t pre_div,
-		rt_uint32_t *div, rt_uint32_t div_multi, rt_uint32_t baud_out)
+        rt_uint32_t *div, rt_uint32_t div_multi, rt_uint32_t baud_out)
 {
-	//div += 1;
-	rt_uint32_t temp_baud_hz, temp_baud_div;
+    //div += 1;
+    rt_uint32_t temp_baud_hz, temp_baud_div;
 
-	if (div_flag & DIV_ENABLE) {
-		if (div_flag & PRE_DIV_ENABLE) {
-			temp_baud_hz = (clk_in / pre_div);
-		} else {
-			temp_baud_hz = clk_in;
-		}
-		temp_baud_div = temp_baud_hz / baud_out;
-		*div = temp_baud_div - 1;
-	}
+    if (div_flag & DIV_ENABLE) {
+        if (div_flag & PRE_DIV_ENABLE) {
+            temp_baud_hz = (clk_in / pre_div);
+        } else {
+            temp_baud_hz = clk_in;
+        }
+        temp_baud_div = temp_baud_hz / baud_out;
+        *div = temp_baud_div - 1;
+    }
 
 }
 
 rt_int32_t process_gate(rt_uint32_t gate_flag, rt_uint32_t reg_offset,
-		rt_uint32_t reg_mask, rt_uint32_t *sw_status,
-		rt_uint32_t *pclk_status)
+        rt_uint32_t reg_mask, rt_uint32_t *sw_status,
+        rt_uint32_t *pclk_status)
 {
-	//rt_kprintf("----------gate go----------\n");
-	rt_uint32_t hw_gate;
-	rt_int32_t ret;
-	if (gate_flag == HAS_GATE) {
-		ret = wrap_read_reg(reg_offset, reg_mask, &hw_gate);
-		if (ret != 0) {
-			return ret;
-		}
+    //rt_kprintf("----------gate go----------\n");
+    rt_uint32_t hw_gate;
+    rt_int32_t ret;
+    if (gate_flag == HAS_GATE) {
+        ret = wrap_read_reg(reg_offset, reg_mask, &hw_gate);
+        if (ret != 0) {
+            return ret;
+        }
 
-		if (*sw_status == FH_CLK_GATE_DEFAULT_VALUE) {
-			*sw_status = hw_gate;
-			*pclk_status = *sw_status;
-			return 0;
-		}
+        if (*sw_status == FH_CLK_GATE_DEFAULT_VALUE) {
+            *sw_status = hw_gate;
+            *pclk_status = *sw_status;
+            return 0;
+        }
 
-//		rt_kprintf("gate hw is :%x\n",hw_gate);
-//		rt_kprintf("gate sw is :%x\n",sw_status);
-		if (hw_gate != *sw_status) {
-			//update the gate..
-//			rt_kprintf("gate reg offset is :%x\n",reg_offset);
-//			rt_kprintf("gate reg mask is :%x\n",reg_mask);
-//			rt_kprintf("gate reg write is :%x\n",sw_status);
-			ret = wrap_write_reg(reg_offset, reg_mask, *sw_status);
-			if (ret != 0) {
-				return ret;
-			}
-		}
+//      rt_kprintf("gate hw is :%x\n",hw_gate);
+//      rt_kprintf("gate sw is :%x\n",sw_status);
+        if (hw_gate != *sw_status) {
+            //update the gate..
+//          rt_kprintf("gate reg offset is :%x\n",reg_offset);
+//          rt_kprintf("gate reg mask is :%x\n",reg_mask);
+//          rt_kprintf("gate reg write is :%x\n",sw_status);
+            ret = wrap_write_reg(reg_offset, reg_mask, *sw_status);
+            if (ret != 0) {
+                return ret;
+            }
+        }
 
-		*pclk_status = *sw_status;
-	}
+        *pclk_status = *sw_status;
+    }
 
-	else {
-		*pclk_status |= CLK_HAS_NO_GATE;
-	}
-	//rt_kprintf("---------gate done---------\n");
-	return 0;
+    else {
+        *pclk_status |= CLK_HAS_NO_GATE;
+    }
+    //rt_kprintf("---------gate done---------\n");
+    return 0;
 
 }
 
 void clk_handle(struct fh_clk* p_clk, struct fh_clk *parent)
 {
-	//rt_uint32_t div;
-	//rt_uint32_t sw_gate;
-	rt_uint32_t phase;
-	rt_int32_t ret;
-	p_clk->parent = parent;
-//	switch
-	//fh_clk_debug(p_clk,"----parent----\t ----clk out rate----\n ");
-	if (p_clk->parent)
-		//rt_kprintf("%-8.*s 0x%02x", RT_NAME_MAX, thread->name, thread->current_priority);
-		fh_clk_debug(p_clk, "parent:'%s'\n", p_clk->parent->name);
-	else
-		fh_clk_debug(p_clk, "'root node'\n");
+    //rt_uint32_t div;
+    //rt_uint32_t sw_gate;
+    rt_uint32_t phase;
+    rt_int32_t ret;
+    p_clk->parent = parent;
+//  switch
+    //fh_clk_debug(p_clk,"----parent----\t ----clk out rate----\n ");
+    if (p_clk->parent)
+        //rt_kprintf("%-8.*s 0x%02x", RT_NAME_MAX, thread->name, thread->current_priority);
+        fh_clk_debug(p_clk, "parent:'%s'\n", p_clk->parent->name);
+    else
+        fh_clk_debug(p_clk, "'root node'\n");
 
-	switch (p_clk->level) {
+    switch (p_clk->level) {
 
-	case LEVEL_CRYSTAL:
-		//fh_clk_debug(p_clk,"clk out:%d\n",p_clk->clk_out_rate);
-		break;
-	case LEVEL_PLL:
-		//fh_clk_debug(p_clk,"%d\n",p_clk->clk_out_rate);
-		break;
-	case LEVEL_PERIPHERAL:
+    case LEVEL_CRYSTAL:
+        //fh_clk_debug(p_clk,"clk out:%d\n",p_clk->clk_out_rate);
+        break;
+    case LEVEL_PLL:
+        //fh_clk_debug(p_clk,"%d\n",p_clk->clk_out_rate);
+        break;
+    case LEVEL_PERIPHERAL:
 
-		switch (p_clk->clk.peri.peri_flag) {
+        switch (p_clk->clk.peri.peri_flag) {
 
-		case LEVEL_PERI_NORMAL:
-			//div = p_clk->clk.peri.obj.normal.div.sw_div_value;
-			ret =
-					sw_div_process(
-							p_clk->clk.peri.obj.normal.div.div_flag,
-							p_clk->clk.peri.obj.normal.div.reg_offset,
-							p_clk->clk.peri.obj.normal.div.reg_mask,
-							&p_clk->clk.peri.obj.normal.div.sw_div_value);
+        case LEVEL_PERI_NORMAL:
+            //div = p_clk->clk.peri.obj.normal.div.sw_div_value;
+            ret =
+                    sw_div_process(
+                            p_clk->clk.peri.obj.normal.div.div_flag,
+                            p_clk->clk.peri.obj.normal.div.reg_offset,
+                            p_clk->clk.peri.obj.normal.div.reg_mask,
+                            &p_clk->clk.peri.obj.normal.div.sw_div_value);
 
-			if (ret != 0) {
-				fh_clk_err(p_clk,
-						"div process failed.error no:%x\n",
-						ret);
-				break;
-			}
+            if (ret != 0) {
+                fh_clk_err(p_clk,
+                        "div process failed.error no:%x\n",
+                        ret);
+                break;
+            }
 
-			//fh_clk_debug(p_clk,"hw div is %d\n",p_clk->clk.peri.obj.ddr.div.hw_div_value);
-//			fh_clk_debug(p_clk,"sw div is %d\n",p_clk->clk.peri.obj.normal.div.sw_div_value);
-//			fh_clk_debug(p_clk,"pre div is %d\n",p_clk->clk.peri.obj.normal.div.pdiv_value);
-//			fh_clk_debug(p_clk,"clk in is %d\n",p_clk->parent->clk_out_rate);
-//			fh_clk_debug(p_clk,"peri flag is %x\n",p_clk->clk.peri.obj.normal.div.div_flag);
-			//hw will self add 1..
+            //fh_clk_debug(p_clk,"hw div is %d\n",p_clk->clk.peri.obj.ddr.div.hw_div_value);
+//          fh_clk_debug(p_clk,"sw div is %d\n",p_clk->clk.peri.obj.normal.div.sw_div_value);
+//          fh_clk_debug(p_clk,"pre div is %d\n",p_clk->clk.peri.obj.normal.div.pdiv_value);
+//          fh_clk_debug(p_clk,"clk in is %d\n",p_clk->parent->clk_out_rate);
+//          fh_clk_debug(p_clk,"peri flag is %x\n",p_clk->clk.peri.obj.normal.div.div_flag);
+            //hw will self add 1..
 
-			cal_baud_hz(p_clk->parent->clk_out_rate,
-					p_clk->clk.peri.obj.normal.div.div_flag,
-					p_clk->clk.peri.obj.normal.div.pdiv_value,
-					p_clk->clk.peri.obj.normal.div.sw_div_value,
-					p_clk->clk.peri.obj.normal.div.sw_div_multi,
-					&p_clk->clk_out_rate);
+            cal_baud_hz(p_clk->parent->clk_out_rate,
+                    p_clk->clk.peri.obj.normal.div.div_flag,
+                    p_clk->clk.peri.obj.normal.div.pdiv_value,
+                    p_clk->clk.peri.obj.normal.div.sw_div_value,
+                    p_clk->clk.peri.obj.normal.div.sw_div_multi,
+                    &p_clk->clk_out_rate);
 
-			//fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate);
-			//fix the gate..
-			//sw_gate = p_clk->clk.peri.obj.normal.gate.sw_status;
-			ret =
-					process_gate(
-							p_clk->clk.peri.obj.normal.gate.gate_flag,
-							p_clk->clk.peri.obj.normal.gate.reg_offset,
-							p_clk->clk.peri.obj.normal.gate.reg_mask,
-							&p_clk->clk.peri.obj.normal.gate.sw_status,
-							&p_clk->gate);
+            //fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate);
+            //fix the gate..
+            //sw_gate = p_clk->clk.peri.obj.normal.gate.sw_status;
+            ret =
+                    process_gate(
+                            p_clk->clk.peri.obj.normal.gate.gate_flag,
+                            p_clk->clk.peri.obj.normal.gate.reg_offset,
+                            p_clk->clk.peri.obj.normal.gate.reg_mask,
+                            &p_clk->clk.peri.obj.normal.gate.sw_status,
+                            &p_clk->gate);
 
-			if (ret != 0) {
-				fh_clk_err(p_clk,
-						"gate process failed.error no:%x\n",
-						ret);
-				break;
-			}
+            if (ret != 0) {
+                fh_clk_err(p_clk,
+                        "gate process failed.error no:%x\n",
+                        ret);
+                break;
+            }
 
-			break;
-		case LEVEL_PERI_DDR:
-			//rt_uint32_t mux0,mux1;
-			//div = p_clk->clk.peri.obj.ddr.div.sw_div_value;
+            break;
+        case LEVEL_PERI_DDR:
+            //rt_uint32_t mux0,mux1;
+            //div = p_clk->clk.peri.obj.ddr.div.sw_div_value;
 
-			ret =
-					sw_div_process(
-							p_clk->clk.peri.obj.ddr.div.div_flag,
-							p_clk->clk.peri.obj.ddr.div.reg_offset,
-							p_clk->clk.peri.obj.ddr.div.reg_mask,
-							&p_clk->clk.peri.obj.ddr.div.sw_div_value);
+            ret =
+                    sw_div_process(
+                            p_clk->clk.peri.obj.ddr.div.div_flag,
+                            p_clk->clk.peri.obj.ddr.div.reg_offset,
+                            p_clk->clk.peri.obj.ddr.div.reg_mask,
+                            &p_clk->clk.peri.obj.ddr.div.sw_div_value);
 
-			if (ret != 0) {
-				fh_clk_err(p_clk,
-						"div process failed.error no:%x\n",
-						ret);
-				break;
-			}
+            if (ret != 0) {
+                fh_clk_err(p_clk,
+                        "div process failed.error no:%x\n",
+                        ret);
+                break;
+            }
 
-//			fh_clk_debug(p_clk,"sw div is %d\n",p_clk->clk.peri.obj.ddr.div.sw_div_value);
-//			fh_clk_debug(p_clk,"pre div is %d\n",p_clk->clk.peri.obj.ddr.div.pdiv_value);
-//			fh_clk_debug(p_clk,"clk in is %d\n",p_clk->parent->clk_out_rate);
-//			fh_clk_debug(p_clk,"peri flag is %x\n",p_clk->clk.peri.obj.ddr.div.div_flag);
+//          fh_clk_debug(p_clk,"sw div is %d\n",p_clk->clk.peri.obj.ddr.div.sw_div_value);
+//          fh_clk_debug(p_clk,"pre div is %d\n",p_clk->clk.peri.obj.ddr.div.pdiv_value);
+//          fh_clk_debug(p_clk,"clk in is %d\n",p_clk->parent->clk_out_rate);
+//          fh_clk_debug(p_clk,"peri flag is %x\n",p_clk->clk.peri.obj.ddr.div.div_flag);
 
-			cal_baud_hz(p_clk->parent->clk_out_rate,
-					p_clk->clk.peri.obj.ddr.div.div_flag,
-					p_clk->clk.peri.obj.ddr.div.pdiv_value,
-					p_clk->clk.peri.obj.ddr.div.sw_div_value,
-					p_clk->clk.peri.obj.ddr.div.sw_div_multi,
-					&p_clk->clk_out_rate);
+            cal_baud_hz(p_clk->parent->clk_out_rate,
+                    p_clk->clk.peri.obj.ddr.div.div_flag,
+                    p_clk->clk.peri.obj.ddr.div.pdiv_value,
+                    p_clk->clk.peri.obj.ddr.div.sw_div_value,
+                    p_clk->clk.peri.obj.ddr.div.sw_div_multi,
+                    &p_clk->clk_out_rate);
 
-			//fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate);
-			//fix the gate..
-			//fh_clk_debug(p_clk,"gate reg add is:%x\t mask is:%x\n",p_clk->clk.peri.obj.ddr.gate.reg_offset,p_clk->clk.peri.obj.ddr.gate.reg_mask);
-			//sw_gate = p_clk->clk.peri.obj.ddr.gate.sw_status;
+            //fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate);
+            //fix the gate..
+            //fh_clk_debug(p_clk,"gate reg add is:%x\t mask is:%x\n",p_clk->clk.peri.obj.ddr.gate.reg_offset,p_clk->clk.peri.obj.ddr.gate.reg_mask);
+            //sw_gate = p_clk->clk.peri.obj.ddr.gate.sw_status;
 
-			ret = process_gate(
-					p_clk->clk.peri.obj.ddr.gate.gate_flag,
-					p_clk->clk.peri.obj.ddr.gate.reg_offset,
-					p_clk->clk.peri.obj.ddr.gate.reg_mask,
-					&p_clk->clk.peri.obj.ddr.gate.sw_status,
-					&p_clk->gate);
+            ret = process_gate(
+                    p_clk->clk.peri.obj.ddr.gate.gate_flag,
+                    p_clk->clk.peri.obj.ddr.gate.reg_offset,
+                    p_clk->clk.peri.obj.ddr.gate.reg_mask,
+                    &p_clk->clk.peri.obj.ddr.gate.sw_status,
+                    &p_clk->gate);
 
-			if (ret != 0) {
-				fh_clk_err(p_clk,
-						"gate process failed.error no:%x\n",
-						ret);
-				break;
-			}
+            if (ret != 0) {
+                fh_clk_err(p_clk,
+                        "gate process failed.error no:%x\n",
+                        ret);
+                break;
+            }
 
-			break;
-		case LEVEL_PERI_SDC:
-			//just need to handle the phase....
-			p_clk->clk_out_rate = p_clk->parent->clk_out_rate;
-			if (p_clk->clk.peri.obj.sdc.phase_diff & DIFF_REFERENCE) {
-				//fh_clk_debug(p_clk,"this is the reference..no need to process..\n");
-				break;
-			}
+            break;
+        case LEVEL_PERI_SDC:
+            //just need to handle the phase....
+            p_clk->clk_out_rate = p_clk->parent->clk_out_rate;
+            if (p_clk->clk.peri.obj.sdc.phase_diff & DIFF_REFERENCE) {
+                //fh_clk_debug(p_clk,"this is the reference..no need to process..\n");
+                break;
+            }
 
-			//baud ...
+            //baud ...
 
-			//phase..
-			//fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate);
-			//hw status..
-			ret = wrap_read_reg(p_clk->clk.peri.obj.sdc.reg_offset,
-					p_clk->clk.peri.obj.sdc.reg_mask,
-					&phase);
+            //phase..
+            //fh_clk_debug_no_handle("%d\n",p_clk->clk_out_rate);
+            //hw status..
+            ret = wrap_read_reg(p_clk->clk.peri.obj.sdc.reg_offset,
+                    p_clk->clk.peri.obj.sdc.reg_mask,
+                    &phase);
 
-			if (ret != 0) {
-				fh_clk_err(p_clk,
-						"read pmu failed.error no:%x\n",
-						ret);
-				break;
-			}
+            if (ret != 0) {
+                fh_clk_err(p_clk,
+                        "read pmu failed.error no:%x\n",
+                        ret);
+                break;
+            }
 
-//			fh_clk_debug(p_clk,"hw phase is :%x\n",phase);
-//			fh_clk_debug(p_clk,"sw phase is :%x\n",p_clk->clk.peri.obj.sdc.phase_diff);
-			if (phase != p_clk->clk.peri.obj.sdc.phase_diff) {
-				//update the hw para..
-				ret =
-						wrap_write_reg(
-								p_clk->clk.peri.obj.sdc.reg_offset,
-								p_clk->clk.peri.obj.sdc.reg_mask,
-								p_clk->clk.peri.obj.sdc.phase_diff);
-				if (ret != 0) {
-					fh_clk_err(p_clk,
-							"write pmu failed.error no:%x\n",
-							ret);
-					break;
-				}
-			}
+//          fh_clk_debug(p_clk,"hw phase is :%x\n",phase);
+//          fh_clk_debug(p_clk,"sw phase is :%x\n",p_clk->clk.peri.obj.sdc.phase_diff);
+            if (phase != p_clk->clk.peri.obj.sdc.phase_diff) {
+                //update the hw para..
+                ret =
+                        wrap_write_reg(
+                                p_clk->clk.peri.obj.sdc.reg_offset,
+                                p_clk->clk.peri.obj.sdc.reg_mask,
+                                p_clk->clk.peri.obj.sdc.phase_diff);
+                if (ret != 0) {
+                    fh_clk_err(p_clk,
+                            "write pmu failed.error no:%x\n",
+                            ret);
+                    break;
+                }
+            }
 
-			break;
-		case LEVEL_PERI_GMAC:
-			break;
-		default:
-			break;
+            break;
+        case LEVEL_PERI_GMAC:
+            break;
+        default:
+            break;
 
-		}
-	}
+        }
+    }
 
-	fh_clk_debug(p_clk, "clk out:%d\n", p_clk->clk_out_rate);
+    fh_clk_debug(p_clk, "clk out:%d\n", p_clk->clk_out_rate);
 
 }
 
 //
 void clk_in_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, RT_NULL);
+    clk_handle(p_clk, RT_NULL);
 }
 
 void cis_pclk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, RT_NULL);
+    clk_handle(p_clk, RT_NULL);
 }
 
 void pll1_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &clk_in);
+    clk_handle(p_clk, &clk_in);
 }
 
 void pll0_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &clk_in);
+    clk_handle(p_clk, &clk_in);
 }
 
 void ddr_clk_update(struct fh_clk* p_clk)
 {
 
-	//check if pll0 or pll1
-	rt_uint32_t mux0, mux1;
-	rt_int32_t ret;
-	struct fh_clk* parent;
-	//1 step: fix the parent..
-	ret = wrap_read_reg(p_clk->clk.peri.obj.ddr.mux[1].reg_offset,
-			p_clk->clk.peri.obj.ddr.mux[1].reg_mask, &mux1);
-	if (ret != 0) {
-		fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret);
-		return;
-	}
+    //check if pll0 or pll1
+    rt_uint32_t mux0, mux1;
+    rt_int32_t ret;
+    struct fh_clk* parent;
+    //1 step: fix the parent..
+    ret = wrap_read_reg(p_clk->clk.peri.obj.ddr.mux[1].reg_offset,
+            p_clk->clk.peri.obj.ddr.mux[1].reg_mask, &mux1);
+    if (ret != 0) {
+        fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret);
+        return;
+    }
 
-	if (mux1 == MUX1_PLL0_CLK) {
-		ret = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset,
-				p_clk->clk.peri.obj.ddr.mux[0].reg_mask, &mux0);
-		if (ret != 0) {
-			fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret);
-			return;
-		}
-		if (mux0 == MUX0_PLL0_CLK) {
-			//ddr normal parent is pll0
-			parent = &pll0;
-		} else {
-			//ddr normal parent is xtal
-			parent = &clk_in;
-		}
-	} else {
-		//ddr normal parent is pll1
-		parent = &pll1;
-	}
-	p_clk->clk.peri.obj.ddr.mux[0].mux_flag = HAS_MUX;
-	p_clk->clk.peri.obj.ddr.mux[1].mux_flag = HAS_MUX;
-	clk_handle(p_clk, parent);
+    if (mux1 == MUX1_PLL0_CLK) {
+        ret = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset,
+                p_clk->clk.peri.obj.ddr.mux[0].reg_mask, &mux0);
+        if (ret != 0) {
+            fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret);
+            return;
+        }
+        if (mux0 == MUX0_PLL0_CLK) {
+            //ddr normal parent is pll0
+            parent = &pll0;
+        } else {
+            //ddr normal parent is xtal
+            parent = &clk_in;
+        }
+    } else {
+        //ddr normal parent is pll1
+        parent = &pll1;
+    }
+    p_clk->clk.peri.obj.ddr.mux[0].mux_flag = HAS_MUX;
+    p_clk->clk.peri.obj.ddr.mux[1].mux_flag = HAS_MUX;
+    clk_handle(p_clk, parent);
 
 }
 
 void fclk_update(struct fh_clk* p_clk)
 {
 
-	//check if pll0 or xtal
-	rt_uint32_t mux0;
-	rt_int32_t ret;
-	struct fh_clk* parent;	//1 step: fix the parent..
+    //check if pll0 or xtal
+    rt_uint32_t mux0;
+    rt_int32_t ret;
+    struct fh_clk* parent;  //1 step: fix the parent..
 
-	//mux0 = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset,p_clk->clk.peri.obj.ddr.mux[0].reg_mask);
-	ret = check_xtal_pll0(p_clk->clk.peri.obj.normal.mux.reg_offset,
-			p_clk->clk.peri.obj.normal.mux.reg_mask, &mux0);
-	if (ret != 0) {
-		fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret);
-		return;
-	}
+    //mux0 = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset,p_clk->clk.peri.obj.ddr.mux[0].reg_mask);
+    ret = check_xtal_pll0(p_clk->clk.peri.obj.normal.mux.reg_offset,
+            p_clk->clk.peri.obj.normal.mux.reg_mask, &mux0);
+    if (ret != 0) {
+        fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret);
+        return;
+    }
 
-	//fh_clk_debug(p_clk,"mux0 wrap value is %x\n",mux0);
-	if (mux0 == MUX0_PLL0_CLK) {
-		//ddr normal parent is pll0
-		parent = &pll0;
-	} else {
-		//ddr normal parent is xtal
-		parent = &clk_in;
-	}
-	p_clk->clk.peri.obj.normal.mux.mux_flag = HAS_MUX;
-	//2 step:fix the div...
-	if (mux0 == MUX0_PLL0_CLK) {
-		//cal_pll0_prediv(&p_clk->clk.peri.obj.ddr.div.div_flag,&p_clk->clk.peri.obj.ddr.div.pdiv_value);
-		cal_pll0_prediv(&p_clk->clk.peri.obj.normal.div.div_flag,
-				&p_clk->clk.peri.obj.normal.div.pdiv_value);
-	}
-	clk_handle(p_clk, parent);
+    //fh_clk_debug(p_clk,"mux0 wrap value is %x\n",mux0);
+    if (mux0 == MUX0_PLL0_CLK) {
+        //ddr normal parent is pll0
+        parent = &pll0;
+    } else {
+        //ddr normal parent is xtal
+        parent = &clk_in;
+    }
+    p_clk->clk.peri.obj.normal.mux.mux_flag = HAS_MUX;
+    //2 step:fix the div...
+    if (mux0 == MUX0_PLL0_CLK) {
+        //cal_pll0_prediv(&p_clk->clk.peri.obj.ddr.div.div_flag,&p_clk->clk.peri.obj.ddr.div.pdiv_value);
+        cal_pll0_prediv(&p_clk->clk.peri.obj.normal.div.div_flag,
+                &p_clk->clk.peri.obj.normal.div.pdiv_value);
+    }
+    clk_handle(p_clk, parent);
 }
 
 void pix_update(struct fh_clk* p_clk)
 {
 
-	//check if pll0 or xtal
-	rt_uint32_t mux0;
-	rt_int32_t ret;
-	struct fh_clk* parent;	//1 step: fix the parent..
+    //check if pll0 or xtal
+    rt_uint32_t mux0;
+    rt_int32_t ret;
+    struct fh_clk* parent;  //1 step: fix the parent..
 #if(1)
-	//mux0 = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset,p_clk->clk.peri.obj.ddr.mux[0].reg_mask);
-	ret = check_pix_clk_source(p_clk->clk.peri.obj.normal.mux.reg_offset,
-			p_clk->clk.peri.obj.normal.mux.reg_mask, &mux0);
-	if (ret != 0) {
-		fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret);
-		return;
-	}
-//#define CIS_PIX_CLK				(0)
-//#define CIS_PIX_CLK_OPPOSITE	(1)
-//#define MIPI_PIX_CLK			(2)
+    //mux0 = check_xtal_pll0(p_clk->clk.peri.obj.ddr.mux[0].reg_offset,p_clk->clk.peri.obj.ddr.mux[0].reg_mask);
+    ret = check_pix_clk_source(p_clk->clk.peri.obj.normal.mux.reg_offset,
+            p_clk->clk.peri.obj.normal.mux.reg_mask, &mux0);
+    if (ret != 0) {
+        fh_clk_err(p_clk, "read pmu failed.error no:%x\n", ret);
+        return;
+    }
+//#define CIS_PIX_CLK               (0)
+//#define CIS_PIX_CLK_OPPOSITE  (1)
+//#define MIPI_PIX_CLK          (2)
 
-	//fh_clk_debug(p_clk,"mux0 wrap value is %x\n",mux0);
-	if (mux0 == CIS_PIX_CLK || mux0 == CIS_PIX_CLK_OPPOSITE) {
-		//ddr normal parent is pll0
-		parent = &cis_pclk;
-	} else {
-		parent = &mipi_pix_clk;
-	}
-	p_clk->clk.peri.obj.normal.mux.mux_flag = HAS_MUX;
+    //fh_clk_debug(p_clk,"mux0 wrap value is %x\n",mux0);
+    if (mux0 == CIS_PIX_CLK || mux0 == CIS_PIX_CLK_OPPOSITE) {
+        //ddr normal parent is pll0
+        parent = &cis_pclk;
+    } else {
+        parent = &mipi_pix_clk;
+    }
+    p_clk->clk.peri.obj.normal.mux.mux_flag = HAS_MUX;
 
 #endif
-	clk_handle(p_clk, parent);
+    clk_handle(p_clk, parent);
 }
 
 void aclk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &cpu_fclk);
+    clk_handle(p_clk, &cpu_fclk);
 
 }
 
 void hclk_update(struct fh_clk* p_clk)
 {
 
-	fclk_update(p_clk);
+    fclk_update(p_clk);
 }
 
 void pclk_update(struct fh_clk* p_clk)
 {
 
-	clk_handle(p_clk, &cpu_hclk);
+    clk_handle(p_clk, &cpu_hclk);
 }
 
 void isp_aclk_update(struct fh_clk* p_clk)
 {
 
-	fclk_update(p_clk);
+    fclk_update(p_clk);
 }
 
 void vcu_clk_update(struct fh_clk* p_clk)
 {
-	fclk_update(p_clk);
+    fclk_update(p_clk);
 }
 
 void vou_clk_update(struct fh_clk* p_clk)
 {
-	fclk_update(p_clk);
+    fclk_update(p_clk);
 }
 
 void mipi_p32_clk_update(struct fh_clk* p_clk)
 {
-	fclk_update(p_clk);
+    fclk_update(p_clk);
 }
 
 void cis_clk_out_update(struct fh_clk* p_clk)
 {
-	fclk_update(p_clk);
+    fclk_update(p_clk);
 }
 
 void pts_update(struct fh_clk* p_clk)
 {
-	fclk_update(p_clk);
+    fclk_update(p_clk);
 }
 
 void mipi_pix_clk_update(struct fh_clk* p_clk)
 {
-	fclk_update(p_clk);
+    fclk_update(p_clk);
 }
 
 void spi0_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void spi1_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void mipi_dphy_clk20m_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void i2c0_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void i2c1_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void uart0_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void pwm_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void time0_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void time1_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void uart1_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void sadc_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 //sdc0...
 void sdc0_clk2x_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void sdc0_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &sdc0_clk2x);
+    clk_handle(p_clk, &sdc0_clk2x);
 }
 
 void sdc0_clk_out_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &sdc0_clk);
+    clk_handle(p_clk, &sdc0_clk);
 }
 
 void sdc0_clk_sample_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &sdc0_clk2x);
+    clk_handle(p_clk, &sdc0_clk2x);
 }
 
 void sdc0_clk_drv_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &sdc0_clk2x);
+    clk_handle(p_clk, &sdc0_clk2x);
 }
 
 void sdc1_clk2x_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void sdc1_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &sdc1_clk2x);
+    clk_handle(p_clk, &sdc1_clk2x);
 }
 
 void sdc1_clk_out_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &sdc1_clk);
+    clk_handle(p_clk, &sdc1_clk);
 }
 
 void sdc1_clk_sample_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &sdc1_clk2x);
+    clk_handle(p_clk, &sdc1_clk2x);
 }
 
 void sdc1_clk_drv_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &sdc1_clk2x);
+    clk_handle(p_clk, &sdc1_clk2x);
 }
 
 void eth_ref_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &pll1);
+    clk_handle(p_clk, &pll1);
 }
 
 void wdt_clk_update(struct fh_clk* p_clk)
 {
-	clk_handle(p_clk, &cpu_pclk);
+    clk_handle(p_clk, &cpu_pclk);
 }
 
 /**
  * @brief System Clock Configuration
  */
-#define CLK_CONTROL_BASE			PMU_REG_BASE
+#define CLK_CONTROL_BASE            PMU_REG_BASE
 void rt_hw_clock_init(void)
 {
-	struct fh_clk *p;
-	int i;
-	fh_clk_tree.c_base_addr = CLK_CONTROL_BASE;
-	fh_clk_tree.clk_head = fh_clk_array;
+    struct fh_clk *p;
+    int i;
+    fh_clk_tree.c_base_addr = CLK_CONTROL_BASE;
+    fh_clk_tree.clk_head = fh_clk_array;
 
-	//first open all the clock..
-	FH_TIMER_WRITEL(REG_PMU_CLK_GATE, 0x0);
-	for (i = 0; i < sizeof(fh_clk_array) / sizeof(struct fh_clk *); i++) {
-		p = fh_clk_tree.clk_head[i];
-		if (p->update_func)
-			p->update_func(p);
-	}
+    //first open all the clock..
+    FH_TIMER_WRITEL(REG_PMU_CLK_GATE, 0x0);
+    for (i = 0; i < sizeof(fh_clk_array) / sizeof(struct fh_clk *); i++) {
+        p = fh_clk_tree.clk_head[i];
+        if (p->update_func)
+            p->update_func(p);
+    }
 }
 
 /***************
@@ -2453,196 +2453,196 @@ void rt_hw_clock_init(void)
 struct fh_clk *clk_get(const char *name)
 {
 
-	struct fh_clk *p;
-	int i;
+    struct fh_clk *p;
+    int i;
 
-	for (i = 0; i < sizeof(fh_clk_array) / sizeof(struct fh_clk *); i++) {
-		p = fh_clk_tree.clk_head[i];
-		if (!strcmp(p->name, name)) {
-			return p;
-		}
-	}
+    for (i = 0; i < sizeof(fh_clk_array) / sizeof(struct fh_clk *); i++) {
+        p = fh_clk_tree.clk_head[i];
+        if (!strcmp(p->name, name)) {
+            return p;
+        }
+    }
 
-	return RT_NULL;
+    return RT_NULL;
 }
 
 //
-//#define HAS_GATE			(0)
-//#define HAS_NO_GATE			(1)
-//	rt_uint32_t gate_flag;
-//#define CLK_UNGATE			(0)
-//#define CLK_GATE			(1)
+//#define HAS_GATE          (0)
+//#define HAS_NO_GATE           (1)
+//  rt_uint32_t gate_flag;
+//#define CLK_UNGATE            (0)
+//#define CLK_GATE          (1)
 
 void clk_gate_control(struct fh_clk *p_clk, rt_uint32_t status)
 {
 
-	if (status > CLK_GATE)
-		return;
+    if (status > CLK_GATE)
+        return;
 
-	if (p_clk->level == LEVEL_PERIPHERAL) {
+    if (p_clk->level == LEVEL_PERIPHERAL) {
 
-		switch (p_clk->clk.peri.peri_flag) {
-		case LEVEL_PERI_NORMAL:
+        switch (p_clk->clk.peri.peri_flag) {
+        case LEVEL_PERI_NORMAL:
 
-			if (p_clk->clk.peri.obj.normal.gate.gate_flag
-					== HAS_GATE) {
-				p_clk->clk.peri.obj.normal.gate.sw_status =
-						status;
-			} else {
-				rt_kprintf("[%-16.15s]: no gate...\t\n",
-						p_clk->name);
-			}
+            if (p_clk->clk.peri.obj.normal.gate.gate_flag
+                    == HAS_GATE) {
+                p_clk->clk.peri.obj.normal.gate.sw_status =
+                        status;
+            } else {
+                rt_kprintf("[%-16.15s]: no gate...\t\n",
+                        p_clk->name);
+            }
 
-			break;
-		case LEVEL_PERI_DDR:
-			if (p_clk->clk.peri.obj.ddr.gate.gate_flag == HAS_GATE) {
-				p_clk->clk.peri.obj.ddr.gate.sw_status = status;
-			} else {
-				rt_kprintf("[%-16.15s]: no gate...\t\n",
-						p_clk->name);
-			}
+            break;
+        case LEVEL_PERI_DDR:
+            if (p_clk->clk.peri.obj.ddr.gate.gate_flag == HAS_GATE) {
+                p_clk->clk.peri.obj.ddr.gate.sw_status = status;
+            } else {
+                rt_kprintf("[%-16.15s]: no gate...\t\n",
+                        p_clk->name);
+            }
 
-			break;
+            break;
 
-		default:
-			break;
-		}
+        default:
+            break;
+        }
 
-		p_clk->update_func(p_clk);
+        p_clk->update_func(p_clk);
 
-	}
+    }
 
 }
 
 void clk_gate(struct fh_clk *p_clk)
 {
-	clk_gate_control(p_clk, CLK_GATE);
+    clk_gate_control(p_clk, CLK_GATE);
 }
 
 void clk_ungate(struct fh_clk *p_clk)
 {
-	clk_gate_control(p_clk, CLK_UNGATE);
+    clk_gate_control(p_clk, CLK_UNGATE);
 }
 
 rt_uint32_t clk_get_rate(struct fh_clk *p_clk)
 {
-	rt_uint32_t rate;
-	//first update the status
-	p_clk->update_func(p_clk);
-	rate = p_clk->clk_out_rate;
-	return rate;
+    rt_uint32_t rate;
+    //first update the status
+    p_clk->update_func(p_clk);
+    rate = p_clk->clk_out_rate;
+    return rate;
 }
 
 void clk_set_rate(struct fh_clk *p_clk, rt_uint32_t rate_value)
 {
 
-	rt_uint32_t clk_in, div_flag, pre_div, div_multi, baud_out;
+    rt_uint32_t clk_in, div_flag, pre_div, div_multi, baud_out;
 
-	if (p_clk->level == LEVEL_PERIPHERAL) {
+    if (p_clk->level == LEVEL_PERIPHERAL) {
 
-		switch (p_clk->clk.peri.peri_flag) {
-		case LEVEL_PERI_NORMAL:
+        switch (p_clk->clk.peri.peri_flag) {
+        case LEVEL_PERI_NORMAL:
 
-			clk_in = p_clk->parent->clk_out_rate;
-			div_flag = p_clk->clk.peri.obj.normal.div.div_flag;
-			pre_div = p_clk->clk.peri.obj.normal.div.pdiv_value;
-			div_multi = p_clk->clk.peri.obj.normal.div.sw_div_multi;
-			baud_out = rate_value;
+            clk_in = p_clk->parent->clk_out_rate;
+            div_flag = p_clk->clk.peri.obj.normal.div.div_flag;
+            pre_div = p_clk->clk.peri.obj.normal.div.pdiv_value;
+            div_multi = p_clk->clk.peri.obj.normal.div.sw_div_multi;
+            baud_out = rate_value;
 
-			cal_baud_div(clk_in, div_flag, pre_div,
-					&p_clk->clk.peri.obj.normal.div.sw_div_value,
-					div_multi, baud_out);
+            cal_baud_div(clk_in, div_flag, pre_div,
+                    &p_clk->clk.peri.obj.normal.div.sw_div_value,
+                    div_multi, baud_out);
 
-			break;
-		case LEVEL_PERI_DDR:
-			//rt_uint32_t mux0,mux1;
-			clk_in = p_clk->parent->clk_out_rate;
-			div_flag = p_clk->clk.peri.obj.ddr.div.div_flag;
-			pre_div = p_clk->clk.peri.obj.ddr.div.pdiv_value;
-			div_multi = p_clk->clk.peri.obj.ddr.div.sw_div_multi;
-			baud_out = rate_value;
+            break;
+        case LEVEL_PERI_DDR:
+            //rt_uint32_t mux0,mux1;
+            clk_in = p_clk->parent->clk_out_rate;
+            div_flag = p_clk->clk.peri.obj.ddr.div.div_flag;
+            pre_div = p_clk->clk.peri.obj.ddr.div.pdiv_value;
+            div_multi = p_clk->clk.peri.obj.ddr.div.sw_div_multi;
+            baud_out = rate_value;
 
-			cal_baud_div(clk_in, div_flag, pre_div,
-					&p_clk->clk.peri.obj.ddr.div.sw_div_value,
-					div_multi, baud_out);
-			break;
-		case LEVEL_PERI_SDC:
-			fh_clk_debug(p_clk,
-					"sdc can't set baud,please set the 'sdcx_clk2x'\n");
-			break;
-		case LEVEL_PERI_GMAC:
-			fh_clk_debug(p_clk, "gmac not support set baud\n");
-			break;
-		default:
-			break;
-		}
-		p_clk->update_func(p_clk);
+            cal_baud_div(clk_in, div_flag, pre_div,
+                    &p_clk->clk.peri.obj.ddr.div.sw_div_value,
+                    div_multi, baud_out);
+            break;
+        case LEVEL_PERI_SDC:
+            fh_clk_debug(p_clk,
+                    "sdc can't set baud,please set the 'sdcx_clk2x'\n");
+            break;
+        case LEVEL_PERI_GMAC:
+            fh_clk_debug(p_clk, "gmac not support set baud\n");
+            break;
+        default:
+            break;
+        }
+        p_clk->update_func(p_clk);
 
-	}
+    }
 
 }
 
 rt_uint32_t sdc_get_phase(struct fh_clk *p_clk)
 {
 
-	if (p_clk->level == LEVEL_PERIPHERAL) {
-		if (p_clk->clk.peri.peri_flag == LEVEL_PERI_SDC) {
+    if (p_clk->level == LEVEL_PERIPHERAL) {
+        if (p_clk->clk.peri.peri_flag == LEVEL_PERI_SDC) {
 
-			p_clk->update_func(p_clk);
-			return p_clk->clk.peri.obj.sdc.phase_diff;
-		}
-	}
-	return SDC_CLK_PARA_ERROR;
+            p_clk->update_func(p_clk);
+            return p_clk->clk.peri.obj.sdc.phase_diff;
+        }
+    }
+    return SDC_CLK_PARA_ERROR;
 
 }
 
 rt_uint32_t sdc_set_phase(struct fh_clk *p_clk, rt_uint32_t phase)
 {
 
-	if (phase > DIFF_SDC_REFCLK_270)
-		return SDC_CLK_PARA_ERROR;
+    if (phase > DIFF_SDC_REFCLK_270)
+        return SDC_CLK_PARA_ERROR;
 
-	if (p_clk->level == LEVEL_PERIPHERAL) {
-		if (p_clk->clk.peri.peri_flag == LEVEL_PERI_SDC) {
-			p_clk->clk.peri.obj.sdc.phase_diff = phase;
-			p_clk->update_func(p_clk);
-			return SDC_CLK_PARA_OK;
-		}
-	}
-	return SDC_CLK_PARA_ERROR;
+    if (p_clk->level == LEVEL_PERIPHERAL) {
+        if (p_clk->clk.peri.peri_flag == LEVEL_PERI_SDC) {
+            p_clk->clk.peri.obj.sdc.phase_diff = phase;
+            p_clk->update_func(p_clk);
+            return SDC_CLK_PARA_OK;
+        }
+    }
+    return SDC_CLK_PARA_ERROR;
 
 }
 
 #ifdef FH_DBG_CLK
 int fh_clk_nlist()
 {
-	struct fh_clk *p;
-	int i;
+    struct fh_clk *p;
+    int i;
 
-	for(i = 0;iupdate_func(p);
-		rt_kprintf("[%-16.15s]:\t\t[baud]:%d\t\n",p->name,p->clk_out_rate);
-	}
+    for(i = 0;iupdate_func(p);
+        rt_kprintf("[%-16.15s]:\t\t[baud]:%d\t\n",p->name,p->clk_out_rate);
+    }
 
-	return 0;
+    return 0;
 }
 
 int fh_clk_glist()
 {
-	struct fh_clk *p;
-	int i;
-	rt_kprintf("first bit set means has no gate..\n");
-	for(i = 0;iupdate_func(p);
-		if(!(p->gate & CLK_HAS_NO_GATE))
-		rt_kprintf("[%-16.15s]:\t\t[gate]:%d\t\n",p->name,p->gate);
-		else
-		rt_kprintf("[%-16.15s]:\t\t[gate]:no gate..\t\n",p->name);
-	}
+    struct fh_clk *p;
+    int i;
+    rt_kprintf("first bit set means has no gate..\n");
+    for(i = 0;iupdate_func(p);
+        if(!(p->gate & CLK_HAS_NO_GATE))
+        rt_kprintf("[%-16.15s]:\t\t[gate]:%d\t\n",p->name,p->gate);
+        else
+        rt_kprintf("[%-16.15s]:\t\t[gate]:no gate..\t\n",p->name);
+    }
 
-	return 0;
+    return 0;
 }
 #endif
 
diff --git a/bsp/fh8620/platform/plat-v2/clock.h b/bsp/fh8620/platform/plat-v2/clock.h
index 60b0ed6538..cdf94b017a 100644
--- a/bsp/fh8620/platform/plat-v2/clock.h
+++ b/bsp/fh8620/platform/plat-v2/clock.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef TIMER_H_
 #define TIMER_H_
 
@@ -43,12 +43,12 @@ void fh_pmu_open(void);
 void fh_pmu_close(void);
 */
 
-#define DIFF_SDC_REFCLK_0			(0)
-#define DIFF_SDC_REFCLK_90			(1)
-#define DIFF_SDC_REFCLK_180			(2)
-#define DIFF_SDC_REFCLK_270			(3)
-#define SDC_CLK_PARA_ERROR		(0xffff0000)
-#define SDC_CLK_PARA_OK			(0)
+#define DIFF_SDC_REFCLK_0           (0)
+#define DIFF_SDC_REFCLK_90          (1)
+#define DIFF_SDC_REFCLK_180         (2)
+#define DIFF_SDC_REFCLK_270         (3)
+#define SDC_CLK_PARA_ERROR      (0xffff0000)
+#define SDC_CLK_PARA_OK         (0)
 
 
 void clk_gate(struct fh_clk *p_clk);
diff --git a/bsp/fh8620/platform/plat-v2/fh_pmu.c b/bsp/fh8620/platform/plat-v2/fh_pmu.c
index 8f518efd94..d17f215a17 100644
--- a/bsp/fh8620/platform/plat-v2/fh_pmu.c
+++ b/bsp/fh8620/platform/plat-v2/fh_pmu.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,45 +18,45 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include "rtdebug.h"
 #include "arch.h"
 #include "fh_pmu.h"
 #include "fh_def.h"
 
-#define FH_PMU_WRITEL(offset,value)		SET_REG((PMU_REG_BASE + offset),value)
-#define FH_PMU_WRITEL_MASK(offset,value, mask)	SET_REG_M((PMU_REG_BASE + offset), value, mask)
-#define FH_PMU_READL(offset)			GET_REG((PMU_REG_BASE + offset))
+#define FH_PMU_WRITEL(offset,value)     SET_REG((PMU_REG_BASE + offset),value)
+#define FH_PMU_WRITEL_MASK(offset,value, mask)  SET_REG_M((PMU_REG_BASE + offset), value, mask)
+#define FH_PMU_READL(offset)            GET_REG((PMU_REG_BASE + offset))
 
-#define PMU_OFFSET_MAX		0x1d0
+#define PMU_OFFSET_MAX      0x1d0
 
 int fh_pmu_read(rt_uint32_t offset, rt_uint32_t *value)
 {
-	RT_ASSERT(offset < PMU_OFFSET_MAX);
+    RT_ASSERT(offset < PMU_OFFSET_MAX);
 
-	*value = FH_PMU_READL(offset);
-	return 0;
+    *value = FH_PMU_READL(offset);
+    return 0;
 }
 
 int  fh_pmu_write(rt_uint32_t offset, const rt_uint32_t value)
 {
-	RT_ASSERT(offset < PMU_OFFSET_MAX);
+    RT_ASSERT(offset < PMU_OFFSET_MAX);
 
-	FH_PMU_WRITEL(offset, value);
-	return 0;
+    FH_PMU_WRITEL(offset, value);
+    return 0;
 }
 
 int fh_pmu_write_mask(rt_uint32_t offset, const rt_uint32_t value,
-		      const rt_uint32_t mask)
+              const rt_uint32_t mask)
 {
-	RT_ASSERT(offset < PMU_OFFSET_MAX);
+    RT_ASSERT(offset < PMU_OFFSET_MAX);
 
-	FH_PMU_WRITEL_MASK(offset, value, mask);
-	return 0;
+    FH_PMU_WRITEL_MASK(offset, value, mask);
+    return 0;
 
 }
diff --git a/bsp/fh8620/platform/plat-v2/fh_pmu.h b/bsp/fh8620/platform/plat-v2/fh_pmu.h
index 19a6279d1a..4ecedd2fd4 100644
--- a/bsp/fh8620/platform/plat-v2/fh_pmu.h
+++ b/bsp/fh8620/platform/plat-v2/fh_pmu.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef FH_PMU_H_
 #define FH_PMU_H_
 
@@ -36,7 +36,7 @@
 #define     REG_PMU_PLL0_CTRL           (0x010)
 #define     REG_PMU_PLL1_CTRL           (0x014)
 #define     REG_PMU_ARC_CLK_GATE        (0x018)
-#define     REG_PMU_CLK_GATE        	(0x01c)
+#define     REG_PMU_CLK_GATE            (0x01c)
 #define     REG_PMU_CLK_SEL             (0x020)
 #define     REG_PMU_CLK_DIV0            (0x024)
 #define     REG_PMU_CLK_DIV1            (0x028)
diff --git a/bsp/fh8620/platform/plat-v2/iomux.c b/bsp/fh8620/platform/plat-v2/iomux.c
index 67acf6ca75..51b14f5937 100644
--- a/bsp/fh8620/platform/plat-v2/iomux.c
+++ b/bsp/fh8620/platform/plat-v2/iomux.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,34 +18,34 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include "rtdebug.h"
 #include "iomux.h"
 
 static void fh_iomux_setmfs(Iomux_Pad *pad)
 {
 
-	switch (pad->reg_type) {
-	case 8:
-		(IOMUX_PADTYPE(8)pad->reg)->bit.mfs = pad->func_sel;
-		break;
-	case 13:
-		(IOMUX_PADTYPE(13)pad->reg)->bit.mfs = pad->func_sel;
-		break;
-	case 20:
-		(IOMUX_PADTYPE(20)pad->reg)->bit.mfs = pad->func_sel;
-		break;
-	case 21:
-		(IOMUX_PADTYPE(21)pad->reg)->bit.mfs = pad->func_sel;
-		break;
-	default:
-		break;
-	}
+    switch (pad->reg_type) {
+    case 8:
+        (IOMUX_PADTYPE(8)pad->reg)->bit.mfs = pad->func_sel;
+        break;
+    case 13:
+        (IOMUX_PADTYPE(13)pad->reg)->bit.mfs = pad->func_sel;
+        break;
+    case 20:
+        (IOMUX_PADTYPE(20)pad->reg)->bit.mfs = pad->func_sel;
+        break;
+    case 21:
+        (IOMUX_PADTYPE(21)pad->reg)->bit.mfs = pad->func_sel;
+        break;
+    default:
+        break;
+    }
 
 }
 
@@ -53,50 +53,50 @@ static void fh_iomux_setmfs(Iomux_Pad *pad)
 
 static int fh_iomux_getmfs(Iomux_Pad *pad)
 {
-	int mfs;
+    int mfs;
 
-	switch (pad->reg_type) {
-	case 8:
-		mfs = (IOMUX_PADTYPE(8)pad->reg)->bit.mfs;
-		break;
-	case 13:
-		mfs = (IOMUX_PADTYPE(13)pad->reg)->bit.mfs;
-		break;
-	case 20:
-		mfs = (IOMUX_PADTYPE(20)pad->reg)->bit.mfs;
-		break;
-	case 21:
-		mfs = (IOMUX_PADTYPE(21)pad->reg)->bit.mfs;
-		break;
-	default:
-		mfs = -1;
-		break;
+    switch (pad->reg_type) {
+    case 8:
+        mfs = (IOMUX_PADTYPE(8)pad->reg)->bit.mfs;
+        break;
+    case 13:
+        mfs = (IOMUX_PADTYPE(13)pad->reg)->bit.mfs;
+        break;
+    case 20:
+        mfs = (IOMUX_PADTYPE(20)pad->reg)->bit.mfs;
+        break;
+    case 21:
+        mfs = (IOMUX_PADTYPE(21)pad->reg)->bit.mfs;
+        break;
+    default:
+        mfs = -1;
+        break;
 
-	}
-	return mfs;
+    }
+    return mfs;
 }
 
 
 static void fh_iomux_print()
 {
-	int i;
-	UINT32 reg;
+    int i;
+    UINT32 reg;
 
 
-	for (i = 0; i < ARRAY_SIZE(fh81_iomux_cfg); i++) {
-		int curr_func;
+    for (i = 0; i < ARRAY_SIZE(fh81_iomux_cfg); i++) {
+        int curr_func;
 
-		curr_func = fh81_iomux_getmfs(iomux_obj, &iomux_obj.pads[i]);
-		reg = readl((UINT32)iomux_obj.pads[i].reg);
+        curr_func = fh81_iomux_getmfs(iomux_obj, &iomux_obj.pads[i]);
+        reg = readl((UINT32)iomux_obj.pads[i].reg);
 
-		if (curr_func < 0)
-			rt_kprintf("\t%d\t\t%-8s(no mfs)\t0x%08x\n", i, iomux_obj.pads[i].func_name[0],
-				   reg);
-		else
-			rt_kprintf("\t%d\t\t%-16s\t0x%08x\n", i, iomux_obj.pads[i].func_name[curr_func],
-				   reg);
+        if (curr_func < 0)
+            rt_kprintf("\t%d\t\t%-8s(no mfs)\t0x%08x\n", i, iomux_obj.pads[i].func_name[0],
+                   reg);
+        else
+            rt_kprintf("\t%d\t\t%-16s\t0x%08x\n", i, iomux_obj.pads[i].func_name[curr_func],
+                   reg);
 
-	}
+    }
 
 }
 
@@ -105,90 +105,90 @@ static void fh_iomux_print()
 static void fh_iomux_setcur(Iomux_Pad *pad)
 {
 
-	switch (pad->reg_type) {
-	case 5:
-		(IOMUX_PADTYPE(5)pad->reg)->bit.e8_e4 = pad->drv_cur;
-		break;
-	case 8:
-		(IOMUX_PADTYPE(8)pad->reg)->bit.e8_e4 = pad->drv_cur;
-		break;
-	case 13:
-		(IOMUX_PADTYPE(13)pad->reg)->bit.e4_e2 = pad->drv_cur;
-		break;
-	case 17:
-		(IOMUX_PADTYPE(17)pad->reg)->bit.e8_e4 = pad->drv_cur;
-		break;
-	case 20:
-		(IOMUX_PADTYPE(20)pad->reg)->bit.e4_e2 = pad->drv_cur;
-		break;
-	case 21:
-		(IOMUX_PADTYPE(21)pad->reg)->bit.e4_e2 = pad->drv_cur;
-		break;
-	default:
-		break;
-	}
+    switch (pad->reg_type) {
+    case 5:
+        (IOMUX_PADTYPE(5)pad->reg)->bit.e8_e4 = pad->drv_cur;
+        break;
+    case 8:
+        (IOMUX_PADTYPE(8)pad->reg)->bit.e8_e4 = pad->drv_cur;
+        break;
+    case 13:
+        (IOMUX_PADTYPE(13)pad->reg)->bit.e4_e2 = pad->drv_cur;
+        break;
+    case 17:
+        (IOMUX_PADTYPE(17)pad->reg)->bit.e8_e4 = pad->drv_cur;
+        break;
+    case 20:
+        (IOMUX_PADTYPE(20)pad->reg)->bit.e4_e2 = pad->drv_cur;
+        break;
+    case 21:
+        (IOMUX_PADTYPE(21)pad->reg)->bit.e4_e2 = pad->drv_cur;
+        break;
+    default:
+        break;
+    }
 
 }
 
 static void fh_iomux_setpupd(Iomux_Pad *pad)
 {
 
-	switch (pad->reg_type) {
-	case 9:
-		(IOMUX_PADTYPE(9)pad->reg)->bit.pu_pd = pad->pupd;
-		break;
-	case 17:
-		(IOMUX_PADTYPE(17)pad->reg)->bit.pu_pd = pad->pupd;
-		break;
-	case 20:
-		(IOMUX_PADTYPE(20)pad->reg)->bit.pu_pd = pad->pupd;
-		break;
-	case 21:
-		(IOMUX_PADTYPE(21)pad->reg)->bit.pu_pd = pad->pupd;
-		break;
-	default:
-		break;
-	}
+    switch (pad->reg_type) {
+    case 9:
+        (IOMUX_PADTYPE(9)pad->reg)->bit.pu_pd = pad->pupd;
+        break;
+    case 17:
+        (IOMUX_PADTYPE(17)pad->reg)->bit.pu_pd = pad->pupd;
+        break;
+    case 20:
+        (IOMUX_PADTYPE(20)pad->reg)->bit.pu_pd = pad->pupd;
+        break;
+    case 21:
+        (IOMUX_PADTYPE(21)pad->reg)->bit.pu_pd = pad->pupd;
+        break;
+    default:
+        break;
+    }
 
 }
 
 static void fh_iomux_setrest(Iomux_Pad *pad)
 {
 
-	switch (pad->reg_type) {
-	case 5:
-		(IOMUX_PADTYPE(5)pad->reg)->bit.sr = 0;
-		break;
-	case 8:
-		(IOMUX_PADTYPE(8)pad->reg)->bit.sr = 0;
-		break;
-	case 9:
-		(IOMUX_PADTYPE(9)pad->reg)->bit.ie = 1;
-		(IOMUX_PADTYPE(9)pad->reg)->bit.smt = 1;
-		break;
-	case 13:
-		(IOMUX_PADTYPE(13)pad->reg)->bit.ie = 1;
-		(IOMUX_PADTYPE(13)pad->reg)->bit.smt = 1;
-		break;
-	case 17:
-		(IOMUX_PADTYPE(17)pad->reg)->bit.sr = 0;
-		(IOMUX_PADTYPE(17)pad->reg)->bit.ie = 1;
-		(IOMUX_PADTYPE(17)pad->reg)->bit.e = 1;
-		(IOMUX_PADTYPE(17)pad->reg)->bit.smt = 1;
-		break;
-	case 20:
-		(IOMUX_PADTYPE(20)pad->reg)->bit.sr = 0;
-		(IOMUX_PADTYPE(20)pad->reg)->bit.ie = 1;
-		(IOMUX_PADTYPE(20)pad->reg)->bit.smt = 1;
-		break;
-	case 21:
-		(IOMUX_PADTYPE(21)pad->reg)->bit.sr = 0;
-		(IOMUX_PADTYPE(21)pad->reg)->bit.ie = 1;
-		(IOMUX_PADTYPE(21)pad->reg)->bit.smt = 1;
-		break;
-	default:
-		break;
-	}
+    switch (pad->reg_type) {
+    case 5:
+        (IOMUX_PADTYPE(5)pad->reg)->bit.sr = 0;
+        break;
+    case 8:
+        (IOMUX_PADTYPE(8)pad->reg)->bit.sr = 0;
+        break;
+    case 9:
+        (IOMUX_PADTYPE(9)pad->reg)->bit.ie = 1;
+        (IOMUX_PADTYPE(9)pad->reg)->bit.smt = 1;
+        break;
+    case 13:
+        (IOMUX_PADTYPE(13)pad->reg)->bit.ie = 1;
+        (IOMUX_PADTYPE(13)pad->reg)->bit.smt = 1;
+        break;
+    case 17:
+        (IOMUX_PADTYPE(17)pad->reg)->bit.sr = 0;
+        (IOMUX_PADTYPE(17)pad->reg)->bit.ie = 1;
+        (IOMUX_PADTYPE(17)pad->reg)->bit.e = 1;
+        (IOMUX_PADTYPE(17)pad->reg)->bit.smt = 1;
+        break;
+    case 20:
+        (IOMUX_PADTYPE(20)pad->reg)->bit.sr = 0;
+        (IOMUX_PADTYPE(20)pad->reg)->bit.ie = 1;
+        (IOMUX_PADTYPE(20)pad->reg)->bit.smt = 1;
+        break;
+    case 21:
+        (IOMUX_PADTYPE(21)pad->reg)->bit.sr = 0;
+        (IOMUX_PADTYPE(21)pad->reg)->bit.ie = 1;
+        (IOMUX_PADTYPE(21)pad->reg)->bit.smt = 1;
+        break;
+    default:
+        break;
+    }
 
 }
 
@@ -198,13 +198,13 @@ extern const int fh_iomux_cfg_count;
 
 void __fh_setiomux(Iomux_Pad *pad, void *iobase)
 {
-	UINT32 regvalue = 0;
-	pad->reg = ®value;
-	fh_iomux_setmfs(pad);
-	fh_iomux_setcur(pad);
-	fh_iomux_setpupd(pad);
-	fh_iomux_setrest(pad);
-	SET_REG(iobase, regvalue);
+    UINT32 regvalue = 0;
+    pad->reg = ®value;
+    fh_iomux_setmfs(pad);
+    fh_iomux_setcur(pad);
+    fh_iomux_setpupd(pad);
+    fh_iomux_setrest(pad);
+    SET_REG(iobase, regvalue);
 }
 
 static UINT32 g_iomux_base;
@@ -212,73 +212,73 @@ static UINT32 g_iomux_base;
 void fh_iomux_init(UINT32 base)
 {
 
-//	return;
-	int i;
-//	int test_cnt = 0;
-	UINT32 reg;
-	g_iomux_base = base;
+//  return;
+    int i;
+//  int test_cnt = 0;
+    UINT32 reg;
+    g_iomux_base = base;
 
-	iomux_obj.pbase = (void *)base;
+    iomux_obj.pbase = (void *)base;
 
-//	iomux_obj.vbase = (UINT32 *)rt_malloc(1024);
-	iomux_obj.pads = fh_iomux_cfg;
+//  iomux_obj.vbase = (UINT32 *)rt_malloc(1024);
+    iomux_obj.pads = fh_iomux_cfg;
 
-	for (i = 0; i < fh_iomux_cfg_count; i++) {
+    for (i = 0; i < fh_iomux_cfg_count; i++) {
 #if (1)
-		iomux_obj.pads[i].id = i;
-		iomux_obj.pads[i].reg_offset = i * 4;
-		iomux_obj.pads[i].reg = ®//(UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset);
-		fh_iomux_setmfs(&fh_iomux_cfg[i]);
-		fh_iomux_setcur(&fh_iomux_cfg[i]);
-		fh_iomux_setpupd(&fh_iomux_cfg[i]);
-		fh_iomux_setrest(&fh_iomux_cfg[i]);
-		SET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset, reg);
-//			*((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset)));
-		//rt_kprintf("addr: 0x%x, pmu data: 0x%x\n", iomux_obj.pbase + iomux_obj.pads[i].reg_offset, GET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset));
-//		test_cnt++;
+        iomux_obj.pads[i].id = i;
+        iomux_obj.pads[i].reg_offset = i * 4;
+        iomux_obj.pads[i].reg = ®//(UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset);
+        fh_iomux_setmfs(&fh_iomux_cfg[i]);
+        fh_iomux_setcur(&fh_iomux_cfg[i]);
+        fh_iomux_setpupd(&fh_iomux_cfg[i]);
+        fh_iomux_setrest(&fh_iomux_cfg[i]);
+        SET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset, reg);
+//          *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[i].reg_offset)));
+        //rt_kprintf("addr: 0x%x, pmu data: 0x%x\n", iomux_obj.pbase + iomux_obj.pads[i].reg_offset, GET_REG(iomux_obj.pbase + iomux_obj.pads[i].reg_offset));
+//      test_cnt++;
 #else
 #ifdef FH_USING_JTAG
-		if (strncmp(fh_iomux_cfg[i].func_name[0], "JTAG", 4) == 0)
-			continue;
+        if (strncmp(fh_iomux_cfg[i].func_name[0], "JTAG", 4) == 0)
+            continue;
 #endif
 /*
-		if (strncmp(fh_iomux_cfg[i].func_name[1], "UART1", 5) == 0)
-			break;
+        if (strncmp(fh_iomux_cfg[i].func_name[1], "UART1", 5) == 0)
+            break;
 */
 
-		__fh_setiomux(&fh_iomux_cfg[i], (void *) base + i * 4);
+        __fh_setiomux(&fh_iomux_cfg[i], (void *) base + i * 4);
 #endif
-	}
+    }
 
 #ifdef CONFIG_RMII
-	//(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 1;
-	reg = GET_REG(0xf00000a4);
-	reg |= (1 << 13);
-	SET_REG(0xf00000a4, reg);
+    //(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 1;
+    reg = GET_REG(0xf00000a4);
+    reg |= (1 << 13);
+    SET_REG(0xf00000a4, reg);
 #else
-	//(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 0;
-	reg = GET_REG(0xf00000a4);
-	reg &= ~(1 << 13);
-	SET_REG(0xf00000a4, reg);
+    //(IOMUX_PADTYPE(17)(iomux_obj.pads[18]).reg)->bit.e = 0;
+    reg = GET_REG(0xf00000a4);
+    reg &= ~(1 << 13);
+    SET_REG(0xf00000a4, reg);
 #endif
 #ifdef IOMUX_DEBUG
-	fh_iomux_print(iomux_obj);
+    fh_iomux_print(iomux_obj);
 #endif
 
 
-	//rt_free(iomux_obj.vbase);
-	//iomux_obj.vbase = 0;
+    //rt_free(iomux_obj.vbase);
+    //iomux_obj.vbase = 0;
 
 }
 
 void fh_iomux_pin_switch(int pin_num, int func_num)
 {
-	RT_ASSERT(pin_num < fh_iomux_cfg_count);
-	__fh_setiomux(&fh_iomux_cfg[pin_num], (void *)g_iomux_base + pin_num * 4);
-	/*
-	   fh_iomux_cfg[pin_num].func_sel = func_num;
-	    fh_iomux_setmfs(&fh_iomux_cfg[pin_num]);
-	    SET_REG(iomux_obj.pbase + iomux_obj.pads[pin_num].reg_offset, *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[pin_num].reg_offset)));
-	*/
+    RT_ASSERT(pin_num < fh_iomux_cfg_count);
+    __fh_setiomux(&fh_iomux_cfg[pin_num], (void *)g_iomux_base + pin_num * 4);
+    /*
+       fh_iomux_cfg[pin_num].func_sel = func_num;
+        fh_iomux_setmfs(&fh_iomux_cfg[pin_num]);
+        SET_REG(iomux_obj.pbase + iomux_obj.pads[pin_num].reg_offset, *((UINT32 *)(iomux_obj.vbase + iomux_obj.pads[pin_num].reg_offset)));
+    */
 }
 
diff --git a/bsp/fh8620/platform/plat-v2/iomux.h b/bsp/fh8620/platform/plat-v2/iomux.h
index e03273b2b8..a0aa8d338e 100644
--- a/bsp/fh8620/platform/plat-v2/iomux.h
+++ b/bsp/fh8620/platform/plat-v2/iomux.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef IOMUX_H_
 #define IOMUX_H_
 
@@ -126,179 +126,179 @@
 #define PMU_PAD_MAC_TXER         (92)
 
 
-#define IOMUX_PADTYPE(n)		(Iomux_PadType##n *)
-#define IOMUX_PUPD_NONE			0
-#define IOMUX_PUPD_DOWN			1
-#define IOMUX_PUPD_UP			2
-#define IOMUX_PUPD_KEEPER		3
+#define IOMUX_PADTYPE(n)        (Iomux_PadType##n *)
+#define IOMUX_PUPD_NONE         0
+#define IOMUX_PUPD_DOWN         1
+#define IOMUX_PUPD_UP           2
+#define IOMUX_PUPD_KEEPER       3
 //#define IOMUX_DEBUG
 
 
 typedef union
 {
-	struct
-	{
-		UINT32	sr								:1;
-		UINT32	reserved_3_1					:3;
+    struct
+    {
+        UINT32  sr                              :1;
+        UINT32  reserved_3_1                    :3;
 
-		UINT32	e8_e4							:2;
-		UINT32	reserved_31_6					:24;
+        UINT32  e8_e4                           :2;
+        UINT32  reserved_31_6                   :24;
 
-	}bit;
-	UINT32 dw;
+    }bit;
+    UINT32 dw;
 }Iomux_PadType5;
 
 typedef union
 {
-	struct
-	{
-		UINT32	sr								:1;
-		UINT32	reserved_3_1					:3;
+    struct
+    {
+        UINT32  sr                              :1;
+        UINT32  reserved_3_1                    :3;
 
-		UINT32	e8_e4							:2;
-		UINT32	reserved_7_6					:2;
+        UINT32  e8_e4                           :2;
+        UINT32  reserved_7_6                    :2;
 
-		UINT32	mfs								:1;
-		UINT32	reserved_31_9					:23;
+        UINT32  mfs                             :1;
+        UINT32  reserved_31_9                   :23;
 
-	}bit;
-	UINT32 dw;
+    }bit;
+    UINT32 dw;
 }Iomux_PadType8;
 
 
 typedef union
 {
-	struct
-	{
-		UINT32	smt								:1;
-		UINT32	reserved_3_1					:3;
+    struct
+    {
+        UINT32  smt                             :1;
+        UINT32  reserved_3_1                    :3;
 
-		UINT32	ie								:1;
-		UINT32	reserved_7_5					:3;
+        UINT32  ie                              :1;
+        UINT32  reserved_7_5                    :3;
 
-		UINT32	pu_pd							:2;
-		UINT32	reserved_31_10					:22;
+        UINT32  pu_pd                           :2;
+        UINT32  reserved_31_10                  :22;
 
-	}bit;
-	UINT32 dw;
+    }bit;
+    UINT32 dw;
 }Iomux_PadType9;
 
 
 typedef union
 {
-	struct
-	{
-		UINT32	e4_e2							:2;
-		UINT32	reserved_3_2					:2;
+    struct
+    {
+        UINT32  e4_e2                           :2;
+        UINT32  reserved_3_2                    :2;
 
-		UINT32	smt								:1;
-		UINT32	reserved_7_5					:3;
+        UINT32  smt                             :1;
+        UINT32  reserved_7_5                    :3;
 
-		UINT32	ie								:1;
-		UINT32	reserved_11_9					:3;
+        UINT32  ie                              :1;
+        UINT32  reserved_11_9                   :3;
 
-		UINT32	mfs								:2;
-		UINT32	reserved_31_14					:18;
+        UINT32  mfs                             :2;
+        UINT32  reserved_31_14                  :18;
 
-	}bit;
-	UINT32 dw;
+    }bit;
+    UINT32 dw;
 }Iomux_PadType13;
 
 typedef union
 {
-	struct
-	{
-		UINT32	sr								:1;
-		UINT32	reserved_3_1					:3;
+    struct
+    {
+        UINT32  sr                              :1;
+        UINT32  reserved_3_1                    :3;
 
-		UINT32	e8_e4							:2;
-		UINT32	reserved_7_6					:2;
+        UINT32  e8_e4                           :2;
+        UINT32  reserved_7_6                    :2;
 
-		UINT32	smt								:1;
-		UINT32	reserved_11_9					:3;
+        UINT32  smt                             :1;
+        UINT32  reserved_11_9                   :3;
 
-		UINT32	ie								:1;
-		UINT32	e								:1;	//only for PAD_MAC_REF_CLK_CFG (0x00a4)
-		UINT32	reserved_15_12					:2;
+        UINT32  ie                              :1;
+        UINT32  e                               :1; //only for PAD_MAC_REF_CLK_CFG (0x00a4)
+        UINT32  reserved_15_12                  :2;
 
-		UINT32	pu_pd							:2;
-		UINT32	reserved_31_18					:14;
+        UINT32  pu_pd                           :2;
+        UINT32  reserved_31_18                  :14;
 
-	}bit;
-	UINT32 dw;
+    }bit;
+    UINT32 dw;
 }Iomux_PadType17;
 
 typedef union
 {
-	struct
-	{
-		UINT32	sr								:1;
-		UINT32	reserved_3_1					:3;
+    struct
+    {
+        UINT32  sr                              :1;
+        UINT32  reserved_3_1                    :3;
 
-		UINT32	e4_e2							:2;
-		UINT32	reserved_7_6					:2;
+        UINT32  e4_e2                           :2;
+        UINT32  reserved_7_6                    :2;
 
-		UINT32	smt								:1;
-		UINT32	reserved_11_9					:3;
+        UINT32  smt                             :1;
+        UINT32  reserved_11_9                   :3;
 
-		UINT32	ie								:1;
-		UINT32	reserved_15_13					:3;
+        UINT32  ie                              :1;
+        UINT32  reserved_15_13                  :3;
 
-		UINT32	pu_pd							:2;
-		UINT32	reserved_19_18					:2;
+        UINT32  pu_pd                           :2;
+        UINT32  reserved_19_18                  :2;
 
-		UINT32	mfs								:1;
-		UINT32	reserved_31_21					:11;
+        UINT32  mfs                             :1;
+        UINT32  reserved_31_21                  :11;
 
-	}bit;
-	UINT32 dw;
+    }bit;
+    UINT32 dw;
 }Iomux_PadType20;
 
 
 typedef union
 {
-	struct
-	{
-		UINT32	sr								:1;
-		UINT32	reserved_3_1					:3;
+    struct
+    {
+        UINT32  sr                              :1;
+        UINT32  reserved_3_1                    :3;
 
-		UINT32	e4_e2							:2;
-		UINT32	reserved_7_6					:2;
+        UINT32  e4_e2                           :2;
+        UINT32  reserved_7_6                    :2;
 
-		UINT32	smt								:1;
-		UINT32	reserved_11_9					:3;
+        UINT32  smt                             :1;
+        UINT32  reserved_11_9                   :3;
 
-		UINT32	ie								:1;
-		UINT32	reserved_15_13					:3;
+        UINT32  ie                              :1;
+        UINT32  reserved_15_13                  :3;
 
-		UINT32	pu_pd							:2;
-		UINT32	reserved_19_18					:2;
+        UINT32  pu_pd                           :2;
+        UINT32  reserved_19_18                  :2;
 
-		UINT32	mfs								:2;
-		UINT32	reserved_31_21					:10;
+        UINT32  mfs                             :2;
+        UINT32  reserved_31_21                  :10;
 
-	}bit;
-	UINT32 dw;
+    }bit;
+    UINT32 dw;
 }Iomux_PadType21;
 
 typedef struct
 {
     int id;
-	UINT32* reg;
-	UINT32 reg_offset;
-	char* func_name[4];
-	int reg_type;
-	int func_sel;
-	int drv_cur;
-	int pupd;
-	//UINT32 value;
+    UINT32* reg;
+    UINT32 reg_offset;
+    char* func_name[4];
+    int reg_type;
+    int func_sel;
+    int drv_cur;
+    int pupd;
+    //UINT32 value;
 }Iomux_Pad;
 
 typedef struct
 {
-	void  *vbase;
-	void  *pbase;
-	Iomux_Pad *pads;
+    void  *vbase;
+    void  *pbase;
+    Iomux_Pad *pads;
 }Iomux_Object;
 
 
diff --git a/bsp/fh8620/platform/plat-v2/reset.c b/bsp/fh8620/platform/plat-v2/reset.c
index 654a0745e9..aa7024169f 100644
--- a/bsp/fh8620/platform/plat-v2/reset.c
+++ b/bsp/fh8620/platform/plat-v2/reset.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include 
 #include 
 #include "fh_pmu.h"
@@ -32,13 +32,13 @@
 
 void machine_reset(void)
 {
-	fh_pmu_write(REG_PMU_SWRST_MAIN_CTRL, 0x7fffffff);
+    fh_pmu_write(REG_PMU_SWRST_MAIN_CTRL, 0x7fffffff);
 }
 
 void machine_shutdown(void)
 {
-	while(1)
-		;
+    while(1)
+        ;
 
 }
 
diff --git a/bsp/fh8620/platform/plat-v2/timer.c b/bsp/fh8620/platform/plat-v2/timer.c
index de831db3c6..96bcc6f39d 100644
--- a/bsp/fh8620/platform/plat-v2/timer.c
+++ b/bsp/fh8620/platform/plat-v2/timer.c
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
@@ -43,48 +43,48 @@ static unsigned long long timestamp;
 
 rt_uint32_t read_pts(void)
 {
-	return GET_REG(REG_PAE_PTS_REG);
+    return GET_REG(REG_PAE_PTS_REG);
 }
 
 unsigned long long get_ticks(void)
 {
-	rt_uint32_t now = read_pts();
-	if (now >= lastdec) {
-		/* normal mode */
-		timestamp += now - lastdec;
-	} else {
-		now = read_pts();
-		if (now >= lastdec)
-			timestamp += now - lastdec;
-		else {
-			/* we have an overflow ... */
-			timestamp += now + 0xffffffff - lastdec;
-		}
-	}
-	lastdec = now;
-	return timestamp / (TICKS_PER_USEC * 10);
+    rt_uint32_t now = read_pts();
+    if (now >= lastdec) {
+        /* normal mode */
+        timestamp += now - lastdec;
+    } else {
+        now = read_pts();
+        if (now >= lastdec)
+            timestamp += now - lastdec;
+        else {
+            /* we have an overflow ... */
+            timestamp += now + 0xffffffff - lastdec;
+        }
+    }
+    lastdec = now;
+    return timestamp / (TICKS_PER_USEC * 10);
 }
 
 void udelay(unsigned long usec)
 {
-	unsigned long long tmp;
-	rt_uint32_t tmo;
-	tmo = (usec + 9) / 10;
-	tmp = get_ticks() + tmo; /* get current timestamp */
+    unsigned long long tmp;
+    rt_uint32_t tmo;
+    tmo = (usec + 9) / 10;
+    tmp = get_ticks() + tmo; /* get current timestamp */
 
-	while (get_ticks() < tmp)
-		/* loop till event */
-		/*NOP*/;
+    while (get_ticks() < tmp)
+        /* loop till event */
+        /*NOP*/;
 }
 
 void rt_timer_handler(int vector, void *param)
 {
-	timer *tim = param;
+    timer *tim = param;
 
-	rt_interrupt_enter();
-	timer_get_eoi(tim);
-	rt_tick_increase();
-	rt_interrupt_leave();
+    rt_interrupt_enter();
+    timer_get_eoi(tim);
+    rt_tick_increase();
+    rt_interrupt_leave();
 }
 
 /**
@@ -92,18 +92,18 @@ void rt_timer_handler(int vector, void *param)
  */
 void rt_hw_timer_init()
 {
-	timer *tim = (timer *) TMR_REG_BASE;
-	timer_init(tim);
-	/* install interrupt handler */
-	rt_hw_interrupt_install(TMR0_IRQn, rt_timer_handler, (void *) tim,
-				"sys_tick");
-	rt_hw_interrupt_umask(TMR0_IRQn);
+    timer *tim = (timer *) TMR_REG_BASE;
+    timer_init(tim);
+    /* install interrupt handler */
+    rt_hw_interrupt_install(TMR0_IRQn, rt_timer_handler, (void *) tim,
+                "sys_tick");
+    rt_hw_interrupt_umask(TMR0_IRQn);
 
-	timer_set_mode(tim, TIMER_MODE_PERIODIC);
-	timer_set_period(tim, RT_TICK_PER_SECOND, TIMER_CLOCK);
-	//timer_set_period(tim, RT_TIMER_TICK_PER_SECOND, TIMER_CLOCK);
-	timer_enable_irq(tim);
-	timer_enable(tim);
+    timer_set_mode(tim, TIMER_MODE_PERIODIC);
+    timer_set_period(tim, RT_TICK_PER_SECOND, TIMER_CLOCK);
+    //timer_set_period(tim, RT_TIMER_TICK_PER_SECOND, TIMER_CLOCK);
+    timer_enable_irq(tim);
+    timer_enable(tim);
 
 }
 
diff --git a/bsp/fh8620/platform/plat-v2/timer.h b/bsp/fh8620/platform/plat-v2/timer.h
index 5ee024a094..bbccdfa826 100644
--- a/bsp/fh8620/platform/plat-v2/timer.h
+++ b/bsp/fh8620/platform/plat-v2/timer.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef TIMER_H_
 #define TIMER_H_
 
diff --git a/bsp/fh8620/platform/platform_def.h b/bsp/fh8620/platform/platform_def.h
index b511863981..a576220f3e 100644
--- a/bsp/fh8620/platform/platform_def.h
+++ b/bsp/fh8620/platform/platform_def.h
@@ -1,8 +1,8 @@
 /*
  *  This file is part of FH8620 BSP for RT-Thread distribution.
  *
- *	Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. 
- *	All rights reserved
+ *  Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
+ *  All rights reserved
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -18,12 +18,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
- *	Visit http://www.fullhan.com to get contact with Fullhan.
+ *  Visit http://www.fullhan.com to get contact with Fullhan.
  *
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #ifndef PLATFORM_DEF_H_
 #define PLATFORM_DEF_H_
 
diff --git a/bsp/fh8620/rtconfig.h b/bsp/fh8620/rtconfig.h
index 8b7ce31be1..78749abdfa 100644
--- a/bsp/fh8620/rtconfig.h
+++ b/bsp/fh8620/rtconfig.h
@@ -5,19 +5,19 @@
 // 
 
 // 
-#define RT_NAME_MAX	16
+#define RT_NAME_MAX 16
 // 
-#define RT_ALIGN_SIZE	4
+#define RT_ALIGN_SIZE   4
 // 
 // 8
 // 32
 // 256
 // 
-#define RT_THREAD_PRIORITY_MAX	256
+#define RT_THREAD_PRIORITY_MAX  256
 // 
-#define RT_TICK_PER_SECOND	100
+#define RT_TICK_PER_SECOND  100
 // 
-#define IDLE_THREAD_STACK_SIZE	512
+#define IDLE_THREAD_STACK_SIZE  512
 // 
 // #define RT_USING_MODULE
 // 
@@ -36,11 +36,11 @@
 // 

 // #define RT_USING_TIMER_SOFT
 // 
-#define RT_TIMER_THREAD_PRIO	4
+#define RT_TIMER_THREAD_PRIO    4
 // 
-#define RT_TIMER_THREAD_STACK_SIZE	512
+#define RT_TIMER_THREAD_STACK_SIZE  512
 // 
-#define RT_TIMER_TICK_PER_SECOND	100
+#define RT_TIMER_TICK_PER_SECOND    100
 // 

 
 // 

@@ -86,13 +86,13 @@
 // 
 //#define RT_USING_RTC
 // 
-#define RT_MMCSD_THREAD_PREORITY	15
+#define RT_MMCSD_THREAD_PREORITY    15
 // 

 #define RT_USING_CONSOLE
 // 
-#define RT_CONSOLEBUF_SIZE	128
+#define RT_CONSOLEBUF_SIZE  128
 // 
-#define RT_CONSOLE_DEVICE_NAME	"uart1"
+#define RT_CONSOLE_DEVICE_NAME  "uart1"
 // 

 
 // 
@@ -105,7 +105,7 @@
 // 
 #define FINSH_USING_DESCRIPTION
 // 
-#define FINSH_THREAD_STACK_SIZE	4096
+#define FINSH_THREAD_STACK_SIZE 4096
 // 

 
 // 

@@ -124,9 +124,9 @@
 // 
 #define DFS_USING_WORKDIR
 // 
-#define DFS_FILESYSTEMS_MAX	2
+#define DFS_FILESYSTEMS_MAX 2
 // 
-#define DFS_FD_MAX	16
+#define DFS_FD_MAX  16
 // 
 #define RT_USING_DFS_ELMFAT
 // 
@@ -138,13 +138,13 @@
 // 2
 // 3
 // 
-#define RT_DFS_ELM_USE_LFN	3
+#define RT_DFS_ELM_USE_LFN  3
 // 
-#define RT_DFS_ELM_CODE_PAGE	936
+#define RT_DFS_ELM_CODE_PAGE    936
 // 
 #define RT_DFS_ELM_CODE_PAGE_FILE
 // 
-#define RT_DFS_ELM_MAX_LFN	255
+#define RT_DFS_ELM_MAX_LFN  255
 // 
 #define RT_DFS_ELM_MAX_SECTOR_SIZE  4096
 // 
@@ -174,19 +174,19 @@
 // 
 #define RT_LWIP_DHCP
 // 
-#define RT_LWIP_TCPTHREAD_PRIORITY	12
+#define RT_LWIP_TCPTHREAD_PRIORITY  12
 // 
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE	8
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
 // 
-#define RT_LWIP_TCPTHREAD_STACKSIZE	4096
+#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
 // 
-#define RT_LWIP_ETHTHREAD_PRIORITY	14
+#define RT_LWIP_ETHTHREAD_PRIORITY  14
 // 
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE	8
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
 // 
-#define RT_LWIP_ETHTHREAD_STACKSIZE	512
+#define RT_LWIP_ETHTHREAD_STACKSIZE 512
 // 
-#define    RT_LWIP_IPADDR    "192.168.1.30"  
+#define    RT_LWIP_IPADDR    "192.168.1.30"
 // 
 #define    RT_LWIP_GWADDR    "192.168.1.1"
 // 
diff --git a/bsp/nuvoton/libraries/m2354/rtt_port/SConscript b/bsp/nuvoton/libraries/m2354/rtt_port/SConscript
index 549b75901b..0822565fbb 100644
--- a/bsp/nuvoton/libraries/m2354/rtt_port/SConscript
+++ b/bsp/nuvoton/libraries/m2354/rtt_port/SConscript
@@ -10,12 +10,12 @@ group = []
 
 # USB driver constrain
 if GetDepend('BOARD_USING_USBD') and ( GetDepend('BSP_USING_OTG') or GetDepend('BSP_USING_USBH') ):
-    print 'Sorry, wrong selection.'
-    print '[Hint] You already select BOARD_USING_USBD. Please de-select BSP_USING_OTG and BSP_USING_USBH.'
+    print ('Sorry, wrong selection.')
+    print ('[Hint] You already select BOARD_USING_USBD. Please de-select BSP_USING_OTG and BSP_USING_USBH.')
     sys.exit(1)
 elif GetDepend('BOARD_USING_USBH') and ( GetDepend('BSP_USING_OTG') or GetDepend('BSP_USING_USBD') ):
-    print 'Sorry, wrong selection.'
-    print '[Hint] You already select BOARD_USING_USBH. Please de-select BSP_USING_OTG and BSP_USING_USBD options.'
+    print ('Sorry, wrong selection.')
+    print ('[Hint] You already select BOARD_USING_USBH. Please de-select BSP_USING_OTG and BSP_USING_USBD options.')
     sys.exit(1)
 else:
     group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
diff --git a/bsp/nuvoton/libraries/m480/rtt_port/SConscript b/bsp/nuvoton/libraries/m480/rtt_port/SConscript
index 77bd290714..2e80314127 100644
--- a/bsp/nuvoton/libraries/m480/rtt_port/SConscript
+++ b/bsp/nuvoton/libraries/m480/rtt_port/SConscript
@@ -10,24 +10,24 @@ group = []
 
 # USB driver constrain
 if GetDepend('BOARD_USING_HSUSBD') and ( GetDepend('BSP_USING_USBD') or GetDepend('BSP_USING_HSUSBH') or GetDepend('BSP_USING_HSOTG') ):
-    print 'Sorry, wrong selection.'
-    print '[Hint] You already select BOARD_USING_HSUSBD. Please de-select BSP_USING_USBD, BSP_USING_HSUSBH and BSP_USING_HSOTG options.'
+    print ('Sorry, wrong selection.')
+    print ('[Hint] You already select BOARD_USING_HSUSBD. Please de-select BSP_USING_USBD, BSP_USING_HSUSBH and BSP_USING_HSOTG options.')
     sys.exit(1)
 elif GetDepend('BOARD_USING_HSUSBD_USBH') and ( GetDepend('BSP_USING_USBD') or GetDepend('BSP_USING_HSUSBH') or GetDepend('BSP_USING_HSOTG') ):
-    print 'Sorry, wrong selection.'
-    print '[Hint] You already select BOARD_USING_HSUSBD_USBH. Please de-select BSP_USING_USBD, BSP_USING_HSUSBH and BSP_USING_HSOTG options.'
+    print ('Sorry, wrong selection.')
+    print ('[Hint] You already select BOARD_USING_HSUSBD_USBH. Please de-select BSP_USING_USBD, BSP_USING_HSUSBH and BSP_USING_HSOTG options.')
     sys.exit(1)
 elif GetDepend('BOARD_USING_HSUSBH') and ( GetDepend('BSP_USING_USBH') or GetDepend('BSP_USING_HSUSBD') or GetDepend('BSP_USING_HSOTG') ):
-    print 'Sorry, wrong selection.'
-    print '[Hint] You already select BOARD_USING_HSUSBH. Please de-select BSP_USING_USBH, BSP_USING_HSUSBD and BSP_USING_HSOTG options.'
+    print ('Sorry, wrong selection.')
+    print ('[Hint] You already select BOARD_USING_HSUSBH. Please de-select BSP_USING_USBH, BSP_USING_HSUSBD and BSP_USING_HSOTG options.')
     sys.exit(1)
 elif GetDepend('BOARD_USING_HSUSBH_USBD') and ( GetDepend('BSP_USING_USBH') or GetDepend('BSP_USING_HSUSBD') or GetDepend('BSP_USING_HSOTG') ):
-    print 'Sorry, wrong selection.'
-    print '[Hint] You already select BOARD_USING_HSUSBH_USBD. Please de-select BSP_USING_USBH, BSP_USING_HSUSBD and BSP_USING_HSOTG options.'
+    print ('Sorry, wrong selection.')
+    print ('[Hint] You already select BOARD_USING_HSUSBH_USBD. Please de-select BSP_USING_USBH, BSP_USING_HSUSBD and BSP_USING_HSOTG options.')
     sys.exit(1)
 elif GetDepend('BOARD_USING_HSOTG') and ( GetDepend('BSP_USING_USBD') or GetDepend('BSP_USING_USBH') ):
-    print 'Sorry, wrong selection.'
-    print '[Hint] You already select BOARD_USING_HSOTG. Please de-select BSP_USING_USBD and BSP_USING_USBH options.'
+    print ('Sorry, wrong selection.')
+    print ('[Hint] You already select BOARD_USING_HSOTG. Please de-select BSP_USING_USBD and BSP_USING_USBH options.')
     sys.exit(1)
 else:
     group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
diff --git a/bsp/raspberry-pico/README.md b/bsp/raspberry-pico/README.md
index c238850b9b..eaac07017b 100644
--- a/bsp/raspberry-pico/README.md
+++ b/bsp/raspberry-pico/README.md
@@ -64,14 +64,14 @@ msh >
 
 ## Peripheral Condition
 
-| Drive | Support | Remark |
-| ----- | ------- | ------ |
-| UART  | Support | UART0  |
-| GPIO  | Support | 0-29   |
-| I2C   | -       | -      |
-| RTC   | -       | -      |
-| SDIO  | -       | -      |
-| SPI   | -       | -      |
-| TIMER | -       | -      |
-| WDT   | -       | -      |
+| Drive | Support | Remark  |
+| ----- | ------- | ------- |
+| UART  | Support | UART0/1 |
+| GPIO  | Support | 0-29    |
+| I2C   | -       | -       |
+| RTC   | -       | -       |
+| SDIO  | -       | -       |
+| SPI   | -       | -       |
+| TIMER | -       | -       |
+| WDT   | -       | -       |
 
diff --git a/bsp/raspberry-pico/drivers/board.c b/bsp/raspberry-pico/drivers/board.c
index af8bcb4f80..ff99bbfe86 100644
--- a/bsp/raspberry-pico/drivers/board.c
+++ b/bsp/raspberry-pico/drivers/board.c
@@ -16,8 +16,6 @@
 #include "board.h"
 #include "hardware/structs/systick.h"
 
-uint8_t heap[1024 * 80];
-
 void isr_systick(void)
 {
     /* enter interrupt */
@@ -45,11 +43,25 @@ uint32_t systick_config(uint32_t ticks)
 
 void rt_hw_board_init()
 {
+    rt_system_heap_init(HEAP_BEGIN, HEAP_END);
+
+    alarm_pool_init_default();
+
+    // Start and end points of the constructor list,
+    // defined by the linker script.
+    extern void (*__init_array_start)();
+    extern void (*__init_array_end)();
+
+    // Call each function in the list.
+    // We have to take the address of the symbols, as __init_array_start *is*
+    // the first function pointer, not the address of it.
+    for (void (**p)() = &__init_array_start; p < &__init_array_end; ++p) {
+        (*p)();
+    }
+
     /* Configure the SysTick */
     systick_config(frequency_count_khz(CLOCKS_FC0_SRC_VALUE_ROSC_CLKSRC)*10000/RT_TICK_PER_SECOND);
 
-    rt_system_heap_init(heap, (uint8_t *)heap + sizeof(heap));
-
     stdio_init_all();
     rt_hw_uart_init();
 
diff --git a/bsp/raspberry-pico/drivers/board.h b/bsp/raspberry-pico/drivers/board.h
index e762b479f8..0c418d5c4e 100644
--- a/bsp/raspberry-pico/drivers/board.h
+++ b/bsp/raspberry-pico/drivers/board.h
@@ -20,9 +20,9 @@
 #define PICO_SRAM_SIZE         256
 #define PICO_SRAM_END          (0x20000000 + PICO_SRAM_SIZE * 1024)
 
-extern int __bss_end;
-#define HEAP_BEGIN      (&__bss_end)
-#define HEAP_END        PICO_SRAM_END
+extern int __bss_end__;
+#define HEAP_BEGIN      (&__bss_end__)
+#define HEAP_END        ((void *)PICO_SRAM_END)
 
 int rt_hw_uart_init(void);
 
diff --git a/bsp/raspberry-pico/drivers/drv_uart.c b/bsp/raspberry-pico/drivers/drv_uart.c
index 925968f6d7..6077b60f92 100644
--- a/bsp/raspberry-pico/drivers/drv_uart.c
+++ b/bsp/raspberry-pico/drivers/drv_uart.c
@@ -153,3 +153,130 @@ int rt_hw_uart_init(void)
     return ret;
 }
 // INIT_DEVICE_EXPORT(rt_hw_uart_init);
+
+// We are using pins 0 and 1, but see the GPIO function select table in the
+// datasheet for information on which other pins can be used.
+#define UART1_TX_PIN 4
+#define UART1_RX_PIN 5
+
+static struct pico_uart1_dev uart1_dev;
+
+struct pico_uart1_dev
+{
+    struct rt_serial_device parent;
+    rt_uint32_t uart_periph;
+    rt_uint32_t irqno;
+};
+
+void pico_uart1_isr(void)
+{
+    rt_interrupt_enter();
+    /* read interrupt status and clear it */
+    if (uart_is_readable(uart1)) /* rx ind */
+    {
+        rt_hw_serial_isr(&uart1_dev.parent, RT_SERIAL_EVENT_RX_IND);
+    }
+
+    rt_interrupt_leave();
+}
+
+/*
+ * UART interface
+ */
+static rt_err_t pico_uart1_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    return RT_EOK;
+}
+
+static rt_err_t pico_uart1_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    switch (cmd)
+    {
+    /* enable interrupt */
+    case RT_DEVICE_CTRL_SET_INT:
+        // Set up a RX interrupt
+        // We need to set up the handler first
+        // And set up and enable the interrupt handlers
+        irq_set_exclusive_handler(UART1_IRQ, pico_uart1_isr);
+        irq_set_enabled(UART1_IRQ, true);
+
+        // Now enable the UART to send interrupts - RX only
+        uart_set_irq_enables(uart1, true, false);
+        break;
+    }
+    return RT_EOK;
+}
+
+static int pico_uart1_putc(struct rt_serial_device *serial, char c)
+{
+    uart_putc_raw(uart1, c);
+
+    return 1;
+}
+
+static int pico_uart1_getc(struct rt_serial_device *serial)
+{
+    int ch;
+
+    if (uart_is_readable(uart1))
+    {
+        ch = uart_get_hw(uart1)->dr;
+    }
+    else
+    {
+        ch =-1;
+    }
+
+    return ch;
+}
+
+const static struct rt_uart_ops _uart1_ops =
+{
+    pico_uart1_configure,
+    pico_uart1_control,
+    pico_uart1_putc,
+    pico_uart1_getc,
+    RT_NULL,
+};
+
+/*
+ * UART Initiation
+ */
+int rt_hw_uart1_init(void)
+{
+    rt_err_t ret = RT_EOK;
+
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+    uart_init(uart1, 115200);
+
+    // Set the TX and RX pins by using the function select on the GPIO
+    // Set datasheet for more information on function select
+    gpio_set_function(UART1_TX_PIN, GPIO_FUNC_UART);
+    gpio_set_function(UART1_RX_PIN, GPIO_FUNC_UART);
+
+    // Actually, we want a different speed
+    // The call will return the actual baud rate selected, which will be as close as
+    // possible to that requested
+    uart_set_baudrate(uart1, BAUD_RATE);
+
+    // Set UART flow control CTS/RTS, we don't want these, so turn them off
+    uart_set_hw_flow(uart1, false, false);
+
+    // Set our data format
+    uart_set_format(uart1, DATA_BITS, STOP_BITS, PARITY);
+
+    // Turn off FIFO's - we want to do this character by character
+    uart_set_fifo_enabled(uart1, false);
+
+    uart1_dev.parent.ops = &_uart1_ops;
+    uart1_dev.parent.config = config;
+
+    ret = rt_hw_serial_register(&uart1_dev.parent,
+                                "uart1",
+                                RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+                                &uart1_dev);
+
+    return ret;
+}
+INIT_DEVICE_EXPORT(rt_hw_uart1_init);
diff --git a/bsp/raspberry-pico/libraries/pico-sdk/src/rp2_common/pico_runtime/runtime.c b/bsp/raspberry-pico/libraries/pico-sdk/src/rp2_common/pico_runtime/runtime.c
index 98104db73a..98f124f0a3 100644
--- a/bsp/raspberry-pico/libraries/pico-sdk/src/rp2_common/pico_runtime/runtime.c
+++ b/bsp/raspberry-pico/libraries/pico-sdk/src/rp2_common/pico_runtime/runtime.c
@@ -27,6 +27,7 @@
 #endif
 
 extern char __StackLimit; /* Set by linker.  */
+extern void _exit(int status);
 
 uint32_t __attribute__((section(".ram_vector_table"))) ram_vector_table[48];
 
@@ -136,57 +137,6 @@ void runtime_init(void) {
 
     spin_locks_reset();
     irq_init_priorities();
-    alarm_pool_init_default();
-
-    // Start and end points of the constructor list,
-    // defined by the linker script.
-    extern void (*__init_array_start)();
-    extern void (*__init_array_end)();
-
-    // Call each function in the list.
-    // We have to take the address of the symbols, as __init_array_start *is*
-    // the first function pointer, not the address of it.
-    for (void (**p)() = &__init_array_start; p < &__init_array_end; ++p) {
-        (*p)();
-    }
-
-}
-
-void _exit(int status) {
-#if PICO_ENTER_USB_BOOT_ON_EXIT
-    reset_usb_boot(0,0);
-#else
-    while (1) {
-        __breakpoint();
-    }
-#endif
-}
-
-void *_sbrk(int incr) {
-    extern char end; /* Set by linker.  */
-    static char *heap_end;
-    char *prev_heap_end;
-
-    if (heap_end == 0)
-        heap_end = &end;
-
-    prev_heap_end = heap_end;
-    char *next_heap_end = heap_end + incr;
-
-    if (__builtin_expect(next_heap_end >= (&__StackLimit), false)) {
-#if PICO_USE_OPTIMISTIC_SBRK
-        if (next_heap_end == &__StackLimit) {
-//        errno = ENOMEM;
-            return (char *) -1;
-        }
-        next_heap_end = &__StackLimit;
-#else
-        return (char *) -1;
-#endif
-    }
-
-    heap_end = next_heap_end;
-    return (void *) prev_heap_end;
 }
 
 // exit is not useful... no desire to pull in __call_exitprocs
diff --git a/bsp/raspberry-pico/link.ld b/bsp/raspberry-pico/link.ld
index 898139432f..ae2889b0fd 100644
--- a/bsp/raspberry-pico/link.ld
+++ b/bsp/raspberry-pico/link.ld
@@ -224,13 +224,6 @@ SECTIONS
         __bss_end__ = .;
     } > RAM
 
-    .heap (COPY):
-    {
-        __end__ = .;
-        end = __end__;
-        *(.heap*)
-        __HeapLimit = .;
-    } > RAM
 
     /* .stack*_dummy section doesn't contains any symbols. It is only
      * used for linker to calculate size of stack sections, and assign
@@ -263,7 +256,7 @@ SECTIONS
     PROVIDE(__stack = __StackTop);
 
     /* Check if data + heap + stack exceeds RAM limit */
-    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed")
+    ASSERT(__StackLimit >= __bss_end__, "region RAM overflowed")
     /* todo assert on extra code */
 }
 
diff --git a/bsp/rx/ReadMe.txt b/bsp/rx/README.md
similarity index 100%
rename from bsp/rx/ReadMe.txt
rename to bsp/rx/README.md
diff --git a/bsp/rx/applications/application.c b/bsp/rx/applications/application.c
index 4a6e250429..2013a3c69a 100644
--- a/bsp/rx/applications/application.c
+++ b/bsp/rx/applications/application.c
@@ -1,11 +1,7 @@
 /*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -14,7 +10,7 @@
  */
 
 /**
- * @addtogroup STM32
+ * @addtogroup
  */
 /*@{*/
 
diff --git a/bsp/rx/applications/startup.c b/bsp/rx/applications/startup.c
index 4b195492f6..92d415c620 100644
--- a/bsp/rx/applications/startup.c
+++ b/bsp/rx/applications/startup.c
@@ -1,11 +1,7 @@
 /*
- * File      : startup.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -90,7 +86,7 @@ int main(void)
 {
 
   rt_hw_system_freq_init();
-   
+
   __enable_interrupt();
     /* disable interrupt first */
     rt_hw_interrupt_disable();
diff --git a/bsp/rx/drivers/Uart.h b/bsp/rx/drivers/Uart.h
index 9354861ca3..cc8aeaf5df 100644
--- a/bsp/rx/drivers/Uart.h
+++ b/bsp/rx/drivers/Uart.h
@@ -1,3 +1,11 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
 
 #ifndef __UART_H__
 #define __UART_H__
diff --git a/bsp/rx/drivers/board.c b/bsp/rx/drivers/board.c
index 4e02325325..aa80014066 100644
--- a/bsp/rx/drivers/board.c
+++ b/bsp/rx/drivers/board.c
@@ -1,3 +1,12 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
+
 #include 
 #include 
 #include "board.h"
@@ -17,7 +26,7 @@
  *
  */
 #pragma vector = VECT_CMT0_CMI0
-__interrupt 
+__interrupt
 void SysTick_Handler(void)
 {
    // __enable_interrupt();
@@ -56,7 +65,7 @@ void  rt_hw_systick_init(void)
 }
 
 void rt_hw_system_freq_init(void)
-{ 
+{
    /* Declare error flag */
   bool err = true;
 
@@ -69,15 +78,15 @@ void rt_hw_system_freq_init(void)
     24E6,
     PDL_NO_DATA
     );
-  /* 
+  /*
   Clock Description              Frequency
   ----------------------------------------
   Input Clock Frequency..............12MHz
-  Internal Clock Frequency...........96MHz    
+  Internal Clock Frequency...........96MHz
   Peripheral Clock Frequency.........48MHz
   External Bus Clock Frequency.......24MHz */
 
-  /* Halt in while loop when RPDL errors detected */    
+  /* Halt in while loop when RPDL errors detected */
   while (!err);
 }
 
@@ -86,8 +95,8 @@ void rt_hw_system_freq_init(void)
  */
 void rt_hw_board_init()
 {
-    
-    rt_hw_system_freq_init();               
+
+    rt_hw_system_freq_init();
     rt_hw_systick_init();
     rt_hw_uart_init();
 #ifdef RT_USING_CONSOLE
diff --git a/bsp/rx/drivers/board.h b/bsp/rx/drivers/board.h
index 870e805a99..117521d033 100644
--- a/bsp/rx/drivers/board.h
+++ b/bsp/rx/drivers/board.h
@@ -1,11 +1,21 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
+
+
 #ifndef __BOARD_H__
 #define __BOARD_H__
 
 
-#define		XTAL_FREQUENCY (12000000L)
-#define		ICLK_MUL (8)
-#define		PCLK_MUL (4)
-#define		BCLK_MUL (2)
+#define     XTAL_FREQUENCY (12000000L)
+#define     ICLK_MUL (8)
+#define     PCLK_MUL (4)
+#define     BCLK_MUL (2)
 
 #define RX62N_SRAM_END 0x0000ffff
 
diff --git a/bsp/rx/drivers/uart.c b/bsp/rx/drivers/uart.c
index 9e304ac95c..37d65ba8c0 100644
--- a/bsp/rx/drivers/uart.c
+++ b/bsp/rx/drivers/uart.c
@@ -1,9 +1,11 @@
 /*
-*********************************************************************************************************
-* Filename      : uart.c
-*********************************************************************************************************
-*/
-
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
 
 #include 
 #include 
@@ -22,18 +24,18 @@
 
 
                           /* Clock selection control */
-#define SCI_CKS_MIN		0
-#define SCI_CKS_MAX		3
-#define SCI_CKS_STEP	1
+#define SCI_CKS_MIN     0
+#define SCI_CKS_MAX     3
+#define SCI_CKS_STEP    1
 
 
-#define	IPR_ADDRESS(a) ((volatile unsigned char *)&ICU.IPR[IPR_SCI0_ + a])
+#define IPR_ADDRESS(a) ((volatile unsigned char *)&ICU.IPR[IPR_SCI0_ + a])
 //#define IER_ADDRESS(a) ((volatile unsigned char *)&(ICU.IER[IER_SCI0_ERI0 + a])/sizeof(unsigned char))
-#define	ERI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_ERI0] + ((4 * a) / sizeof(unsigned char)) )
-#define	IER_ADDRESS(a) ((volatile unsigned char *)&ICU.IER[IER_SCI0_ERI0] + ((4 * a) / sizeof(unsigned char)) )
-#define	RXI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_RXI0] + ((4 * a) / sizeof(unsigned char)) )
-#define	TXI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_TXI0] + ((4 * a) / sizeof(unsigned char)) )
-#define	TEI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_TEI0] + ((4 * a) / sizeof(unsigned char)) )
+#define ERI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_ERI0] + ((4 * a) / sizeof(unsigned char)) )
+#define IER_ADDRESS(a) ((volatile unsigned char *)&ICU.IER[IER_SCI0_ERI0] + ((4 * a) / sizeof(unsigned char)) )
+#define RXI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_RXI0] + ((4 * a) / sizeof(unsigned char)) )
+#define TXI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_TXI0] + ((4 * a) / sizeof(unsigned char)) )
+#define TEI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_TEI0] + ((4 * a) / sizeof(unsigned char)) )
 #define  RXI_DTCER_ADDRESS(a) (( volatile unsigned char *)&ICU.DTCER[IR_SCI0_RXI0]+ ((4*a)/sizeof(unsigned char)))
 #define  TXI_DTCER_ADDRESS(a) (( volatile unsigned char *)&ICU.DTCER[IR_SCI0_TXI0]+ ((4*a) / sizeof(unsigned char)))
 //#define SCI1_USE_B
@@ -44,8 +46,8 @@
 #define SourceClk 12000000
 #define rpdl_CGC_f_pclk SourceClk * 4
 /* Idle output options */
-#define SPACE	0
-#define MARK	1
+#define SPACE   0
+#define MARK    1
 
 typedef int UART_ID_Type;
 typedef int IRQn_Type;
@@ -55,14 +57,14 @@ typedef int IRQn_Type;
 struct rx_uart
 {
     UART_ID_Type UART;
-    volatile struct st_sci __sfr * sci;    
+    volatile struct st_sci __sfr * sci;
 };
 
 static rt_err_t rx_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
     #if 1
     struct rx_uart *uart;
-    
+
     unsigned char smr_copy;
     unsigned char semr_copy;
     unsigned char scr_copy;
@@ -81,7 +83,7 @@ static rt_err_t rx_configure(struct rt_serial_device *serial, struct serial_conf
     semr_copy = 0x00u;
     scmr_copy = 0x72u;
     brr_divider = 0;
-    
+
     switch (uart->UART) {
 case 0:
         SYSTEM.MSTPCRB.BIT.MSTPB31 = 0;
@@ -257,11 +259,11 @@ case 0:
     }
 
     /*parity*/
-    if (cfg->parity == PARITY_ODD) 
+    if (cfg->parity == PARITY_ODD)
         smr_copy |= BIT_5;
-        else if (cfg->parity == PARITY_EVEN) 
+        else if (cfg->parity == PARITY_EVEN)
             smr_copy |= BIT_4 | BIT_5;
-    
+
 
 
     brr_divider = rpdl_CGC_f_pclk / cfg->baud_rate;
@@ -304,13 +306,13 @@ case 0:
     }while (bit_interval_counter != 0);
 
     scr_copy = 0x00u;
-	
+
     /*enable rx an tx*/
     scr_copy |= BIT_5  | BIT_4 ;
 
     uart->sci->SCR.BYTE &= 0x5B;
     uart->sci->SCR.BYTE |= scr_copy;
-                             
+
     *(IPR_ADDRESS(uart->UART)) = 5;
     uart->sci->SSR.BYTE = 0xC0;
     uart->sci->SSR.BYTE &= INV_BIT_5;
@@ -363,9 +365,9 @@ case 0:
           break;
   }
 
-  flag |= PDL_SCI_ASYNC | 
-      PDL_SCI_TX_CONNECTED | 
-      PDL_SCI_RX_CONNECTED | 
+  flag |= PDL_SCI_ASYNC |
+      PDL_SCI_TX_CONNECTED |
+      PDL_SCI_RX_CONNECTED |
       PDL_SCI_CLK_INT_IO ;
   /* Configure the RS232 port */
   err &=    R_SCI_Create(
@@ -373,12 +375,12 @@ case 0:
     flag,
     cfg->baud_rate,
     5);
-                  
+
   uart->sci->SCR.BYTE |= BIT_4|BIT_5;
 
  __enable_interrupt();
     #endif
-                          
+
     switch (uart->UART) {
     case 0:
 
@@ -430,7 +432,7 @@ case 0:
 
         break;
     }
-    
+
     return RT_EOK;
 }
 
@@ -464,7 +466,7 @@ static int rx_putc(struct rt_serial_device *serial, char c)
     uart = (struct rx_uart *)serial->parent.user_data;
     while (uart->sci->SSR.BIT.TDRE == 0);
     uart->sci->TDR = c;
-    return 1; 
+    return 1;
 }
 
 static int rx_getc(struct rt_serial_device *serial)
@@ -528,15 +530,15 @@ void rt_hw_uart_init(void)
     config.parity    = PARITY_NONE;
     config.stop_bits = STOP_BITS_1;
     config.invert    = NRZ_NORMAL;
-	config.bufsz     = RT_SERIAL_RB_BUFSZ;
+    config.bufsz     = RT_SERIAL_RB_BUFSZ;
 
     serial2.ops    = &rx_uart_ops;
     serial2.config = config;
 
     /* register UART1 device */
     rt_hw_serial_register(&serial2, "uart2",
-                          RT_DEVICE_FLAG_RDWR | 
-                          RT_DEVICE_FLAG_INT_RX | 
+                          RT_DEVICE_FLAG_RDWR |
+                          RT_DEVICE_FLAG_INT_RX |
                           RT_DEVICE_FLAG_STREAM,
                           uart);
 #endif
diff --git a/bsp/rx/rtconfig.h b/bsp/rx/rtconfig.h
index 6f055dce1a..57524271da 100644
--- a/bsp/rx/rtconfig.h
+++ b/bsp/rx/rtconfig.h
@@ -3,16 +3,16 @@
 #define __RTTHREAD_CFG_H__
 
 /* RT_NAME_MAX*/
-#define RT_NAME_MAX	8
+#define RT_NAME_MAX 8
 
 /* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE	4
+#define RT_ALIGN_SIZE   4
 
 /* PRIORITY_MAX */
-#define RT_THREAD_PRIORITY_MAX	32
+#define RT_THREAD_PRIORITY_MAX  32
 
 /* Tick per Second */
-#define RT_TICK_PER_SECOND	100
+#define RT_TICK_PER_SECOND  100
 
 /* SECTION: RT_DEBUG */
 /* Thread Debug */
@@ -27,9 +27,9 @@
 
 /* Using Software Timer */
 /* #define RT_USING_TIMER_SOFT */
-#define RT_TIMER_THREAD_PRIO		4
-#define RT_TIMER_THREAD_STACK_SIZE	512
-#define RT_TIMER_TICK_PER_SECOND	10
+#define RT_TIMER_THREAD_PRIO        4
+#define RT_TIMER_THREAD_STACK_SIZE  512
+#define RT_TIMER_TICK_PER_SECOND    10
 
 /* SECTION: IPC */
 /* Using Semaphore*/
@@ -72,9 +72,9 @@
 /* SECTION: Console options */
 #define RT_USING_CONSOLE
 /* the buffer size of console*/
-#define RT_CONSOLEBUF_SIZE	        128
+#define RT_CONSOLEBUF_SIZE          128
 // 
-#define RT_CONSOLE_DEVICE_NAME	    "uart2"
+#define RT_CONSOLE_DEVICE_NAME      "uart2"
 
 /* SECTION: finsh, a C-Express shell */
 #define RT_USING_FINSH
@@ -89,17 +89,17 @@
 /* Reentrancy (thread safe) of the FatFs module.  */
 #define RT_DFS_ELM_REENTRANT
 /* Number of volumes (logical drives) to be used. */
-#define RT_DFS_ELM_DRIVES			2
-/* #define RT_DFS_ELM_USE_LFN			1 */
-/* #define RT_DFS_ELM_CODE_PAGE			936 */
-#define RT_DFS_ELM_MAX_LFN			255
+#define RT_DFS_ELM_DRIVES           2
+/* #define RT_DFS_ELM_USE_LFN           1 */
+/* #define RT_DFS_ELM_CODE_PAGE         936 */
+#define RT_DFS_ELM_MAX_LFN          255
 /* Maximum sector size to be handled. */
 #define RT_DFS_ELM_MAX_SECTOR_SIZE  512
 
 /* the max number of mounted filesystem */
-#define DFS_FILESYSTEMS_MAX			2
-/* the max number of opened files 		*/
-#define DFS_FD_MAX					4
+#define DFS_FILESYSTEMS_MAX         2
+/* the max number of opened files       */
+#define DFS_FD_MAX                  4
 
 /* SECTION: lwip, a lighwight TCP/IP protocol stack */
 /* #define RT_USING_LWIP */
@@ -113,49 +113,49 @@
 #define RT_LWIP_DNS
 
 /* the number of simulatenously active TCP connections*/
-#define RT_LWIP_TCP_PCB_NUM	5
+#define RT_LWIP_TCP_PCB_NUM 5
 
 /* Using DHCP */
 /* #define RT_LWIP_DHCP */
 
 /* ip address of target*/
-#define RT_LWIP_IPADDR0	192
-#define RT_LWIP_IPADDR1	168
-#define RT_LWIP_IPADDR2	1
-#define RT_LWIP_IPADDR3	30
+#define RT_LWIP_IPADDR0 192
+#define RT_LWIP_IPADDR1 168
+#define RT_LWIP_IPADDR2 1
+#define RT_LWIP_IPADDR3 30
 
 /* gateway address of target*/
-#define RT_LWIP_GWADDR0	192
-#define RT_LWIP_GWADDR1	168
-#define RT_LWIP_GWADDR2	1
-#define RT_LWIP_GWADDR3	1
+#define RT_LWIP_GWADDR0 192
+#define RT_LWIP_GWADDR1 168
+#define RT_LWIP_GWADDR2 1
+#define RT_LWIP_GWADDR3 1
 
 /* mask address of target*/
-#define RT_LWIP_MSKADDR0	255
-#define RT_LWIP_MSKADDR1	255
-#define RT_LWIP_MSKADDR2	255
-#define RT_LWIP_MSKADDR3	0
+#define RT_LWIP_MSKADDR0    255
+#define RT_LWIP_MSKADDR1    255
+#define RT_LWIP_MSKADDR2    255
+#define RT_LWIP_MSKADDR3    0
 
 /* tcp thread options */
-#define RT_LWIP_TCPTHREAD_PRIORITY		12
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE		10
-#define RT_LWIP_TCPTHREAD_STACKSIZE		1024
+#define RT_LWIP_TCPTHREAD_PRIORITY      12
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE     10
+#define RT_LWIP_TCPTHREAD_STACKSIZE     1024
 
 /* ethernet if thread options */
-#define RT_LWIP_ETHTHREAD_PRIORITY		15
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE		10
-#define RT_LWIP_ETHTHREAD_STACKSIZE		512
+#define RT_LWIP_ETHTHREAD_PRIORITY      15
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE     10
+#define RT_LWIP_ETHTHREAD_STACKSIZE     512
 
 /* TCP sender buffer space */
-#define RT_LWIP_TCP_SND_BUF	8192
+#define RT_LWIP_TCP_SND_BUF 8192
 /* TCP receive window. */
-#define RT_LWIP_TCP_WND		8192
+#define RT_LWIP_TCP_WND     8192
 
 /* SECTION: RT-Thread/GUI */
 /* #define RT_USING_RTGUI */
 
 /* name length of RTGUI object */
-#define RTGUI_NAME_MAX		12
+#define RTGUI_NAME_MAX      12
 /* support 16 weight font */
 #define RTGUI_USING_FONT16
 /* support Chinese font */
@@ -171,7 +171,7 @@
 /* use mouse cursor */
 /* #define RTGUI_USING_MOUSE_CURSOR */
 /* default font size in RTGUI */
-#define RTGUI_DEFAULT_FONT_SIZE	16
+#define RTGUI_DEFAULT_FONT_SIZE 16
 
 /* image support */
 /* #define RTGUI_IMAGE_XPM */
diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h b/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
index bcceba61a0..5220e13b97 100644
--- a/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
+++ b/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
@@ -18,18 +18,21 @@
 
 #include 
 
+extern void *rt_malloc(unsigned long nbytes);
+extern void rt_free(void *ptr);
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 static inline void *metal_allocate_memory(unsigned int size)
 {
-	return (malloc(size));
+	return (rt_malloc(size));
 }
 
 static inline void metal_free_memory(void *ptr)
 {
-	free(ptr);
+	rt_free(ptr);
 }
 
 #ifdef __cplusplus
diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h b/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
index bcceba61a0..5220e13b97 100644
--- a/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
+++ b/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
@@ -18,18 +18,21 @@
 
 #include 
 
+extern void *rt_malloc(unsigned long nbytes);
+extern void rt_free(void *ptr);
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 static inline void *metal_allocate_memory(unsigned int size)
 {
-	return (malloc(size));
+	return (rt_malloc(size));
 }
 
 static inline void metal_free_memory(void *ptr)
 {
-	free(ptr);
+	rt_free(ptr);
 }
 
 #ifdef __cplusplus
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h b/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
index bcceba61a0..5220e13b97 100644
--- a/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
@@ -18,18 +18,21 @@
 
 #include 
 
+extern void *rt_malloc(unsigned long nbytes);
+extern void rt_free(void *ptr);
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 static inline void *metal_allocate_memory(unsigned int size)
 {
-	return (malloc(size));
+	return (rt_malloc(size));
 }
 
 static inline void metal_free_memory(void *ptr)
 {
-	free(ptr);
+	rt_free(ptr);
 }
 
 #ifdef __cplusplus
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h b/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
index bcceba61a0..5220e13b97 100644
--- a/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
@@ -18,18 +18,21 @@
 
 #include 
 
+extern void *rt_malloc(unsigned long nbytes);
+extern void rt_free(void *ptr);
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 static inline void *metal_allocate_memory(unsigned int size)
 {
-	return (malloc(size));
+	return (rt_malloc(size));
 }
 
 static inline void metal_free_memory(void *ptr)
 {
-	free(ptr);
+	rt_free(ptr);
 }
 
 #ifdef __cplusplus
diff --git a/bsp/stm32f20x/.config b/bsp/stm32f20x/.config
index a568b7e0ae..5f3bc12590 100644
--- a/bsp/stm32f20x/.config
+++ b/bsp/stm32f20x/.config
@@ -7,6 +7,7 @@
 # RT-Thread Kernel
 #
 CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
 # CONFIG_RT_USING_SMP is not set
 CONFIG_RT_ALIGN_SIZE=4
 # CONFIG_RT_THREAD_PRIORITY_8 is not set
@@ -20,18 +21,7 @@ CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=256
 # CONFIG_RT_USING_TIMER_SOFT is not set
-CONFIG_RT_DEBUG=y
-CONFIG_RT_DEBUG_COLOR=y
-# CONFIG_RT_DEBUG_INIT_CONFIG is not set
-# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
-# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
-# CONFIG_RT_DEBUG_IPC_CONFIG is not set
-# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
-# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
-# CONFIG_RT_DEBUG_MEM_CONFIG is not set
-# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
-# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
-# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+# CONFIG_RT_DEBUG is not set
 
 #
 # Inter-Thread communication
@@ -51,6 +41,7 @@ CONFIG_RT_USING_MEMPOOL=y
 # CONFIG_RT_USING_NOHEAP is not set
 CONFIG_RT_USING_SMALL_MEM=y
 # CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_USERHEAP is not set
 # CONFIG_RT_USING_MEMTRACE is not set
 CONFIG_RT_USING_HEAP=y
 
@@ -63,8 +54,9 @@ CONFIG_RT_USING_DEVICE=y
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
-CONFIG_RT_VER_NUM=0x40001
+CONFIG_RT_VER_NUM=0x40003
 CONFIG_ARCH_ARM=y
+CONFIG_RT_USING_CPU_FFS=y
 CONFIG_ARCH_ARM_CORTEX_M=y
 CONFIG_ARCH_ARM_CORTEX_M3=y
 # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
@@ -73,6 +65,7 @@ CONFIG_ARCH_ARM_CORTEX_M3=y
 # RT-Thread Components
 #
 # CONFIG_RT_USING_COMPONENTS_INIT is not set
+# CONFIG_RT_USING_USER_MAIN is not set
 
 #
 # C++ features
@@ -101,51 +94,34 @@ CONFIG_FINSH_ARG_MAX=10
 #
 # Device virtual file system
 #
-CONFIG_RT_USING_DFS=y
-CONFIG_DFS_USING_WORKDIR=y
-CONFIG_DFS_FILESYSTEMS_MAX=2
-CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
-CONFIG_DFS_FD_MAX=4
-# CONFIG_RT_USING_DFS_MNTTABLE is not set
-CONFIG_RT_USING_DFS_ELMFAT=y
-
-#
-# elm-chan's FatFs, Generic FAT Filesystem Module
-#
-CONFIG_RT_DFS_ELM_CODE_PAGE=437
-CONFIG_RT_DFS_ELM_WORD_ACCESS=y
-CONFIG_RT_DFS_ELM_USE_LFN_0=y
+# CONFIG_RT_USING_DFS is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
 # CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
 # CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
 # CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
-CONFIG_RT_DFS_ELM_USE_LFN=0
-CONFIG_RT_DFS_ELM_MAX_LFN=255
-CONFIG_RT_DFS_ELM_DRIVES=1
-CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
-# CONFIG_RT_DFS_ELM_USE_ERASE is not set
-CONFIG_RT_DFS_ELM_REENTRANT=y
-CONFIG_RT_USING_DFS_DEVFS=y
-# CONFIG_RT_USING_DFS_ROMFS is not set
-# CONFIG_RT_USING_DFS_RAMFS is not set
-# CONFIG_RT_USING_DFS_UFFS is not set
-# CONFIG_RT_USING_DFS_JFFS2 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_0 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
 
 #
 # Device Drivers
 #
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
 # CONFIG_RT_USING_SERIAL is not set
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_HWTIMER is not set
 # CONFIG_RT_USING_CPUTIME is not set
 # CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PHY is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_PWM is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
-# CONFIG_RT_USING_MTD is not set
 # CONFIG_RT_USING_PM is not set
 CONFIG_RT_USING_RTC=y
 # CONFIG_RT_USING_ALARM is not set
@@ -155,10 +131,10 @@ CONFIG_RT_USING_RTC=y
 # CONFIG_RT_USING_WDT is not set
 # CONFIG_RT_USING_AUDIO is not set
 # CONFIG_RT_USING_SENSOR is not set
-
-#
-# Using WiFi
-#
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
 # CONFIG_RT_USING_WIFI is not set
 
 #
@@ -170,13 +146,9 @@ CONFIG_RT_USING_RTC=y
 #
 # POSIX layer and C standard library
 #
-CONFIG_RT_USING_LIBC=y
+# CONFIG_RT_USING_LIBC is not set
 # CONFIG_RT_USING_PTHREADS is not set
-CONFIG_RT_USING_POSIX=y
-# CONFIG_RT_USING_POSIX_MMAP is not set
-# CONFIG_RT_USING_POSIX_TERMIOS is not set
-# CONFIG_RT_USING_POSIX_AIO is not set
-# CONFIG_RT_USING_MODULE is not set
+CONFIG_RT_LIBC_USING_TIME=y
 
 #
 # Network
@@ -187,16 +159,16 @@ CONFIG_RT_USING_POSIX=y
 #
 # CONFIG_RT_USING_SAL is not set
 
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
 #
 # light weight TCP/IP stack
 #
 # CONFIG_RT_USING_LWIP is not set
 
-#
-# Modbus master and slave stack
-#
-# CONFIG_RT_USING_MODBUS is not set
-
 #
 # AT commands
 #
@@ -210,16 +182,9 @@ CONFIG_RT_USING_POSIX=y
 #
 # Utilities
 #
-# CONFIG_RT_USING_LOGTRACE is not set
 # CONFIG_RT_USING_RYM is not set
 # CONFIG_RT_USING_ULOG is not set
 # CONFIG_RT_USING_UTEST is not set
-
-#
-# ARM CMSIS
-#
-# CONFIG_RT_USING_CMSIS_OS is not set
-# CONFIG_RT_USING_RTT_CMSIS is not set
 # CONFIG_RT_USING_LWP is not set
 
 #
@@ -229,14 +194,20 @@ CONFIG_RT_USING_POSIX=y
 #
 # IoT - internet of things
 #
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
 # CONFIG_PKG_USING_LJSON is not set
 # CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
@@ -258,7 +229,10 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
 # CONFIG_PKG_USING_WIZNET is not set
 
 #
@@ -268,9 +242,34 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PDULIB is not set
+# CONFIG_PKG_USING_BTSTACK is not set
+# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
+# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
 
 #
 # security packages
@@ -278,6 +277,8 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_MBEDTLS is not set
 # CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
 
 #
 # language packages
@@ -292,6 +293,11 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+# CONFIG_PKG_USING_HELIX is not set
+# CONFIG_PKG_USING_AZUREGUIX is not set
+# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
 
 #
 # tools packages
@@ -303,7 +309,31 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_RDB is not set
 # CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ULOG_FILE is not set
+# CONFIG_PKG_USING_LOGMGR is not set
 # CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_MEMORYPERF is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+# CONFIG_PKG_USING_LWRB2RTT is not set
+# CONFIG_PKG_USING_CPU_USAGE is not set
+# CONFIG_PKG_USING_GBK2UTF8 is not set
+# CONFIG_PKG_USING_VCONSOLE is not set
+# CONFIG_PKG_USING_KDB is not set
+# CONFIG_PKG_USING_WAMR is not set
+# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
+# CONFIG_PKG_USING_LWLOG is not set
+# CONFIG_PKG_USING_ANV_TRACE is not set
+# CONFIG_PKG_USING_ANV_MEMLEAK is not set
+# CONFIG_PKG_USING_ANV_TESTSUIT is not set
+# CONFIG_PKG_USING_ANV_BENCH is not set
 
 #
 # system packages
@@ -314,12 +344,40 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
 # CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_FLASHDB is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
 # CONFIG_PKG_USING_LITTLEVGL2RTT is not set
 # CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
+# CONFIG_PKG_USING_UC_CRC is not set
+# CONFIG_PKG_USING_UC_CLK is not set
+# CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
+# CONFIG_PKG_USING_PPOOL is not set
+# CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
+# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
+# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
+# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
+# CONFIG_PKG_USING_QFPLIB_M3 is not set
+# CONFIG_PKG_USING_LPM is not set
 
 #
 # peripheral libraries and drivers
@@ -327,17 +385,61 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_SENSORS_DRIVERS is not set
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
-# CONFIG_PKG_USING_AHT10 is not set
-# CONFIG_PKG_USING_AP3216C is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_BUTTON is not set
-# CONFIG_PKG_USING_MPU6XXX is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
 # CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+# CONFIG_PKG_USING_LY68L6400 is not set
+# CONFIG_PKG_USING_DM9051 is not set
+# CONFIG_PKG_USING_SSD1306 is not set
+# CONFIG_PKG_USING_QKEY is not set
+# CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_NES is not set
+# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
+# CONFIG_PKG_USING_VDEVICE is not set
+# CONFIG_PKG_USING_SGM706 is not set
 
 #
 # miscellaneous packages
@@ -347,12 +449,17 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
 # CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
 
 #
 # samples: kernel and components samples
@@ -363,7 +470,29 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_KI is not set
 # CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+
+#
+# games: games run on RT-Thread console
+#
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_SNAKE is not set
+# CONFIG_PKG_USING_TETRIS is not set
+# CONFIG_PKG_USING_LWGPS is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_STATE_MACHINE is not set
+# CONFIG_PKG_USING_MCURSES is not set
+# CONFIG_PKG_USING_COWSAY is not set
 CONFIG_SOC_STM32F2=y
 CONFIG_RT_USING_UART1=y
 # CONFIG_RT_USING_UART6 is not set
+CONFIG_SOC_STM32F20X=y
diff --git a/bsp/stm32f20x/Drivers/24LCxx.c b/bsp/stm32f20x/Drivers/24LCxx.c
index 1903a85b82..1fdbc9b8d1 100644
--- a/bsp/stm32f20x/Drivers/24LCxx.c
+++ b/bsp/stm32f20x/Drivers/24LCxx.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -16,171 +16,171 @@
 #define EE24LC024H
 
 /*
-	Note: If eeprom size lager then EE_MEM_SIZE byte, you must define EE_ADDR_SIZE == I2C_MEM_2Bytes
+    Note: If eeprom size lager then EE_MEM_SIZE byte, you must define EE_ADDR_SIZE == I2C_MEM_2Bytes
 */
 #ifdef EE24LC024H
 #define EE_ADDR_SIZE I2C_MEM_1Byte
-#define EE_MEM_SIZE	256
-#define EE_PageSize	16
+#define EE_MEM_SIZE 256
+#define EE_PageSize 16
 #endif
 
 static struct rt_device ee_dev;
 
 uint32_t EE_ReadBuffer(void *pBuffer, rt_off_t ReadAddr, rt_size_t NumByteToRead)
 {
-	return I2C_IORW(I2C1, (uint8_t *)pBuffer, (uint16_t)NumByteToRead, (uint16_t)ReadAddr, EE_Address | 0x01, I2C_MEM_1Byte );
+    return I2C_IORW(I2C1, (uint8_t *)pBuffer, (uint16_t)NumByteToRead, (uint16_t)ReadAddr, EE_Address | 0x01, I2C_MEM_1Byte );
 }
 
 uint32_t EE_WritePage(void *pBuffer, uint16_t WriteAddr)
-{ 
-	I2C_IORW(I2C1, (uint8_t *)pBuffer, EE_PageSize , WriteAddr, EE_Address , EE_ADDR_SIZE );
+{
+    I2C_IORW(I2C1, (uint8_t *)pBuffer, EE_PageSize , WriteAddr, EE_Address , EE_ADDR_SIZE );
 
-	/*if( I2C_AcknowledgePolling(I2C1 , EE_Address) == Error )
-		rt_kprintf("EE ACK failed\n");*/
-	rt_thread_delay(50);
+    /*if( I2C_AcknowledgePolling(I2C1 , EE_Address) == Error )
+        rt_kprintf("EE ACK failed\n");*/
+    rt_thread_delay(50);
 
-	return 0;
+    return 0;
 }
 
 uint32_t EE_WriteByte(void *pBuffer, uint16_t WriteAddr)
 {
-	I2C_IORW(I2C1, (uint8_t *)pBuffer, 1 , WriteAddr, EE_Address, EE_ADDR_SIZE );
+    I2C_IORW(I2C1, (uint8_t *)pBuffer, 1 , WriteAddr, EE_Address, EE_ADDR_SIZE );
 
-	/*if( I2C_AcknowledgePolling(I2C1 , EE_Address) == Error )
-		rt_kprintf("EE ACK failed\n");*/
-	rt_thread_delay(50);
+    /*if( I2C_AcknowledgePolling(I2C1 , EE_Address) == Error )
+        rt_kprintf("EE ACK failed\n");*/
+    rt_thread_delay(50);
 
-	return 0;
+    return 0;
 }
 
 Status EE_WriteBuffer(const void *pBuffer, rt_off_t WriteAddr, rt_size_t NumByteToWrite)
 {
-	uint8_t NumOfPage = 0, NumOfSingle = 0;
-	uint16_t Addr = 0,count = 0;
-	uint8_t *ptr = (uint8_t *)pBuffer;
-	
-	Addr = (uint16_t)(WriteAddr&0xFFFF);
+    uint8_t NumOfPage = 0, NumOfSingle = 0;
+    uint16_t Addr = 0,count = 0;
+    uint8_t *ptr = (uint8_t *)pBuffer;
 
-	count = (uint16_t)(NumByteToWrite&0xFFFF);
-	
-	if ((WriteAddr + NumByteToWrite) > EE_MEM_SIZE)
-		return Error;
+    Addr = (uint16_t)(WriteAddr&0xFFFF);
 
-	while (count >= EE_PageSize)
-	{
-		EE_WritePage(ptr, Addr);
-		Addr += EE_PageSize;
-		count -= EE_PageSize;
-		ptr += EE_PageSize;  
-	}
-	
-	while (count)
-	{
-		EE_WriteByte(ptr++, Addr++);
-		count--;
-	}
-	
-	return Success; 
+    count = (uint16_t)(NumByteToWrite&0xFFFF);
+
+    if ((WriteAddr + NumByteToWrite) > EE_MEM_SIZE)
+        return Error;
+
+    while (count >= EE_PageSize)
+    {
+        EE_WritePage(ptr, Addr);
+        Addr += EE_PageSize;
+        count -= EE_PageSize;
+        ptr += EE_PageSize;
+    }
+
+    while (count)
+    {
+        EE_WriteByte(ptr++, Addr++);
+        count--;
+    }
+
+    return Success;
 }
 
 static rt_err_t ee24LCxx_init(rt_device_t dev)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_size_t ee24LCxx_read(rt_device_t dev, rt_off_t pos, void *buf, rt_size_t size)
 {
-	if (EE_ReadBuffer(buf, pos, size) == Success)
-		return size;
-	else
-		return -1;
+    if (EE_ReadBuffer(buf, pos, size) == Success)
+        return size;
+    else
+        return -1;
 }
 
 static rt_size_t ee24LCxx_write(rt_device_t dev, rt_off_t pos, const void *buf, rt_size_t size)
 {
-	if (EE_WriteBuffer(buf, pos, size) == Success)
-		return size;
-	else
-		return -1;
+    if (EE_WriteBuffer(buf, pos, size) == Success)
+        return size;
+    else
+        return -1;
 }
 
 static rt_err_t ee24LCxx_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t ee24LCxx_close(rt_device_t dev)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t ee24LCxx_control(rt_device_t dev, int cmd, void *args)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 void ee24LCxx_hw_init(void)
 {
-	uint32_t delay, i;
-	I2C1_INIT();
+    uint32_t delay, i;
+    I2C1_INIT();
 
-	for (i =0; i < 4; i++)
-	{
-		delay = 0xFFFFF;
-		while (delay--);
-	}
+    for (i =0; i < 4; i++)
+    {
+        delay = 0xFFFFF;
+        while (delay--);
+    }
 
-	ee_dev.init 	= ee24LCxx_init;
-	ee_dev.open 	= ee24LCxx_open;
-	ee_dev.close	= ee24LCxx_close;
-	ee_dev.read 	= ee24LCxx_read;
-	ee_dev.write	= ee24LCxx_write;
-	ee_dev.control	= ee24LCxx_control;
-	ee_dev.type 	= RT_Device_Class_Unknown;
+    ee_dev.init     = ee24LCxx_init;
+    ee_dev.open     = ee24LCxx_open;
+    ee_dev.close    = ee24LCxx_close;
+    ee_dev.read     = ee24LCxx_read;
+    ee_dev.write    = ee24LCxx_write;
+    ee_dev.control  = ee24LCxx_control;
+    ee_dev.type     = RT_Device_Class_Unknown;
 
-	rt_device_register(&ee_dev, "eeprom", RT_DEVICE_FLAG_RDWR);
+    rt_device_register(&ee_dev, "eeprom", RT_DEVICE_FLAG_RDWR);
 }
 
 void dump_ee(void)
 {
-	rt_device_t dev;
-	char buf[EE_MEM_SIZE];
-	int i, j;
+    rt_device_t dev;
+    char buf[EE_MEM_SIZE];
+    int i, j;
 
-	dev = rt_device_find("eeprom");
-	rt_device_read(dev, 0, buf, EE_MEM_SIZE );
+    dev = rt_device_find("eeprom");
+    rt_device_read(dev, 0, buf, EE_MEM_SIZE );
 
-	for (i = 0; i < 16; i++)
-	{
-		for (j = 0; j < 16; j++)
-		{
-			rt_kprintf("0x%02X ", buf[ i*16+ j]);
-		}
-		rt_kprintf("\n");
-	}
+    for (i = 0; i < 16; i++)
+    {
+        for (j = 0; j < 16; j++)
+        {
+            rt_kprintf("0x%02X ", buf[ i*16+ j]);
+        }
+        rt_kprintf("\n");
+    }
 }
 
 void ee_reset(void)
 {
-	char buf[EE_MEM_SIZE], read[EE_MEM_SIZE];
-	int i;
-	rt_device_t dev = rt_device_find("eeprom");
+    char buf[EE_MEM_SIZE], read[EE_MEM_SIZE];
+    int i;
+    rt_device_t dev = rt_device_find("eeprom");
 
-	for (i = 0; i < EE_MEM_SIZE; i++)
-	{
-		buf[i] = 0xFF;
-		read[i] = 0;
-	}
-	if (rt_device_write(dev, 0, buf, EE_MEM_SIZE ) == EE_MEM_SIZE)
-		rt_kprintf("Write Success\n");
+    for (i = 0; i < EE_MEM_SIZE; i++)
+    {
+        buf[i] = 0xFF;
+        read[i] = 0;
+    }
+    if (rt_device_write(dev, 0, buf, EE_MEM_SIZE ) == EE_MEM_SIZE)
+        rt_kprintf("Write Success\n");
 
-	rt_device_read(dev, 0, read, EE_MEM_SIZE );
+    rt_device_read(dev, 0, read, EE_MEM_SIZE );
 
-	for (i = 0; i < EE_MEM_SIZE; i++)
-	{
-		if (buf[i] != read[i])
-			rt_kprintf("EE Failed %X != %X at %d\n", buf[i], read[i], i);
-	}
+    for (i = 0; i < EE_MEM_SIZE; i++)
+    {
+        if (buf[i] != read[i])
+            rt_kprintf("EE Failed %X != %X at %d\n", buf[i], read[i], i);
+    }
 }
 
 #ifdef RT_USING_FINSH
diff --git a/bsp/stm32f20x/Drivers/FM25Lx.c b/bsp/stm32f20x/Drivers/FM25Lx.c
index b1437d7707..e59af25fd4 100644
--- a/bsp/stm32f20x/Drivers/FM25Lx.c
+++ b/bsp/stm32f20x/Drivers/FM25Lx.c
@@ -26,7 +26,7 @@ void rt_hw_spi2_baud_rate(uint16_t SPI_BaudRatePrescaler)
 /* FM25L256 using SPI2 */
 void fm25_spi_cfg()
 {
-	GPIO_InitTypeDef GPIO_InitStructure;
+    GPIO_InitTypeDef GPIO_InitStructure;
     SPI_InitTypeDef SPI_InitStructure;
 
     /* Enable SPI Periph clock */
@@ -36,24 +36,24 @@ void fm25_spi_cfg()
     //Setup GPIO
     GPIO_InitStructure.GPIO_Pin = FM25_SPI_SCK | FM25_SPI_MISO | FM25_SPI_MOSI;
 
-   	/*Connect Pin to AF*/
-	GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource3, GPIO_AF_SPI3);
-	GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource4, GPIO_AF_SPI3);
-	GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource5, GPIO_AF_SPI3);
+    /*Connect Pin to AF*/
+    GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource3, GPIO_AF_SPI3);
+    GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource4, GPIO_AF_SPI3);
+    GPIO_PinAFConfig(FM25_SPI_GPIO, GPIO_PinSource5, GPIO_AF_SPI3);
 
-	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
-	GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
-	GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
-	GPIO_Init(FM25_SPI_GPIO, &GPIO_InitStructure);
+    GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+    GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
+    GPIO_Init(FM25_SPI_GPIO, &GPIO_InitStructure);
 
-	/* CS pin: PB12 */
+    /* CS pin: PB12 */
     GPIO_InitStructure.GPIO_Pin   = FM25_SPI_NSS_PIN;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
     GPIO_Init(FM25_SPI_NSS_GPIO, &GPIO_InitStructure);
-	CS_HIGH();
+    CS_HIGH();
 
-	SPI_Cmd(FM25_SPI, DISABLE);
+    SPI_Cmd(FM25_SPI, DISABLE);
     /*------------------------ SPI configuration ------------------------*/
     SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
     SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
@@ -72,23 +72,23 @@ void fm25_spi_cfg()
     SPI_Cmd(FM25_SPI, ENABLE);
     //SPI_CalculateCRC(FM25_SPI, DISABLE);
 
-	fram_lock = rt_sem_create("framlock", 1, RT_IPC_FLAG_FIFO);
+    fram_lock = rt_sem_create("framlock", 1, RT_IPC_FLAG_FIFO);
 }
 static uint8_t spi_readwrite(uint8_t data)
 {
     int32_t timeout = 0xFFFFF;
-	//rt_kprintf("State 0x%X\n", SPI_I2S_GetFlagStatus(FM25_SPI, SPI_I2S_FLAG_TXE));
-	//Wait until the transmit buffer is empty
+    //rt_kprintf("State 0x%X\n", SPI_I2S_GetFlagStatus(FM25_SPI, SPI_I2S_FLAG_TXE));
+    //Wait until the transmit buffer is empty
     while (SPI_I2S_GetFlagStatus(FM25_SPI, SPI_I2S_FLAG_TXE) == RESET && --timeout >0);
 
-	if( timeout <= 0 ){ spi_timeout_cnt++; return 0;}
+    if( timeout <= 0 ){ spi_timeout_cnt++; return 0;}
     // Send the byte
     SPI_I2S_SendData(FM25_SPI, data);
 
-	timeout = 0xFFFFF;
+    timeout = 0xFFFFF;
     //Wait until a data is received
     while (SPI_I2S_GetFlagStatus(FM25_SPI, SPI_I2S_FLAG_RXNE) == RESET && --timeout >0);
-	if( timeout <= 0 ){ spi_timeout_cnt++; return 0;}
+    if( timeout <= 0 ){ spi_timeout_cnt++; return 0;}
     // Get the received data
     data = SPI_I2S_ReceiveData(FM25_SPI);
 
@@ -110,29 +110,29 @@ rt_size_t fm25_read(rt_device_t dev, rt_off_t offset, void * buf, rt_size_t size
 {
     uint32_t index;
 
-	uint8_t *buffer = (uint8_t*) buf;
+    uint8_t *buffer = (uint8_t*) buf;
 
     fram_lock();
     //spi_config();
-	//rt_kprintf("READ: %d, size=%d\n", offset, size);
+    //rt_kprintf("READ: %d, size=%d\n", offset, size);
 
     CS_LOW();
-	spi_readwrite( FM25_READ);
-	spi_readwrite( (offset >> 8)&0xFF );
-	spi_readwrite( offset & 0xFF  );
+    spi_readwrite( FM25_READ);
+    spi_readwrite( (offset >> 8)&0xFF );
+    spi_readwrite( offset & 0xFF  );
     for(index=0; index 0 )
-		{
-			fram_unlock();
-			spi_timeout_cnt = 0;
-			rt_kprintf("Read time out\n");
-			return -1;
-		}
+        if( spi_timeout_cnt > 0 )
+        {
+            fram_unlock();
+            spi_timeout_cnt = 0;
+            rt_kprintf("Read time out\n");
+            return -1;
+        }
 
-		offset++;
+        offset++;
     }
     CS_HIGH();
 
@@ -145,33 +145,33 @@ rt_size_t fm25_write(rt_device_t dev, rt_off_t offset, const void * buf, rt_size
 {
     uint32_t index = size;
 
-	uint8_t *buffer = (uint8_t*) buf;
+    uint8_t *buffer = (uint8_t*) buf;
     fram_lock();
     //spi_config();
-	//rt_kprintf("WRITE: %d, size=%d\n", offset, size);
-	CS_LOW();
+    //rt_kprintf("WRITE: %d, size=%d\n", offset, size);
+    CS_LOW();
     spi_readwrite( FM25_WREN );
-	CS_HIGH();
-	CS_LOW();
-    spi_readwrite( FM25_WRITE);
-	spi_readwrite( (offset >> 8)&0xFF );
-	spi_readwrite( offset & 0xFF  );
-	while( index > 0 )
-	{
-		spi_readwrite( *buffer++ );
-
-		if( spi_timeout_cnt > 0 )
-		{
-			fram_unlock();
-			rt_kprintf("Write time out\n");
-			spi_timeout_cnt = 0;
-			return -1;
-		}
-		index--;
-		offset++;	
-	}
     CS_HIGH();
-	//rt_thread_delay(100);
+    CS_LOW();
+    spi_readwrite( FM25_WRITE);
+    spi_readwrite( (offset >> 8)&0xFF );
+    spi_readwrite( offset & 0xFF  );
+    while( index > 0 )
+    {
+        spi_readwrite( *buffer++ );
+
+        if( spi_timeout_cnt > 0 )
+        {
+            fram_unlock();
+            rt_kprintf("Write time out\n");
+            spi_timeout_cnt = 0;
+            return -1;
+        }
+        index--;
+        offset++;
+    }
+    CS_HIGH();
+    //rt_thread_delay(100);
 
     fram_unlock();
 
@@ -179,36 +179,36 @@ rt_size_t fm25_write(rt_device_t dev, rt_off_t offset, const void * buf, rt_size
 }
 static rt_err_t fm25_init(rt_device_t dev)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 static rt_err_t fm25_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	char i;
-	SPI_Cmd(FM25_SPI, ENABLE);
+    char i;
+    SPI_Cmd(FM25_SPI, ENABLE);
 
-	if( oflag != RT_DEVICE_FLAG_RDONLY )
-	{
-		CS_LOW();
-		spi_readwrite( FM25_WRSR );
-		spi_readwrite( FM25_WPEN );
-		CS_HIGH();
-		//rt_kprintf("RDSR=0x%X\n", fm25_read_status());
+    if( oflag != RT_DEVICE_FLAG_RDONLY )
+    {
+        CS_LOW();
+        spi_readwrite( FM25_WRSR );
+        spi_readwrite( FM25_WPEN );
+        CS_HIGH();
+        //rt_kprintf("RDSR=0x%X\n", fm25_read_status());
 
-	}
-	return RT_EOK;
+    }
+    return RT_EOK;
 }
 static rt_err_t fm25_close(rt_device_t dev)
 {
-	CS_LOW();
+    CS_LOW();
     spi_readwrite( FM25_WRDI );
     CS_HIGH();
-	SPI_Cmd(FM25_SPI, DISABLE);
+    SPI_Cmd(FM25_SPI, DISABLE);
 
-	return RT_EOK;
+    return RT_EOK;
 }
 static rt_err_t fm25_control(rt_device_t dev, int cmd, void *args)
 {
-	 RT_ASSERT(dev != RT_NULL);
+     RT_ASSERT(dev != RT_NULL);
 
     if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
     {
@@ -219,30 +219,30 @@ static rt_err_t fm25_control(rt_device_t dev, int cmd, void *args)
 
         geometry->bytes_per_sector = 1;
         geometry->block_size = 1;
-		geometry->sector_count = 8192;
-		
+        geometry->sector_count = 8192;
+
     }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
-static struct rt_device	spi_flash_device;
+static struct rt_device spi_flash_device;
 void fm25_hw_init()
 {
-	int i = 0xFFFFF;
-	fm25_spi_cfg();
+    int i = 0xFFFFF;
+    fm25_spi_cfg();
 
-	while(i--);
-	//spi_config();
-	CS_LOW();
+    while(i--);
+    //spi_config();
+    CS_LOW();
     spi_readwrite( FM25_WRDI );
     CS_HIGH();
 
-	spi_flash_device.type    = RT_Device_Class_Block;
+    spi_flash_device.type    = RT_Device_Class_Block;
     spi_flash_device.init    = fm25_init;
     spi_flash_device.open    = fm25_open;
     spi_flash_device.close   = fm25_close;
-    spi_flash_device.read 	 = fm25_read;
+    spi_flash_device.read    = fm25_read;
     spi_flash_device.write   = fm25_write;
     spi_flash_device.control = fm25_control;
     /* no private */
@@ -255,17 +255,17 @@ void fm25_hw_init()
 
 int fram_test(int x)
 {
-	//rt_kprintf("SR=0x%X\nCR1=0x%X\nCR2=0x%X\n", FM25_SPI->SR, FM25_SPI->CR1,FM25_SPI->CR2);
-	 rt_device_t device = RT_NULL;
-	char buf[256];
-	char read[256];
-	int i, j;
+    //rt_kprintf("SR=0x%X\nCR1=0x%X\nCR2=0x%X\n", FM25_SPI->SR, FM25_SPI->CR1,FM25_SPI->CR2);
+     rt_device_t device = RT_NULL;
+    char buf[256];
+    char read[256];
+    int i, j;
 
-	for(i =0; i< 256; i++ )
-	{
-		buf[i] = i;
-		read[i] = 0;
-	}
+    for(i =0; i< 256; i++ )
+    {
+        buf[i] = i;
+        read[i] = 0;
+    }
     // step 1:find device
     device = rt_device_find("fram0");
     if( device == RT_NULL)
@@ -273,22 +273,22 @@ int fram_test(int x)
         rt_kprintf("device %s: not found!\r\n");
         return RT_ERROR;
     }
-	device->open(device,RT_DEVICE_FLAG_RDWR);
+    device->open(device,RT_DEVICE_FLAG_RDWR);
 
-	for( j = 0; j < FM25_MAXSIZE; j+= 256 )
-	//j = 256*x;
-	{
-		//rt_kprintf("RDSR=0x%X\n", fm25_read_status());
-		device->write(device,j, buf,256);
-		device->read(device,j, read,256);
-		for(i =0; i< 256; i++ )
-		{
-			if( buf[i] != read[i] )
-				rt_kprintf("error at %d: %d!=%d\n", i, buf[i], read[i]);
-		}
-	}
-	device->close(device);
-	rt_kprintf("Finsh test\n");
+    for( j = 0; j < FM25_MAXSIZE; j+= 256 )
+    //j = 256*x;
+    {
+        //rt_kprintf("RDSR=0x%X\n", fm25_read_status());
+        device->write(device,j, buf,256);
+        device->read(device,j, read,256);
+        for(i =0; i< 256; i++ )
+        {
+            if( buf[i] != read[i] )
+                rt_kprintf("error at %d: %d!=%d\n", i, buf[i], read[i]);
+        }
+    }
+    device->close(device);
+    rt_kprintf("Finsh test\n");
 }
 #ifdef RT_USING_FINSH
 #include 
diff --git a/bsp/stm32f20x/Drivers/FM25Lx.h b/bsp/stm32f20x/Drivers/FM25Lx.h
index 3f714ac8da..6d7e9ec08a 100644
--- a/bsp/stm32f20x/Drivers/FM25Lx.h
+++ b/bsp/stm32f20x/Drivers/FM25Lx.h
@@ -1,14 +1,14 @@
 #ifndef FM25LX_H
 #define FM25LX_H
 
-#define FM25_WREN	0x06
-#define FM25_WRDI	0x04
-#define FM25_RDSR	0x05
-#define FM25_WRSR	0x01
-#define FM25_READ	0x03
-#define FM25_WRITE	0x02
-#define FM25_WEL	0x02
-#define FM25_WPEN	0x80
+#define FM25_WREN   0x06
+#define FM25_WRDI   0x04
+#define FM25_RDSR   0x05
+#define FM25_WRSR   0x01
+#define FM25_READ   0x03
+#define FM25_WRITE  0x02
+#define FM25_WEL    0x02
+#define FM25_WPEN   0x80
 
 #define FM25CL64B
 //#define FM25LC256
@@ -19,25 +19,25 @@
 #define FM25_MAXSIZE 32768
 #endif
 
-#define FM25_SPI             	SPI3
-#define FM25_SPI_GPIO        	GPIOB
-#define FM25_SPI_MOSI        	GPIO_Pin_5
-#define FM25_SPI_MISO        	GPIO_Pin_4
-#define FM25_SPI_SCK        	GPIO_Pin_3
-#define FM25_SPI_NSS_GPIO		GPIOD
-#define FM25_SPI_NSS_PIN       	GPIO_Pin_10
-#define FM25_SPI_CLK         	RCC_APB1Periph_SPI3
-#define FM25_SPI_GPIO_CLK    	RCC_AHB1Periph_GPIOB
-#define FM25_SPI_NSS_GPIO_CLK  	RCC_AHB1Periph_GPIOD
+#define FM25_SPI                SPI3
+#define FM25_SPI_GPIO           GPIOB
+#define FM25_SPI_MOSI           GPIO_Pin_5
+#define FM25_SPI_MISO           GPIO_Pin_4
+#define FM25_SPI_SCK            GPIO_Pin_3
+#define FM25_SPI_NSS_GPIO       GPIOD
+#define FM25_SPI_NSS_PIN        GPIO_Pin_10
+#define FM25_SPI_CLK            RCC_APB1Periph_SPI3
+#define FM25_SPI_GPIO_CLK       RCC_AHB1Periph_GPIOB
+#define FM25_SPI_NSS_GPIO_CLK   RCC_AHB1Periph_GPIOD
 
-#define FM25_SPI_DMA_CLK     	RCC_AHB1Periph_DMA1
-#define FM25_SPI_DMA_Channel	DMA_Channel_0
-#define FM25_SPI_RX_DMA_Stream	DMA1_Stream0
-#define FM25_SPI_RX_DMA_IRQ  	DMA1_Stream0_IRQn
+#define FM25_SPI_DMA_CLK        RCC_AHB1Periph_DMA1
+#define FM25_SPI_DMA_Channel    DMA_Channel_0
+#define FM25_SPI_RX_DMA_Stream  DMA1_Stream0
+#define FM25_SPI_RX_DMA_IRQ     DMA1_Stream0_IRQn
 #define FM25_SPI_RX_DMA_FLAG    DMA_IT_TCIF0
-#define FM25_SPI_TX_DMA_Stream	DMA1_Stream5
-#define FM25_SPI_TX_DMA_IRQ  	DMA1_Stream5_IRQn
+#define FM25_SPI_TX_DMA_Stream  DMA1_Stream5
+#define FM25_SPI_TX_DMA_IRQ     DMA1_Stream5_IRQn
 #define FM25_SPI_TX_DMA_FLAG    DMA_IT_TCIF5
-#define FM25_SPI_DR_Base     	0x4003C00C
+#define FM25_SPI_DR_Base        0x4003C00C
 
-#endif
\ No newline at end of file
+#endif
diff --git a/bsp/stm32f20x/Drivers/board.c b/bsp/stm32f20x/Drivers/board.c
index e3cfdbbc12..0b2d214540 100644
--- a/bsp/stm32f20x/Drivers/board.c
+++ b/bsp/stm32f20x/Drivers/board.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,16 +30,16 @@
 void SD_LowLevel_DeInit(void)
 {
   GPIO_InitTypeDef  GPIO_InitStructure;
-  
+
   /*!< Disable SDIO Clock */
   SDIO_ClockCmd(DISABLE);
-  
+
   /*!< Set Power State to OFF */
   SDIO_SetPowerState(SDIO_PowerState_OFF);
 
   /*!< DeInitializes the SDIO peripheral */
   SDIO_DeInit();
-  
+
   /* Disable the SDIO APB2 Clock */
   RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, DISABLE);
 
@@ -66,7 +66,7 @@ void SD_LowLevel_DeInit(void)
 }
 
 /**
-  * @brief  Initializes the SD Card and put it into StandBy State (Ready for 
+  * @brief  Initializes the SD Card and put it into StandBy State (Ready for
   *         data transfer).
   * @param  None
   * @retval None
@@ -101,7 +101,7 @@ void SD_LowLevel_Init(void)
   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
   GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
   GPIO_Init(GPIOC, &GPIO_InitStructure);
-  
+
   /*!< Configure SD_SPI_DETECT_PIN pin: SD Card detect pin */
   GPIO_InitStructure.GPIO_Pin = SD_DETECT_PIN;
   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
@@ -154,7 +154,7 @@ void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize)
 
   /* DMA2 Stream3  or Stream6 enable */
   DMA_Cmd(SD_SDIO_DMA_STREAM, ENABLE);
-    
+
 }
 
 /**
@@ -219,11 +219,11 @@ uint32_t SD_DMAEndOfTransferStatus(void)
 void NVIC_Configuration(void)
 {
 #ifdef  VECT_TAB_RAM
-	/* Set the Vector Table base location at 0x20000000 */
-	NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
+    /* Set the Vector Table base location at 0x20000000 */
+    NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
 #else  /* VECT_TAB_FLASH  */
-	/* Set the Vector Table base location at 0x08000000 */
-	NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
+    /* Set the Vector Table base location at 0x08000000 */
+    NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
 #endif
 }
 
@@ -236,15 +236,15 @@ void NVIC_Configuration(void)
  *******************************************************************************/
 void  SysTick_Configuration(void)
 {
-	RCC_ClocksTypeDef  rcc_clocks;
-	rt_uint32_t         cnts;
+    RCC_ClocksTypeDef  rcc_clocks;
+    rt_uint32_t         cnts;
 
-	RCC_GetClocksFreq(&rcc_clocks);
+    RCC_GetClocksFreq(&rcc_clocks);
 
-	cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
+    cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
 
-	SysTick_Config(cnts);
-	SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
+    SysTick_Config(cnts);
+    SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
 }
 
 /**
@@ -253,13 +253,13 @@ void  SysTick_Configuration(void)
  */
 void SysTick_Handler(void)
 {
-	/* enter interrupt */
-	rt_interrupt_enter();
+    /* enter interrupt */
+    rt_interrupt_enter();
 
-	rt_tick_increase();
+    rt_tick_increase();
 
-	/* leave interrupt */
-	rt_interrupt_leave();
+    /* leave interrupt */
+    rt_interrupt_leave();
 }
 
 /**
@@ -267,15 +267,15 @@ void SysTick_Handler(void)
  */
 void rt_hw_board_init()
 {
-	/* NVIC Configuration */
-	NVIC_Configuration();
+    /* NVIC Configuration */
+    NVIC_Configuration();
 
-	/* Configure the SysTick */
-	SysTick_Configuration();
+    /* Configure the SysTick */
+    SysTick_Configuration();
 
-	rt_hw_usart_init();
+    rt_hw_usart_init();
 #ifdef RT_USING_CONSOLE
-	rt_console_set_device(CONSOLE_DEVICE);
+    rt_console_set_device(CONSOLE_DEVICE);
 #endif
 }
 
diff --git a/bsp/stm32f20x/Drivers/board.h b/bsp/stm32f20x/Drivers/board.h
index 63a97b6b1c..9b58dd81c7 100644
--- a/bsp/stm32f20x/Drivers/board.h
+++ b/bsp/stm32f20x/Drivers/board.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -16,32 +16,32 @@
 
 /* board configuration */
 //  SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card
-// 	Default: 1
-#define STM32_USE_SDIO			1
+//  Default: 1
+#define STM32_USE_SDIO          1
 
 /* whether use board external SRAM memory */
 // Use external SRAM memory on the board
-// 	Enable External SRAM memory
+//  Enable External SRAM memory
 #define STM32_EXT_SRAM          0
-//	Begin Address of External SRAM
-//		Default: 0x68000000
+//  Begin Address of External SRAM
+//      Default: 0x68000000
 #define STM32_EXT_SRAM_BEGIN    0x68000000 /* the begining address of external SRAM */
-//	End Address of External SRAM
-//		Default: 0x68080000
+//  End Address of External SRAM
+//      Default: 0x68080000
 #define STM32_EXT_SRAM_END      0x68080000 /* the end address of external SRAM */
 // 
 
 //  Internal SRAM memory size[Kbytes] <8-128>
-//	Default: 64
+//  Default: 64
 #define STM32_SRAM_SIZE         128
 #define STM32_SRAM_END          (0x20000000 + STM32_SRAM_SIZE * 1024)
 
 //  Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
-// 	Default: 1
-#define STM32_CONSOLE_USART		1
+//  Default: 1
+#define STM32_CONSOLE_USART     1
 
 //  Ethernet Interface: <0=> Microchip ENC28J60
-#define STM32_ETH_IF			0
+#define STM32_ETH_IF            0
 
 void rt_hw_board_led_on(int n);
 void rt_hw_board_led_off(int n);
@@ -64,21 +64,21 @@ void rt_hw_board_init(void);
 #define SD_DETECT_PIN                    GPIO_Pin_0                 /* PB.0 */
 #define SD_DETECT_GPIO_PORT              GPIOB                       /* GPIOB */
 #define SD_DETECT_GPIO_CLK               RCC_AHB1Periph_GPIOB
-   
+
 #define SDIO_FIFO_ADDRESS                ((uint32_t)0x40012C80)
-/** 
+/**
   * @brief  SDIO Intialization Frequency (400KHz max)
   */
 #define SDIO_INIT_CLK_DIV                ((uint8_t)0x76)
-/** 
-  * @brief  SDIO Data Transfer Frequency (25MHz max) 
+/**
+  * @brief  SDIO Data Transfer Frequency (25MHz max)
   */
-#define SDIO_TRANSFER_CLK_DIV            ((uint8_t)0x0) 
+#define SDIO_TRANSFER_CLK_DIV            ((uint8_t)0x0)
 
 #define SD_SDIO_DMA                   DMA2
 #define SD_SDIO_DMA_CLK               RCC_AHB1Periph_DMA2
- 
-#define SD_SDIO_DMA_STREAM3	          3
+
+#define SD_SDIO_DMA_STREAM3           3
 //#define SD_SDIO_DMA_STREAM6           6
 
 #ifdef SD_SDIO_DMA_STREAM3
@@ -88,7 +88,7 @@ void rt_hw_board_init(void);
  #define SD_SDIO_DMA_FLAG_DMEIF        DMA_FLAG_DMEIF3
  #define SD_SDIO_DMA_FLAG_TEIF         DMA_FLAG_TEIF3
  #define SD_SDIO_DMA_FLAG_HTIF         DMA_FLAG_HTIF3
- #define SD_SDIO_DMA_FLAG_TCIF         DMA_FLAG_TCIF3 
+ #define SD_SDIO_DMA_FLAG_TCIF         DMA_FLAG_TCIF3
 #elif defined SD_SDIO_DMA_STREAM6
  #define SD_SDIO_DMA_STREAM            DMA2_Stream6
  #define SD_SDIO_DMA_CHANNEL           DMA_Channel_4
@@ -96,11 +96,11 @@ void rt_hw_board_init(void);
  #define SD_SDIO_DMA_FLAG_DMEIF        DMA_FLAG_DMEIF6
  #define SD_SDIO_DMA_FLAG_TEIF         DMA_FLAG_TEIF6
  #define SD_SDIO_DMA_FLAG_HTIF         DMA_FLAG_HTIF6
- #define SD_SDIO_DMA_FLAG_TCIF         DMA_FLAG_TCIF6 
+ #define SD_SDIO_DMA_FLAG_TCIF         DMA_FLAG_TCIF6
 #endif /* SD_SDIO_DMA_STREAM3 */
 
 void SD_LowLevel_DeInit(void);
-void SD_LowLevel_Init(void); 
+void SD_LowLevel_Init(void);
 void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize);
 void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize);
 
diff --git a/bsp/stm32f20x/Drivers/drv_rtc.c b/bsp/stm32f20x/Drivers/drv_rtc.c
index 6078a15249..4e5093ee53 100644
--- a/bsp/stm32f20x/Drivers/drv_rtc.c
+++ b/bsp/stm32f20x/Drivers/drv_rtc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -43,20 +43,20 @@ static struct rt_device rtc;
 
 static time_t rt_mktime(struct tm *tm)
 {
-	long res;
-	int year;
-	year = tm->tm_year - 70;
+    long res;
+    int year;
+    year = tm->tm_year - 70;
 
-	res = YEAR * year + DAY * ((year + 1) / 4);
-	res += month[tm->tm_mon];
+    res = YEAR * year + DAY * ((year + 1) / 4);
+    res += month[tm->tm_mon];
 
-	if (tm->tm_mon > 1 && ((year + 2) % 4))
-	res -= DAY;
-	res += DAY * (tm->tm_mday - 1);
-	res += HOUR * tm->tm_hour;
-	res += MINUTE * tm->tm_min;
-	res += tm->tm_sec;
-	return res;
+    if (tm->tm_mon > 1 && ((year + 2) % 4))
+    res -= DAY;
+    res += DAY * (tm->tm_mday - 1);
+    res += HOUR * tm->tm_hour;
+    res += MINUTE * tm->tm_min;
+    res += tm->tm_sec;
+    return res;
 }
 static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
 {
@@ -76,7 +76,7 @@ static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_siz
 static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
 {
     time_t *time;
-	struct tm ti,*to;
+    struct tm ti,*to;
     RT_ASSERT(dev != RT_NULL);
 
     switch (cmd)
@@ -84,17 +84,17 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
     case RT_DEVICE_CTRL_RTC_GET_TIME:
         time = (time_t *)args;
         /* read device */
-		//RTC_GetTimeStamp(RTC_Format_BIN, &RTC_TimeStructure, &RTC_DateStructure);
-		RTC_GetTime(RTC_Format_BIN, &RTC_TimeStructure);
-		RTC_GetDate(RTC_Format_BIN, &RTC_DateStructure);
-		ti.tm_sec = RTC_TimeStructure.RTC_Seconds;
-		ti.tm_min = RTC_TimeStructure.RTC_Minutes;
-		ti.tm_hour = RTC_TimeStructure.RTC_Hours;
-		//ti.tm_wday = (RTC_DateStructure.RTC_WeekDay==7)?0:RTC_DateStructure.RTC_WeekDay;
-		ti.tm_mon = RTC_DateStructure.RTC_Month -1;
-		ti.tm_mday = RTC_DateStructure.RTC_Date;
-		ti.tm_year = RTC_DateStructure.RTC_Year + 70;
-		*time = rt_mktime(&ti);
+        //RTC_GetTimeStamp(RTC_Format_BIN, &RTC_TimeStructure, &RTC_DateStructure);
+        RTC_GetTime(RTC_Format_BIN, &RTC_TimeStructure);
+        RTC_GetDate(RTC_Format_BIN, &RTC_DateStructure);
+        ti.tm_sec = RTC_TimeStructure.RTC_Seconds;
+        ti.tm_min = RTC_TimeStructure.RTC_Minutes;
+        ti.tm_hour = RTC_TimeStructure.RTC_Hours;
+        //ti.tm_wday = (RTC_DateStructure.RTC_WeekDay==7)?0:RTC_DateStructure.RTC_WeekDay;
+        ti.tm_mon = RTC_DateStructure.RTC_Month -1;
+        ti.tm_mday = RTC_DateStructure.RTC_Date;
+        ti.tm_year = RTC_DateStructure.RTC_Year + 70;
+        *time = rt_mktime(&ti);
         //*time = RTC_GetCounter();
 
         break;
@@ -104,10 +104,10 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
         time = (time_t *)args;
 
         /* Enable the PWR clock */
-	    RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
+        RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
 
-	    /* Allow access to RTC */
-	    PWR_BackupAccessCmd(ENABLE);
+        /* Allow access to RTC */
+        PWR_BackupAccessCmd(ENABLE);
 
         /* Wait until last write operation on RTC registers has finished */
         //RTC_WaitForLastTask();
@@ -115,22 +115,22 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
         /* Change the current time */
         //RTC_SetCounter(*time);
 
-		to = gmtime(time);
-		RTC_TimeStructure.RTC_Seconds = to->tm_sec;
-		RTC_TimeStructure.RTC_Minutes = to->tm_min;
-		RTC_TimeStructure.RTC_Hours	= to->tm_hour;
-		//RTC_DateStructure.RTC_WeekDay =(ti->tm_wday==0)?7:ti->tm_wday;
-		RTC_DateStructure.RTC_Month = to->tm_mon + 1;
-		RTC_DateStructure.RTC_Date = to->tm_mday;
-		RTC_DateStructure.RTC_Year = to->tm_year - 70;
-		RTC_SetTime(RTC_Format_BIN, &RTC_TimeStructure);
-		RTC_SetDate(RTC_Format_BIN, &RTC_DateStructure);
+        to = gmtime(time);
+        RTC_TimeStructure.RTC_Seconds = to->tm_sec;
+        RTC_TimeStructure.RTC_Minutes = to->tm_min;
+        RTC_TimeStructure.RTC_Hours = to->tm_hour;
+        //RTC_DateStructure.RTC_WeekDay =(ti->tm_wday==0)?7:ti->tm_wday;
+        RTC_DateStructure.RTC_Month = to->tm_mon + 1;
+        RTC_DateStructure.RTC_Date = to->tm_mday;
+        RTC_DateStructure.RTC_Year = to->tm_year - 70;
+        RTC_SetTime(RTC_Format_BIN, &RTC_TimeStructure);
+        RTC_SetDate(RTC_Format_BIN, &RTC_DateStructure);
 
         /* Wait until last write operation on RTC registers has finished */
         //RTC_WaitForLastTask();
 
         RTC_WriteBackupRegister(RTC_BKP_DR1, 0xA5A5);
-		//BKP_WriteBackupRegister(BKP_DR1, 0xA5A5);
+        //BKP_WriteBackupRegister(BKP_DR1, 0xA5A5);
     }
     break;
     }
@@ -147,75 +147,75 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
 *******************************************************************************/
 int RTC_Config(void)
 {
-	u32 count=0x200000;
-	/* Enable the PWR clock */
-	RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
+    u32 count=0x200000;
+    /* Enable the PWR clock */
+    RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
 
-	/* Allow access to RTC */
-	PWR_BackupAccessCmd(ENABLE);
+    /* Allow access to RTC */
+    PWR_BackupAccessCmd(ENABLE);
 
-	RCC_LSEConfig(RCC_LSE_ON);
+    RCC_LSEConfig(RCC_LSE_ON);
 
-	/* Wait till LSE is ready */
-	while ( (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) && (--count) );
+    /* Wait till LSE is ready */
+    while ( (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) && (--count) );
     if ( count == 0 )
     {
         return -1;
     }
 
-	/* Select the RTC Clock Source */
-	RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
+    /* Select the RTC Clock Source */
+    RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
 
-	SynchPrediv = 0xFF;
-	AsynchPrediv = 0x7F;
+    SynchPrediv = 0xFF;
+    AsynchPrediv = 0x7F;
 
-	/* Enable the RTC Clock */
-	RCC_RTCCLKCmd(ENABLE);
+    /* Enable the RTC Clock */
+    RCC_RTCCLKCmd(ENABLE);
 
-	/* Wait for RTC APB registers synchronisation */
-	RTC_WaitForSynchro();
+    /* Wait for RTC APB registers synchronisation */
+    RTC_WaitForSynchro();
 
-	/* Enable The TimeStamp */
-	//RTC_TimeStampCmd(RTC_TimeStampEdge_Falling, ENABLE);
+    /* Enable The TimeStamp */
+    //RTC_TimeStampCmd(RTC_TimeStampEdge_Falling, ENABLE);
 
-	return 0;
+    return 0;
 }
 
 int RTC_Configuration(void)
 {
 
-	if(RTC_Config() < 0 )
-		return -1;
+    if(RTC_Config() < 0 )
+        return -1;
 
-	/* Set the Time */
-	RTC_TimeStructure.RTC_Hours   = 0;
-	RTC_TimeStructure.RTC_Minutes = 0;
-	RTC_TimeStructure.RTC_Seconds = 0;
+    /* Set the Time */
+    RTC_TimeStructure.RTC_Hours   = 0;
+    RTC_TimeStructure.RTC_Minutes = 0;
+    RTC_TimeStructure.RTC_Seconds = 0;
 
-	/* Set the Date */
-	RTC_DateStructure.RTC_Month = 1;
-	RTC_DateStructure.RTC_Date = 1;
-	RTC_DateStructure.RTC_Year = 0;
-	RTC_DateStructure.RTC_WeekDay = 4;
+    /* Set the Date */
+    RTC_DateStructure.RTC_Month = 1;
+    RTC_DateStructure.RTC_Date = 1;
+    RTC_DateStructure.RTC_Year = 0;
+    RTC_DateStructure.RTC_WeekDay = 4;
 
-	/* Calendar Configuration */
-	RTC_InitStructure.RTC_AsynchPrediv = AsynchPrediv;
-	RTC_InitStructure.RTC_SynchPrediv =  SynchPrediv;
-	RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;
-	RTC_Init(&RTC_InitStructure);
+    /* Calendar Configuration */
+    RTC_InitStructure.RTC_AsynchPrediv = AsynchPrediv;
+    RTC_InitStructure.RTC_SynchPrediv =  SynchPrediv;
+    RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;
+    RTC_Init(&RTC_InitStructure);
 
-	/* Set Current Time and Date */
-	RTC_SetTime(RTC_Format_BCD, &RTC_TimeStructure);
-	RTC_SetDate(RTC_Format_BCD, &RTC_DateStructure);
-	if (RTC_Init(&RTC_InitStructure) == ERROR)
-		return -1;
+    /* Set Current Time and Date */
+    RTC_SetTime(RTC_Format_BCD, &RTC_TimeStructure);
+    RTC_SetDate(RTC_Format_BCD, &RTC_DateStructure);
+    if (RTC_Init(&RTC_InitStructure) == ERROR)
+        return -1;
 
     return 0;
 }
 
 void rt_hw_rtc_init(void)
 {
-    rtc.type	= RT_Device_Class_RTC;
+    rtc.type    = RT_Device_Class_RTC;
 
     if (RTC_ReadBackupRegister(RTC_BKP_DR1) != 0xA5A5)
     {
@@ -234,11 +234,11 @@ void rt_hw_rtc_init(void)
     }
 
     /* register rtc device */
-    rtc.init 	= RT_NULL;
-    rtc.open 	= rt_rtc_open;
-    rtc.close	= RT_NULL;
-    rtc.read 	= rt_rtc_read;
-    rtc.write	= RT_NULL;
+    rtc.init    = RT_NULL;
+    rtc.open    = rt_rtc_open;
+    rtc.close   = RT_NULL;
+    rtc.read    = rt_rtc_read;
+    rtc.write   = RT_NULL;
     rtc.control = rt_rtc_control;
 
     /* no private */
diff --git a/bsp/stm32f20x/Drivers/drv_rtc.h b/bsp/stm32f20x/Drivers/drv_rtc.h
index 8f6c9a00a0..0d0ad288fc 100644
--- a/bsp/stm32f20x/Drivers/drv_rtc.h
+++ b/bsp/stm32f20x/Drivers/drv_rtc.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/stm32f20x/Drivers/i2c.c b/bsp/stm32f20x/Drivers/i2c.c
index 27e9ce0280..5fb5854d2e 100644
--- a/bsp/stm32f20x/Drivers/i2c.c
+++ b/bsp/stm32f20x/Drivers/i2c.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -14,15 +14,15 @@
 #include "stm32f2xx_i2c.h"
 #include "stm32f2xx_dma.h"
 
-#define EV_SB		1
-#define EV_ADDR		(1<<1)
-#define EV_STOPF	(1<<2)
-#define EV_BTF		(1<<3)
-#define ERR_ARLO	(1<<4)
-#define ERR_AF		(1<<5)
-#define ERR_OVR		(1<<6)
-#define ERR_PECERR	(1<<7)
-#define ERR_BERR	(1<<8)
+#define EV_SB       1
+#define EV_ADDR     (1<<1)
+#define EV_STOPF    (1<<2)
+#define EV_BTF      (1<<3)
+#define ERR_ARLO    (1<<4)
+#define ERR_AF      (1<<5)
+#define ERR_OVR     (1<<6)
+#define ERR_PECERR  (1<<7)
+#define ERR_BERR    (1<<8)
 #define I2C_COMPLETE (1<<9)
 
 #define I2C_BUSY  1
@@ -66,7 +66,7 @@ void dump_i2c_register(I2C_TypeDef* I2Cx)
     else
         I2C_TRACE("======I2C2======\n");
     I2C_TRACE("CR1: 0x%x\tCR2: 0x%x\n", I2Cx->CR1, I2Cx->CR2);
-	I2C_TRACE("SR1: 0x%x\tSR2: 0x%x\n", I2Cx->SR1, I2Cx->SR2);
+    I2C_TRACE("SR1: 0x%x\tSR2: 0x%x\n", I2Cx->SR1, I2Cx->SR2);
 
 }
 
@@ -75,537 +75,537 @@ Status I2C_AcknowledgePolling(I2C_TypeDef* I2Cx ,uint8_t Addr)
 {
     uint32_t timeout = 0xFFFF, ret;
     uint16_t tmp;
-	ret = rt_mutex_take(i2c_mux, RT_WAITING_FOREVER );
-	
-	if( ret == RT_EOK )
-	{
-	    do{
-	        if( timeout-- <= 0 )
-	        {
-	            I2C_ClearFlag(I2Cx,I2C_FLAG_AF);
-	            I2Cx->CR1 |= CR1_STOP_Set;
-				rt_mutex_release(i2c_mux);
-	            return Error;
-	        }
-	
-	        I2Cx->CR1 |= CR1_START_Set;
-	        tmp = I2Cx->SR1;//MSB
-	        I2Cx->DR = Addr;
-	        
-	    }while((I2Cx->SR1&0x0002) != 0x0002);
-	  
-	    I2C_ClearFlag(I2Cx,I2C_FLAG_AF);
-	    I2Cx->CR1 |= CR1_STOP_Set;
-	    while ((I2Cx->CR1&0x200) == 0x200);
-		rt_kprintf( "AcknowledgePolling OK\n");
-		rt_mutex_release(i2c_mux);
-		return Success; 
-	}
-	else
-		return Error;
-} 
+    ret = rt_mutex_take(i2c_mux, RT_WAITING_FOREVER );
 
-/* 
-	Only 1 byte READ using Interrupt or Polling otherwise using DMA
+    if( ret == RT_EOK )
+    {
+        do{
+            if( timeout-- <= 0 )
+            {
+                I2C_ClearFlag(I2Cx,I2C_FLAG_AF);
+                I2Cx->CR1 |= CR1_STOP_Set;
+                rt_mutex_release(i2c_mux);
+                return Error;
+            }
+
+            I2Cx->CR1 |= CR1_START_Set;
+            tmp = I2Cx->SR1;//MSB
+            I2Cx->DR = Addr;
+
+        }while((I2Cx->SR1&0x0002) != 0x0002);
+
+        I2C_ClearFlag(I2Cx,I2C_FLAG_AF);
+        I2Cx->CR1 |= CR1_STOP_Set;
+        while ((I2Cx->CR1&0x200) == 0x200);
+        rt_kprintf( "AcknowledgePolling OK\n");
+        rt_mutex_release(i2c_mux);
+        return Success;
+    }
+    else
+        return Error;
+}
+
+/*
+    Only 1 byte READ using Interrupt or Polling otherwise using DMA
 */
 void I2C1_EV_IRQHandler()
 {
-	__IO uint16_t regSR1, regSR2;
-	__IO uint32_t regSR;
-	int i=10;
+    __IO uint16_t regSR1, regSR2;
+    __IO uint32_t regSR;
+    int i=10;
 
-	rt_interrupt_enter();
-	//rt_hw_led_on(10);
-	regSR1 = I2C1->SR1;
-	regSR2 = I2C1->SR2;
-	regSR =  (regSR2 << 16) | regSR1;
-	//rt_kprintf("EV=> SR1: 0x%x\tSR2: 0x%x\tSR: 0x%x status: %d\n", regSR1, regSR2, regSR, i2cStatus);
- 
-	if( (regSR & I2C_EVENT_MASTER_MODE_SELECT) == I2C_EVENT_MASTER_MODE_SELECT)	//EV5
-	{
+    rt_interrupt_enter();
+    //rt_hw_led_on(10);
+    regSR1 = I2C1->SR1;
+    regSR2 = I2C1->SR2;
+    regSR =  (regSR2 << 16) | regSR1;
+    //rt_kprintf("EV=> SR1: 0x%x\tSR2: 0x%x\tSR: 0x%x status: %d\n", regSR1, regSR2, regSR, i2cStatus);
 
-		if( i2cStatus == S1 ) //Send TX Command
-		{
-			I2C1->DR = DevAddr & 0xFE;
-			i2cStatus = S2;
-		}
-		else if( i2cStatus == S4 ) //Send RX Command
-		{
-			I2C1->DR = DevAddr | 0x01;
-			i2cStatus = S5;
-		}
+    if( (regSR & I2C_EVENT_MASTER_MODE_SELECT) == I2C_EVENT_MASTER_MODE_SELECT) //EV5
+    {
+
+        if( i2cStatus == S1 ) //Send TX Command
+        {
+            I2C1->DR = DevAddr & 0xFE;
+            i2cStatus = S2;
+        }
+        else if( i2cStatus == S4 ) //Send RX Command
+        {
+            I2C1->DR = DevAddr | 0x01;
+            i2cStatus = S5;
+        }
 
 
-		regSR1 = 0;
-		regSR2 = 0;
+        regSR1 = 0;
+        regSR2 = 0;
 
-	}
-	if( (regSR & I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)== I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED )			//EV6
-	{
-		switch( i2cStatus )
-		{
-			case S2: //Send 1st memory address phase
-			{
-				//I2C_DMACmd(I2C1, ENABLE);
-				I2C1->DR = MemAddr[0];
-				if( memtype == I2C_MEM_1Byte ) 
-					i2cStatus = S2_2;
-				else if( memtype == I2C_MEM_2Bytes )
-					i2cStatus = S2_1;
-			}
-			break;
-			case S5: //Set RX buffer phase
-			{
-				if( i2cFlag == I2C_READ_DMA )
-				{
-					I2C_DMAConfig(I2C1, i2c_buf, BufSize, I2C_DIRECTION_RX);
-					I2C1->CR2 |= CR2_LAST_Set | CR2_DMAEN_Set;
-					DMA_ITConfig( I2C1_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE);
-				}
-				else if( i2cFlag == I2C_READ_INTERRUPT )
-				{ 
-					I2C1->CR2 |= I2C_IT_BUF;
-					I2C1->CR1 &= CR1_ACK_Reset;
-	                /* Program the STOP */
-	                I2C1->CR1 |= CR1_STOP_Set;
-				}
-				i2cStatus = S6;
-			}
-			break;
-		}
-		
-		regSR1 = 0;
-		regSR2 = 0;
-		//dump_i2c_register(I2C1);
-	}
-	if((regSR & I2C_EVENT_MASTER_BYTE_RECEIVED) == I2C_EVENT_MASTER_BYTE_RECEIVED) //EV7
-	{
-		//Interrupt RX complete phase
-		if( i2cStatus == S6	&& i2cFlag == I2C_READ_INTERRUPT )
-		{
-			*i2c_buf = I2C1->DR;
-			i2cStatus = S_STOP;
-			rt_event_send(&i2c_event, I2C_COMPLETE);
-		}
-	} 
-	if( (regSR & I2C_EVENT_MASTER_BYTE_TRANSMITTED) == I2C_EVENT_MASTER_BYTE_TRANSMITTED ) //EV8_2
-	{
-		//Start TX/RX phase
-		if(i2cStatus == S3)
-		{
-			DMA_ClearFlag(I2C1_DMA_CHANNEL_TX, DMA_FLAG_TCIF6 );
-			DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE);
-			switch (i2cFlag)
-			{
-				case I2C_WRITE:
-					i2cStatus = S_STOP;
-					I2C1->CR1 |= CR1_STOP_Set;
-					rt_event_send(&i2c_event, I2C_COMPLETE);					
-				break;
+    }
+    if( (regSR & I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)== I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED )           //EV6
+    {
+        switch( i2cStatus )
+        {
+            case S2: //Send 1st memory address phase
+            {
+                //I2C_DMACmd(I2C1, ENABLE);
+                I2C1->DR = MemAddr[0];
+                if( memtype == I2C_MEM_1Byte )
+                    i2cStatus = S2_2;
+                else if( memtype == I2C_MEM_2Bytes )
+                    i2cStatus = S2_1;
+            }
+            break;
+            case S5: //Set RX buffer phase
+            {
+                if( i2cFlag == I2C_READ_DMA )
+                {
+                    I2C_DMAConfig(I2C1, i2c_buf, BufSize, I2C_DIRECTION_RX);
+                    I2C1->CR2 |= CR2_LAST_Set | CR2_DMAEN_Set;
+                    DMA_ITConfig( I2C1_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE);
+                }
+                else if( i2cFlag == I2C_READ_INTERRUPT )
+                {
+                    I2C1->CR2 |= I2C_IT_BUF;
+                    I2C1->CR1 &= CR1_ACK_Reset;
+                    /* Program the STOP */
+                    I2C1->CR1 |= CR1_STOP_Set;
+                }
+                i2cStatus = S6;
+            }
+            break;
+        }
 
-				case I2C_READ_DMA:
-					i2cStatus = S4;
-					I2C1->CR1 |= CR1_START_Set;
-				break;
+        regSR1 = 0;
+        regSR2 = 0;
+        //dump_i2c_register(I2C1);
+    }
+    if((regSR & I2C_EVENT_MASTER_BYTE_RECEIVED) == I2C_EVENT_MASTER_BYTE_RECEIVED) //EV7
+    {
+        //Interrupt RX complete phase
+        if( i2cStatus == S6 && i2cFlag == I2C_READ_INTERRUPT )
+        {
+            *i2c_buf = I2C1->DR;
+            i2cStatus = S_STOP;
+            rt_event_send(&i2c_event, I2C_COMPLETE);
+        }
+    }
+    if( (regSR & I2C_EVENT_MASTER_BYTE_TRANSMITTED) == I2C_EVENT_MASTER_BYTE_TRANSMITTED ) //EV8_2
+    {
+        //Start TX/RX phase
+        if(i2cStatus == S3)
+        {
+            DMA_ClearFlag(I2C1_DMA_CHANNEL_TX, DMA_FLAG_TCIF6 );
+            DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE);
+            switch (i2cFlag)
+            {
+                case I2C_WRITE:
+                    i2cStatus = S_STOP;
+                    I2C1->CR1 |= CR1_STOP_Set;
+                    rt_event_send(&i2c_event, I2C_COMPLETE);
+                break;
 
-				case I2C_READ_POLLING:
-					i2cStatus = S_STOP;
-					rt_event_send(&i2c_event, I2C_COMPLETE);
-					I2C1->CR2 &= ~(CR2_LAST_Set | I2C_IT_EVT | CR2_DMAEN_Set);
-					I2C1->CR1 |= CR1_START_Set;
-				break;
+                case I2C_READ_DMA:
+                    i2cStatus = S4;
+                    I2C1->CR1 |= CR1_START_Set;
+                break;
 
-				case I2C_READ_INTERRUPT:
-					i2cStatus = S4;
-					I2C1->CR1 |= CR1_START_Set;
-				break;
-			}
-		}
-		if( i2cStatus == S2_1 ) //Send 2nd memory address
-		{
-			if( memtype == I2C_MEM_2Bytes ) //memory address has 2 bytes
-			{
-				I2C1->DR = MemAddr[1];
-				i2cStatus = S2_2;
-			}
-			if( i2cFlag == I2C_READ_POLLING || i2cFlag == I2C_READ_DMA || i2cFlag == I2C_READ_INTERRUPT)
-			{
-				i2cStatus = S3;
-			}
-		}
-		if( i2cStatus == S2_2 ) //Set TX DAM phase
-		{
-			I2C_DMAConfig(I2C1, i2c_buf, BufSize, I2C_DIRECTION_TX);
-			I2C1->CR2 |= CR2_DMAEN_Set;
-			i2cStatus = S3;
-		}			   
-	} 
+                case I2C_READ_POLLING:
+                    i2cStatus = S_STOP;
+                    rt_event_send(&i2c_event, I2C_COMPLETE);
+                    I2C1->CR2 &= ~(CR2_LAST_Set | I2C_IT_EVT | CR2_DMAEN_Set);
+                    I2C1->CR1 |= CR1_START_Set;
+                break;
 
-	rt_interrupt_leave();
+                case I2C_READ_INTERRUPT:
+                    i2cStatus = S4;
+                    I2C1->CR1 |= CR1_START_Set;
+                break;
+            }
+        }
+        if( i2cStatus == S2_1 ) //Send 2nd memory address
+        {
+            if( memtype == I2C_MEM_2Bytes ) //memory address has 2 bytes
+            {
+                I2C1->DR = MemAddr[1];
+                i2cStatus = S2_2;
+            }
+            if( i2cFlag == I2C_READ_POLLING || i2cFlag == I2C_READ_DMA || i2cFlag == I2C_READ_INTERRUPT)
+            {
+                i2cStatus = S3;
+            }
+        }
+        if( i2cStatus == S2_2 ) //Set TX DAM phase
+        {
+            I2C_DMAConfig(I2C1, i2c_buf, BufSize, I2C_DIRECTION_TX);
+            I2C1->CR2 |= CR2_DMAEN_Set;
+            i2cStatus = S3;
+        }
+    }
+
+    rt_interrupt_leave();
 
 }
 
 void DMA1_Stream6_IRQHandler(void) //I2C1 TX
 {
-	rt_interrupt_enter();
-	if (DMA_GetITStatus(I2C1_DMA_CHANNEL_TX, DMA_IT_TCIF6))
+    rt_interrupt_enter();
+    if (DMA_GetITStatus(I2C1_DMA_CHANNEL_TX, DMA_IT_TCIF6))
     {
-		I2C_TRACE("TXTC\n");
-		DMA_ClearFlag(I2C1_DMA_CHANNEL_TX, DMA_FLAG_TCIF6 );
-		
+        I2C_TRACE("TXTC\n");
+        DMA_ClearFlag(I2C1_DMA_CHANNEL_TX, DMA_FLAG_TCIF6 );
+
     }
-	rt_interrupt_leave();	
+    rt_interrupt_leave();
 }
 
 void DMA1_Stream0_IRQHandler(void) //I2C1 RX
 {
 
-	rt_interrupt_enter();
+    rt_interrupt_enter();
 
-	if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_TCIF0))
+    if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_TCIF0))
     {
-	   I2C_TRACE("RXTC\n");
-	   /* clear DMA flag */
-		DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_TCIF0 );
-		DMA_ITConfig( I2C1_DMA_CHANNEL_RX, DMA_IT_TC, DISABLE);
-		DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE);
-		if( i2cStatus == S6 )
-		{
-			i2cStatus = S_STOP;
-			I2C1->CR1 |= CR1_STOP_Set;
-			rt_event_send(&i2c_event, I2C_COMPLETE);
-		}
+       I2C_TRACE("RXTC\n");
+       /* clear DMA flag */
+        DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_TCIF0 );
+        DMA_ITConfig( I2C1_DMA_CHANNEL_RX, DMA_IT_TC, DISABLE);
+        DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE);
+        if( i2cStatus == S6 )
+        {
+            i2cStatus = S_STOP;
+            I2C1->CR1 |= CR1_STOP_Set;
+            rt_event_send(&i2c_event, I2C_COMPLETE);
+        }
+    }
+    if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_HTIF0))
+    {
+        I2C_TRACE("RXHT\n");
+        DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_HTIF0 );
+    }
+    if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_TEIF0))
+    {
+        I2C_TRACE("RXTE\n");
+        DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_TEIF0 );
+    }
+    if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_FEIF0))
+    {
+        I2C_TRACE("RXFE\n");
+        DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_FEIF0 );
+    }
+    if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_DMEIF0))
+    {
+        I2C_TRACE("RXDME\n");
+        DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_DMEIF0 );
     }
-	if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_HTIF0))
-	{
-		I2C_TRACE("RXHT\n");
-		DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_HTIF0 );
-	}
-	if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_TEIF0))
-	{
-		I2C_TRACE("RXTE\n");
-		DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_TEIF0 );
-	}
-	if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_FEIF0))
-	{
-		I2C_TRACE("RXFE\n");
-		DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_FEIF0 );
-	}
-	if (DMA_GetITStatus(I2C1_DMA_CHANNEL_RX, DMA_IT_DMEIF0))
-	{
-		I2C_TRACE("RXDME\n");
-		DMA_ClearFlag(I2C1_DMA_CHANNEL_RX, DMA_FLAG_DMEIF0 );
-	}
 
-	rt_interrupt_leave();	
+    rt_interrupt_leave();
 }
 
 void I2C1_ER_IRQHandler()
 {
-	__IO uint16_t regSR1, regSR2;
-	
-	i2cErrorNo = 0;
-	regSR1 = I2C1->SR1;
-	I2C_TRACE("I2C Error SR1= 0x%X CR1 = 0x%X\n" , regSR1, I2C1->CR1);
-	if( (regSR1 &  SR1_AF_Set) ==  SR1_AF_Set)
-	{
-		I2C1->SR1 &= ~SR1_AF_Set;
-		i2cErrorNo |= ERR_AF;
-		I2C_TRACE("ACK failure\n");
-	}
-	if( (regSR1 & SR1_BERR_Set) ==  SR1_BERR_Set)
-	{
-		I2C1->SR1 &= ~SR1_BERR_Set;
-		i2cErrorNo |= ERR_BERR;
-		I2C_TRACE("Bus Error\n");
-	}
-	if( (regSR1 & SR1_ARLO_Set) ==  SR1_ARLO_Set)
-	{
-		I2C1->SR1 &= ~SR1_ARLO_Set;
-		i2cErrorNo |= ERR_ARLO;
-		I2C_TRACE("Arblitation lost\n");
-	}
-	//dump_i2c_register(I2C1);
+    __IO uint16_t regSR1, regSR2;
+
+    i2cErrorNo = 0;
+    regSR1 = I2C1->SR1;
+    I2C_TRACE("I2C Error SR1= 0x%X CR1 = 0x%X\n" , regSR1, I2C1->CR1);
+    if( (regSR1 &  SR1_AF_Set) ==  SR1_AF_Set)
+    {
+        I2C1->SR1 &= ~SR1_AF_Set;
+        i2cErrorNo |= ERR_AF;
+        I2C_TRACE("ACK failure\n");
+    }
+    if( (regSR1 & SR1_BERR_Set) ==  SR1_BERR_Set)
+    {
+        I2C1->SR1 &= ~SR1_BERR_Set;
+        i2cErrorNo |= ERR_BERR;
+        I2C_TRACE("Bus Error\n");
+    }
+    if( (regSR1 & SR1_ARLO_Set) ==  SR1_ARLO_Set)
+    {
+        I2C1->SR1 &= ~SR1_ARLO_Set;
+        i2cErrorNo |= ERR_ARLO;
+        I2C_TRACE("Arblitation lost\n");
+    }
+    //dump_i2c_register(I2C1);
 
 }
 Status I2C_Free_Bus(I2C_TypeDef* I2Cx, u32 timeout )
 {
-	/*u32 i = 0;
-	u16 tmp = 0;
-	GPIO_InitTypeDef  GPIO_InitStructure;
+    /*u32 i = 0;
+    u16 tmp = 0;
+    GPIO_InitTypeDef  GPIO_InitStructure;
 
-	tmp = I2Cx->SR2;
+    tmp = I2Cx->SR2;
 
-	while( tmp & SR2_BUSY )
-	{
-		if( i++ < timeout )
-		{
-			if( I2Cx == I2C1 )
-			{
-				//rt_kprintf("Free Bus!\n");
-				GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9;
-		        GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-		        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD;
-		        GPIO_Init(GPIOB, &GPIO_InitStructure);
+    while( tmp & SR2_BUSY )
+    {
+        if( i++ < timeout )
+        {
+            if( I2Cx == I2C1 )
+            {
+                //rt_kprintf("Free Bus!\n");
+                GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9;
+                GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+                GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD;
+                GPIO_Init(GPIOB, &GPIO_InitStructure);
 
-				GPIO_SetBits(GPIOB, GPIO_Pin_6);
-				GPIO_SetBits(GPIOB, GPIO_Pin_7);
-				
-			}
-			else if( I2Cx == I2C2 )
-			{
-				GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11;
-		        GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-		        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD;
-		        GPIO_Init(GPIOB, &GPIO_InitStructure);
+                GPIO_SetBits(GPIOB, GPIO_Pin_6);
+                GPIO_SetBits(GPIOB, GPIO_Pin_7);
 
-				GPIO_ResetBits(GPIOB, GPIO_Pin_10);
-			}
-			rt_thread_delay(10);
-			GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
-		    GPIO_Init(GPIOB, &GPIO_InitStructure);
-			I2C_Cmd(I2Cx, DISABLE);
-        	I2C_Cmd(I2Cx, ENABLE);
-		}
-		else
-			return Error;
-		tmp = I2Cx->SR2;
-	}	*/
-	return Success;
+            }
+            else if( I2Cx == I2C2 )
+            {
+                GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11;
+                GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+                GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD;
+                GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+                GPIO_ResetBits(GPIOB, GPIO_Pin_10);
+            }
+            rt_thread_delay(10);
+            GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
+            GPIO_Init(GPIOB, &GPIO_InitStructure);
+            I2C_Cmd(I2Cx, DISABLE);
+            I2C_Cmd(I2Cx, ENABLE);
+        }
+        else
+            return Error;
+        tmp = I2Cx->SR2;
+    }   */
+    return Success;
 
 }
 
 /*
-	I2Cx: I2C1 or I2C2 (Now it only support I2C1)
-	pBuffer: Buffer point
-	NumByteToRW: Number of bytes read/write
+    I2Cx: I2C1 or I2C2 (Now it only support I2C1)
+    pBuffer: Buffer point
+    NumByteToRW: Number of bytes read/write
     memAddr: 1-2 bytes memory address
-	SlaveAddress: device address
-	MemType: 1 = memory address size 1 bytes, 2 = memory address size 2 bytes	
+    SlaveAddress: device address
+    MemType: 1 = memory address size 1 bytes, 2 = memory address size 2 bytes
 */
 Status I2C_IORW(I2C_TypeDef* I2Cx, uint8_t* pBuffer, uint32_t NumByteToRW, uint16_t memAddr, uint8_t SlaveAddress, uint8_t MemType )
 {
-	uint32_t ev, Timeout=0xFFFF;
+    uint32_t ev, Timeout=0xFFFF;
     uint16_t temp, temp2;
-	static uint32_t call_cnt = 0, i;
-	Status ret;
+    static uint32_t call_cnt = 0, i;
+    Status ret;
 
-	ret = rt_mutex_take(i2c_mux, RT_WAITING_FOREVER );
-	if( ret == RT_EOK )
-	{
-		ret = Success;
-		DevAddr = SlaveAddress;
-		BufSize = NumByteToRW;
-		i2c_buf = pBuffer;
-		memtype = MemType;
+    ret = rt_mutex_take(i2c_mux, RT_WAITING_FOREVER );
+    if( ret == RT_EOK )
+    {
+        ret = Success;
+        DevAddr = SlaveAddress;
+        BufSize = NumByteToRW;
+        i2c_buf = pBuffer;
+        memtype = MemType;
 
-		MemAddr = (uint8_t*)&memAddr;
-		I2CDirection = I2C_DIRECTION_TX;
-	
-		I2CMode = DMA;
-	
-		i2cStatus = S1;
-		if( SlaveAddress  & 0x01 )
-		{
-			if( BufSize == 1 )
-				i2cFlag = I2C_READ_INTERRUPT; //I2C_READ_POLLING; 
-			else
-				i2cFlag = I2C_READ_DMA;
-		}
-		else 
-			i2cFlag = I2C_WRITE;
-		I2Cx->CR2 |= I2C_IT_ERR | I2C_IT_EVT;// | CR2_DMAEN_Set;
-			
-		I2Cx->CR1 |= CR1_START_Set;
+        MemAddr = (uint8_t*)&memAddr;
+        I2CDirection = I2C_DIRECTION_TX;
 
-		Timeout = 0xFFFF;
-		if( rt_event_recv( &i2c_event, I2C_COMPLETE, RT_EVENT_FLAG_AND | RT_EVENT_FLAG_CLEAR, RT_WAITING_FOREVER, &ev ) != RT_EOK ) {ret = Error; goto i2cError;}
-	
-		if( i2cFlag == I2C_READ_POLLING )
-		{
-			while ((I2Cx->SR1&0x0001) != 0x0001)
-			if (Timeout-- == 0)	{ret = Error; goto i2cError;}
-			Timeout = 0xFFFF;
-	        I2Cx->DR = DevAddr;
-	        /* Wait until ADDR is set: EV6 */
-	        while ((I2Cx->SR1&0x0002) != 0x0002)
-	        {
-	            if (Timeout-- == 0){ret = Error; goto i2cError;}
-	        }
-			/* Clear ACK bit */
-	        I2Cx->CR1 &= CR1_ACK_Reset;
-	        /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
-	        software sequence must complete before the current byte end of transfer */
-	        __disable_irq();
-	        /* Clear ADDR flag */
-	        temp = I2Cx->SR2;
-	        /* Program the STOP */
-	        I2Cx->CR1 |= CR1_STOP_Set;
-	        /* Re-enable IRQs */
-	        __enable_irq();
-	        /* Wait until a data is received in DR register (RXNE = 1) EV7 */
-	        while ((I2Cx->SR1 & 0x00040) != 0x000040)if (Timeout-- == 0){ret = Error; goto i2cError;}
-	        /* Read the data */
-	        *i2c_buf = I2Cx->DR;
-	        /* Make sure that the STOP bit is cleared by Hardware before CR1 write access */
-	        while ((I2Cx->CR1&0x200) == 0x200)if (Timeout-- == 0){ret = Error; goto i2cError;}
-	        /* Enable Acknowledgement to be ready for another reception */
-	        I2Cx->CR1 |= CR1_ACK_Set;
-		}
-		else
-		{
-			while ((I2Cx->CR1&0x200) == 0x200)
-			{
-				if (Timeout-- == 0) {ret = Error; break;}
-			}
-			if( i2cFlag == I2C_READ_INTERRUPT )
-				I2Cx->CR1 |= CR1_ACK_Set; 
-		}
-	i2cError:
-		if( ret == Error )
-		{
-			/* TODO: i2c error handler */
-			/* Need check i2cErrorNo and Reset I2C bus */
-		}
-		I2Cx->CR2 &= ~CR2_FREQ_Reset;
-		//dump_i2c_register(I2C1);
-		rt_mutex_release(i2c_mux);
-		return ret;
-	}
-	else
-		return Error;
+        I2CMode = DMA;
+
+        i2cStatus = S1;
+        if( SlaveAddress  & 0x01 )
+        {
+            if( BufSize == 1 )
+                i2cFlag = I2C_READ_INTERRUPT; //I2C_READ_POLLING;
+            else
+                i2cFlag = I2C_READ_DMA;
+        }
+        else
+            i2cFlag = I2C_WRITE;
+        I2Cx->CR2 |= I2C_IT_ERR | I2C_IT_EVT;// | CR2_DMAEN_Set;
+
+        I2Cx->CR1 |= CR1_START_Set;
+
+        Timeout = 0xFFFF;
+        if( rt_event_recv( &i2c_event, I2C_COMPLETE, RT_EVENT_FLAG_AND | RT_EVENT_FLAG_CLEAR, RT_WAITING_FOREVER, &ev ) != RT_EOK ) {ret = Error; goto i2cError;}
+
+        if( i2cFlag == I2C_READ_POLLING )
+        {
+            while ((I2Cx->SR1&0x0001) != 0x0001)
+            if (Timeout-- == 0) {ret = Error; goto i2cError;}
+            Timeout = 0xFFFF;
+            I2Cx->DR = DevAddr;
+            /* Wait until ADDR is set: EV6 */
+            while ((I2Cx->SR1&0x0002) != 0x0002)
+            {
+                if (Timeout-- == 0){ret = Error; goto i2cError;}
+            }
+            /* Clear ACK bit */
+            I2Cx->CR1 &= CR1_ACK_Reset;
+            /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
+            software sequence must complete before the current byte end of transfer */
+            __disable_irq();
+            /* Clear ADDR flag */
+            temp = I2Cx->SR2;
+            /* Program the STOP */
+            I2Cx->CR1 |= CR1_STOP_Set;
+            /* Re-enable IRQs */
+            __enable_irq();
+            /* Wait until a data is received in DR register (RXNE = 1) EV7 */
+            while ((I2Cx->SR1 & 0x00040) != 0x000040)if (Timeout-- == 0){ret = Error; goto i2cError;}
+            /* Read the data */
+            *i2c_buf = I2Cx->DR;
+            /* Make sure that the STOP bit is cleared by Hardware before CR1 write access */
+            while ((I2Cx->CR1&0x200) == 0x200)if (Timeout-- == 0){ret = Error; goto i2cError;}
+            /* Enable Acknowledgement to be ready for another reception */
+            I2Cx->CR1 |= CR1_ACK_Set;
+        }
+        else
+        {
+            while ((I2Cx->CR1&0x200) == 0x200)
+            {
+                if (Timeout-- == 0) {ret = Error; break;}
+            }
+            if( i2cFlag == I2C_READ_INTERRUPT )
+                I2Cx->CR1 |= CR1_ACK_Set;
+        }
+    i2cError:
+        if( ret == Error )
+        {
+            /* TODO: i2c error handler */
+            /* Need check i2cErrorNo and Reset I2C bus */
+        }
+        I2Cx->CR2 &= ~CR2_FREQ_Reset;
+        //dump_i2c_register(I2C1);
+        rt_mutex_release(i2c_mux);
+        return ret;
+    }
+    else
+        return Error;
 
 }
 
 
 void I2C1_INIT()
 {
-	GPIO_InitTypeDef  GPIO_InitStructure;
+    GPIO_InitTypeDef  GPIO_InitStructure;
     I2C_InitTypeDef  I2C_InitStructure;
-	NVIC_InitTypeDef  NVIC_InitStructure;
+    NVIC_InitTypeDef  NVIC_InitStructure;
 
-	if( i2c1_init_flag == 0 )
-	{
-		/* Enable the I2C clock */
-		RCC_APB1PeriphClockCmd(I2C1_CLK, ENABLE);
-		/* GPIOB clock enable */
-	    RCC_AHB1PeriphClockCmd(I2C1_GPIO_CLK, ENABLE);
-		/* Enable the DMA1 clock */
-	    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
-	
-		//Reset GPIO
-		GPIO_InitStructure.GPIO_Pin =  I2C1_SDA_PIN | I2C1_SCL_PIN;
-		GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-		GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
-		GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
-		GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
-		GPIO_Init(I2C1_GPIO_PORT, &GPIO_InitStructure);
-	
-		/* Connect PXx to I2C_SCL*/
-	 	GPIO_PinAFConfig(I2C1_GPIO_PORT, I2C1_SDA_SOURCE, GPIO_AF_I2C1);
-	
-	    /* Connect PXx to I2C_SDA*/
-	  	GPIO_PinAFConfig(I2C1_GPIO_PORT, I2C1_SCL_SOURCE, GPIO_AF_I2C1); 		
-	
-	    /* Enable I2C1 reset state */
-	    RCC_APB1PeriphResetCmd(I2C1_CLK, ENABLE);
-	    /* Release I2C1 from reset state */
-	    RCC_APB1PeriphResetCmd(I2C1_CLK, DISABLE);
-	
-		I2C_DeInit(I2C1);
-		I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
-	    I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
-	    I2C_InitStructure.I2C_OwnAddress1 = OwnAddress1;
-	    I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
-	    I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
-	    I2C_InitStructure.I2C_ClockSpeed = ClockSpeed;
-	    I2C_Init(I2C1, &I2C_InitStructure);	 
-	
-		I2C_Cmd(I2C1, ENABLE);
-	
-		/* Configure and enable I2C1 event interrupt -------------------------------*/
-		NVIC_InitStructure.NVIC_IRQChannel = I2C1_EV_IRQn;
-		NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
-		NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
-		NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-		NVIC_Init(&NVIC_InitStructure);
-		
-		/* Configure and enable I2C1 DMA interrupt -------------------------------*/  
-		NVIC_InitStructure.NVIC_IRQChannel = I2C1_DMA_TX_IRQn;
-		NVIC_Init(&NVIC_InitStructure);
-	
-		NVIC_InitStructure.NVIC_IRQChannel = I2C1_DMA_RX_IRQn;
-		NVIC_Init(&NVIC_InitStructure);
-	
-		/* Configure and enable I2C1 error interrupt -------------------------------*/  
-		NVIC_InitStructure.NVIC_IRQChannel = I2C1_ER_IRQn;
-		NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
-		NVIC_Init(&NVIC_InitStructure);
-	
-		/* I2C1 TX DMA Channel configuration */
-		DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE);
-	    DMA_DeInit(I2C1_DMA_CHANNEL_TX);
-		I2CDMA_InitStructure.DMA_Channel = DMA_Channel_1;
-	    I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C1_DR_Address;
-	    I2CDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0;   /* This parameter will be configured durig communication */
-	    I2CDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;    /* This parameter will be configured durig communication */
-	    I2CDMA_InitStructure.DMA_BufferSize = 0xFFFF;            /* This parameter will be configured durig communication */
-	    I2CDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
-	    I2CDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
-	    I2CDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;	
-	    I2CDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
-	    I2CDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
-	    I2CDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
-	    //I2CDMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
-		I2CDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
-		I2CDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
-		I2CDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
-		I2CDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
-	    DMA_Init(I2C1_DMA_CHANNEL_TX, &I2CDMA_InitStructure);
-	
-	    /* I2C1 RX DMA Channel configuration */
-		DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE);
-	    DMA_DeInit(I2C1_DMA_CHANNEL_RX);
-	    DMA_Init(I2C1_DMA_CHANNEL_RX, &I2CDMA_InitStructure); 
-		
-		//I2C_AcknowledgePolling(I2C1, 0x70);
-	
-		rt_event_init(&i2c_event, "i2c_event", RT_IPC_FLAG_FIFO );
-		i2c_mux = rt_mutex_create("i2c_mux", RT_IPC_FLAG_FIFO );
+    if( i2c1_init_flag == 0 )
+    {
+        /* Enable the I2C clock */
+        RCC_APB1PeriphClockCmd(I2C1_CLK, ENABLE);
+        /* GPIOB clock enable */
+        RCC_AHB1PeriphClockCmd(I2C1_GPIO_CLK, ENABLE);
+        /* Enable the DMA1 clock */
+        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
+
+        //Reset GPIO
+        GPIO_InitStructure.GPIO_Pin =  I2C1_SDA_PIN | I2C1_SCL_PIN;
+        GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+        GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
+        GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
+        GPIO_Init(I2C1_GPIO_PORT, &GPIO_InitStructure);
+
+        /* Connect PXx to I2C_SCL*/
+        GPIO_PinAFConfig(I2C1_GPIO_PORT, I2C1_SDA_SOURCE, GPIO_AF_I2C1);
+
+        /* Connect PXx to I2C_SDA*/
+        GPIO_PinAFConfig(I2C1_GPIO_PORT, I2C1_SCL_SOURCE, GPIO_AF_I2C1);
+
+        /* Enable I2C1 reset state */
+        RCC_APB1PeriphResetCmd(I2C1_CLK, ENABLE);
+        /* Release I2C1 from reset state */
+        RCC_APB1PeriphResetCmd(I2C1_CLK, DISABLE);
+
+        I2C_DeInit(I2C1);
+        I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
+        I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
+        I2C_InitStructure.I2C_OwnAddress1 = OwnAddress1;
+        I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
+        I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
+        I2C_InitStructure.I2C_ClockSpeed = ClockSpeed;
+        I2C_Init(I2C1, &I2C_InitStructure);
+
+        I2C_Cmd(I2C1, ENABLE);
+
+        /* Configure and enable I2C1 event interrupt -------------------------------*/
+        NVIC_InitStructure.NVIC_IRQChannel = I2C1_EV_IRQn;
+        NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+        NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+        NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+        NVIC_Init(&NVIC_InitStructure);
+
+        /* Configure and enable I2C1 DMA interrupt -------------------------------*/
+        NVIC_InitStructure.NVIC_IRQChannel = I2C1_DMA_TX_IRQn;
+        NVIC_Init(&NVIC_InitStructure);
+
+        NVIC_InitStructure.NVIC_IRQChannel = I2C1_DMA_RX_IRQn;
+        NVIC_Init(&NVIC_InitStructure);
+
+        /* Configure and enable I2C1 error interrupt -------------------------------*/
+        NVIC_InitStructure.NVIC_IRQChannel = I2C1_ER_IRQn;
+        NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
+        NVIC_Init(&NVIC_InitStructure);
+
+        /* I2C1 TX DMA Channel configuration */
+        DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE);
+        DMA_DeInit(I2C1_DMA_CHANNEL_TX);
+        I2CDMA_InitStructure.DMA_Channel = DMA_Channel_1;
+        I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C1_DR_Address;
+        I2CDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0;   /* This parameter will be configured durig communication */
+        I2CDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;    /* This parameter will be configured durig communication */
+        I2CDMA_InitStructure.DMA_BufferSize = 0xFFFF;            /* This parameter will be configured durig communication */
+        I2CDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+        I2CDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+        I2CDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
+        I2CDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
+        I2CDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+        I2CDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
+        //I2CDMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+        I2CDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
+        I2CDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
+        I2CDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
+        I2CDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
+        DMA_Init(I2C1_DMA_CHANNEL_TX, &I2CDMA_InitStructure);
+
+        /* I2C1 RX DMA Channel configuration */
+        DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE);
+        DMA_DeInit(I2C1_DMA_CHANNEL_RX);
+        DMA_Init(I2C1_DMA_CHANNEL_RX, &I2CDMA_InitStructure);
+
+        //I2C_AcknowledgePolling(I2C1, 0x70);
+
+        rt_event_init(&i2c_event, "i2c_event", RT_IPC_FLAG_FIFO );
+        i2c_mux = rt_mutex_create("i2c_mux", RT_IPC_FLAG_FIFO );
         if (i2c_mux == RT_NULL) 
         {
             LOG_E("Create mutex for i2c_mux failed!");
             return;
         }
-		i2c1_init_flag = 1;
-	}
+        i2c1_init_flag = 1;
+    }
 }
 
 void I2C_DMAConfig(I2C_TypeDef* I2Cx, uint8_t* pBuffer, uint32_t BufferSize, uint32_t Direction)
 {
-    
-	I2CDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)pBuffer;
-	I2CDMA_InitStructure.DMA_BufferSize = (uint32_t)BufferSize;
-	/* Initialize the DMA with the new parameters */
+
+    I2CDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)pBuffer;
+    I2CDMA_InitStructure.DMA_BufferSize = (uint32_t)BufferSize;
+    /* Initialize the DMA with the new parameters */
     if (Direction == I2C_DIRECTION_TX)
     {
         /* Configure the DMA Tx Channel with the buffer address and the buffer size */
         I2CDMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
 
         if (I2Cx == I2C1)
-		{
+        {
             I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C1_DR_Address;
-			//DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE);
-	        DMA_Init(I2C1_DMA_CHANNEL_TX, &I2CDMA_InitStructure);
-	        DMA_Cmd(I2C1_DMA_CHANNEL_TX, ENABLE);
-		}
+            //DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE);
+            DMA_Init(I2C1_DMA_CHANNEL_TX, &I2CDMA_InitStructure);
+            DMA_Cmd(I2C1_DMA_CHANNEL_TX, ENABLE);
+        }
         else
-		{
+        {
             I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C2_DR_Address;
-			//DMA_Cmd(I2C2_DMA_CHANNEL_TX, DISABLE);
-        	DMA_Init(I2C2_DMA_CHANNEL_TX, &I2CDMA_InitStructure);
-        	DMA_Cmd(I2C2_DMA_CHANNEL_TX, ENABLE);
-		}
+            //DMA_Cmd(I2C2_DMA_CHANNEL_TX, DISABLE);
+            DMA_Init(I2C2_DMA_CHANNEL_TX, &I2CDMA_InitStructure);
+            DMA_Cmd(I2C2_DMA_CHANNEL_TX, ENABLE);
+        }
 
     }
     else /* Reception */
@@ -614,19 +614,19 @@ void I2C_DMAConfig(I2C_TypeDef* I2Cx, uint8_t* pBuffer, uint32_t BufferSize, uin
         I2CDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
 
         if (I2Cx == I2C1)
-		{
+        {
             I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C1_DR_Address;
-			//DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE);
-	        DMA_Init(I2C1_DMA_CHANNEL_RX, &I2CDMA_InitStructure);
-	        DMA_Cmd(I2C1_DMA_CHANNEL_RX, ENABLE);
-		}
-        else 
-		{
+            //DMA_Cmd(I2C1_DMA_CHANNEL_RX, DISABLE);
+            DMA_Init(I2C1_DMA_CHANNEL_RX, &I2CDMA_InitStructure);
+            DMA_Cmd(I2C1_DMA_CHANNEL_RX, ENABLE);
+        }
+        else
+        {
             I2CDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)I2C2_DR_Address;
-		//	DMA_Cmd(I2C2_DMA_CHANNEL_RX, DISABLE);
-	        DMA_Init(I2C2_DMA_CHANNEL_RX, &I2CDMA_InitStructure);
-	        DMA_Cmd(I2C2_DMA_CHANNEL_RX, ENABLE);
-		}
+        //  DMA_Cmd(I2C2_DMA_CHANNEL_RX, DISABLE);
+            DMA_Init(I2C2_DMA_CHANNEL_RX, &I2CDMA_InitStructure);
+            DMA_Cmd(I2C2_DMA_CHANNEL_RX, ENABLE);
+        }
 
     }
 }
diff --git a/bsp/stm32f20x/Drivers/i2c.h b/bsp/stm32f20x/Drivers/i2c.h
index 3d2c9d871f..e1a6b57427 100644
--- a/bsp/stm32f20x/Drivers/i2c.h
+++ b/bsp/stm32f20x/Drivers/i2c.h
@@ -5,17 +5,17 @@
 
 /* Exported constants --------------------------------------------------------*/
 
-#define	SR1_AF_Set				((uint16_t)0x0400)
-#define	SR1_ARLO_Set			((uint16_t)0x0200)
-#define	SR1_BERR_Set			((uint16_t)0x0100)
-#define	SR1_ADDR_Set			((uint16_t)0x0002)
-#define	SR1_SB_Set				((uint16_t)0x0001)
+#define SR1_AF_Set              ((uint16_t)0x0400)
+#define SR1_ARLO_Set            ((uint16_t)0x0200)
+#define SR1_BERR_Set            ((uint16_t)0x0100)
+#define SR1_ADDR_Set            ((uint16_t)0x0002)
+#define SR1_SB_Set              ((uint16_t)0x0001)
 
 
-#define SR2_BUSY				((uint16_t)0x0002)
-#define SR2_MSL					((uint16_t)0x0001)
+#define SR2_BUSY                ((uint16_t)0x0002)
+#define SR2_MSL                 ((uint16_t)0x0001)
 
-#define CR1_SWRST_Set			((uint16_t)0x8000)
+#define CR1_SWRST_Set           ((uint16_t)0x8000)
 /* I2C SPE mask */
 #define CR1_PE_Set              ((uint16_t)0x0001)
 #define CR1_PE_Reset            ((uint16_t)0xFFFE)
@@ -97,12 +97,12 @@
 
 #define I2C1_DMA_CHANNEL_TX           DMA1_Stream6
 #define I2C1_DMA_CHANNEL_RX           DMA1_Stream0
-#define I2C1_DMA_TX_IRQn	          DMA1_Stream6_IRQn
+#define I2C1_DMA_TX_IRQn              DMA1_Stream6_IRQn
 #define I2C1_DMA_RX_IRQn              DMA1_Stream0_IRQn
-								  
+
 #define I2C2_DMA_CHANNEL_TX           DMA1_Stream2
 #define I2C2_DMA_CHANNEL_RX           DMA1_Stream7
-#define I2C2_DMA_TX_IRQn	          DMA1_Stream2_IRQn
+#define I2C2_DMA_TX_IRQn              DMA1_Stream2_IRQn
 #define I2C2_DMA_RX_IRQn              DMA1_Stream7_IRQn
 
 #define I2C1_DR_Address              0x40005410
@@ -112,20 +112,20 @@
 #define I2C1_SCL_PIN                  GPIO_Pin_6
 #define I2C1_SDA_SOURCE               GPIO_PinSource7
 #define I2C1_SCL_SOURCE               GPIO_PinSource6
-#define I2C1_GPIO_PORT          	  GPIOB 
-#define I2C1_GPIO_CLK          		  RCC_AHB1Periph_GPIOB
+#define I2C1_GPIO_PORT                GPIOB
+#define I2C1_GPIO_CLK                 RCC_AHB1Periph_GPIOB
 #define I2C1_CLK                      RCC_APB1Periph_I2C1
 
 #define I2C2_SDA_PIN                  GPIO_Pin_11
 #define I2C2_SCL_PIN                  GPIO_Pin_10
 #define I2C2_SDA_SOURCE               GPIO_PinSource11
 #define I2C2_SCL_SOURCE               GPIO_PinSource10
-#define I2C2_GPIO_PORT          	  GPIOB 
-#define I2C2_GPIO_CLK          		  RCC_AHB1Periph_GPIOB
+#define I2C2_GPIO_PORT                GPIOB
+#define I2C2_GPIO_CLK                 RCC_AHB1Periph_GPIOB
 #define I2C2_CLK                      RCC_APB1Periph_I2C1
 
-#define I2C_MEM_1Byte			      1
-#define I2C_MEM_2Bytes				  2
+#define I2C_MEM_1Byte                 1
+#define I2C_MEM_2Bytes                2
 
 typedef enum
 {
@@ -144,4 +144,4 @@ void I2C1_INIT();
 Status I2C_AcknowledgePolling(I2C_TypeDef* I2Cx ,uint8_t Addr);
 Status I2C_IORW(I2C_TypeDef* I2Cx, uint8_t* pBuffer, uint32_t NumByteToRead, uint16_t memAddr, uint8_t SlaveAddress , uint8_t MemType );
 
-#endif
\ No newline at end of file
+#endif
diff --git a/bsp/stm32f20x/Drivers/sdio_sd.c b/bsp/stm32f20x/Drivers/sdio_sd.c
index 4c0689768b..9eab300e0f 100644
--- a/bsp/stm32f20x/Drivers/sdio_sd.c
+++ b/bsp/stm32f20x/Drivers/sdio_sd.c
@@ -4,160 +4,160 @@
   * @author  MCD Application Team
   * @version V4.6.1
   * @date    18-April-2011
-  * @brief   This file provides a set of functions needed to manage the SDIO SD 
+  * @brief   This file provides a set of functions needed to manage the SDIO SD
   *          Card memory mounted on STM32xx-EVAL board (refer to stm32_eval.h
-  *          to know about the boards supporting this memory). 
-  *          
-  *            
+  *          to know about the boards supporting this memory).
+  *
+  *
   *  @verbatim
   *
   *          ===================================================================
   *                                   How to use this driver
   *          ===================================================================
-  *          It implements a high level communication layer for read and write 
-  *          from/to this memory. The needed STM32 hardware resources (SDIO and 
-  *          GPIO) are defined in stm32xx_eval.h file, and the initialization is 
-  *          performed in SD_LowLevel_Init() function declared in stm32xx_eval.c 
+  *          It implements a high level communication layer for read and write
+  *          from/to this memory. The needed STM32 hardware resources (SDIO and
+  *          GPIO) are defined in stm32xx_eval.h file, and the initialization is
+  *          performed in SD_LowLevel_Init() function declared in stm32xx_eval.c
   *          file.
-  *          You can easily tailor this driver to any other development board, 
-  *          by just adapting the defines for hardware resources and 
+  *          You can easily tailor this driver to any other development board,
+  *          by just adapting the defines for hardware resources and
   *          SD_LowLevel_Init() function.
-  *            
+  *
   *          A - SD Card Initialization and configuration
-  *          ============================================    
-  *            - To initialize the SD Card, use the SD_Init() function.  It 
-  *              Initializes the SD Card and put it into StandBy State (Ready 
+  *          ============================================
+  *            - To initialize the SD Card, use the SD_Init() function.  It
+  *              Initializes the SD Card and put it into StandBy State (Ready
   *              for data transfer). This function provide the following operations:
-  *           
+  *
   *              1 - Apply the SD Card initialization process at 400KHz and check
-  *                  the SD Card type (Standard Capacity or High Capacity). You 
-  *                  can change or adapt this frequency by adjusting the 
-  *                  "SDIO_INIT_CLK_DIV" define inside the stm32xx_eval.h file. 
+  *                  the SD Card type (Standard Capacity or High Capacity). You
+  *                  can change or adapt this frequency by adjusting the
+  *                  "SDIO_INIT_CLK_DIV" define inside the stm32xx_eval.h file.
   *                  The SD Card frequency (SDIO_CK) is computed as follows:
-  *                    
-  *                     +---------------------------------------------+    
+  *
+  *                     +---------------------------------------------+
   *                     | SDIO_CK = SDIOCLK / (SDIO_INIT_CLK_DIV + 2) |
-  *                     +---------------------------------------------+  
-  *                          
-  *                  In initialization mode and according to the SD Card standard, 
-  *                  make sure that the SDIO_CK frequency don't exceed 400KHz.        
-  *         
+  *                     +---------------------------------------------+
+  *
+  *                  In initialization mode and according to the SD Card standard,
+  *                  make sure that the SDIO_CK frequency don't exceed 400KHz.
+  *
   *              2 - Get the SD CID and CSD data. All these information are
   *                  managed by the SDCardInfo structure. This structure provide
-  *                  also ready computed SD Card capacity and Block size.   
+  *                  also ready computed SD Card capacity and Block size.
   *
   *              3 - Configure the SD Card Data transfer frequency. By Default,
   *                  the card transfer frequency is set to 24MHz. You can change
-  *                  or adapt this frequency by adjusting the "SDIO_TRANSFER_CLK_DIV" 
+  *                  or adapt this frequency by adjusting the "SDIO_TRANSFER_CLK_DIV"
   *                  define inside the stm32xx_eval.h file.
   *                  The SD Card frequency (SDIO_CK) is computed as follows:
-  *                    
-  *                     +---------------------------------------------+    
+  *
+  *                     +---------------------------------------------+
   *                     | SDIO_CK = SDIOCLK / (SDIO_INIT_CLK_DIV + 2) |
-  *                     +---------------------------------------------+     
-  *                                    
-  *                  In transfer mode and according to the SD Card standard, 
+  *                     +---------------------------------------------+
+  *
+  *                  In transfer mode and according to the SD Card standard,
   *                  make sure that the SDIO_CK frequency don't exceed 25MHz
   *                  and 50MHz in High-speed mode switch.
   *                  To be able to use a frequency higher than 24MHz, you should
-  *                  use the SDIO peripheral in bypass mode. Refer to the 
+  *                  use the SDIO peripheral in bypass mode. Refer to the
   *                  corresponding reference manual for more details.
-  *                    
+  *
   *              4 -  Select the corresponding SD Card according to the address
   *                   read with the step 2.
-  *                                   
-  *              5 -  Configure the SD Card in wide bus mode: 4-bits data.                
+  *
+  *              5 -  Configure the SD Card in wide bus mode: 4-bits data.
   *
   *          B - SD Card Read operation
-  *          ========================== 
+  *          ==========================
   *           - You can read SD card by using two function: SD_ReadBlock() and
   *             SD_ReadMultiBlocks() functions. These functions support only
   *             512-byte block length.
   *           - The SD_ReadBlock() function read only one block (512-byte). This
-  *             function can transfer the data using DMA controller or using 
-  *             polling mode. To select between DMA or polling mode refer to 
+  *             function can transfer the data using DMA controller or using
+  *             polling mode. To select between DMA or polling mode refer to
   *             "SD_DMA_MODE" or "SD_POLLING_MODE" inside the stm32_eval_sdio_sd.h
   *             file and uncomment the corresponding line. By default the SD DMA
-  *             mode is selected          
-  *           - The SD_ReadMultiBlocks() function read only mutli blocks (multiple 
-  *             of 512-byte). 
+  *             mode is selected
+  *           - The SD_ReadMultiBlocks() function read only mutli blocks (multiple
+  *             of 512-byte).
   *           - Any read operation should be followed by two functions to check
   *             if the DMA Controller and SD Card status.
   *              - SD_ReadWaitOperation(): this function insure that the DMA
   *                controller has finished all data transfer.
-  *              - SD_GetStatus(): to check that the SD Card has finished the 
+  *              - SD_GetStatus(): to check that the SD Card has finished the
   *                data transfer and it is ready for data.
-  *                  
+  *
   *           - The DMA transfer is finished by the SDIO Data End interrupt. User
   *             has to call the SD_ProcessIRQ() function inside the SDIO_IRQHandler().
-  *             Don't forget to enable the SDIO_IRQn interrupt using the NVIC controller.      
-  *                
+  *             Don't forget to enable the SDIO_IRQn interrupt using the NVIC controller.
+  *
   *          C - SD Card Write operation
-  *          =========================== 
+  *          ===========================
   *           - You can write SD card by using two function: SD_WriteBlock() and
   *             SD_WriteMultiBlocks() functions. These functions support only
-  *             512-byte block length.   
+  *             512-byte block length.
   *           - The SD_WriteBlock() function write only one block (512-byte). This
-  *             function can transfer the data using DMA controller or using 
-  *             polling mode. To select between DMA or polling mode refer to 
+  *             function can transfer the data using DMA controller or using
+  *             polling mode. To select between DMA or polling mode refer to
   *             "SD_DMA_MODE" or "SD_POLLING_MODE" inside the stm32_eval_sdio_sd.h
   *             file and uncomment the corresponding line. By default the SD DMA
-  *             mode is selected          
-  *           - The SD_WriteMultiBlocks() function write only mutli blocks (multiple 
-  *             of 512-byte). 
+  *             mode is selected
+  *           - The SD_WriteMultiBlocks() function write only mutli blocks (multiple
+  *             of 512-byte).
   *           - Any write operation should be followed by two functions to check
   *             if the DMA Controller and SD Card status.
   *              - SD_ReadWaitOperation(): this function insure that the DMA
   *                controller has finished all data transfer.
-  *              - SD_GetStatus(): to check that the SD Card has finished the 
-  *                data transfer and it is ready for data.         
-  *                
+  *              - SD_GetStatus(): to check that the SD Card has finished the
+  *                data transfer and it is ready for data.
+  *
   *           - The DMA transfer is finished by the SDIO Data End interrupt. User
   *             has to call the SD_ProcessIRQ() function inside the SDIO_IRQHandler().
-  *             Don't forget to enable the SDIO_IRQn interrupt using the NVIC controller.      
-               
-  *             
+  *             Don't forget to enable the SDIO_IRQn interrupt using the NVIC controller.
+
+  *
   *          D - SD card status
-  *          ================== 
+  *          ==================
   *           - At any time, you can check the SD Card status and get the SD card
   *             state by using the SD_GetStatus() function. This function checks
   *             first if the SD card is still connected and then get the internal
-  *             SD Card transfer state.     
-  *           - You can also get the SD card SD Status register by using the 
-  *             SD_SendSDStatus() function.       
-  *               
+  *             SD Card transfer state.
+  *           - You can also get the SD card SD Status register by using the
+  *             SD_SendSDStatus() function.
+  *
   *          E - Programming Model
-  *          ===================== 
+  *          =====================
   *             Status = SD_Init(); // Initialization Step as described in section A
-  *               
+  *
   *             // SDIO Interrupt ENABLE
   *             NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn;
   *             NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
   *             NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
   *             NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
   *             NVIC_Init(&NVIC_InitStructure);
-  *             
+  *
   *             // Write operation as described in Section C
   *             Status = SD_WriteBlock(buffer, address, 512);
   *             Status = SD_WaitWriteOperation();
-  *             while(SD_GetStatus() != SD_TRANSFER_OK); 
-  *             
+  *             while(SD_GetStatus() != SD_TRANSFER_OK);
+  *
   *             Status = SD_WriteMultiBlocks(buffer, address, 512, NUMBEROFBLOCKS);
   *             Status = SD_WaitWriteOperation();
-  *             while(SD_GetStatus() != SD_TRANSFER_OK);     
-  *             
+  *             while(SD_GetStatus() != SD_TRANSFER_OK);
+  *
   *             // Read operation as described in Section B
   *             Status = SD_ReadBlock(buffer, address, 512);
   *             Status = SD_WaitReadOperation();
   *             while(SD_GetStatus() != SD_TRANSFER_OK);
-  *             
+  *
   *             Status = SD_ReadMultiBlocks(buffer, address, 512, NUMBEROFBLOCKS);
   *             Status = SD_WaitReadOperation();
-  *             while(SD_GetStatus() != SD_TRANSFER_OK);            
-  *               
-  *                                     
+  *             while(SD_GetStatus() != SD_TRANSFER_OK);
+  *
+  *
   *          STM32 SDIO Pin assignment
-  *          =========================    
+  *          =========================
   *          +-----------------------------------------------------------+
   *          |                     Pin assignment                        |
   *          +-----------------------------+---------------+-------------+
@@ -170,11 +170,11 @@
   *          |      SDIO CLK               |   CLK         |    5        |
   *          |                             |   GND         |    6 (0 V)  |
   *          |      SDIO D0                |   D0          |    7        |
-  *          |      SDIO D1                |   D1          |    8        |  
-  *          +-----------------------------+---------------+-------------+  
-  *              
-  *  @endverbatim                
-  *             
+  *          |      SDIO D1                |   D1          |    8        |
+  *          +-----------------------------+---------------+-------------+
+  *
+  *  @endverbatim
+  *
   ******************************************************************************
   * @attention
   *
@@ -186,8 +186,8 @@
   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
   *
   * 
© COPYRIGHT 2011 STMicroelectronics

-  ******************************************************************************  
-  */ 
+  ******************************************************************************
+  */
 
 /* Includes ------------------------------------------------------------------*/
 #include "sdio_sd.h"
@@ -195,40 +195,40 @@
 /** @addtogroup Utilities
   * @{
   */
-  
+
 /** @addtogroup STM32_EVAL
   * @{
-  */ 
+  */
 
 /** @addtogroup Common
   * @{
   */
-  
+
 /** @addtogroup STM32_EVAL_SDIO_SD
   * @brief      This file provides all the SD Card driver firmware functions.
   * @{
-  */ 
+  */
 
 /** @defgroup STM32_EVAL_SDIO_SD_Private_Types
   * @{
-  */ 
+  */
 /**
   * @}
-  */ 
+  */
 
 
 /** @defgroup STM32_EVAL_SDIO_SD_Private_Defines
   * @{
-  */ 
-/** 
-  * @brief  SDIO Static flags, TimeOut, FIFO Address  
+  */
+/**
+  * @brief  SDIO Static flags, TimeOut, FIFO Address
   */
 #define NULL 0
 #define SDIO_STATIC_FLAGS               ((uint32_t)0x000005FF)
 #define SDIO_CMD0TIMEOUT                ((uint32_t)0x00010000)
 
-/** 
-  * @brief  Mask for errors Card Status R1 (OCR Register) 
+/**
+  * @brief  Mask for errors Card Status R1 (OCR Register)
   */
 #define SD_OCR_ADDR_OUT_OF_RANGE        ((uint32_t)0x80000000)
 #define SD_OCR_ADDR_MISALIGNED          ((uint32_t)0x40000000)
@@ -251,8 +251,8 @@
 #define SD_OCR_AKE_SEQ_ERROR            ((uint32_t)0x00000008)
 #define SD_OCR_ERRORBITS                ((uint32_t)0xFDFFE008)
 
-/** 
-  * @brief  Masks for R6 Response 
+/**
+  * @brief  Masks for R6 Response
   */
 #define SD_R6_GENERAL_UNKNOWN_ERROR     ((uint32_t)0x00002000)
 #define SD_R6_ILLEGAL_CMD               ((uint32_t)0x00004000)
@@ -280,22 +280,22 @@
 #define SD_HALFFIFO                     ((uint32_t)0x00000008)
 #define SD_HALFFIFOBYTES                ((uint32_t)0x00000020)
 
-/** 
-  * @brief  Command Class Supported 
+/**
+  * @brief  Command Class Supported
   */
 #define SD_CCCC_LOCK_UNLOCK             ((uint32_t)0x00000080)
 #define SD_CCCC_WRITE_PROT              ((uint32_t)0x00000040)
 #define SD_CCCC_ERASE                   ((uint32_t)0x00000020)
 
-/** 
+/**
   * @brief  Following commands are SD Card Specific commands.
-  *         SDIO_APP_CMD should be sent before sending these commands. 
+  *         SDIO_APP_CMD should be sent before sending these commands.
   */
 #define SDIO_SEND_IF_COND               ((uint32_t)0x00000008)
 
 /**
   * @}
-  */ 
+  */
 
 
 /** @defgroup STM32_EVAL_SDIO_SD_Private_Macros
@@ -303,8 +303,8 @@
   */
 /**
   * @}
-  */ 
-  
+  */
+
 
 /** @defgroup STM32_EVAL_SDIO_SD_Private_Variables
   * @{
@@ -319,10 +319,10 @@ SD_CardInfo SDCardInfo;
 
 SDIO_InitTypeDef SDIO_InitStructure;
 SDIO_CmdInitTypeDef SDIO_CmdInitStructure;
-SDIO_DataInitTypeDef SDIO_DataInitStructure;   
+SDIO_DataInitTypeDef SDIO_DataInitStructure;
 /**
-  * @}			     
-  */ 
+  * @}
+  */
 
 
 /** @defgroup STM32_EVAL_SDIO_SD_Private_Function_Prototypes
@@ -338,15 +338,15 @@ static SD_Error SDEnWideBus(FunctionalState NewState);
 static SD_Error IsCardProgramming(uint8_t *pstatus);
 static SD_Error FindSCR(uint16_t rca, uint32_t *pscr);
 uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes);
-  
+
 /**
   * @}
-  */ 
+  */
 
 
 /** @defgroup STM32_EVAL_SDIO_SD_Private_Functions
   * @{
-  */  
+  */
 
 /**
   * @brief  DeInitializes the SDIO interface.
@@ -354,12 +354,12 @@ uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes);
   * @retval None
   */
 void SD_DeInit(void)
-{ 
+{
   SD_LowLevel_DeInit();
 }
 
 /**
-  * @brief  Initializes the SD Card and put it into StandBy State (Ready for data 
+  * @brief  Initializes the SD Card and put it into StandBy State (Ready for data
   *         transfer).
   * @param  None
   * @retval SD_Error: SD Card Error code.
@@ -367,7 +367,7 @@ void SD_DeInit(void)
 SD_Error SD_Init(void)
 {
   __IO SD_Error errorstatus = SD_OK;
-  
+
   /* SDIO Peripheral Low Level Init */
   SD_LowLevel_Init();
 
@@ -391,15 +391,15 @@ SD_Error SD_Init(void)
 
   /*!< Configure the SDIO peripheral */
   /*!< SDIOCLK = HCLK, SDIO_CK = HCLK/(2 + SDIO_TRANSFER_CLK_DIV) */
-  /*!< on STM32F2xx devices, SDIOCLK is fixed to 48MHz */  
-  SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; 
+  /*!< on STM32F2xx devices, SDIOCLK is fixed to 48MHz */
+  SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV;
   SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising;
   SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable;
   SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
   SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b;
   SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
   SDIO_Init(&SDIO_InitStructure);
-  
+
   /*----------------- Read CSD/CID MSD registers ------------------*/
   errorstatus = SD_GetCardInfo(&SDCardInfo);
 
@@ -412,7 +412,7 @@ SD_Error SD_Init(void)
   if (errorstatus == SD_OK)
   {
     errorstatus = SD_EnableWideBusOperation(SDIO_BusWide_4b);
-  }  
+  }
 
   return(errorstatus);
 }
@@ -421,7 +421,7 @@ SD_Error SD_Init(void)
   * @brief  Gets the cuurent sd card data transfer status.
   * @param  None
   * @retval SDTransferState: Data Transfer state.
-  *   This value can be: 
+  *   This value can be:
   *        - SD_TRANSFER_OK: No data transfer is acting
   *        - SD_TRANSFER_BUSY: Data transfer is acting
   */
@@ -430,7 +430,7 @@ SDTransferState SD_GetStatus(void)
   SDCardState cardstate =  SD_CARD_TRANSFER;
 
   cardstate = SD_GetState();
-  
+
   if (cardstate == SD_CARD_TRANSFER)
   {
     return(SD_TRANSFER_OK);
@@ -453,7 +453,7 @@ SDTransferState SD_GetStatus(void)
 SDCardState SD_GetState(void)
 {
   uint32_t resp1 = 0;
-  
+
   if(SD_Detect()== SD_PRESENT)
   {
     if (SD_SendStatus(&resp1) != SD_OK)
@@ -484,12 +484,12 @@ uint8_t SD_Detect(void)
   /*if (GPIO_ReadInputDataBit(SD_DETECT_GPIO_PORT, SD_DETECT_PIN) != Bit_RESET)
   {
     status = SD_NOT_PRESENT;
-  }	 */
+  }  */
   return status;
 }
 
 /**
-  * @brief  Enquires cards about their operating voltage and configures 
+  * @brief  Enquires cards about their operating voltage and configures
   *   clock controls.
   * @param  None
   * @retval SD_Error: SD Card Error code.
@@ -504,7 +504,7 @@ SD_Error SD_PowerON(void)
   /*!< Configure the SDIO peripheral */
   /*!< SDIOCLK = HCLK, SDIO_CK = HCLK/(2 + SDIO_INIT_CLK_DIV) */
   /*!< on STM32F2xx devices, SDIOCLK is fixed to 48MHz */
-  /*!< SDIO_CK for initialization should not exceed 400 KHz */  
+  /*!< SDIO_CK for initialization should not exceed 400 KHz */
   SDIO_InitStructure.SDIO_ClockDiv = SDIO_INIT_CLK_DIV;
   SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising;
   SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable;
@@ -649,7 +649,7 @@ SD_Error SD_PowerOFF(void)
 }
 
 /**
-  * @brief  Intialises all cards or single card as the case may be Card(s) come 
+  * @brief  Intialises all cards or single card as the case may be Card(s) come
   *         into standby state.
   * @param  None
   * @retval SD_Error: SD Card Error code.
@@ -739,7 +739,7 @@ SD_Error SD_InitializeCards(void)
 
 /**
   * @brief  Returns information about specific card.
-  * @param  cardinfo: pointer to a SD_CardInfo structure that contains all SD card 
+  * @param  cardinfo: pointer to a SD_CardInfo structure that contains all SD card
   *         information.
   * @retval SD_Error: SD Card Error code.
   */
@@ -809,7 +809,7 @@ SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo)
     /*!< Byte 10 */
     tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8);
     cardinfo->SD_csd.DeviceSizeMul |= (tmp & 0x80) >> 7;
-    
+
     cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) ;
     cardinfo->CardCapacity *= (1 << (cardinfo->SD_csd.DeviceSizeMul + 2));
     cardinfo->CardBlockSize = 1 << (cardinfo->SD_csd.RdBlockLen);
@@ -833,9 +833,9 @@ SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo)
 
     /*!< Byte 10 */
     tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8);
-    
+
     cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) * 512 * 1024;
-    cardinfo->CardBlockSize = 512;    
+    cardinfo->CardBlockSize = 512;
   }
 
 
@@ -941,14 +941,14 @@ SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo)
   tmp = (uint8_t)(CID_Tab[3] & 0x000000FF);
   cardinfo->SD_cid.CID_CRC = (tmp & 0xFE) >> 1;
   cardinfo->SD_cid.Reserved2 = 1;
-  
+
   return(errorstatus);
 }
 
 /**
-  * @brief  Enables wide bus opeartion for the requeseted card if supported by 
+  * @brief  Enables wide bus opeartion for the requeseted card if supported by
   *         card.
-  * @param  WideMode: Specifies the SD card wide bus mode. 
+  * @param  WideMode: Specifies the SD card wide bus mode.
   *   This parameter can be one of the following values:
   *     @arg SDIO_BusWide_8b: 8-bit data transfer (Only for MMC)
   *     @arg SDIO_BusWide_4b: 4-bit data transfer
@@ -1026,14 +1026,14 @@ SD_Error SD_GetCardStatus(SD_CardStatus *cardstatus)
   /*!< Byte 13 */
   tmp = (uint8_t)((SDSTATUS_Tab[13] & 0x3));
   cardstatus->ERASE_OFFSET = tmp;
- 
+
   return(errorstatus);
 }
 
 /**
-  * @brief  Enables wide bus opeartion for the requeseted card if supported by 
+  * @brief  Enables wide bus opeartion for the requeseted card if supported by
   *         card.
-  * @param  WideMode: Specifies the SD card wide bus mode. 
+  * @param  WideMode: Specifies the SD card wide bus mode.
   *   This parameter can be one of the following values:
   *     @arg SDIO_BusWide_8b: 8-bit data transfer (Only for MMC)
   *     @arg SDIO_BusWide_4b: 4-bit data transfer
@@ -1064,7 +1064,7 @@ SD_Error SD_EnableWideBusOperation(uint32_t WideMode)
       if (SD_OK == errorstatus)
       {
         /*!< Configure the SDIO peripheral */
-        SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; 
+        SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV;
         SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising;
         SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable;
         SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
@@ -1080,7 +1080,7 @@ SD_Error SD_EnableWideBusOperation(uint32_t WideMode)
       if (SD_OK == errorstatus)
       {
         /*!< Configure the SDIO peripheral */
-        SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; 
+        SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV;
         SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising;
         SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable;
         SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
@@ -1118,32 +1118,32 @@ SD_Error SD_SelectDeselect(uint32_t addr)
 
 /**
   * @brief  Allows to read one block from a specified address in a card. The Data
-  *         transfer can be managed by DMA mode or Polling mode. 
-  * @note   This operation should be followed by two functions to check if the 
+  *         transfer can be managed by DMA mode or Polling mode.
+  * @note   This operation should be followed by two functions to check if the
   *         DMA Controller and SD Card status.
   *          - SD_ReadWaitOperation(): this function insure that the DMA
   *            controller has finished all data transfer.
-  *          - SD_GetStatus(): to check that the SD Card has finished the 
-  *            data transfer and it is ready for data.            
+  *          - SD_GetStatus(): to check that the SD Card has finished the
+  *            data transfer and it is ready for data.
   * @param  readbuff: pointer to the buffer that will contain the received data
-  * @param  ReadAddr: Address from where data are to be read.  
+  * @param  ReadAddr: Address from where data are to be read.
   * @param  BlockSize: the SD card Data block size. The Block size should be 512.
   * @retval SD_Error: SD Card Error code.
   */
 SD_Error SD_ReadBlock(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize)
 {
   SD_Error errorstatus = SD_OK;
-#if defined (SD_POLLING_MODE) 
+#if defined (SD_POLLING_MODE)
   uint32_t count = 0, *tempbuff = (uint32_t *)readbuff;
 #endif
 
   TransferError = SD_OK;
   TransferEnd = 0;
   StopCondition = 0;
-  
+
   SDIO->DCTRL = 0x0;
 
-  
+
   if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
   {
     BlockSize = 512;
@@ -1173,7 +1173,7 @@ SD_Error SD_ReadBlock(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize)
     return(errorstatus);
   }
 
-#if defined (SD_POLLING_MODE)  
+#if defined (SD_POLLING_MODE)
   /*!< In case of single block transfer, no need of stop transfer at all.*/
   /*!< Polling mode */
   while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR)))
@@ -1217,7 +1217,7 @@ SD_Error SD_ReadBlock(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize)
     *tempbuff = SDIO_ReadData();
     tempbuff++;
   }
-  
+
   /*!< Clear all the static flags */
   SDIO_ClearFlag(SDIO_STATIC_FLAGS);
 
@@ -1232,13 +1232,13 @@ SD_Error SD_ReadBlock(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize)
 
 /**
   * @brief  Allows to read blocks from a specified address  in a card.  The Data
-  *         transfer can be managed by DMA mode or Polling mode. 
-  * @note   This operation should be followed by two functions to check if the 
+  *         transfer can be managed by DMA mode or Polling mode.
+  * @note   This operation should be followed by two functions to check if the
   *         DMA Controller and SD Card status.
   *          - SD_ReadWaitOperation(): this function insure that the DMA
   *            controller has finished all data transfer.
-  *          - SD_GetStatus(): to check that the SD Card has finished the 
-  *            data transfer and it is ready for data.   
+  *          - SD_GetStatus(): to check that the SD Card has finished the
+  *            data transfer and it is ready for data.
   * @param  readbuff: pointer to the buffer that will contain the received data.
   * @param  ReadAddr: Address from where data are to be read.
   * @param  BlockSize: the SD card Data block size. The Block size should be 512.
@@ -1251,7 +1251,7 @@ SD_Error SD_ReadMultiBlocks(uint32_t ReadAddr, uint8_t *readbuff, uint16_t Block
   TransferError = SD_OK;
   TransferEnd = 0;
   StopCondition = 1;
-	
+
   SDIO->DCTRL = 0x0;
 
   if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
@@ -1274,7 +1274,7 @@ SD_Error SD_ReadMultiBlocks(uint32_t ReadAddr, uint8_t *readbuff, uint16_t Block
   {
     return(errorstatus);
   }
-    
+
   SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT;
   SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize;
   SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) 9 << 4;
@@ -1306,10 +1306,10 @@ SD_Error SD_ReadMultiBlocks(uint32_t ReadAddr, uint8_t *readbuff, uint16_t Block
 }
 
 /**
-  * @brief  This function waits until the SDIO DMA data transfer is finished. 
+  * @brief  This function waits until the SDIO DMA data transfer is finished.
   *         This function should be called after SDIO_ReadMultiBlocks() function
-  *         to insure that all data sent by the card are already transferred by 
-  *         the DMA controller.        
+  *         to insure that all data sent by the card are already transferred by
+  *         the DMA controller.
   * @param  None.
   * @retval SD_Error: SD Card Error code.
   */
@@ -1331,14 +1331,14 @@ SD_Error SD_WaitReadOperation(void)
 /**
   * @brief  Allows to write one block starting from a specified address in a card.
   *         The Data transfer can be managed by DMA mode or Polling mode.
-  * @note   This operation should be followed by two functions to check if the 
+  * @note   This operation should be followed by two functions to check if the
   *         DMA Controller and SD Card status.
   *          - SD_ReadWaitOperation(): this function insure that the DMA
   *            controller has finished all data transfer.
-  *          - SD_GetStatus(): to check that the SD Card has finished the 
-  *            data transfer and it is ready for data.      
+  *          - SD_GetStatus(): to check that the SD Card has finished the
+  *            data transfer and it is ready for data.
   * @param  writebuff: pointer to the buffer that contain the data to be transferred.
-  * @param  WriteAddr: Address from where data are to be read.   
+  * @param  WriteAddr: Address from where data are to be read.
   * @param  BlockSize: the SD card Data block size. The Block size should be 512.
   * @retval SD_Error: SD Card Error code.
   */
@@ -1354,7 +1354,7 @@ SD_Error SD_WriteBlock(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSiz
   TransferError = SD_OK;
   TransferEnd = 0;
   StopCondition = 0;
-  
+
   SDIO->DCTRL = 0x0;
 
 
@@ -1363,7 +1363,7 @@ SD_Error SD_WriteBlock(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSiz
     BlockSize = 512;
     //WriteAddr /= 512;
   }
-  
+
   /*!< Send CMD24 WRITE_SINGLE_BLOCK */
   SDIO_CmdInitStructure.SDIO_Argument = WriteAddr;
   SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_WRITE_SINGLE_BLOCK;
@@ -1388,7 +1388,7 @@ SD_Error SD_WriteBlock(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSiz
   SDIO_DataConfig(&SDIO_DataInitStructure);
 
   /*!< In case of single data block transfer no need of stop command at all */
-#if defined (SD_POLLING_MODE) 
+#if defined (SD_POLLING_MODE)
   while (!(SDIO->STA & (SDIO_FLAG_DBCKEND | SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR)))
   {
     if (SDIO_GetFlagStatus(SDIO_FLAG_TXFIFOHE) != RESET)
@@ -1447,13 +1447,13 @@ SD_Error SD_WriteBlock(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSiz
 
 /**
   * @brief  Allows to write blocks starting from a specified address in a card.
-  *         The Data transfer can be managed by DMA mode only. 
-  * @note   This operation should be followed by two functions to check if the 
+  *         The Data transfer can be managed by DMA mode only.
+  * @note   This operation should be followed by two functions to check if the
   *         DMA Controller and SD Card status.
   *          - SD_ReadWaitOperation(): this function insure that the DMA
   *            controller has finished all data transfer.
-  *          - SD_GetStatus(): to check that the SD Card has finished the 
-  *            data transfer and it is ready for data.     
+  *          - SD_GetStatus(): to check that the SD Card has finished the
+  *            data transfer and it is ready for data.
   * @param  WriteAddr: Address from where data are to be read.
   * @param  writebuff: pointer to the buffer that contain the data to be transferred.
   * @param  BlockSize: the SD card Data block size. The Block size should be 512.
@@ -1467,7 +1467,7 @@ SD_Error SD_WriteMultiBlocks(uint32_t WriteAddr, uint8_t *writebuff, uint16_t Bl
   TransferError = SD_OK;
   TransferEnd = 0;
   StopCondition = 1;
-  
+
   SDIO->DCTRL = 0x0;
 
   if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
@@ -1531,17 +1531,17 @@ SD_Error SD_WriteMultiBlocks(uint32_t WriteAddr, uint8_t *writebuff, uint16_t Bl
   SDIO_DataConfig(&SDIO_DataInitStructure);
 
   SDIO_ITConfig(SDIO_IT_DATAEND, ENABLE);
-  SDIO_DMACmd(ENABLE);    
+  SDIO_DMACmd(ENABLE);
   SD_LowLevel_DMA_TxConfig((uint32_t *)writebuff, (NumberOfBlocks * BlockSize));
 
   return(errorstatus);
 }
 
 /**
-  * @brief  This function waits until the SDIO DMA data transfer is finished. 
+  * @brief  This function waits until the SDIO DMA data transfer is finished.
   *         This function should be called after SDIO_WriteBlock() and
-  *         SDIO_WriteMultiBlocks() function to insure that all data sent by the 
-  *         card are already transferred by the DMA controller.        
+  *         SDIO_WriteMultiBlocks() function to insure that all data sent by the
+  *         card are already transferred by the DMA controller.
   * @param  None.
   * @retval SD_Error: SD Card Error code.
   */
@@ -1567,7 +1567,7 @@ SD_Error SD_WaitWriteOperation(void)
   * @brief  Gets the cuurent data transfer state.
   * @param  None
   * @retval SDTransferState: Data Transfer state.
-  *   This value can be: 
+  *   This value can be:
   *        - SD_TRANSFER_OK: No data transfer is acting
   *        - SD_TRANSFER_BUSY: Data transfer is acting
   */
@@ -1633,7 +1633,7 @@ SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr)
     startaddr /= 512;
     endaddr /= 512;
   }
-  
+
   /*!< According to sd-card spec 1.0 ERASE_GROUP_START (CMD32) and erase_group_end(CMD33) */
   if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType))
   {
@@ -1697,7 +1697,7 @@ SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr)
 
 /**
   * @brief  Returns the current card's status.
-  * @param  pcardstatus: pointer to the buffer that will contain the SD card 
+  * @param  pcardstatus: pointer to the buffer that will contain the SD card
   *         status (Card Status register).
   * @retval SD_Error: SD Card Error code.
   */
@@ -1707,7 +1707,7 @@ SD_Error SD_SendStatus(uint32_t *pcardstatus)
 
   SDIO->ARG = (uint32_t) RCA << 16;
   SDIO->CMD = 0x44D;
-  
+
   errorstatus = CmdResp1Error(SD_CMD_SEND_STATUS);
 
   if (errorstatus != SD_OK)
@@ -1721,7 +1721,7 @@ SD_Error SD_SendStatus(uint32_t *pcardstatus)
 
 /**
   * @brief  Returns the current SD card's status.
-  * @param  psdstatus: pointer to the buffer that will contain the SD card status 
+  * @param  psdstatus: pointer to the buffer that will contain the SD card status
   *         (SD Status register).
   * @retval SD_Error: SD Card Error code.
   */
@@ -2008,8 +2008,8 @@ static SD_Error CmdResp2Error(void)
 /**
   * @brief  Checks for error conditions for R6 (RCA) response.
   * @param  cmd: The sent command index.
-  * @param  prca: pointer to the variable that will contain the SD card relative 
-  *         address RCA. 
+  * @param  prca: pointer to the variable that will contain the SD card relative
+  *         address RCA.
   * @retval SD_Error: SD Card Error code.
   */
 static SD_Error CmdResp6Error(uint8_t cmd, uint16_t *prca)
@@ -2493,7 +2493,7 @@ uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes)
 
 /**
   * @}
-  */  
+  */
 
 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
 
@@ -2506,7 +2506,7 @@ uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes)
 #include 
 
 /* set sector size to 512 */
-#define SECTOR_SIZE		512
+#define SECTOR_SIZE     512
 
 static struct rt_device sdcard_device;
 //static SD_CardInfo SDCardInfo;
@@ -2516,44 +2516,44 @@ static rt_uint8_t _sdcard_buffer[SECTOR_SIZE];
 /* RT-Thread Device Driver Interface */
 static rt_err_t rt_sdcard_init(rt_device_t dev)
 {
-/*	NVIC_InitTypeDef NVIC_InitStructure;
+/*  NVIC_InitTypeDef NVIC_InitStructure;
 
-	NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn;
-	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
-	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
-	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-	NVIC_Init(&NVIC_InitStructure);	   */
+    NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+    NVIC_Init(&NVIC_InitStructure);    */
 
-	if (rt_sem_init(&sd_lock, "sdlock", 1, RT_IPC_FLAG_FIFO) != RT_EOK)
-	{
-		rt_kprintf("init sd lock semaphore failed\n");
-	}
-	else
-		rt_kprintf("SD Card init OK\n");
+    if (rt_sem_init(&sd_lock, "sdlock", 1, RT_IPC_FLAG_FIFO) != RT_EOK)
+    {
+        rt_kprintf("init sd lock semaphore failed\n");
+    }
+    else
+        rt_kprintf("SD Card init OK\n");
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_sdcard_close(rt_device_t dev)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
 {
-	SD_Error status;
-	rt_uint32_t retry;
-	rt_uint32_t factor;
+    SD_Error status;
+    rt_uint32_t retry;
+    rt_uint32_t factor;
 
-	if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1;
-	else factor = SECTOR_SIZE;
-	//rt_kprintf("sd: read 0x%X, sector 0x%X, 0x%X\n", (uint32_t)buffer ,pos, size);
-	rt_sem_take(&sd_lock, RT_WAITING_FOREVER);
+    if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1;
+    else factor = SECTOR_SIZE;
+    //rt_kprintf("sd: read 0x%X, sector 0x%X, 0x%X\n", (uint32_t)buffer ,pos, size);
+    rt_sem_take(&sd_lock, RT_WAITING_FOREVER);
 
     retry = 3;
     while(retry)
@@ -2571,8 +2571,8 @@ static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_
                     (uint8_t*)_sdcard_buffer, SECTOR_SIZE);
 
                 status = SD_WaitReadOperation();
-        		while(SD_GetStatus() != SD_TRANSFER_OK);
-				if (status != SD_OK) break;
+                while(SD_GetStatus() != SD_TRANSFER_OK);
+                if (status != SD_OK) break;
 
                 /* copy to the buffer */
                 rt_memcpy(((rt_uint8_t*)buffer + index * SECTOR_SIZE), _sdcard_buffer, SECTOR_SIZE);
@@ -2590,49 +2590,49 @@ static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_
                 status = SD_ReadMultiBlocks((part.offset + pos) * factor,
                     (uint8_t*)buffer, SECTOR_SIZE, size);
             }
-			status = SD_WaitReadOperation();
-        	while(SD_GetStatus() != SD_TRANSFER_OK);
-			/*rt_kprintf("===DUMP SECTOR %d===\n",pos);
-			{
-				int i, j;
-				char* tmp = (char*)buffer;
-				for(i =0; i < 32;i++)
-				{
-					rt_kprintf("%2d: ",i);
-					for(j= 0; j < 16;j++)
-						rt_kprintf("%02X ",tmp[i*16+j]);
-					rt_kprintf("\n");
-				}
-			} */
+            status = SD_WaitReadOperation();
+            while(SD_GetStatus() != SD_TRANSFER_OK);
+            /*rt_kprintf("===DUMP SECTOR %d===\n",pos);
+            {
+                int i, j;
+                char* tmp = (char*)buffer;
+                for(i =0; i < 32;i++)
+                {
+                    rt_kprintf("%2d: ",i);
+                    for(j= 0; j < 16;j++)
+                        rt_kprintf("%02X ",tmp[i*16+j]);
+                    rt_kprintf("\n");
+                }
+            } */
         }
 
         if (status == SD_OK) break;
 
         retry --;
     }
-	rt_sem_release(&sd_lock);
-	if (status == SD_OK) return size;
+    rt_sem_release(&sd_lock);
+    if (status == SD_OK) return size;
 
-	rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer);
-	return 0;
+    rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer);
+    return 0;
 }
 
 static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
 {
-	SD_Error status;
-	rt_uint32_t factor;
+    SD_Error status;
+    rt_uint32_t factor;
 
-	if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1;
-	else factor = SECTOR_SIZE;
+    if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1;
+    else factor = SECTOR_SIZE;
 
-	//rt_kprintf("sd: write 0x%X, sector 0x%X, 0x%X\n", (uint32_t)buffer , pos, size);
-	rt_sem_take(&sd_lock, RT_WAITING_FOREVER);
-	
-	/* read all sectors */
-	if (((rt_uint32_t)buffer % 4 != 0) ||
+    //rt_kprintf("sd: write 0x%X, sector 0x%X, 0x%X\n", (uint32_t)buffer , pos, size);
+    rt_sem_take(&sd_lock, RT_WAITING_FOREVER);
+
+    /* read all sectors */
+    if (((rt_uint32_t)buffer % 4 != 0) ||
         ((rt_uint32_t)buffer > 0x20080000))
-	{
-	    rt_uint32_t index;
+    {
+        rt_uint32_t index;
 
         /* which is not alignment with 4 or not chip SRAM */
         for (index = 0; index < size; index ++)
@@ -2643,14 +2643,14 @@ static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buf
             status = SD_WriteBlock((part.offset + index + pos) * factor,
                 (uint8_t*)_sdcard_buffer, SECTOR_SIZE);
 
-			status = SD_WaitWriteOperation();
-        	while(SD_GetStatus() != SD_TRANSFER_OK);
+            status = SD_WaitWriteOperation();
+            while(SD_GetStatus() != SD_TRANSFER_OK);
 
             if (status != SD_OK) break;
         }
-	}
-	else
-	{
+    }
+    else
+    {
         if (size == 1)
         {
             status = SD_WriteBlock((part.offset + pos) * factor,
@@ -2662,15 +2662,15 @@ static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buf
                 (uint8_t*)buffer, SECTOR_SIZE, size);
         }
 
-		status = SD_WaitWriteOperation();
+        status = SD_WaitWriteOperation();
         while(SD_GetStatus() != SD_TRANSFER_OK);
-	}
-	rt_sem_release(&sd_lock);
+    }
+    rt_sem_release(&sd_lock);
 
-	if (status == SD_OK) return size;
+    if (status == SD_OK) return size;
 
-	rt_kprintf("write failed: %d, buffer 0x%08x\n", status, buffer);
-	return 0;
+    rt_kprintf("write failed: %d, buffer 0x%08x\n", status, buffer);
+    return 0;
 }
 
 static rt_err_t rt_sdcard_control(rt_device_t dev, int cmd, void *args)
@@ -2686,89 +2686,89 @@ static rt_err_t rt_sdcard_control(rt_device_t dev, int cmd, void *args)
 
         geometry->bytes_per_sector = 512;
         geometry->block_size = SDCardInfo.CardBlockSize;
-		if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
-			geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1)  * 1024;
-		else
-        	geometry->sector_count = SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize;
+        if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
+            geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1)  * 1024;
+        else
+            geometry->sector_count = SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize;
     }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 void rt_hw_sdcard_init()
 {
     NVIC_InitTypeDef NVIC_InitStructure;
 
-	if (SD_Init() == SD_OK)
-	{
-		SD_Error status;
-		rt_uint8_t *sector;
+    if (SD_Init() == SD_OK)
+    {
+        SD_Error status;
+        rt_uint8_t *sector;
 
-		/*status = SD_GetCardInfo(&SDCardInfo);
-		if (status != SD_OK) goto __return;
+        /*status = SD_GetCardInfo(&SDCardInfo);
+        if (status != SD_OK) goto __return;
 
-		status = SD_SelectDeselect((u32) (SDCardInfo.RCA << 16));
-		if (status != SD_OK) goto __return;
+        status = SD_SelectDeselect((u32) (SDCardInfo.RCA << 16));
+        if (status != SD_OK) goto __return;
 
-		SD_EnableWideBusOperation(SDIO_BusWide_4b);
-		SD_SetDeviceMode(SD_DMA_MODE); */
+        SD_EnableWideBusOperation(SDIO_BusWide_4b);
+        SD_SetDeviceMode(SD_DMA_MODE); */
 
-		// SDIO Interrupt ENABLE
-		NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn;
-		NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
-		NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
-		NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-		NVIC_Init(&NVIC_InitStructure);
+        // SDIO Interrupt ENABLE
+        NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn;
+        NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+        NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+        NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+        NVIC_Init(&NVIC_InitStructure);
 
-		/* get the first sector to read partition table */
-		sector = (rt_uint8_t*) rt_malloc (512);
-		if (sector == RT_NULL)
-		{
-			rt_kprintf("allocate partition sector buffer failed\n");
-			return;
-		}
-		status = SD_ReadBlock(0, (uint8_t*)sector, 512);
-		status = SD_WaitReadOperation();
+        /* get the first sector to read partition table */
+        sector = (rt_uint8_t*) rt_malloc (512);
+        if (sector == RT_NULL)
+        {
+            rt_kprintf("allocate partition sector buffer failed\n");
+            return;
+        }
+        status = SD_ReadBlock(0, (uint8_t*)sector, 512);
+        status = SD_WaitReadOperation();
         while(SD_GetStatus() != SD_TRANSFER_OK);
 
-		if (status == SD_OK)
-		{
-			/* get the first partition */
-			if (dfs_filesystem_get_partition(&part, sector, 0) != 0)
+        if (status == SD_OK)
+        {
+            /* get the first partition */
+            if (dfs_filesystem_get_partition(&part, sector, 0) != 0)
             {
                 /* there is no partition */
                 part.offset = 0;
                 part.size   = 0;
             }
-		}
-		else
-		{
-			/* there is no partition table */
-			part.offset = 0;
-			part.size   = 0;
-		}
+        }
+        else
+        {
+            /* there is no partition table */
+            part.offset = 0;
+            part.size   = 0;
+        }
 
-		/* release sector buffer */
-		rt_free(sector);
+        /* release sector buffer */
+        rt_free(sector);
 
-		/* register sdcard device */
-		sdcard_device.type  = RT_Device_Class_Block;
-		sdcard_device.init 	= rt_sdcard_init;
-		sdcard_device.open 	= rt_sdcard_open;
-		sdcard_device.close = rt_sdcard_close;
-		sdcard_device.read 	= rt_sdcard_read;
-		sdcard_device.write = rt_sdcard_write;
-		sdcard_device.control = rt_sdcard_control;
+        /* register sdcard device */
+        sdcard_device.type  = RT_Device_Class_Block;
+        sdcard_device.init  = rt_sdcard_init;
+        sdcard_device.open  = rt_sdcard_open;
+        sdcard_device.close = rt_sdcard_close;
+        sdcard_device.read  = rt_sdcard_read;
+        sdcard_device.write = rt_sdcard_write;
+        sdcard_device.control = rt_sdcard_control;
 
-		/* no private */
-		sdcard_device.user_data = &SDCardInfo;
+        /* no private */
+        sdcard_device.user_data = &SDCardInfo;
 
-		rt_device_register(&sdcard_device, "sd0",
-			RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
+        rt_device_register(&sdcard_device, "sd0",
+            RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
 
-		return;
-	}
+        return;
+    }
 
 __return:
-	rt_kprintf("sdcard init failed\n");
+    rt_kprintf("sdcard init failed\n");
 }
diff --git a/bsp/stm32f20x/Drivers/sdio_sd.h b/bsp/stm32f20x/Drivers/sdio_sd.h
index c4ee35eb07..6a732a5e52 100644
--- a/bsp/stm32f20x/Drivers/sdio_sd.h
+++ b/bsp/stm32f20x/Drivers/sdio_sd.h
@@ -4,7 +4,7 @@
   * @author  MCD Application Team
   * @version V4.6.1
   * @date    18-April-2011
-  * @brief   This file contains all the functions prototypes for the SD Card 
+  * @brief   This file contains all the functions prototypes for the SD Card
   *          stm32_eval_sdio_sd driver firmware library.
   ******************************************************************************
   * @attention
@@ -17,8 +17,8 @@
   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
   *
   * 
© COPYRIGHT 2011 STMicroelectronics

-  ******************************************************************************  
-  */ 
+  ******************************************************************************
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32_EVAL_SDIO_SD_H
@@ -34,27 +34,27 @@
 /** @addtogroup Utilities
   * @{
   */
-  
+
 /** @addtogroup STM32_EVAL
   * @{
-  */ 
+  */
 
 /** @addtogroup Common
   * @{
   */
-  
+
 /** @addtogroup STM32_EVAL_SDIO_SD
   * @{
-  */  
+  */
 
 /** @defgroup STM32_EVAL_SDIO_SD_Exported_Types
   * @{
-  */ 
+  */
 typedef enum
 {
-/** 
-  * @brief  SDIO specific error defines  
-  */   
+/**
+  * @brief  SDIO specific error defines
+  */
   SD_CMD_CRC_FAIL                    = (1), /*!< Command response received (but CRC check failed) */
   SD_DATA_CRC_FAIL                   = (2), /*!< Data bock sent/received (CRC check Failed) */
   SD_CMD_RSP_TIMEOUT                 = (3), /*!< Command response timeout */
@@ -89,23 +89,23 @@ typedef enum
   SD_SDIO_FUNCTION_FAILED            = (32),
   SD_SDIO_UNKNOWN_FUNCTION           = (33),
 
-/** 
-  * @brief  Standard error defines   
-  */ 
-  SD_INTERNAL_ERROR, 
+/**
+  * @brief  Standard error defines
+  */
+  SD_INTERNAL_ERROR,
   SD_NOT_CONFIGURED,
-  SD_REQUEST_PENDING, 
-  SD_REQUEST_NOT_APPLICABLE, 
-  SD_INVALID_PARAMETER,  
-  SD_UNSUPPORTED_FEATURE,  
-  SD_UNSUPPORTED_HW,  
-  SD_ERROR,  
-  SD_OK = 0 
+  SD_REQUEST_PENDING,
+  SD_REQUEST_NOT_APPLICABLE,
+  SD_INVALID_PARAMETER,
+  SD_UNSUPPORTED_FEATURE,
+  SD_UNSUPPORTED_HW,
+  SD_ERROR,
+  SD_OK = 0
 } SD_Error;
 
-/** 
-  * @brief  SDIO Transfer state  
-  */   
+/**
+  * @brief  SDIO Transfer state
+  */
 typedef enum
 {
   SD_TRANSFER_OK  = 0,
@@ -113,9 +113,9 @@ typedef enum
   SD_TRANSFER_ERROR
 } SDTransferState;
 
-/** 
-  * @brief  SD Card States 
-  */   
+/**
+  * @brief  SD Card States
+  */
 typedef enum
 {
   SD_CARD_READY                  = ((uint32_t)0x00000001),
@@ -130,9 +130,9 @@ typedef enum
 }SDCardState;
 
 
-/** 
-  * @brief  Card Specific Data: CSD Register   
-  */ 
+/**
+  * @brief  Card Specific Data: CSD Register
+  */
 typedef struct
 {
   __IO uint8_t  CSDStruct;            /*!< CSD structure */
@@ -174,8 +174,8 @@ typedef struct
   __IO uint8_t  Reserved4;            /*!< always 1*/
 } SD_CSD;
 
-/** 
-  * @brief  Card Identification Data: CID Register   
+/**
+  * @brief  Card Identification Data: CID Register
   */
 typedef struct
 {
@@ -191,8 +191,8 @@ typedef struct
   __IO uint8_t  Reserved2;            /*!< always 1 */
 } SD_CID;
 
-/** 
-  * @brief SD Card Status 
+/**
+  * @brief SD Card Status
   */
 typedef struct
 {
@@ -209,8 +209,8 @@ typedef struct
 } SD_CardStatus;
 
 
-/** 
-  * @brief SD Card information 
+/**
+  * @brief SD Card information
   */
 typedef struct
 {
@@ -225,13 +225,13 @@ typedef struct
 /**
   * @}
   */
-  
+
 /** @defgroup STM32_EVAL_SDIO_SD_Exported_Constants
   * @{
-  */ 
+  */
 
-/** 
-  * @brief SDIO Commands  Index 
+/**
+  * @brief SDIO Commands  Index
   */
 #define SD_CMD_GO_IDLE_STATE                       ((uint8_t)0)
 #define SD_CMD_SEND_OP_COND                        ((uint8_t)1)
@@ -280,9 +280,9 @@ typedef struct
 #define SD_CMD_GEN_CMD                             ((uint8_t)56)
 #define SD_CMD_NO_CMD                              ((uint8_t)64)
 
-/** 
+/**
   * @brief Following commands are SD Card Specific commands.
-  *        SDIO_APP_CMD should be sent before sending these commands. 
+  *        SDIO_APP_CMD should be sent before sending these commands.
   */
 #define SD_CMD_APP_SD_SET_BUSWIDTH                 ((uint8_t)6)  /*!< For SD Card only */
 #define SD_CMD_SD_APP_STAUS                        ((uint8_t)13) /*!< For SD Card only */
@@ -293,9 +293,9 @@ typedef struct
 #define SD_CMD_SDIO_RW_DIRECT                      ((uint8_t)52) /*!< For SD I/O Card only */
 #define SD_CMD_SDIO_RW_EXTENDED                    ((uint8_t)53) /*!< For SD I/O Card only */
 
-/** 
+/**
   * @brief Following commands are SD Card Specific security commands.
-  *        SDIO_APP_CMD should be sent before sending these commands. 
+  *        SDIO_APP_CMD should be sent before sending these commands.
   */
 #define SD_CMD_SD_APP_GET_MKB                      ((uint8_t)43) /*!< For SD Card only */
 #define SD_CMD_SD_APP_GET_MID                      ((uint8_t)44) /*!< For SD Card only */
@@ -308,8 +308,8 @@ typedef struct
 #define SD_CMD_SD_APP_SECURE_ERASE                 ((uint8_t)38) /*!< For SD Card only */
 #define SD_CMD_SD_APP_CHANGE_SECURE_AREA           ((uint8_t)49) /*!< For SD Card only */
 #define SD_CMD_SD_APP_SECURE_WRITE_MKB             ((uint8_t)48) /*!< For SD Card only */
-  
-/* Uncomment the following line to select the SDIO Data transfer mode */  
+
+/* Uncomment the following line to select the SDIO Data transfer mode */
 #define SD_DMA_MODE                                ((uint32_t)0x00000000)
 /*#define SD_POLLING_MODE                            ((uint32_t)0x00000002)*/
 
@@ -319,8 +319,8 @@ typedef struct
 #define SD_PRESENT                                 ((uint8_t)0x01)
 #define SD_NOT_PRESENT                             ((uint8_t)0x00)
 
-/** 
-  * @brief Supported SD Memory Cards 
+/**
+  * @brief Supported SD Memory Cards
   */
 #define SDIO_STD_CAPACITY_SD_CARD_V1_1             ((uint32_t)0x00000000)
 #define SDIO_STD_CAPACITY_SD_CARD_V2_0             ((uint32_t)0x00000001)
@@ -333,18 +333,18 @@ typedef struct
 
 /**
   * @}
-  */ 
-  
+  */
+
 /** @defgroup STM32_EVAL_SDIO_SD_Exported_Macros
   * @{
-  */ 
+  */
 /**
   * @}
-  */ 
+  */
 
 /** @defgroup STM32_EVAL_SDIO_SD_Exported_Functions
   * @{
-  */ 
+  */
 void SD_DeInit(void);
 SD_Error SD_Init(void);
 SDTransferState SD_GetStatus(void);
@@ -388,10 +388,10 @@ SD_Error SD_WaitWriteOperation(void);
 
 /**
   * @}
-  */ 
+  */
 
 /**
   * @}
-  */ 
+  */
 
 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/bsp/stm32f20x/Drivers/serial.c b/bsp/stm32f20x/Drivers/serial.c
index 4ccc041689..cafde1a3e1 100644
--- a/bsp/stm32f20x/Drivers/serial.c
+++ b/bsp/stm32f20x/Drivers/serial.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -16,7 +16,7 @@
 #include 
 
 static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel,
-	rt_uint32_t address, rt_uint32_t size);
+    rt_uint32_t address, rt_uint32_t size);
 
 /**
  * @addtogroup STM32
@@ -26,252 +26,252 @@ static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel,
 /* RT-Thread Device Interface */
 static rt_err_t rt_serial_init (rt_device_t dev)
 {
-	struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data;
+    struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data;
 
-	if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
-	{
-		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			rt_memset(uart->int_rx->rx_buffer, 0,
-				sizeof(uart->int_rx->rx_buffer));
-			uart->int_rx->read_index = 0;
-			uart->int_rx->save_index = 0;
-		}
+    if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
+    {
+        if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            rt_memset(uart->int_rx->rx_buffer, 0,
+                sizeof(uart->int_rx->rx_buffer));
+            uart->int_rx->read_index = 0;
+            uart->int_rx->save_index = 0;
+        }
 
-		if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
-		{
-			RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL);
-			uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL;
+        if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
+        {
+            RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL);
+            uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL;
 
-			/* init data node memory pool */
-			rt_mp_init(&(uart->dma_tx->data_node_mp), "dn",
-				uart->dma_tx->data_node_mem_pool,
-				sizeof(uart->dma_tx->data_node_mem_pool),
-				sizeof(struct stm32_serial_data_node));
-		}
+            /* init data node memory pool */
+            rt_mp_init(&(uart->dma_tx->data_node_mp), "dn",
+                uart->dma_tx->data_node_mem_pool,
+                sizeof(uart->dma_tx->data_node_mem_pool),
+                sizeof(struct stm32_serial_data_node));
+        }
 
-		/* Enable USART */
-		USART_Cmd(uart->uart_device, ENABLE);
+        /* Enable USART */
+        USART_Cmd(uart->uart_device, ENABLE);
 
-		dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
-	}
+        dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_close(rt_device_t dev)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct stm32_serial_device* uart;
+    rt_uint8_t* ptr;
+    rt_err_t err_code;
+    struct stm32_serial_device* uart;
 
-	ptr = buffer;
-	err_code = RT_EOK;
-	uart = (struct stm32_serial_device*)dev->user_data;
+    ptr = buffer;
+    err_code = RT_EOK;
+    uart = (struct stm32_serial_device*)dev->user_data;
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		/* interrupt mode Rx */
-		while (size)
-		{
-			rt_base_t level;
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        /* interrupt mode Rx */
+        while (size)
+        {
+            rt_base_t level;
 
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
+            /* disable interrupt */
+            level = rt_hw_interrupt_disable();
 
-			if (uart->int_rx->read_index != uart->int_rx->save_index)
-			{
-				/* read a character */
-				*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
-				size--;
+            if (uart->int_rx->read_index != uart->int_rx->save_index)
+            {
+                /* read a character */
+                *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
+                size--;
 
-				/* move to next position */
-				uart->int_rx->read_index ++;
-				if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-					uart->int_rx->read_index = 0;
-			}
-			else
-			{
-				/* set error code */
-				err_code = -RT_EEMPTY;
+                /* move to next position */
+                uart->int_rx->read_index ++;
+                if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+                    uart->int_rx->read_index = 0;
+            }
+            else
+            {
+                /* set error code */
+                err_code = -RT_EEMPTY;
 
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-				break;
-			}
+                /* enable interrupt */
+                rt_hw_interrupt_enable(level);
+                break;
+            }
 
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
-		}
-	}
-	else
-	{
-		/* polling mode */
-		while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
-		{
-			while (uart->uart_device->SR & USART_FLAG_RXNE)
-			{
-				*ptr = uart->uart_device->DR & 0xff;
-				ptr ++;
-			}
-		}
-	}
+            /* enable interrupt */
+            rt_hw_interrupt_enable(level);
+        }
+    }
+    else
+    {
+        /* polling mode */
+        while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
+        {
+            while (uart->uart_device->SR & USART_FLAG_RXNE)
+            {
+                *ptr = uart->uart_device->DR & 0xff;
+                ptr ++;
+            }
+        }
+    }
 
-	/* set error code */
-	rt_set_errno(err_code);
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+    /* set error code */
+    rt_set_errno(err_code);
+    return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
 }
 
 static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel,
-	rt_uint32_t address, rt_uint32_t size)
+    rt_uint32_t address, rt_uint32_t size)
 {
-	RT_ASSERT(dma_channel != RT_NULL);
+    RT_ASSERT(dma_channel != RT_NULL);
 
-	/* disable DMA */
-	DMA_Cmd(dma_channel, DISABLE);
+    /* disable DMA */
+    DMA_Cmd(dma_channel, DISABLE);
 
-	/* set buffer address */
-	dma_channel->M0AR = address;
-	/* set size */
-	dma_channel->NDTR = size;
+    /* set buffer address */
+    dma_channel->M0AR = address;
+    /* set size */
+    dma_channel->NDTR = size;
 
-	/* enable DMA */
-	DMA_Cmd(dma_channel, ENABLE);
+    /* enable DMA */
+    DMA_Cmd(dma_channel, ENABLE);
 }
 
 static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct stm32_serial_device* uart;
+    rt_uint8_t* ptr;
+    rt_err_t err_code;
+    struct stm32_serial_device* uart;
 
-	err_code = RT_EOK;
-	ptr = (rt_uint8_t*)buffer;
-	uart = (struct stm32_serial_device*)dev->user_data;
+    err_code = RT_EOK;
+    ptr = (rt_uint8_t*)buffer;
+    uart = (struct stm32_serial_device*)dev->user_data;
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_TX)
-	{
-		/* interrupt mode Tx, does not support */
-		RT_ASSERT(0);
-	}
-	else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
-	{
-		/* DMA mode Tx */
+    if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+    {
+        /* interrupt mode Tx, does not support */
+        RT_ASSERT(0);
+    }
+    else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
+    {
+        /* DMA mode Tx */
 
-		/* allocate a data node */
-		struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*)
-			rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER);
-		if (data_node == RT_NULL)
-		{
-			/* set error code */
-			err_code = -RT_ENOMEM;
-		}
-		else
-		{
-			rt_uint32_t level;
+        /* allocate a data node */
+        struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*)
+            rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER);
+        if (data_node == RT_NULL)
+        {
+            /* set error code */
+            err_code = -RT_ENOMEM;
+        }
+        else
+        {
+            rt_uint32_t level;
 
-			/* fill data node */
-			data_node->data_ptr 	= ptr;
-			data_node->data_size 	= size;
+            /* fill data node */
+            data_node->data_ptr     = ptr;
+            data_node->data_size    = size;
 
-			/* insert to data link */
-			data_node->next = RT_NULL;
+            /* insert to data link */
+            data_node->next = RT_NULL;
 
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
+            /* disable interrupt */
+            level = rt_hw_interrupt_disable();
 
-			data_node->prev = uart->dma_tx->list_tail;
-			if (uart->dma_tx->list_tail != RT_NULL)
-				uart->dma_tx->list_tail->next = data_node;
-			uart->dma_tx->list_tail = data_node;
+            data_node->prev = uart->dma_tx->list_tail;
+            if (uart->dma_tx->list_tail != RT_NULL)
+                uart->dma_tx->list_tail->next = data_node;
+            uart->dma_tx->list_tail = data_node;
 
-			if (uart->dma_tx->list_head == RT_NULL)
-			{
-				/* start DMA to transmit data */
-				uart->dma_tx->list_head = data_node;
+            if (uart->dma_tx->list_head == RT_NULL)
+            {
+                /* start DMA to transmit data */
+                uart->dma_tx->list_head = data_node;
 
-				/* Enable DMA Channel */
-				rt_serial_enable_dma(uart->dma_tx->dma_channel,
-					(rt_uint32_t)uart->dma_tx->list_head->data_ptr,
-					uart->dma_tx->list_head->data_size);
-			}
+                /* Enable DMA Channel */
+                rt_serial_enable_dma(uart->dma_tx->dma_channel,
+                    (rt_uint32_t)uart->dma_tx->list_head->data_ptr,
+                    uart->dma_tx->list_head->data_size);
+            }
 
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
-		}
-	}
-	else
-	{
-		/* polling mode */
-		if (dev->flag & RT_DEVICE_FLAG_STREAM)
-		{
-			/* stream mode */
-			while (size)
-			{
-				if (*ptr == '\n')
-				{
-					while (!(uart->uart_device->SR & USART_FLAG_TXE));
-					uart->uart_device->DR = '\r';
-				}
+            /* enable interrupt */
+            rt_hw_interrupt_enable(level);
+        }
+    }
+    else
+    {
+        /* polling mode */
+        if (dev->flag & RT_DEVICE_FLAG_STREAM)
+        {
+            /* stream mode */
+            while (size)
+            {
+                if (*ptr == '\n')
+                {
+                    while (!(uart->uart_device->SR & USART_FLAG_TXE));
+                    uart->uart_device->DR = '\r';
+                }
 
-				while (!(uart->uart_device->SR & USART_FLAG_TXE));
-				uart->uart_device->DR = (*ptr & 0x1FF);
+                while (!(uart->uart_device->SR & USART_FLAG_TXE));
+                uart->uart_device->DR = (*ptr & 0x1FF);
 
-				++ptr; --size;
-			}
-		}
-		else
-		{
-			/* write data directly */
-			while (size)
-			{
-				while (!(uart->uart_device->SR & USART_FLAG_TXE));
-				uart->uart_device->DR = (*ptr & 0x1FF);
+                ++ptr; --size;
+            }
+        }
+        else
+        {
+            /* write data directly */
+            while (size)
+            {
+                while (!(uart->uart_device->SR & USART_FLAG_TXE));
+                uart->uart_device->DR = (*ptr & 0x1FF);
 
-				++ptr; --size;
-			}
-		}
-	}
+                ++ptr; --size;
+            }
+        }
+    }
 
-	/* set error code */
-	rt_set_errno(err_code);
+    /* set error code */
+    rt_set_errno(err_code);
 
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+    return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
 }
 
 static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
 {
-	struct stm32_serial_device* uart;
+    struct stm32_serial_device* uart;
 
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	uart = (struct stm32_serial_device*)dev->user_data;
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		USART_Cmd(uart->uart_device, DISABLE);
-		break;
+    uart = (struct stm32_serial_device*)dev->user_data;
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        USART_Cmd(uart->uart_device, DISABLE);
+        break;
 
-	case RT_DEVICE_CTRL_RESUME:
-		/* resume device */
-		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
-		USART_Cmd(uart->uart_device, ENABLE);
-		break;
-	}
+    case RT_DEVICE_CTRL_RESUME:
+        /* resume device */
+        dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+        USART_Cmd(uart->uart_device, ENABLE);
+        break;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /*
@@ -280,87 +280,87 @@ static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
  */
 rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
-		(flag & RT_DEVICE_FLAG_INT_TX))
-	{
-		RT_ASSERT(0);
-	}
+    if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
+        (flag & RT_DEVICE_FLAG_INT_TX))
+    {
+        RT_ASSERT(0);
+    }
 
-	device->type 		= RT_Device_Class_Char;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_serial_init;
-	device->open		= rt_serial_open;
-	device->close		= rt_serial_close;
-	device->read 		= rt_serial_read;
-	device->write 		= rt_serial_write;
-	device->control 	= rt_serial_control;
-	device->user_data	= serial;
+    device->type        = RT_Device_Class_Char;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = rt_serial_init;
+    device->open        = rt_serial_open;
+    device->close       = rt_serial_close;
+    device->read        = rt_serial_read;
+    device->write       = rt_serial_write;
+    device->control     = rt_serial_control;
+    device->user_data   = serial;
 
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
 }
 
 /* ISR for serial interrupt */
 void rt_hw_serial_isr(rt_device_t device)
 {
-	struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
+    struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
 
-	if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
-	{
-		/* interrupt mode receive */
-		RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
+    if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
+    {
+        /* interrupt mode receive */
+        RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
 
-		/* save on rx buffer */
-		while (uart->uart_device->SR & USART_FLAG_RXNE)
-		{
-			rt_base_t level;
+        /* save on rx buffer */
+        while (uart->uart_device->SR & USART_FLAG_RXNE)
+        {
+            rt_base_t level;
 
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
+            /* disable interrupt */
+            level = rt_hw_interrupt_disable();
 
-			/* save character */
-			uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff;
-			uart->int_rx->save_index ++;
-			if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
-				uart->int_rx->save_index = 0;
+            /* save character */
+            uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff;
+            uart->int_rx->save_index ++;
+            if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
+                uart->int_rx->save_index = 0;
 
-			/* if the next position is read index, discard this 'read char' */
-			if (uart->int_rx->save_index == uart->int_rx->read_index)
-			{
-				uart->int_rx->read_index ++;
-				if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-					uart->int_rx->read_index = 0;
-			}
+            /* if the next position is read index, discard this 'read char' */
+            if (uart->int_rx->save_index == uart->int_rx->read_index)
+            {
+                uart->int_rx->read_index ++;
+                if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+                    uart->int_rx->read_index = 0;
+            }
 
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
-		}
+            /* enable interrupt */
+            rt_hw_interrupt_enable(level);
+        }
 
-		/* clear interrupt */
-		USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
 
-		/* invoke callback */
-		if (device->rx_indicate != RT_NULL)
-		{
-			rt_size_t rx_length;
+        /* invoke callback */
+        if (device->rx_indicate != RT_NULL)
+        {
+            rt_size_t rx_length;
 
-			/* get rx length */
-			rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
-				UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
-				uart->int_rx->save_index - uart->int_rx->read_index;
+            /* get rx length */
+            rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
+                UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
+                uart->int_rx->save_index - uart->int_rx->read_index;
 
-			device->rx_indicate(device, rx_length);
-		}
-	}
+            device->rx_indicate(device, rx_length);
+        }
+    }
 
-	if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
-	{
-		/* clear interrupt */
-		USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
-	}
+    if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
+    {
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
+    }
 }
 
 /*
@@ -368,47 +368,47 @@ void rt_hw_serial_isr(rt_device_t device)
  */
 void rt_hw_serial_dma_tx_isr(rt_device_t device)
 {
-	rt_uint32_t level;
-	struct stm32_serial_data_node* data_node;
-	struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
+    rt_uint32_t level;
+    struct stm32_serial_data_node* data_node;
+    struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
 
-	/* DMA mode receive */
-	RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX);
+    /* DMA mode receive */
+    RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX);
 
-	/* get the first data node */
-	data_node = uart->dma_tx->list_head;
-	RT_ASSERT(data_node != RT_NULL);
+    /* get the first data node */
+    data_node = uart->dma_tx->list_head;
+    RT_ASSERT(data_node != RT_NULL);
 
-	/* invoke call to notify tx complete */
-	if (device->tx_complete != RT_NULL)
-		device->tx_complete(device, data_node->data_ptr);
+    /* invoke call to notify tx complete */
+    if (device->tx_complete != RT_NULL)
+        device->tx_complete(device, data_node->data_ptr);
 
-	/* disable interrupt */
-	level = rt_hw_interrupt_disable();
+    /* disable interrupt */
+    level = rt_hw_interrupt_disable();
 
-	/* remove list head */
-	uart->dma_tx->list_head = data_node->next;
-	if (uart->dma_tx->list_head == RT_NULL) /* data link empty */
-		uart->dma_tx->list_tail = RT_NULL;
+    /* remove list head */
+    uart->dma_tx->list_head = data_node->next;
+    if (uart->dma_tx->list_head == RT_NULL) /* data link empty */
+        uart->dma_tx->list_tail = RT_NULL;
 
-	/* enable interrupt */
-	rt_hw_interrupt_enable(level);
+    /* enable interrupt */
+    rt_hw_interrupt_enable(level);
 
-	/* release data node memory */
-	rt_mp_free(data_node);
+    /* release data node memory */
+    rt_mp_free(data_node);
 
-	if (uart->dma_tx->list_head != RT_NULL)
-	{
-		/* transmit next data node */
-		rt_serial_enable_dma(uart->dma_tx->dma_channel,
-			(rt_uint32_t)uart->dma_tx->list_head->data_ptr,
-			uart->dma_tx->list_head->data_size);
-	}
-	else
-	{
-		/* no data to be transmitted, disable DMA */
-		DMA_Cmd(uart->dma_tx->dma_channel, DISABLE);
-	}
+    if (uart->dma_tx->list_head != RT_NULL)
+    {
+        /* transmit next data node */
+        rt_serial_enable_dma(uart->dma_tx->dma_channel,
+            (rt_uint32_t)uart->dma_tx->list_head->data_ptr,
+            uart->dma_tx->list_head->data_size);
+    }
+    else
+    {
+        /* no data to be transmitted, disable DMA */
+        DMA_Cmd(uart->dma_tx->dma_channel, DISABLE);
+    }
 }
 
 /*@}*/
diff --git a/bsp/stm32f20x/Drivers/serial.h b/bsp/stm32f20x/Drivers/serial.h
index 8ab56b4839..4df341a0e3 100644
--- a/bsp/stm32f20x/Drivers/serial.h
+++ b/bsp/stm32f20x/Drivers/serial.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,45 +17,45 @@
 /* STM32F10x library definitions */
 #include 
 
-#define UART_RX_BUFFER_SIZE		64
-#define UART_TX_DMA_NODE_SIZE	4
+#define UART_RX_BUFFER_SIZE     64
+#define UART_TX_DMA_NODE_SIZE   4
 
 /* data node for Tx Mode */
 struct stm32_serial_data_node
 {
-	rt_uint8_t *data_ptr;
-	rt_size_t  data_size;
-	struct stm32_serial_data_node *next, *prev;
+    rt_uint8_t *data_ptr;
+    rt_size_t  data_size;
+    struct stm32_serial_data_node *next, *prev;
 };
 struct stm32_serial_dma_tx
 {
-	/* DMA Channel */
-	DMA_Stream_TypeDef* dma_channel;
+    /* DMA Channel */
+    DMA_Stream_TypeDef* dma_channel;
 
-	/* data list head and tail */
-	struct stm32_serial_data_node *list_head, *list_tail;
+    /* data list head and tail */
+    struct stm32_serial_data_node *list_head, *list_tail;
 
-	/* data node memory pool */
-	struct rt_mempool data_node_mp;
-	rt_uint8_t data_node_mem_pool[UART_TX_DMA_NODE_SIZE *
-		(sizeof(struct stm32_serial_data_node) + sizeof(void*))];
+    /* data node memory pool */
+    struct rt_mempool data_node_mp;
+    rt_uint8_t data_node_mem_pool[UART_TX_DMA_NODE_SIZE *
+        (sizeof(struct stm32_serial_data_node) + sizeof(void*))];
 };
 
 struct stm32_serial_int_rx
 {
-	rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
-	rt_uint32_t read_index, save_index;
+    rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
+    rt_uint32_t read_index, save_index;
 };
 
 struct stm32_serial_device
 {
-	USART_TypeDef* uart_device;
+    USART_TypeDef* uart_device;
 
-	/* rx structure */
-	struct stm32_serial_int_rx* int_rx;
+    /* rx structure */
+    struct stm32_serial_int_rx* int_rx;
 
-	/* tx structure */
-	struct stm32_serial_dma_tx* dma_tx;
+    /* tx structure */
+    struct stm32_serial_dma_tx* dma_tx;
 };
 
 rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial);
diff --git a/bsp/stm32f20x/Drivers/stm32f2_eth.c b/bsp/stm32f20x/Drivers/stm32f2_eth.c
index 1876c5bcaa..c774e16ed2 100644
--- a/bsp/stm32f20x/Drivers/stm32f2_eth.c
+++ b/bsp/stm32f20x/Drivers/stm32f2_eth.c
@@ -10,14 +10,14 @@
 #include "stm32f2x7_eth.h"
 #include "stm32f2x7_eth_conf.h"
 
-#define STM32_ETH_DEBUG		0
+#define STM32_ETH_DEBUG     0
 //#define CHECKSUM_BY_HARDWARE /* don't ues hardware checksum. */
 
 /* MII and RMII mode selection, for STM322xG-EVAL Board(MB786) RevB ***********/
-//#define MII_MODE       
+//#define MII_MODE
 
 #define RMII_MODE  // In this case the System clock frequency is configured
-                     // to 100 MHz, for more details refer to system_stm32f2xx.c 
+                     // to 100 MHz, for more details refer to system_stm32f2xx.c
 
 #define DP83848_PHY_ADDRESS       0x01 /* Relative to STM322xG-EVAL Board */
 
@@ -27,10 +27,10 @@
 extern ETH_DMADESCTypeDef  DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB];
 
 /* Ethernet Receive buffers  */
-extern uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE]; 
+extern uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE];
 
 /* Ethernet Transmit buffers */
-extern uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE]; 
+extern uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE];
 
 /* Global pointers to track current transmit and receive descriptors */
 extern ETH_DMADESCTypeDef  *DMATxDescToSet;
@@ -42,11 +42,11 @@ extern ETH_DMA_Rx_Frame_infos *DMA_RX_FRAME_infos;
 #define MAX_ADDR_LEN 6
 struct rt_stm32_eth
 {
-	/* inherit from ethernet device */
-	struct eth_device parent;
+    /* inherit from ethernet device */
+    struct eth_device parent;
 
-	/* interface address info. */
-	rt_uint8_t  dev_addr[MAX_ADDR_LEN];			/* hw address	*/
+    /* interface address info. */
+    rt_uint8_t  dev_addr[MAX_ADDR_LEN];         /* hw address   */
 };
 static struct rt_stm32_eth stm32_eth_device;
 static struct rt_semaphore tx_wait;
@@ -61,29 +61,29 @@ void ETH_IRQHandler(void)
 {
    rt_uint32_t status;
 
-	status = ETH->DMASR;
+    status = ETH->DMASR;
 
-	/* Frame received */
-	if ( ETH_GetDMAFlagStatus(ETH_DMA_FLAG_R) == SET) 
-	{
-		rt_err_t result;
-		//rt_kprintf("Frame comming\n");
-		/* Clear the interrupt flags. */
-		/* Clear the Eth DMA Rx IT pending bits */  
-		ETH_DMAClearITPendingBit(ETH_DMA_IT_R);
+    /* Frame received */
+    if ( ETH_GetDMAFlagStatus(ETH_DMA_FLAG_R) == SET)
+    {
+        rt_err_t result;
+        //rt_kprintf("Frame comming\n");
+        /* Clear the interrupt flags. */
+        /* Clear the Eth DMA Rx IT pending bits */
+        ETH_DMAClearITPendingBit(ETH_DMA_IT_R);
 
-		/* a frame has been received */
-		result = eth_device_ready(&(stm32_eth_device.parent));
-		if( result != RT_EOK ) rt_kprintf("RX err =%d\n", result );
-		//RT_ASSERT(result == RT_EOK); 
-	}
-	if (ETH_GetDMAITStatus(ETH_DMA_IT_T) == SET) /* packet transmission */
-	{
-		ETH_DMAClearITPendingBit(ETH_DMA_IT_T);
-	}
-	
-	ETH_DMAClearITPendingBit(ETH_DMA_IT_NIS);
-//	
+        /* a frame has been received */
+        result = eth_device_ready(&(stm32_eth_device.parent));
+        if( result != RT_EOK ) rt_kprintf("RX err =%d\n", result );
+        //RT_ASSERT(result == RT_EOK);
+    }
+    if (ETH_GetDMAITStatus(ETH_DMA_IT_T) == SET) /* packet transmission */
+    {
+        ETH_DMAClearITPendingBit(ETH_DMA_IT_T);
+    }
+
+    ETH_DMAClearITPendingBit(ETH_DMA_IT_NIS);
+//
 
 }
 
@@ -91,244 +91,244 @@ void ETH_IRQHandler(void)
 /* initialize the interface */
 static rt_err_t rt_stm32_eth_init(rt_device_t dev)
 {
-	int i;
+    int i;
 
-	/* MAC address configuration */
-	ETH_MACAddressConfig(ETH_MAC_Address0, (u8*)&stm32_eth_device.dev_addr[0]);
-	
-	/* Initialize Tx Descriptors list: Chain Mode */
-	ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
-	/* Initialize Rx Descriptors list: Chain Mode  */
-	ETH_DMARxDescChainInit(DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
+    /* MAC address configuration */
+    ETH_MACAddressConfig(ETH_MAC_Address0, (u8*)&stm32_eth_device.dev_addr[0]);
 
-	 /* Enable Ethernet Rx interrrupt */
-	{ 
-		for(i=0; iDMASR );
-//	rt_kprintf("ETH Init\n");
+    //rt_kprintf("DMASR = 0x%X\n", ETH->DMASR );
+//  rt_kprintf("ETH Init\n");
 
   return RT_EOK;
 }
 
 static rt_err_t rt_stm32_eth_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_stm32_eth_close(rt_device_t dev)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_size_t rt_stm32_eth_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
 {
-	rt_set_errno(-RT_ENOSYS);
-	return 0;
+    rt_set_errno(-RT_ENOSYS);
+    return 0;
 }
 
 static rt_size_t rt_stm32_eth_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
 {
-	rt_set_errno(-RT_ENOSYS);
-	return 0;
+    rt_set_errno(-RT_ENOSYS);
+    return 0;
 }
 
 static rt_err_t rt_stm32_eth_control(rt_device_t dev, int cmd, void *args)
 {
-	switch(cmd)
-	{
-	case NIOCTL_GADDR:
-		/* get mac address */
-		if(args) rt_memcpy(args, stm32_eth_device.dev_addr, 6);
-		else return -RT_ERROR;
-		break;
+    switch(cmd)
+    {
+    case NIOCTL_GADDR:
+        /* get mac address */
+        if(args) rt_memcpy(args, stm32_eth_device.dev_addr, 6);
+        else return -RT_ERROR;
+        break;
 
-	default :
-		break;
-	}
+    default :
+        break;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 void show_frame(struct pbuf *q)
 {
-	int i = 0;
-	int j = 0;
-	char *ptr = q->payload;
+    int i = 0;
+    int j = 0;
+    char *ptr = q->payload;
 
-	for( i = 0; i < q->len; i++ )
-	rt_kprintf("0x%02X ", *(ptr++));
-	rt_kprintf("\n");
+    for( i = 0; i < q->len; i++ )
+    rt_kprintf("0x%02X ", *(ptr++));
+    rt_kprintf("\n");
 }
 
 /* ethernet device interface */
 /* transmit packet. */
 rt_err_t rt_stm32_eth_tx( rt_device_t dev, struct pbuf* p)
 {
-	rt_err_t ret;
-	struct pbuf *q;
-	uint32_t l = 0;
-	u8 *buffer ;
-	
-	if (( ret = rt_sem_take(&tx_wait, netifGUARD_BLOCK_TIME) ) == RT_EOK)
-	{
-		buffer =  (u8 *)(DMATxDescToSet->Buffer1Addr);
-		for(q = p; q != NULL; q = q->next) 
-		{
-			//show_frame(q);
-			rt_memcpy((u8_t*)&buffer[l], q->payload, q->len);
-			l = l + q->len;
-		}
-		if( ETH_Prepare_Transmit_Descriptors(l) == ETH_ERROR )
-			rt_kprintf("Tx Error\n");
-		//rt_sem_release(xTxSemaphore);
-		rt_sem_release(&tx_wait);
-		//rt_kprintf("Tx packet, len = %d\n", l);
-	}
-	else
-	{
-		rt_kprintf("Tx Timeout\n");
-		return ret;
-	}
+    rt_err_t ret;
+    struct pbuf *q;
+    uint32_t l = 0;
+    u8 *buffer ;
 
-	/* Return SUCCESS */
-	return RT_EOK;
+    if (( ret = rt_sem_take(&tx_wait, netifGUARD_BLOCK_TIME) ) == RT_EOK)
+    {
+        buffer =  (u8 *)(DMATxDescToSet->Buffer1Addr);
+        for(q = p; q != NULL; q = q->next)
+        {
+            //show_frame(q);
+            rt_memcpy((u8_t*)&buffer[l], q->payload, q->len);
+            l = l + q->len;
+        }
+        if( ETH_Prepare_Transmit_Descriptors(l) == ETH_ERROR )
+            rt_kprintf("Tx Error\n");
+        //rt_sem_release(xTxSemaphore);
+        rt_sem_release(&tx_wait);
+        //rt_kprintf("Tx packet, len = %d\n", l);
+    }
+    else
+    {
+        rt_kprintf("Tx Timeout\n");
+        return ret;
+    }
+
+    /* Return SUCCESS */
+    return RT_EOK;
 }
 
 /* reception packet. */
 struct pbuf *rt_stm32_eth_rx(rt_device_t dev)
 {
-	struct pbuf *p, *q;
-	u16_t len;
-	uint32_t l=0,i =0;
-	FrameTypeDef frame;
-	static framecnt = 1;
-	u8 *buffer;
-	__IO ETH_DMADESCTypeDef *DMARxNextDesc;
-	
-	p = RT_NULL;
-	
-//	rt_kprintf("ETH rx\n");
-	/* Get received frame */
-	frame = ETH_Get_Received_Frame_interrupt();
-	
-	if( frame.length > 0 )
-	{
-		/* check that frame has no error */
-		if ((frame.descriptor->Status & ETH_DMARxDesc_ES) == (uint32_t)RESET)
-		{
-			//rt_kprintf("Get a frame %d buf = 0x%X, len= %d\n", framecnt++, frame.buffer, frame.length);
-			/* Obtain the size of the packet and put it into the "len" variable. */
-			len = frame.length;
-			buffer = (u8 *)frame.buffer;
-			
-			/* We allocate a pbuf chain of pbufs from the pool. */
-			p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
-			//p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
+    struct pbuf *p, *q;
+    u16_t len;
+    uint32_t l=0,i =0;
+    FrameTypeDef frame;
+    static framecnt = 1;
+    u8 *buffer;
+    __IO ETH_DMADESCTypeDef *DMARxNextDesc;
 
-			/* Copy received frame from ethernet driver buffer to stack buffer */
-			if (p != NULL)
-			{ 
-			  for (q = p; q != NULL; q = q->next)
-			  {
-			    rt_memcpy((u8_t*)q->payload, (u8_t*)&buffer[l], q->len);
-			    l = l + q->len;
-			  } 
-			}
-		}
-	
-		/* Release descriptors to DMA */
-		/* Check if received frame with multiple DMA buffer segments */
-		if (DMA_RX_FRAME_infos->Seg_Count > 1)
-		{
-			DMARxNextDesc = DMA_RX_FRAME_infos->FS_Rx_Desc;
-		}
-		else
-		{
-			DMARxNextDesc = frame.descriptor;
-		}
-		
-		/* Set Own bit in Rx descriptors: gives the buffers back to DMA */
-		for (i=0; iSeg_Count; i++)
-		{  
-			DMARxNextDesc->Status = ETH_DMARxDesc_OWN;
-			DMARxNextDesc = (ETH_DMADESCTypeDef *)(DMARxNextDesc->Buffer2NextDescAddr);
-		}
-		
-		/* Clear Segment_Count */
-		DMA_RX_FRAME_infos->Seg_Count =0;
-		
-		
-		/* When Rx Buffer unavailable flag is set: clear it and resume reception */
-		if ((ETH->DMASR & ETH_DMASR_RBUS) != (u32)RESET)  
-		{
-			/* Clear RBUS ETHERNET DMA flag */
-			ETH->DMASR = ETH_DMASR_RBUS;
-			  
-			/* Resume DMA reception */
-			ETH->DMARPDR = 0;
-		}
-	}
-	return p;
+    p = RT_NULL;
+
+//  rt_kprintf("ETH rx\n");
+    /* Get received frame */
+    frame = ETH_Get_Received_Frame_interrupt();
+
+    if( frame.length > 0 )
+    {
+        /* check that frame has no error */
+        if ((frame.descriptor->Status & ETH_DMARxDesc_ES) == (uint32_t)RESET)
+        {
+            //rt_kprintf("Get a frame %d buf = 0x%X, len= %d\n", framecnt++, frame.buffer, frame.length);
+            /* Obtain the size of the packet and put it into the "len" variable. */
+            len = frame.length;
+            buffer = (u8 *)frame.buffer;
+
+            /* We allocate a pbuf chain of pbufs from the pool. */
+            p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
+            //p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
+
+            /* Copy received frame from ethernet driver buffer to stack buffer */
+            if (p != NULL)
+            {
+              for (q = p; q != NULL; q = q->next)
+              {
+                rt_memcpy((u8_t*)q->payload, (u8_t*)&buffer[l], q->len);
+                l = l + q->len;
+              }
+            }
+        }
+
+        /* Release descriptors to DMA */
+        /* Check if received frame with multiple DMA buffer segments */
+        if (DMA_RX_FRAME_infos->Seg_Count > 1)
+        {
+            DMARxNextDesc = DMA_RX_FRAME_infos->FS_Rx_Desc;
+        }
+        else
+        {
+            DMARxNextDesc = frame.descriptor;
+        }
+
+        /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
+        for (i=0; iSeg_Count; i++)
+        {
+            DMARxNextDesc->Status = ETH_DMARxDesc_OWN;
+            DMARxNextDesc = (ETH_DMADESCTypeDef *)(DMARxNextDesc->Buffer2NextDescAddr);
+        }
+
+        /* Clear Segment_Count */
+        DMA_RX_FRAME_infos->Seg_Count =0;
+
+
+        /* When Rx Buffer unavailable flag is set: clear it and resume reception */
+        if ((ETH->DMASR & ETH_DMASR_RBUS) != (u32)RESET)
+        {
+            /* Clear RBUS ETHERNET DMA flag */
+            ETH->DMASR = ETH_DMASR_RBUS;
+
+            /* Resume DMA reception */
+            ETH->DMARPDR = 0;
+        }
+    }
+    return p;
 }
 
 static void NVIC_Configuration(void)
 {
-	NVIC_InitTypeDef NVIC_InitStructure;
-	
-	/* 2 bit for pre-emption priority, 2 bits for subpriority */
-  	NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
-	/* Enable the Ethernet global Interrupt */
-	NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
-	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
-	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
-	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-	NVIC_Init(&NVIC_InitStructure);
+    NVIC_InitTypeDef NVIC_InitStructure;
+
+    /* 2 bit for pre-emption priority, 2 bits for subpriority */
+    NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
+    /* Enable the Ethernet global Interrupt */
+    NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+    NVIC_Init(&NVIC_InitStructure);
 }
 
 /*
@@ -383,15 +383,15 @@ static void GPIO_Configuration(void)
         ETH_MII_TXD0/ETH_RMII_TXD0 -------> PB12
         ETH_MII_TXD1/ETH_RMII_TXD1 -------> PB13
 
-		**** Just for MII Mode ****
-		ETH_MII_CRS ----------------------> PA0
-		ETH_MII_COL ----------------------> PA3
-		ETH_MII_TX_CLK -------------------> PC3
-		ETH_MII_RX_ER --------------------> PB10
-		ETH_MII_RXD2 ---------------------> PB0
-		ETH_MII_RXD3 ---------------------> PB1
-		ETH_MII_TXD2 ---------------------> PC2
-		ETH_MII_TXD3 ---------------------> PB8
+        **** Just for MII Mode ****
+        ETH_MII_CRS ----------------------> PA0
+        ETH_MII_COL ----------------------> PA3
+        ETH_MII_TX_CLK -------------------> PC3
+        ETH_MII_RX_ER --------------------> PB10
+        ETH_MII_RXD2 ---------------------> PB0
+        ETH_MII_RXD3 ---------------------> PB1
+        ETH_MII_TXD2 ---------------------> PC2
+        ETH_MII_TXD3 ---------------------> PB8
                                                   */
   /* Configure PC1, PC4 and PC5 */
   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 |GPIO_Pin_4 | GPIO_Pin_5;
@@ -450,7 +450,7 @@ static void ETH_MACDMA_Config(void)
 
   /* Enable ETHERNET clock  */
   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_ETH_MAC | RCC_AHB1Periph_ETH_MAC_Tx |
-                         RCC_AHB1Periph_ETH_MAC_Rx, ENABLE);                                             
+                         RCC_AHB1Periph_ETH_MAC_Rx, ENABLE);
 
   /* Reset ETHERNET on AHB Bus */
   ETH_DeInit();
@@ -468,9 +468,9 @@ static void ETH_MACDMA_Config(void)
   /* Fill ETH_InitStructure parametrs */
   /*------------------------   MAC   -----------------------------------*/
   ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable;
-  //ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Disable; 
+  //ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Disable;
   //  ETH_InitStructure.ETH_Speed = ETH_Speed_10M;
-  //  ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex;   
+  //  ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex;
 
   ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
   ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable;
@@ -484,95 +484,95 @@ static void ETH_MACDMA_Config(void)
   ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
 #endif
 
-  /*------------------------   DMA   -----------------------------------*/  
-  
-  /* When we use the Checksum offload feature, we need to enable the Store and Forward mode: 
-  the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum, 
+  /*------------------------   DMA   -----------------------------------*/
+
+  /* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
+  the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
   if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
-  ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable; 
-  ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;         
-  ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;     
- 
-  ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;       
-  ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;   
+  ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;
+  ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
+  ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
+
+  ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
+  ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
   ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
-  ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;      
-  ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;                
-  ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;          
+  ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
+  ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
+  ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
   ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
   ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
 
   /* Configure Ethernet */
   if( ETH_Init(Ð_InitStructure, DP83848_PHY_ADDRESS) ==  ETH_ERROR )
-  	rt_kprintf("ETH init error, may be no link\n");
+    rt_kprintf("ETH init error, may be no link\n");
 
   /* Enable the Ethernet Rx Interrupt */
   ETH_DMAITConfig(ETH_DMA_IT_NIS | ETH_DMA_IT_R , ENABLE);
 }
 
-#define   DevID_SNo0       (*((rt_uint32_t *)0x1FFF7A10));  
-#define   DevID_SNo1       (*((rt_uint32_t *)0x1FFF7A10+32));  
+#define   DevID_SNo0       (*((rt_uint32_t *)0x1FFF7A10));
+#define   DevID_SNo1       (*((rt_uint32_t *)0x1FFF7A10+32));
 #define   DevID_SNo2       (*((rt_uint32_t *)0x1FFF7A10+64));
 void rt_hw_stm32_eth_init(void)
 {
-	GPIO_Configuration();
-	NVIC_Configuration();
-	ETH_MACDMA_Config();
+    GPIO_Configuration();
+    NVIC_Configuration();
+    ETH_MACDMA_Config();
 
     stm32_eth_device.dev_addr[0] = 0x00;
     stm32_eth_device.dev_addr[1] = 0x60;
     stm32_eth_device.dev_addr[2] = 0x6e;
-	{
-		uint32_t cpu_id[3] = {0};
-		cpu_id[2] = DevID_SNo2; cpu_id[1] = DevID_SNo1; cpu_id[0] = DevID_SNo0;
-		
-		// generate MAC addr from 96bit unique ID (only for test)
-		stm32_eth_device.dev_addr[3] = (uint8_t)((cpu_id[0]>>16)&0xFF);
-	    stm32_eth_device.dev_addr[4] = (uint8_t)((cpu_id[0]>>8)&0xFF);
-	    stm32_eth_device.dev_addr[5] = (uint8_t)(cpu_id[0]&0xFF);
+    {
+        uint32_t cpu_id[3] = {0};
+        cpu_id[2] = DevID_SNo2; cpu_id[1] = DevID_SNo1; cpu_id[0] = DevID_SNo0;
 
-//	    stm32_eth_device.dev_addr[3] = *(rt_uint8_t*)(0x1FFF7A10+7);
-//	    stm32_eth_device.dev_addr[4] = *(rt_uint8_t*)(0x1FFF7A10+8);
-//	    stm32_eth_device.dev_addr[5] = *(rt_uint8_t*)(0x1FFF7A10+9);
-	}
+        // generate MAC addr from 96bit unique ID (only for test)
+        stm32_eth_device.dev_addr[3] = (uint8_t)((cpu_id[0]>>16)&0xFF);
+        stm32_eth_device.dev_addr[4] = (uint8_t)((cpu_id[0]>>8)&0xFF);
+        stm32_eth_device.dev_addr[5] = (uint8_t)(cpu_id[0]&0xFF);
 
-	stm32_eth_device.parent.parent.init       = rt_stm32_eth_init;
-	stm32_eth_device.parent.parent.open       = rt_stm32_eth_open;
-	stm32_eth_device.parent.parent.close      = rt_stm32_eth_close;
-	stm32_eth_device.parent.parent.read       = rt_stm32_eth_read;
-	stm32_eth_device.parent.parent.write      = rt_stm32_eth_write;
-	stm32_eth_device.parent.parent.control    = rt_stm32_eth_control;
-	stm32_eth_device.parent.parent.user_data  = RT_NULL;
+//      stm32_eth_device.dev_addr[3] = *(rt_uint8_t*)(0x1FFF7A10+7);
+//      stm32_eth_device.dev_addr[4] = *(rt_uint8_t*)(0x1FFF7A10+8);
+//      stm32_eth_device.dev_addr[5] = *(rt_uint8_t*)(0x1FFF7A10+9);
+    }
 
-	stm32_eth_device.parent.eth_rx     = rt_stm32_eth_rx;
-	stm32_eth_device.parent.eth_tx     = rt_stm32_eth_tx;
+    stm32_eth_device.parent.parent.init       = rt_stm32_eth_init;
+    stm32_eth_device.parent.parent.open       = rt_stm32_eth_open;
+    stm32_eth_device.parent.parent.close      = rt_stm32_eth_close;
+    stm32_eth_device.parent.parent.read       = rt_stm32_eth_read;
+    stm32_eth_device.parent.parent.write      = rt_stm32_eth_write;
+    stm32_eth_device.parent.parent.control    = rt_stm32_eth_control;
+    stm32_eth_device.parent.parent.user_data  = RT_NULL;
 
-	/* init tx semaphore */
-	rt_sem_init(&tx_wait, "tx_wait", 1, RT_IPC_FLAG_FIFO);
+    stm32_eth_device.parent.eth_rx     = rt_stm32_eth_rx;
+    stm32_eth_device.parent.eth_tx     = rt_stm32_eth_tx;
 
-	/* register eth device */
-	eth_device_init(&(stm32_eth_device.parent), "e0");
+    /* init tx semaphore */
+    rt_sem_init(&tx_wait, "tx_wait", 1, RT_IPC_FLAG_FIFO);
+
+    /* register eth device */
+    eth_device_init(&(stm32_eth_device.parent), "e0");
 }
 static char led = 0;
 
 void dp83483()
 {
-	uint16_t bsr,sts, bcr, phycr;
+    uint16_t bsr,sts, bcr, phycr;
 
-	bsr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BSR);
-	sts = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_SR);
-	bcr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BCR);
-	phycr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_CR);	
+    bsr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BSR);
+    sts = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_SR);
+    bcr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BCR);
+    phycr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_CR);
 
-	rt_kprintf("BCR = 0x%X\tBSR = 0x%X\tPHY_STS = 0x%X\tPHY_CR = 0x%X\n", bcr,bsr,sts, phycr);
+    rt_kprintf("BCR = 0x%X\tBSR = 0x%X\tPHY_STS = 0x%X\tPHY_CR = 0x%X\n", bcr,bsr,sts, phycr);
 
-	rt_kprintf("PHY_FCSCR = 0x%X\n", ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_FCSCR	) );
-	rt_kprintf("PHY_MISR = 0x%X\n", ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_MISR ) );
+    rt_kprintf("PHY_FCSCR = 0x%X\n", ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_FCSCR ) );
+    rt_kprintf("PHY_MISR = 0x%X\n", ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_MISR ) );
 
-	rt_kprintf("DMASR = 0x%X\n", ETH->DMASR );
+    rt_kprintf("DMASR = 0x%X\n", ETH->DMASR );
 
-	//ETH_WritePHYRegister(DP83848_PHY_ADDRESS, PHY_LEDCR, (uint16_t)(0x38 | led));
-	led = (led==7)?0:7;
+    //ETH_WritePHYRegister(DP83848_PHY_ADDRESS, PHY_LEDCR, (uint16_t)(0x38 | led));
+    led = (led==7)?0:7;
 
 }
 #ifdef RT_USING_FINSH
diff --git a/bsp/stm32f20x/Drivers/stm32f2xx_it.c b/bsp/stm32f20x/Drivers/stm32f2xx_it.c
index 6126d7173d..3a482fa747 100644
--- a/bsp/stm32f20x/Drivers/stm32f2xx_it.c
+++ b/bsp/stm32f20x/Drivers/stm32f2xx_it.c
@@ -1,11 +1,11 @@
 /**
   ******************************************************************************
-  * @file    Project/STM32F2xx_StdPeriph_Template/stm32f2xx_it.c 
+  * @file    Project/STM32F2xx_StdPeriph_Template/stm32f2xx_it.c
   * @author  MCD Application Team
   * @version V1.0.0
   * @date    18-April-2011
   * @brief   Main Interrupt Service Routines.
-  *          This file provides template for all exceptions handler and 
+  *          This file provides template for all exceptions handler and
   *          peripherals interrupt service routine.
   ******************************************************************************
   * @attention
@@ -19,7 +19,7 @@
   *
   * 
© COPYRIGHT 2011 STMicroelectronics

   ******************************************************************************
-  */ 
+  */
 
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f2xx.h"
@@ -126,7 +126,7 @@ void DebugMon_Handler(void)
 
 /**
   * @}
-  */ 
+  */
 
 #if defined(RT_USING_DFS) && STM32_USE_SDIO
 /*******************************************************************************
@@ -145,7 +145,7 @@ void SDIO_IRQHandler(void)
 
     /* Process All SDIO Interrupt Sources */
     if( SD_ProcessIRQSrc() == 2)
-		rt_kprintf("SD Error\n");
+        rt_kprintf("SD Error\n");
 
     /* leave interrupt */
     rt_interrupt_leave();
diff --git a/bsp/stm32f20x/Drivers/usart.c b/bsp/stm32f20x/Drivers/usart.c
index ff82ab9f8a..876b187940 100644
--- a/bsp/stm32f20x/Drivers/usart.c
+++ b/bsp/stm32f20x/Drivers/usart.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -34,9 +34,9 @@
 struct stm32_serial_int_rx uart1_int_rx;
 struct stm32_serial_device uart1 =
 {
-	USART1,
-	&uart1_int_rx,
-	RT_NULL
+    USART1,
+    &uart1_int_rx,
+    RT_NULL
 };
 struct rt_device uart1_device;
 #endif
@@ -45,9 +45,9 @@ struct rt_device uart1_device;
 struct stm32_serial_int_rx uart6_int_rx;
 struct stm32_serial_device uart6 =
 {
-	USART6,
-	&uart6_int_rx,
-	RT_NULL
+    USART6,
+    &uart6_int_rx,
+    RT_NULL
 };
 struct rt_device uart6_device;
 #endif
@@ -56,9 +56,9 @@ struct rt_device uart6_device;
 struct stm32_serial_int_rx uart2_int_rx;
 struct stm32_serial_device uart2 =
 {
-	USART2,
-	&uart2_int_rx,
-	RT_NULL
+    USART2,
+    &uart2_int_rx,
+    RT_NULL
 };
 struct rt_device uart2_device;
 #endif
@@ -68,9 +68,9 @@ struct stm32_serial_int_rx uart3_int_rx;
 struct stm32_serial_dma_tx uart3_dma_tx;
 struct stm32_serial_device uart3 =
 {
-	USART3,
-	&uart3_int_rx,
-	&uart3_dma_tx
+    USART3,
+    &uart3_int_rx,
+    &uart3_dma_tx
 };
 struct rt_device uart3_device;
 #endif
@@ -80,110 +80,110 @@ struct rt_device uart3_device;
 #define USART3_DR_Base  0x40004804
 
 /* USART1_REMAP = 0 */
-#define UART1_GPIO_TX		GPIO_Pin_9
-#define UART1_GPIO_RX		GPIO_Pin_10
-#define UART1_GPIO			GPIOA
-#define RCC_APBPeriph_UART1	RCC_APB2Periph_USART1
-#define UART1_TX_DMA		DMA1_Channel4
-#define UART1_RX_DMA		DMA1_Channel5
+#define UART1_GPIO_TX       GPIO_Pin_9
+#define UART1_GPIO_RX       GPIO_Pin_10
+#define UART1_GPIO          GPIOA
+#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
+#define UART1_TX_DMA        DMA1_Channel4
+#define UART1_RX_DMA        DMA1_Channel5
 
 #if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
-#define UART2_GPIO_TX	    GPIO_Pin_5
-#define UART2_GPIO_RX	    GPIO_Pin_6
-#define UART2_GPIO	    	GPIOD
-#define RCC_APBPeriph_UART2	RCC_APB1Periph_USART2
+#define UART2_GPIO_TX       GPIO_Pin_5
+#define UART2_GPIO_RX       GPIO_Pin_6
+#define UART2_GPIO          GPIOD
+#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
 #else /* for STM32F10X_HD */
 /* USART2_REMAP = 0 */
-#define UART2_GPIO_TX		GPIO_Pin_2
-#define UART2_GPIO_RX		GPIO_Pin_3
-#define UART2_GPIO			GPIOA
-#define RCC_APBPeriph_UART2	RCC_APB1Periph_USART2
-#define UART2_TX_DMA		DMA1_Channel7
-#define UART2_RX_DMA		DMA1_Channel6
+#define UART2_GPIO_TX       GPIO_Pin_2
+#define UART2_GPIO_RX       GPIO_Pin_3
+#define UART2_GPIO          GPIOA
+#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
+#define UART2_TX_DMA        DMA1_Channel7
+#define UART2_RX_DMA        DMA1_Channel6
 #endif
 
 /* USART3_REMAP[1:0] = 00 */
-#define UART3_GPIO_RX		GPIO_Pin_11
-#define UART3_GPIO_TX		GPIO_Pin_10
-#define UART3_GPIO			GPIOB
-#define RCC_APBPeriph_UART3	RCC_APB1Periph_USART3
-#define UART3_TX_DMA		DMA1_Channel2
-#define UART3_RX_DMA		DMA1_Channel3
+#define UART3_GPIO_RX       GPIO_Pin_11
+#define UART3_GPIO_TX       GPIO_Pin_10
+#define UART3_GPIO          GPIOB
+#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
+#define UART3_TX_DMA        DMA1_Channel2
+#define UART3_RX_DMA        DMA1_Channel3
 
 /* USART6_REMAP = 0 */
-#define UART6_GPIO_TX		GPIO_Pin_6
-#define UART6_GPIO_RX		GPIO_Pin_7
-#define UART6_GPIO			GPIOC
-#define RCC_APBPeriph_UART6	RCC_APB2Periph_USART6
-//#define UART1_TX_DMA		DMA1_Channel?
-//#define UART1_RX_DMA		DMA1_Channel?
+#define UART6_GPIO_TX       GPIO_Pin_6
+#define UART6_GPIO_RX       GPIO_Pin_7
+#define UART6_GPIO          GPIOC
+#define RCC_APBPeriph_UART6 RCC_APB2Periph_USART6
+//#define UART1_TX_DMA      DMA1_Channel?
+//#define UART1_RX_DMA      DMA1_Channel?
 
 static void RCC_Configuration(void)
 {
 #ifdef RT_USING_UART1
-	/* Enable USART1 and GPIOA clocks */
-	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
-	RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
+    /* Enable USART1 and GPIOA clocks */
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
 #endif
 
 #ifdef RT_USING_UART6
-	/* Enable USART6 and GPIOC clocks */
-	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
-	RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART6, ENABLE);
+    /* Enable USART6 and GPIOC clocks */
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART6, ENABLE);
 #endif
 }
 
 static void GPIO_Configuration(void)
 {
-	GPIO_InitTypeDef GPIO_InitStruct;
+    GPIO_InitTypeDef GPIO_InitStruct;
 
 #ifdef RT_USING_UART1
-	GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF;
-	GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz;
-	GPIO_InitStruct.GPIO_OType=GPIO_OType_PP;
-	GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP;
+    GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF;
+    GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz;
+    GPIO_InitStruct.GPIO_OType=GPIO_OType_PP;
+    GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP;
 
-	GPIO_InitStruct.GPIO_Pin=GPIO_Pin_9|GPIO_Pin_10;
-	GPIO_Init(GPIOA,&GPIO_InitStruct);
+    GPIO_InitStruct.GPIO_Pin=GPIO_Pin_9|GPIO_Pin_10;
+    GPIO_Init(GPIOA,&GPIO_InitStruct);
 
-	GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1);
-	GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1);
+    GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1);
+    GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1);
 #endif
 
 #ifdef RT_USING_UART6
-	GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF;
-	GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz;
-	GPIO_InitStruct.GPIO_OType=GPIO_OType_PP;
-	GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP;
+    GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF;
+    GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz;
+    GPIO_InitStruct.GPIO_OType=GPIO_OType_PP;
+    GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP;
 
-	GPIO_InitStruct.GPIO_Pin=UART6_GPIO_TX|UART6_GPIO_RX;
-	GPIO_Init(UART6_GPIO,&GPIO_InitStruct);
+    GPIO_InitStruct.GPIO_Pin=UART6_GPIO_TX|UART6_GPIO_RX;
+    GPIO_Init(UART6_GPIO,&GPIO_InitStruct);
 
-	GPIO_PinAFConfig(UART6_GPIO, GPIO_PinSource6, GPIO_AF_USART6);
-	GPIO_PinAFConfig(UART6_GPIO, GPIO_PinSource7, GPIO_AF_USART6);
+    GPIO_PinAFConfig(UART6_GPIO, GPIO_PinSource6, GPIO_AF_USART6);
+    GPIO_PinAFConfig(UART6_GPIO, GPIO_PinSource7, GPIO_AF_USART6);
 #endif
 }
 
 static void NVIC_Configuration(void)
 {
-	NVIC_InitTypeDef NVIC_InitStructure;
+    NVIC_InitTypeDef NVIC_InitStructure;
 
 #ifdef RT_USING_UART1
-	/* Enable the USART1 Interrupt */
-	NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
-	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
-	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
-	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-	NVIC_Init(&NVIC_InitStructure);
+    /* Enable the USART1 Interrupt */
+    NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+    NVIC_Init(&NVIC_InitStructure);
 #endif
 
 #ifdef RT_USING_UART6
-	/* Enable the USART1 Interrupt */
-	NVIC_InitStructure.NVIC_IRQChannel = USART6_IRQn;
-	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
-	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
-	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-	NVIC_Init(&NVIC_InitStructure);
+    /* Enable the USART1 Interrupt */
+    NVIC_InitStructure.NVIC_IRQChannel = USART6_IRQn;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+    NVIC_Init(&NVIC_InitStructure);
 #endif
 }
 
@@ -193,60 +193,60 @@ static void NVIC_Configuration(void)
  */
 void rt_hw_usart_init()
 {
-	USART_InitTypeDef USART_InitStructure;
+    USART_InitTypeDef USART_InitStructure;
 
-	RCC_Configuration();
+    RCC_Configuration();
 
-	GPIO_Configuration();
+    GPIO_Configuration();
 
-	NVIC_Configuration();
+    NVIC_Configuration();
 
-	/* uart init */
+    /* uart init */
 #ifdef RT_USING_UART1
-	USART_DeInit(USART1);
-	USART_InitStructure.USART_BaudRate            = 115200;
-	USART_InitStructure.USART_WordLength          = USART_WordLength_8b;
-	USART_InitStructure.USART_StopBits            = USART_StopBits_1;
-	USART_InitStructure.USART_Parity              = USART_Parity_No ;
-	USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-	USART_InitStructure.USART_Mode                = USART_Mode_Rx | USART_Mode_Tx;
+    USART_DeInit(USART1);
+    USART_InitStructure.USART_BaudRate            = 115200;
+    USART_InitStructure.USART_WordLength          = USART_WordLength_8b;
+    USART_InitStructure.USART_StopBits            = USART_StopBits_1;
+    USART_InitStructure.USART_Parity              = USART_Parity_No ;
+    USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+    USART_InitStructure.USART_Mode                = USART_Mode_Rx | USART_Mode_Tx;
 
-	USART_Init(USART1, &USART_InitStructure);
+    USART_Init(USART1, &USART_InitStructure);
 
-	/* register uart1 */
-	rt_hw_serial_register(&uart1_device, "uart1",
-		RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
-		&uart1);
+    /* register uart1 */
+    rt_hw_serial_register(&uart1_device, "uart1",
+        RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+        &uart1);
 
-	/* enable interrupt */
-	USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
-	/* Enable USART1 */
-	USART_Cmd(USART1, ENABLE);
-	USART_ClearFlag(USART1,USART_FLAG_TXE);
+    /* enable interrupt */
+    USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
+    /* Enable USART1 */
+    USART_Cmd(USART1, ENABLE);
+    USART_ClearFlag(USART1,USART_FLAG_TXE);
 #endif
 
-	/* uart init */
+    /* uart init */
 #ifdef RT_USING_UART6
-	USART_DeInit(USART6);
-	USART_InitStructure.USART_BaudRate            = 115200;
-	USART_InitStructure.USART_WordLength          = USART_WordLength_8b;
-	USART_InitStructure.USART_StopBits            = USART_StopBits_1;
-	USART_InitStructure.USART_Parity              = USART_Parity_No ;
-	USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-	USART_InitStructure.USART_Mode                = USART_Mode_Rx | USART_Mode_Tx;
+    USART_DeInit(USART6);
+    USART_InitStructure.USART_BaudRate            = 115200;
+    USART_InitStructure.USART_WordLength          = USART_WordLength_8b;
+    USART_InitStructure.USART_StopBits            = USART_StopBits_1;
+    USART_InitStructure.USART_Parity              = USART_Parity_No ;
+    USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+    USART_InitStructure.USART_Mode                = USART_Mode_Rx | USART_Mode_Tx;
 
-	USART_Init(USART6, &USART_InitStructure);
+    USART_Init(USART6, &USART_InitStructure);
 
-	/* register uart1 */
-	rt_hw_serial_register(&uart6_device, "uart6",
-		RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
-		&uart6);
+    /* register uart1 */
+    rt_hw_serial_register(&uart6_device, "uart6",
+        RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+        &uart6);
 
-	/* enable interrupt */
-	USART_ITConfig(USART6, USART_IT_RXNE, ENABLE);
-	/* Enable USART6 */
-	USART_Cmd(USART6, ENABLE);
-	USART_ClearFlag(USART6,USART_FLAG_TXE);
+    /* enable interrupt */
+    USART_ITConfig(USART6, USART_IT_RXNE, ENABLE);
+    /* Enable USART6 */
+    USART_Cmd(USART6, ENABLE);
+    USART_ClearFlag(USART6,USART_FLAG_TXE);
 #endif
 }
 
diff --git a/bsp/stm32f20x/Drivers/usart.h b/bsp/stm32f20x/Drivers/usart.h
index 176c179e5b..76b64f96f8 100644
--- a/bsp/stm32f20x/Drivers/usart.h
+++ b/bsp/stm32f20x/Drivers/usart.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/stm32f20x/applications/application.c b/bsp/stm32f20x/applications/application.c
index 4f37de7b30..04258d0ffd 100644
--- a/bsp/stm32f20x/applications/application.c
+++ b/bsp/stm32f20x/applications/application.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/stm32f20x/applications/startup.c b/bsp/stm32f20x/applications/startup.c
index 92be9bd2ce..709a4bfb6d 100644
--- a/bsp/stm32f20x/applications/startup.c
+++ b/bsp/stm32f20x/applications/startup.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -42,11 +42,11 @@ extern int __bss_end;
 *******************************************************************************/
 void assert_failed(u8* file, u32 line)
 {
-	rt_kprintf("\n\r Wrong parameter value detected on\r\n");
-	rt_kprintf("       file  %s\r\n", file);
-	rt_kprintf("       line  %d\r\n", line);
+    rt_kprintf("\n\r Wrong parameter value detected on\r\n");
+    rt_kprintf("       file  %s\r\n", file);
+    rt_kprintf("       line  %d\r\n", line);
 
-	while (1) ;
+    while (1) ;
 }
 #endif
 
@@ -55,58 +55,58 @@ void assert_failed(u8* file, u32 line)
  */
 void rtthread_startup(void)
 {
-	/* init board */
-	rt_hw_board_init();
+    /* init board */
+    rt_hw_board_init();
 
-	/* show version */
-	rt_show_version();
+    /* show version */
+    rt_show_version();
 
-	/* init timer system */
-	rt_system_timer_init();
+    /* init timer system */
+    rt_system_timer_init();
 
 #ifdef RT_USING_HEAP
 #if STM32_EXT_SRAM
-	rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
+    rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
 #else
-	#if defined(__CC_ARM) || defined(__CLANG_ARM)
-		rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
-	#elif __ICCARM__
-	    rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
-	#else
-		/* init memory system */
-		rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
-	#endif
+    #if defined(__CC_ARM) || defined(__CLANG_ARM)
+        rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
+    #elif __ICCARM__
+        rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
+    #else
+        /* init memory system */
+        rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
+    #endif
 #endif
 #endif
 
-	/* init scheduler system */
-	rt_system_scheduler_init();
+    /* init scheduler system */
+    rt_system_scheduler_init();
 
-	/* init application */
-	rt_application_init();
+    /* init application */
+    rt_application_init();
 
     /* init timer thread */
     rt_system_timer_thread_init();
 
-	/* init idle thread */
-	rt_thread_idle_init();
+    /* init idle thread */
+    rt_thread_idle_init();
 
-	/* start scheduler */
-	rt_system_scheduler_start();
+    /* start scheduler */
+    rt_system_scheduler_start();
 
-	/* never reach here */
-	return ;
+    /* never reach here */
+    return ;
 }
 
 int main(void)
 {
-	/* disable interrupt first */
-	rt_hw_interrupt_disable();
+    /* disable interrupt first */
+    rt_hw_interrupt_disable();
 
-	/* startup RT-Thread RTOS */
-	rtthread_startup();
+    /* startup RT-Thread RTOS */
+    rtthread_startup();
 
-	return 0;
+    return 0;
 }
 
 /*@}*/
diff --git a/bsp/stm32f20x/project.ewp b/bsp/stm32f20x/project.ewp
index 9bdc55d5c8..930a998d2b 100644
--- a/bsp/stm32f20x/project.ewp
+++ b/bsp/stm32f20x/project.ewp
@@ -145,10 +145,8 @@
         
         
         
         
         

 *
@@ -59,38 +59,38 @@ extern "C" {
 /***************** Macros (Inline Functions) Definitions ********************/
 
 /* necessary for pre-processor */
-#define stringify(s)	tostring(s)
-#define tostring(s)	#s
+#define stringify(s)    tostring(s)
+#define tostring(s) #s
 
 #if defined (__aarch64__)
 /* pseudo assembler instructions */
-#define mfcpsr()	({rt_uint32_t rval = 0U; \
-			   asm volatile("mrs %0,  DAIF" : "=r" (rval));\
-			  rval;\
-			 })
+#define mfcpsr()    ({rt_uint32_t rval = 0U; \
+               asm volatile("mrs %0,  DAIF" : "=r" (rval));\
+              rval;\
+             })
 
 #define mtcpsr(v) __asm__ __volatile__ ("msr DAIF, %0" : : "r" (v))
 
-#define cpsiei()	//__asm__ __volatile__("cpsie	i\n")
-#define cpsidi()	//__asm__ __volatile__("cpsid	i\n")
+#define cpsiei()    //__asm__ __volatile__("cpsie   i\n")
+#define cpsidi()    //__asm__ __volatile__("cpsid   i\n")
 
-#define cpsief()	//__asm__ __volatile__("cpsie	f\n")
-#define cpsidf()	//__asm__ __volatile__("cpsid	f\n")
+#define cpsief()    //__asm__ __volatile__("cpsie   f\n")
+#define cpsidf()    //__asm__ __volatile__("cpsid   f\n")
 
 
 
-#define mtgpr(rn, v)	/*__asm__ __volatile__(\
-			  "mov r" stringify(rn) ", %0 \n"\
-			  : : "r" (v)\
-			)*/
+#define mtgpr(rn, v)    /*__asm__ __volatile__(\
+              "mov r" stringify(rn) ", %0 \n"\
+              : : "r" (v)\
+            )*/
 
-#define mfgpr(rn)	/*({rt_uint32_t rval; \
-			  __asm__ __volatile__(\
-			    "mov %0,r" stringify(rn) "\n"\
-			    : "=r" (rval)\
-			  );\
-			  rval;\
-			 })*/
+#define mfgpr(rn)   /*({rt_uint32_t rval; \
+              __asm__ __volatile__(\
+                "mov %0,r" stringify(rn) "\n"\
+                : "=r" (rval)\
+              );\
+              rval;\
+             })*/
 
 /* memory synchronization operations */
 
@@ -105,13 +105,13 @@ extern "C" {
 
 
 /* Memory Operations */
-#define ldr(adr)	({u64 rval; \
-			  __asm__ __volatile__(\
-			    "ldr	%0,[%1]"\
-			    : "=r" (rval) : "r" (adr)\
-			  );\
-			  rval;\
-			 })
+#define ldr(adr)    ({u64 rval; \
+              __asm__ __volatile__(\
+                "ldr    %0,[%1]"\
+                : "=r" (rval) : "r" (adr)\
+              );\
+              rval;\
+             })
 
 #define mfelrel3() ({u64 rval = 0U; \
                    asm volatile("mrs %0,  ELR_EL3" : "=r" (rval));\
@@ -123,39 +123,39 @@ extern "C" {
 #else
 
 /* pseudo assembler instructions */
-#define mfcpsr()	({rt_uint32_t rval = 0U; \
-			  __asm__ __volatile__(\
-			    "mrs	%0, cpsr\n"\
-			    : "=r" (rval)\
-			  );\
-			  rval;\
-			 })
+#define mfcpsr()    ({rt_uint32_t rval = 0U; \
+              __asm__ __volatile__(\
+                "mrs    %0, cpsr\n"\
+                : "=r" (rval)\
+              );\
+              rval;\
+             })
 
-#define mtcpsr(v)	__asm__ __volatile__(\
-			  "msr	cpsr,%0\n"\
-			  : : "r" (v)\
-			)
+#define mtcpsr(v)   __asm__ __volatile__(\
+              "msr  cpsr,%0\n"\
+              : : "r" (v)\
+            )
 
-#define cpsiei()	__asm__ __volatile__("cpsie	i\n")
-#define cpsidi()	__asm__ __volatile__("cpsid	i\n")
+#define cpsiei()    __asm__ __volatile__("cpsie i\n")
+#define cpsidi()    __asm__ __volatile__("cpsid i\n")
 
-#define cpsief()	__asm__ __volatile__("cpsie	f\n")
-#define cpsidf()	__asm__ __volatile__("cpsid	f\n")
+#define cpsief()    __asm__ __volatile__("cpsie f\n")
+#define cpsidf()    __asm__ __volatile__("cpsid f\n")
 
 
 
-#define mtgpr(rn, v)	__asm__ __volatile__(\
-			  "mov r" stringify(rn) ", %0 \n"\
-			  : : "r" (v)\
-			)
+#define mtgpr(rn, v)    __asm__ __volatile__(\
+              "mov r" stringify(rn) ", %0 \n"\
+              : : "r" (v)\
+            )
 
-#define mfgpr(rn)	({rt_uint32_t rval; \
-			  __asm__ __volatile__(\
-			    "mov %0,r" stringify(rn) "\n"\
-			    : "=r" (rval)\
-			  );\
-			  rval;\
-			 })
+#define mfgpr(rn)   ({rt_uint32_t rval; \
+              __asm__ __volatile__(\
+                "mov %0,r" stringify(rn) "\n"\
+                : "=r" (rval)\
+              );\
+              rval;\
+             })
 
 /* memory synchronization operations */
 
@@ -170,72 +170,72 @@ extern "C" {
 
 
 /* Memory Operations */
-#define ldr(adr)	({rt_uint32_t rval; \
-			  __asm__ __volatile__(\
-			    "ldr	%0,[%1]"\
-			    : "=r" (rval) : "r" (adr)\
-			  );\
-			  rval;\
-			 })
+#define ldr(adr)    ({rt_uint32_t rval; \
+              __asm__ __volatile__(\
+                "ldr    %0,[%1]"\
+                : "=r" (rval) : "r" (adr)\
+              );\
+              rval;\
+             })
 
 #endif
 
-#define ldrb(adr)	({rt_uint8_t rval; \
-			  __asm__ __volatile__(\
-			    "ldrb	%0,[%1]"\
-			    : "=r" (rval) : "r" (adr)\
-			  );\
-			  rval;\
-			 })
+#define ldrb(adr)   ({rt_uint8_t rval; \
+              __asm__ __volatile__(\
+                "ldrb   %0,[%1]"\
+                : "=r" (rval) : "r" (adr)\
+              );\
+              rval;\
+             })
 
-#define str(adr, val)	__asm__ __volatile__(\
-			  "str	%0,[%1]\n"\
-			  : : "r" (val), "r" (adr)\
-			)
+#define str(adr, val)   __asm__ __volatile__(\
+              "str  %0,[%1]\n"\
+              : : "r" (val), "r" (adr)\
+            )
 
-#define strb(adr, val)	__asm__ __volatile__(\
-			  "strb	%0,[%1]\n"\
-			  : : "r" (val), "r" (adr)\
-			)
+#define strb(adr, val)  __asm__ __volatile__(\
+              "strb %0,[%1]\n"\
+              : : "r" (val), "r" (adr)\
+            )
 
 /* Count leading zeroes (clz) */
-#define clz(arg)	({rt_uint8_t rval; \
-			  __asm__ __volatile__(\
-			    "clz	%0,%1"\
-			    : "=r" (rval) : "r" (arg)\
-			  );\
-			  rval;\
-			 })
+#define clz(arg)    ({rt_uint8_t rval; \
+              __asm__ __volatile__(\
+                "clz    %0,%1"\
+                : "=r" (rval) : "r" (arg)\
+              );\
+              rval;\
+             })
 
 #if defined (__aarch64__)
-#define mtcpdc(reg,val)	__asm__ __volatile__("dc " #reg ",%0"  : : "r" (val))
-#define mtcpic(reg,val)	__asm__ __volatile__("ic " #reg ",%0"  : : "r" (val))
+#define mtcpdc(reg,val) __asm__ __volatile__("dc " #reg ",%0"  : : "r" (val))
+#define mtcpic(reg,val) __asm__ __volatile__("ic " #reg ",%0"  : : "r" (val))
 
-#define mtcpicall(reg)	__asm__ __volatile__("ic " #reg)
-#define mtcptlbi(reg)	__asm__ __volatile__("tlbi " #reg)
-#define mtcpat(reg,val)	__asm__ __volatile__("at " #reg ",%0"  : : "r" (val))
+#define mtcpicall(reg)  __asm__ __volatile__("ic " #reg)
+#define mtcptlbi(reg)   __asm__ __volatile__("tlbi " #reg)
+#define mtcpat(reg,val) __asm__ __volatile__("at " #reg ",%0"  : : "r" (val))
 /* CP15 operations */
-#define mfcp(reg)	({u64 rval = 0U;\
-			__asm__ __volatile__("mrs	%0, " #reg : "=r" (rval));\
-			rval;\
-			})
+#define mfcp(reg)   ({u64 rval = 0U;\
+            __asm__ __volatile__("mrs   %0, " #reg : "=r" (rval));\
+            rval;\
+            })
 
-#define mtcp(reg,val)	__asm__ __volatile__("msr " #reg ",%0"  : : "r" (val))
+#define mtcp(reg,val)   __asm__ __volatile__("msr " #reg ",%0"  : : "r" (val))
 
 #else
 /* CP15 operations */
-#define mtcp(rn, v)	__asm__ __volatile__(\
-			 "mcr " rn "\n"\
-			 : : "r" (v)\
-			);
+#define mtcp(rn, v) __asm__ __volatile__(\
+             "mcr " rn "\n"\
+             : : "r" (v)\
+            );
 
-#define mfcp(rn)	({rt_uint32_t rval = 0U; \
-			 __asm__ __volatile__(\
-			   "mrc " rn "\n"\
-			   : "=r" (rval)\
-			 );\
-			 rval;\
-			 })
+#define mfcp(rn)    ({rt_uint32_t rval = 0U; \
+             __asm__ __volatile__(\
+               "mrc " rn "\n"\
+               : "=r" (rval)\
+             );\
+             rval;\
+             })
 #endif
 
 /************************** Variable Definitions ****************************/
diff --git a/libcpu/arm/zynqmp-r5/xreg_cortexr5.h b/libcpu/arm/zynqmp-r5/xreg_cortexr5.h
index 263f213567..9c0ae2b440 100644
--- a/libcpu/arm/zynqmp-r5/xreg_cortexr5.h
+++ b/libcpu/arm/zynqmp-r5/xreg_cortexr5.h
@@ -23,86 +23,86 @@
 * 

 *
 ******************************************************************************/
-#ifndef XREG_CORTEXR5_H	/* prevent circular inclusions */
-#define XREG_CORTEXR5_H	/* by using protection macros */
+#ifndef XREG_CORTEXR5_H /* prevent circular inclusions */
+#define XREG_CORTEXR5_H /* by using protection macros */
 
 #ifdef __cplusplus
 extern "C" {
 #endif /* __cplusplus */
 
 /* GPRs */
-#define XREG_GPR0				r0
-#define XREG_GPR1				r1
-#define XREG_GPR2				r2
-#define XREG_GPR3				r3
-#define XREG_GPR4				r4
-#define XREG_GPR5				r5
-#define XREG_GPR6				r6
-#define XREG_GPR7				r7
-#define XREG_GPR8				r8
-#define XREG_GPR9				r9
-#define XREG_GPR10				r10
-#define XREG_GPR11				r11
-#define XREG_GPR12				r12
-#define XREG_GPR13				r13
-#define XREG_GPR14				r14
-#define XREG_GPR15				r15
-#define XREG_CPSR				cpsr
+#define XREG_GPR0               r0
+#define XREG_GPR1               r1
+#define XREG_GPR2               r2
+#define XREG_GPR3               r3
+#define XREG_GPR4               r4
+#define XREG_GPR5               r5
+#define XREG_GPR6               r6
+#define XREG_GPR7               r7
+#define XREG_GPR8               r8
+#define XREG_GPR9               r9
+#define XREG_GPR10              r10
+#define XREG_GPR11              r11
+#define XREG_GPR12              r12
+#define XREG_GPR13              r13
+#define XREG_GPR14              r14
+#define XREG_GPR15              r15
+#define XREG_CPSR               cpsr
 
 /* Coprocessor number defines */
-#define XREG_CP0				0
-#define XREG_CP1				1
-#define XREG_CP2				2
-#define XREG_CP3				3
-#define XREG_CP4				4
-#define XREG_CP5				5
-#define XREG_CP6				6
-#define XREG_CP7				7
-#define XREG_CP8				8
-#define XREG_CP9				9
-#define XREG_CP10				10
-#define XREG_CP11				11
-#define XREG_CP12				12
-#define XREG_CP13				13
-#define XREG_CP14				14
-#define XREG_CP15				15
+#define XREG_CP0                0
+#define XREG_CP1                1
+#define XREG_CP2                2
+#define XREG_CP3                3
+#define XREG_CP4                4
+#define XREG_CP5                5
+#define XREG_CP6                6
+#define XREG_CP7                7
+#define XREG_CP8                8
+#define XREG_CP9                9
+#define XREG_CP10               10
+#define XREG_CP11               11
+#define XREG_CP12               12
+#define XREG_CP13               13
+#define XREG_CP14               14
+#define XREG_CP15               15
 
 /* Coprocessor control register defines */
-#define XREG_CR0				cr0
-#define XREG_CR1				cr1
-#define XREG_CR2				cr2
-#define XREG_CR3				cr3
-#define XREG_CR4				cr4
-#define XREG_CR5				cr5
-#define XREG_CR6				cr6
-#define XREG_CR7				cr7
-#define XREG_CR8				cr8
-#define XREG_CR9				cr9
-#define XREG_CR10				cr10
-#define XREG_CR11				cr11
-#define XREG_CR12				cr12
-#define XREG_CR13				cr13
-#define XREG_CR14				cr14
-#define XREG_CR15				cr15
+#define XREG_CR0                cr0
+#define XREG_CR1                cr1
+#define XREG_CR2                cr2
+#define XREG_CR3                cr3
+#define XREG_CR4                cr4
+#define XREG_CR5                cr5
+#define XREG_CR6                cr6
+#define XREG_CR7                cr7
+#define XREG_CR8                cr8
+#define XREG_CR9                cr9
+#define XREG_CR10               cr10
+#define XREG_CR11               cr11
+#define XREG_CR12               cr12
+#define XREG_CR13               cr13
+#define XREG_CR14               cr14
+#define XREG_CR15               cr15
 
 /* Current Processor Status Register (CPSR) Bits */
-#define XREG_CPSR_THUMB_MODE			0x20U
-#define XREG_CPSR_MODE_BITS			0x1FU
-#define XREG_CPSR_SYSTEM_MODE			0x1FU
-#define XREG_CPSR_UNDEFINED_MODE		0x1BU
-#define XREG_CPSR_DATA_ABORT_MODE		0x17U
-#define XREG_CPSR_SVC_MODE			0x13U
-#define XREG_CPSR_IRQ_MODE			0x12U
-#define XREG_CPSR_FIQ_MODE			0x11U
-#define XREG_CPSR_USER_MODE			0x10U
+#define XREG_CPSR_THUMB_MODE            0x20U
+#define XREG_CPSR_MODE_BITS         0x1FU
+#define XREG_CPSR_SYSTEM_MODE           0x1FU
+#define XREG_CPSR_UNDEFINED_MODE        0x1BU
+#define XREG_CPSR_DATA_ABORT_MODE       0x17U
+#define XREG_CPSR_SVC_MODE          0x13U
+#define XREG_CPSR_IRQ_MODE          0x12U
+#define XREG_CPSR_FIQ_MODE          0x11U
+#define XREG_CPSR_USER_MODE         0x10U
 
-#define XREG_CPSR_IRQ_ENABLE			0x80U
-#define XREG_CPSR_FIQ_ENABLE			0x40U
+#define XREG_CPSR_IRQ_ENABLE            0x80U
+#define XREG_CPSR_FIQ_ENABLE            0x40U
 
-#define XREG_CPSR_N_BIT				0x80000000U
-#define XREG_CPSR_Z_BIT				0x40000000U
-#define XREG_CPSR_C_BIT				0x20000000U
-#define XREG_CPSR_V_BIT				0x10000000U
+#define XREG_CPSR_N_BIT             0x80000000U
+#define XREG_CPSR_Z_BIT             0x40000000U
+#define XREG_CPSR_C_BIT             0x20000000U
+#define XREG_CPSR_V_BIT             0x10000000U
 
 /*MPU region definitions*/
 #define REGION_32B     0x00000004U
@@ -138,99 +138,99 @@ extern "C" {
 
 
 
-#define SHAREABLE				0x00000004U 	/*shareable */
-#define STRONG_ORDERD_SHARED	0x00000000U	/*strongly ordered, always shareable*/
+#define SHAREABLE               0x00000004U     /*shareable */
+#define STRONG_ORDERD_SHARED    0x00000000U /*strongly ordered, always shareable*/
 
-#define DEVICE_SHARED			0x00000001U	/*device, shareable*/
-#define DEVICE_NONSHARED		0x00000010U	/*device, non shareable*/
+#define DEVICE_SHARED           0x00000001U /*device, shareable*/
+#define DEVICE_NONSHARED        0x00000010U /*device, non shareable*/
 
-#define NORM_NSHARED_WT_NWA		0x00000002U 	/*Outer and Inner write-through, no write-allocate non-shareable*/
-#define NORM_SHARED_WT_NWA		0x00000006U 	/*Outer and Inner write-through, no write-allocate shareable*/
+#define NORM_NSHARED_WT_NWA     0x00000002U     /*Outer and Inner write-through, no write-allocate non-shareable*/
+#define NORM_SHARED_WT_NWA      0x00000006U     /*Outer and Inner write-through, no write-allocate shareable*/
 
-#define NORM_NSHARED_WB_NWA 	0x00000003U 	/*Outer and Inner write-back, no write-allocate non shareable*/
-#define NORM_SHARED_WB_NWA 		0x00000007U 	/*Outer and Inner write-back, no write-allocate shareable*/
+#define NORM_NSHARED_WB_NWA     0x00000003U     /*Outer and Inner write-back, no write-allocate non shareable*/
+#define NORM_SHARED_WB_NWA      0x00000007U     /*Outer and Inner write-back, no write-allocate shareable*/
 
-#define NORM_NSHARED_NCACHE 	0x00000008U 	/*Outer and Inner Non cacheable  non shareable*/
-#define NORM_SHARED_NCACHE 		0x0000000CU 	/*Outer and Inner Non cacheable shareable*/
+#define NORM_NSHARED_NCACHE     0x00000008U     /*Outer and Inner Non cacheable  non shareable*/
+#define NORM_SHARED_NCACHE      0x0000000CU     /*Outer and Inner Non cacheable shareable*/
 
-#define NORM_NSHARED_WB_WA 		0x0000000BU 	/*Outer and Inner write-back non shared*/
-#define NORM_SHARED_WB_WA 		0x0000000FU 	/*Outer and Inner write-back shared*/
+#define NORM_NSHARED_WB_WA      0x0000000BU     /*Outer and Inner write-back non shared*/
+#define NORM_SHARED_WB_WA       0x0000000FU     /*Outer and Inner write-back shared*/
 
 /* inner and outer cache policies can be combined for different combinations */
 
-#define NORM_IN_POLICY_NCACHE	0x00000020U	/*inner non cacheable*/
-#define NORM_IN_POLICY_WB_WA	0x00000021U	/*inner write back write allocate*/
-#define NORM_IN_POLICY_WT_NWA	0x00000022U	/*inner write through no write allocate*/
-#define NORM_IN_POLICY_WB_NWA	0x00000023U	/*inner write back no write allocate*/
+#define NORM_IN_POLICY_NCACHE   0x00000020U /*inner non cacheable*/
+#define NORM_IN_POLICY_WB_WA    0x00000021U /*inner write back write allocate*/
+#define NORM_IN_POLICY_WT_NWA   0x00000022U /*inner write through no write allocate*/
+#define NORM_IN_POLICY_WB_NWA   0x00000023U /*inner write back no write allocate*/
 
-#define NORM_OUT_POLICY_NCACHE	0x00000020U	/*outer non cacheable*/
-#define NORM_OUT_POLICY_WB_WA	0x00000028U	/*outer write back write allocate*/
-#define NORM_OUT_POLICY_WT_NWA	0x00000030U	/*outer write through no write allocate*/
-#define NORM_OUT_POLICY_WB_NWA	0x00000038U	/*outer write back no write allocate*/
+#define NORM_OUT_POLICY_NCACHE  0x00000020U /*outer non cacheable*/
+#define NORM_OUT_POLICY_WB_WA   0x00000028U /*outer write back write allocate*/
+#define NORM_OUT_POLICY_WT_NWA  0x00000030U /*outer write through no write allocate*/
+#define NORM_OUT_POLICY_WB_NWA  0x00000038U /*outer write back no write allocate*/
 
-#define NO_ACCESS				(0x00000000U<<8U)	/*No access*/
-#define PRIV_RW_USER_NA			(0x00000001U<<8U) /*Privileged access only*/
-#define PRIV_RW_USER_RO			(0x00000002U<<8U) /*Writes in User mode generate permission faults*/
-#define	PRIV_RW_USER_RW			(0x00000003U<<8U)	/*Full Access*/
-#define PRIV_RO_USER_NA			(0x00000005U<<8U) /*Privileged eead only*/
-#define PRIV_RO_USER_RO			(0x00000006U<<8U) /*Privileged/User read-only*/
+#define NO_ACCESS               (0x00000000U<<8U)   /*No access*/
+#define PRIV_RW_USER_NA         (0x00000001U<<8U) /*Privileged access only*/
+#define PRIV_RW_USER_RO         (0x00000002U<<8U) /*Writes in User mode generate permission faults*/
+#define PRIV_RW_USER_RW         (0x00000003U<<8U)   /*Full Access*/
+#define PRIV_RO_USER_NA         (0x00000005U<<8U) /*Privileged eead only*/
+#define PRIV_RO_USER_RO         (0x00000006U<<8U) /*Privileged/User read-only*/
 
-#define EXECUTE_NEVER  			(0x00000001U<<12U)  /* Bit 12*/
+#define EXECUTE_NEVER           (0x00000001U<<12U)  /* Bit 12*/
 
 
 /* CP15 defines */
 
 /* C0 Register defines */
-#define XREG_CP15_MAIN_ID			"p15, 0, %0,  c0,  c0, 0"
-#define XREG_CP15_CACHE_TYPE			"p15, 0, %0,  c0,  c0, 1"
-#define XREG_CP15_TCM_TYPE			"p15, 0, %0,  c0,  c0, 2"
-#define XREG_CP15_TLB_TYPE			"p15, 0, %0,  c0,  c0, 3"
-#define XREG_CP15_MPU_TYPE			"p15, 0, %0,  c0,  c0, 4"
-#define XREG_CP15_MULTI_PROC_AFFINITY		"p15, 0, %0,  c0,  c0, 5"
+#define XREG_CP15_MAIN_ID           "p15, 0, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_TYPE            "p15, 0, %0,  c0,  c0, 1"
+#define XREG_CP15_TCM_TYPE          "p15, 0, %0,  c0,  c0, 2"
+#define XREG_CP15_TLB_TYPE          "p15, 0, %0,  c0,  c0, 3"
+#define XREG_CP15_MPU_TYPE          "p15, 0, %0,  c0,  c0, 4"
+#define XREG_CP15_MULTI_PROC_AFFINITY       "p15, 0, %0,  c0,  c0, 5"
 
-#define XREG_CP15_PROC_FEATURE_0		"p15, 0, %0,  c0,  c1, 0"
-#define XREG_CP15_PROC_FEATURE_1		"p15, 0, %0,  c0,  c1, 1"
-#define XREG_CP15_DEBUG_FEATURE_0		"p15, 0, %0,  c0,  c1, 2"
-#define XREG_CP15_MEMORY_FEATURE_0		"p15, 0, %0,  c0,  c1, 4"
-#define XREG_CP15_MEMORY_FEATURE_1		"p15, 0, %0,  c0,  c1, 5"
-#define XREG_CP15_MEMORY_FEATURE_2		"p15, 0, %0,  c0,  c1, 6"
-#define XREG_CP15_MEMORY_FEATURE_3		"p15, 0, %0,  c0,  c1, 7"
+#define XREG_CP15_PROC_FEATURE_0        "p15, 0, %0,  c0,  c1, 0"
+#define XREG_CP15_PROC_FEATURE_1        "p15, 0, %0,  c0,  c1, 1"
+#define XREG_CP15_DEBUG_FEATURE_0       "p15, 0, %0,  c0,  c1, 2"
+#define XREG_CP15_MEMORY_FEATURE_0      "p15, 0, %0,  c0,  c1, 4"
+#define XREG_CP15_MEMORY_FEATURE_1      "p15, 0, %0,  c0,  c1, 5"
+#define XREG_CP15_MEMORY_FEATURE_2      "p15, 0, %0,  c0,  c1, 6"
+#define XREG_CP15_MEMORY_FEATURE_3      "p15, 0, %0,  c0,  c1, 7"
 
-#define XREG_CP15_INST_FEATURE_0		"p15, 0, %0,  c0,  c2, 0"
-#define XREG_CP15_INST_FEATURE_1		"p15, 0, %0,  c0,  c2, 1"
-#define XREG_CP15_INST_FEATURE_2		"p15, 0, %0,  c0,  c2, 2"
-#define XREG_CP15_INST_FEATURE_3		"p15, 0, %0,  c0,  c2, 3"
-#define XREG_CP15_INST_FEATURE_4		"p15, 0, %0,  c0,  c2, 4"
-#define XREG_CP15_INST_FEATURE_5		"p15, 0, %0,  c0,  c2, 5"
+#define XREG_CP15_INST_FEATURE_0        "p15, 0, %0,  c0,  c2, 0"
+#define XREG_CP15_INST_FEATURE_1        "p15, 0, %0,  c0,  c2, 1"
+#define XREG_CP15_INST_FEATURE_2        "p15, 0, %0,  c0,  c2, 2"
+#define XREG_CP15_INST_FEATURE_3        "p15, 0, %0,  c0,  c2, 3"
+#define XREG_CP15_INST_FEATURE_4        "p15, 0, %0,  c0,  c2, 4"
+#define XREG_CP15_INST_FEATURE_5        "p15, 0, %0,  c0,  c2, 5"
 
-#define XREG_CP15_CACHE_SIZE_ID			"p15, 1, %0,  c0,  c0, 0"
-#define XREG_CP15_CACHE_LEVEL_ID		"p15, 1, %0,  c0,  c0, 1"
-#define XREG_CP15_AUXILARY_ID			"p15, 1, %0,  c0,  c0, 7"
+#define XREG_CP15_CACHE_SIZE_ID         "p15, 1, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_LEVEL_ID        "p15, 1, %0,  c0,  c0, 1"
+#define XREG_CP15_AUXILARY_ID           "p15, 1, %0,  c0,  c0, 7"
 
-#define XREG_CP15_CACHE_SIZE_SEL		"p15, 2, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_SIZE_SEL        "p15, 2, %0,  c0,  c0, 0"
 
 /* C1 Register Defines */
-#define XREG_CP15_SYS_CONTROL			"p15, 0, %0,  c1,  c0, 0"
-#define XREG_CP15_AUX_CONTROL			"p15, 0, %0,  c1,  c0, 1"
-#define XREG_CP15_CP_ACCESS_CONTROL		"p15, 0, %0,  c1,  c0, 2"
+#define XREG_CP15_SYS_CONTROL           "p15, 0, %0,  c1,  c0, 0"
+#define XREG_CP15_AUX_CONTROL           "p15, 0, %0,  c1,  c0, 1"
+#define XREG_CP15_CP_ACCESS_CONTROL     "p15, 0, %0,  c1,  c0, 2"
 
 
 /* XREG_CP15_CONTROL bit defines */
-#define XREG_CP15_CONTROL_TE_BIT		0x40000000U
-#define XREG_CP15_CONTROL_AFE_BIT		0x20000000U
-#define XREG_CP15_CONTROL_TRE_BIT		0x10000000U
-#define XREG_CP15_CONTROL_NMFI_BIT		0x08000000U
-#define XREG_CP15_CONTROL_EE_BIT		0x02000000U
-#define XREG_CP15_CONTROL_HA_BIT		0x00020000U
-#define XREG_CP15_CONTROL_RR_BIT		0x00004000U
-#define XREG_CP15_CONTROL_V_BIT			0x00002000U
-#define XREG_CP15_CONTROL_I_BIT			0x00001000U
-#define XREG_CP15_CONTROL_Z_BIT			0x00000800U
-#define XREG_CP15_CONTROL_SW_BIT		0x00000400U
-#define XREG_CP15_CONTROL_B_BIT			0x00000080U
-#define XREG_CP15_CONTROL_C_BIT			0x00000004U
-#define XREG_CP15_CONTROL_A_BIT			0x00000002U
-#define XREG_CP15_CONTROL_M_BIT			0x00000001U
+#define XREG_CP15_CONTROL_TE_BIT        0x40000000U
+#define XREG_CP15_CONTROL_AFE_BIT       0x20000000U
+#define XREG_CP15_CONTROL_TRE_BIT       0x10000000U
+#define XREG_CP15_CONTROL_NMFI_BIT      0x08000000U
+#define XREG_CP15_CONTROL_EE_BIT        0x02000000U
+#define XREG_CP15_CONTROL_HA_BIT        0x00020000U
+#define XREG_CP15_CONTROL_RR_BIT        0x00004000U
+#define XREG_CP15_CONTROL_V_BIT         0x00002000U
+#define XREG_CP15_CONTROL_I_BIT         0x00001000U
+#define XREG_CP15_CONTROL_Z_BIT         0x00000800U
+#define XREG_CP15_CONTROL_SW_BIT        0x00000400U
+#define XREG_CP15_CONTROL_B_BIT         0x00000080U
+#define XREG_CP15_CONTROL_C_BIT         0x00000004U
+#define XREG_CP15_CONTROL_A_BIT         0x00000002U
+#define XREG_CP15_CONTROL_M_BIT         0x00000001U
 /* C2 Register Defines */
 /* Not Used */
 
@@ -241,55 +241,55 @@ extern "C" {
 /* Not Used */
 
 /* C5 Register Defines */
-#define XREG_CP15_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 0"
-#define XREG_CP15_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 1"
+#define XREG_CP15_DATA_FAULT_STATUS     "p15, 0, %0,  c5,  c0, 0"
+#define XREG_CP15_INST_FAULT_STATUS     "p15, 0, %0,  c5,  c0, 1"
 
-#define XREG_CP15_AUX_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 0"
-#define XREG_CP15_AUX_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 1"
+#define XREG_CP15_AUX_DATA_FAULT_STATUS     "p15, 0, %0,  c5,  c1, 0"
+#define XREG_CP15_AUX_INST_FAULT_STATUS     "p15, 0, %0,  c5,  c1, 1"
 
 /* C6 Register Defines */
-#define XREG_CP15_DATA_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 0"
-#define XREG_CP15_INST_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 2"
+#define XREG_CP15_DATA_FAULT_ADDRESS        "p15, 0, %0,  c6,  c0, 0"
+#define XREG_CP15_INST_FAULT_ADDRESS        "p15, 0, %0,  c6,  c0, 2"
 
-#define XREG_CP15_MPU_REG_BASEADDR			"p15, 0, %0,  c6,  c1, 0"
-#define XREG_CP15_MPU_REG_SIZE_EN			"p15, 0, %0,  c6,  c1, 2"
-#define XREG_CP15_MPU_REG_ACCESS_CTRL		"p15, 0, %0,  c6,  c1, 4"
+#define XREG_CP15_MPU_REG_BASEADDR          "p15, 0, %0,  c6,  c1, 0"
+#define XREG_CP15_MPU_REG_SIZE_EN           "p15, 0, %0,  c6,  c1, 2"
+#define XREG_CP15_MPU_REG_ACCESS_CTRL       "p15, 0, %0,  c6,  c1, 4"
 
-#define XREG_CP15_MPU_MEMORY_REG_NUMBER			"p15, 0, %0,  c6,  c2, 0"
+#define XREG_CP15_MPU_MEMORY_REG_NUMBER         "p15, 0, %0,  c6,  c2, 0"
 
 /* C7 Register Defines */
-#define XREG_CP15_NOP				"p15, 0, %0,  c7,  c0, 4"
+#define XREG_CP15_NOP               "p15, 0, %0,  c7,  c0, 4"
 
-#define XREG_CP15_INVAL_IC_POU			"p15, 0, %0,  c7,  c5, 0"
-#define XREG_CP15_INVAL_IC_LINE_MVA_POU		"p15, 0, %0,  c7,  c5, 1"
+#define XREG_CP15_INVAL_IC_POU          "p15, 0, %0,  c7,  c5, 0"
+#define XREG_CP15_INVAL_IC_LINE_MVA_POU     "p15, 0, %0,  c7,  c5, 1"
 
 /* The CP15 register access below has been deprecated in favor of the new
  * isb instruction in Cortex R5.
  */
-#define XREG_CP15_INST_SYNC_BARRIER		"p15, 0, %0,  c7,  c5, 4"
-#define XREG_CP15_INVAL_BRANCH_ARRAY		"p15, 0, %0,  c7,  c5, 6"
-#define XREG_CP15_INVAL_BRANCH_ARRAY_LINE		"p15, 0, %0,  c7,  c5, 7"
+#define XREG_CP15_INST_SYNC_BARRIER     "p15, 0, %0,  c7,  c5, 4"
+#define XREG_CP15_INVAL_BRANCH_ARRAY        "p15, 0, %0,  c7,  c5, 6"
+#define XREG_CP15_INVAL_BRANCH_ARRAY_LINE       "p15, 0, %0,  c7,  c5, 7"
 
-#define XREG_CP15_INVAL_DC_LINE_MVA_POC		"p15, 0, %0,  c7,  c6, 1"
-#define XREG_CP15_INVAL_DC_LINE_SW		"p15, 0, %0,  c7,  c6, 2"
+#define XREG_CP15_INVAL_DC_LINE_MVA_POC     "p15, 0, %0,  c7,  c6, 1"
+#define XREG_CP15_INVAL_DC_LINE_SW      "p15, 0, %0,  c7,  c6, 2"
 
 
-#define XREG_CP15_CLEAN_DC_LINE_MVA_POC		"p15, 0, %0,  c7, c10, 1"
-#define XREG_CP15_CLEAN_DC_LINE_SW		"p15, 0, %0,  c7, c10, 2"
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POC     "p15, 0, %0,  c7, c10, 1"
+#define XREG_CP15_CLEAN_DC_LINE_SW      "p15, 0, %0,  c7, c10, 2"
 
-#define XREG_CP15_INVAL_DC_ALL		"p15, 0, %0,  c15, c5, 0"
+#define XREG_CP15_INVAL_DC_ALL      "p15, 0, %0,  c15, c5, 0"
 /* The next two CP15 register accesses below have been deprecated in favor
  * of the new dsb and dmb instructions in Cortex R5.
  */
-#define XREG_CP15_DATA_SYNC_BARRIER		"p15, 0, %0,  c7, c10, 4"
-#define XREG_CP15_DATA_MEMORY_BARRIER		"p15, 0, %0,  c7, c10, 5"
+#define XREG_CP15_DATA_SYNC_BARRIER     "p15, 0, %0,  c7, c10, 4"
+#define XREG_CP15_DATA_MEMORY_BARRIER       "p15, 0, %0,  c7, c10, 5"
 
-#define XREG_CP15_CLEAN_DC_LINE_MVA_POU		"p15, 0, %0,  c7, c11, 1"
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POU     "p15, 0, %0,  c7, c11, 1"
 
-#define XREG_CP15_NOP2				"p15, 0, %0,  c7, c13, 1"
+#define XREG_CP15_NOP2              "p15, 0, %0,  c7, c13, 1"
 
-#define XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC	"p15, 0, %0,  c7, c14, 1"
-#define XREG_CP15_CLEAN_INVAL_DC_LINE_SW	"p15, 0, %0,  c7, c14, 2"
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC   "p15, 0, %0,  c7, c14, 1"
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_SW    "p15, 0, %0,  c7, c14, 2"
 
 /* C8 Register Defines */
 /* Not Used */
@@ -297,24 +297,24 @@ extern "C" {
 
 /* C9 Register Defines */
 
-#define XREG_CP15_ATCM_REG_SIZE_ADDR		"p15, 0, %0,  c9, c1, 1"
-#define XREG_CP15_BTCM_REG_SIZE_ADDR		"p15, 0, %0,  c9, c1, 0"
-#define XREG_CP15_TCM_SELECTION				"p15, 0, %0,  c9, c2, 0"
+#define XREG_CP15_ATCM_REG_SIZE_ADDR        "p15, 0, %0,  c9, c1, 1"
+#define XREG_CP15_BTCM_REG_SIZE_ADDR        "p15, 0, %0,  c9, c1, 0"
+#define XREG_CP15_TCM_SELECTION             "p15, 0, %0,  c9, c2, 0"
 
-#define XREG_CP15_PERF_MONITOR_CTRL		"p15, 0, %0,  c9, c12, 0"
-#define XREG_CP15_COUNT_ENABLE_SET		"p15, 0, %0,  c9, c12, 1"
-#define XREG_CP15_COUNT_ENABLE_CLR		"p15, 0, %0,  c9, c12, 2"
-#define XREG_CP15_V_FLAG_STATUS			"p15, 0, %0,  c9, c12, 3"
-#define XREG_CP15_SW_INC			"p15, 0, %0,  c9, c12, 4"
-#define XREG_CP15_EVENT_CNTR_SEL		"p15, 0, %0,  c9, c12, 5"
+#define XREG_CP15_PERF_MONITOR_CTRL     "p15, 0, %0,  c9, c12, 0"
+#define XREG_CP15_COUNT_ENABLE_SET      "p15, 0, %0,  c9, c12, 1"
+#define XREG_CP15_COUNT_ENABLE_CLR      "p15, 0, %0,  c9, c12, 2"
+#define XREG_CP15_V_FLAG_STATUS         "p15, 0, %0,  c9, c12, 3"
+#define XREG_CP15_SW_INC            "p15, 0, %0,  c9, c12, 4"
+#define XREG_CP15_EVENT_CNTR_SEL        "p15, 0, %0,  c9, c12, 5"
 
-#define XREG_CP15_PERF_CYCLE_COUNTER		"p15, 0, %0,  c9, c13, 0"
-#define XREG_CP15_EVENT_TYPE_SEL		"p15, 0, %0,  c9, c13, 1"
-#define XREG_CP15_PERF_MONITOR_COUNT		"p15, 0, %0,  c9, c13, 2"
+#define XREG_CP15_PERF_CYCLE_COUNTER        "p15, 0, %0,  c9, c13, 0"
+#define XREG_CP15_EVENT_TYPE_SEL        "p15, 0, %0,  c9, c13, 1"
+#define XREG_CP15_PERF_MONITOR_COUNT        "p15, 0, %0,  c9, c13, 2"
 
-#define XREG_CP15_USER_ENABLE			"p15, 0, %0,  c9, c14, 0"
-#define XREG_CP15_INTR_ENABLE_SET		"p15, 0, %0,  c9, c14, 1"
-#define XREG_CP15_INTR_ENABLE_CLR		"p15, 0, %0,  c9, c14, 2"
+#define XREG_CP15_USER_ENABLE           "p15, 0, %0,  c9, c14, 0"
+#define XREG_CP15_INTR_ENABLE_SET       "p15, 0, %0,  c9, c14, 1"
+#define XREG_CP15_INTR_ENABLE_CLR       "p15, 0, %0,  c9, c14, 2"
 
 /* C10 Register Defines */
 /* Not used */
@@ -326,90 +326,90 @@ extern "C" {
 /* Not used */
 
 /* C13 Register Defines */
-#define XREG_CP15_CONTEXT_ID			"p15, 0, %0, c13,  c0, 1"
-#define USER_RW_THREAD_PID			"p15, 0, %0, c13,  c0, 2"
-#define USER_RO_THREAD_PID			"p15, 0, %0, c13,  c0, 3"
-#define USER_PRIV_THREAD_PID			"p15, 0, %0, c13,  c0, 4"
+#define XREG_CP15_CONTEXT_ID            "p15, 0, %0, c13,  c0, 1"
+#define USER_RW_THREAD_PID          "p15, 0, %0, c13,  c0, 2"
+#define USER_RO_THREAD_PID          "p15, 0, %0, c13,  c0, 3"
+#define USER_PRIV_THREAD_PID            "p15, 0, %0, c13,  c0, 4"
 
 /* C14 Register Defines */
 /* not used */
 
 /* C15 Register Defines */
-#define XREG_CP15_SEC_AUX_CTRL			"p15, 0, %0, c15,  c0, 0"
+#define XREG_CP15_SEC_AUX_CTRL          "p15, 0, %0, c15,  c0, 0"
 
 
 
 
 /* MPE register definitions */
-#define XREG_FPSID				c0
-#define XREG_FPSCR				c1
-#define XREG_MVFR1				c6
-#define XREG_MVFR0				c7
-#define XREG_FPEXC				c8
-#define XREG_FPINST				c9
-#define XREG_FPINST2			c10
+#define XREG_FPSID              c0
+#define XREG_FPSCR              c1
+#define XREG_MVFR1              c6
+#define XREG_MVFR0              c7
+#define XREG_FPEXC              c8
+#define XREG_FPINST             c9
+#define XREG_FPINST2            c10
 
 /* FPSID bits */
-#define XREG_FPSID_IMPLEMENTER_BIT	(24U)
-#define XREG_FPSID_IMPLEMENTER_MASK	(0x000000FFU << FPSID_IMPLEMENTER_BIT)
-#define XREG_FPSID_SOFTWARE		(0X00000001U << 23U)
-#define XREG_FPSID_ARCH_BIT		(16U)
-#define XREG_FPSID_ARCH_MASK		(0x0000000FU  << FPSID_ARCH_BIT)
-#define XREG_FPSID_PART_BIT		(8U)
-#define XREG_FPSID_PART_MASK		(0x000000FFU << FPSID_PART_BIT)
-#define XREG_FPSID_VARIANT_BIT		(4U)
-#define XREG_FPSID_VARIANT_MASK		(0x0000000FU  << FPSID_VARIANT_BIT)
-#define XREG_FPSID_REV_BIT		(0U)
-#define XREG_FPSID_REV_MASK		(0x0000000FU  << FPSID_REV_BIT)
+#define XREG_FPSID_IMPLEMENTER_BIT  (24U)
+#define XREG_FPSID_IMPLEMENTER_MASK (0x000000FFU << FPSID_IMPLEMENTER_BIT)
+#define XREG_FPSID_SOFTWARE     (0X00000001U << 23U)
+#define XREG_FPSID_ARCH_BIT     (16U)
+#define XREG_FPSID_ARCH_MASK        (0x0000000FU  << FPSID_ARCH_BIT)
+#define XREG_FPSID_PART_BIT     (8U)
+#define XREG_FPSID_PART_MASK        (0x000000FFU << FPSID_PART_BIT)
+#define XREG_FPSID_VARIANT_BIT      (4U)
+#define XREG_FPSID_VARIANT_MASK     (0x0000000FU  << FPSID_VARIANT_BIT)
+#define XREG_FPSID_REV_BIT      (0U)
+#define XREG_FPSID_REV_MASK     (0x0000000FU  << FPSID_REV_BIT)
 
 /* FPSCR bits */
-#define XREG_FPSCR_N_BIT		(0X00000001U << 31U)
-#define XREG_FPSCR_Z_BIT		(0X00000001U << 30U)
-#define XREG_FPSCR_C_BIT		(0X00000001U << 29U)
-#define XREG_FPSCR_V_BIT		(0X00000001U << 28U)
-#define XREG_FPSCR_QC			(0X00000001U << 27U)
-#define XREG_FPSCR_AHP			(0X00000001U << 26U)
-#define XREG_FPSCR_DEFAULT_NAN		(0X00000001U << 25U)
-#define XREG_FPSCR_FLUSHTOZERO		(0X00000001U << 24U)
-#define XREG_FPSCR_ROUND_NEAREST	(0X00000000U << 22U)
-#define XREG_FPSCR_ROUND_PLUSINF	(0X00000001U << 22U)
-#define XREG_FPSCR_ROUND_MINUSINF	(0X00000002U << 22U)
-#define XREG_FPSCR_ROUND_TOZERO		(0X00000003U << 22U)
-#define XREG_FPSCR_RMODE_BIT		(22U)
-#define XREG_FPSCR_RMODE_MASK		(0X00000003U << FPSCR_RMODE_BIT)
-#define XREG_FPSCR_STRIDE_BIT		(20U)
-#define XREG_FPSCR_STRIDE_MASK		(0X00000003U << FPSCR_STRIDE_BIT)
-#define XREG_FPSCR_LENGTH_BIT		(16U)
-#define XREG_FPSCR_LENGTH_MASK		(0X00000007U << FPSCR_LENGTH_BIT)
-#define XREG_FPSCR_IDC			(0X00000001U << 7U)
-#define XREG_FPSCR_IXC			(0X00000001U << 4U)
-#define XREG_FPSCR_UFC			(0X00000001U << 3U)
-#define XREG_FPSCR_OFC			(0X00000001U << 2U)
-#define XREG_FPSCR_DZC			(0X00000001U << 1U)
-#define XREG_FPSCR_IOC			(0X00000001U << 0U)
+#define XREG_FPSCR_N_BIT        (0X00000001U << 31U)
+#define XREG_FPSCR_Z_BIT        (0X00000001U << 30U)
+#define XREG_FPSCR_C_BIT        (0X00000001U << 29U)
+#define XREG_FPSCR_V_BIT        (0X00000001U << 28U)
+#define XREG_FPSCR_QC           (0X00000001U << 27U)
+#define XREG_FPSCR_AHP          (0X00000001U << 26U)
+#define XREG_FPSCR_DEFAULT_NAN      (0X00000001U << 25U)
+#define XREG_FPSCR_FLUSHTOZERO      (0X00000001U << 24U)
+#define XREG_FPSCR_ROUND_NEAREST    (0X00000000U << 22U)
+#define XREG_FPSCR_ROUND_PLUSINF    (0X00000001U << 22U)
+#define XREG_FPSCR_ROUND_MINUSINF   (0X00000002U << 22U)
+#define XREG_FPSCR_ROUND_TOZERO     (0X00000003U << 22U)
+#define XREG_FPSCR_RMODE_BIT        (22U)
+#define XREG_FPSCR_RMODE_MASK       (0X00000003U << FPSCR_RMODE_BIT)
+#define XREG_FPSCR_STRIDE_BIT       (20U)
+#define XREG_FPSCR_STRIDE_MASK      (0X00000003U << FPSCR_STRIDE_BIT)
+#define XREG_FPSCR_LENGTH_BIT       (16U)
+#define XREG_FPSCR_LENGTH_MASK      (0X00000007U << FPSCR_LENGTH_BIT)
+#define XREG_FPSCR_IDC          (0X00000001U << 7U)
+#define XREG_FPSCR_IXC          (0X00000001U << 4U)
+#define XREG_FPSCR_UFC          (0X00000001U << 3U)
+#define XREG_FPSCR_OFC          (0X00000001U << 2U)
+#define XREG_FPSCR_DZC          (0X00000001U << 1U)
+#define XREG_FPSCR_IOC          (0X00000001U << 0U)
 
 /* MVFR0 bits */
-#define XREG_MVFR0_RMODE_BIT		(28U)
-#define XREG_MVFR0_RMODE_MASK		(0x0000000FU << XREG_MVFR0_RMODE_BIT)
-#define XREG_MVFR0_SHORT_VEC_BIT	(24U)
-#define XREG_MVFR0_SHORT_VEC_MASK	(0x0000000FU << XREG_MVFR0_SHORT_VEC_BIT)
-#define XREG_MVFR0_SQRT_BIT		(20U)
-#define XREG_MVFR0_SQRT_MASK		(0x0000000FU << XREG_MVFR0_SQRT_BIT)
-#define XREG_MVFR0_DIVIDE_BIT		(16U)
-#define XREG_MVFR0_DIVIDE_MASK		(0x0000000FU << XREG_MVFR0_DIVIDE_BIT)
-#define XREG_MVFR0_EXEC_TRAP_BIT	(12U)
-#define XREG_MVFR0_EXEC_TRAP_MASK	(0x0000000FU << XREG_MVFR0_EXEC_TRAP_BIT)
-#define XREG_MVFR0_DP_BIT		(8U)
-#define XREG_MVFR0_DP_MASK		(0x0000000FU << XREG_MVFR0_DP_BIT)
-#define XREG_MVFR0_SP_BIT		(4U)
-#define XREG_MVFR0_SP_MASK		(0x0000000FU << XREG_MVFR0_SP_BIT)
-#define XREG_MVFR0_A_SIMD_BIT		(0U)
-#define XREG_MVFR0_A_SIMD_MASK		(0x0000000FU << MVFR0_A_SIMD_BIT)
+#define XREG_MVFR0_RMODE_BIT        (28U)
+#define XREG_MVFR0_RMODE_MASK       (0x0000000FU << XREG_MVFR0_RMODE_BIT)
+#define XREG_MVFR0_SHORT_VEC_BIT    (24U)
+#define XREG_MVFR0_SHORT_VEC_MASK   (0x0000000FU << XREG_MVFR0_SHORT_VEC_BIT)
+#define XREG_MVFR0_SQRT_BIT     (20U)
+#define XREG_MVFR0_SQRT_MASK        (0x0000000FU << XREG_MVFR0_SQRT_BIT)
+#define XREG_MVFR0_DIVIDE_BIT       (16U)
+#define XREG_MVFR0_DIVIDE_MASK      (0x0000000FU << XREG_MVFR0_DIVIDE_BIT)
+#define XREG_MVFR0_EXEC_TRAP_BIT    (12U)
+#define XREG_MVFR0_EXEC_TRAP_MASK   (0x0000000FU << XREG_MVFR0_EXEC_TRAP_BIT)
+#define XREG_MVFR0_DP_BIT       (8U)
+#define XREG_MVFR0_DP_MASK      (0x0000000FU << XREG_MVFR0_DP_BIT)
+#define XREG_MVFR0_SP_BIT       (4U)
+#define XREG_MVFR0_SP_MASK      (0x0000000FU << XREG_MVFR0_SP_BIT)
+#define XREG_MVFR0_A_SIMD_BIT       (0U)
+#define XREG_MVFR0_A_SIMD_MASK      (0x0000000FU << MVFR0_A_SIMD_BIT)
 
 /* FPEXC bits */
-#define XREG_FPEXC_EX			(0X00000001U << 31U)
-#define XREG_FPEXC_EN			(0X00000001U << 30U)
-#define XREG_FPEXC_DEX			(0X00000001U << 29U)
+#define XREG_FPEXC_EX           (0X00000001U << 31U)
+#define XREG_FPEXC_EN           (0X00000001U << 30U)
+#define XREG_FPEXC_DEX          (0X00000001U << 29U)
 
 
 #ifdef __cplusplus
diff --git a/libcpu/avr32/uc3/cpu.c b/libcpu/avr32/uc3/cpu.c
index fdd8a4d56c..1d4ea5adfa 100644
--- a/libcpu/avr32/uc3/cpu.c
+++ b/libcpu/avr32/uc3/cpu.c
@@ -25,7 +25,7 @@
  */
 RT_WEAK void rt_hw_cpu_reset()
 {
-	/*NOTREACHED*/
+    /*NOTREACHED*/
 }
 
 /**
@@ -34,9 +34,9 @@ RT_WEAK void rt_hw_cpu_reset()
  */
 void rt_hw_cpu_shutdown()
 {
-	rt_kprintf("shutdown...\n");
+    rt_kprintf("shutdown...\n");
 
-	RT_ASSERT(0);
+    RT_ASSERT(0);
 }
 
 /*@}*/
diff --git a/libcpu/avr32/uc3/serial.c b/libcpu/avr32/uc3/serial.c
index 14ef865448..66fb6ca8b9 100644
--- a/libcpu/avr32/uc3/serial.c
+++ b/libcpu/avr32/uc3/serial.c
@@ -24,8 +24,8 @@ struct rt_device _rt_usart_device;
 struct avr32_serial_int_rx _rt_usart_rx;
 struct avr32_serial_device uart =
 {
-	.uart_device = (avr32_usart_t *) &AVR32_USART1,
-	.int_rx = &_rt_usart_rx
+    .uart_device = (avr32_usart_t *) &AVR32_USART1,
+    .int_rx = &_rt_usart_rx
 };
 
 /**
@@ -36,163 +36,163 @@ struct avr32_serial_device uart =
 /* RT-Thread Device Interface */
 static rt_err_t rt_serial_init (rt_device_t dev)
 {
-	struct avr32_serial_device* uart = (struct avr32_serial_device*) dev->user_data;
+    struct avr32_serial_device* uart = (struct avr32_serial_device*) dev->user_data;
 
-	if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
-	{
-		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			rt_memset(uart->int_rx->rx_buffer, 0, sizeof(uart->int_rx->rx_buffer));
-			uart->int_rx->read_index = 0;
-			uart->int_rx->save_index = 0;
-		}
+    if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
+    {
+        if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            rt_memset(uart->int_rx->rx_buffer, 0, sizeof(uart->int_rx->rx_buffer));
+            uart->int_rx->read_index = 0;
+            uart->int_rx->save_index = 0;
+        }
 
-		dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
-	}
+        dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_close(rt_device_t dev)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct avr32_serial_device* uart;
+    rt_uint8_t* ptr;
+    rt_err_t err_code;
+    struct avr32_serial_device* uart;
 
-	ptr = buffer;
-	err_code = RT_EOK;
-	uart = (struct avr32_serial_device*)dev->user_data;
+    ptr = buffer;
+    err_code = RT_EOK;
+    uart = (struct avr32_serial_device*)dev->user_data;
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		/* interrupt mode Rx */
-		while (size)
-		{
-			rt_base_t level;
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        /* interrupt mode Rx */
+        while (size)
+        {
+            rt_base_t level;
 
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
+            /* disable interrupt */
+            level = rt_hw_interrupt_disable();
 
-			if (uart->int_rx->read_index != uart->int_rx->save_index)
-			{
-				/* read a character */
-				*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
-				size--;
+            if (uart->int_rx->read_index != uart->int_rx->save_index)
+            {
+                /* read a character */
+                *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
+                size--;
 
-				/* move to next position */
-				uart->int_rx->read_index ++;
-				if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-					uart->int_rx->read_index = 0;
-			}
-			else
-			{
-				/* set error code */
-				err_code = -RT_EEMPTY;
+                /* move to next position */
+                uart->int_rx->read_index ++;
+                if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+                    uart->int_rx->read_index = 0;
+            }
+            else
+            {
+                /* set error code */
+                err_code = -RT_EEMPTY;
 
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-				break;
-			}
+                /* enable interrupt */
+                rt_hw_interrupt_enable(level);
+                break;
+            }
 
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
-		}
-	}
-	else
-	{
-		/* polling mode */
-		while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
-		{
-			while (usart_test_hit(uart->uart_device))
-			{
-				*ptr = uart->uart_device->rhr & 0xff;
-				ptr ++;
-			}
-		}
-	}
+            /* enable interrupt */
+            rt_hw_interrupt_enable(level);
+        }
+    }
+    else
+    {
+        /* polling mode */
+        while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
+        {
+            while (usart_test_hit(uart->uart_device))
+            {
+                *ptr = uart->uart_device->rhr & 0xff;
+                ptr ++;
+            }
+        }
+    }
 
-	/* set error code */
-	rt_set_errno(err_code);
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+    /* set error code */
+    rt_set_errno(err_code);
+    return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
 }
 
 static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct avr32_serial_device* uart;
+    rt_uint8_t* ptr;
+    rt_err_t err_code;
+    struct avr32_serial_device* uart;
 
-	err_code = RT_EOK;
-	ptr = (rt_uint8_t*)buffer;
-	uart = (struct avr32_serial_device*)dev->user_data;
+    err_code = RT_EOK;
+    ptr = (rt_uint8_t*)buffer;
+    uart = (struct avr32_serial_device*)dev->user_data;
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_TX)
-	{
-		/* interrupt mode Tx, does not support */
-		RT_ASSERT(0);
-	}
-	else
-	{
-		/* polling mode */
-		if (dev->flag & RT_DEVICE_FLAG_STREAM)
-		{
-			/* stream mode */
-			while (size)
-			{
-				usart_putchar(uart->uart_device, (int) *ptr);
+    if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+    {
+        /* interrupt mode Tx, does not support */
+        RT_ASSERT(0);
+    }
+    else
+    {
+        /* polling mode */
+        if (dev->flag & RT_DEVICE_FLAG_STREAM)
+        {
+            /* stream mode */
+            while (size)
+            {
+                usart_putchar(uart->uart_device, (int) *ptr);
 
-				++ptr; --size;
-			}
-		}
-		else
-		{
-			/* write data directly */
-			while (size)
-			{
-				usart_bw_write_char(uart->uart_device, (int) *ptr);
+                ++ptr; --size;
+            }
+        }
+        else
+        {
+            /* write data directly */
+            while (size)
+            {
+                usart_bw_write_char(uart->uart_device, (int) *ptr);
 
-				++ptr; --size;
-			}
-		}
-	}
+                ++ptr; --size;
+            }
+        }
+    }
 
-	/* set error code */
-	rt_set_errno(err_code);
+    /* set error code */
+    rt_set_errno(err_code);
 
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+    return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
 }
 
 static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
 {
-	struct avr32_serial_device* uart;
+    struct avr32_serial_device* uart;
 
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	uart = (struct avr32_serial_device*)dev->user_data;
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		break;
+    uart = (struct avr32_serial_device*)dev->user_data;
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        break;
 
-	case RT_DEVICE_CTRL_RESUME:
-		/* resume device */
-		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
-		break;
-	}
+    case RT_DEVICE_CTRL_RESUME:
+        /* resume device */
+        dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+        break;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /*
@@ -201,77 +201,77 @@ static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
  */
 rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct avr32_serial_device *serial)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
-		(flag & RT_DEVICE_FLAG_INT_TX))
-	{
-		RT_ASSERT(0);
-	}
+    if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
+        (flag & RT_DEVICE_FLAG_INT_TX))
+    {
+        RT_ASSERT(0);
+    }
 
-	device->type 		= RT_Device_Class_Char;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_serial_init;
-	device->open		= rt_serial_open;
-	device->close		= rt_serial_close;
-	device->read 		= rt_serial_read;
-	device->write 		= rt_serial_write;
-	device->control 	= rt_serial_control;
-	device->user_data	= serial;
+    device->type        = RT_Device_Class_Char;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = rt_serial_init;
+    device->open        = rt_serial_open;
+    device->close       = rt_serial_close;
+    device->read        = rt_serial_read;
+    device->write       = rt_serial_write;
+    device->control     = rt_serial_control;
+    device->user_data   = serial;
 
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
 }
 
 /* ISR for serial interrupt */
 void rt_hw_serial_isr(void)
 {
-	struct avr32_serial_device* uart = (struct avr32_serial_device*) _rt_usart_device.user_data;
-	rt_base_t level;
+    struct avr32_serial_device* uart = (struct avr32_serial_device*) _rt_usart_device.user_data;
+    rt_base_t level;
 
-	if (usart_test_hit(uart->uart_device))
-	{
-		/* interrupt mode receive */
-		RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
+    if (usart_test_hit(uart->uart_device))
+    {
+        /* interrupt mode receive */
+        RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
 
-		/* disable interrupt */
-		level = rt_hw_interrupt_disable();
+        /* disable interrupt */
+        level = rt_hw_interrupt_disable();
 
-		/* save character */
-		uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->rhr & 0xff;
-		uart->int_rx->save_index ++;
-		if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
-			uart->int_rx->save_index = 0;
+        /* save character */
+        uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->rhr & 0xff;
+        uart->int_rx->save_index ++;
+        if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
+            uart->int_rx->save_index = 0;
 
-		/* if the next position is read index, discard this 'read char' */
-		if (uart->int_rx->save_index == uart->int_rx->read_index)
-		{
-			uart->int_rx->read_index ++;
-			if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-				uart->int_rx->read_index = 0;
-		}
+        /* if the next position is read index, discard this 'read char' */
+        if (uart->int_rx->save_index == uart->int_rx->read_index)
+        {
+            uart->int_rx->read_index ++;
+            if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+                uart->int_rx->read_index = 0;
+        }
 
-		/* enable interrupt */
-		rt_hw_interrupt_enable(level);
+        /* enable interrupt */
+        rt_hw_interrupt_enable(level);
 
-		/* invoke callback */
-		if (_rt_usart_device.rx_indicate != RT_NULL)
-		{
-			rt_size_t rx_length;
+        /* invoke callback */
+        if (_rt_usart_device.rx_indicate != RT_NULL)
+        {
+            rt_size_t rx_length;
 
-			/* get rx length */
-			rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
-				UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
-				uart->int_rx->save_index - uart->int_rx->read_index;
+            /* get rx length */
+            rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
+                UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
+                uart->int_rx->save_index - uart->int_rx->read_index;
 
-			_rt_usart_device.rx_indicate(&_rt_usart_device, rx_length);
-		}
-	}
-	else
-	{
-		usart_reset_status(uart->uart_device);
-	}
+            _rt_usart_device.rx_indicate(&_rt_usart_device, rx_length);
+        }
+    }
+    else
+    {
+        usart_reset_status(uart->uart_device);
+    }
 }
 
 /*@}*/
diff --git a/libcpu/avr32/uc3/serial.h b/libcpu/avr32/uc3/serial.h
index a17338701b..fef65a12be 100644
--- a/libcpu/avr32/uc3/serial.h
+++ b/libcpu/avr32/uc3/serial.h
@@ -21,29 +21,29 @@
 #include "compiler.h"
 #include "usart.h"
 
-#define UART_RX_BUFFER_SIZE		64
-#define UART_TX_DMA_NODE_SIZE	4
+#define UART_RX_BUFFER_SIZE     64
+#define UART_TX_DMA_NODE_SIZE   4
 
 /* data node for Tx Mode */
 struct avr32_serial_data_node
 {
-	rt_uint8_t *data_ptr;
-	rt_size_t  data_size;
-	struct avr32_serial_data_node *next, *prev;
+    rt_uint8_t *data_ptr;
+    rt_size_t  data_size;
+    struct avr32_serial_data_node *next, *prev;
 };
 
 struct avr32_serial_int_rx
 {
-	rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
-	rt_uint32_t read_index, save_index;
+    rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
+    rt_uint32_t read_index, save_index;
 };
 
 struct avr32_serial_device
 {
-	avr32_usart_t *uart_device;
+    avr32_usart_t *uart_device;
 
-	/* rx structure */
-	struct avr32_serial_int_rx* int_rx;
+    /* rx structure */
+    struct avr32_serial_int_rx* int_rx;
 };
 
 rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct avr32_serial_device *serial);
diff --git a/libcpu/avr32/uc3/stack.c b/libcpu/avr32/uc3/stack.c
index dd43b5edbc..dee1161c12 100644
--- a/libcpu/avr32/uc3/stack.c
+++ b/libcpu/avr32/uc3/stack.c
@@ -30,28 +30,28 @@
  */
 rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_addr, void *texit)
 {
-	unsigned long *stk;
+    unsigned long *stk;
 
-	stk 	 = (unsigned long *)stack_addr;
-	*(stk)   = 0;							/* r8 */
-	*(--stk) = 0;							/* r9 */
-	*(--stk) = 0;							/* r10 */
-	*(--stk) = 0;							/* r11 */
-	*(--stk) = 0;							/* r12 */
-	*(--stk) = (unsigned long)texit;		/* lr */
-	*(--stk) = (unsigned long)tentry;		/* entry point, pc */
-	*(--stk) = 0x00600000;					/* sr */
-	*(--stk) = 0;							/* r0 */
-	*(--stk) = 0;							/* r1 */
-	*(--stk) = 0;							/* r2 */
-	*(--stk) = 0;							/* r3 */
-	*(--stk) = 0;							/* r4 */
-	*(--stk) = 0;							/* r5 */
-	*(--stk) = 0;							/* r6 */
-	*(--stk) = 0;							/* r7 */
+    stk      = (unsigned long *)stack_addr;
+    *(stk)   = 0;                           /* r8 */
+    *(--stk) = 0;                           /* r9 */
+    *(--stk) = 0;                           /* r10 */
+    *(--stk) = 0;                           /* r11 */
+    *(--stk) = 0;                           /* r12 */
+    *(--stk) = (unsigned long)texit;        /* lr */
+    *(--stk) = (unsigned long)tentry;       /* entry point, pc */
+    *(--stk) = 0x00600000;                  /* sr */
+    *(--stk) = 0;                           /* r0 */
+    *(--stk) = 0;                           /* r1 */
+    *(--stk) = 0;                           /* r2 */
+    *(--stk) = 0;                           /* r3 */
+    *(--stk) = 0;                           /* r4 */
+    *(--stk) = 0;                           /* r5 */
+    *(--stk) = 0;                           /* r6 */
+    *(--stk) = 0;                           /* r7 */
 
-	/* return task's current stack address */
-	return (rt_uint8_t *)stk;
+    /* return task's current stack address */
+    return (rt_uint8_t *)stk;
 }
 
 /*@}*/
diff --git a/libcpu/blackfin/bf53x/cpuport.c b/libcpu/blackfin/bf53x/cpuport.c
index 91cfaeb403..2d69ccc99a 100644
--- a/libcpu/blackfin/bf53x/cpuport.c
+++ b/libcpu/blackfin/bf53x/cpuport.c
@@ -8,8 +8,8 @@
  * http://www.rt-thread.org/license/LICENSE
  *
  * Change Logs:
- * Date			Author		Notes
- * 2012-02-13 	mojingxian 	first version
+ * Date         Author      Notes
+ * 2012-02-13   mojingxian  first version
  */
 
 #include 
@@ -23,10 +23,10 @@ rt_uint32_t rt_thread_switch_interrupt_flag;
  * initializes stack of thread
  */
 rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
-	rt_uint8_t *stack_addr, void *texit)
+    rt_uint8_t *stack_addr, void *texit)
 {
     unsigned char i;
-	unsigned long *stk;
+    unsigned long *stk;
 
     stk    = (unsigned long *)stack_addr;     /* Load stack pointer                                    */
 
diff --git a/libcpu/blackfin/bf53x/serial.c b/libcpu/blackfin/bf53x/serial.c
index b8a4c52570..4a6484a647 100644
--- a/libcpu/blackfin/bf53x/serial.c
+++ b/libcpu/blackfin/bf53x/serial.c
@@ -29,206 +29,206 @@
  */
 static rt_err_t rt_serial_init (rt_device_t dev)
 {
-	struct serial_device* uart = (struct serial_device*) dev->user_data;
+    struct serial_device* uart = (struct serial_device*) dev->user_data;
 
-	if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
-	{
+    if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
+    {
 
-		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			rt_memset(uart->int_rx->rx_buffer, 0, 
-				sizeof(uart->int_rx->rx_buffer));
-			uart->int_rx->read_index = uart->int_rx->save_index = 0;
-		}
-		
-		if (dev->flag & RT_DEVICE_FLAG_INT_TX)
-		{
-			rt_memset(uart->int_tx->tx_buffer, 0, 
-				sizeof(uart->int_tx->tx_buffer));
-			uart->int_tx->write_index = uart->int_tx->save_index = 0;
-		}
+        if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            rt_memset(uart->int_rx->rx_buffer, 0,
+                sizeof(uart->int_rx->rx_buffer));
+            uart->int_rx->read_index = uart->int_rx->save_index = 0;
+        }
 
-		dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
-	}
+        if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+        {
+            rt_memset(uart->int_tx->tx_buffer, 0,
+                sizeof(uart->int_tx->tx_buffer));
+            uart->int_tx->write_index = uart->int_tx->save_index = 0;
+        }
 
-	return RT_EOK;
+        dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
+    }
+
+    return RT_EOK;
 }
 
 /* save a char to serial buffer */
 static void rt_serial_savechar(struct serial_device* uart, char ch)
 {
-	rt_base_t level;
-	
-	/* disable interrupt */
-	level = rt_hw_interrupt_disable();
+    rt_base_t level;
 
-	uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
-	uart->int_rx->save_index ++;
-	if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
-		uart->int_rx->save_index = 0;
-	
-	/* if the next position is read index, discard this 'read char' */
-	if (uart->int_rx->save_index == uart->int_rx->read_index)
-	{
-		uart->int_rx->read_index ++;
-		if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-			uart->int_rx->read_index = 0;
-	}
+    /* disable interrupt */
+    level = rt_hw_interrupt_disable();
 
-	/* enable interrupt */
-	rt_hw_interrupt_enable(level);
+    uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
+    uart->int_rx->save_index ++;
+    if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
+        uart->int_rx->save_index = 0;
+
+    /* if the next position is read index, discard this 'read char' */
+    if (uart->int_rx->save_index == uart->int_rx->read_index)
+    {
+        uart->int_rx->read_index ++;
+        if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+            uart->int_rx->read_index = 0;
+    }
+
+    /* enable interrupt */
+    rt_hw_interrupt_enable(level);
 }
 
 static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
-{	
-	RT_ASSERT(dev != RT_NULL);
-	
-	return RT_EOK;
+{
+    RT_ASSERT(dev != RT_NULL);
+
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_close(rt_device_t dev)
-{	
-	RT_ASSERT(dev != RT_NULL);
+{
+    RT_ASSERT(dev != RT_NULL);
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct serial_device* uart;
-	
-	ptr = buffer;
-	err_code = RT_EOK;
-	uart = (struct serial_device*)dev->user_data;
+    rt_uint8_t* ptr;
+    rt_err_t err_code;
+    struct serial_device* uart;
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		rt_base_t level;
+    ptr = buffer;
+    err_code = RT_EOK;
+    uart = (struct serial_device*)dev->user_data;
 
-		/* interrupt mode Rx */
-		while (size)
-		{
-			if (uart->int_rx->read_index != uart->int_rx->save_index)
-			{
-				*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
-				size --;
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        rt_base_t level;
 
-				/* disable interrupt */
-				level = rt_hw_interrupt_disable();
+        /* interrupt mode Rx */
+        while (size)
+        {
+            if (uart->int_rx->read_index != uart->int_rx->save_index)
+            {
+                *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
+                size --;
 
-				uart->int_rx->read_index ++;
-				if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-					uart->int_rx->read_index = 0;
+                /* disable interrupt */
+                level = rt_hw_interrupt_disable();
 
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-			}
-			else
-			{
-				/* set error code */
-				err_code = -RT_EEMPTY;
-				break;
-			}
-		}
-	}
-	else
-	{
-		/* polling mode */
-		while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
-		{
-			//while (uart->uart_device->ustat & USTAT_RCV_READY)
-			{
-				*ptr = uart->uart_device->rbr_thr & 0xff;
-				ptr ++;
-			}
-		}
-	}
+                uart->int_rx->read_index ++;
+                if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+                    uart->int_rx->read_index = 0;
 
-	/* set error code */
-	rt_set_errno(err_code);
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+                /* enable interrupt */
+                rt_hw_interrupt_enable(level);
+            }
+            else
+            {
+                /* set error code */
+                err_code = -RT_EEMPTY;
+                break;
+            }
+        }
+    }
+    else
+    {
+        /* polling mode */
+        while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
+        {
+            //while (uart->uart_device->ustat & USTAT_RCV_READY)
+            {
+                *ptr = uart->uart_device->rbr_thr & 0xff;
+                ptr ++;
+            }
+        }
+    }
+
+    /* set error code */
+    rt_set_errno(err_code);
+    return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
 }
 
 static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct serial_device* uart;
-	
-	err_code = RT_EOK;
-	ptr = (rt_uint8_t*)buffer;
-	uart = (struct serial_device*)dev->user_data;
+    rt_uint8_t* ptr;
+    rt_err_t err_code;
+    struct serial_device* uart;
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_TX)
-	{
-		/* interrupt mode Tx */
-		while (uart->int_tx->save_index != uart->int_tx->write_index)
-		{
-			/* save on tx buffer */
-			uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
-			
-			-- size;
+    err_code = RT_EOK;
+    ptr = (rt_uint8_t*)buffer;
+    uart = (struct serial_device*)dev->user_data;
 
-			/* move to next position */
-			uart->int_tx->save_index ++;
-			
-			/* wrap save index */
-			if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
-				uart->int_tx->save_index = 0;
-		}
-		
-		/* set error code */
-		if (size > 0)
-			err_code = -RT_EFULL;
-	}
-	else
-	{
-		/* polling mode */
-		while (size)
-		{
-			/*
-			 * to be polite with serial console add a line feed
-			 * to the carriage return character
-			 */
-			if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM))
-			{
-				while (!(uart->uart_device->lsr & 0x20));
-				uart->uart_device->rbr_thr = '\r';
-			}
+    if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+    {
+        /* interrupt mode Tx */
+        while (uart->int_tx->save_index != uart->int_tx->write_index)
+        {
+            /* save on tx buffer */
+            uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
 
-			while (!(uart->uart_device->lsr & 0x20));
-			uart->uart_device->rbr_thr = (*ptr & 0xFF);
+            -- size;
 
-			++ptr; --size;
-		}
-	}	
+            /* move to next position */
+            uart->int_tx->save_index ++;
 
-	/* set error code */
-	rt_set_errno(err_code);
-	
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+            /* wrap save index */
+            if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
+                uart->int_tx->save_index = 0;
+        }
+
+        /* set error code */
+        if (size > 0)
+            err_code = -RT_EFULL;
+    }
+    else
+    {
+        /* polling mode */
+        while (size)
+        {
+            /*
+             * to be polite with serial console add a line feed
+             * to the carriage return character
+             */
+            if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM))
+            {
+                while (!(uart->uart_device->lsr & 0x20));
+                uart->uart_device->rbr_thr = '\r';
+            }
+
+            while (!(uart->uart_device->lsr & 0x20));
+            uart->uart_device->rbr_thr = (*ptr & 0xFF);
+
+            ++ptr; --size;
+        }
+    }
+
+    /* set error code */
+    rt_set_errno(err_code);
+
+    return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
 }
 
 static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		break;
-	
-	case RT_DEVICE_CTRL_RESUME:
-		/* resume device */
-		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
-		break;
-	}
-	
-	return RT_EOK;
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        break;
+
+    case RT_DEVICE_CTRL_RESUME:
+        /* resume device */
+        dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+        break;
+    }
+
+    return RT_EOK;
 }
 
 /*
@@ -236,49 +236,49 @@ static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
  */
 rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	device->type 		= RT_Device_Class_Char;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_serial_init;
-	device->open		= rt_serial_open;
-	device->close		= rt_serial_close;
-	device->read 		= rt_serial_read;
-	device->write 		= rt_serial_write;
-	device->control 	= rt_serial_control;
-	device->user_data   = serial;
+    device->type        = RT_Device_Class_Char;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = rt_serial_init;
+    device->open        = rt_serial_open;
+    device->close       = rt_serial_close;
+    device->read        = rt_serial_read;
+    device->write       = rt_serial_write;
+    device->control     = rt_serial_control;
+    device->user_data   = serial;
 
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
 }
-	
+
 /* ISR for serial interrupt */
 void rt_hw_serial_isr(rt_device_t device)
 {
-	struct serial_device* uart = (struct serial_device*) device->user_data;
-	
-	/* interrupt mode receive */	
-	RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
+    struct serial_device* uart = (struct serial_device*) device->user_data;
 
-	/* save on rx buffer */
-	//while (uart->uart_device->ustat & USTAT_RCV_READY)
-	{
-		rt_serial_savechar(uart, uart->uart_device->rbr_thr & 0xff);
-	}
+    /* interrupt mode receive */
+    RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
 
-	/* invoke callback */
-	if (device->rx_indicate != RT_NULL)
-	{
-		rt_size_t rx_length;
-		
-		/* get rx length */
-		rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
-			UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
-			uart->int_rx->save_index - uart->int_rx->read_index;
+    /* save on rx buffer */
+    //while (uart->uart_device->ustat & USTAT_RCV_READY)
+    {
+        rt_serial_savechar(uart, uart->uart_device->rbr_thr & 0xff);
+    }
 
-		device->rx_indicate(device, rx_length);
-	}	
+    /* invoke callback */
+    if (device->rx_indicate != RT_NULL)
+    {
+        rt_size_t rx_length;
+
+        /* get rx length */
+        rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
+            UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
+            uart->int_rx->save_index - uart->int_rx->read_index;
+
+        device->rx_indicate(device, rx_length);
+    }
 }
 
 /*@}*/
diff --git a/libcpu/blackfin/bf53x/serial.h b/libcpu/blackfin/bf53x/serial.h
index 8d85193634..7969c5514e 100644
--- a/libcpu/blackfin/bf53x/serial.h
+++ b/libcpu/blackfin/bf53x/serial.h
@@ -4,49 +4,49 @@
 #include 
 #include 
 
-#define	USTAT_RCV_READY		0x01   	/* receive data ready */ 
-#define	USTAT_TXB_EMPTY		0x02   	/* tx buffer empty */
-#define BPS					115200	/* serial baudrate */
+#define USTAT_RCV_READY     0x01    /* receive data ready */
+#define USTAT_TXB_EMPTY     0x02    /* tx buffer empty */
+#define BPS                 115200  /* serial baudrate */
 
-#define UART_RX_BUFFER_SIZE		64
-#define UART_TX_BUFFER_SIZE		64
+#define UART_RX_BUFFER_SIZE     64
+#define UART_TX_BUFFER_SIZE     64
 
 struct serial_int_rx
 {
-	rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
-	rt_uint32_t read_index, save_index;
+    rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
+    rt_uint32_t read_index, save_index;
 };
 
 struct serial_int_tx
 {
-	rt_uint8_t  tx_buffer[UART_TX_BUFFER_SIZE];
-	rt_uint32_t write_index, save_index;
+    rt_uint8_t  tx_buffer[UART_TX_BUFFER_SIZE];
+    rt_uint32_t write_index, save_index;
 };
 
 typedef struct uartport
 {
-	volatile rt_uint16_t rbr_thr;  //receive buffer register and transmit hold register
-	volatile rt_uint16_t reserved0;
-	volatile rt_uint16_t reserved1;
-	volatile rt_uint16_t reserved2;
-	volatile rt_uint16_t reserved3;
-	volatile rt_uint16_t reserved4;
-	volatile rt_uint16_t reserved5;
-	volatile rt_uint16_t reserved6;
-	volatile rt_uint16_t reserved7;
-	volatile rt_uint16_t reserved8;
-	volatile rt_uint16_t lsr;      //line status register
+    volatile rt_uint16_t rbr_thr;  //receive buffer register and transmit hold register
+    volatile rt_uint16_t reserved0;
+    volatile rt_uint16_t reserved1;
+    volatile rt_uint16_t reserved2;
+    volatile rt_uint16_t reserved3;
+    volatile rt_uint16_t reserved4;
+    volatile rt_uint16_t reserved5;
+    volatile rt_uint16_t reserved6;
+    volatile rt_uint16_t reserved7;
+    volatile rt_uint16_t reserved8;
+    volatile rt_uint16_t lsr;      //line status register
 }uartport;
 
 struct serial_device
 {
-	uartport* uart_device;
-	
-	/* rx structure */
-	struct serial_int_rx* int_rx;
+    uartport* uart_device;
 
-	/* tx structure */
-	struct serial_int_tx* int_tx;
+    /* rx structure */
+    struct serial_int_rx* int_rx;
+
+    /* tx structure */
+    struct serial_int_tx* int_tx;
 };
 
 rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial);
diff --git a/libcpu/c-sky/ck802/contex_ck802_gcc.S b/libcpu/c-sky/ck802/contex_ck802_gcc.S
index 44f2c331dd..a4431b0f74 100644
--- a/libcpu/c-sky/ck802/contex_ck802_gcc.S
+++ b/libcpu/c-sky/ck802/contex_ck802_gcc.S
@@ -1,21 +1,7 @@
 /*
- * File      : contex_ck802.S
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/libcpu/c-sky/ck802/core_ck802.c b/libcpu/c-sky/ck802/core_ck802.c
index 047c417267..d8cfce09f7 100644
--- a/libcpu/c-sky/ck802/core_ck802.c
+++ b/libcpu/c-sky/ck802/core_ck802.c
@@ -1,21 +1,7 @@
 /*
- * File      : core_ck802.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/libcpu/c-sky/ck802/core_ck802.h b/libcpu/c-sky/ck802/core_ck802.h
index 6c335f8178..e7185131e4 100644
--- a/libcpu/c-sky/ck802/core_ck802.h
+++ b/libcpu/c-sky/ck802/core_ck802.h
@@ -1,21 +1,7 @@
 /*
- * File      : core_ck802.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -147,24 +133,24 @@ extern "C" {
  */
 
 /**
-  \brief  访问处理器状态寄存器(PSR)的联合体定义.
+  \brief  璁块棶澶勭悊鍣ㄧ姸鎬佸瘎瀛樺櫒(PSR)鐨勮仈鍚堜綋瀹氫箟.
  */
 typedef union
 {
     struct
     {
-        uint32_t C: 1;                       /*!< bit:      0  条件码／进位位 */
-        uint32_t _reserved0: 5;              /*!< bit:  2.. 5  保留 */
-        uint32_t IE: 1;                      /*!< bit:      6  中断有效控制位 */
-        uint32_t IC: 1;                      /*!< bit:      7  中断控制位 */
-        uint32_t EE: 1;                      /*!< bit:      8  异常有效控制位 */
-        uint32_t MM: 1;                      /*!< bit:      9  不对齐异常掩盖位 */
-        uint32_t _reserved1: 6;              /*!< bit: 10..15  保留 */
-        uint32_t VEC: 8;                     /*!< bit: 16..23  异常事件向量值 */
-        uint32_t _reserved2: 7;              /*!< bit: 24..30  保留 */
-        uint32_t S: 1;                       /*!< bit:     31  超级用户模式设置位 */
-    } b;                                   /*!< Structure    用来按位访问 */
-    uint32_t w;                            /*!< Type         整个寄存器访问 */
+        uint32_t C: 1;                       /*!< bit:      0  鏉′欢鐮侊紡杩涗綅浣 */
+        uint32_t _reserved0: 5;              /*!< bit:  2.. 5  淇濈暀 */
+        uint32_t IE: 1;                      /*!< bit:      6  涓柇鏈夋晥鎺у埗浣 */
+        uint32_t IC: 1;                      /*!< bit:      7  涓柇鎺у埗浣 */
+        uint32_t EE: 1;                      /*!< bit:      8  寮傚父鏈夋晥鎺у埗浣 */
+        uint32_t MM: 1;                      /*!< bit:      9  涓嶅榻愬紓甯告帺鐩栦綅 */
+        uint32_t _reserved1: 6;              /*!< bit: 10..15  淇濈暀 */
+        uint32_t VEC: 8;                     /*!< bit: 16..23  寮傚父浜嬩欢鍚戦噺鍊 */
+        uint32_t _reserved2: 7;              /*!< bit: 24..30  淇濈暀 */
+        uint32_t S: 1;                       /*!< bit:     31  瓒呯骇鐢ㄦ埛妯″紡璁剧疆浣 */
+    } b;                                   /*!< Structure    鐢ㄦ潵鎸変綅璁块棶 */
+    uint32_t w;                            /*!< Type         鏁翠釜瀵勫瓨鍣ㄨ闂 */
 } PSR_Type;
 
 /* PSR Register Definitions */
@@ -190,21 +176,21 @@ typedef union
 #define PSR_C_Msk                          (1UL << PSR_C_Pos)                             /*!< PSR: C Mask */
 
 /**
-  \brief  访问高速缓存配置寄存器(CCR, CR<18, 0>)的联合体定义.
+  \brief  璁块棶楂橀熺紦瀛橀厤缃瘎瀛樺櫒(CCR, CR<18, 0>)鐨勮仈鍚堜綋瀹氫箟.
  */
 typedef union
 {
     struct
     {
-        uint32_t MP: 1;                      /*!< bit:      0  内存保护设置位 */
-        uint32_t _reserved0: 6;              /*!< bit:  1.. 6  保留 */
-        uint32_t BE: 1;                      /*!< bit:      7  Endian模式 */
-        uint32_t SCK: 3;                     /*!< bit:  8..10  系统和处理器的时钟比 */
-        uint32_t _reserved1: 2;              /*!< bit: 11..12  保留 */
-        uint32_t BE_V2: 1;                   /*!< bit:     13  V2版本大小端 */
-        uint32_t _reserved2: 18;             /*!< bit: 14..31  保留 */
-    } b;                                   /*!< Structure    用来按位访问 */
-    uint32_t w;                            /*!< Type         整个寄存器访问 */
+        uint32_t MP: 1;                      /*!< bit:      0  鍐呭瓨淇濇姢璁剧疆浣 */
+        uint32_t _reserved0: 6;              /*!< bit:  1.. 6  淇濈暀 */
+        uint32_t BE: 1;                      /*!< bit:      7  Endian妯″紡 */
+        uint32_t SCK: 3;                     /*!< bit:  8..10  绯荤粺鍜屽鐞嗗櫒鐨勬椂閽熸瘮 */
+        uint32_t _reserved1: 2;              /*!< bit: 11..12  淇濈暀 */
+        uint32_t BE_V2: 1;                   /*!< bit:     13  V2鐗堟湰澶у皬绔 */
+        uint32_t _reserved2: 18;             /*!< bit: 14..31  淇濈暀 */
+    } b;                                   /*!< Structure    鐢ㄦ潵鎸変綅璁块棶 */
+    uint32_t w;                            /*!< Type         鏁翠釜瀵勫瓨鍣ㄨ闂 */
 } CCR_Type;
 
 /* CCR Register Definitions */
@@ -221,38 +207,38 @@ typedef union
 #define CCR_MP_Msk                        (0x1UL << CCR_MP_Pos)                          /*!< CCR: MP Mask */
 
 /**
-  \brief  访问可高缓和访问权限配置寄存器(CAPR, CR<19,0>)的联合体定义..
+  \brief  璁块棶鍙珮缂撳拰璁块棶鏉冮檺閰嶇疆瀵勫瓨鍣(CAPR, CR<19,0>)鐨勮仈鍚堜綋瀹氫箟..
  */
 typedef union
 {
     struct
     {
-        uint32_t X0: 1;                      /*!< bit:      0  不可执行属性设置位 */
-        uint32_t X1: 1;                      /*!< bit:      1  不可执行属性设置位 */
-        uint32_t X2: 1;                      /*!< bit:      2  不可执行属性设置位 */
-        uint32_t X3: 1;                      /*!< bit:      3  不可执行属性设置位 */
-        uint32_t X4: 1;                      /*!< bit:      4  不可执行属性设置位 */
-        uint32_t X5: 1;                      /*!< bit:      5  不可执行属性设置位 */
-        uint32_t X6: 1;                      /*!< bit:      6  不可执行属性设置位 */
-        uint32_t X7: 1;                      /*!< bit:      7  不可执行属性设置位 */
-        uint32_t AP0: 2;                     /*!< bit:  8.. 9  访问权限设置位 */
-        uint32_t AP1: 2;                     /*!< bit: 10..11  访问权限设置位 */
-        uint32_t AP2: 2;                     /*!< bit: 12..13  访问权限设置位 */
-        uint32_t AP3: 2;                     /*!< bit: 14..15  访问权限设置位 */
-        uint32_t AP4: 2;                     /*!< bit: 16..17  访问权限设置位 */
-        uint32_t AP5: 2;                     /*!< bit: 18..19  访问权限设置位 */
-        uint32_t AP6: 2;                     /*!< bit: 20..21  访问权限设置位 */
-        uint32_t AP7: 2;                     /*!< bit: 22..23  访问权限设置位 */
-        uint32_t S0: 1;                      /*!< bit:     24  安全属性设置位 */
-        uint32_t S1: 1;                      /*!< bit:     25  安全属性设置位 */
-        uint32_t S2: 1;                      /*!< bit:     26  安全属性设置位 */
-        uint32_t S3: 1;                      /*!< bit:     27  安全属性设置位 */
-        uint32_t S4: 1;                      /*!< bit:     28  安全属性设置位 */
-        uint32_t S5: 1;                      /*!< bit:     29  安全属性设置位 */
-        uint32_t S6: 1;                      /*!< bit:     30  安全属性设置位 */
-        uint32_t S7: 1;                      /*!< bit:     31  安全属性设置位 */
-    } b;                                   /*!< Structure    用来按位访问 */
-    uint32_t w;                            /*!< Type         整个寄存器访问 */
+        uint32_t X0: 1;                      /*!< bit:      0  涓嶅彲鎵ц灞炴ц缃綅 */
+        uint32_t X1: 1;                      /*!< bit:      1  涓嶅彲鎵ц灞炴ц缃綅 */
+        uint32_t X2: 1;                      /*!< bit:      2  涓嶅彲鎵ц灞炴ц缃綅 */
+        uint32_t X3: 1;                      /*!< bit:      3  涓嶅彲鎵ц灞炴ц缃綅 */
+        uint32_t X4: 1;                      /*!< bit:      4  涓嶅彲鎵ц灞炴ц缃綅 */
+        uint32_t X5: 1;                      /*!< bit:      5  涓嶅彲鎵ц灞炴ц缃綅 */
+        uint32_t X6: 1;                      /*!< bit:      6  涓嶅彲鎵ц灞炴ц缃綅 */
+        uint32_t X7: 1;                      /*!< bit:      7  涓嶅彲鎵ц灞炴ц缃綅 */
+        uint32_t AP0: 2;                     /*!< bit:  8.. 9  璁块棶鏉冮檺璁剧疆浣 */
+        uint32_t AP1: 2;                     /*!< bit: 10..11  璁块棶鏉冮檺璁剧疆浣 */
+        uint32_t AP2: 2;                     /*!< bit: 12..13  璁块棶鏉冮檺璁剧疆浣 */
+        uint32_t AP3: 2;                     /*!< bit: 14..15  璁块棶鏉冮檺璁剧疆浣 */
+        uint32_t AP4: 2;                     /*!< bit: 16..17  璁块棶鏉冮檺璁剧疆浣 */
+        uint32_t AP5: 2;                     /*!< bit: 18..19  璁块棶鏉冮檺璁剧疆浣 */
+        uint32_t AP6: 2;                     /*!< bit: 20..21  璁块棶鏉冮檺璁剧疆浣 */
+        uint32_t AP7: 2;                     /*!< bit: 22..23  璁块棶鏉冮檺璁剧疆浣 */
+        uint32_t S0: 1;                      /*!< bit:     24  瀹夊叏灞炴ц缃綅 */
+        uint32_t S1: 1;                      /*!< bit:     25  瀹夊叏灞炴ц缃綅 */
+        uint32_t S2: 1;                      /*!< bit:     26  瀹夊叏灞炴ц缃綅 */
+        uint32_t S3: 1;                      /*!< bit:     27  瀹夊叏灞炴ц缃綅 */
+        uint32_t S4: 1;                      /*!< bit:     28  瀹夊叏灞炴ц缃綅 */
+        uint32_t S5: 1;                      /*!< bit:     29  瀹夊叏灞炴ц缃綅 */
+        uint32_t S6: 1;                      /*!< bit:     30  瀹夊叏灞炴ц缃綅 */
+        uint32_t S7: 1;                      /*!< bit:     31  瀹夊叏灞炴ц缃綅 */
+    } b;                                   /*!< Structure    鐢ㄦ潵鎸変綅璁块棶 */
+    uint32_t w;                            /*!< Type         鏁翠釜瀵勫瓨鍣ㄨ闂 */
 } CAPR_Type;
 
 /* CAPR Register Definitions */
@@ -329,18 +315,18 @@ typedef union
 #define CAPR_X0_Msk                        (0x1UL << CAPR_X0_Pos)                         /*!< CAPR: X0 Mask */
 
 /**
-  \brief  访问保护区控制寄存器(PACR, CR<20,0>)的联合体定义.
+  \brief  璁块棶淇濇姢鍖烘帶鍒跺瘎瀛樺櫒(PACR, CR<20,0>)鐨勮仈鍚堜綋瀹氫箟.
  */
 typedef union
 {
     struct
     {
-        uint32_t E: 1;                       /*!< bit:      0  保护区有效设置 */
-        uint32_t Size: 5;                    /*!< bit:  1.. 5  保护区大小 */
-        uint32_t _reserved0: 4;              /*!< bit:  6.. 9  保留 */
-        uint32_t base_addr: 22;              /*!< bit: 10..31  保护区地址的高位 */
-    } b;                                   /*!< Structure    用来按位访问 */
-    uint32_t w;                            /*!< Type         整个寄存器访问 */
+        uint32_t E: 1;                       /*!< bit:      0  淇濇姢鍖烘湁鏁堣缃 */
+        uint32_t Size: 5;                    /*!< bit:  1.. 5  淇濇姢鍖哄ぇ灏 */
+        uint32_t _reserved0: 4;              /*!< bit:  6.. 9  淇濈暀 */
+        uint32_t base_addr: 22;              /*!< bit: 10..31  淇濇姢鍖哄湴鍧鐨勯珮浣 */
+    } b;                                   /*!< Structure    鐢ㄦ潵鎸変綅璁块棶 */
+    uint32_t w;                            /*!< Type         鏁翠釜瀵勫瓨鍣ㄨ闂 */
 } PACR_Type;
 
 /* PACR Register Definitions */
@@ -354,16 +340,16 @@ typedef union
 #define PACK_E_Msk                         (0x1UL << PACR_E_Pos)                          /*!< PACR: E Mask */
 
 /**
-  \brief  访问保护区选择寄存器(PRSR,CR<21,0>)的联合体定义.
+  \brief  璁块棶淇濇姢鍖洪夋嫨瀵勫瓨鍣(PRSR,CR<21,0>)鐨勮仈鍚堜綋瀹氫箟.
  */
 typedef union
 {
     struct
     {
-        uint32_t RID: 3;                     /*!< bit:  0.. 2  保护区索引值 */
-        uint32_t _reserved0: 30;             /*!< bit:  3..31  保留 */
-    } b;                                   /*!< Structure    用来按位访问 */
-    uint32_t w;                            /*!< Type         整个寄存器访问 */
+        uint32_t RID: 3;                     /*!< bit:  0.. 2  淇濇姢鍖虹储寮曞 */
+        uint32_t _reserved0: 30;             /*!< bit:  3..31  淇濈暀 */
+    } b;                                   /*!< Structure    鐢ㄦ潵鎸変綅璁块棶 */
+    uint32_t w;                            /*!< Type         鏁翠釜瀵勫瓨鍣ㄨ闂 */
 } PRSR_Type;
 
 /* PRSR Register Definitions */
@@ -381,30 +367,30 @@ typedef union
  */
 
 /**
-  \brief 访问矢量中断控制器的结构体.
+  \brief 璁块棶鐭㈤噺涓柇鎺у埗鍣ㄧ殑缁撴瀯浣.
  */
 typedef struct
 {
-    __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  中断使能设置寄存器 */
+    __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  涓柇浣胯兘璁剧疆瀵勫瓨鍣 */
     uint32_t RESERVED0[15U];
-    __IOM uint32_t IWER[1U];               /*!< Offset: 0x040 (R/W)  中断低功耗唤醒设置寄存器 */
+    __IOM uint32_t IWER[1U];               /*!< Offset: 0x040 (R/W)  涓柇浣庡姛鑰楀敜閱掕缃瘎瀛樺櫒 */
     uint32_t RESERVED1[15U];
-    __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  中断使能清除寄存器 */
+    __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  涓柇浣胯兘娓呴櫎瀵勫瓨鍣 */
     uint32_t RESERVED2[15U];
-    __IOM uint32_t IWDR[1U];               /*!< Offset: 0x0c0 (R/W)  中断低功耗唤醒清除寄存器 */
+    __IOM uint32_t IWDR[1U];               /*!< Offset: 0x0c0 (R/W)  涓柇浣庡姛鑰楀敜閱掓竻闄ゅ瘎瀛樺櫒 */
     uint32_t RESERVED3[15U];
-    __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  中断等待设置寄存器 */
+    __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  涓柇绛夊緟璁剧疆瀵勫瓨鍣 */
     uint32_t RESERVED4[15U];
-    __IOM uint32_t ISSR[1U];               /*!< Offset: 0x140 (R/W)  安全中断使能设置寄存器 */
+    __IOM uint32_t ISSR[1U];               /*!< Offset: 0x140 (R/W)  瀹夊叏涓柇浣胯兘璁剧疆瀵勫瓨鍣 */
     uint32_t RESERVED5[15U];
-    __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  中断等待清除寄存器 */
+    __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  涓柇绛夊緟娓呴櫎瀵勫瓨鍣 */
     uint32_t RESERVED6[31U];
-    __IOM uint32_t IABR[1U];               /*!< Offset: 0x200 (R/W)  中断响应状态寄存器 */
+    __IOM uint32_t IABR[1U];               /*!< Offset: 0x200 (R/W)  涓柇鍝嶅簲鐘舵佸瘎瀛樺櫒 */
     uint32_t RESERVED7[63U];
-    __IOM uint32_t IPR[8U];                /*!< Offset: 0x300 (R/W)  中断优先级设置寄存器 */
+    __IOM uint32_t IPR[8U];                /*!< Offset: 0x300 (R/W)  涓柇浼樺厛绾ц缃瘎瀛樺櫒 */
     uint32_t RESERVED8[504U];
-    __IM  uint32_t ISR;                    /*!< Offset: 0xB00 (R/ )  中断状态寄存器 */
-    __IOM uint32_t IPTR;                   /*!< Offset: 0xB04 (R/W)  中断优先级阈值寄存器 */
+    __IM  uint32_t ISR;                    /*!< Offset: 0xB00 (R/ )  涓柇鐘舵佸瘎瀛樺櫒 */
+    __IOM uint32_t IPTR;                   /*!< Offset: 0xB04 (R/W)  涓柇浼樺厛绾ч槇鍊煎瘎瀛樺櫒 */
 } NVIC_Type;
 
 /*@} end of group CSI_NVIC */
@@ -417,14 +403,14 @@ typedef struct
  */
 
 /**
-  \brief  访问系统计时器的数据结构.
+  \brief  璁块棶绯荤粺璁℃椂鍣ㄧ殑鏁版嵁缁撴瀯.
  */
 typedef struct
 {
-    __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  控制状态寄存器 */
-    __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  回填值寄存器 */
-    __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  当前值寄存器 */
-    __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  校准寄存器 */
+    __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  鎺у埗鐘舵佸瘎瀛樺櫒 */
+    __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  鍥炲～鍊煎瘎瀛樺櫒 */
+    __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  褰撳墠鍊煎瘎瀛樺櫒 */
+    __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  鏍″噯瀵勫瓨鍣 */
 } CORET_Type;
 
 /* CORET Control / Status Register Definitions */
@@ -468,7 +454,7 @@ typedef struct
  */
 
 /**
-  \brief  访问DCC的数据结构.
+  \brief  璁块棶DCC鐨勬暟鎹粨鏋.
  */
 typedef struct
 {
@@ -478,8 +464,8 @@ typedef struct
     uint32_t RESERVED1[6U];
     union
     {
-        __IM uint32_t DERJW;                 /*!< Offset: 0x058 (R/ )  数据交换寄存器 CPU读*/
-        __OM uint32_t DERJR;                 /*!< Offset: 0x058 ( /W)  数据交换寄存器 CPU写*/
+        __IM uint32_t DERJW;                 /*!< Offset: 0x058 (R/ )  鏁版嵁浜ゆ崲瀵勫瓨鍣 CPU璇*/
+        __OM uint32_t DERJR;                 /*!< Offset: 0x058 ( /W)  鏁版嵁浜ゆ崲瀵勫瓨鍣 CPU鍐*/
     };
 
 } DCC_Type;
diff --git a/libcpu/c-sky/ck802/stack_ck802.c b/libcpu/c-sky/ck802/stack_ck802.c
index 01fed9ad34..087722072e 100644
--- a/libcpu/c-sky/ck802/stack_ck802.c
+++ b/libcpu/c-sky/ck802/stack_ck802.c
@@ -1,21 +1,7 @@
 /*
- * File      : stack_ck802.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/libcpu/ia32/__udivsi3.c b/libcpu/ia32/__udivsi3.c
index 5a5622f883..ced90b5aba 100644
--- a/libcpu/ia32/__udivsi3.c
+++ b/libcpu/ia32/__udivsi3.c
@@ -12,31 +12,31 @@
 
 uint32_t __udivsi3(uint32_t num, uint32_t den)
 {
-	uint32_t quot = 0, qbit = 1;
+    uint32_t quot = 0, qbit = 1;
 
-	if (den == 0)
-	{
-		asm volatile ("int $0");
-		return 0;	/* If trap returns... */
-	}
+    if (den == 0)
+    {
+        asm volatile ("int $0");
+        return 0;   /* If trap returns... */
+    }
 
-	/* Left-justify denominator and count shift */
-	while ((int32_t) den >= 0)
-	{
-		den <<= 1;
-		qbit <<= 1;
-	}
+    /* Left-justify denominator and count shift */
+    while ((int32_t) den >= 0)
+    {
+        den <<= 1;
+        qbit <<= 1;
+    }
 
-	while (qbit)
-	{
-		if (den <= num)
-		{
-			num -= den;
-			quot += qbit;
-		}
-		den >>= 1;
-		qbit >>= 1;
-	}
+    while (qbit)
+    {
+        if (den <= num)
+        {
+            num -= den;
+            quot += qbit;
+        }
+        den >>= 1;
+        qbit >>= 1;
+    }
 
-	return quot;
+    return quot;
 }
diff --git a/libcpu/ia32/__umodsi3.c b/libcpu/ia32/__umodsi3.c
index d47fe3d295..ddc5db5488 100644
--- a/libcpu/ia32/__umodsi3.c
+++ b/libcpu/ia32/__umodsi3.c
@@ -12,31 +12,31 @@
 
 uint32_t __umodsi3(uint32_t num, uint32_t den)
 {
-	register uint32_t quot = 0, qbit = 1;
+    register uint32_t quot = 0, qbit = 1;
 
-	if (den == 0)
-	{
-		asm volatile ("int $0");
-		return 0;	/* if trap returns... */
-	}
+    if (den == 0)
+    {
+        asm volatile ("int $0");
+        return 0;   /* if trap returns... */
+    }
 
-	/* left-justify denominator and count shift */
-	while ((int32_t) den >= 0)
-	{
-		den <<= 1;
-		qbit <<= 1;
-	}
+    /* left-justify denominator and count shift */
+    while ((int32_t) den >= 0)
+    {
+        den <<= 1;
+        qbit <<= 1;
+    }
 
-	while (qbit)
-	{
-		if (den <= num)
-		{
-			num -= den;
-			quot += qbit;
-		}
-		den >>= 1;
-		qbit >>= 1;
-	}
+    while (qbit)
+    {
+        if (den <= num)
+        {
+            num -= den;
+            quot += qbit;
+        }
+        den >>= 1;
+        qbit >>= 1;
+    }
 
-	return num;
+    return num;
 }
diff --git a/libcpu/ia32/cpuport.c b/libcpu/ia32/cpuport.c
index 69032c2f87..2e0380d9f8 100644
--- a/libcpu/ia32/cpuport.c
+++ b/libcpu/ia32/cpuport.c
@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2021/02/19     Bernard      Implement rt_hw_context_switch_interrupt in C
  */
- 
+
 #include 
 #include 
 
@@ -43,35 +43,35 @@ void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to)
  * This function will initialize thread stack
  *
  * @param tentry the entry of thread
- * @param parameter the parameter of entry 
+ * @param parameter the parameter of entry
  * @param stack_addr the beginning stack address
  * @param texit the function will be called when thread exit
  *
  * @return stack address
  */
 rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
-	rt_uint8_t *stack_addr, void *texit)
+    rt_uint8_t *stack_addr, void *texit)
 {
-	unsigned long *stk;
+    unsigned long *stk;
 
-	stk = (unsigned long *)stack_addr;							
-	*(--stk) = (unsigned long)parameter;
-	*(--stk) = (unsigned long)texit;
-	*(--stk) = 0x200;						/*flags*/
-	*(--stk) = 0x08;						/*cs*/
-	*(--stk) = (unsigned long)tentry;		/*eip*/
-	*(--stk) = 0;							/*irqno*/
-	*(--stk) = 0x10;						/*ds*/
-	*(--stk) = 0x10;						/*es*/
-	*(--stk) = 0;							/*eax*/
-	*(--stk) = 0;							/*ecx*/
-	*(--stk) = 0;							/*edx*/
-	*(--stk) = 0;							/*ebx*/
-	*(--stk) = 0;							/*esp*/
-	*(--stk) = 0;							/*ebp*/
-	*(--stk) = 0;							/*esi*/
-	*(--stk) = 0;							/*edi*/
+    stk = (unsigned long *)stack_addr;
+    *(--stk) = (unsigned long)parameter;
+    *(--stk) = (unsigned long)texit;
+    *(--stk) = 0x200;                       /*flags*/
+    *(--stk) = 0x08;                        /*cs*/
+    *(--stk) = (unsigned long)tentry;       /*eip*/
+    *(--stk) = 0;                           /*irqno*/
+    *(--stk) = 0x10;                        /*ds*/
+    *(--stk) = 0x10;                        /*es*/
+    *(--stk) = 0;                           /*eax*/
+    *(--stk) = 0;                           /*ecx*/
+    *(--stk) = 0;                           /*edx*/
+    *(--stk) = 0;                           /*ebx*/
+    *(--stk) = 0;                           /*esp*/
+    *(--stk) = 0;                           /*ebp*/
+    *(--stk) = 0;                           /*esi*/
+    *(--stk) = 0;                           /*edi*/
 
-	/* return task's current stack address */
-	return (rt_uint8_t *)stk;
+    /* return task's current stack address */
+    return (rt_uint8_t *)stk;
 }
diff --git a/libcpu/ia32/interrupt.c b/libcpu/ia32/interrupt.c
index d597848c52..473bf7714a 100644
--- a/libcpu/ia32/interrupt.c
+++ b/libcpu/ia32/interrupt.c
@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2015/9/15      Bernard      Update to new interrupt framework.
  */
- 
+
 #include 
 #include 
 
@@ -74,7 +74,7 @@ void rt_hw_isr(int vector)
 void rt_hw_interrupt_init(void)
 {
     int idx;
-    
+
     rt_hw_idt_init();
     rt_hw_pic_init();
 
diff --git a/libcpu/ia32/trap.c b/libcpu/ia32/trap.c
index 172a078273..c77a20c890 100644
--- a/libcpu/ia32/trap.c
+++ b/libcpu/ia32/trap.c
@@ -6,7 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  */
- 
+
 #include 
 #include 
 
@@ -18,7 +18,7 @@
 struct Gatedesc idt[256] = { {0}, };
 struct Pseudodesc idt_pd =
 {
-	0, sizeof(idt) - 1, (unsigned long) idt,
+    0, sizeof(idt) - 1, (unsigned long) idt,
 };
 
 /* exception and interrupt handler table */
@@ -37,36 +37,36 @@ extern void rt_hw_interrupt_handle(int vector, void* param);
  *
  */
 void rt_hw_idt_init(void)
-{	
-	extern void Xdefault(void);
-	int i, j, func;
+{
+    extern void Xdefault(void);
+    int i, j, func;
 
-	// install a default handler
-	for (i = 0; i < sizeof(idt)/sizeof(idt[0]); i++)
-		SETGATE(idt[i], 0, GD_KT, &Xdefault, 0);
+    // install a default handler
+    for (i = 0; i < sizeof(idt)/sizeof(idt[0]); i++)
+        SETGATE(idt[i], 0, GD_KT, &Xdefault, 0);
 
-	/*install trap handler*/
-	for(i = 0; i < 16; i++)
-	{
-		func = (int)trap_func[i];
-		SETGATE(idt[i], 0, GD_KT, func, 0);
-	}
+    /*install trap handler*/
+    for(i = 0; i < 16; i++)
+    {
+        func = (int)trap_func[i];
+        SETGATE(idt[i], 0, GD_KT, func, 0);
+    }
 
-	func = (int)trap_func[3];
-	SETGATE(idt[3], 0, GD_KT, func, 3);
+    func = (int)trap_func[3];
+    SETGATE(idt[3], 0, GD_KT, func, 3);
 
-	i = 0;
-	
-	/*install exteral interrupt handler*/
-	for(j = IRQ_OFFSET; j < IRQ_OFFSET + MAX_HANDLERS; j++)
-	{	
-		func = (int)hdinterrupt_func[i];
-		SETGATE(idt[j], 0, GD_KT, func, 0);
-		i++;
-	}
-	
-	// Load the IDT
-	asm volatile("lidt idt_pd + 2");
+    i = 0;
+
+    /*install exteral interrupt handler*/
+    for(j = IRQ_OFFSET; j < IRQ_OFFSET + MAX_HANDLERS; j++)
+    {
+        func = (int)hdinterrupt_func[i];
+        SETGATE(idt[j], 0, GD_KT, func, 0);
+        i++;
+    }
+
+    // Load the IDT
+    asm volatile("lidt idt_pd + 2");
 }
 
 /**
@@ -77,24 +77,24 @@ void rt_hw_idt_init(void)
  */
 void rt_hw_trap_irq(int trapno)
 {
-	switch(trapno)
-	{
-		case T_DIVIDE:
-			rt_kprintf("Divide error interrupt\n");
-			RT_ASSERT(0);
-		case T_PGFLT:
-			rt_kprintf("Page fault interrupt\n");
-			RT_ASSERT(0);
-		case T_GPFLT:
-			rt_kprintf("General protection interrupt\n");
-			RT_ASSERT(0);
-		case T_DEFAULT:
-			rt_hw_interrupt_handle(T_DEFAULT, RT_NULL);
-			return;
-	}
+    switch(trapno)
+    {
+        case T_DIVIDE:
+            rt_kprintf("Divide error interrupt\n");
+            RT_ASSERT(0);
+        case T_PGFLT:
+            rt_kprintf("Page fault interrupt\n");
+            RT_ASSERT(0);
+        case T_GPFLT:
+            rt_kprintf("General protection interrupt\n");
+            RT_ASSERT(0);
+        case T_DEFAULT:
+            rt_hw_interrupt_handle(T_DEFAULT, RT_NULL);
+            return;
+    }
 
-	/*kernel bug if run here*/
-	RT_ASSERT(0);
+    /*kernel bug if run here*/
+    RT_ASSERT(0);
 }
 
 /*@}*/
diff --git a/libcpu/m16c/m16c62p/cpuport.c b/libcpu/m16c/m16c62p/cpuport.c
index c66f73b727..8f9a50d89a 100644
--- a/libcpu/m16c/m16c62p/cpuport.c
+++ b/libcpu/m16c/m16c62p/cpuport.c
@@ -113,4 +113,4 @@ void rt_hw_interrupt_enable(rt_base_t level)
     temp = level & 0xffff;
     asm("LDC %0, FLG": :"r" (temp));
 }
-#endif
\ No newline at end of file
+#endif
diff --git a/libcpu/mips/common/asm.h b/libcpu/mips/common/asm.h
index 1b39eea05a..355c05ab39 100644
--- a/libcpu/mips/common/asm.h
+++ b/libcpu/mips/common/asm.h
@@ -1,7 +1,7 @@
 /*
  * Assembly Macros For MIPS
  *
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -18,101 +18,101 @@
 /*
  * LEAF - declare leaf routine
  */
-#define	LEAF(symbol)                        \
-        .globl	symbol;                     \
-        .align	2;                          \
-        .type	symbol,@function;           \
-        .ent	symbol,0;                   \
-symbol:		.frame	sp,0,ra
+#define LEAF(symbol)                        \
+        .globl  symbol;                     \
+        .align  2;                          \
+        .type   symbol,@function;           \
+        .ent    symbol,0;                   \
+symbol:     .frame  sp,0,ra
 
 /*
  * NESTED - declare nested routine entry point
  */
-#define	NESTED(symbol, framesize, rpc)      \
-        .globl	symbol;                     \
-        .align	2;                          \
-        .type	symbol,@function;           \
-        .ent	symbol,0;                   \
-symbol:		.frame	sp, framesize, rpc
+#define NESTED(symbol, framesize, rpc)      \
+        .globl  symbol;                     \
+        .align  2;                          \
+        .type   symbol,@function;           \
+        .ent    symbol,0;                   \
+symbol:     .frame  sp, framesize, rpc
 
 /*
  * END - mark end of function
  */
-#define	END(function)                       \
-        .end	function;		        	\
-        .size	function,.-function
+#define END(function)                       \
+        .end    function;                   \
+        .size   function,.-function
 
 /*
  * EXPORT - export definition of symbol
  */
-#define EXPORT(symbol)						\
-        .globl	symbol;                     \
+#define EXPORT(symbol)                      \
+        .globl  symbol;                     \
 symbol:
 
 /*
  * FEXPORT - export definition of a function symbol
  */
-#define FEXPORT(symbol)						\
-        .globl	symbol;						\
-        .type	symbol,@function;			\
+#define FEXPORT(symbol)                     \
+        .globl  symbol;                     \
+        .type   symbol,@function;           \
 symbol:
 
 /*
  * Global data declaration with size.
  */
-#define EXPORTS(name,sz) 		\
-      .globl name; 				\
-      .type name,@object; 		\
-      .size name,sz; 				\
+#define EXPORTS(name,sz)        \
+      .globl name;              \
+      .type name,@object;       \
+      .size name,sz;                \
 name:
 
 /*
  * Weak data declaration with size.
  */
-#define WEXPORT(name,sz) 		\
-      .weakext name; 				\
-      .type name,@object; 		\
-      .size name,sz; 				\
+#define WEXPORT(name,sz)        \
+      .weakext name;                \
+      .type name,@object;       \
+      .size name,sz;                \
 name:
 
 /*
  * Global data reference with size.
  */
-#define	IMPORT(name, size) 		\
-    .extern	name,size
+#define IMPORT(name, size)      \
+    .extern name,size
 
 /*
  * Global zeroed data.
  */
-#define BSS(name,size) 			\
-      .type name,@object; 		\
-    .comm	name,size
+#define BSS(name,size)          \
+      .type name,@object;       \
+    .comm   name,size
 
 /*
  * Local zeroed data.
  */
-#define LBSS(name,size) 		\
-      .lcomm	name,size
+#define LBSS(name,size)         \
+      .lcomm    name,size
 
 
 /*
  * ABS - export absolute symbol
  */
-#define	ABS(symbol,value)       \
-        .globl	symbol;         \
-symbol		=	value
+#define ABS(symbol,value)       \
+        .globl  symbol;         \
+symbol      =   value
 
 
-#define	TEXT(msg)               \
-        .pushsection .data;		\
-8:		.asciiz	msg;            \
+#define TEXT(msg)               \
+        .pushsection .data;     \
+8:      .asciiz msg;            \
         .popsection;
 
 
-#define ENTRY(name) 			\
-  .globl name;					\
-  .align 2;						\
-  .ent name,0;					\
+#define ENTRY(name)             \
+  .globl name;                  \
+  .align 2;                     \
+  .ent name,0;                  \
   name##:
 
 /*
@@ -122,185 +122,185 @@ symbol		=	value
 /*
  * Size of a register
  */
-#define SZREG	8
+#define SZREG   8
 
 /*
  * Use the following macros in assemblercode to load/store registers,
  * pointers etc.
  */
-#define REG_S		sd
-#define REG_L		ld
-#define REG_SUBU	dsubu
-#define REG_ADDU	daddu
+#define REG_S       sd
+#define REG_L       ld
+#define REG_SUBU    dsubu
+#define REG_ADDU    daddu
 
 /*
  * How to add/sub/load/store/shift C int variables.
  */
-#define INT_ADD		dadd
-#define INT_ADDU	daddu
-#define INT_ADDI	daddi
-#define INT_ADDIU	daddiu
-#define INT_SUB		dsub
-#define INT_SUBU	dsubu
-#define INT_L		ld
-#define INT_S		sd
-#define INT_SLL		dsll
-#define INT_SLLV	dsllv
-#define INT_SRL		dsrl
-#define INT_SRLV	dsrlv
-#define INT_SRA		dsra
-#define INT_SRAV	dsrav
+#define INT_ADD     dadd
+#define INT_ADDU    daddu
+#define INT_ADDI    daddi
+#define INT_ADDIU   daddiu
+#define INT_SUB     dsub
+#define INT_SUBU    dsubu
+#define INT_L       ld
+#define INT_S       sd
+#define INT_SLL     dsll
+#define INT_SLLV    dsllv
+#define INT_SRL     dsrl
+#define INT_SRLV    dsrlv
+#define INT_SRA     dsra
+#define INT_SRAV    dsrav
 
 /*
  * Use the following macros in assemblercode to load/store registers,
  * pointers etc.
  */
-#define LONG_ADD	dadd
-#define LONG_ADDU	daddu
-#define LONG_ADDI	daddi
-#define LONG_ADDIU	daddiu
-#define LONG_SUB	dsub
-#define LONG_SUBU	dsubu
-#define LONG_L		ld
-#define LONG_S		sd
-#define LONG_SP		sdp
-#define LONG_SLL	dsll
-#define LONG_SLLV	dsllv
-#define LONG_SRL	dsrl
-#define LONG_SRLV	dsrlv
-#define LONG_SRA	dsra
-#define LONG_SRAV	dsrav
+#define LONG_ADD    dadd
+#define LONG_ADDU   daddu
+#define LONG_ADDI   daddi
+#define LONG_ADDIU  daddiu
+#define LONG_SUB    dsub
+#define LONG_SUBU   dsubu
+#define LONG_L      ld
+#define LONG_S      sd
+#define LONG_SP     sdp
+#define LONG_SLL    dsll
+#define LONG_SLLV   dsllv
+#define LONG_SRL    dsrl
+#define LONG_SRLV   dsrlv
+#define LONG_SRA    dsra
+#define LONG_SRAV   dsrav
 
-#define LONG		.dword
-#define LONGSIZE	8
-#define LONGMASK	7
-#define LONGLOG		3
+#define LONG        .dword
+#define LONGSIZE    8
+#define LONGMASK    7
+#define LONGLOG     3
 
 /*
  * How to add/sub/load/store/shift pointers.
  */
-#define PTR_ADD		dadd
-#define PTR_ADDU	daddu
-#define PTR_ADDI	daddi
-#define PTR_ADDIU	daddiu
-#define PTR_SUB		dsub
-#define PTR_SUBU	dsubu
-#define PTR_L		ld
-#define PTR_S		sd
-#define PTR_LA		dla
-#define PTR_LI		dli
-#define PTR_SLL		dsll
-#define PTR_SLLV	dsllv
-#define PTR_SRL		dsrl
-#define PTR_SRLV	dsrlv
-#define PTR_SRA		dsra
-#define PTR_SRAV	dsrav
+#define PTR_ADD     dadd
+#define PTR_ADDU    daddu
+#define PTR_ADDI    daddi
+#define PTR_ADDIU   daddiu
+#define PTR_SUB     dsub
+#define PTR_SUBU    dsubu
+#define PTR_L       ld
+#define PTR_S       sd
+#define PTR_LA      dla
+#define PTR_LI      dli
+#define PTR_SLL     dsll
+#define PTR_SLLV    dsllv
+#define PTR_SRL     dsrl
+#define PTR_SRLV    dsrlv
+#define PTR_SRA     dsra
+#define PTR_SRAV    dsrav
 
-#define PTR_SCALESHIFT	3
+#define PTR_SCALESHIFT  3
 
-#define PTR		.dword
-#define PTRSIZE		8
-#define PTRLOG		3
+#define PTR     .dword
+#define PTRSIZE     8
+#define PTRLOG      3
 
-#define MFC0		dmfc0
-#define MTC0		dmtc0
+#define MFC0        dmfc0
+#define MTC0        dmtc0
 
 #else
 /*
  * Size of a register
  */
-#define SZREG	4
+#define SZREG   4
 
 
 /*
  * Use the following macros in assemblercode to load/store registers,
  * pointers etc.
  */
-#define REG_S		sw
-#define REG_L		lw
-#define REG_SUBU	subu
-#define REG_ADDU	addu
+#define REG_S       sw
+#define REG_L       lw
+#define REG_SUBU    subu
+#define REG_ADDU    addu
 
 
 /*
  * How to add/sub/load/store/shift C int variables.
  */
-#define INT_ADD		add
-#define INT_ADDU	addu
-#define INT_ADDI	addi
-#define INT_ADDIU	addiu
-#define INT_SUB		sub
-#define INT_SUBU	subu
-#define INT_L		lw
-#define INT_S		sw
-#define INT_SLL		sll
-#define INT_SLLV	sllv
-#define INT_SRL		srl
-#define INT_SRLV	srlv
-#define INT_SRA		sra
-#define INT_SRAV	srav
+#define INT_ADD     add
+#define INT_ADDU    addu
+#define INT_ADDI    addi
+#define INT_ADDIU   addiu
+#define INT_SUB     sub
+#define INT_SUBU    subu
+#define INT_L       lw
+#define INT_S       sw
+#define INT_SLL     sll
+#define INT_SLLV    sllv
+#define INT_SRL     srl
+#define INT_SRLV    srlv
+#define INT_SRA     sra
+#define INT_SRAV    srav
 
 
 
 /*
  * How to add/sub/load/store/shift C long variables.
  */
-#define LONG_ADD	add
-#define LONG_ADDU	addu
-#define LONG_ADDI	addi
-#define LONG_ADDIU	addiu
-#define LONG_SUB	sub
-#define LONG_SUBU	subu
-#define LONG_L		lw
-#define LONG_S		sw
-#define LONG_SLL	sll
-#define LONG_SLLV	sllv
-#define LONG_SRL	srl
-#define LONG_SRLV	srlv
-#define LONG_SRA	sra
-#define LONG_SRAV	srav
+#define LONG_ADD    add
+#define LONG_ADDU   addu
+#define LONG_ADDI   addi
+#define LONG_ADDIU  addiu
+#define LONG_SUB    sub
+#define LONG_SUBU   subu
+#define LONG_L      lw
+#define LONG_S      sw
+#define LONG_SLL    sll
+#define LONG_SLLV   sllv
+#define LONG_SRL    srl
+#define LONG_SRLV   srlv
+#define LONG_SRA    sra
+#define LONG_SRAV   srav
 
-#define LONG		.word
-#define LONGSIZE	4
-#define LONGMASK	3
-#define LONGLOG		2
+#define LONG        .word
+#define LONGSIZE    4
+#define LONGMASK    3
+#define LONGLOG     2
 
 
 
 /*
  * How to add/sub/load/store/shift pointers.
  */
-#define PTR_ADD		add
-#define PTR_ADDU	addu
-#define PTR_ADDI	addi
-#define PTR_ADDIU	addiu
-#define PTR_SUB		sub
-#define PTR_SUBU	subu
-#define PTR_L		lw
-#define PTR_S		sw
-#define PTR_LA		la
-#define PTR_SLL		sll
-#define PTR_SLLV	sllv
-#define PTR_SRL		srl
-#define PTR_SRLV	srlv
-#define PTR_SRA		sra
-#define PTR_SRAV	srav
+#define PTR_ADD     add
+#define PTR_ADDU    addu
+#define PTR_ADDI    addi
+#define PTR_ADDIU   addiu
+#define PTR_SUB     sub
+#define PTR_SUBU    subu
+#define PTR_L       lw
+#define PTR_S       sw
+#define PTR_LA      la
+#define PTR_SLL     sll
+#define PTR_SLLV    sllv
+#define PTR_SRL     srl
+#define PTR_SRLV    srlv
+#define PTR_SRA     sra
+#define PTR_SRAV    srav
 
-#define PTR_SCALESHIFT	2
+#define PTR_SCALESHIFT  2
 
-#define PTR			.word
-#define PTRSIZE		4
-#define PTRLOG		2
+#define PTR         .word
+#define PTRSIZE     4
+#define PTRLOG      2
 
 
 /*
  * Some cp0 registers were extended to 64bit for MIPS III.
  */
-#define MFC0		mfc0
-#define MTC0		mtc0
+#define MFC0        mfc0
+#define MTC0        mtc0
 
 #endif
 
-#define SSNOP		sll zero, zero, 1
+#define SSNOP       sll zero, zero, 1
 
 #endif /* end of __ASM_H__ */
diff --git a/libcpu/mips/common/exception.c b/libcpu/mips/common/exception.c
index 3da8ecead6..9c9858f5e1 100644
--- a/libcpu/mips/common/exception.c
+++ b/libcpu/mips/common/exception.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -164,7 +164,7 @@ void rt_general_exc_dispatch(struct pt_regs *regs)
 {
     rt_ubase_t cause, exccode;
     cause = read_c0_cause();
-    exccode = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE;    
+    exccode = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE;
 
     if (exccode == 0)
     {
diff --git a/libcpu/mips/common/exception.h b/libcpu/mips/common/exception.h
index 68107f6235..af9312b5bc 100644
--- a/libcpu/mips/common/exception.h
+++ b/libcpu/mips/common/exception.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/mips/common/mips.h b/libcpu/mips/common/mips.h
index 94f664308c..abe3b73945 100644
--- a/libcpu/mips/common/mips.h
+++ b/libcpu/mips/common/mips.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/mips/common/mips_addrspace.h b/libcpu/mips/common/mips_addrspace.h
index f3bb60662e..0bc6a5f181 100644
--- a/libcpu/mips/common/mips_addrspace.h
+++ b/libcpu/mips/common/mips_addrspace.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -19,15 +19,15 @@
 #define _ATYPE_
 #define _ATYPE32_
 #define _ATYPE64_
-#define _CONST64_(x)	x
+#define _CONST64_(x)    x
 #else
-#define _ATYPE_		__PTRDIFF_TYPE__
-#define _ATYPE32_	int
-#define _ATYPE64_	__s64
+#define _ATYPE_     __PTRDIFF_TYPE__
+#define _ATYPE32_   int
+#define _ATYPE64_   __s64
 #ifdef ARCH_MIPS64
-#define _CONST64_(x)	x ## L
+#define _CONST64_(x)    x ## L
 #else
-#define _CONST64_(x)	x ## LL
+#define _CONST64_(x)    x ## LL
 #endif
 #endif
 
@@ -38,21 +38,21 @@
 #define _ACAST32_
 #define _ACAST64_
 #else
-#define _ACAST32_		(_ATYPE_)(_ATYPE32_)	/* widen if necessary */
-#define _ACAST64_		(_ATYPE64_)		/* do _not_ narrow */
+#define _ACAST32_       (_ATYPE_)(_ATYPE32_)    /* widen if necessary */
+#define _ACAST64_       (_ATYPE64_)     /* do _not_ narrow */
 #endif
 
 /*
  * Returns the kernel segment base of a given address
  */
-#define KSEGX(a)		((_ACAST32_ (a)) & 0xe0000000)
+#define KSEGX(a)        ((_ACAST32_ (a)) & 0xe0000000)
 
 /*
  * Returns the physical address of a CKSEGx / XKPHYS address
  */
-#define CPHYSADDR(a)		((_ACAST32_(a)) & 0x1fffffff)
-#define XPHYSADDR(a)		((_ACAST64_(a)) &			\
-				 _CONST64_(0x000000ffffffffff))
+#define CPHYSADDR(a)        ((_ACAST32_(a)) & 0x1fffffff)
+#define XPHYSADDR(a)        ((_ACAST64_(a)) &           \
+                 _CONST64_(0x000000ffffffffff))
 
 #ifdef ARCH_MIPS64
 
@@ -61,56 +61,56 @@
  * The compatibility segments use the full 64-bit sign extended value.  Note
  * the R8000 doesn't have them so don't reference these in generic MIPS code.
  */
-#define XKUSEG			_CONST64_(0x0000000000000000)
-#define XKSSEG			_CONST64_(0x4000000000000000)
-#define XKPHYS			_CONST64_(0x8000000000000000)
-#define XKSEG			_CONST64_(0xc000000000000000)
-#define CKSEG0			_CONST64_(0xffffffff80000000)
-#define CKSEG1			_CONST64_(0xffffffffa0000000)
-#define CKSSEG			_CONST64_(0xffffffffc0000000)
-#define CKSEG3			_CONST64_(0xffffffffe0000000)
+#define XKUSEG          _CONST64_(0x0000000000000000)
+#define XKSSEG          _CONST64_(0x4000000000000000)
+#define XKPHYS          _CONST64_(0x8000000000000000)
+#define XKSEG           _CONST64_(0xc000000000000000)
+#define CKSEG0          _CONST64_(0xffffffff80000000)
+#define CKSEG1          _CONST64_(0xffffffffa0000000)
+#define CKSSEG          _CONST64_(0xffffffffc0000000)
+#define CKSEG3          _CONST64_(0xffffffffe0000000)
 
-#define CKSEG0ADDR(a)		(CPHYSADDR(a) | CKSEG0)
-#define CKSEG1ADDR(a)		(CPHYSADDR(a) | CKSEG1)
-#define CKSEG2ADDR(a)		(CPHYSADDR(a) | CKSEG2)
-#define CKSEG3ADDR(a)		(CPHYSADDR(a) | CKSEG3)
+#define CKSEG0ADDR(a)       (CPHYSADDR(a) | CKSEG0)
+#define CKSEG1ADDR(a)       (CPHYSADDR(a) | CKSEG1)
+#define CKSEG2ADDR(a)       (CPHYSADDR(a) | CKSEG2)
+#define CKSEG3ADDR(a)       (CPHYSADDR(a) | CKSEG3)
 
-#define KUSEGBASE			0xffffffff00000000
-#define KSEG0BASE			0xffffffff80000000
-#define KSEG1BASE			0xffffffffa0000000
-#define KSEG2BASE			0xffffffffc0000000
-#define KSEG3BASE			0xffffffffe0000000
+#define KUSEGBASE           0xffffffff00000000
+#define KSEG0BASE           0xffffffff80000000
+#define KSEG1BASE           0xffffffffa0000000
+#define KSEG2BASE           0xffffffffc0000000
+#define KSEG3BASE           0xffffffffe0000000
 
 #else
 
-#define CKSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0BASE)
-#define CKSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1BASE)
-#define CKSEG2ADDR(a)		(CPHYSADDR(a) | KSEG2BASE)
-#define CKSEG3ADDR(a)		(CPHYSADDR(a) | KSEG3BASE)
+#define CKSEG0ADDR(a)       (CPHYSADDR(a) | KSEG0BASE)
+#define CKSEG1ADDR(a)       (CPHYSADDR(a) | KSEG1BASE)
+#define CKSEG2ADDR(a)       (CPHYSADDR(a) | KSEG2BASE)
+#define CKSEG3ADDR(a)       (CPHYSADDR(a) | KSEG3BASE)
 
 /*
  * Map an address to a certain kernel segment
  */
-#define KSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0BASE)
-#define KSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1BASE)
-#define KSEG2ADDR(a)		(CPHYSADDR(a) | KSEG2BASE)
-#define KSEG3ADDR(a)		(CPHYSADDR(a) | KSEG3BASE)
+#define KSEG0ADDR(a)        (CPHYSADDR(a) | KSEG0BASE)
+#define KSEG1ADDR(a)        (CPHYSADDR(a) | KSEG1BASE)
+#define KSEG2ADDR(a)        (CPHYSADDR(a) | KSEG2BASE)
+#define KSEG3ADDR(a)        (CPHYSADDR(a) | KSEG3BASE)
 
-#define CKUSEG			0x00000000
-#define CKSEG0			0x80000000
-#define CKSEG1			0xa0000000
-#define CKSEG2			0xc0000000
-#define CKSEG3			0xe0000000
+#define CKUSEG          0x00000000
+#define CKSEG0          0x80000000
+#define CKSEG1          0xa0000000
+#define CKSEG2          0xc0000000
+#define CKSEG3          0xe0000000
 
 /*
  * Memory segments (32bit kernel mode addresses)
  * These are the traditional names used in the 32-bit universe.
  */
-#define KUSEGBASE			0x00000000
-#define KSEG0BASE			0x80000000
-#define KSEG1BASE			0xa0000000
-#define KSEG2BASE			0xc0000000
-#define KSEG3BASE			0xe0000000
+#define KUSEGBASE           0x00000000
+#define KSEG0BASE           0x80000000
+#define KSEG1BASE           0xa0000000
+#define KSEG2BASE           0xc0000000
+#define KSEG3BASE           0xe0000000
 
 #endif
 
@@ -118,23 +118,23 @@
 /*
  * Cache modes for XKPHYS address conversion macros
  */
-#define K_CALG_COH_EXCL1_NOL2	0
-#define K_CALG_COH_SHRL1_NOL2	1
-#define K_CALG_UNCACHED		2
-#define K_CALG_NONCOHERENT	3
-#define K_CALG_COH_EXCL		4
-#define K_CALG_COH_SHAREABLE	5
-#define K_CALG_NOTUSED		6
-#define K_CALG_UNCACHED_ACCEL	7
+#define K_CALG_COH_EXCL1_NOL2   0
+#define K_CALG_COH_SHRL1_NOL2   1
+#define K_CALG_UNCACHED     2
+#define K_CALG_NONCOHERENT  3
+#define K_CALG_COH_EXCL     4
+#define K_CALG_COH_SHAREABLE    5
+#define K_CALG_NOTUSED      6
+#define K_CALG_UNCACHED_ACCEL   7
 
 /*
  * 64-bit address conversions
  */
-#define PHYS_TO_XKSEG_UNCACHED(p)	PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
-#define PHYS_TO_XKSEG_CACHED(p)		PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
-#define XKPHYS_TO_PHYS(p)		((p) & TO_PHYS_MASK)
-#define PHYS_TO_XKPHYS(cm, a)		(_CONST64_(0x8000000000000000) | \
-					 (_CONST64_(cm) << 59) | (a))
+#define PHYS_TO_XKSEG_UNCACHED(p)   PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
+#define PHYS_TO_XKSEG_CACHED(p)     PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
+#define XKPHYS_TO_PHYS(p)       ((p) & TO_PHYS_MASK)
+#define PHYS_TO_XKPHYS(cm, a)       (_CONST64_(0x8000000000000000) | \
+                     (_CONST64_(cm) << 59) | (a))
 
 /*
  * Returns the uncached address of a sdram address
@@ -146,20 +146,20 @@
  * the region, 3 bits for the CCA mode.  This leaves 59 bits of which the
  * R8000 implements most with its 48-bit physical address space.
  */
-#define TO_PHYS_MASK	_CONST64_(0x07ffffffffffffff)	/* 2^^59 - 1 */
-#define COMPAT_K1BASE32		_CONST64_(0xffffffffa0000000)
-#define PHYS_TO_COMPATK1(x)	((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
+#define TO_PHYS_MASK    _CONST64_(0x07ffffffffffffff)   /* 2^^59 - 1 */
+#define COMPAT_K1BASE32     _CONST64_(0xffffffffa0000000)
+#define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
 
-#define KDM_TO_PHYS(x)		(_ACAST64_ (x) & TO_PHYS_MASK)
-#define PHYS_TO_K0(x)		(_ACAST64_ (x) | CAC_BASE)
+#define KDM_TO_PHYS(x)      (_ACAST64_ (x) & TO_PHYS_MASK)
+#define PHYS_TO_K0(x)       (_ACAST64_ (x) | CAC_BASE)
 #endif
 
 
 #ifndef __ASSEMBLY__
-#define REG8( addr )		  (*(volatile u8 *) (addr))
-#define REG16( addr )		  (*(volatile u16 *)(addr))
-#define REG32( addr )		  (*(volatile u32 *)(addr))
-#define REG64( addr )		  (*(volatile u64 *)(addr))
+#define REG8( addr )          (*(volatile u8 *) (addr))
+#define REG16( addr )         (*(volatile u16 *)(addr))
+#define REG32( addr )         (*(volatile u32 *)(addr))
+#define REG64( addr )         (*(volatile u64 *)(addr))
 #endif
 
 #endif /* _MIPS_ADDRSPACE_H_ */
diff --git a/libcpu/mips/common/mips_cache.c b/libcpu/mips/common/mips_cache.c
index 8c86bb131a..a969f5c751 100644
--- a/libcpu/mips/common/mips_cache.c
+++ b/libcpu/mips/common/mips_cache.c
@@ -1,21 +1,7 @@
 /*
- * File      : mips_cache.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -28,7 +14,7 @@
 extern void cache_init(rt_ubase_t cache_size, rt_ubase_t cache_line_size);
 void r4k_cache_init(void)
 {
-//	cache_init(dcache_size, cpu_dcache_line_size);
+//  cache_init(dcache_size, cpu_dcache_line_size);
 }
 
 void r4k_cache_flush_all(void)
@@ -45,7 +31,7 @@ void r4k_icache_flush_all(void)
 
 void r4k_icache_flush_range(rt_ubase_t addr, rt_ubase_t size)
 {
-	rt_ubase_t end, a;
+    rt_ubase_t end, a;
 
     if (size > g_mips_core.icache_size)
     {
@@ -53,7 +39,7 @@ void r4k_icache_flush_range(rt_ubase_t addr, rt_ubase_t size)
     }
     else
     {
-    	rt_ubase_t ic_lsize = g_mips_core.icache_line_size;
+        rt_ubase_t ic_lsize = g_mips_core.icache_line_size;
 
         a = addr & ~(ic_lsize - 1);
         end = ((addr + size) - 1) & ~(ic_lsize - 1);
@@ -69,8 +55,8 @@ void r4k_icache_flush_range(rt_ubase_t addr, rt_ubase_t size)
 
 void r4k_icache_lock_range(rt_ubase_t addr, rt_ubase_t size)
 {
-	rt_ubase_t end, a;
-	rt_ubase_t ic_lsize = g_mips_core.icache_line_size;
+    rt_ubase_t end, a;
+    rt_ubase_t ic_lsize = g_mips_core.icache_line_size;
 
     a = addr & ~(ic_lsize - 1);
     end = ((addr + size) - 1) & ~(ic_lsize - 1);
@@ -85,7 +71,7 @@ void r4k_icache_lock_range(rt_ubase_t addr, rt_ubase_t size)
 
 void r4k_dcache_inv(rt_ubase_t addr, rt_ubase_t size)
 {
-	rt_ubase_t end, a;
+    rt_ubase_t end, a;
     rt_ubase_t dc_lsize = g_mips_core.dcache_line_size;
 
     a = addr & ~(dc_lsize - 1);
@@ -101,7 +87,7 @@ void r4k_dcache_inv(rt_ubase_t addr, rt_ubase_t size)
 
 void r4k_dcache_wback_inv(rt_ubase_t addr, rt_ubase_t size)
 {
-	rt_ubase_t end, a;
+    rt_ubase_t end, a;
 
     if (size >= g_mips_core.dcache_size)
     {
@@ -109,7 +95,7 @@ void r4k_dcache_wback_inv(rt_ubase_t addr, rt_ubase_t size)
     }
     else
     {
-    	rt_ubase_t dc_lsize = g_mips_core.dcache_line_size;
+        rt_ubase_t dc_lsize = g_mips_core.dcache_line_size;
 
         a = addr & ~(dc_lsize - 1);
         end = ((addr + size) - 1) & ~(dc_lsize - 1);
diff --git a/libcpu/mips/common/mips_cache.h b/libcpu/mips/common/mips_cache.h
index 438dd76cde..4a459b1ae4 100644
--- a/libcpu/mips/common/mips_cache.h
+++ b/libcpu/mips/common/mips_cache.h
@@ -1,21 +1,7 @@
 /*
- * File      : mips_cache.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -116,7 +102,7 @@ enum dma_data_direction
 #define INDEX_STORE_DATA_D      0x1d
 #define INDEX_STORE_DATA_S      0x1f
 
-#define cache_op(op, addr)		    \
+#define cache_op(op, addr)          \
     __asm__ __volatile__(        \
         ".set   push\n"             \
         ".set   noreorder\n"        \
@@ -126,95 +112,95 @@ enum dma_data_direction
         :                           \
         : "i" (op), "R" (*(unsigned char *)(addr)))
 
-#define cache16_unroll32(base, op)					\
-	__asm__ __volatile__(						\
-	"	.set noreorder					\n"	\
-	"	.set mips3					\n"	\
-	"	cache %1, 0x000(%0); cache %1, 0x010(%0)	\n"	\
-	"	cache %1, 0x020(%0); cache %1, 0x030(%0)	\n"	\
-	"	cache %1, 0x040(%0); cache %1, 0x050(%0)	\n"	\
-	"	cache %1, 0x060(%0); cache %1, 0x070(%0)	\n"	\
-	"	cache %1, 0x080(%0); cache %1, 0x090(%0)	\n"	\
-	"	cache %1, 0x0a0(%0); cache %1, 0x0b0(%0)	\n"	\
-	"	cache %1, 0x0c0(%0); cache %1, 0x0d0(%0)	\n"	\
-	"	cache %1, 0x0e0(%0); cache %1, 0x0f0(%0)	\n"	\
-	"	cache %1, 0x100(%0); cache %1, 0x110(%0)	\n"	\
-	"	cache %1, 0x120(%0); cache %1, 0x130(%0)	\n"	\
-	"	cache %1, 0x140(%0); cache %1, 0x150(%0)	\n"	\
-	"	cache %1, 0x160(%0); cache %1, 0x170(%0)	\n"	\
-	"	cache %1, 0x180(%0); cache %1, 0x190(%0)	\n"	\
-	"	cache %1, 0x1a0(%0); cache %1, 0x1b0(%0)	\n"	\
-	"	cache %1, 0x1c0(%0); cache %1, 0x1d0(%0)	\n"	\
-	"	cache %1, 0x1e0(%0); cache %1, 0x1f0(%0)	\n"	\
-	"	.set mips0					\n"	\
-	"	.set reorder					\n"	\
-		:							\
-		: "r" (base),						\
-		  "i" (op));
+#define cache16_unroll32(base, op)                  \
+    __asm__ __volatile__(                       \
+    "   .set noreorder                  \n" \
+    "   .set mips3                  \n" \
+    "   cache %1, 0x000(%0); cache %1, 0x010(%0)    \n" \
+    "   cache %1, 0x020(%0); cache %1, 0x030(%0)    \n" \
+    "   cache %1, 0x040(%0); cache %1, 0x050(%0)    \n" \
+    "   cache %1, 0x060(%0); cache %1, 0x070(%0)    \n" \
+    "   cache %1, 0x080(%0); cache %1, 0x090(%0)    \n" \
+    "   cache %1, 0x0a0(%0); cache %1, 0x0b0(%0)    \n" \
+    "   cache %1, 0x0c0(%0); cache %1, 0x0d0(%0)    \n" \
+    "   cache %1, 0x0e0(%0); cache %1, 0x0f0(%0)    \n" \
+    "   cache %1, 0x100(%0); cache %1, 0x110(%0)    \n" \
+    "   cache %1, 0x120(%0); cache %1, 0x130(%0)    \n" \
+    "   cache %1, 0x140(%0); cache %1, 0x150(%0)    \n" \
+    "   cache %1, 0x160(%0); cache %1, 0x170(%0)    \n" \
+    "   cache %1, 0x180(%0); cache %1, 0x190(%0)    \n" \
+    "   cache %1, 0x1a0(%0); cache %1, 0x1b0(%0)    \n" \
+    "   cache %1, 0x1c0(%0); cache %1, 0x1d0(%0)    \n" \
+    "   cache %1, 0x1e0(%0); cache %1, 0x1f0(%0)    \n" \
+    "   .set mips0                  \n" \
+    "   .set reorder                    \n" \
+        :                           \
+        : "r" (base),                       \
+          "i" (op));
 
 
 static inline void flush_icache_line_indexed(rt_ubase_t addr)
 {
-	cache_op(INDEX_INVALIDATE_I, addr);
+    cache_op(INDEX_INVALIDATE_I, addr);
 }
 
 static inline void flush_dcache_line_indexed(rt_ubase_t addr)
 {
-	cache_op(INDEX_WRITEBACK_INV_D, addr);
+    cache_op(INDEX_WRITEBACK_INV_D, addr);
 }
 
 static inline void flush_icache_line(rt_ubase_t addr)
 {
-	cache_op(HIT_INVALIDATE_I, addr);
+    cache_op(HIT_INVALIDATE_I, addr);
 }
 
 static inline void lock_icache_line(rt_ubase_t addr)
 {
-	cache_op(FETCH_AND_LOCK_I, addr);
+    cache_op(FETCH_AND_LOCK_I, addr);
 }
 
 static inline void lock_dcache_line(rt_ubase_t addr)
 {
-	cache_op(FETCH_AND_LOCK_D, addr);
+    cache_op(FETCH_AND_LOCK_D, addr);
 }
 
 static inline void flush_dcache_line(rt_ubase_t addr)
 {
-	cache_op(HIT_WRITEBACK_INV_D, addr);
+    cache_op(HIT_WRITEBACK_INV_D, addr);
 }
 
 static inline void invalidate_dcache_line(rt_ubase_t addr)
 {
-	cache_op(HIT_INVALIDATE_D, addr);
+    cache_op(HIT_INVALIDATE_D, addr);
 }
 static inline void blast_dcache16(void)
 {
-	rt_ubase_t start = KSEG0BASE;
-	rt_ubase_t end = start + g_mips_core.dcache_size;
-	rt_ubase_t addr;
+    rt_ubase_t start = KSEG0BASE;
+    rt_ubase_t end = start + g_mips_core.dcache_size;
+    rt_ubase_t addr;
 
-	for (addr = start; addr < end; addr += g_mips_core.dcache_line_size)
-		cache16_unroll32(addr, INDEX_WRITEBACK_INV_D);
+    for (addr = start; addr < end; addr += g_mips_core.dcache_line_size)
+        cache16_unroll32(addr, INDEX_WRITEBACK_INV_D);
 }
 
 static inline void inv_dcache16(void)
 {
-	rt_ubase_t start = KSEG0BASE;
-	rt_ubase_t end = start + g_mips_core.dcache_size;
-	rt_ubase_t addr;
+    rt_ubase_t start = KSEG0BASE;
+    rt_ubase_t end = start + g_mips_core.dcache_size;
+    rt_ubase_t addr;
 
-	for (addr = start; addr < end; addr += g_mips_core.dcache_line_size)
-		cache16_unroll32(addr, HIT_INVALIDATE_D);
+    for (addr = start; addr < end; addr += g_mips_core.dcache_line_size)
+        cache16_unroll32(addr, HIT_INVALIDATE_D);
 }
 
 static inline void blast_icache16(void)
 {
-	rt_ubase_t start = KSEG0BASE;
-	rt_ubase_t end = start + g_mips_core.icache_size;
-	rt_ubase_t addr;
+    rt_ubase_t start = KSEG0BASE;
+    rt_ubase_t end = start + g_mips_core.icache_size;
+    rt_ubase_t addr;
 
-	for (addr = start; addr < end; addr += g_mips_core.icache_line_size)
-		cache16_unroll32(addr, INDEX_INVALIDATE_I);
+    for (addr = start; addr < end; addr += g_mips_core.icache_line_size)
+        cache16_unroll32(addr, INDEX_INVALIDATE_I);
 }
 
 void r4k_cache_init(void);
diff --git a/libcpu/mips/common/mips_cfg.h b/libcpu/mips/common/mips_cfg.h
index f7e38b4af4..d5531e35fb 100644
--- a/libcpu/mips/common/mips_cfg.h
+++ b/libcpu/mips/common/mips_cfg.h
@@ -1,21 +1,7 @@
 /*
- * File      : mips_cfg.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -38,7 +24,7 @@ typedef struct mips32_core_cfg
     uint16_t dcache_ways;
     uint16_t dcache_size;
 
-    uint16_t max_tlb_entries;	/* number of tlb entry */
+    uint16_t max_tlb_entries;   /* number of tlb entry */
 } mips32_core_cfg_t;
 
 extern mips32_core_cfg_t g_mips_core;
diff --git a/libcpu/mips/common/mips_fpu.h b/libcpu/mips/common/mips_fpu.h
index 50df3746a5..85aa125fa3 100644
--- a/libcpu/mips/common/mips_fpu.h
+++ b/libcpu/mips/common/mips_fpu.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/mips/common/mips_regs.h b/libcpu/mips/common/mips_regs.h
index a13e24b539..a2f6053cf5 100644
--- a/libcpu/mips/common/mips_regs.h
+++ b/libcpu/mips/common/mips_regs.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -11,129 +11,129 @@
 #ifndef _MIPS_REGS_H_
 #define _MIPS_REGS_H_
 #include 
-#define REG_A0	4
-#define REG_SP	29
-#define REG_GP	28
-#define REG_FP	30
-#define REG_RA	31
+#define REG_A0  4
+#define REG_SP  29
+#define REG_GP  28
+#define REG_FP  30
+#define REG_RA  31
 
 #ifndef ARCH_MIPS64
-#define zero	$0	/* wired zero */
-#define AT	$1	/* assembler temp  - uppercase because of ".set at" */
-#define v0	$2	/* return value */
-#define v1	$3
-#define a0	$4	/* argument registers */
-#define a1	$5
-#define a2	$6
-#define a3	$7
-#define t0	$8	/* caller saved */
-#define t1	$9
-#define t2	$10
-#define t3	$11
-#define t4	$12
-#define ta0	$12
-#define t5	$13
-#define ta1	$13
-#define t6	$14
-#define ta2	$14
-#define t7	$15
-#define ta3	$15
-#define s0	$16	/* callee saved */
-#define s1	$17
-#define s2	$18
-#define s3	$19
-#define s4	$20
-#define s5	$21
-#define s6	$22
-#define s7	$23
-#define t8	$24	/* caller saved */
-#define t9	$25
-#define jp	$25	/* PIC jump register */
-#define k0	$26	/* kernel scratch */
-#define k1	$27
-#define gp	$28	/* global pointer */
-#define sp	$29	/* stack pointer */
-#define fp	$30	/* frame pointer */
-#define s8	$30	/* same like fp! */
-#define ra	$31	/* return address */
+#define zero    $0  /* wired zero */
+#define AT  $1  /* assembler temp  - uppercase because of ".set at" */
+#define v0  $2  /* return value */
+#define v1  $3
+#define a0  $4  /* argument registers */
+#define a1  $5
+#define a2  $6
+#define a3  $7
+#define t0  $8  /* caller saved */
+#define t1  $9
+#define t2  $10
+#define t3  $11
+#define t4  $12
+#define ta0 $12
+#define t5  $13
+#define ta1 $13
+#define t6  $14
+#define ta2 $14
+#define t7  $15
+#define ta3 $15
+#define s0  $16 /* callee saved */
+#define s1  $17
+#define s2  $18
+#define s3  $19
+#define s4  $20
+#define s5  $21
+#define s6  $22
+#define s7  $23
+#define t8  $24 /* caller saved */
+#define t9  $25
+#define jp  $25 /* PIC jump register */
+#define k0  $26 /* kernel scratch */
+#define k1  $27
+#define gp  $28 /* global pointer */
+#define sp  $29 /* stack pointer */
+#define fp  $30 /* frame pointer */
+#define s8  $30 /* same like fp! */
+#define ra  $31 /* return address */
 
 #else
 
-#define zero	$0	/* wired zero */
-#define AT	$at	/* assembler temp - uppercase because of ".set at" */
-#define v0	$2	/* return value - caller saved */
-#define v1	$3
-#define a0	$4	/* argument registers */
-#define a1	$5
-#define a2	$6
-#define a3	$7
-#define a4	$8	/* arg reg 64 bit; caller saved in 32 bit */
-#define ta0	$8
-#define a5	$9
-#define ta1	$9
-#define a6	$10
-#define ta2	$10
-#define a7	$11
-#define ta3	$11
-#define t0	$12	/* caller saved */
-#define t1	$13
-#define t2	$14
-#define t3	$15
-#define s0	$16	/* callee saved */
-#define s1	$17
-#define s2	$18
-#define s3	$19
-#define s4	$20
-#define s5	$21
-#define s6	$22
-#define s7	$23
-#define t8	$24	/* caller saved */
-#define t9	$25	/* callee address for PIC/temp */
-#define jp	$25	/* PIC jump register */
-#define k0	$26	/* kernel temporary */
-#define k1	$27
-#define gp	$28	/* global pointer - caller saved for PIC */
-#define sp	$29	/* stack pointer */
-#define fp	$30	/* frame pointer */
-#define s8	$30	/* callee saved */
-#define ra	$31	/* return address */
+#define zero    $0  /* wired zero */
+#define AT  $at /* assembler temp - uppercase because of ".set at" */
+#define v0  $2  /* return value - caller saved */
+#define v1  $3
+#define a0  $4  /* argument registers */
+#define a1  $5
+#define a2  $6
+#define a3  $7
+#define a4  $8  /* arg reg 64 bit; caller saved in 32 bit */
+#define ta0 $8
+#define a5  $9
+#define ta1 $9
+#define a6  $10
+#define ta2 $10
+#define a7  $11
+#define ta3 $11
+#define t0  $12 /* caller saved */
+#define t1  $13
+#define t2  $14
+#define t3  $15
+#define s0  $16 /* callee saved */
+#define s1  $17
+#define s2  $18
+#define s3  $19
+#define s4  $20
+#define s5  $21
+#define s6  $22
+#define s7  $23
+#define t8  $24 /* caller saved */
+#define t9  $25 /* callee address for PIC/temp */
+#define jp  $25 /* PIC jump register */
+#define k0  $26 /* kernel temporary */
+#define k1  $27
+#define gp  $28 /* global pointer - caller saved for PIC */
+#define sp  $29 /* stack pointer */
+#define fp  $30 /* frame pointer */
+#define s8  $30 /* callee saved */
+#define ra  $31 /* return address */
 
 #endif
 
-#define fv0	$f0	 /* return value */
-#define fv0f	$f1
-#define fv1	$f2
-#define fv1f	$f3
-#define fa0	$f12	 /* argument registers */
-#define fa0f	$f13
-#define fa1	$f14
-#define fa1f	$f15
-#define ft0	$f4	 /* caller saved */
-#define ft0f	$f5
-#define ft1	$f6
-#define ft1f	$f7
-#define ft2	$f8
-#define ft2f	$f9
-#define ft3	$f10
-#define ft3f	$f11
-#define ft4	$f16
-#define ft4f	$f17
-#define ft5	$f18
-#define ft5f	$f19
-#define fs0	$f20	 /* callee saved */
-#define fs0f	$f21
-#define fs1	$f22
-#define fs1f	$f23
-#define fs2	$f24
-#define fs2f	$f25
-#define fs3	$f26
-#define fs3f	$f27
-#define fs4	$f28
-#define fs4f	$f29
-#define fs5	$f30
-#define fs5f	$f31
+#define fv0 $f0  /* return value */
+#define fv0f    $f1
+#define fv1 $f2
+#define fv1f    $f3
+#define fa0 $f12     /* argument registers */
+#define fa0f    $f13
+#define fa1 $f14
+#define fa1f    $f15
+#define ft0 $f4  /* caller saved */
+#define ft0f    $f5
+#define ft1 $f6
+#define ft1f    $f7
+#define ft2 $f8
+#define ft2f    $f9
+#define ft3 $f10
+#define ft3f    $f11
+#define ft4 $f16
+#define ft4f    $f17
+#define ft5 $f18
+#define ft5f    $f19
+#define fs0 $f20     /* callee saved */
+#define fs0f    $f21
+#define fs1 $f22
+#define fs1f    $f23
+#define fs2 $f24
+#define fs2f    $f25
+#define fs3 $f26
+#define fs3f    $f27
+#define fs4 $f28
+#define fs4f    $f29
+#define fs5 $f30
+#define fs5f    $f31
 
-#define fcr31	$31	 /* FPU status register */
+#define fcr31   $31  /* FPU status register */
 
 
 /*
@@ -217,157 +217,157 @@
 /*
  *  TX39 Series
  */
-#define CP0_TX39_CACHE	$7
+#define CP0_TX39_CACHE  $7
 
 /*
  * Coprocessor 1 (FPU) register names
  */
-#define CP1_REVISION	$0
-#define CP1_UFR		$1
-#define CP1_UNFR	$4
-#define CP1_FCCR	$25
-#define CP1_FEXR	$26
-#define CP1_FENR	$28
-#define CP1_STATUS	$31
+#define CP1_REVISION    $0
+#define CP1_UFR     $1
+#define CP1_UNFR    $4
+#define CP1_FCCR    $25
+#define CP1_FEXR    $26
+#define CP1_FENR    $28
+#define CP1_STATUS  $31
 
 
 /*
  * Bits in the MIPS32/64 coprocessor 1 (FPU) revision register.
  */
-#define MIPS_FPIR_S		(_ULCAST_(1) << 16)
-#define MIPS_FPIR_D		(_ULCAST_(1) << 17)
-#define MIPS_FPIR_PS		(_ULCAST_(1) << 18)
-#define MIPS_FPIR_3D		(_ULCAST_(1) << 19)
-#define MIPS_FPIR_W		(_ULCAST_(1) << 20)
-#define MIPS_FPIR_L		(_ULCAST_(1) << 21)
-#define MIPS_FPIR_F64		(_ULCAST_(1) << 22)
-#define MIPS_FPIR_HAS2008	(_ULCAST_(1) << 23)
-#define MIPS_FPIR_UFRP		(_ULCAST_(1) << 28)
-#define MIPS_FPIR_FREP		(_ULCAST_(1) << 29)
+#define MIPS_FPIR_S     (_ULCAST_(1) << 16)
+#define MIPS_FPIR_D     (_ULCAST_(1) << 17)
+#define MIPS_FPIR_PS        (_ULCAST_(1) << 18)
+#define MIPS_FPIR_3D        (_ULCAST_(1) << 19)
+#define MIPS_FPIR_W     (_ULCAST_(1) << 20)
+#define MIPS_FPIR_L     (_ULCAST_(1) << 21)
+#define MIPS_FPIR_F64       (_ULCAST_(1) << 22)
+#define MIPS_FPIR_HAS2008   (_ULCAST_(1) << 23)
+#define MIPS_FPIR_UFRP      (_ULCAST_(1) << 28)
+#define MIPS_FPIR_FREP      (_ULCAST_(1) << 29)
 
 /*
  * Bits in the MIPS32/64 coprocessor 1 (FPU) condition codes register.
  */
-#define MIPS_FCCR_CONDX_S	0
-#define MIPS_FCCR_CONDX		(_ULCAST_(255) << MIPS_FCCR_CONDX_S)
-#define MIPS_FCCR_COND0_S	0
-#define MIPS_FCCR_COND0		(_ULCAST_(1) << MIPS_FCCR_COND0_S)
-#define MIPS_FCCR_COND1_S	1
-#define MIPS_FCCR_COND1		(_ULCAST_(1) << MIPS_FCCR_COND1_S)
-#define MIPS_FCCR_COND2_S	2
-#define MIPS_FCCR_COND2		(_ULCAST_(1) << MIPS_FCCR_COND2_S)
-#define MIPS_FCCR_COND3_S	3
-#define MIPS_FCCR_COND3		(_ULCAST_(1) << MIPS_FCCR_COND3_S)
-#define MIPS_FCCR_COND4_S	4
-#define MIPS_FCCR_COND4		(_ULCAST_(1) << MIPS_FCCR_COND4_S)
-#define MIPS_FCCR_COND5_S	5
-#define MIPS_FCCR_COND5		(_ULCAST_(1) << MIPS_FCCR_COND5_S)
-#define MIPS_FCCR_COND6_S	6
-#define MIPS_FCCR_COND6		(_ULCAST_(1) << MIPS_FCCR_COND6_S)
-#define MIPS_FCCR_COND7_S	7
-#define MIPS_FCCR_COND7		(_ULCAST_(1) << MIPS_FCCR_COND7_S)
+#define MIPS_FCCR_CONDX_S   0
+#define MIPS_FCCR_CONDX     (_ULCAST_(255) << MIPS_FCCR_CONDX_S)
+#define MIPS_FCCR_COND0_S   0
+#define MIPS_FCCR_COND0     (_ULCAST_(1) << MIPS_FCCR_COND0_S)
+#define MIPS_FCCR_COND1_S   1
+#define MIPS_FCCR_COND1     (_ULCAST_(1) << MIPS_FCCR_COND1_S)
+#define MIPS_FCCR_COND2_S   2
+#define MIPS_FCCR_COND2     (_ULCAST_(1) << MIPS_FCCR_COND2_S)
+#define MIPS_FCCR_COND3_S   3
+#define MIPS_FCCR_COND3     (_ULCAST_(1) << MIPS_FCCR_COND3_S)
+#define MIPS_FCCR_COND4_S   4
+#define MIPS_FCCR_COND4     (_ULCAST_(1) << MIPS_FCCR_COND4_S)
+#define MIPS_FCCR_COND5_S   5
+#define MIPS_FCCR_COND5     (_ULCAST_(1) << MIPS_FCCR_COND5_S)
+#define MIPS_FCCR_COND6_S   6
+#define MIPS_FCCR_COND6     (_ULCAST_(1) << MIPS_FCCR_COND6_S)
+#define MIPS_FCCR_COND7_S   7
+#define MIPS_FCCR_COND7     (_ULCAST_(1) << MIPS_FCCR_COND7_S)
 
 /*
  * Bits in the MIPS32/64 coprocessor 1 (FPU) enables register.
  */
-#define MIPS_FENR_FS_S		2
-#define MIPS_FENR_FS		(_ULCAST_(1) << MIPS_FENR_FS_S)
+#define MIPS_FENR_FS_S      2
+#define MIPS_FENR_FS        (_ULCAST_(1) << MIPS_FENR_FS_S)
 
 /*
  * FPU Status Register Values
  */
-#define FPU_CSR_COND_S	23					/* $fcc0 */
-#define FPU_CSR_COND	(_ULCAST_(1) << FPU_CSR_COND_S)
+#define FPU_CSR_COND_S  23                  /* $fcc0 */
+#define FPU_CSR_COND    (_ULCAST_(1) << FPU_CSR_COND_S)
 
-#define FPU_CSR_FS_S	24		/* flush denormalised results to 0 */
-#define FPU_CSR_FS	(_ULCAST_(1) << FPU_CSR_FS_S)
+#define FPU_CSR_FS_S    24      /* flush denormalised results to 0 */
+#define FPU_CSR_FS  (_ULCAST_(1) << FPU_CSR_FS_S)
 
 #define FPU_CSR_FO      0x00400000
 #define FPU_CSR_FN      0x00200000
 
-#define FPU_CSR_CONDX_S	25					/* $fcc[7:1] */
-#define FPU_CSR_CONDX	(_ULCAST_(127) << FPU_CSR_CONDX_S)
-#define FPU_CSR_COND1_S	25					/* $fcc1 */
-#define FPU_CSR_COND1	(_ULCAST_(1) << FPU_CSR_COND1_S)
-#define FPU_CSR_COND2_S	26					/* $fcc2 */
-#define FPU_CSR_COND2	(_ULCAST_(1) << FPU_CSR_COND2_S)
-#define FPU_CSR_COND3_S	27					/* $fcc3 */
-#define FPU_CSR_COND3	(_ULCAST_(1) << FPU_CSR_COND3_S)
-#define FPU_CSR_COND4_S	28					/* $fcc4 */
-#define FPU_CSR_COND4	(_ULCAST_(1) << FPU_CSR_COND4_S)
-#define FPU_CSR_COND5_S	29					/* $fcc5 */
-#define FPU_CSR_COND5	(_ULCAST_(1) << FPU_CSR_COND5_S)
-#define FPU_CSR_COND6_S	30					/* $fcc6 */
-#define FPU_CSR_COND6	(_ULCAST_(1) << FPU_CSR_COND6_S)
-#define FPU_CSR_COND7_S	31					/* $fcc7 */
-#define FPU_CSR_COND7	(_ULCAST_(1) << FPU_CSR_COND7_S)
+#define FPU_CSR_CONDX_S 25                  /* $fcc[7:1] */
+#define FPU_CSR_CONDX   (_ULCAST_(127) << FPU_CSR_CONDX_S)
+#define FPU_CSR_COND1_S 25                  /* $fcc1 */
+#define FPU_CSR_COND1   (_ULCAST_(1) << FPU_CSR_COND1_S)
+#define FPU_CSR_COND2_S 26                  /* $fcc2 */
+#define FPU_CSR_COND2   (_ULCAST_(1) << FPU_CSR_COND2_S)
+#define FPU_CSR_COND3_S 27                  /* $fcc3 */
+#define FPU_CSR_COND3   (_ULCAST_(1) << FPU_CSR_COND3_S)
+#define FPU_CSR_COND4_S 28                  /* $fcc4 */
+#define FPU_CSR_COND4   (_ULCAST_(1) << FPU_CSR_COND4_S)
+#define FPU_CSR_COND5_S 29                  /* $fcc5 */
+#define FPU_CSR_COND5   (_ULCAST_(1) << FPU_CSR_COND5_S)
+#define FPU_CSR_COND6_S 30                  /* $fcc6 */
+#define FPU_CSR_COND6   (_ULCAST_(1) << FPU_CSR_COND6_S)
+#define FPU_CSR_COND7_S 31                  /* $fcc7 */
+#define FPU_CSR_COND7   (_ULCAST_(1) << FPU_CSR_COND7_S)
 
 /*
  * Bits 22:20 of the FPU Status Register will be read as 0,
  * and should be written as zero.
  */
-#define FPU_CSR_RSVD	(_ULCAST_(7) << 20)
+#define FPU_CSR_RSVD    (_ULCAST_(7) << 20)
 
-#define FPU_CSR_ABS2008	(_ULCAST_(1) << 19)
-#define FPU_CSR_NAN2008	(_ULCAST_(1) << 18)
+#define FPU_CSR_ABS2008 (_ULCAST_(1) << 19)
+#define FPU_CSR_NAN2008 (_ULCAST_(1) << 18)
 
 /*
  * X the exception cause indicator
  * E the exception enable
  * S the sticky/flag bit
 */
-#define FPU_CSR_ALL_X	0x0003f000
-#define FPU_CSR_UNI_X	0x00020000
-#define FPU_CSR_INV_X	0x00010000
-#define FPU_CSR_DIV_X	0x00008000
-#define FPU_CSR_OVF_X	0x00004000
-#define FPU_CSR_UDF_X	0x00002000
-#define FPU_CSR_INE_X	0x00001000
+#define FPU_CSR_ALL_X   0x0003f000
+#define FPU_CSR_UNI_X   0x00020000
+#define FPU_CSR_INV_X   0x00010000
+#define FPU_CSR_DIV_X   0x00008000
+#define FPU_CSR_OVF_X   0x00004000
+#define FPU_CSR_UDF_X   0x00002000
+#define FPU_CSR_INE_X   0x00001000
 
-#define FPU_CSR_ALL_E	0x00000f80
-#define FPU_CSR_INV_E	0x00000800
-#define FPU_CSR_DIV_E	0x00000400
-#define FPU_CSR_OVF_E	0x00000200
-#define FPU_CSR_UDF_E	0x00000100
-#define FPU_CSR_INE_E	0x00000080
+#define FPU_CSR_ALL_E   0x00000f80
+#define FPU_CSR_INV_E   0x00000800
+#define FPU_CSR_DIV_E   0x00000400
+#define FPU_CSR_OVF_E   0x00000200
+#define FPU_CSR_UDF_E   0x00000100
+#define FPU_CSR_INE_E   0x00000080
 
-#define FPU_CSR_ALL_S	0x0000007c
-#define FPU_CSR_INV_S	0x00000040
-#define FPU_CSR_DIV_S	0x00000020
-#define FPU_CSR_OVF_S	0x00000010
-#define FPU_CSR_UDF_S	0x00000008
-#define FPU_CSR_INE_S	0x00000004
+#define FPU_CSR_ALL_S   0x0000007c
+#define FPU_CSR_INV_S   0x00000040
+#define FPU_CSR_DIV_S   0x00000020
+#define FPU_CSR_OVF_S   0x00000010
+#define FPU_CSR_UDF_S   0x00000008
+#define FPU_CSR_INE_S   0x00000004
 
 /* Bits 0 and 1 of FPU Status Register specify the rounding mode */
-#define FPU_CSR_RM	0x00000003
-#define FPU_CSR_RN	0x0	/* nearest */
-#define FPU_CSR_RZ	0x1	/* towards zero */
-#define FPU_CSR_RU	0x2	/* towards +Infinity */
-#define FPU_CSR_RD	0x3	/* towards -Infinity */
+#define FPU_CSR_RM  0x00000003
+#define FPU_CSR_RN  0x0 /* nearest */
+#define FPU_CSR_RZ  0x1 /* towards zero */
+#define FPU_CSR_RU  0x2 /* towards +Infinity */
+#define FPU_CSR_RD  0x3 /* towards -Infinity */
 
-#define PM_4K		0x00000000
-#define PM_16K		0x00006000
-#define PM_64K		0x0001e000
-#define PM_256K		0x0007e000
-#define PM_1M		0x001fe000
-#define PM_4M		0x007fe000
-#define PM_16M		0x01ffe000
-#define PM_64M		0x07ffe000
-#define PM_256M		0x1fffe000
+#define PM_4K       0x00000000
+#define PM_16K      0x00006000
+#define PM_64K      0x0001e000
+#define PM_256K     0x0007e000
+#define PM_1M       0x001fe000
+#define PM_4M       0x007fe000
+#define PM_16M      0x01ffe000
+#define PM_64M      0x07ffe000
+#define PM_256M     0x1fffe000
 
 
 /*
  * Values used for computation of new tlb entries
  */
-#define PL_4K		12
-#define PL_16K		14
-#define PL_64K		16
-#define PL_256K		18
-#define PL_1M		20
-#define PL_4M		22
-#define PL_16M		24
-#define PL_64M		26
-#define PL_256M		28
+#define PL_4K       12
+#define PL_16K      14
+#define PL_64K      16
+#define PL_256K     18
+#define PL_1M       20
+#define PL_4M       22
+#define PL_16M      24
+#define PL_64M      26
+#define PL_256M     28
 
 /*
  * R4x00 interrupt enable / cause bits
@@ -396,202 +396,202 @@
 /*
  * Bitfields in the R4xx0 cp0 status register
  */
-#define ST0_IE			0x00000001
-#define ST0_EXL			0x00000002
-#define ST0_ERL			0x00000004
-#define ST0_KSU			0x00000018
-#  define KSU_USER		0x00000010
-#  define KSU_SUPERVISOR	0x00000008
-#  define KSU_KERNEL		0x00000000
-#define ST0_UX			0x00000020
-#define ST0_SX			0x00000040
-#define ST0_KX 			0x00000080
-#define ST0_DE			0x00010000
-#define ST0_CE			0x00020000
+#define ST0_IE          0x00000001
+#define ST0_EXL         0x00000002
+#define ST0_ERL         0x00000004
+#define ST0_KSU         0x00000018
+#  define KSU_USER      0x00000010
+#  define KSU_SUPERVISOR    0x00000008
+#  define KSU_KERNEL        0x00000000
+#define ST0_UX          0x00000020
+#define ST0_SX          0x00000040
+#define ST0_KX          0x00000080
+#define ST0_DE          0x00010000
+#define ST0_CE          0x00020000
 
 /*
  * Bitfields in the R[23]000 cp0 status register.
  */
 #define ST0_IEC                 0x00000001
-#define ST0_KUC			0x00000002
-#define ST0_IEP			0x00000004
-#define ST0_KUP			0x00000008
-#define ST0_IEO			0x00000010
-#define ST0_KUO			0x00000020
+#define ST0_KUC         0x00000002
+#define ST0_IEP         0x00000004
+#define ST0_KUP         0x00000008
+#define ST0_IEO         0x00000010
+#define ST0_KUO         0x00000020
 /* bits 6 & 7 are reserved on R[23]000 */
-#define ST0_ISC			0x00010000
-#define ST0_SWC			0x00020000
-#define ST0_CM			0x00080000
+#define ST0_ISC         0x00010000
+#define ST0_SWC         0x00020000
+#define ST0_CM          0x00080000
 
 /*
  * Bits specific to the R4640/R4650
  */
-#define ST0_UM			(_ULCAST_(1) <<  4)
-#define ST0_IL			(_ULCAST_(1) << 23)
-#define ST0_DL			(_ULCAST_(1) << 24)
+#define ST0_UM          (_ULCAST_(1) <<  4)
+#define ST0_IL          (_ULCAST_(1) << 23)
+#define ST0_DL          (_ULCAST_(1) << 24)
 
 
 /*
  * Status register bits available in all MIPS CPUs.
  */
-#define ST0_IM			0x0000ff00
-#define  STATUSB_IP0		8
-#define  STATUSF_IP0		(_ULCAST_(1) <<  8)
-#define  STATUSB_IP1		9
-#define  STATUSF_IP1		(_ULCAST_(1) <<  9)
-#define  STATUSB_IP2		10
-#define  STATUSF_IP2		(_ULCAST_(1) << 10)
-#define  STATUSB_IP3		11
-#define  STATUSF_IP3		(_ULCAST_(1) << 11)
-#define  STATUSB_IP4		12
-#define  STATUSF_IP4		(_ULCAST_(1) << 12)
-#define  STATUSB_IP5		13
-#define  STATUSF_IP5		(_ULCAST_(1) << 13)
-#define  STATUSB_IP6		14
-#define  STATUSF_IP6		(_ULCAST_(1) << 14)
-#define  STATUSB_IP7		15
-#define  STATUSF_IP7		(_ULCAST_(1) << 15)
-#define  STATUSB_IP8		0
-#define  STATUSF_IP8		(_ULCAST_(1) <<  0)
-#define  STATUSB_IP9		1
-#define  STATUSF_IP9		(_ULCAST_(1) <<  1)
-#define  STATUSB_IP10		2
-#define  STATUSF_IP10		(_ULCAST_(1) <<  2)
-#define  STATUSB_IP11		3
-#define  STATUSF_IP11		(_ULCAST_(1) <<  3)
-#define  STATUSB_IP12		4
-#define  STATUSF_IP12		(_ULCAST_(1) <<  4)
-#define  STATUSB_IP13		5
-#define  STATUSF_IP13		(_ULCAST_(1) <<  5)
-#define  STATUSB_IP14		6
-#define  STATUSF_IP14		(_ULCAST_(1) <<  6)
-#define  STATUSB_IP15		7
-#define  STATUSF_IP15		(_ULCAST_(1) <<  7)
-#define ST0_CH			0x00040000
-#define ST0_SR			0x00100000
-#define ST0_TS			0x00200000
-#define ST0_BEV			0x00400000
-#define ST0_RE			0x02000000
-#define ST0_FR			0x04000000
-#define ST0_CU			0xf0000000
-#define ST0_CU0			0x10000000
-#define ST0_CU1			0x20000000
-#define ST0_CU1_SHIFT			29
-#define ST0_CU2			0x40000000
-#define ST0_CU3			0x80000000
-#define ST0_XX			0x80000000	/* MIPS IV naming */
+#define ST0_IM          0x0000ff00
+#define  STATUSB_IP0        8
+#define  STATUSF_IP0        (_ULCAST_(1) <<  8)
+#define  STATUSB_IP1        9
+#define  STATUSF_IP1        (_ULCAST_(1) <<  9)
+#define  STATUSB_IP2        10
+#define  STATUSF_IP2        (_ULCAST_(1) << 10)
+#define  STATUSB_IP3        11
+#define  STATUSF_IP3        (_ULCAST_(1) << 11)
+#define  STATUSB_IP4        12
+#define  STATUSF_IP4        (_ULCAST_(1) << 12)
+#define  STATUSB_IP5        13
+#define  STATUSF_IP5        (_ULCAST_(1) << 13)
+#define  STATUSB_IP6        14
+#define  STATUSF_IP6        (_ULCAST_(1) << 14)
+#define  STATUSB_IP7        15
+#define  STATUSF_IP7        (_ULCAST_(1) << 15)
+#define  STATUSB_IP8        0
+#define  STATUSF_IP8        (_ULCAST_(1) <<  0)
+#define  STATUSB_IP9        1
+#define  STATUSF_IP9        (_ULCAST_(1) <<  1)
+#define  STATUSB_IP10       2
+#define  STATUSF_IP10       (_ULCAST_(1) <<  2)
+#define  STATUSB_IP11       3
+#define  STATUSF_IP11       (_ULCAST_(1) <<  3)
+#define  STATUSB_IP12       4
+#define  STATUSF_IP12       (_ULCAST_(1) <<  4)
+#define  STATUSB_IP13       5
+#define  STATUSF_IP13       (_ULCAST_(1) <<  5)
+#define  STATUSB_IP14       6
+#define  STATUSF_IP14       (_ULCAST_(1) <<  6)
+#define  STATUSB_IP15       7
+#define  STATUSF_IP15       (_ULCAST_(1) <<  7)
+#define ST0_CH          0x00040000
+#define ST0_SR          0x00100000
+#define ST0_TS          0x00200000
+#define ST0_BEV         0x00400000
+#define ST0_RE          0x02000000
+#define ST0_FR          0x04000000
+#define ST0_CU          0xf0000000
+#define ST0_CU0         0x10000000
+#define ST0_CU1         0x20000000
+#define ST0_CU1_SHIFT           29
+#define ST0_CU2         0x40000000
+#define ST0_CU3         0x80000000
+#define ST0_XX          0x80000000  /* MIPS IV naming */
 
 /*
  * Bitfields and bit numbers in the coprocessor 0 cause register.
  *
  * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
  */
-#define  CAUSEB_EXCCODE		2
-#define  CAUSEF_EXCCODE		(_ULCAST_(31)  <<  2)
-#define  CAUSEB_IP		8
-#define  CAUSEF_IP		(_ULCAST_(255) <<  8)
-#define  CAUSEB_IP0		8
-#define  CAUSEF_IP0		(_ULCAST_(1)   <<  8)
-#define  CAUSEB_IP1		9
-#define  CAUSEF_IP1		(_ULCAST_(1)   <<  9)
-#define  CAUSEB_IP2		10
-#define  CAUSEF_IP2		(_ULCAST_(1)   << 10)
-#define  CAUSEB_IP3		11
-#define  CAUSEF_IP3		(_ULCAST_(1)   << 11)
-#define  CAUSEB_IP4		12
-#define  CAUSEF_IP4		(_ULCAST_(1)   << 12)
-#define  CAUSEB_IP5		13
-#define  CAUSEF_IP5		(_ULCAST_(1)   << 13)
-#define  CAUSEB_IP6		14
-#define  CAUSEF_IP6		(_ULCAST_(1)   << 14)
-#define  CAUSEB_IP7		15
-#define  CAUSEF_IP7		(_ULCAST_(1)   << 15)
-#define  CAUSEB_IV		23
-#define  CAUSEF_IV		(_ULCAST_(1)   << 23)
-#define  CAUSEB_CE		28
-#define  CAUSEF_CE		(_ULCAST_(3)   << 28)
-#define  CAUSEB_BD		31
-#define  CAUSEF_BD		(_ULCAST_(1)   << 31)
+#define  CAUSEB_EXCCODE     2
+#define  CAUSEF_EXCCODE     (_ULCAST_(31)  <<  2)
+#define  CAUSEB_IP      8
+#define  CAUSEF_IP      (_ULCAST_(255) <<  8)
+#define  CAUSEB_IP0     8
+#define  CAUSEF_IP0     (_ULCAST_(1)   <<  8)
+#define  CAUSEB_IP1     9
+#define  CAUSEF_IP1     (_ULCAST_(1)   <<  9)
+#define  CAUSEB_IP2     10
+#define  CAUSEF_IP2     (_ULCAST_(1)   << 10)
+#define  CAUSEB_IP3     11
+#define  CAUSEF_IP3     (_ULCAST_(1)   << 11)
+#define  CAUSEB_IP4     12
+#define  CAUSEF_IP4     (_ULCAST_(1)   << 12)
+#define  CAUSEB_IP5     13
+#define  CAUSEF_IP5     (_ULCAST_(1)   << 13)
+#define  CAUSEB_IP6     14
+#define  CAUSEF_IP6     (_ULCAST_(1)   << 14)
+#define  CAUSEB_IP7     15
+#define  CAUSEF_IP7     (_ULCAST_(1)   << 15)
+#define  CAUSEB_IV      23
+#define  CAUSEF_IV      (_ULCAST_(1)   << 23)
+#define  CAUSEB_CE      28
+#define  CAUSEF_CE      (_ULCAST_(3)   << 28)
+#define  CAUSEB_BD      31
+#define  CAUSEF_BD      (_ULCAST_(1)   << 31)
 
 /*
  * Bits in the coprocessor 0 config register.
  */
 /* Generic bits.  */
-#define CONF_CM_CACHABLE_NO_WA		0
-#define CONF_CM_CACHABLE_WA		1
-#define CONF_CM_UNCACHED		2
-#define CONF_CM_CACHABLE_NONCOHERENT	3
-#define CONF_CM_CACHABLE_CE		4
-#define CONF_CM_CACHABLE_COW		5
-#define CONF_CM_CACHABLE_CUW		6
-#define CONF_CM_CACHABLE_ACCELERATED	7
-#define CONF_CM_CMASK			7
-#define CONF_BE			(_ULCAST_(1) << 15)
+#define CONF_CM_CACHABLE_NO_WA      0
+#define CONF_CM_CACHABLE_WA     1
+#define CONF_CM_UNCACHED        2
+#define CONF_CM_CACHABLE_NONCOHERENT    3
+#define CONF_CM_CACHABLE_CE     4
+#define CONF_CM_CACHABLE_COW        5
+#define CONF_CM_CACHABLE_CUW        6
+#define CONF_CM_CACHABLE_ACCELERATED    7
+#define CONF_CM_CMASK           7
+#define CONF_BE         (_ULCAST_(1) << 15)
 
 /* Bits common to various processors.  */
-#define CONF_CU			(_ULCAST_(1) <<  3)
-#define CONF_DB			(_ULCAST_(1) <<  4)
-#define CONF_IB			(_ULCAST_(1) <<  5)
-#define CONF_DC			(_ULCAST_(7) <<  6)
-#define CONF_IC			(_ULCAST_(7) <<  9)
-#define CONF_EB			(_ULCAST_(1) << 13)
-#define CONF_EM			(_ULCAST_(1) << 14)
-#define CONF_SM			(_ULCAST_(1) << 16)
-#define CONF_SC			(_ULCAST_(1) << 17)
-#define CONF_EW			(_ULCAST_(3) << 18)
-#define CONF_EP			(_ULCAST_(15)<< 24)
-#define CONF_EC			(_ULCAST_(7) << 28)
-#define CONF_CM			(_ULCAST_(1) << 31)
+#define CONF_CU         (_ULCAST_(1) <<  3)
+#define CONF_DB         (_ULCAST_(1) <<  4)
+#define CONF_IB         (_ULCAST_(1) <<  5)
+#define CONF_DC         (_ULCAST_(7) <<  6)
+#define CONF_IC         (_ULCAST_(7) <<  9)
+#define CONF_EB         (_ULCAST_(1) << 13)
+#define CONF_EM         (_ULCAST_(1) << 14)
+#define CONF_SM         (_ULCAST_(1) << 16)
+#define CONF_SC         (_ULCAST_(1) << 17)
+#define CONF_EW         (_ULCAST_(3) << 18)
+#define CONF_EP         (_ULCAST_(15)<< 24)
+#define CONF_EC         (_ULCAST_(7) << 28)
+#define CONF_CM         (_ULCAST_(1) << 31)
 
 /* Bits specific to the R4xx0.  */
-#define R4K_CONF_SW		(_ULCAST_(1) << 20)
-#define R4K_CONF_SS		(_ULCAST_(1) << 21)
-#define R4K_CONF_SB		(_ULCAST_(3) << 22)
+#define R4K_CONF_SW     (_ULCAST_(1) << 20)
+#define R4K_CONF_SS     (_ULCAST_(1) << 21)
+#define R4K_CONF_SB     (_ULCAST_(3) << 22)
 
 /* Bits specific to the R5000.  */
-#define R5K_CONF_SE		(_ULCAST_(1) << 12)
-#define R5K_CONF_SS		(_ULCAST_(3) << 20)
+#define R5K_CONF_SE     (_ULCAST_(1) << 12)
+#define R5K_CONF_SS     (_ULCAST_(3) << 20)
 
 /* Bits specific to the R10000.  */
-#define R10K_CONF_DN		(_ULCAST_(3) <<  3)
-#define R10K_CONF_CT		(_ULCAST_(1) <<  5)
-#define R10K_CONF_PE		(_ULCAST_(1) <<  6)
-#define R10K_CONF_PM		(_ULCAST_(3) <<  7)
-#define R10K_CONF_EC		(_ULCAST_(15)<<  9)
-#define R10K_CONF_SB		(_ULCAST_(1) << 13)
-#define R10K_CONF_SK		(_ULCAST_(1) << 14)
-#define R10K_CONF_SS		(_ULCAST_(7) << 16)
-#define R10K_CONF_SC		(_ULCAST_(7) << 19)
-#define R10K_CONF_DC		(_ULCAST_(7) << 26)
-#define R10K_CONF_IC		(_ULCAST_(7) << 29)
+#define R10K_CONF_DN        (_ULCAST_(3) <<  3)
+#define R10K_CONF_CT        (_ULCAST_(1) <<  5)
+#define R10K_CONF_PE        (_ULCAST_(1) <<  6)
+#define R10K_CONF_PM        (_ULCAST_(3) <<  7)
+#define R10K_CONF_EC        (_ULCAST_(15)<<  9)
+#define R10K_CONF_SB        (_ULCAST_(1) << 13)
+#define R10K_CONF_SK        (_ULCAST_(1) << 14)
+#define R10K_CONF_SS        (_ULCAST_(7) << 16)
+#define R10K_CONF_SC        (_ULCAST_(7) << 19)
+#define R10K_CONF_DC        (_ULCAST_(7) << 26)
+#define R10K_CONF_IC        (_ULCAST_(7) << 29)
 
 /* Bits specific to the VR41xx.  */
-#define VR41_CONF_CS		(_ULCAST_(1) << 12)
-#define VR41_CONF_M16		(_ULCAST_(1) << 20)
-#define VR41_CONF_AD		(_ULCAST_(1) << 23)
+#define VR41_CONF_CS        (_ULCAST_(1) << 12)
+#define VR41_CONF_M16       (_ULCAST_(1) << 20)
+#define VR41_CONF_AD        (_ULCAST_(1) << 23)
 
 /* Bits specific to the R30xx.  */
-#define R30XX_CONF_FDM		(_ULCAST_(1) << 19)
-#define R30XX_CONF_REV		(_ULCAST_(1) << 22)
-#define R30XX_CONF_AC		(_ULCAST_(1) << 23)
-#define R30XX_CONF_RF		(_ULCAST_(1) << 24)
-#define R30XX_CONF_HALT		(_ULCAST_(1) << 25)
-#define R30XX_CONF_FPINT	(_ULCAST_(7) << 26)
-#define R30XX_CONF_DBR		(_ULCAST_(1) << 29)
-#define R30XX_CONF_SB		(_ULCAST_(1) << 30)
-#define R30XX_CONF_LOCK		(_ULCAST_(1) << 31)
+#define R30XX_CONF_FDM      (_ULCAST_(1) << 19)
+#define R30XX_CONF_REV      (_ULCAST_(1) << 22)
+#define R30XX_CONF_AC       (_ULCAST_(1) << 23)
+#define R30XX_CONF_RF       (_ULCAST_(1) << 24)
+#define R30XX_CONF_HALT     (_ULCAST_(1) << 25)
+#define R30XX_CONF_FPINT    (_ULCAST_(7) << 26)
+#define R30XX_CONF_DBR      (_ULCAST_(1) << 29)
+#define R30XX_CONF_SB       (_ULCAST_(1) << 30)
+#define R30XX_CONF_LOCK     (_ULCAST_(1) << 31)
 
 /* Bits specific to the TX49.  */
-#define TX49_CONF_DC		(_ULCAST_(1) << 16)
-#define TX49_CONF_IC		(_ULCAST_(1) << 17)  /* conflict with CONF_SC */
-#define TX49_CONF_HALT		(_ULCAST_(1) << 18)
-#define TX49_CONF_CWFON		(_ULCAST_(1) << 27)
+#define TX49_CONF_DC        (_ULCAST_(1) << 16)
+#define TX49_CONF_IC        (_ULCAST_(1) << 17)  /* conflict with CONF_SC */
+#define TX49_CONF_HALT      (_ULCAST_(1) << 18)
+#define TX49_CONF_CWFON     (_ULCAST_(1) << 27)
 
 /* Bits specific to the MIPS32/64 PRA.  */
-#define MIPS_CONF_MT		(_ULCAST_(7) <<  7)
-#define MIPS_CONF_AR		(_ULCAST_(7) << 10)
-#define MIPS_CONF_AT		(_ULCAST_(3) << 13)
-#define MIPS_CONF_M		(_ULCAST_(1) << 31)
+#define MIPS_CONF_MT        (_ULCAST_(7) <<  7)
+#define MIPS_CONF_AR        (_ULCAST_(7) << 10)
+#define MIPS_CONF_AT        (_ULCAST_(3) << 13)
+#define MIPS_CONF_M     (_ULCAST_(1) << 31)
 
 /*
  * R10000 performance counter definitions.
@@ -604,50 +604,50 @@
 /*
  * Events counted by counter #0
  */
-#define CE0_CYCLES			0
-#define CE0_INSN_ISSUED			1
-#define CE0_LPSC_ISSUED			2
-#define CE0_S_ISSUED			3
-#define CE0_SC_ISSUED			4
-#define CE0_SC_FAILED			5
-#define CE0_BRANCH_DECODED		6
-#define CE0_QW_WB_SECONDARY		7
-#define CE0_CORRECTED_ECC_ERRORS	8
-#define CE0_ICACHE_MISSES		9
-#define CE0_SCACHE_I_MISSES		10
-#define CE0_SCACHE_I_WAY_MISSPREDICTED	11
-#define CE0_EXT_INTERVENTIONS_REQ	12
-#define CE0_EXT_INVALIDATE_REQ		13
-#define CE0_VIRTUAL_COHERENCY_COND	14
-#define CE0_INSN_GRADUATED		15
+#define CE0_CYCLES          0
+#define CE0_INSN_ISSUED         1
+#define CE0_LPSC_ISSUED         2
+#define CE0_S_ISSUED            3
+#define CE0_SC_ISSUED           4
+#define CE0_SC_FAILED           5
+#define CE0_BRANCH_DECODED      6
+#define CE0_QW_WB_SECONDARY     7
+#define CE0_CORRECTED_ECC_ERRORS    8
+#define CE0_ICACHE_MISSES       9
+#define CE0_SCACHE_I_MISSES     10
+#define CE0_SCACHE_I_WAY_MISSPREDICTED  11
+#define CE0_EXT_INTERVENTIONS_REQ   12
+#define CE0_EXT_INVALIDATE_REQ      13
+#define CE0_VIRTUAL_COHERENCY_COND  14
+#define CE0_INSN_GRADUATED      15
 
 /*
  * Events counted by counter #1
  */
-#define CE1_CYCLES			0
-#define CE1_INSN_GRADUATED		1
-#define CE1_LPSC_GRADUATED		2
-#define CE1_S_GRADUATED			3
-#define CE1_SC_GRADUATED		4
-#define CE1_FP_INSN_GRADUATED		5
-#define CE1_QW_WB_PRIMARY		6
-#define CE1_TLB_REFILL			7
-#define CE1_BRANCH_MISSPREDICTED	8
-#define CE1_DCACHE_MISS			9
-#define CE1_SCACHE_D_MISSES		10
-#define CE1_SCACHE_D_WAY_MISSPREDICTED	11
-#define CE1_EXT_INTERVENTION_HITS	12
-#define CE1_EXT_INVALIDATE_REQ		13
-#define CE1_SP_HINT_TO_CEXCL_SC_BLOCKS	14
-#define CE1_SP_HINT_TO_SHARED_SC_BLOCKS	15
+#define CE1_CYCLES          0
+#define CE1_INSN_GRADUATED      1
+#define CE1_LPSC_GRADUATED      2
+#define CE1_S_GRADUATED         3
+#define CE1_SC_GRADUATED        4
+#define CE1_FP_INSN_GRADUATED       5
+#define CE1_QW_WB_PRIMARY       6
+#define CE1_TLB_REFILL          7
+#define CE1_BRANCH_MISSPREDICTED    8
+#define CE1_DCACHE_MISS         9
+#define CE1_SCACHE_D_MISSES     10
+#define CE1_SCACHE_D_WAY_MISSPREDICTED  11
+#define CE1_EXT_INTERVENTION_HITS   12
+#define CE1_EXT_INVALIDATE_REQ      13
+#define CE1_SP_HINT_TO_CEXCL_SC_BLOCKS  14
+#define CE1_SP_HINT_TO_SHARED_SC_BLOCKS 15
 
 /*
  * These flags define in which priviledge mode the counters count events
  */
-#define CEB_USER	8	/* Count events in user mode, EXL = ERL = 0 */
-#define CEB_SUPERVISOR	4	/* Count events in supvervisor mode EXL = ERL = 0 */
-#define CEB_KERNEL	2	/* Count events in kernel mode EXL = ERL = 0 */
-#define CEB_EXL		1	/* Count events with EXL = 1, ERL = 0 */
+#define CEB_USER    8   /* Count events in user mode, EXL = ERL = 0 */
+#define CEB_SUPERVISOR  4   /* Count events in supvervisor mode EXL = ERL = 0 */
+#define CEB_KERNEL  2   /* Count events in kernel mode EXL = ERL = 0 */
+#define CEB_EXL     1   /* Count events with EXL = 1, ERL = 0 */
 
 #ifndef __ASSEMBLY__
 
@@ -685,275 +685,275 @@
  * Macros to access the system control coprocessor
  */
 
-#define __read_32bit_c0_register(source, sel)				\
-({ int __res;								\
-    if (sel == 0)							\
-        __asm__ __volatile__(					\
-            "mfc0\t%0, " #source "\n\t"			\
-            : "=r" (__res));				\
-    else								\
-        __asm__ __volatile__(					\
-            ".set\tmips32\n\t"				\
-            "mfc0\t%0, " #source ", " #sel "\n\t"		\
-            ".set\tmips0\n\t"				\
-            : "=r" (__res));				\
-    __res;								\
+#define __read_32bit_c0_register(source, sel)               \
+({ int __res;                               \
+    if (sel == 0)                           \
+        __asm__ __volatile__(                   \
+            "mfc0\t%0, " #source "\n\t"         \
+            : "=r" (__res));                \
+    else                                \
+        __asm__ __volatile__(                   \
+            ".set\tmips32\n\t"              \
+            "mfc0\t%0, " #source ", " #sel "\n\t"       \
+            ".set\tmips0\n\t"               \
+            : "=r" (__res));                \
+    __res;                              \
 })
 
-#define __read_64bit_c0_register(source, sel)				\
-({ unsigned long __res;							\
-    if (sel == 0)							\
-        __asm__ __volatile__(					\
-            ".set\tmips3\n\t"				\
-            "dmfc0\t%0, " #source "\n\t"			\
-            ".set\tmips0"					\
-            : "=r" (__res));				\
-    else								\
-        __asm__ __volatile__(					\
-            ".set\tmips64\n\t"				\
-            "dmfc0\t%0, " #source ", " #sel "\n\t"		\
-            ".set\tmips0"					\
-            : "=r" (__res));				\
-    __res;								\
+#define __read_64bit_c0_register(source, sel)               \
+({ unsigned long __res;                         \
+    if (sel == 0)                           \
+        __asm__ __volatile__(                   \
+            ".set\tmips3\n\t"               \
+            "dmfc0\t%0, " #source "\n\t"            \
+            ".set\tmips0"                   \
+            : "=r" (__res));                \
+    else                                \
+        __asm__ __volatile__(                   \
+            ".set\tmips64\n\t"              \
+            "dmfc0\t%0, " #source ", " #sel "\n\t"      \
+            ".set\tmips0"                   \
+            : "=r" (__res));                \
+    __res;                              \
 })
 
-#define __write_32bit_c0_register(register, sel, value)			\
-do {									\
-    if (sel == 0)							\
-        __asm__ __volatile__(					\
-            "mtc0\t%z0, " #register "\n\t"			\
-            : : "Jr" (value));				\
-    else								\
-        __asm__ __volatile__(					\
-            ".set\tmips32\n\t"				\
-            "mtc0\t%z0, " #register ", " #sel "\n\t"	\
-            ".set\tmips0"					\
-            : : "Jr" (value));				\
+#define __write_32bit_c0_register(register, sel, value)         \
+do {                                    \
+    if (sel == 0)                           \
+        __asm__ __volatile__(                   \
+            "mtc0\t%z0, " #register "\n\t"          \
+            : : "Jr" (value));              \
+    else                                \
+        __asm__ __volatile__(                   \
+            ".set\tmips32\n\t"              \
+            "mtc0\t%z0, " #register ", " #sel "\n\t"    \
+            ".set\tmips0"                   \
+            : : "Jr" (value));              \
 } while (0)
 
-#define __write_64bit_c0_register(register, sel, value)			\
-do {									\
-    if (sel == 0)							\
-        __asm__ __volatile__(					\
-            ".set\tmips3\n\t"				\
-            "dmtc0\t%z0, " #register "\n\t"			\
-            ".set\tmips0"					\
-            : : "Jr" (value));				\
-    else								\
-        __asm__ __volatile__(					\
-            ".set\tmips64\n\t"				\
-            "dmtc0\t%z0, " #register ", " #sel "\n\t"	\
-            ".set\tmips0"					\
-            : : "Jr" (value));				\
+#define __write_64bit_c0_register(register, sel, value)         \
+do {                                    \
+    if (sel == 0)                           \
+        __asm__ __volatile__(                   \
+            ".set\tmips3\n\t"               \
+            "dmtc0\t%z0, " #register "\n\t"         \
+            ".set\tmips0"                   \
+            : : "Jr" (value));              \
+    else                                \
+        __asm__ __volatile__(                   \
+            ".set\tmips64\n\t"              \
+            "dmtc0\t%z0, " #register ", " #sel "\n\t"   \
+            ".set\tmips0"                   \
+            : : "Jr" (value));              \
 } while (0)
 
-#define __read_ulong_c0_register(reg, sel)				\
-    ((sizeof(unsigned long) == 4) ?					\
-    __read_32bit_c0_register(reg, sel) :				\
+#define __read_ulong_c0_register(reg, sel)              \
+    ((sizeof(unsigned long) == 4) ?                 \
+    __read_32bit_c0_register(reg, sel) :                \
     __read_64bit_c0_register(reg, sel))
 
-#define __write_ulong_c0_register(reg, sel, val)			\
-do {									\
-    if (sizeof(unsigned long) == 4)					\
-        __write_32bit_c0_register(reg, sel, val);		\
-    else								\
-        __write_64bit_c0_register(reg, sel, val);		\
+#define __write_ulong_c0_register(reg, sel, val)            \
+do {                                    \
+    if (sizeof(unsigned long) == 4)                 \
+        __write_32bit_c0_register(reg, sel, val);       \
+    else                                \
+        __write_64bit_c0_register(reg, sel, val);       \
 } while (0)
 
 /*
  * These versions are only needed for systems with more than 38 bits of
  * physical address space running the 32-bit kernel.  That's none atm :-)
  */
-#define __read_64bit_c0_split(source, sel)				\
-({									\
-    unsigned long long val;						\
-    unsigned long flags;						\
+#define __read_64bit_c0_split(source, sel)              \
+({                                  \
+    unsigned long long val;                     \
+    unsigned long flags;                        \
                                     \
-    local_irq_save(flags);						\
-    if (sel == 0)							\
-        __asm__ __volatile__(					\
-            ".set\tmips64\n\t"				\
-            "dmfc0\t%M0, " #source "\n\t"			\
-            "dsll\t%L0, %M0, 32\n\t"			\
-            "dsrl\t%M0, %M0, 32\n\t"			\
-            "dsrl\t%L0, %L0, 32\n\t"			\
-            ".set\tmips0"					\
-            : "=r" (val));					\
-    else								\
-        __asm__ __volatile__(					\
-            ".set\tmips64\n\t"				\
-            "dmfc0\t%M0, " #source ", " #sel "\n\t"		\
-            "dsll\t%L0, %M0, 32\n\t"			\
-            "dsrl\t%M0, %M0, 32\n\t"			\
-            "dsrl\t%L0, %L0, 32\n\t"			\
-            ".set\tmips0"					\
-            : "=r" (val));					\
-    local_irq_restore(flags);					\
+    local_irq_save(flags);                      \
+    if (sel == 0)                           \
+        __asm__ __volatile__(                   \
+            ".set\tmips64\n\t"              \
+            "dmfc0\t%M0, " #source "\n\t"           \
+            "dsll\t%L0, %M0, 32\n\t"            \
+            "dsrl\t%M0, %M0, 32\n\t"            \
+            "dsrl\t%L0, %L0, 32\n\t"            \
+            ".set\tmips0"                   \
+            : "=r" (val));                  \
+    else                                \
+        __asm__ __volatile__(                   \
+            ".set\tmips64\n\t"              \
+            "dmfc0\t%M0, " #source ", " #sel "\n\t"     \
+            "dsll\t%L0, %M0, 32\n\t"            \
+            "dsrl\t%M0, %M0, 32\n\t"            \
+            "dsrl\t%L0, %L0, 32\n\t"            \
+            ".set\tmips0"                   \
+            : "=r" (val));                  \
+    local_irq_restore(flags);                   \
                                     \
-    val;								\
+    val;                                \
 })
 
-#define __write_64bit_c0_split(source, sel, val)			\
-do {									\
-    unsigned long flags;						\
+#define __write_64bit_c0_split(source, sel, val)            \
+do {                                    \
+    unsigned long flags;                        \
                                     \
-    local_irq_save(flags);						\
-    if (sel == 0)							\
-        __asm__ __volatile__(					\
-            ".set\tmips64\n\t"				\
-            "dsll\t%L0, %L0, 32\n\t"			\
-            "dsrl\t%L0, %L0, 32\n\t"			\
-            "dsll\t%M0, %M0, 32\n\t"			\
-            "or\t%L0, %L0, %M0\n\t"				\
-            "dmtc0\t%L0, " #source "\n\t"			\
-            ".set\tmips0"					\
-            : : "r" (val));					\
-    else								\
-        __asm__ __volatile__(					\
-            ".set\tmips64\n\t"				\
-            "dsll\t%L0, %L0, 32\n\t"			\
-            "dsrl\t%L0, %L0, 32\n\t"			\
-            "dsll\t%M0, %M0, 32\n\t"			\
-            "or\t%L0, %L0, %M0\n\t"				\
-            "dmtc0\t%L0, " #source ", " #sel "\n\t"		\
-            ".set\tmips0"					\
-            : : "r" (val));					\
-    local_irq_restore(flags);					\
+    local_irq_save(flags);                      \
+    if (sel == 0)                           \
+        __asm__ __volatile__(                   \
+            ".set\tmips64\n\t"              \
+            "dsll\t%L0, %L0, 32\n\t"            \
+            "dsrl\t%L0, %L0, 32\n\t"            \
+            "dsll\t%M0, %M0, 32\n\t"            \
+            "or\t%L0, %L0, %M0\n\t"             \
+            "dmtc0\t%L0, " #source "\n\t"           \
+            ".set\tmips0"                   \
+            : : "r" (val));                 \
+    else                                \
+        __asm__ __volatile__(                   \
+            ".set\tmips64\n\t"              \
+            "dsll\t%L0, %L0, 32\n\t"            \
+            "dsrl\t%L0, %L0, 32\n\t"            \
+            "dsll\t%M0, %M0, 32\n\t"            \
+            "or\t%L0, %L0, %M0\n\t"             \
+            "dmtc0\t%L0, " #source ", " #sel "\n\t"     \
+            ".set\tmips0"                   \
+            : : "r" (val));                 \
+    local_irq_restore(flags);                   \
 } while (0)
 
-#define read_c0_index()		__read_32bit_c0_register($0, 0)
-#define write_c0_index(val)	__write_32bit_c0_register($0, 0, val)
+#define read_c0_index()     __read_32bit_c0_register($0, 0)
+#define write_c0_index(val) __write_32bit_c0_register($0, 0, val)
 
-#define read_c0_entrylo0()	__read_ulong_c0_register($2, 0)
-#define write_c0_entrylo0(val)	__write_ulong_c0_register($2, 0, val)
+#define read_c0_entrylo0()  __read_ulong_c0_register($2, 0)
+#define write_c0_entrylo0(val)  __write_ulong_c0_register($2, 0, val)
 
-#define read_c0_entrylo1()	__read_ulong_c0_register($3, 0)
-#define write_c0_entrylo1(val)	__write_ulong_c0_register($3, 0, val)
+#define read_c0_entrylo1()  __read_ulong_c0_register($3, 0)
+#define write_c0_entrylo1(val)  __write_ulong_c0_register($3, 0, val)
 
-#define read_c0_conf()		__read_32bit_c0_register($3, 0)
-#define write_c0_conf(val)	__write_32bit_c0_register($3, 0, val)
+#define read_c0_conf()      __read_32bit_c0_register($3, 0)
+#define write_c0_conf(val)  __write_32bit_c0_register($3, 0, val)
 
-#define read_c0_context()	__read_ulong_c0_register($4, 0)
-#define write_c0_context(val)	__write_ulong_c0_register($4, 0, val)
+#define read_c0_context()   __read_ulong_c0_register($4, 0)
+#define write_c0_context(val)   __write_ulong_c0_register($4, 0, val)
 
-#define read_c0_pagemask()	__read_32bit_c0_register($5, 0)
-#define write_c0_pagemask(val)	__write_32bit_c0_register($5, 0, val)
+#define read_c0_pagemask()  __read_32bit_c0_register($5, 0)
+#define write_c0_pagemask(val)  __write_32bit_c0_register($5, 0, val)
 
-#define read_c0_wired()		__read_32bit_c0_register($6, 0)
-#define write_c0_wired(val)	__write_32bit_c0_register($6, 0, val)
+#define read_c0_wired()     __read_32bit_c0_register($6, 0)
+#define write_c0_wired(val) __write_32bit_c0_register($6, 0, val)
 
-#define read_c0_info()		__read_32bit_c0_register($7, 0)
+#define read_c0_info()      __read_32bit_c0_register($7, 0)
 
-#define read_c0_cache()		__read_32bit_c0_register($7, 0)	/* TX39xx */
-#define write_c0_cache(val)	__write_32bit_c0_register($7, 0, val)
+#define read_c0_cache()     __read_32bit_c0_register($7, 0) /* TX39xx */
+#define write_c0_cache(val) __write_32bit_c0_register($7, 0, val)
 
-#define read_c0_count()		__read_32bit_c0_register($9, 0)
-#define write_c0_count(val)	__write_32bit_c0_register($9, 0, val)
+#define read_c0_count()     __read_32bit_c0_register($9, 0)
+#define write_c0_count(val) __write_32bit_c0_register($9, 0, val)
 
-#define read_c0_entryhi()	__read_ulong_c0_register($10, 0)
-#define write_c0_entryhi(val)	__write_ulong_c0_register($10, 0, val)
+#define read_c0_entryhi()   __read_ulong_c0_register($10, 0)
+#define write_c0_entryhi(val)   __write_ulong_c0_register($10, 0, val)
 
-#define read_c0_compare()	__read_32bit_c0_register($11, 0)
-#define write_c0_compare(val)	__write_32bit_c0_register($11, 0, val)
+#define read_c0_compare()   __read_32bit_c0_register($11, 0)
+#define write_c0_compare(val)   __write_32bit_c0_register($11, 0, val)
 
-#define read_c0_status()	__read_32bit_c0_register($12, 0)
-#define write_c0_status(val)	__write_32bit_c0_register($12, 0, val)
+#define read_c0_status()    __read_32bit_c0_register($12, 0)
+#define write_c0_status(val)    __write_32bit_c0_register($12, 0, val)
 
-#define read_c0_cause()		__read_32bit_c0_register($13, 0)
-#define write_c0_cause(val)	__write_32bit_c0_register($13, 0, val)
+#define read_c0_cause()     __read_32bit_c0_register($13, 0)
+#define write_c0_cause(val) __write_32bit_c0_register($13, 0, val)
 
-#define read_c0_prid()		__read_32bit_c0_register($15, 0)
+#define read_c0_prid()      __read_32bit_c0_register($15, 0)
 
-#define read_c0_ebase()		__read_32bit_c0_register($15, 1)
-#define write_c0_ebase(val)	__write_32bit_c0_register($15, 1, val)
+#define read_c0_ebase()     __read_32bit_c0_register($15, 1)
+#define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val)
 
-#define read_c0_config()	__read_32bit_c0_register($16, 0)
-#define read_c0_config1()	__read_32bit_c0_register($16, 1)
-#define read_c0_config2()	__read_32bit_c0_register($16, 2)
-#define read_c0_config3()	__read_32bit_c0_register($16, 3)
-#define write_c0_config(val)	__write_32bit_c0_register($16, 0, val)
-#define write_c0_config1(val)	__write_32bit_c0_register($16, 1, val)
-#define write_c0_config2(val)	__write_32bit_c0_register($16, 2, val)
-#define write_c0_config3(val)	__write_32bit_c0_register($16, 3, val)
+#define read_c0_config()    __read_32bit_c0_register($16, 0)
+#define read_c0_config1()   __read_32bit_c0_register($16, 1)
+#define read_c0_config2()   __read_32bit_c0_register($16, 2)
+#define read_c0_config3()   __read_32bit_c0_register($16, 3)
+#define write_c0_config(val)    __write_32bit_c0_register($16, 0, val)
+#define write_c0_config1(val)   __write_32bit_c0_register($16, 1, val)
+#define write_c0_config2(val)   __write_32bit_c0_register($16, 2, val)
+#define write_c0_config3(val)   __write_32bit_c0_register($16, 3, val)
 
 /*
  * The WatchLo register.  There may be upto 8 of them.
  */
-#define read_c0_watchlo0()	__read_ulong_c0_register($18, 0)
-#define read_c0_watchlo1()	__read_ulong_c0_register($18, 1)
-#define read_c0_watchlo2()	__read_ulong_c0_register($18, 2)
-#define read_c0_watchlo3()	__read_ulong_c0_register($18, 3)
-#define read_c0_watchlo4()	__read_ulong_c0_register($18, 4)
-#define read_c0_watchlo5()	__read_ulong_c0_register($18, 5)
-#define read_c0_watchlo6()	__read_ulong_c0_register($18, 6)
-#define read_c0_watchlo7()	__read_ulong_c0_register($18, 7)
-#define write_c0_watchlo0(val)	__write_ulong_c0_register($18, 0, val)
-#define write_c0_watchlo1(val)	__write_ulong_c0_register($18, 1, val)
-#define write_c0_watchlo2(val)	__write_ulong_c0_register($18, 2, val)
-#define write_c0_watchlo3(val)	__write_ulong_c0_register($18, 3, val)
-#define write_c0_watchlo4(val)	__write_ulong_c0_register($18, 4, val)
-#define write_c0_watchlo5(val)	__write_ulong_c0_register($18, 5, val)
-#define write_c0_watchlo6(val)	__write_ulong_c0_register($18, 6, val)
-#define write_c0_watchlo7(val)	__write_ulong_c0_register($18, 7, val)
+#define read_c0_watchlo0()  __read_ulong_c0_register($18, 0)
+#define read_c0_watchlo1()  __read_ulong_c0_register($18, 1)
+#define read_c0_watchlo2()  __read_ulong_c0_register($18, 2)
+#define read_c0_watchlo3()  __read_ulong_c0_register($18, 3)
+#define read_c0_watchlo4()  __read_ulong_c0_register($18, 4)
+#define read_c0_watchlo5()  __read_ulong_c0_register($18, 5)
+#define read_c0_watchlo6()  __read_ulong_c0_register($18, 6)
+#define read_c0_watchlo7()  __read_ulong_c0_register($18, 7)
+#define write_c0_watchlo0(val)  __write_ulong_c0_register($18, 0, val)
+#define write_c0_watchlo1(val)  __write_ulong_c0_register($18, 1, val)
+#define write_c0_watchlo2(val)  __write_ulong_c0_register($18, 2, val)
+#define write_c0_watchlo3(val)  __write_ulong_c0_register($18, 3, val)
+#define write_c0_watchlo4(val)  __write_ulong_c0_register($18, 4, val)
+#define write_c0_watchlo5(val)  __write_ulong_c0_register($18, 5, val)
+#define write_c0_watchlo6(val)  __write_ulong_c0_register($18, 6, val)
+#define write_c0_watchlo7(val)  __write_ulong_c0_register($18, 7, val)
 
 /*
  * The WatchHi register.  There may be upto 8 of them.
  */
-#define read_c0_watchhi0()	__read_32bit_c0_register($19, 0)
-#define read_c0_watchhi1()	__read_32bit_c0_register($19, 1)
-#define read_c0_watchhi2()	__read_32bit_c0_register($19, 2)
-#define read_c0_watchhi3()	__read_32bit_c0_register($19, 3)
-#define read_c0_watchhi4()	__read_32bit_c0_register($19, 4)
-#define read_c0_watchhi5()	__read_32bit_c0_register($19, 5)
-#define read_c0_watchhi6()	__read_32bit_c0_register($19, 6)
-#define read_c0_watchhi7()	__read_32bit_c0_register($19, 7)
+#define read_c0_watchhi0()  __read_32bit_c0_register($19, 0)
+#define read_c0_watchhi1()  __read_32bit_c0_register($19, 1)
+#define read_c0_watchhi2()  __read_32bit_c0_register($19, 2)
+#define read_c0_watchhi3()  __read_32bit_c0_register($19, 3)
+#define read_c0_watchhi4()  __read_32bit_c0_register($19, 4)
+#define read_c0_watchhi5()  __read_32bit_c0_register($19, 5)
+#define read_c0_watchhi6()  __read_32bit_c0_register($19, 6)
+#define read_c0_watchhi7()  __read_32bit_c0_register($19, 7)
 
-#define write_c0_watchhi0(val)	__write_32bit_c0_register($19, 0, val)
-#define write_c0_watchhi1(val)	__write_32bit_c0_register($19, 1, val)
-#define write_c0_watchhi2(val)	__write_32bit_c0_register($19, 2, val)
-#define write_c0_watchhi3(val)	__write_32bit_c0_register($19, 3, val)
-#define write_c0_watchhi4(val)	__write_32bit_c0_register($19, 4, val)
-#define write_c0_watchhi5(val)	__write_32bit_c0_register($19, 5, val)
-#define write_c0_watchhi6(val)	__write_32bit_c0_register($19, 6, val)
-#define write_c0_watchhi7(val)	__write_32bit_c0_register($19, 7, val)
+#define write_c0_watchhi0(val)  __write_32bit_c0_register($19, 0, val)
+#define write_c0_watchhi1(val)  __write_32bit_c0_register($19, 1, val)
+#define write_c0_watchhi2(val)  __write_32bit_c0_register($19, 2, val)
+#define write_c0_watchhi3(val)  __write_32bit_c0_register($19, 3, val)
+#define write_c0_watchhi4(val)  __write_32bit_c0_register($19, 4, val)
+#define write_c0_watchhi5(val)  __write_32bit_c0_register($19, 5, val)
+#define write_c0_watchhi6(val)  __write_32bit_c0_register($19, 6, val)
+#define write_c0_watchhi7(val)  __write_32bit_c0_register($19, 7, val)
 
-#define read_c0_xcontext()	__read_ulong_c0_register($20, 0)
-#define write_c0_xcontext(val)	__write_ulong_c0_register($20, 0, val)
+#define read_c0_xcontext()  __read_ulong_c0_register($20, 0)
+#define write_c0_xcontext(val)  __write_ulong_c0_register($20, 0, val)
 
-#define read_c0_intcontrol()	__read_32bit_c0_register($20, 1)
+#define read_c0_intcontrol()    __read_32bit_c0_register($20, 1)
 #define write_c0_intcontrol(val) __write_32bit_c0_register($20, 1, val)
 
-#define read_c0_framemask()	__read_32bit_c0_register($21, 0)
-#define write_c0_framemask(val)	__write_32bit_c0_register($21, 0, val)
+#define read_c0_framemask() __read_32bit_c0_register($21, 0)
+#define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val)
 
-#define read_c0_debug()		__read_32bit_c0_register($23, 0)
-#define write_c0_debug(val)	__write_32bit_c0_register($23, 0, val)
+#define read_c0_debug()     __read_32bit_c0_register($23, 0)
+#define write_c0_debug(val) __write_32bit_c0_register($23, 0, val)
 
-#define read_c0_depc()		__read_ulong_c0_register($24, 0)
-#define write_c0_depc(val)	__write_ulong_c0_register($24, 0, val)
+#define read_c0_depc()      __read_ulong_c0_register($24, 0)
+#define write_c0_depc(val)  __write_ulong_c0_register($24, 0, val)
 
-#define read_c0_ecc()		__read_32bit_c0_register($26, 0)
-#define write_c0_ecc(val)	__write_32bit_c0_register($26, 0, val)
+#define read_c0_ecc()       __read_32bit_c0_register($26, 0)
+#define write_c0_ecc(val)   __write_32bit_c0_register($26, 0, val)
 
-#define read_c0_derraddr0()	__read_ulong_c0_register($26, 1)
-#define write_c0_derraddr0(val)	__write_ulong_c0_register($26, 1, val)
+#define read_c0_derraddr0() __read_ulong_c0_register($26, 1)
+#define write_c0_derraddr0(val) __write_ulong_c0_register($26, 1, val)
 
-#define read_c0_cacheerr()	__read_32bit_c0_register($27, 0)
+#define read_c0_cacheerr()  __read_32bit_c0_register($27, 0)
 
-#define read_c0_derraddr1()	__read_ulong_c0_register($27, 1)
-#define write_c0_derraddr1(val)	__write_ulong_c0_register($27, 1, val)
+#define read_c0_derraddr1() __read_ulong_c0_register($27, 1)
+#define write_c0_derraddr1(val) __write_ulong_c0_register($27, 1, val)
 
-#define read_c0_taglo()		__read_32bit_c0_register($28, 0)
-#define write_c0_taglo(val)	__write_32bit_c0_register($28, 0, val)
+#define read_c0_taglo()     __read_32bit_c0_register($28, 0)
+#define write_c0_taglo(val) __write_32bit_c0_register($28, 0, val)
 
-#define read_c0_taghi()		__read_32bit_c0_register($29, 0)
-#define write_c0_taghi(val)	__write_32bit_c0_register($29, 0, val)
+#define read_c0_taghi()     __read_32bit_c0_register($29, 0)
+#define write_c0_taghi(val) __write_32bit_c0_register($29, 0, val)
 
-#define read_c0_errorepc()	__read_ulong_c0_register($30, 0)
-#define write_c0_errorepc(val)	__write_ulong_c0_register($30, 0, val)
+#define read_c0_errorepc()  __read_ulong_c0_register($30, 0)
+#define write_c0_errorepc(val)  __write_ulong_c0_register($30, 0, val)
 
-#define read_c0_epc()		__read_ulong_c0_register($14, 0)
-#define write_c0_epc(val)	__write_ulong_c0_register($14, 0, val)
+#define read_c0_epc()       __read_ulong_c0_register($14, 0)
+#define write_c0_epc(val)   __write_ulong_c0_register($14, 0, val)
 
 #if 1
 /*
@@ -962,20 +962,20 @@ do {									\
 #define read_32bit_cp0_register(source)                         \
 ({ int __res;                                                   \
         __asm__ __volatile__(                                   \
-    ".set\tpush\n\t"					\
-    ".set\treorder\n\t"					\
+    ".set\tpush\n\t"                    \
+    ".set\treorder\n\t"                 \
         "mfc0\t%0,"STR(source)"\n\t"                            \
-    ".set\tpop"						\
+    ".set\tpop"                     \
         : "=r" (__res));                                        \
         __res;})
 
 #define read_32bit_cp0_set1_register(source)                    \
 ({ int __res;                                                   \
         __asm__ __volatile__(                                   \
-    ".set\tpush\n\t"					\
-    ".set\treorder\n\t"					\
+    ".set\tpush\n\t"                    \
+    ".set\treorder\n\t"                 \
         "cfc0\t%0,"STR(source)"\n\t"                            \
-    ".set\tpop"						\
+    ".set\tpop"                     \
         : "=r" (__res));                                        \
         __res;})
 
@@ -993,14 +993,14 @@ do {									\
 
 #define write_32bit_cp0_register(register,value)                \
         __asm__ __volatile__(                                   \
-        "mtc0\t%0,"STR(register)"\n\t"				\
-    "nop"							\
+        "mtc0\t%0,"STR(register)"\n\t"              \
+    "nop"                           \
         : : "r" (value));
 
 #define write_32bit_cp0_set1_register(register,value)           \
         __asm__ __volatile__(                                   \
-        "ctc0\t%0,$"STR(register)"\n\t"				\
-    "nop"							\
+        "ctc0\t%0,$"STR(register)"\n\t"             \
+    "nop"                           \
         : : "r" (value));
 
 #define write_64bit_cp0_register(register,value)                \
@@ -1018,9 +1018,9 @@ do {									\
         __asm__ __volatile__(                                   \
     ".set\tnoreorder\n\t"                                   \
     ".set\tnoat\n\t"                                        \
-    "#.set\tmips64\n\t"					\
-    "#mfc0\t$1, $16, 1\n\t"					\
-    "#.set\tmips0\n\t"					\
+    "#.set\tmips64\n\t"                 \
+    "#mfc0\t$1, $16, 1\n\t"                 \
+    "#.set\tmips0\n\t"                  \
          ".word\t0x40018001\n\t"                                 \
     "move\t%0,$1\n\t"                                       \
     ".set\tat\n\t"                                          \
@@ -1035,17 +1035,17 @@ do {									\
 #define read_32bit_cp1_register(source)                         \
 ({ int __res;                                                   \
     __asm__ __volatile__(                                   \
-    ".set\tpush\n\t"					\
-    ".set\treorder\n\t"					\
+    ".set\tpush\n\t"                    \
+    ".set\treorder\n\t"                 \
         "cfc1\t%0,$"STR(source)"\n\t"                            \
-    ".set\tpop"						\
+    ".set\tpop"                     \
         : "=r" (__res));                                        \
         __res;})
 
 #define write_32bit_cp1_register(register,value)                \
         __asm__ __volatile__(                                   \
-        "ctc1\t%0,$"STR(register)"\n\t"				\
-    "nop"							\
+        "ctc1\t%0,$"STR(register)"\n\t"             \
+    "nop"                           \
         : : "r" (value));
 
 /* TLB operations. */
@@ -1084,62 +1084,62 @@ static inline void tlb_write_random(void)
 /*
  * Manipulate bits in a c0 register.
  */
-#define __BUILD_SET_C0(name,register)				\
-static inline unsigned int					\
-set_c0_##name(unsigned int set)					\
-{								\
-    unsigned int res;					\
+#define __BUILD_SET_C0(name,register)               \
+static inline unsigned int                  \
+set_c0_##name(unsigned int set)                 \
+{                               \
+    unsigned int res;                   \
                                 \
-    res = read_c0_##name();					\
-    res |= set;						\
-    write_c0_##name(res);					\
+    res = read_c0_##name();                 \
+    res |= set;                     \
+    write_c0_##name(res);                   \
                                 \
-    return res;						\
-}								\
+    return res;                     \
+}                               \
                                 \
-static inline unsigned int					\
-clear_c0_##name(unsigned int clear)				\
-{								\
-    unsigned int res;					\
+static inline unsigned int                  \
+clear_c0_##name(unsigned int clear)             \
+{                               \
+    unsigned int res;                   \
                                 \
-    res = read_c0_##name();					\
-    res &= ~clear;						\
-    write_c0_##name(res);					\
+    res = read_c0_##name();                 \
+    res &= ~clear;                      \
+    write_c0_##name(res);                   \
                                 \
-    return res;						\
-}								\
+    return res;                     \
+}                               \
                                 \
-static inline unsigned int					\
-change_c0_##name(unsigned int change, unsigned int new)		\
-{								\
-    unsigned int res;					\
+static inline unsigned int                  \
+change_c0_##name(unsigned int change, unsigned int new)     \
+{                               \
+    unsigned int res;                   \
                                 \
-    res = read_c0_##name();					\
-    res &= ~change;						\
-    res |= (new & change);					\
-    write_c0_##name(res);					\
+    res = read_c0_##name();                 \
+    res &= ~change;                     \
+    res |= (new & change);                  \
+    write_c0_##name(res);                   \
                                 \
-    return res;						\
+    return res;                     \
 }
 
 __BUILD_SET_C0(status,CP0_STATUS)
 __BUILD_SET_C0(cause,CP0_CAUSE)
 __BUILD_SET_C0(config,CP0_CONFIG)
 
-#define set_cp0_status(x)	set_c0_status(x)
-#define set_cp0_cause(x)	set_c0_cause(x)
-#define set_cp0_config(x)	set_c0_config(x)
+#define set_cp0_status(x)   set_c0_status(x)
+#define set_cp0_cause(x)    set_c0_cause(x)
+#define set_cp0_config(x)   set_c0_config(x)
 
-#define read_c1_status()	read_32bit_cp1_register(31)
-#define write_c1_status(x)	write_32bit_cp1_register(31, x)
+#define read_c1_status()    read_32bit_cp1_register(31)
+#define write_c1_status(x)  write_32bit_cp1_register(31, x)
 
-#define readb(reg)		(*((volatile unsigned char *) (reg)))
-#define readw(reg)		(*((volatile unsigned short *) (reg)))
-#define readl(reg)		(*((volatile unsigned int *) (reg)))
+#define readb(reg)      (*((volatile unsigned char *) (reg)))
+#define readw(reg)      (*((volatile unsigned short *) (reg)))
+#define readl(reg)      (*((volatile unsigned int *) (reg)))
 
-#define writeb(data, reg)	((*((volatile unsigned char *)(reg))) = (unsigned char)(data))
-#define writew(data, reg)	((*((volatile unsigned short *)(reg))) = (unsigned short)(data))
-#define writel(data, reg)	((*((volatile unsigned int *)(reg))) = (unsigned int)(data))
+#define writeb(data, reg)   ((*((volatile unsigned char *)(reg))) = (unsigned char)(data))
+#define writew(data, reg)   ((*((volatile unsigned short *)(reg))) = (unsigned short)(data))
+#define writel(data, reg)   ((*((volatile unsigned int *)(reg))) = (unsigned int)(data))
 
 #endif /* !__ASSEMBLY__ */
 
diff --git a/libcpu/mips/common/mips_types.h b/libcpu/mips/common/mips_types.h
index cc12d44391..466a39a40b 100644
--- a/libcpu/mips/common/mips_types.h
+++ b/libcpu/mips/common/mips_types.h
@@ -1,21 +1,7 @@
 /*
- * File      : mips_types.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/libcpu/mips/common/ptrace.h b/libcpu/mips/common/ptrace.h
index 00ce58a085..8b82cca5d6 100644
--- a/libcpu/mips/common/ptrace.h
+++ b/libcpu/mips/common/ptrace.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -23,9 +23,9 @@
 #include 
 
 struct mips_fpu_struct {
-    rt_uint64_t	fpr[NUM_FPU_REGS];
-    rt_uint32_t	fcr31;
-    rt_uint32_t	pad;
+    rt_uint64_t fpr[NUM_FPU_REGS];
+    rt_uint32_t fcr31;
+    rt_uint32_t pad;
 };
 
 struct pt_regs {
@@ -68,53 +68,53 @@ struct pt_regs {
 
 /* Note: For call stack o32 ABI has 0x8 shadowsoace Here  */
 #ifdef ARCH_MIPS64
-#define PT_R0		(0x0 * LONGSIZE)	/* 0 */
+#define PT_R0       (0x0 * LONGSIZE)    /* 0 */
 #else
-#define PT_R0		(0x8 * LONGSIZE)	/* 0 */
+#define PT_R0       (0x8 * LONGSIZE)    /* 0 */
 #endif
-#define PT_R1		((PT_R0) + LONGSIZE)	/* 1 */
-#define PT_R2		((PT_R1) + LONGSIZE)	/* 2 */
-#define PT_R3		((PT_R2) + LONGSIZE)	/* 3 */
-#define PT_R4		((PT_R3) + LONGSIZE)	/* 4 */
-#define PT_R5		((PT_R4) + LONGSIZE)	/* 5 */
-#define PT_R6		((PT_R5) + LONGSIZE)	/* 6 */
-#define PT_R7		((PT_R6) + LONGSIZE)	/* 7 */
-#define PT_R8		((PT_R7) + LONGSIZE)	/* 8 */
-#define PT_R9		((PT_R8) + LONGSIZE)	/* 9 */
-#define PT_R10		((PT_R9) + LONGSIZE)	/* 10 */
-#define PT_R11		((PT_R10) + LONGSIZE)	/* 11 */
-#define PT_R12		((PT_R11) + LONGSIZE)	/* 12 */
-#define PT_R13		((PT_R12) + LONGSIZE)	/* 13 */
-#define PT_R14		((PT_R13) + LONGSIZE)	/* 14 */
-#define PT_R15		((PT_R14) + LONGSIZE)	/* 15 */
-#define PT_R16		((PT_R15) + LONGSIZE)	/* 16 */
-#define PT_R17		((PT_R16) + LONGSIZE)	/* 17 */
-#define PT_R18		((PT_R17) + LONGSIZE)	/* 18 */
-#define PT_R19		((PT_R18) + LONGSIZE)	/* 19 */
-#define PT_R20		((PT_R19) + LONGSIZE)	/* 20 */
-#define PT_R21		((PT_R20) + LONGSIZE)	/* 21 */
-#define PT_R22		((PT_R21) + LONGSIZE)	/* 22 */
-#define PT_R23		((PT_R22) + LONGSIZE)	/* 23 */
-#define PT_R24		((PT_R23) + LONGSIZE)	/* 24 */
-#define PT_R25		((PT_R24) + LONGSIZE)	/* 25 */
-#define PT_R26		((PT_R25) + LONGSIZE)	/* 26 */
-#define PT_R27		((PT_R26) + LONGSIZE)	/* 27 */
-#define PT_R28		((PT_R27) + LONGSIZE)	/* 28 */
-#define PT_R29		((PT_R28) + LONGSIZE)	/* 29 */
-#define PT_R30		((PT_R29) + LONGSIZE)	/* 30 */
-#define PT_R31		((PT_R30) + LONGSIZE)	/* 31 */
+#define PT_R1       ((PT_R0) + LONGSIZE)    /* 1 */
+#define PT_R2       ((PT_R1) + LONGSIZE)    /* 2 */
+#define PT_R3       ((PT_R2) + LONGSIZE)    /* 3 */
+#define PT_R4       ((PT_R3) + LONGSIZE)    /* 4 */
+#define PT_R5       ((PT_R4) + LONGSIZE)    /* 5 */
+#define PT_R6       ((PT_R5) + LONGSIZE)    /* 6 */
+#define PT_R7       ((PT_R6) + LONGSIZE)    /* 7 */
+#define PT_R8       ((PT_R7) + LONGSIZE)    /* 8 */
+#define PT_R9       ((PT_R8) + LONGSIZE)    /* 9 */
+#define PT_R10      ((PT_R9) + LONGSIZE)    /* 10 */
+#define PT_R11      ((PT_R10) + LONGSIZE)   /* 11 */
+#define PT_R12      ((PT_R11) + LONGSIZE)   /* 12 */
+#define PT_R13      ((PT_R12) + LONGSIZE)   /* 13 */
+#define PT_R14      ((PT_R13) + LONGSIZE)   /* 14 */
+#define PT_R15      ((PT_R14) + LONGSIZE)   /* 15 */
+#define PT_R16      ((PT_R15) + LONGSIZE)   /* 16 */
+#define PT_R17      ((PT_R16) + LONGSIZE)   /* 17 */
+#define PT_R18      ((PT_R17) + LONGSIZE)   /* 18 */
+#define PT_R19      ((PT_R18) + LONGSIZE)   /* 19 */
+#define PT_R20      ((PT_R19) + LONGSIZE)   /* 20 */
+#define PT_R21      ((PT_R20) + LONGSIZE)   /* 21 */
+#define PT_R22      ((PT_R21) + LONGSIZE)   /* 22 */
+#define PT_R23      ((PT_R22) + LONGSIZE)   /* 23 */
+#define PT_R24      ((PT_R23) + LONGSIZE)   /* 24 */
+#define PT_R25      ((PT_R24) + LONGSIZE)   /* 25 */
+#define PT_R26      ((PT_R25) + LONGSIZE)   /* 26 */
+#define PT_R27      ((PT_R26) + LONGSIZE)   /* 27 */
+#define PT_R28      ((PT_R27) + LONGSIZE)   /* 28 */
+#define PT_R29      ((PT_R28) + LONGSIZE)   /* 29 */
+#define PT_R30      ((PT_R29) + LONGSIZE)   /* 30 */
+#define PT_R31      ((PT_R30) + LONGSIZE)   /* 31 */
 
 /*
  * Saved special registers
  */
-#define PT_STATUS	((PT_R31) + LONGSIZE)	/* 32 */
-#define PT_HI		((PT_STATUS) + HI_LO_SIZE)	/* 33 */
-#define PT_LO		((PT_HI) + HI_LO_SIZE)	/* 34 */
-#define PT_BADVADDR	((PT_LO) + LONGSIZE)	/* 35 */
-#define PT_CAUSE	((PT_BADVADDR) + LONGSIZE)	/* 36 */
-#define PT_EPC		((PT_CAUSE) + LONGSIZE)	/* 37 */
+#define PT_STATUS   ((PT_R31) + LONGSIZE)   /* 32 */
+#define PT_HI       ((PT_STATUS) + HI_LO_SIZE)  /* 33 */
+#define PT_LO       ((PT_HI) + HI_LO_SIZE)  /* 34 */
+#define PT_BADVADDR ((PT_LO) + LONGSIZE)    /* 35 */
+#define PT_CAUSE    ((PT_BADVADDR) + LONGSIZE)  /* 36 */
+#define PT_EPC      ((PT_CAUSE) + LONGSIZE) /* 37 */
 
-#define PT_REG_END		((PT_EPC) + LONGSIZE) /* Align already ensured manually */
+#define PT_REG_END      ((PT_EPC) + LONGSIZE) /* Align already ensured manually */
 
 #ifdef RT_USING_FPU
 #define PT_FPU_R0               (PT_REG_END)
@@ -136,10 +136,10 @@ struct pt_regs {
 #define PT_FPU_FCSR31           ((PT_FPU_R30) + FP_REG_SIZE)
 #define PT_FPU_PAD0             ((PT_FPU_FCSR31) + 4)
 
-#define PT_FPU_END     	        ((PT_FPU_PAD0) + 4)
-#define PT_SIZE			PT_FPU_END
+#define PT_FPU_END              ((PT_FPU_PAD0) + 4)
+#define PT_SIZE         PT_FPU_END
 #else
-#define PT_SIZE			PT_REG_END
+#define PT_SIZE         PT_REG_END
 #endif
 
-#endif
\ No newline at end of file
+#endif
diff --git a/libcpu/mips/common/stack.c b/libcpu/mips/common/stack.c
index b933b184e7..3f9010837a 100644
--- a/libcpu/mips/common/stack.c
+++ b/libcpu/mips/common/stack.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -47,15 +47,15 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_ad
     pt->regs[REG_FP] = (rt_ubase_t)0x0;
     pt->regs[REG_RA] = (rt_ubase_t)texit;
 
-    pt->hi	= 0x0;
-    pt->lo	= 0x0;
+    pt->hi  = 0x0;
+    pt->lo  = 0x0;
     pt->cp0_status = (ST0_IE | ST0_CU0 | ST0_IM);
 #ifdef RT_USING_FPU
     pt->cp0_status |= (ST0_CU1 | ST0_FR);
 #endif
-    pt->cp0_cause	= read_c0_cause();
-    pt->cp0_epc	= (rt_ubase_t)tentry;
-    pt->cp0_badvaddr	= 0x0;
+    pt->cp0_cause   = read_c0_cause();
+    pt->cp0_epc = (rt_ubase_t)tentry;
+    pt->cp0_badvaddr    = 0x0;
 
     return stk;
 }
diff --git a/libcpu/mips/common/stackframe.h b/libcpu/mips/common/stackframe.h
index bb92a18c9c..ba361acd99 100644
--- a/libcpu/mips/common/stackframe.h
+++ b/libcpu/mips/common/stackframe.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -51,69 +51,69 @@
     .set pop
     .endm
 
-    .macro	SAVE_AT
-    .set	push
-    .set	noat
-    LONG_S	$1, PT_R1(sp)
-    .set	pop
+    .macro  SAVE_AT
+    .set    push
+    .set    noat
+    LONG_S  $1, PT_R1(sp)
+    .set    pop
     .endm
 
-    .macro	SAVE_TEMP
-    mfhi	v1
-    LONG_S	$8, PT_R8(sp)
-    LONG_S	$9, PT_R9(sp)
-    sw	v1, PT_HI(sp)
-    mflo	v1
-    LONG_S	$10, PT_R10(sp)
-    LONG_S	$11, PT_R11(sp)
-    sw	v1,  PT_LO(sp)
-    LONG_S	$12, PT_R12(sp)
-    LONG_S	$13, PT_R13(sp)
-    LONG_S	$14, PT_R14(sp)
-    LONG_S	$15, PT_R15(sp)
-    LONG_S	$24, PT_R24(sp)
+    .macro  SAVE_TEMP
+    mfhi    v1
+    LONG_S  $8, PT_R8(sp)
+    LONG_S  $9, PT_R9(sp)
+    sw  v1, PT_HI(sp)
+    mflo    v1
+    LONG_S  $10, PT_R10(sp)
+    LONG_S  $11, PT_R11(sp)
+    sw  v1,  PT_LO(sp)
+    LONG_S  $12, PT_R12(sp)
+    LONG_S  $13, PT_R13(sp)
+    LONG_S  $14, PT_R14(sp)
+    LONG_S  $15, PT_R15(sp)
+    LONG_S  $24, PT_R24(sp)
     .endm
 
-    .macro	SAVE_STATIC
-    LONG_S	$16, PT_R16(sp)
-    LONG_S	$17, PT_R17(sp)
-    LONG_S	$18, PT_R18(sp)
-    LONG_S	$19, PT_R19(sp)
-    LONG_S	$20, PT_R20(sp)
-    LONG_S	$21, PT_R21(sp)
-    LONG_S	$22, PT_R22(sp)
-    LONG_S	$23, PT_R23(sp)
-    LONG_S	$30, PT_R30(sp)
+    .macro  SAVE_STATIC
+    LONG_S  $16, PT_R16(sp)
+    LONG_S  $17, PT_R17(sp)
+    LONG_S  $18, PT_R18(sp)
+    LONG_S  $19, PT_R19(sp)
+    LONG_S  $20, PT_R20(sp)
+    LONG_S  $21, PT_R21(sp)
+    LONG_S  $22, PT_R22(sp)
+    LONG_S  $23, PT_R23(sp)
+    LONG_S  $30, PT_R30(sp)
     .endm
 
-    .macro	SAVE_SOME
-    .set	push
-    .set	noat
-    .set	reorder
-    move	k1, sp
-    move	k0, sp
+    .macro  SAVE_SOME
+    .set    push
+    .set    noat
+    .set    reorder
+    move    k1, sp
+    move    k0, sp
     PTR_SUBU sp, k1, PT_SIZE
-    LONG_S	k0, PT_R29(sp)
-    LONG_S	$3, PT_R3(sp)
-    LONG_S	$0, PT_R0(sp)
-    MFC0	v1, CP0_STATUS
-    LONG_S	$2, PT_R2(sp)
-    LONG_S	v1, PT_STATUS(sp)
-    LONG_S	$4, PT_R4(sp)
-    MFC0	v1, CP0_CAUSE
-    LONG_S	$5, PT_R5(sp)
-    LONG_S	v1, PT_CAUSE(sp)
-    LONG_S	$6, PT_R6(sp)
-    MFC0	v1, CP0_EPC
-    LONG_S	$7, PT_R7(sp)
-    LONG_S	v1, PT_EPC(sp)
-    LONG_S	$25, PT_R25(sp)
-    LONG_S	$28, PT_R28(sp)
-    LONG_S	$31, PT_R31(sp)
-    .set	pop
+    LONG_S  k0, PT_R29(sp)
+    LONG_S  $3, PT_R3(sp)
+    LONG_S  $0, PT_R0(sp)
+    MFC0    v1, CP0_STATUS
+    LONG_S  $2, PT_R2(sp)
+    LONG_S  v1, PT_STATUS(sp)
+    LONG_S  $4, PT_R4(sp)
+    MFC0    v1, CP0_CAUSE
+    LONG_S  $5, PT_R5(sp)
+    LONG_S  v1, PT_CAUSE(sp)
+    LONG_S  $6, PT_R6(sp)
+    MFC0    v1, CP0_EPC
+    LONG_S  $7, PT_R7(sp)
+    LONG_S  v1, PT_EPC(sp)
+    LONG_S  $25, PT_R25(sp)
+    LONG_S  $28, PT_R28(sp)
+    LONG_S  $31, PT_R31(sp)
+    .set    pop
     .endm
 
-    .macro	SAVE_ALL
+    .macro  SAVE_ALL
     SAVE_SOME
     SAVE_AT
     SAVE_TEMP
@@ -155,86 +155,86 @@
     .set pop
     .endm
 
-    .macro	RESTORE_AT
-    .set	push
-    .set	noat
-    LONG_L	$1,  PT_R1(sp)
-    .set	pop
+    .macro  RESTORE_AT
+    .set    push
+    .set    noat
+    LONG_L  $1,  PT_R1(sp)
+    .set    pop
     .endm
 
-    .macro	RESTORE_TEMP
-    lw	$24, PT_LO(sp)
-    LONG_L	$8, PT_R8(sp)
-    LONG_L	$9, PT_R9(sp)
-    mtlo	$24
-    lw	$24, PT_HI(sp)
-    LONG_L	$10, PT_R10(sp)
-    LONG_L	$11, PT_R11(sp)
-    mthi	$24
-    LONG_L	$12, PT_R12(sp)
-    LONG_L	$13, PT_R13(sp)
-    LONG_L	$14, PT_R14(sp)
-    LONG_L	$15, PT_R15(sp)
-    LONG_L	$24, PT_R24(sp)
+    .macro  RESTORE_TEMP
+    lw  $24, PT_LO(sp)
+    LONG_L  $8, PT_R8(sp)
+    LONG_L  $9, PT_R9(sp)
+    mtlo    $24
+    lw  $24, PT_HI(sp)
+    LONG_L  $10, PT_R10(sp)
+    LONG_L  $11, PT_R11(sp)
+    mthi    $24
+    LONG_L  $12, PT_R12(sp)
+    LONG_L  $13, PT_R13(sp)
+    LONG_L  $14, PT_R14(sp)
+    LONG_L  $15, PT_R15(sp)
+    LONG_L  $24, PT_R24(sp)
     .endm
 
-    .macro	RESTORE_STATIC
-    LONG_L	$16, PT_R16(sp)
-    LONG_L	$17, PT_R17(sp)
-    LONG_L	$18, PT_R18(sp)
-    LONG_L	$19, PT_R19(sp)
-    LONG_L	$20, PT_R20(sp)
-    LONG_L	$21, PT_R21(sp)
-    LONG_L	$22, PT_R22(sp)
-    LONG_L	$23, PT_R23(sp)
-    LONG_L	$30, PT_R30(sp)
+    .macro  RESTORE_STATIC
+    LONG_L  $16, PT_R16(sp)
+    LONG_L  $17, PT_R17(sp)
+    LONG_L  $18, PT_R18(sp)
+    LONG_L  $19, PT_R19(sp)
+    LONG_L  $20, PT_R20(sp)
+    LONG_L  $21, PT_R21(sp)
+    LONG_L  $22, PT_R22(sp)
+    LONG_L  $23, PT_R23(sp)
+    LONG_L  $30, PT_R30(sp)
     .endm
 
 #define STATMASK 0x1f
 
-    .macro	RESTORE_SOME
-    .set	push
-    .set	reorder
-    .set	noat
-    mfc0	a0, CP0_STATUS
-    ori	a0, STATMASK
-    xori	a0, STATMASK
-    mtc0	a0, CP0_STATUS
-    li	v1, (ST0_CU1 | ST0_FR | ST0_IM)
-    and	a0, v1, a0
-    LONG_L	v0, PT_STATUS(sp)
-    li	v1, ~(ST0_CU1 | ST0_FR | ST0_IM)
-    and	v0, v1
-    or	v0, a0
+    .macro  RESTORE_SOME
+    .set    push
+    .set    reorder
+    .set    noat
+    mfc0    a0, CP0_STATUS
+    ori a0, STATMASK
+    xori    a0, STATMASK
+    mtc0    a0, CP0_STATUS
+    li  v1, (ST0_CU1 | ST0_FR | ST0_IM)
+    and a0, v1, a0
+    LONG_L  v0, PT_STATUS(sp)
+    li  v1, ~(ST0_CU1 | ST0_FR | ST0_IM)
+    and v0, v1
+    or  v0, a0
     li  v1, (ST0_KX | ST0_SX | ST0_UX)
     or  v0, v1
-    mtc0	v0, CP0_STATUS
-    LONG_L	v1, PT_EPC(sp)
-    MTC0	v1, CP0_EPC
-    LONG_L	$31, PT_R31(sp)
-    LONG_L	$28, PT_R28(sp)
-    LONG_L	$25, PT_R25(sp)
-    LONG_L	$7,  PT_R7(sp)
-    LONG_L	$6,  PT_R6(sp)
-    LONG_L	$5,  PT_R5(sp)
-    LONG_L	$4,  PT_R4(sp)
-    LONG_L	$3,  PT_R3(sp)
-    LONG_L	$2,  PT_R2(sp)
-    .set	pop
+    mtc0    v0, CP0_STATUS
+    LONG_L  v1, PT_EPC(sp)
+    MTC0    v1, CP0_EPC
+    LONG_L  $31, PT_R31(sp)
+    LONG_L  $28, PT_R28(sp)
+    LONG_L  $25, PT_R25(sp)
+    LONG_L  $7,  PT_R7(sp)
+    LONG_L  $6,  PT_R6(sp)
+    LONG_L  $5,  PT_R5(sp)
+    LONG_L  $4,  PT_R4(sp)
+    LONG_L  $3,  PT_R3(sp)
+    LONG_L  $2,  PT_R2(sp)
+    .set    pop
     .endm
 
-    .macro	RESTORE_SP_AND_RET
-    LONG_L	sp, PT_R29(sp)
+    .macro  RESTORE_SP_AND_RET
+    LONG_L  sp, PT_R29(sp)
     eret
     nop
     .endm
 
 
-    .macro	RESTORE_SP
-    LONG_L	sp, PT_R29(sp)
+    .macro  RESTORE_SP
+    LONG_L  sp, PT_R29(sp)
     .endm
 
-    .macro	RESTORE_ALL
+    .macro  RESTORE_ALL
     RESTORE_TEMP
     RESTORE_FPU
     RESTORE_STATIC
@@ -243,7 +243,7 @@
     RESTORE_SP
     .endm
 
-    .macro	RESTORE_ALL_AND_RET
+    .macro  RESTORE_ALL_AND_RET
     RESTORE_TEMP
     RESTORE_FPU
     RESTORE_STATIC
diff --git a/libcpu/mips/gs232/cache.c b/libcpu/mips/gs232/cache.c
index 484d3816f4..bcbf2aba49 100644
--- a/libcpu/mips/gs232/cache.c
+++ b/libcpu/mips/gs232/cache.c
@@ -1,7 +1,7 @@
 /*
  * Cache Ops For Loongson GS232
  *
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -15,8 +15,8 @@
 #include 
 #include 
 
-#define K0BASE			0x80000000
-#define PRID_LS1C		0x4220
+#define K0BASE          0x80000000
+#define PRID_LS1C       0x4220
 
 extern void Clear_TagLo (void);
 extern void Invalidate_Icache_Ls1c(unsigned int);
@@ -27,10 +27,10 @@ extern void enable_cpu_cache(void);
 
 typedef struct cacheinfo_t
 {
-    unsigned int	icache_size;
-    unsigned int	dcache_size;
-    unsigned int	icacheline_size;
-    unsigned int	dcacheline_size;
+    unsigned int    icache_size;
+    unsigned int    dcache_size;
+    unsigned int    icacheline_size;
+    unsigned int    dcacheline_size;
 } cacheinfo_t ;
 
 typedef struct cacheop_t
@@ -183,12 +183,12 @@ void rt_hw_cache_init(void)
     end = (start + pcacheinfo->icache_size);
 
     /*
-     *	2. clear CP0 taglo/taghi register;
+     *  2. clear CP0 taglo/taghi register;
      */
     pcacheop->Clear_TagLo();
 
     /*
-     *	3. invalidate instruction cache;
+     *  3. invalidate instruction cache;
      */
     while (start < end)
     {
@@ -197,7 +197,7 @@ void rt_hw_cache_init(void)
     }
 
     /*
-     *	4. invalidate data cache;
+     *  4. invalidate data cache;
      */
     start = K0BASE;
     end = (start + pcacheinfo->dcache_size);
diff --git a/libcpu/mips/gs232/cache.h b/libcpu/mips/gs232/cache.h
index 381298e4df..b47db90814 100644
--- a/libcpu/mips/gs232/cache.h
+++ b/libcpu/mips/gs232/cache.h
@@ -1,8 +1,8 @@
 /*
  * Cache Ops For Loongson GS232
- * 
- * Copyright (c) 2006-2019, RT-Thread Development Team
- * 
+ *
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
@@ -12,8 +12,8 @@
  * 2015-07-08     chinesebear   modified for loongson 1c
  */
 
-#ifndef	__CACHE_H__
-#define	__CACHE_H__
+#ifndef __CACHE_H__
+#define __CACHE_H__
 /*
  * Cache Operations
  */
@@ -21,31 +21,31 @@
 #define Index_Writeback_Inv_D   0x01
 #define Index_Invalidate_SI     0x02
 #define Index_Writeback_Inv_SD  0x03
-#define Index_Load_Tag_I		0x04
-#define Index_Load_Tag_D		0x05
-#define Index_Load_Tag_SI		0x06
-#define Index_Load_Tag_SD		0x07
-#define Index_Store_Tag_I		0x08
-#define Index_Store_Tag_D		0x09
-#define Index_Store_Tag_SI		0x0A
-#define Index_Store_Tag_SD		0x0B
-#define Create_Dirty_Excl_D		0x0d
-#define Create_Dirty_Excl_SD	0x0f
-#define Hit_Invalidate_I		0x10
-#define Hit_Invalidate_D		0x11
-#define Hit_Invalidate_SI		0x12
-#define Hit_Invalidate_SD		0x13
-#define Fill					0x14
-#define Hit_Writeback_Inv_D		0x15
+#define Index_Load_Tag_I        0x04
+#define Index_Load_Tag_D        0x05
+#define Index_Load_Tag_SI       0x06
+#define Index_Load_Tag_SD       0x07
+#define Index_Store_Tag_I       0x08
+#define Index_Store_Tag_D       0x09
+#define Index_Store_Tag_SI      0x0A
+#define Index_Store_Tag_SD      0x0B
+#define Create_Dirty_Excl_D     0x0d
+#define Create_Dirty_Excl_SD    0x0f
+#define Hit_Invalidate_I        0x10
+#define Hit_Invalidate_D        0x11
+#define Hit_Invalidate_SI       0x12
+#define Hit_Invalidate_SD       0x13
+#define Fill                    0x14
+#define Hit_Writeback_Inv_D     0x15
 /* 0x16 is unused */
-#define Hit_Writeback_Inv_SD	0x17
-#define Hit_Writeback_I			0x18
-#define Hit_Writeback_D			0x19
+#define Hit_Writeback_Inv_SD    0x17
+#define Hit_Writeback_I         0x18
+#define Hit_Writeback_D         0x19
 /* 0x1a is unused */
-#define Hit_Writeback_SD		0x1b
+#define Hit_Writeback_SD        0x1b
 /* 0x1c is unused */
 /* 0x1e is unused */
-#define Hit_Set_Virtual_SI		0x1e
-#define Hit_Set_Virtual_SD		0x1f
+#define Hit_Set_Virtual_SI      0x1e
+#define Hit_Set_Virtual_SD      0x1f
 
 #endif
diff --git a/libcpu/mips/gs232/cpuport.c b/libcpu/mips/gs232/cpuport.c
index e3c078241f..e22d9bc14d 100644
--- a/libcpu/mips/gs232/cpuport.c
+++ b/libcpu/mips/gs232/cpuport.c
@@ -1,8 +1,8 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
- * 
+ *
  * Change Logs:
  * Date                Author         Notes
  * 2010-07-09     Bernard        first version
@@ -26,9 +26,9 @@
 RT_WEAK void rt_hw_cpu_reset(void)
 {
     /* open the watch-dog */
-    WDT_EN = 0x01; 		/* watch dog enable */
-    WDT_TIMER = 0x01;	/* watch dog will be timeout after 1 tick */
-    WDT_SET = 0x01;		/* watch dog start */
+    WDT_EN = 0x01;      /* watch dog enable */
+    WDT_TIMER = 0x01;   /* watch dog will be timeout after 1 tick */
+    WDT_SET = 0x01;     /* watch dog start */
 
     rt_kprintf("reboot system...\n");
     while (1);
diff --git a/libcpu/mips/gs232/gs232.h b/libcpu/mips/gs232/gs232.h
index 95c81cf93e..cbc660c874 100644
--- a/libcpu/mips/gs232/gs232.h
+++ b/libcpu/mips/gs232/gs232.h
@@ -1,8 +1,8 @@
 /*
  * Misc define for GS232
- * 
- * Copyright (c) 2006-2019, RT-Thread Development Team
- * 
+ *
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
@@ -15,47 +15,47 @@
 
 #include 
 
-#define INTC_BASE			0xBFD01040
+#define INTC_BASE           0xBFD01040
 
 #ifdef SOC_LS1B
-#define GS232_INTC_CELLS		4
+#define GS232_INTC_CELLS        4
 #endif
 
 #ifdef SOC_LS1C300
-#define GS232_INTC_CELLS		5
+#define GS232_INTC_CELLS        5
 #endif
 
-#define GS232_NR_IRQS			(32 * GS232_INTC_CELLS)
+#define GS232_NR_IRQS           (32 * GS232_INTC_CELLS)
 
-#define GMAC0_BASE			0xBFE10000
-#define GMAC0_DMA_BASE		0xBFE11000
-#define GMAC1_BASE			0xBFE20000
-#define GMAC1_DMA_BASE		0xBFE21000
-#define I2C0_BASE			0xBFE58000
-#define PWM0_BASE			0xBFE5C000
-#define PWM1_BASE			0xBFE5C010
-#define PWM2_BASE			0xBFE5C020
-#define PWM3_BASE			0xBFE5C030
-#define WDT_BASE			0xBFE5C060
-#define RTC_BASE			0xBFE64000
-#define I2C1_BASE			0xBFE68000
-#define I2C2_BASE			0xBFE70000
-#define AC97_BASE			0xBFE74000
-#define NAND_BASE			0xBFE78000
-#define SPI_BASE			0xBFE80000
-#define CAN1_BASE			0xBF004300
-#define CAN0_BASE			0xBF004400
+#define GMAC0_BASE          0xBFE10000
+#define GMAC0_DMA_BASE      0xBFE11000
+#define GMAC1_BASE          0xBFE20000
+#define GMAC1_DMA_BASE      0xBFE21000
+#define I2C0_BASE           0xBFE58000
+#define PWM0_BASE           0xBFE5C000
+#define PWM1_BASE           0xBFE5C010
+#define PWM2_BASE           0xBFE5C020
+#define PWM3_BASE           0xBFE5C030
+#define WDT_BASE            0xBFE5C060
+#define RTC_BASE            0xBFE64000
+#define I2C1_BASE           0xBFE68000
+#define I2C2_BASE           0xBFE70000
+#define AC97_BASE           0xBFE74000
+#define NAND_BASE           0xBFE78000
+#define SPI_BASE            0xBFE80000
+#define CAN1_BASE           0xBF004300
+#define CAN0_BASE           0xBF004400
 
 #ifndef __ASSEMBLY__
 #include 
 
 /* Watch Dog registers */
-#define WDT_EN				HWREG32(WDT_BASE + 0x00)
-#define WDT_SET				HWREG32(WDT_BASE + 0x04)
-#define WDT_TIMER			HWREG32(WDT_BASE + 0x08)
+#define WDT_EN              HWREG32(WDT_BASE + 0x00)
+#define WDT_SET             HWREG32(WDT_BASE + 0x04)
+#define WDT_TIMER           HWREG32(WDT_BASE + 0x08)
 
-#define PLL_FREQ 			HWREG32(0xbfe78030)
-#define PLL_DIV_PARAM 		HWREG32(0xbfe78034)
+#define PLL_FREQ            HWREG32(0xbfe78030)
+#define PLL_DIV_PARAM       HWREG32(0xbfe78034)
 
 struct gs232_intc_regs
 {
@@ -65,7 +65,7 @@ struct gs232_intc_regs
     volatile unsigned int int_clr;        /* offset 0x10*/
     volatile unsigned int int_pol;
     volatile unsigned int int_edge;        /* offset 0 */
-}; 
+};
 
 extern void rt_hw_timer_init(void);
 
diff --git a/libcpu/mips/gs232/interrupt.c b/libcpu/mips/gs232/interrupt.c
index 66abea379d..fb80a8c1ec 100644
--- a/libcpu/mips/gs232/interrupt.c
+++ b/libcpu/mips/gs232/interrupt.c
@@ -1,17 +1,17 @@
 /*
  * Interrupt handle for GS232
- * 
- * Copyright (c) 2006-2019, RT-Thread Development Team
- * 
+ *
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
  * 2010-10-15     Bernard      first version
- * 2010-10-15     lgnq           modified for LS1B
+ * 2010-10-15     lgnq         modified for LS1B
  * 2013-03-29     aozima       Modify the interrupt interface implementations.
- * 2015-07-06     chinesebear modified for loongson 1c
- * 2019-12-04     Jiaxun Yang   Generialize
+ * 2015-07-06     chinesebear  modified for loongson 1c
+ * 2019-12-04     Jiaxun Yang  Generialize
  */
 
 #include 
@@ -52,7 +52,7 @@ void rt_hw_interrupt_init(void)
         /* Disable */
         (gs232_hw0_icregs+i)->int_en = 0x0;
         /* Trigger active low */
-        (gs232_hw0_icregs+i)->int_pol = -1;	   /* Must be done here */
+        (gs232_hw0_icregs+i)->int_pol = -1;    /* Must be done here */
         /* Make all interrupts level triggered */
         (gs232_hw0_icregs+i)->int_edge = 0x00000000;
         /* Mask all interrupts */
@@ -113,7 +113,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
 
 
 /**
- * 执 Call ISR
+ * Call ISR
  * @IRQn ID of IRQ
  */
 void gs232_do_IRQ(int IRQn)
diff --git a/libcpu/mips/gs232/ls1b.h b/libcpu/mips/gs232/ls1b.h
index a6f244ef4f..cf32bd5f02 100644
--- a/libcpu/mips/gs232/ls1b.h
+++ b/libcpu/mips/gs232/ls1b.h
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
- * 
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
@@ -13,44 +13,44 @@
 
 #include 
 
-#define LS1B_ACPI_IRQ	0
-#define LS1B_HPET_IRQ	1
-#define LS1B_UART0_IRQ	2
-#define LS1B_UART1_IRQ	3
-#define LS1B_UART2_IRQ	4
-#define LS1B_UART3_IRQ	5
-#define LS1B_UART4_IRQ	29
-#define LS1B_UART5_IRQ	30
-#define LS1B_UART6_IRQ	2	//鍏变韩LS1B_UART0_IRQ
-#define LS1B_UART7_IRQ	2
-#define LS1B_UART8_IRQ	2
-#define LS1B_UART9_IRQ	3	//鍏变韩LS1B_UART1_IRQ
-#define LS1B_UART10_IRQ	3
-#define LS1B_UART11_IRQ	3
+#define LS1B_ACPI_IRQ   0
+#define LS1B_HPET_IRQ   1
+#define LS1B_UART0_IRQ  2
+#define LS1B_UART1_IRQ  3
+#define LS1B_UART2_IRQ  4
+#define LS1B_UART3_IRQ  5
+#define LS1B_UART4_IRQ  29
+#define LS1B_UART5_IRQ  30
+#define LS1B_UART6_IRQ  2   //鍏变韩LS1B_UART0_IRQ
+#define LS1B_UART7_IRQ  2
+#define LS1B_UART8_IRQ  2
+#define LS1B_UART9_IRQ  3   //鍏变韩LS1B_UART1_IRQ
+#define LS1B_UART10_IRQ 3
+#define LS1B_UART11_IRQ 3
 
-#define LS1B_CAN0_IRQ	6
-#define LS1B_CAN1_IRQ	7
-#define LS1B_SPI0_IRQ	8
-#define LS1B_SPI1_IRQ	9
-#define LS1B_AC97_IRQ	10
-#define LS1B_MS_IRQ		11
-#define LS1B_KB_IRQ		12
-#define LS1B_DMA0_IRQ	13
-#define LS1B_DMA1_IRQ	14
-#define LS1B_NAND_IRQ	15
-#define LS1B_I2C0_IRQ	16
-#define LS1B_I2C1_IRQ	17
-#define LS1B_PWM0_IRQ	18
-#define LS1B_PWM1_IRQ	19
-#define LS1B_PWM2_IRQ	20
-#define LS1B_PWM3_IRQ	21
-#define LS1B_LPC_IRQ	22
-#define LS1B_EHCI_IRQ	32
-#define LS1B_OHCI_IRQ	33
-#define LS1B_GMAC1_IRQ	34
-#define LS1B_GMAC2_IRQ	35
-#define LS1B_SATA_IRQ	36
-#define LS1B_GPU_IRQ	37
+#define LS1B_CAN0_IRQ   6
+#define LS1B_CAN1_IRQ   7
+#define LS1B_SPI0_IRQ   8
+#define LS1B_SPI1_IRQ   9
+#define LS1B_AC97_IRQ   10
+#define LS1B_MS_IRQ     11
+#define LS1B_KB_IRQ     12
+#define LS1B_DMA0_IRQ   13
+#define LS1B_DMA1_IRQ   14
+#define LS1B_NAND_IRQ   15
+#define LS1B_I2C0_IRQ   16
+#define LS1B_I2C1_IRQ   17
+#define LS1B_PWM0_IRQ   18
+#define LS1B_PWM1_IRQ   19
+#define LS1B_PWM2_IRQ   20
+#define LS1B_PWM3_IRQ   21
+#define LS1B_LPC_IRQ    22
+#define LS1B_EHCI_IRQ   32
+#define LS1B_OHCI_IRQ   33
+#define LS1B_GMAC1_IRQ  34
+#define LS1B_GMAC2_IRQ  35
+#define LS1B_SATA_IRQ   36
+#define LS1B_GPU_IRQ    37
 #define LS1B_PCI_INTA_IRQ 38
 #define LS1B_PCI_INTB_IRQ 39
 #define LS1B_PCI_INTC_IRQ 40
@@ -61,13 +61,13 @@
 #define LS1B_GPIO_IRQ_COUNT 64
 #define LS1B_GPIO_LAST_IRQ  (LS1B_GPIO_FIRST_IRQ + LS1B_GPIO_IRQ_COUNT-1)
 
-#define INT_PCI_INTA	(1<<6)
-#define INT_PCI_INTB	(1<<7)
-#define INT_PCI_INTC	(1<<8)
-#define INT_PCI_INTD	(1<<9)
+#define INT_PCI_INTA    (1<<6)
+#define INT_PCI_INTB    (1<<7)
+#define INT_PCI_INTC    (1<<8)
+#define INT_PCI_INTD    (1<<9)
 
 #define LS1B_LAST_IRQ 159
-#define MIPS_CPU_TIMER_IRQ	167
+#define MIPS_CPU_TIMER_IRQ  167
 #define LS1B_INTREG_BASE 0xbfd01040
 
 #define LS1B_DMA_IRQ_BASE 168
diff --git a/libcpu/mips/gs232/ls1c.h b/libcpu/mips/gs232/ls1c.h
index 54c7e36e99..6b8e3fc512 100644
--- a/libcpu/mips/gs232/ls1c.h
+++ b/libcpu/mips/gs232/ls1c.h
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
- * 
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
diff --git a/libcpu/mips/gs232/mipscfg.c b/libcpu/mips/gs232/mipscfg.c
index 85e0e633ea..6b37abb895 100644
--- a/libcpu/mips/gs232/mipscfg.c
+++ b/libcpu/mips/gs232/mipscfg.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -12,13 +12,13 @@
 
 mips32_core_cfg_t g_mips_core =
 {
-    16,		/* icache_line_size */
-    256,	/* icache_lines_per_way */
-    4,		/* icache_ways */
-    16,		/* dcache_line_size */
-    256,	/* dcache_lines_per_way */
-    4,		/* dcache_ways */
-    16,		/* max_tlb_entries */
+    16,     /* icache_line_size */
+    256,    /* icache_lines_per_way */
+    4,      /* icache_ways */
+    16,     /* dcache_line_size */
+    256,    /* dcache_lines_per_way */
+    4,      /* dcache_ways */
+    16,     /* max_tlb_entries */
 };
 
 static rt_uint16_t m_pow(rt_uint16_t b, rt_uint16_t n)
diff --git a/libcpu/mips/gs232/timer.c b/libcpu/mips/gs232/timer.c
index 8879b82ccf..4df02a1b62 100644
--- a/libcpu/mips/gs232/timer.c
+++ b/libcpu/mips/gs232/timer.c
@@ -1,7 +1,7 @@
 /*
  * Assembly Macros For MIPS
  *
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -20,14 +20,14 @@
  */
 void rt_hw_timer_handler(void)
 {
-	unsigned int count;
+    unsigned int count;
 
-	count = read_c0_compare();
-	write_c0_compare(count);
-	write_c0_count(0);
+    count = read_c0_compare();
+    write_c0_compare(count);
+    write_c0_count(0);
 
-	/* increase a OS tick */
-	rt_tick_increase();
+    /* increase a OS tick */
+    rt_tick_increase();
 }
 
 /**
@@ -35,7 +35,7 @@ void rt_hw_timer_handler(void)
  */
 void rt_hw_timer_init(void)
 {
-	write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
-	write_c0_count(0);
-	mips_unmask_cpu_irq(7);
-}
\ No newline at end of file
+    write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
+    write_c0_count(0);
+    mips_unmask_cpu_irq(7);
+}
diff --git a/libcpu/mips/gs264/cache.c b/libcpu/mips/gs264/cache.c
index 54d38d0d3f..50976f2e4f 100644
--- a/libcpu/mips/gs264/cache.c
+++ b/libcpu/mips/gs264/cache.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/mips/gs264/cache.h b/libcpu/mips/gs264/cache.h
index 10a4afd899..1e1bc52737 100644
--- a/libcpu/mips/gs264/cache.h
+++ b/libcpu/mips/gs264/cache.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/mips/gs264/mips_mmu.c b/libcpu/mips/gs264/mips_mmu.c
index 7bed69596a..eae9b007de 100644
--- a/libcpu/mips/gs264/mips_mmu.c
+++ b/libcpu/mips/gs264/mips_mmu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -19,7 +19,7 @@ void mmu_init()
     uint32_t status = read_c0_status();
     status |= 0x07 << 5;//ux = 1,sx = 1,kx = 1
     write_c0_status(status);
-    
+
     mmu_clear_tlb();
     mmu_clear_itlb();
 }
@@ -154,7 +154,7 @@ void mmu_set_map(uint64_t vpn,uint64_t ppn,page_mask_enum_t page_mask,uint32_t a
     uint64_t even_vpn = vpn & (~lb);
     uint32_t index;
     tlb_item_t tlb_item,tlb2_item;
-    
+
     mmu_tlb_item_init(&tlb_item);
     mmu_tlb_item_init(&tlb2_item);
     tlb_item.page_mask.mask = page_mask;
diff --git a/libcpu/mips/gs264/mips_mmu.h b/libcpu/mips/gs264/mips_mmu.h
index fcbcef3621..4c7af117d9 100644
--- a/libcpu/mips/gs264/mips_mmu.h
+++ b/libcpu/mips/gs264/mips_mmu.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -96,4 +96,4 @@ uint64_t mmu_tlb_get_bad_vaddr();
 
 void tlb_dump();
 
-#endif
\ No newline at end of file
+#endif
diff --git a/libcpu/mips/gs264/mipscfg.c b/libcpu/mips/gs264/mipscfg.c
index b2aed120ae..0ce7000581 100644
--- a/libcpu/mips/gs264/mipscfg.c
+++ b/libcpu/mips/gs264/mipscfg.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/mips/gs264/mmu.c b/libcpu/mips/gs264/mmu.c
index b5bedace50..cab73f37bd 100644
--- a/libcpu/mips/gs264/mmu.c
+++ b/libcpu/mips/gs264/mmu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -387,7 +387,7 @@ static void __rt_hw_mmu_unmap(rt_mmu_info *mmu_info, void* v_addr, size_t npages
             return;
         }
 
-        if (*(mmu_l2 + l2_off) & ARCH_MMU_USED_MASK) 
+        if (*(mmu_l2 + l2_off) & ARCH_MMU_USED_MASK)
         {
             *(mmu_l2 + l2_off) = 0;
             /* cache maintain */
@@ -691,7 +691,7 @@ void *rt_hw_kernel_virt_to_phys(void *v_addr, size_t size)
 
 //pa --> va
 void *rt_hw_kernel_phys_to_virt(void *p_addr, size_t size)
-{   
+{
     void *v_addr = 0;
 
     #ifdef RT_USING_USERSPACE
diff --git a/libcpu/mips/gs264/mmu.h b/libcpu/mips/gs264/mmu.h
index 2472bf975f..22a749af64 100644
--- a/libcpu/mips/gs264/mmu.h
+++ b/libcpu/mips/gs264/mmu.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/mips/pic32/cpuport.c b/libcpu/mips/pic32/cpuport.c
index 3f08d57167..089f652bce 100644
--- a/libcpu/mips/pic32/cpuport.c
+++ b/libcpu/mips/pic32/cpuport.c
@@ -45,51 +45,51 @@ rt_uint32_t __attribute__((nomips16)) _get_gp(void)
  */
 rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_addr, void *texit)
 {
-	rt_uint32_t *stk;
+    rt_uint32_t *stk;
 
     /** Start at stack top */
     stk = (rt_uint32_t *)stack_addr;
-	*(stk)   = (rt_uint32_t) tentry;        /* pc: Entry Point */
-	*(--stk) = (rt_uint32_t) 0x00800000;    /* c0_cause: IV=1, */
-	*(--stk) = (rt_uint32_t) 0;		        /* c0_badvaddr */
-	*(--stk) = (rt_uint32_t) 0;             /* lo */
-	*(--stk) = (rt_uint32_t) 0;	            /* hi */
-	*(--stk) = (rt_uint32_t) 1; 			/* C0_SR: IE = En, */
-	*(--stk) = (rt_uint32_t) texit;	        /* 31 ra */
-	*(--stk) = (rt_uint32_t) 0x0000001e;	/* 30 s8 */
-	*(--stk) = (rt_uint32_t) stack_addr;	/* 29 sp */
-	*(--stk) = (rt_uint32_t) _get_gp();     /* 28 gp */
-	*(--stk) = (rt_uint32_t) 0x0000001b;	/* 27 k1 */
-	*(--stk) = (rt_uint32_t) 0x0000001a;	/* 26 k0 */
-	*(--stk) = (rt_uint32_t) 0x00000019;	/* 25 t9 */
-	*(--stk) = (rt_uint32_t) 0x00000018;	/* 24 t8 */
-	*(--stk) = (rt_uint32_t) 0x00000017;	/* 23 s7 */
-	*(--stk) = (rt_uint32_t) 0x00000016;	/* 22 s6 */
-	*(--stk) = (rt_uint32_t) 0x00000015;	/* 21 s5 */
-	*(--stk) = (rt_uint32_t) 0x00000014;	/* 20 s4 */
-	*(--stk) = (rt_uint32_t) 0x00000013;	/* 19 s3 */
-	*(--stk) = (rt_uint32_t) 0x00000012;	/* 18 s2 */
-	*(--stk) = (rt_uint32_t) 0x00000011;	/* 17 s1 */
-	*(--stk) = (rt_uint32_t) 0x00000010;	/* 16 s0 */
-	*(--stk) = (rt_uint32_t) 0x0000000f;	/* 15 t7 */
-	*(--stk) = (rt_uint32_t) 0x0000000e;	/* 14 t6 */
-	*(--stk) = (rt_uint32_t) 0x0000000d;	/* 13 t5 */
-	*(--stk) = (rt_uint32_t) 0x0000000c;	/* 12 t4 */
-	*(--stk) = (rt_uint32_t) 0x0000000b;	/* 11 t3 */
-	*(--stk) = (rt_uint32_t) 0x0000000a; 	/* 10 t2 */
-	*(--stk) = (rt_uint32_t) 0x00000009;	/* 9 t1 */
-	*(--stk) = (rt_uint32_t) 0x00000008;	/* 8 t0 */
-	*(--stk) = (rt_uint32_t) 0x00000007;	/* 7 a3 */
-	*(--stk) = (rt_uint32_t) 0x00000006;	/* 6 a2 */
-	*(--stk) = (rt_uint32_t) 0x00000005;	/* 5 a1 */
-	*(--stk) = (rt_uint32_t) parameter;	    /* 4 a0 */
-	*(--stk) = (rt_uint32_t) 0x00000003;	/* 3 v1 */
-	*(--stk) = (rt_uint32_t) 0x00000002;	/* 2 v0 */
-	*(--stk) = (rt_uint32_t) 0x00000001;	/* 1 at */
-	*(--stk) = (rt_uint32_t) 0x00000000;	/* 0 zero */
+    *(stk)   = (rt_uint32_t) tentry;        /* pc: Entry Point */
+    *(--stk) = (rt_uint32_t) 0x00800000;    /* c0_cause: IV=1, */
+    *(--stk) = (rt_uint32_t) 0;             /* c0_badvaddr */
+    *(--stk) = (rt_uint32_t) 0;             /* lo */
+    *(--stk) = (rt_uint32_t) 0;             /* hi */
+    *(--stk) = (rt_uint32_t) 1;             /* C0_SR: IE = En, */
+    *(--stk) = (rt_uint32_t) texit;         /* 31 ra */
+    *(--stk) = (rt_uint32_t) 0x0000001e;    /* 30 s8 */
+    *(--stk) = (rt_uint32_t) stack_addr;    /* 29 sp */
+    *(--stk) = (rt_uint32_t) _get_gp();     /* 28 gp */
+    *(--stk) = (rt_uint32_t) 0x0000001b;    /* 27 k1 */
+    *(--stk) = (rt_uint32_t) 0x0000001a;    /* 26 k0 */
+    *(--stk) = (rt_uint32_t) 0x00000019;    /* 25 t9 */
+    *(--stk) = (rt_uint32_t) 0x00000018;    /* 24 t8 */
+    *(--stk) = (rt_uint32_t) 0x00000017;    /* 23 s7 */
+    *(--stk) = (rt_uint32_t) 0x00000016;    /* 22 s6 */
+    *(--stk) = (rt_uint32_t) 0x00000015;    /* 21 s5 */
+    *(--stk) = (rt_uint32_t) 0x00000014;    /* 20 s4 */
+    *(--stk) = (rt_uint32_t) 0x00000013;    /* 19 s3 */
+    *(--stk) = (rt_uint32_t) 0x00000012;    /* 18 s2 */
+    *(--stk) = (rt_uint32_t) 0x00000011;    /* 17 s1 */
+    *(--stk) = (rt_uint32_t) 0x00000010;    /* 16 s0 */
+    *(--stk) = (rt_uint32_t) 0x0000000f;    /* 15 t7 */
+    *(--stk) = (rt_uint32_t) 0x0000000e;    /* 14 t6 */
+    *(--stk) = (rt_uint32_t) 0x0000000d;    /* 13 t5 */
+    *(--stk) = (rt_uint32_t) 0x0000000c;    /* 12 t4 */
+    *(--stk) = (rt_uint32_t) 0x0000000b;    /* 11 t3 */
+    *(--stk) = (rt_uint32_t) 0x0000000a;    /* 10 t2 */
+    *(--stk) = (rt_uint32_t) 0x00000009;    /* 9 t1 */
+    *(--stk) = (rt_uint32_t) 0x00000008;    /* 8 t0 */
+    *(--stk) = (rt_uint32_t) 0x00000007;    /* 7 a3 */
+    *(--stk) = (rt_uint32_t) 0x00000006;    /* 6 a2 */
+    *(--stk) = (rt_uint32_t) 0x00000005;    /* 5 a1 */
+    *(--stk) = (rt_uint32_t) parameter;     /* 4 a0 */
+    *(--stk) = (rt_uint32_t) 0x00000003;    /* 3 v1 */
+    *(--stk) = (rt_uint32_t) 0x00000002;    /* 2 v0 */
+    *(--stk) = (rt_uint32_t) 0x00000001;    /* 1 at */
+    *(--stk) = (rt_uint32_t) 0x00000000;    /* 0 zero */
 
-	/* return task's current stack address */
-	return (rt_uint8_t *)stk;
+    /* return task's current stack address */
+    return (rt_uint8_t *)stk;
 }
 
 
diff --git a/libcpu/mips/pic32/exceptions.c b/libcpu/mips/pic32/exceptions.c
index de5f70b7e1..d9f457a707 100644
--- a/libcpu/mips/pic32/exceptions.c
+++ b/libcpu/mips/pic32/exceptions.c
@@ -11,13 +11,13 @@
  * Complier:        MPLAB C32
  *                  MPLAB IDE
  * Company:         Microchip Technology, Inc.
- * Author:			Darren Wenn
+ * Author:          Darren Wenn
  *
  * Software License Agreement
  *
  * The software supplied herewith by Microchip Technology Incorporated
- * (the 揅ompany) for its PIC32/PIC24 Microcontroller is intended
- * and supplied to you, the Company抯 customer, for use solely and
+ * (the 鈥淐ompany鈥) for its PIC32/PIC24 Microcontroller is intended
+ * and supplied to you, the Company鈥檚 customer, for use solely and
  * exclusively on Microchip PIC32/PIC24 Microcontroller products.
  * The software is owned by the Company and/or its supplier, and is
  * protected under applicable copyright laws. All rights are reserved.
@@ -26,7 +26,7 @@
  * civil liability for the breach of the terms and conditions of this
  * license.
  *
- * THIS SOFTWARE IS PROVIDED IN AN 揂S IS CONDITION. NO WARRANTIES,
+ * THIS SOFTWARE IS PROVIDED IN AN 鈥淎S IS鈥 CONDITION. NO WARRANTIES,
  * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED
  * TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  * PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT,
@@ -42,20 +42,20 @@
 // declared static in case exception condition would prevent
 // auto variable being created
 static enum {
-	EXCEP_IRQ = 0,			// interrupt
-	EXCEP_AdEL = 4,			// address error exception (load or ifetch)
-	EXCEP_AdES,				// address error exception (store)
-	EXCEP_IBE,				// bus error (ifetch)
-	EXCEP_DBE,				// bus error (load/store)
-	EXCEP_Sys,				// syscall
-	EXCEP_Bp,				// breakpoint
-	EXCEP_RI,				// reserved instruction
-	EXCEP_CpU,				// coprocessor unusable
-	EXCEP_Overflow,			// arithmetic overflow
-	EXCEP_Trap,				// trap (possible divide by zero)
-	EXCEP_IS1 = 16,			// implementation specfic 1
-	EXCEP_CEU,				// CorExtend Unuseable
-	EXCEP_C2E				// coprocessor 2
+    EXCEP_IRQ = 0,          // interrupt
+    EXCEP_AdEL = 4,         // address error exception (load or ifetch)
+    EXCEP_AdES,             // address error exception (store)
+    EXCEP_IBE,              // bus error (ifetch)
+    EXCEP_DBE,              // bus error (load/store)
+    EXCEP_Sys,              // syscall
+    EXCEP_Bp,               // breakpoint
+    EXCEP_RI,               // reserved instruction
+    EXCEP_CpU,              // coprocessor unusable
+    EXCEP_Overflow,         // arithmetic overflow
+    EXCEP_Trap,             // trap (possible divide by zero)
+    EXCEP_IS1 = 16,         // implementation specfic 1
+    EXCEP_CEU,              // CorExtend Unuseable
+    EXCEP_C2E               // coprocessor 2
 } _excep_code;
 
 static unsigned int _epc_code;
@@ -65,34 +65,34 @@ static unsigned int _excep_addr;
 // this function overrides the normal _weak_ generic handler
 void _general_exception_handler(void)
 {
-	asm volatile("mfc0 %0,$13" : "=r" (_excep_code));
-	asm volatile("mfc0 %0,$14" : "=r" (_excep_addr));
+    asm volatile("mfc0 %0,$13" : "=r" (_excep_code));
+    asm volatile("mfc0 %0,$14" : "=r" (_excep_addr));
 
-	_excep_code = (_excep_code & 0x0000007C) >> 2;
+    _excep_code = (_excep_code & 0x0000007C) >> 2;
 
-	rt_kprintf("\r\n_excep_code : %08X\r\n",_excep_code);
-	rt_kprintf("_excep_addr : %08X\r\n",_excep_addr);
-	switch(_excep_code)
-	{
-	    case EXCEP_IRQ:rt_kprintf("interrupt\r\n");break;
-	    case EXCEP_AdEL:rt_kprintf("address error exception (load or ifetch)\r\n");break;
-	    case EXCEP_AdES:rt_kprintf("address error exception (store)\r\n");break;
-	    case EXCEP_IBE:rt_kprintf("bus error (ifetch)\r\n");break;
-	    case EXCEP_DBE:rt_kprintf("bus error (load/store)\r\n");break;
-	    case EXCEP_Sys:rt_kprintf("syscall\r\n");break;
-	    case EXCEP_Bp:rt_kprintf("breakpoint\r\n");break;
-	    case EXCEP_RI:rt_kprintf("reserved instruction\r\n");break;
-	    case EXCEP_CpU:rt_kprintf("coprocessor unusable\r\n");break;
-	    case EXCEP_Overflow:rt_kprintf("arithmetic overflow\r\n");break;
-	    case EXCEP_Trap:rt_kprintf("trap (possible divide by zero)\r\n");break;
-	    case EXCEP_IS1:rt_kprintf("implementation specfic 1\r\n");break;
-	    case EXCEP_CEU:rt_kprintf("CorExtend Unuseable\r\n");break;
-	    case EXCEP_C2E:rt_kprintf("coprocessor 2\r\n");break;
-	    default : rt_kprintf("unkown exception\r\n");break;
-	}
+    rt_kprintf("\r\n_excep_code : %08X\r\n",_excep_code);
+    rt_kprintf("_excep_addr : %08X\r\n",_excep_addr);
+    switch(_excep_code)
+    {
+        case EXCEP_IRQ:rt_kprintf("interrupt\r\n");break;
+        case EXCEP_AdEL:rt_kprintf("address error exception (load or ifetch)\r\n");break;
+        case EXCEP_AdES:rt_kprintf("address error exception (store)\r\n");break;
+        case EXCEP_IBE:rt_kprintf("bus error (ifetch)\r\n");break;
+        case EXCEP_DBE:rt_kprintf("bus error (load/store)\r\n");break;
+        case EXCEP_Sys:rt_kprintf("syscall\r\n");break;
+        case EXCEP_Bp:rt_kprintf("breakpoint\r\n");break;
+        case EXCEP_RI:rt_kprintf("reserved instruction\r\n");break;
+        case EXCEP_CpU:rt_kprintf("coprocessor unusable\r\n");break;
+        case EXCEP_Overflow:rt_kprintf("arithmetic overflow\r\n");break;
+        case EXCEP_Trap:rt_kprintf("trap (possible divide by zero)\r\n");break;
+        case EXCEP_IS1:rt_kprintf("implementation specfic 1\r\n");break;
+        case EXCEP_CEU:rt_kprintf("CorExtend Unuseable\r\n");break;
+        case EXCEP_C2E:rt_kprintf("coprocessor 2\r\n");break;
+        default : rt_kprintf("unkown exception\r\n");break;
+    }
 
-	while (1) {
-		// Examine _excep_code to identify the type of exception
-		// Examine _excep_addr to find the address that caused the exception
-	}
+    while (1) {
+        // Examine _excep_code to identify the type of exception
+        // Examine _excep_addr to find the address that caused the exception
+    }
 }
diff --git a/libcpu/nios/nios_ii/stack.c b/libcpu/nios/nios_ii/stack.c
index 125bf2c578..463ba0df96 100644
--- a/libcpu/nios/nios_ii/stack.c
+++ b/libcpu/nios/nios_ii/stack.c
@@ -1,7 +1,7 @@
 /*
  * File      : stack.c
  * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006-2011, RT-Thread Development Team
+ * COPYRIGHT (C) 2006-2021, RT-Thread Development Team
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -30,43 +30,43 @@
  * @return stack address
  */
 rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
-	rt_uint8_t *stack_addr, void *texit)
+    rt_uint8_t *stack_addr, void *texit)
 {
-	unsigned long *stk;
+    unsigned long *stk;
 
-	stk 	 = (unsigned long *)stack_addr;
-	*(stk)   = 0x01;                        /* status  */
-	*(--stk) = (unsigned long)texit;        /* ra  */
-	*(--stk) = 0xdeadbeef;                  /* fp  */
-	*(--stk) = 0xdeadbeef;                  /* r23 */
-	*(--stk) = 0xdeadbeef;                  /* r22 */
-	*(--stk) = 0xdeadbeef;                  /* r21 */
-	*(--stk) = 0xdeadbeef;                  /* r20 */
-	*(--stk) = 0xdeadbeef;                  /* r19 */
-	*(--stk) = 0xdeadbeef;                  /* r18 */
-	*(--stk) = 0xdeadbeef;                  /* r17 */
-	*(--stk) = 0xdeadbeef;                  /* r16 */
-//	*(--stk) = 0xdeadbeef;                  /* r15 */
-//	*(--stk) = 0xdeadbeef;                  /* r14 */
-//	*(--stk) = 0xdeadbeef;                  /* r13 */
-//	*(--stk) = 0xdeadbeef;                  /* r12 */
-//	*(--stk) = 0xdeadbeef;                  /* r11 */
-//	*(--stk) = 0xdeadbeef;                  /* r10 */
-//	*(--stk) = 0xdeadbeef;                  /* r9  */
-//	*(--stk) = 0xdeadbeef;                  /* r8  */
-	*(--stk) = 0xdeadbeef;                  /* r7  */
-	*(--stk) = 0xdeadbeef;                  /* r6  */
-	*(--stk) = 0xdeadbeef;                  /* r5  */
-	*(--stk) = (unsigned long)parameter;    /* r4 argument */
-	*(--stk) = 0xdeadbeef;                  /* r3  */
-	*(--stk) = 0xdeadbeef;                  /* r2  */
-	*(--stk) = (unsigned long)tentry;       /* pc  */
+    stk      = (unsigned long *)stack_addr;
+    *(stk)   = 0x01;                        /* status  */
+    *(--stk) = (unsigned long)texit;        /* ra  */
+    *(--stk) = 0xdeadbeef;                  /* fp  */
+    *(--stk) = 0xdeadbeef;                  /* r23 */
+    *(--stk) = 0xdeadbeef;                  /* r22 */
+    *(--stk) = 0xdeadbeef;                  /* r21 */
+    *(--stk) = 0xdeadbeef;                  /* r20 */
+    *(--stk) = 0xdeadbeef;                  /* r19 */
+    *(--stk) = 0xdeadbeef;                  /* r18 */
+    *(--stk) = 0xdeadbeef;                  /* r17 */
+    *(--stk) = 0xdeadbeef;                  /* r16 */
+//  *(--stk) = 0xdeadbeef;                  /* r15 */
+//  *(--stk) = 0xdeadbeef;                  /* r14 */
+//  *(--stk) = 0xdeadbeef;                  /* r13 */
+//  *(--stk) = 0xdeadbeef;                  /* r12 */
+//  *(--stk) = 0xdeadbeef;                  /* r11 */
+//  *(--stk) = 0xdeadbeef;                  /* r10 */
+//  *(--stk) = 0xdeadbeef;                  /* r9  */
+//  *(--stk) = 0xdeadbeef;                  /* r8  */
+    *(--stk) = 0xdeadbeef;                  /* r7  */
+    *(--stk) = 0xdeadbeef;                  /* r6  */
+    *(--stk) = 0xdeadbeef;                  /* r5  */
+    *(--stk) = (unsigned long)parameter;    /* r4 argument */
+    *(--stk) = 0xdeadbeef;                  /* r3  */
+    *(--stk) = 0xdeadbeef;                  /* r2  */
+    *(--stk) = (unsigned long)tentry;       /* pc  */
 
-//	*(stk)   = (unsigned long)tentry;		/* thread entry (ra) */
-//	*(--stk) = (unsigned long)parameter;	/* thread argument, r4 */
+//  *(stk)   = (unsigned long)tentry;       /* thread entry (ra) */
+//  *(--stk) = (unsigned long)parameter;    /* thread argument, r4 */
 
-	/* return task's current stack address */
-	return (rt_uint8_t *)stk;
+    /* return task's current stack address */
+    return (rt_uint8_t *)stk;
 }
 
 /*@}*/
diff --git a/libcpu/ppc/common/ptrace.h b/libcpu/ppc/common/ptrace.h
index 72ef31bfbc..8d06ed00ca 100644
--- a/libcpu/ppc/common/ptrace.h
+++ b/libcpu/ppc/common/ptrace.h
@@ -24,24 +24,24 @@ struct pt_regs {
     PPC_REG gpr[32];
     PPC_REG nip;
     PPC_REG msr;
-    PPC_REG orig_gpr3;	/* Used for restarting system calls */
+    PPC_REG orig_gpr3;  /* Used for restarting system calls */
     PPC_REG ctr;
     PPC_REG link;
     PPC_REG xer;
     PPC_REG ccr;
-    PPC_REG mq;		/* 601 only (not used at present) */
+    PPC_REG mq;     /* 601 only (not used at present) */
                     /* Used on APUS to hold IPL value. */
-    PPC_REG trap;		/* Reason for being here */
-    PPC_REG dar;		/* Fault registers */
+    PPC_REG trap;       /* Reason for being here */
+    PPC_REG dar;        /* Fault registers */
     PPC_REG dsisr;
-    PPC_REG result;		/* Result of a system call */
+    PPC_REG result;     /* Result of a system call */
 }__attribute__((packed)) CELL_STACK_FRAME_t;
 #endif
 
-#define STACK_FRAME_OVERHEAD	16	/* size of minimum stack frame */
+#define STACK_FRAME_OVERHEAD    16  /* size of minimum stack frame */
 
 /* Size of stack frame allocated when calling signal handler. */
-#define __SIGNAL_FRAMESIZE	64
+#define __SIGNAL_FRAMESIZE  64
 
 #define instruction_pointer(regs) ((regs)->nip)
 #define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
@@ -51,49 +51,49 @@ struct pt_regs {
  * These can't be changed without breaking binary compatibility
  * with MkLinux, etc.
  */
-#define PT_R0	0
-#define PT_R1	1
-#define PT_R2	2
-#define PT_R3	3
-#define PT_R4	4
-#define PT_R5	5
-#define PT_R6	6
-#define PT_R7	7
-#define PT_R8	8
-#define PT_R9	9
-#define PT_R10	10
-#define PT_R11	11
-#define PT_R12	12
-#define PT_R13	13
-#define PT_R14	14
-#define PT_R15	15
-#define PT_R16	16
-#define PT_R17	17
-#define PT_R18	18
-#define PT_R19	19
-#define PT_R20	20
-#define PT_R21	21
-#define PT_R22	22
-#define PT_R23	23
-#define PT_R24	24
-#define PT_R25	25
-#define PT_R26	26
-#define PT_R27	27
-#define PT_R28	28
-#define PT_R29	29
-#define PT_R30	30
-#define PT_R31	31
+#define PT_R0   0
+#define PT_R1   1
+#define PT_R2   2
+#define PT_R3   3
+#define PT_R4   4
+#define PT_R5   5
+#define PT_R6   6
+#define PT_R7   7
+#define PT_R8   8
+#define PT_R9   9
+#define PT_R10  10
+#define PT_R11  11
+#define PT_R12  12
+#define PT_R13  13
+#define PT_R14  14
+#define PT_R15  15
+#define PT_R16  16
+#define PT_R17  17
+#define PT_R18  18
+#define PT_R19  19
+#define PT_R20  20
+#define PT_R21  21
+#define PT_R22  22
+#define PT_R23  23
+#define PT_R24  24
+#define PT_R25  25
+#define PT_R26  26
+#define PT_R27  27
+#define PT_R28  28
+#define PT_R29  29
+#define PT_R30  30
+#define PT_R31  31
 
-#define PT_NIP	32
-#define PT_MSR	33
+#define PT_NIP  32
+#define PT_MSR  33
 #define PT_ORIG_R3 34
-#define PT_CTR	35
-#define PT_LNK	36
-#define PT_XER	37
-#define PT_CCR	38
-#define PT_MQ	39
+#define PT_CTR  35
+#define PT_LNK  36
+#define PT_XER  37
+#define PT_CCR  38
+#define PT_MQ   39
 
-#define PT_FPR0	48	/* each FP reg occupies 2 slots in this space */
+#define PT_FPR0 48  /* each FP reg occupies 2 slots in this space */
 #define PT_FPR31 (PT_FPR0 + 2*31)
 #define PT_FPSCR (PT_FPR0 + 2*32 + 1)
 
diff --git a/libcpu/ppc/common/stack.c b/libcpu/ppc/common/stack.c
index 570e9ba046..de9d7d2016 100644
--- a/libcpu/ppc/common/stack.c
+++ b/libcpu/ppc/common/stack.c
@@ -1,7 +1,7 @@
 /*
  * File      : stack.c
  * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006-2011, RT-Thread Development Team
+ * COPYRIGHT (C) 2006-2021, RT-Thread Development Team
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -9,7 +9,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2011-02-14     Fred         first implementation for 
+ * 2011-02-14     Fred         first implementation for
  */
 
 #include 
diff --git a/libcpu/ppc/ppc405/context.h b/libcpu/ppc/ppc405/context.h
index 8b4d55d698..cb12df845c 100644
--- a/libcpu/ppc/ppc405/context.h
+++ b/libcpu/ppc/ppc405/context.h
@@ -1,9 +1,9 @@
 #ifndef __CONTEXT_H__
 #define __CONTEXT_H__
 
-#define MSR_ME		(1<<12)		/* Machine Check Enable */
+#define MSR_ME      (1<<12)     /* Machine Check Enable */
 #define MSR_EE      (1<<15)     /* External Interrupt Enable */
-#define MSR_CE		(1<<17)		/* Critical Interrupt Enable */
+#define MSR_CE      (1<<17)     /* Critical Interrupt Enable */
 
 #define GPR0    0
 #define GPR2    4
diff --git a/libcpu/ppc/ppc405/include/asm/ppc405.h b/libcpu/ppc/ppc405/include/asm/ppc405.h
index c2562047cb..5e96fa782a 100644
--- a/libcpu/ppc/ppc405/include/asm/ppc405.h
+++ b/libcpu/ppc/ppc405/include/asm/ppc405.h
@@ -1,30 +1,30 @@
 /*----------------------------------------------------------------------------+
 |
-|	This source code has been made available to you by IBM on an AS-IS
-|	basis.	Anyone receiving this source is licensed under IBM
-|	copyrights to use it in any way he or she deems fit, including
-|	copying it, modifying it, compiling it, and redistributing it either
-|	with or without modifications.	No license under IBM patents or
-|	patent applications is to be implied by the copyright license.
+|   This source code has been made available to you by IBM on an AS-IS
+|   basis.  Anyone receiving this source is licensed under IBM
+|   copyrights to use it in any way he or she deems fit, including
+|   copying it, modifying it, compiling it, and redistributing it either
+|   with or without modifications.  No license under IBM patents or
+|   patent applications is to be implied by the copyright license.
 |
-|	Any user of this software should understand that IBM cannot provide
-|	technical support for this software and will not be responsible for
-|	any consequences resulting from the use of this software.
+|   Any user of this software should understand that IBM cannot provide
+|   technical support for this software and will not be responsible for
+|   any consequences resulting from the use of this software.
 |
-|	Any person who transfers this source code or any derivative work
-|	must include the IBM copyright notice, this paragraph, and the
-|	preceding two paragraphs in the transferred software.
+|   Any person who transfers this source code or any derivative work
+|   must include the IBM copyright notice, this paragraph, and the
+|   preceding two paragraphs in the transferred software.
 |
-|	COPYRIGHT   I B M   CORPORATION 1999
-|	LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M
+|   COPYRIGHT   I B M   CORPORATION 1999
+|   LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M
 +----------------------------------------------------------------------------*/
 
-#ifndef	__PPC405_H__
+#ifndef __PPC405_H__
 #define __PPC405_H__
 
 /* Define bits and masks for real-mode storage attribute control registers */
-#define PPC_128MB_SACR_BIT(addr)	((addr) >> 27)
-#define PPC_128MB_SACR_VALUE(addr)	PPC_REG_VAL(PPC_128MB_SACR_BIT(addr),1)
+#define PPC_128MB_SACR_BIT(addr)    ((addr) >> 27)
+#define PPC_128MB_SACR_VALUE(addr)  PPC_REG_VAL(PPC_128MB_SACR_BIT(addr),1)
 
 /******************************************************************************
  * Special for PPC405GP
@@ -34,29 +34,29 @@
  * DMA
  ******************************************************************************/
 #define DMA_DCR_BASE 0x100
-#define dmacr0	(DMA_DCR_BASE+0x00)  /* DMA channel control register 0	     */
-#define dmact0	(DMA_DCR_BASE+0x01)  /* DMA count register 0		     */
-#define dmada0	(DMA_DCR_BASE+0x02)  /* DMA destination address register 0   */
-#define dmasa0	(DMA_DCR_BASE+0x03)  /* DMA source address register 0	     */
-#define dmasb0	(DMA_DCR_BASE+0x04)  /* DMA scatter/gather descriptor addr 0 */
-#define dmacr1	(DMA_DCR_BASE+0x08)  /* DMA channel control register 1	     */
-#define dmact1	(DMA_DCR_BASE+0x09)  /* DMA count register 1		     */
-#define dmada1	(DMA_DCR_BASE+0x0a)  /* DMA destination address register 1   */
-#define dmasa1	(DMA_DCR_BASE+0x0b)  /* DMA source address register 1	     */
-#define dmasb1	(DMA_DCR_BASE+0x0c)  /* DMA scatter/gather descriptor addr 1 */
-#define dmacr2	(DMA_DCR_BASE+0x10)  /* DMA channel control register 2	     */
-#define dmact2	(DMA_DCR_BASE+0x11)  /* DMA count register 2		     */
-#define dmada2	(DMA_DCR_BASE+0x12)  /* DMA destination address register 2   */
-#define dmasa2	(DMA_DCR_BASE+0x13)  /* DMA source address register 2	     */
-#define dmasb2	(DMA_DCR_BASE+0x14)  /* DMA scatter/gather descriptor addr 2 */
-#define dmacr3	(DMA_DCR_BASE+0x18)  /* DMA channel control register 3	     */
-#define dmact3	(DMA_DCR_BASE+0x19)  /* DMA count register 3		     */
-#define dmada3	(DMA_DCR_BASE+0x1a)  /* DMA destination address register 3   */
-#define dmasa3	(DMA_DCR_BASE+0x1b)  /* DMA source address register 3	     */
-#define dmasb3	(DMA_DCR_BASE+0x1c)  /* DMA scatter/gather descriptor addr 3 */
-#define dmasr	(DMA_DCR_BASE+0x20)  /* DMA status register		     */
-#define dmasgc	(DMA_DCR_BASE+0x23)  /* DMA scatter/gather command register  */
-#define dmaadr	(DMA_DCR_BASE+0x24)  /* DMA address decode register	     */
+#define dmacr0  (DMA_DCR_BASE+0x00)  /* DMA channel control register 0       */
+#define dmact0  (DMA_DCR_BASE+0x01)  /* DMA count register 0             */
+#define dmada0  (DMA_DCR_BASE+0x02)  /* DMA destination address register 0   */
+#define dmasa0  (DMA_DCR_BASE+0x03)  /* DMA source address register 0        */
+#define dmasb0  (DMA_DCR_BASE+0x04)  /* DMA scatter/gather descriptor addr 0 */
+#define dmacr1  (DMA_DCR_BASE+0x08)  /* DMA channel control register 1       */
+#define dmact1  (DMA_DCR_BASE+0x09)  /* DMA count register 1             */
+#define dmada1  (DMA_DCR_BASE+0x0a)  /* DMA destination address register 1   */
+#define dmasa1  (DMA_DCR_BASE+0x0b)  /* DMA source address register 1        */
+#define dmasb1  (DMA_DCR_BASE+0x0c)  /* DMA scatter/gather descriptor addr 1 */
+#define dmacr2  (DMA_DCR_BASE+0x10)  /* DMA channel control register 2       */
+#define dmact2  (DMA_DCR_BASE+0x11)  /* DMA count register 2             */
+#define dmada2  (DMA_DCR_BASE+0x12)  /* DMA destination address register 2   */
+#define dmasa2  (DMA_DCR_BASE+0x13)  /* DMA source address register 2        */
+#define dmasb2  (DMA_DCR_BASE+0x14)  /* DMA scatter/gather descriptor addr 2 */
+#define dmacr3  (DMA_DCR_BASE+0x18)  /* DMA channel control register 3       */
+#define dmact3  (DMA_DCR_BASE+0x19)  /* DMA count register 3             */
+#define dmada3  (DMA_DCR_BASE+0x1a)  /* DMA destination address register 3   */
+#define dmasa3  (DMA_DCR_BASE+0x1b)  /* DMA source address register 3        */
+#define dmasb3  (DMA_DCR_BASE+0x1c)  /* DMA scatter/gather descriptor addr 3 */
+#define dmasr   (DMA_DCR_BASE+0x20)  /* DMA status register          */
+#define dmasgc  (DMA_DCR_BASE+0x23)  /* DMA scatter/gather command register  */
+#define dmaadr  (DMA_DCR_BASE+0x24)  /* DMA address decode register      */
 
 #ifndef CONFIG_405EP
 /******************************************************************************
@@ -66,22 +66,22 @@
 #define kiar  (DECOMP_DCR_BASE+0x0)  /* Decompression controller addr reg    */
 #define kidr  (DECOMP_DCR_BASE+0x1)  /* Decompression controller data reg    */
   /* values for kiar register - indirect addressing of these regs */
-  #define kitor0      0x00    /* index table origin register 0	      */
-  #define kitor1      0x01    /* index table origin register 1	      */
-  #define kitor2      0x02    /* index table origin register 2	      */
-  #define kitor3      0x03    /* index table origin register 3	      */
+  #define kitor0      0x00    /* index table origin register 0        */
+  #define kitor1      0x01    /* index table origin register 1        */
+  #define kitor2      0x02    /* index table origin register 2        */
+  #define kitor3      0x03    /* index table origin register 3        */
   #define kaddr0      0x04    /* address decode definition regsiter 0 */
   #define kaddr1      0x05    /* address decode definition regsiter 1 */
   #define kconf       0x40    /* decompression core config register   */
-  #define kid	      0x41    /* decompression core ID	   register   */
-  #define kver	      0x42    /* decompression core version # reg     */
-  #define kpear       0x50    /* bus error addr reg (PLB addr)	      */
+  #define kid         0x41    /* decompression core ID     register   */
+  #define kver        0x42    /* decompression core version # reg     */
+  #define kpear       0x50    /* bus error addr reg (PLB addr)        */
   #define kbear       0x51    /* bus error addr reg (DCP to EBIU addr)*/
   #define kesr0       0x52    /* bus error status reg 0  (R/clear)    */
-  #define kesr0s      0x53    /* bus error status reg 0  (set)	      */
+  #define kesr0s      0x53    /* bus error status reg 0  (set)        */
   /* There are 0x400 of the following registers, from krom0 to krom3ff*/
-  /* Only the first one is given here.				      */
-  #define krom0      0x400    /* SRAM/ROM read/write		      */
+  /* Only the first one is given here.                    */
+  #define krom0      0x400    /* SRAM/ROM read/write              */
 #endif
 
 /******************************************************************************
@@ -92,23 +92,23 @@
 #else
 #define POWERMAN_DCR_BASE 0xb8
 #endif
-#define cpmsr (POWERMAN_DCR_BASE+0x0) /* Power management status	     */
-#define cpmer (POWERMAN_DCR_BASE+0x1) /* Power management enable	     */
-#define cpmfr (POWERMAN_DCR_BASE+0x2) /* Power management force		     */
+#define cpmsr (POWERMAN_DCR_BASE+0x0) /* Power management status         */
+#define cpmer (POWERMAN_DCR_BASE+0x1) /* Power management enable         */
+#define cpmfr (POWERMAN_DCR_BASE+0x2) /* Power management force          */
 
 /******************************************************************************
  * Extrnal Bus Controller
  ******************************************************************************/
   /* values for ebccfga register - indirect addressing of these regs */
-  #define pb0cr       0x00    /* periph bank 0 config reg	     */
-  #define pb1cr       0x01    /* periph bank 1 config reg	     */
-  #define pb2cr       0x02    /* periph bank 2 config reg	     */
-  #define pb3cr       0x03    /* periph bank 3 config reg	     */
-  #define pb4cr       0x04    /* periph bank 4 config reg	     */
+  #define pb0cr       0x00    /* periph bank 0 config reg        */
+  #define pb1cr       0x01    /* periph bank 1 config reg        */
+  #define pb2cr       0x02    /* periph bank 2 config reg        */
+  #define pb3cr       0x03    /* periph bank 3 config reg        */
+  #define pb4cr       0x04    /* periph bank 4 config reg        */
 #ifndef CONFIG_405EP
-  #define pb5cr       0x05    /* periph bank 5 config reg	     */
-  #define pb6cr       0x06    /* periph bank 6 config reg	     */
-  #define pb7cr       0x07    /* periph bank 7 config reg	     */
+  #define pb5cr       0x05    /* periph bank 5 config reg        */
+  #define pb6cr       0x06    /* periph bank 6 config reg        */
+  #define pb7cr       0x07    /* periph bank 7 config reg        */
 #endif
   #define pb0ap       0x10    /* periph bank 0 access parameters     */
   #define pb1ap       0x11    /* periph bank 1 access parameters     */
@@ -120,221 +120,221 @@
   #define pb6ap       0x16    /* periph bank 6 access parameters     */
   #define pb7ap       0x17    /* periph bank 7 access parameters     */
 #endif
-  #define pbear       0x20    /* periph bus error addr reg	     */
-  #define pbesr0      0x21    /* periph bus error status reg 0	     */
-  #define pbesr1      0x22    /* periph bus error status reg 1	     */
-  #define epcr	      0x23    /* external periph control reg	     */
-#define EBC0_CFG	0x23	/* external bus configuration reg	*/
+  #define pbear       0x20    /* periph bus error addr reg       */
+  #define pbesr0      0x21    /* periph bus error status reg 0       */
+  #define pbesr1      0x22    /* periph bus error status reg 1       */
+  #define epcr        0x23    /* external periph control reg         */
+#define EBC0_CFG    0x23    /* external bus configuration reg   */
 
 #ifdef CONFIG_405EP
 /******************************************************************************
  * Control
  ******************************************************************************/
 #define CNTRL_DCR_BASE 0x0f0
-#define cpc0_pllmr0   (CNTRL_DCR_BASE+0x0)  /* PLL mode  register 0		   */
-#define cpc0_boot     (CNTRL_DCR_BASE+0x1)  /* Clock status register		   */
-#define cpc0_epctl    (CNTRL_DCR_BASE+0x3)  /* EMAC to PHY control register	   */
-#define cpc0_pllmr1   (CNTRL_DCR_BASE+0x4)  /* PLL mode  register 1		   */
-#define cpc0_ucr      (CNTRL_DCR_BASE+0x5)  /* UART control register		   */
-#define cpc0_pci      (CNTRL_DCR_BASE+0x9)  /* PCI control register		   */
+#define cpc0_pllmr0   (CNTRL_DCR_BASE+0x0)  /* PLL mode  register 0        */
+#define cpc0_boot     (CNTRL_DCR_BASE+0x1)  /* Clock status register           */
+#define cpc0_epctl    (CNTRL_DCR_BASE+0x3)  /* EMAC to PHY control register    */
+#define cpc0_pllmr1   (CNTRL_DCR_BASE+0x4)  /* PLL mode  register 1        */
+#define cpc0_ucr      (CNTRL_DCR_BASE+0x5)  /* UART control register           */
+#define cpc0_pci      (CNTRL_DCR_BASE+0x9)  /* PCI control register        */
 
-#define CPC0_PLLMR0  (CNTRL_DCR_BASE+0x0)  /* PLL mode 0 register	   */
+#define CPC0_PLLMR0  (CNTRL_DCR_BASE+0x0)  /* PLL mode 0 register      */
 #define CPC0_BOOT    (CNTRL_DCR_BASE+0x1)  /* Chip Clock Status register   */
-#define CPC0_CR1     (CNTRL_DCR_BASE+0x2)  /* Chip Control 1 register	   */
+#define CPC0_CR1     (CNTRL_DCR_BASE+0x2)  /* Chip Control 1 register      */
 #define CPC0_EPRCSR  (CNTRL_DCR_BASE+0x3)  /* EMAC PHY Rcv Clk Src register*/
-#define CPC0_PLLMR1  (CNTRL_DCR_BASE+0x4)  /* PLL mode 1 register	   */
-#define CPC0_UCR     (CNTRL_DCR_BASE+0x5)  /* UART Control register	   */
-#define CPC0_SRR     (CNTRL_DCR_BASE+0x6)  /* Soft Reset register	   */
-#define CPC0_JTAGID  (CNTRL_DCR_BASE+0x7)  /* JTAG ID register		   */
-#define CPC0_SPARE   (CNTRL_DCR_BASE+0x8)  /* Spare DCR			   */
-#define CPC0_PCI     (CNTRL_DCR_BASE+0x9)  /* PCI Control register	   */
+#define CPC0_PLLMR1  (CNTRL_DCR_BASE+0x4)  /* PLL mode 1 register      */
+#define CPC0_UCR     (CNTRL_DCR_BASE+0x5)  /* UART Control register    */
+#define CPC0_SRR     (CNTRL_DCR_BASE+0x6)  /* Soft Reset register      */
+#define CPC0_JTAGID  (CNTRL_DCR_BASE+0x7)  /* JTAG ID register         */
+#define CPC0_SPARE   (CNTRL_DCR_BASE+0x8)  /* Spare DCR            */
+#define CPC0_PCI     (CNTRL_DCR_BASE+0x9)  /* PCI Control register     */
 
 /* Bit definitions */
-#define PLLMR0_CPU_DIV_MASK	 0x00300000	/* CPU clock divider */
-#define PLLMR0_CPU_DIV_BYPASS	 0x00000000
-#define PLLMR0_CPU_DIV_2	 0x00100000
-#define PLLMR0_CPU_DIV_3	 0x00200000
-#define PLLMR0_CPU_DIV_4	 0x00300000
+#define PLLMR0_CPU_DIV_MASK  0x00300000 /* CPU clock divider */
+#define PLLMR0_CPU_DIV_BYPASS    0x00000000
+#define PLLMR0_CPU_DIV_2     0x00100000
+#define PLLMR0_CPU_DIV_3     0x00200000
+#define PLLMR0_CPU_DIV_4     0x00300000
 
-#define PLLMR0_CPU_TO_PLB_MASK	 0x00030000	/* CPU:PLB Frequency Divisor */
-#define PLLMR0_CPU_PLB_DIV_1	 0x00000000
-#define PLLMR0_CPU_PLB_DIV_2	 0x00010000
-#define PLLMR0_CPU_PLB_DIV_3	 0x00020000
-#define PLLMR0_CPU_PLB_DIV_4	 0x00030000
+#define PLLMR0_CPU_TO_PLB_MASK   0x00030000 /* CPU:PLB Frequency Divisor */
+#define PLLMR0_CPU_PLB_DIV_1     0x00000000
+#define PLLMR0_CPU_PLB_DIV_2     0x00010000
+#define PLLMR0_CPU_PLB_DIV_3     0x00020000
+#define PLLMR0_CPU_PLB_DIV_4     0x00030000
 
-#define PLLMR0_OPB_TO_PLB_MASK	 0x00003000	/* OPB:PLB Frequency Divisor */
-#define PLLMR0_OPB_PLB_DIV_1	 0x00000000
-#define PLLMR0_OPB_PLB_DIV_2	 0x00001000
-#define PLLMR0_OPB_PLB_DIV_3	 0x00002000
-#define PLLMR0_OPB_PLB_DIV_4	 0x00003000
+#define PLLMR0_OPB_TO_PLB_MASK   0x00003000 /* OPB:PLB Frequency Divisor */
+#define PLLMR0_OPB_PLB_DIV_1     0x00000000
+#define PLLMR0_OPB_PLB_DIV_2     0x00001000
+#define PLLMR0_OPB_PLB_DIV_3     0x00002000
+#define PLLMR0_OPB_PLB_DIV_4     0x00003000
 
-#define PLLMR0_EXB_TO_PLB_MASK	 0x00000300	/* External Bus:PLB Divisor  */
-#define PLLMR0_EXB_PLB_DIV_2	 0x00000000
-#define PLLMR0_EXB_PLB_DIV_3	 0x00000100
-#define PLLMR0_EXB_PLB_DIV_4	 0x00000200
-#define PLLMR0_EXB_PLB_DIV_5	 0x00000300
+#define PLLMR0_EXB_TO_PLB_MASK   0x00000300 /* External Bus:PLB Divisor  */
+#define PLLMR0_EXB_PLB_DIV_2     0x00000000
+#define PLLMR0_EXB_PLB_DIV_3     0x00000100
+#define PLLMR0_EXB_PLB_DIV_4     0x00000200
+#define PLLMR0_EXB_PLB_DIV_5     0x00000300
 
-#define PLLMR0_MAL_TO_PLB_MASK	 0x00000030	/* MAL:PLB Divisor  */
-#define PLLMR0_MAL_PLB_DIV_1	 0x00000000
-#define PLLMR0_MAL_PLB_DIV_2	 0x00000010
-#define PLLMR0_MAL_PLB_DIV_3	 0x00000020
-#define PLLMR0_MAL_PLB_DIV_4	 0x00000030
+#define PLLMR0_MAL_TO_PLB_MASK   0x00000030 /* MAL:PLB Divisor  */
+#define PLLMR0_MAL_PLB_DIV_1     0x00000000
+#define PLLMR0_MAL_PLB_DIV_2     0x00000010
+#define PLLMR0_MAL_PLB_DIV_3     0x00000020
+#define PLLMR0_MAL_PLB_DIV_4     0x00000030
 
-#define PLLMR0_PCI_TO_PLB_MASK	 0x00000003	/* PCI:PLB Frequency Divisor */
-#define PLLMR0_PCI_PLB_DIV_1	 0x00000000
-#define PLLMR0_PCI_PLB_DIV_2	 0x00000001
-#define PLLMR0_PCI_PLB_DIV_3	 0x00000002
-#define PLLMR0_PCI_PLB_DIV_4	 0x00000003
+#define PLLMR0_PCI_TO_PLB_MASK   0x00000003 /* PCI:PLB Frequency Divisor */
+#define PLLMR0_PCI_PLB_DIV_1     0x00000000
+#define PLLMR0_PCI_PLB_DIV_2     0x00000001
+#define PLLMR0_PCI_PLB_DIV_3     0x00000002
+#define PLLMR0_PCI_PLB_DIV_4     0x00000003
 
-#define PLLMR1_SSCS_MASK	 0x80000000	/* Select system clock source */
-#define PLLMR1_PLLR_MASK	 0x40000000	/* PLL reset */
-#define PLLMR1_FBMUL_MASK	 0x00F00000	/* PLL feedback multiplier value */
-#define PLLMR1_FBMUL_DIV_16	 0x00000000
-#define PLLMR1_FBMUL_DIV_1	 0x00100000
-#define PLLMR1_FBMUL_DIV_2	 0x00200000
-#define PLLMR1_FBMUL_DIV_3	 0x00300000
-#define PLLMR1_FBMUL_DIV_4	 0x00400000
-#define PLLMR1_FBMUL_DIV_5	 0x00500000
-#define PLLMR1_FBMUL_DIV_6	 0x00600000
-#define PLLMR1_FBMUL_DIV_7	 0x00700000
-#define PLLMR1_FBMUL_DIV_8	 0x00800000
-#define PLLMR1_FBMUL_DIV_9	 0x00900000
-#define PLLMR1_FBMUL_DIV_10	 0x00A00000
-#define PLLMR1_FBMUL_DIV_11	 0x00B00000
-#define PLLMR1_FBMUL_DIV_12	 0x00C00000
-#define PLLMR1_FBMUL_DIV_13	 0x00D00000
-#define PLLMR1_FBMUL_DIV_14	 0x00E00000
-#define PLLMR1_FBMUL_DIV_15	 0x00F00000
+#define PLLMR1_SSCS_MASK     0x80000000 /* Select system clock source */
+#define PLLMR1_PLLR_MASK     0x40000000 /* PLL reset */
+#define PLLMR1_FBMUL_MASK    0x00F00000 /* PLL feedback multiplier value */
+#define PLLMR1_FBMUL_DIV_16  0x00000000
+#define PLLMR1_FBMUL_DIV_1   0x00100000
+#define PLLMR1_FBMUL_DIV_2   0x00200000
+#define PLLMR1_FBMUL_DIV_3   0x00300000
+#define PLLMR1_FBMUL_DIV_4   0x00400000
+#define PLLMR1_FBMUL_DIV_5   0x00500000
+#define PLLMR1_FBMUL_DIV_6   0x00600000
+#define PLLMR1_FBMUL_DIV_7   0x00700000
+#define PLLMR1_FBMUL_DIV_8   0x00800000
+#define PLLMR1_FBMUL_DIV_9   0x00900000
+#define PLLMR1_FBMUL_DIV_10  0x00A00000
+#define PLLMR1_FBMUL_DIV_11  0x00B00000
+#define PLLMR1_FBMUL_DIV_12  0x00C00000
+#define PLLMR1_FBMUL_DIV_13  0x00D00000
+#define PLLMR1_FBMUL_DIV_14  0x00E00000
+#define PLLMR1_FBMUL_DIV_15  0x00F00000
 
-#define PLLMR1_FWDVA_MASK	 0x00070000	/* PLL forward divider A value */
-#define PLLMR1_FWDVA_DIV_8	 0x00000000
-#define PLLMR1_FWDVA_DIV_7	 0x00010000
-#define PLLMR1_FWDVA_DIV_6	 0x00020000
-#define PLLMR1_FWDVA_DIV_5	 0x00030000
-#define PLLMR1_FWDVA_DIV_4	 0x00040000
-#define PLLMR1_FWDVA_DIV_3	 0x00050000
-#define PLLMR1_FWDVA_DIV_2	 0x00060000
-#define PLLMR1_FWDVA_DIV_1	 0x00070000
-#define PLLMR1_FWDVB_MASK	 0x00007000	/* PLL forward divider B value */
-#define PLLMR1_TUNING_MASK	 0x000003FF	/* PLL tune bits */
+#define PLLMR1_FWDVA_MASK    0x00070000 /* PLL forward divider A value */
+#define PLLMR1_FWDVA_DIV_8   0x00000000
+#define PLLMR1_FWDVA_DIV_7   0x00010000
+#define PLLMR1_FWDVA_DIV_6   0x00020000
+#define PLLMR1_FWDVA_DIV_5   0x00030000
+#define PLLMR1_FWDVA_DIV_4   0x00040000
+#define PLLMR1_FWDVA_DIV_3   0x00050000
+#define PLLMR1_FWDVA_DIV_2   0x00060000
+#define PLLMR1_FWDVA_DIV_1   0x00070000
+#define PLLMR1_FWDVB_MASK    0x00007000 /* PLL forward divider B value */
+#define PLLMR1_TUNING_MASK   0x000003FF /* PLL tune bits */
 
 /* Defines for CPC0_EPRCSR register */
-#define CPC0_EPRCSR_E0NFE	   0x80000000
-#define CPC0_EPRCSR_E1NFE	   0x40000000
-#define CPC0_EPRCSR_E1RPP	   0x00000080
-#define CPC0_EPRCSR_E0RPP	   0x00000040
-#define CPC0_EPRCSR_E1ERP	   0x00000020
-#define CPC0_EPRCSR_E0ERP	   0x00000010
-#define CPC0_EPRCSR_E1PCI	   0x00000002
-#define CPC0_EPRCSR_E0PCI	   0x00000001
+#define CPC0_EPRCSR_E0NFE      0x80000000
+#define CPC0_EPRCSR_E1NFE      0x40000000
+#define CPC0_EPRCSR_E1RPP      0x00000080
+#define CPC0_EPRCSR_E0RPP      0x00000040
+#define CPC0_EPRCSR_E1ERP      0x00000020
+#define CPC0_EPRCSR_E0ERP      0x00000010
+#define CPC0_EPRCSR_E1PCI      0x00000002
+#define CPC0_EPRCSR_E0PCI      0x00000001
 
 /* Defines for CPC0_PCI Register */
-#define CPC0_PCI_SPE			   0x00000010 /* PCIINT/WE select	*/
-#define CPC0_PCI_HOST_CFG_EN		   0x00000008 /* PCI host config Enable */
-#define CPC0_PCI_ARBIT_EN		   0x00000001 /* PCI Internal Arb Enabled*/
+#define CPC0_PCI_SPE               0x00000010 /* PCIINT/WE select   */
+#define CPC0_PCI_HOST_CFG_EN           0x00000008 /* PCI host config Enable */
+#define CPC0_PCI_ARBIT_EN          0x00000001 /* PCI Internal Arb Enabled*/
 
 /* Defines for CPC0_BOOR Register */
-#define CPC0_BOOT_SEP			   0x00000002 /* serial EEPROM present	*/
+#define CPC0_BOOT_SEP              0x00000002 /* serial EEPROM present  */
 
 /* Defines for CPC0_PLLMR1 Register fields */
-#define PLL_ACTIVE		   0x80000000
-#define CPC0_PLLMR1_SSCS	   0x80000000
-#define PLL_RESET		   0x40000000
-#define CPC0_PLLMR1_PLLR	   0x40000000
+#define PLL_ACTIVE         0x80000000
+#define CPC0_PLLMR1_SSCS       0x80000000
+#define PLL_RESET          0x40000000
+#define CPC0_PLLMR1_PLLR       0x40000000
     /* Feedback multiplier */
-#define PLL_FBKDIV		   0x00F00000
-#define CPC0_PLLMR1_FBDV	   0x00F00000
-#define PLL_FBKDIV_16		   0x00000000
-#define PLL_FBKDIV_1		   0x00100000
-#define PLL_FBKDIV_2		   0x00200000
-#define PLL_FBKDIV_3		   0x00300000
-#define PLL_FBKDIV_4		   0x00400000
-#define PLL_FBKDIV_5		   0x00500000
-#define PLL_FBKDIV_6		   0x00600000
-#define PLL_FBKDIV_7		   0x00700000
-#define PLL_FBKDIV_8		   0x00800000
-#define PLL_FBKDIV_9		   0x00900000
-#define PLL_FBKDIV_10		   0x00A00000
-#define PLL_FBKDIV_11		   0x00B00000
-#define PLL_FBKDIV_12		   0x00C00000
-#define PLL_FBKDIV_13		   0x00D00000
-#define PLL_FBKDIV_14		   0x00E00000
-#define PLL_FBKDIV_15		   0x00F00000
+#define PLL_FBKDIV         0x00F00000
+#define CPC0_PLLMR1_FBDV       0x00F00000
+#define PLL_FBKDIV_16          0x00000000
+#define PLL_FBKDIV_1           0x00100000
+#define PLL_FBKDIV_2           0x00200000
+#define PLL_FBKDIV_3           0x00300000
+#define PLL_FBKDIV_4           0x00400000
+#define PLL_FBKDIV_5           0x00500000
+#define PLL_FBKDIV_6           0x00600000
+#define PLL_FBKDIV_7           0x00700000
+#define PLL_FBKDIV_8           0x00800000
+#define PLL_FBKDIV_9           0x00900000
+#define PLL_FBKDIV_10          0x00A00000
+#define PLL_FBKDIV_11          0x00B00000
+#define PLL_FBKDIV_12          0x00C00000
+#define PLL_FBKDIV_13          0x00D00000
+#define PLL_FBKDIV_14          0x00E00000
+#define PLL_FBKDIV_15          0x00F00000
     /* Forward A divisor */
-#define PLL_FWDDIVA		   0x00070000
-#define CPC0_PLLMR1_FWDVA	   0x00070000
-#define PLL_FWDDIVA_8		   0x00000000
-#define PLL_FWDDIVA_7		   0x00010000
-#define PLL_FWDDIVA_6		   0x00020000
-#define PLL_FWDDIVA_5		   0x00030000
-#define PLL_FWDDIVA_4		   0x00040000
-#define PLL_FWDDIVA_3		   0x00050000
-#define PLL_FWDDIVA_2		   0x00060000
-#define PLL_FWDDIVA_1		   0x00070000
+#define PLL_FWDDIVA        0x00070000
+#define CPC0_PLLMR1_FWDVA      0x00070000
+#define PLL_FWDDIVA_8          0x00000000
+#define PLL_FWDDIVA_7          0x00010000
+#define PLL_FWDDIVA_6          0x00020000
+#define PLL_FWDDIVA_5          0x00030000
+#define PLL_FWDDIVA_4          0x00040000
+#define PLL_FWDDIVA_3          0x00050000
+#define PLL_FWDDIVA_2          0x00060000
+#define PLL_FWDDIVA_1          0x00070000
     /* Forward B divisor */
-#define PLL_FWDDIVB		   0x00007000
-#define CPC0_PLLMR1_FWDVB	   0x00007000
-#define PLL_FWDDIVB_8		   0x00000000
-#define PLL_FWDDIVB_7		   0x00001000
-#define PLL_FWDDIVB_6		   0x00002000
-#define PLL_FWDDIVB_5		   0x00003000
-#define PLL_FWDDIVB_4		   0x00004000
-#define PLL_FWDDIVB_3		   0x00005000
-#define PLL_FWDDIVB_2		   0x00006000
-#define PLL_FWDDIVB_1		   0x00007000
+#define PLL_FWDDIVB        0x00007000
+#define CPC0_PLLMR1_FWDVB      0x00007000
+#define PLL_FWDDIVB_8          0x00000000
+#define PLL_FWDDIVB_7          0x00001000
+#define PLL_FWDDIVB_6          0x00002000
+#define PLL_FWDDIVB_5          0x00003000
+#define PLL_FWDDIVB_4          0x00004000
+#define PLL_FWDDIVB_3          0x00005000
+#define PLL_FWDDIVB_2          0x00006000
+#define PLL_FWDDIVB_1          0x00007000
     /* PLL tune bits */
-#define PLL_TUNE_MASK		 0x000003FF
-#define PLL_TUNE_2_M_3		 0x00000133	/*  2 <= M <= 3		      */
-#define PLL_TUNE_4_M_6		 0x00000134	/*  3 <  M <= 6		      */
-#define PLL_TUNE_7_M_10		 0x00000138	/*  6 <  M <= 10	      */
-#define PLL_TUNE_11_M_14	 0x0000013C	/* 10 <  M <= 14	      */
-#define PLL_TUNE_15_M_40	 0x0000023E	/* 14 <  M <= 40	      */
-#define PLL_TUNE_VCO_LOW	 0x00000000	/* 500MHz <= VCO <=  800MHz   */
-#define PLL_TUNE_VCO_HI		 0x00000080	/* 800MHz <  VCO <= 1000MHz   */
+#define PLL_TUNE_MASK        0x000003FF
+#define PLL_TUNE_2_M_3       0x00000133 /*  2 <= M <= 3           */
+#define PLL_TUNE_4_M_6       0x00000134 /*  3 <  M <= 6           */
+#define PLL_TUNE_7_M_10      0x00000138 /*  6 <  M <= 10          */
+#define PLL_TUNE_11_M_14     0x0000013C /* 10 <  M <= 14          */
+#define PLL_TUNE_15_M_40     0x0000023E /* 14 <  M <= 40          */
+#define PLL_TUNE_VCO_LOW     0x00000000 /* 500MHz <= VCO <=  800MHz   */
+#define PLL_TUNE_VCO_HI      0x00000080 /* 800MHz <  VCO <= 1000MHz   */
 
 /* Defines for CPC0_PLLMR0 Register fields */
     /* CPU divisor */
-#define PLL_CPUDIV		   0x00300000
-#define CPC0_PLLMR0_CCDV	   0x00300000
-#define PLL_CPUDIV_1		   0x00000000
-#define PLL_CPUDIV_2		   0x00100000
-#define PLL_CPUDIV_3		   0x00200000
-#define PLL_CPUDIV_4		   0x00300000
+#define PLL_CPUDIV         0x00300000
+#define CPC0_PLLMR0_CCDV       0x00300000
+#define PLL_CPUDIV_1           0x00000000
+#define PLL_CPUDIV_2           0x00100000
+#define PLL_CPUDIV_3           0x00200000
+#define PLL_CPUDIV_4           0x00300000
     /* PLB divisor */
-#define PLL_PLBDIV		   0x00030000
-#define CPC0_PLLMR0_CBDV	   0x00030000
-#define PLL_PLBDIV_1		   0x00000000
-#define PLL_PLBDIV_2		   0x00010000
-#define PLL_PLBDIV_3		   0x00020000
-#define PLL_PLBDIV_4		   0x00030000
+#define PLL_PLBDIV         0x00030000
+#define CPC0_PLLMR0_CBDV       0x00030000
+#define PLL_PLBDIV_1           0x00000000
+#define PLL_PLBDIV_2           0x00010000
+#define PLL_PLBDIV_3           0x00020000
+#define PLL_PLBDIV_4           0x00030000
     /* OPB divisor */
-#define PLL_OPBDIV		   0x00003000
-#define CPC0_PLLMR0_OPDV	   0x00003000
-#define PLL_OPBDIV_1		   0x00000000
-#define PLL_OPBDIV_2		   0x00001000
-#define PLL_OPBDIV_3		   0x00002000
-#define PLL_OPBDIV_4		   0x00003000
+#define PLL_OPBDIV         0x00003000
+#define CPC0_PLLMR0_OPDV       0x00003000
+#define PLL_OPBDIV_1           0x00000000
+#define PLL_OPBDIV_2           0x00001000
+#define PLL_OPBDIV_3           0x00002000
+#define PLL_OPBDIV_4           0x00003000
     /* EBC divisor */
-#define PLL_EXTBUSDIV		   0x00000300
-#define CPC0_PLLMR0_EPDV	   0x00000300
-#define PLL_EXTBUSDIV_2		   0x00000000
-#define PLL_EXTBUSDIV_3		   0x00000100
-#define PLL_EXTBUSDIV_4		   0x00000200
-#define PLL_EXTBUSDIV_5		   0x00000300
+#define PLL_EXTBUSDIV          0x00000300
+#define CPC0_PLLMR0_EPDV       0x00000300
+#define PLL_EXTBUSDIV_2        0x00000000
+#define PLL_EXTBUSDIV_3        0x00000100
+#define PLL_EXTBUSDIV_4        0x00000200
+#define PLL_EXTBUSDIV_5        0x00000300
     /* MAL divisor */
-#define PLL_MALDIV		   0x00000030
-#define CPC0_PLLMR0_MPDV	   0x00000030
-#define PLL_MALDIV_1		   0x00000000
-#define PLL_MALDIV_2		   0x00000010
-#define PLL_MALDIV_3		   0x00000020
-#define PLL_MALDIV_4		   0x00000030
+#define PLL_MALDIV         0x00000030
+#define CPC0_PLLMR0_MPDV       0x00000030
+#define PLL_MALDIV_1           0x00000000
+#define PLL_MALDIV_2           0x00000010
+#define PLL_MALDIV_3           0x00000020
+#define PLL_MALDIV_4           0x00000030
     /* PCI divisor */
-#define PLL_PCIDIV		   0x00000003
-#define CPC0_PLLMR0_PPFD	   0x00000003
-#define PLL_PCIDIV_1		   0x00000000
-#define PLL_PCIDIV_2		   0x00000001
-#define PLL_PCIDIV_3		   0x00000002
-#define PLL_PCIDIV_4		   0x00000003
+#define PLL_PCIDIV         0x00000003
+#define CPC0_PLLMR0_PPFD       0x00000003
+#define PLL_PCIDIV_1           0x00000000
+#define PLL_PCIDIV_2           0x00000001
+#define PLL_PCIDIV_3           0x00000002
+#define PLL_PCIDIV_4           0x00000003
 
 /*
  *-------------------------------------------------------------------------------
@@ -343,48 +343,48 @@
  *-------------------------------------------------------------------------------
  */
 #define PLLMR0_266_133_66  (PLL_CPUDIV_1 | PLL_PLBDIV_2 |  \
-			    PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |  \
-			    PLL_MALDIV_1 | PLL_PCIDIV_4)
+                PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |  \
+                PLL_MALDIV_1 | PLL_PCIDIV_4)
 #define PLLMR1_266_133_66  (PLL_FBKDIV_8  |  \
-			    PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
-			    PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
+                PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
+                PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
 
 #define PLLMR0_133_66_66_33  (PLL_CPUDIV_1 | PLL_PLBDIV_1 |  \
-			      PLL_OPBDIV_2 | PLL_EXTBUSDIV_4 |	\
-			      PLL_MALDIV_1 | PLL_PCIDIV_4)
+                  PLL_OPBDIV_2 | PLL_EXTBUSDIV_4 |  \
+                  PLL_MALDIV_1 | PLL_PCIDIV_4)
 #define PLLMR1_133_66_66_33  (PLL_FBKDIV_4  |  \
-			      PLL_FWDDIVA_6 | PLL_FWDDIVB_6 |  \
-			      PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
+                  PLL_FWDDIVA_6 | PLL_FWDDIVB_6 |  \
+                  PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
 #define PLLMR0_200_100_50_33 (PLL_CPUDIV_1 | PLL_PLBDIV_2 |  \
-			      PLL_OPBDIV_2 | PLL_EXTBUSDIV_3 |	\
-			      PLL_MALDIV_1 | PLL_PCIDIV_4)
+                  PLL_OPBDIV_2 | PLL_EXTBUSDIV_3 |  \
+                  PLL_MALDIV_1 | PLL_PCIDIV_4)
 #define PLLMR1_200_100_50_33 (PLL_FBKDIV_6  |  \
-			      PLL_FWDDIVA_4 | PLL_FWDDIVB_4 |  \
-			      PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
+                  PLL_FWDDIVA_4 | PLL_FWDDIVB_4 |  \
+                  PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
 #define PLLMR0_266_133_66_33 (PLL_CPUDIV_1 | PLL_PLBDIV_2 |  \
-			      PLL_OPBDIV_2 | PLL_EXTBUSDIV_4 |	\
-			      PLL_MALDIV_1 | PLL_PCIDIV_4)
+                  PLL_OPBDIV_2 | PLL_EXTBUSDIV_4 |  \
+                  PLL_MALDIV_1 | PLL_PCIDIV_4)
 #define PLLMR1_266_133_66_33 (PLL_FBKDIV_8  |  \
-			      PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
-			      PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
+                  PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
+                  PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
 #define PLLMR0_266_66_33_33 (PLL_CPUDIV_1 | PLL_PLBDIV_4 |  \
-			      PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |	\
-			      PLL_MALDIV_1 | PLL_PCIDIV_2)
+                  PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |  \
+                  PLL_MALDIV_1 | PLL_PCIDIV_2)
 #define PLLMR1_266_66_33_33 (PLL_FBKDIV_8  |  \
-			      PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
-			      PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
+                  PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
+                  PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
 #define PLLMR0_333_111_55_37 (PLL_CPUDIV_1 | PLL_PLBDIV_3 |  \
-			      PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |	\
-			      PLL_MALDIV_1 | PLL_PCIDIV_3)
-#define PLLMR1_333_111_55_37 (PLL_FBKDIV_10  |	\
-			      PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
-			      PLL_TUNE_15_M_40 | PLL_TUNE_VCO_HI)
+                  PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |  \
+                  PLL_MALDIV_1 | PLL_PCIDIV_3)
+#define PLLMR1_333_111_55_37 (PLL_FBKDIV_10  |  \
+                  PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
+                  PLL_TUNE_15_M_40 | PLL_TUNE_VCO_HI)
 #define PLLMR0_333_111_55_111 (PLL_CPUDIV_1 | PLL_PLBDIV_3 |  \
-			      PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |	\
-			      PLL_MALDIV_1 | PLL_PCIDIV_1)
+                  PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |  \
+                  PLL_MALDIV_1 | PLL_PCIDIV_1)
 #define PLLMR1_333_111_55_111 (PLL_FBKDIV_10  |  \
-			      PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
-			      PLL_TUNE_15_M_40 | PLL_TUNE_VCO_HI)
+                  PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
+                  PLL_TUNE_15_M_40 | PLL_TUNE_VCO_HI)
 
 /*
  * PLL Voltage Controlled Oscillator (VCO) definitions
@@ -393,57 +393,57 @@
 #define VCO_MIN     500
 #define VCO_MAX     1000
 #elif defined(CONFIG_405EZ)
-#define sdrnand0	0x4000
-#define sdrultra0	0x4040
-#define sdrultra1	0x4050
-#define sdricintstat	0x4510
+#define sdrnand0    0x4000
+#define sdrultra0   0x4040
+#define sdrultra1   0x4050
+#define sdricintstat    0x4510
 
-#define SDR_NAND0_NDEN		0x80000000
-#define SDR_NAND0_NDBTEN	0x40000000
-#define SDR_NAND0_NDBADR_MASK	0x30000000
-#define SDR_NAND0_NDBPG_MASK	0x0f000000
-#define SDR_NAND0_NDAREN	0x00800000
-#define SDR_NAND0_NDRBEN	0x00400000
+#define SDR_NAND0_NDEN      0x80000000
+#define SDR_NAND0_NDBTEN    0x40000000
+#define SDR_NAND0_NDBADR_MASK   0x30000000
+#define SDR_NAND0_NDBPG_MASK    0x0f000000
+#define SDR_NAND0_NDAREN    0x00800000
+#define SDR_NAND0_NDRBEN    0x00400000
 
-#define SDR_ULTRA0_NDGPIOBP	0x80000000
-#define SDR_ULTRA0_CSN_MASK	0x78000000
-#define SDR_ULTRA0_CSNSEL0	0x40000000
-#define SDR_ULTRA0_CSNSEL1	0x20000000
-#define SDR_ULTRA0_CSNSEL2	0x10000000
-#define SDR_ULTRA0_CSNSEL3	0x08000000
-#define SDR_ULTRA0_EBCRDYEN	0x04000000
-#define SDR_ULTRA0_SPISSINEN	0x02000000
-#define SDR_ULTRA0_NFSRSTEN	0x01000000
+#define SDR_ULTRA0_NDGPIOBP 0x80000000
+#define SDR_ULTRA0_CSN_MASK 0x78000000
+#define SDR_ULTRA0_CSNSEL0  0x40000000
+#define SDR_ULTRA0_CSNSEL1  0x20000000
+#define SDR_ULTRA0_CSNSEL2  0x10000000
+#define SDR_ULTRA0_CSNSEL3  0x08000000
+#define SDR_ULTRA0_EBCRDYEN 0x04000000
+#define SDR_ULTRA0_SPISSINEN    0x02000000
+#define SDR_ULTRA0_NFSRSTEN 0x01000000
 
-#define SDR_ULTRA1_LEDNENABLE	0x40000000
+#define SDR_ULTRA1_LEDNENABLE   0x40000000
 
-#define SDR_ICRX_STAT	0x80000000
-#define SDR_ICTX0_STAT	0x40000000
-#define SDR_ICTX1_STAT	0x20000000
+#define SDR_ICRX_STAT   0x80000000
+#define SDR_ICTX0_STAT  0x40000000
+#define SDR_ICTX1_STAT  0x20000000
 
-#define SDR_PINSTP	0x40
+#define SDR_PINSTP  0x40
 
 /******************************************************************************
  * Control
  ******************************************************************************/
 /* CPR Registers */
-#define cprclkupd	0x020		/* CPR_CLKUPD */
-#define cprpllc		0x040		/* CPR_PLLC */
-#define cprplld		0x060		/* CPR_PLLD */
-#define cprprimad	0x080		/* CPR_PRIMAD */
-#define cprperd0	0x0e0		/* CPR_PERD0 */
-#define cprperd1	0x0e1		/* CPR_PERD1 */
-#define cprperc0	0x180		/* CPR_PERC0 */
-#define cprmisc0	0x181		/* CPR_MISC0 */
-#define cprmisc1	0x182		/* CPR_MISC1 */
+#define cprclkupd   0x020       /* CPR_CLKUPD */
+#define cprpllc     0x040       /* CPR_PLLC */
+#define cprplld     0x060       /* CPR_PLLD */
+#define cprprimad   0x080       /* CPR_PRIMAD */
+#define cprperd0    0x0e0       /* CPR_PERD0 */
+#define cprperd1    0x0e1       /* CPR_PERD1 */
+#define cprperc0    0x180       /* CPR_PERC0 */
+#define cprmisc0    0x181       /* CPR_MISC0 */
+#define cprmisc1    0x182       /* CPR_MISC1 */
 
 #define CPR_CLKUPD_ENPLLCH_EN  0x40000000     /* Enable CPR PLL Changes */
 #define CPR_CLKUPD_ENDVCH_EN   0x20000000     /* Enable CPR Sys. Div. Changes */
 #define CPR_PERD0_SPIDV_MASK   0x000F0000     /* SPI Clock Divider */
 
-#define PLLC_SRC_MASK	       0x20000000     /* PLL feedback source */
+#define PLLC_SRC_MASK          0x20000000     /* PLL feedback source */
 
-#define PLLD_FBDV_MASK	       0x1F000000     /* PLL feedback divider value */
+#define PLLD_FBDV_MASK         0x1F000000     /* PLL feedback divider value */
 #define PLLD_FWDVA_MASK        0x000F0000     /* PLL forward divider A value */
 #define PLLD_FWDVB_MASK        0x00000700     /* PLL forward divider B value */
 
@@ -462,77 +462,77 @@
  * Control
  ******************************************************************************/
 #define CNTRL_DCR_BASE 0x0b0
-#define pllmd	(CNTRL_DCR_BASE+0x0)  /* PLL mode  register		     */
-#define cntrl0	(CNTRL_DCR_BASE+0x1)  /* Control 0 register		     */
-#define cntrl1	(CNTRL_DCR_BASE+0x2)  /* Control 1 register		     */
-#define reset	(CNTRL_DCR_BASE+0x3)  /* reset register			     */
-#define strap	(CNTRL_DCR_BASE+0x4)  /* strap register			     */
+#define pllmd   (CNTRL_DCR_BASE+0x0)  /* PLL mode  register          */
+#define cntrl0  (CNTRL_DCR_BASE+0x1)  /* Control 0 register          */
+#define cntrl1  (CNTRL_DCR_BASE+0x2)  /* Control 1 register          */
+#define reset   (CNTRL_DCR_BASE+0x3)  /* reset register              */
+#define strap   (CNTRL_DCR_BASE+0x4)  /* strap register              */
 
-#define CPC0_CR0  (CNTRL_DCR_BASE+0x1)	/* chip control register 0	     */
-#define CPC0_CR1  (CNTRL_DCR_BASE+0x2)	/* chip control register 1	     */
-#define CPC0_PSR  (CNTRL_DCR_BASE+0x4)	/* chip pin strapping register	     */
+#define CPC0_CR0  (CNTRL_DCR_BASE+0x1)  /* chip control register 0       */
+#define CPC0_CR1  (CNTRL_DCR_BASE+0x2)  /* chip control register 1       */
+#define CPC0_PSR  (CNTRL_DCR_BASE+0x4)  /* chip pin strapping register       */
 
 /* CPC0_ECR/CPC0_EIRR: PPC405GPr only */
-#define CPC0_EIRR (CNTRL_DCR_BASE+0x6)	/* external interrupt routing register */
-#define CPC0_ECR  (0xaa)		/* edge conditioner register */
+#define CPC0_EIRR (CNTRL_DCR_BASE+0x6)  /* external interrupt routing register */
+#define CPC0_ECR  (0xaa)        /* edge conditioner register */
 
-#define ecr	(0xaa)		      /* edge conditioner register (405gpr)  */
+#define ecr (0xaa)            /* edge conditioner register (405gpr)  */
 
 /* Bit definitions */
-#define PLLMR_FWD_DIV_MASK	0xE0000000     /* Forward Divisor */
-#define PLLMR_FWD_DIV_BYPASS	0xE0000000
-#define PLLMR_FWD_DIV_3		0xA0000000
-#define PLLMR_FWD_DIV_4		0x80000000
-#define PLLMR_FWD_DIV_6		0x40000000
+#define PLLMR_FWD_DIV_MASK  0xE0000000     /* Forward Divisor */
+#define PLLMR_FWD_DIV_BYPASS    0xE0000000
+#define PLLMR_FWD_DIV_3     0xA0000000
+#define PLLMR_FWD_DIV_4     0x80000000
+#define PLLMR_FWD_DIV_6     0x40000000
 
-#define PLLMR_FB_DIV_MASK	0x1E000000     /* Feedback Divisor */
-#define PLLMR_FB_DIV_1		0x02000000
-#define PLLMR_FB_DIV_2		0x04000000
-#define PLLMR_FB_DIV_3		0x06000000
-#define PLLMR_FB_DIV_4		0x08000000
+#define PLLMR_FB_DIV_MASK   0x1E000000     /* Feedback Divisor */
+#define PLLMR_FB_DIV_1      0x02000000
+#define PLLMR_FB_DIV_2      0x04000000
+#define PLLMR_FB_DIV_3      0x06000000
+#define PLLMR_FB_DIV_4      0x08000000
 
-#define PLLMR_TUNING_MASK	0x01F80000
+#define PLLMR_TUNING_MASK   0x01F80000
 
-#define PLLMR_CPU_TO_PLB_MASK	0x00060000     /* CPU:PLB Frequency Divisor */
-#define PLLMR_CPU_PLB_DIV_1	0x00000000
-#define PLLMR_CPU_PLB_DIV_2	0x00020000
-#define PLLMR_CPU_PLB_DIV_3	0x00040000
-#define PLLMR_CPU_PLB_DIV_4	0x00060000
+#define PLLMR_CPU_TO_PLB_MASK   0x00060000     /* CPU:PLB Frequency Divisor */
+#define PLLMR_CPU_PLB_DIV_1 0x00000000
+#define PLLMR_CPU_PLB_DIV_2 0x00020000
+#define PLLMR_CPU_PLB_DIV_3 0x00040000
+#define PLLMR_CPU_PLB_DIV_4 0x00060000
 
-#define PLLMR_OPB_TO_PLB_MASK	0x00018000     /* OPB:PLB Frequency Divisor */
-#define PLLMR_OPB_PLB_DIV_1	0x00000000
-#define PLLMR_OPB_PLB_DIV_2	0x00008000
-#define PLLMR_OPB_PLB_DIV_3	0x00010000
-#define PLLMR_OPB_PLB_DIV_4	0x00018000
+#define PLLMR_OPB_TO_PLB_MASK   0x00018000     /* OPB:PLB Frequency Divisor */
+#define PLLMR_OPB_PLB_DIV_1 0x00000000
+#define PLLMR_OPB_PLB_DIV_2 0x00008000
+#define PLLMR_OPB_PLB_DIV_3 0x00010000
+#define PLLMR_OPB_PLB_DIV_4 0x00018000
 
-#define PLLMR_PCI_TO_PLB_MASK	0x00006000     /* PCI:PLB Frequency Divisor */
-#define PLLMR_PCI_PLB_DIV_1	0x00000000
-#define PLLMR_PCI_PLB_DIV_2	0x00002000
-#define PLLMR_PCI_PLB_DIV_3	0x00004000
-#define PLLMR_PCI_PLB_DIV_4	0x00006000
+#define PLLMR_PCI_TO_PLB_MASK   0x00006000     /* PCI:PLB Frequency Divisor */
+#define PLLMR_PCI_PLB_DIV_1 0x00000000
+#define PLLMR_PCI_PLB_DIV_2 0x00002000
+#define PLLMR_PCI_PLB_DIV_3 0x00004000
+#define PLLMR_PCI_PLB_DIV_4 0x00006000
 
-#define PLLMR_EXB_TO_PLB_MASK	0x00001800     /* External Bus:PLB Divisor  */
-#define PLLMR_EXB_PLB_DIV_2	0x00000000
-#define PLLMR_EXB_PLB_DIV_3	0x00000800
-#define PLLMR_EXB_PLB_DIV_4	0x00001000
-#define PLLMR_EXB_PLB_DIV_5	0x00001800
+#define PLLMR_EXB_TO_PLB_MASK   0x00001800     /* External Bus:PLB Divisor  */
+#define PLLMR_EXB_PLB_DIV_2 0x00000000
+#define PLLMR_EXB_PLB_DIV_3 0x00000800
+#define PLLMR_EXB_PLB_DIV_4 0x00001000
+#define PLLMR_EXB_PLB_DIV_5 0x00001800
 
 /* definitions for PPC405GPr (new mode strapping) */
-#define PLLMR_FWDB_DIV_MASK	0x00000007     /* Forward Divisor B */
+#define PLLMR_FWDB_DIV_MASK 0x00000007     /* Forward Divisor B */
 
-#define PSR_PLL_FWD_MASK	0xC0000000
-#define PSR_PLL_FDBACK_MASK	0x30000000
-#define PSR_PLL_TUNING_MASK	0x0E000000
-#define PSR_PLB_CPU_MASK	0x01800000
-#define PSR_OPB_PLB_MASK	0x00600000
-#define PSR_PCI_PLB_MASK	0x00180000
-#define PSR_EB_PLB_MASK		0x00060000
-#define PSR_ROM_WIDTH_MASK	0x00018000
-#define PSR_ROM_LOC		0x00004000
-#define PSR_PCI_ASYNC_EN	0x00001000
+#define PSR_PLL_FWD_MASK    0xC0000000
+#define PSR_PLL_FDBACK_MASK 0x30000000
+#define PSR_PLL_TUNING_MASK 0x0E000000
+#define PSR_PLB_CPU_MASK    0x01800000
+#define PSR_OPB_PLB_MASK    0x00600000
+#define PSR_PCI_PLB_MASK    0x00180000
+#define PSR_EB_PLB_MASK     0x00060000
+#define PSR_ROM_WIDTH_MASK  0x00018000
+#define PSR_ROM_LOC     0x00004000
+#define PSR_PCI_ASYNC_EN    0x00001000
 #define PSR_PERCLK_SYNC_MODE_EN 0x00000800     /* PPC405GPr only */
-#define PSR_PCI_ARBIT_EN	0x00000400
-#define PSR_NEW_MODE_EN		0x00000020     /* PPC405GPr only */
+#define PSR_PCI_ARBIT_EN    0x00000400
+#define PSR_NEW_MODE_EN     0x00000020     /* PPC405GPr only */
 
 #ifndef CONFIG_IOP480
 /*
@@ -548,201 +548,201 @@
  * Memory Access Layer
  ******************************************************************************/
 #if defined(CONFIG_405EZ)
-#define	MAL_DCR_BASE	0x380
-#define	malmcr		(MAL_DCR_BASE+0x00)	/* MAL Config reg	      */
-#define	malesr		(MAL_DCR_BASE+0x01)	/* Err Status reg (Read/Clear)*/
-#define	malier		(MAL_DCR_BASE+0x02)	/* Interrupt enable reg	      */
-#define	maldbr		(MAL_DCR_BASE+0x03)	/* Mal Debug reg (Read only)  */
-#define	maltxcasr	(MAL_DCR_BASE+0x04)	/* TX Channel active reg (set)*/
-#define	maltxcarr	(MAL_DCR_BASE+0x05)	/* TX Channel active reg (Reset)     */
-#define	maltxeobisr	(MAL_DCR_BASE+0x06)	/* TX End of buffer int status reg   */
-#define	maltxdeir	(MAL_DCR_BASE+0x07)	/* TX Descr. Error Int reg    */
-/*				      0x08-0x0F	   Reserved		      */
-#define	malrxcasr	(MAL_DCR_BASE+0x10)	/* RX Channel active reg (set)*/
-#define	malrxcarr	(MAL_DCR_BASE+0x11)	/* RX Channel active reg (Reset)     */
-#define	malrxeobisr	(MAL_DCR_BASE+0x12)	/* RX End of buffer int status reg   */
-#define	malrxdeir	(MAL_DCR_BASE+0x13)	/* RX Descr. Error Int reg  */
-/*				      0x14-0x1F	   Reserved		    */
-#define	maltxctp0r	(MAL_DCR_BASE+0x20)  /* TX 0 Channel table ptr reg  */
-#define	maltxctp1r	(MAL_DCR_BASE+0x21)  /* TX 1 Channel table ptr reg  */
-#define	maltxctp2r	(MAL_DCR_BASE+0x22)  /* TX 2 Channel table ptr reg  */
-#define	maltxctp3r	(MAL_DCR_BASE+0x23)  /* TX 3 Channel table ptr reg  */
-#define	maltxctp4r	(MAL_DCR_BASE+0x24)  /* TX 4 Channel table ptr reg  */
-#define	maltxctp5r	(MAL_DCR_BASE+0x25)  /* TX 5 Channel table ptr reg  */
-#define	maltxctp6r	(MAL_DCR_BASE+0x26)  /* TX 6 Channel table ptr reg  */
-#define	maltxctp7r	(MAL_DCR_BASE+0x27)  /* TX 7 Channel table ptr reg  */
-#define	maltxctp8r	(MAL_DCR_BASE+0x28)  /* TX 8 Channel table ptr reg  */
-#define	maltxctp9r	(MAL_DCR_BASE+0x29)  /* TX 9 Channel table ptr reg  */
-#define	maltxctp10r	(MAL_DCR_BASE+0x2A)  /* TX 10 Channel table ptr reg */
-#define	maltxctp11r	(MAL_DCR_BASE+0x2B)  /* TX 11 Channel table ptr reg */
-#define	maltxctp12r	(MAL_DCR_BASE+0x2C)  /* TX 12 Channel table ptr reg */
-#define	maltxctp13r	(MAL_DCR_BASE+0x2D)  /* TX 13 Channel table ptr reg */
-#define	maltxctp14r	(MAL_DCR_BASE+0x2E)  /* TX 14 Channel table ptr reg */
-#define	maltxctp15r	(MAL_DCR_BASE+0x2F)  /* TX 15 Channel table ptr reg */
-#define	maltxctp16r	(MAL_DCR_BASE+0x30)  /* TX 16 Channel table ptr reg */
-#define	maltxctp17r	(MAL_DCR_BASE+0x31)  /* TX 17 Channel table ptr reg */
-#define	maltxctp18r	(MAL_DCR_BASE+0x32)  /* TX 18 Channel table ptr reg */
-#define	maltxctp19r	(MAL_DCR_BASE+0x33)  /* TX 19 Channel table ptr reg */
-#define	maltxctp20r	(MAL_DCR_BASE+0x34)  /* TX 20 Channel table ptr reg */
-#define	maltxctp21r	(MAL_DCR_BASE+0x35)  /* TX 21 Channel table ptr reg */
-#define	maltxctp22r	(MAL_DCR_BASE+0x36)  /* TX 22 Channel table ptr reg */
-#define	maltxctp23r	(MAL_DCR_BASE+0x37)  /* TX 23 Channel table ptr reg */
-#define	maltxctp24r	(MAL_DCR_BASE+0x38)  /* TX 24 Channel table ptr reg */
-#define	maltxctp25r	(MAL_DCR_BASE+0x39)  /* TX 25 Channel table ptr reg */
-#define	maltxctp26r	(MAL_DCR_BASE+0x3A)  /* TX 26 Channel table ptr reg */
-#define	maltxctp27r	(MAL_DCR_BASE+0x3B)  /* TX 27 Channel table ptr reg */
-#define	maltxctp28r	(MAL_DCR_BASE+0x3C)  /* TX 28 Channel table ptr reg */
-#define	maltxctp29r	(MAL_DCR_BASE+0x3D)  /* TX 29 Channel table ptr reg */
-#define	maltxctp30r	(MAL_DCR_BASE+0x3E)  /* TX 30 Channel table ptr reg */
-#define	maltxctp31r	(MAL_DCR_BASE+0x3F)  /* TX 31 Channel table ptr reg */
-#define	malrxctp0r	(MAL_DCR_BASE+0x40)  /* RX 0 Channel table ptr reg  */
-#define	malrxctp1r	(MAL_DCR_BASE+0x41)  /* RX 1 Channel table ptr reg  */
-#define	malrxctp2r	(MAL_DCR_BASE+0x42)  /* RX 2 Channel table ptr reg  */
-#define	malrxctp3r	(MAL_DCR_BASE+0x43)  /* RX 3 Channel table ptr reg  */
-#define	malrxctp4r	(MAL_DCR_BASE+0x44)  /* RX 4 Channel table ptr reg  */
-#define	malrxctp5r	(MAL_DCR_BASE+0x45)  /* RX 5 Channel table ptr reg  */
-#define	malrxctp6r	(MAL_DCR_BASE+0x46)  /* RX 6 Channel table ptr reg  */
-#define	malrxctp7r	(MAL_DCR_BASE+0x47)  /* RX 7 Channel table ptr reg  */
-#define	malrxctp8r	(MAL_DCR_BASE+0x48)  /* RX 8 Channel table ptr reg  */
-#define	malrxctp9r	(MAL_DCR_BASE+0x49)  /* RX 9 Channel table ptr reg  */
-#define	malrxctp10r	(MAL_DCR_BASE+0x4A)  /* RX 10 Channel table ptr reg */
-#define	malrxctp11r	(MAL_DCR_BASE+0x4B)  /* RX 11 Channel table ptr reg */
-#define	malrxctp12r	(MAL_DCR_BASE+0x4C)  /* RX 12 Channel table ptr reg */
-#define	malrxctp13r	(MAL_DCR_BASE+0x4D)  /* RX 13 Channel table ptr reg */
-#define	malrxctp14r	(MAL_DCR_BASE+0x4E)  /* RX 14 Channel table ptr reg */
-#define	malrxctp15r	(MAL_DCR_BASE+0x4F)  /* RX 15 Channel table ptr reg */
-#define	malrxctp16r	(MAL_DCR_BASE+0x50)  /* RX 16 Channel table ptr reg */
-#define	malrxctp17r	(MAL_DCR_BASE+0x51)  /* RX 17 Channel table ptr reg */
-#define	malrxctp18r	(MAL_DCR_BASE+0x52)  /* RX 18 Channel table ptr reg */
-#define	malrxctp19r	(MAL_DCR_BASE+0x53)  /* RX 19 Channel table ptr reg */
-#define	malrxctp20r	(MAL_DCR_BASE+0x54)  /* RX 20 Channel table ptr reg */
-#define	malrxctp21r	(MAL_DCR_BASE+0x55)  /* RX 21 Channel table ptr reg */
-#define	malrxctp22r	(MAL_DCR_BASE+0x56)  /* RX 22 Channel table ptr reg */
-#define	malrxctp23r	(MAL_DCR_BASE+0x57)  /* RX 23 Channel table ptr reg */
-#define	malrxctp24r	(MAL_DCR_BASE+0x58)  /* RX 24 Channel table ptr reg */
-#define	malrxctp25r	(MAL_DCR_BASE+0x59)  /* RX 25 Channel table ptr reg */
-#define	malrxctp26r	(MAL_DCR_BASE+0x5A)  /* RX 26 Channel table ptr reg */
-#define	malrxctp27r	(MAL_DCR_BASE+0x5B)  /* RX 27 Channel table ptr reg */
-#define	malrxctp28r	(MAL_DCR_BASE+0x5C)  /* RX 28 Channel table ptr reg */
-#define	malrxctp29r	(MAL_DCR_BASE+0x5D)  /* RX 29 Channel table ptr reg */
-#define	malrxctp30r	(MAL_DCR_BASE+0x5E)  /* RX 30 Channel table ptr reg */
-#define	malrxctp31r	(MAL_DCR_BASE+0x5F)  /* RX 31 Channel table ptr reg */
-#define	malrcbs0	(MAL_DCR_BASE+0x60)  /* RX 0 Channel buffer size reg */
-#define	malrcbs1	(MAL_DCR_BASE+0x61)  /* RX 1 Channel buffer size reg */
-#define	malrcbs2	(MAL_DCR_BASE+0x62)  /* RX 2 Channel buffer size reg */
-#define	malrcbs3	(MAL_DCR_BASE+0x63)  /* RX 3 Channel buffer size reg */
-#define	malrcbs4	(MAL_DCR_BASE+0x64)  /* RX 4 Channel buffer size reg */
-#define	malrcbs5	(MAL_DCR_BASE+0x65)  /* RX 5 Channel buffer size reg */
-#define	malrcbs6	(MAL_DCR_BASE+0x66)  /* RX 6 Channel buffer size reg */
-#define	malrcbs7	(MAL_DCR_BASE+0x67)  /* RX 7 Channel buffer size reg */
-#define	malrcbs8	(MAL_DCR_BASE+0x68)  /* RX 8 Channel buffer size reg */
-#define	malrcbs9	(MAL_DCR_BASE+0x69)  /* RX 9 Channel buffer size reg */
-#define	malrcbs10	(MAL_DCR_BASE+0x6A)  /* RX 10 Channel buffer size reg */
-#define	malrcbs11	(MAL_DCR_BASE+0x6B)  /* RX 11 Channel buffer size reg */
-#define	malrcbs12	(MAL_DCR_BASE+0x6C)  /* RX 12 Channel buffer size reg */
-#define	malrcbs13	(MAL_DCR_BASE+0x6D)  /* RX 13 Channel buffer size reg */
-#define	malrcbs14	(MAL_DCR_BASE+0x6E)  /* RX 14 Channel buffer size reg */
-#define	malrcbs15	(MAL_DCR_BASE+0x6F)  /* RX 15 Channel buffer size reg */
-#define	malrcbs16	(MAL_DCR_BASE+0x70)  /* RX 16 Channel buffer size reg */
-#define	malrcbs17	(MAL_DCR_BASE+0x71)  /* RX 17 Channel buffer size reg */
-#define	malrcbs18	(MAL_DCR_BASE+0x72)  /* RX 18 Channel buffer size reg */
-#define	malrcbs19	(MAL_DCR_BASE+0x73)  /* RX 19 Channel buffer size reg */
-#define	malrcbs20	(MAL_DCR_BASE+0x74)  /* RX 20 Channel buffer size reg */
-#define	malrcbs21	(MAL_DCR_BASE+0x75)  /* RX 21 Channel buffer size reg */
-#define	malrcbs22	(MAL_DCR_BASE+0x76)  /* RX 22 Channel buffer size reg */
-#define	malrcbs23	(MAL_DCR_BASE+0x77)  /* RX 23 Channel buffer size reg */
-#define	malrcbs24	(MAL_DCR_BASE+0x78)  /* RX 24 Channel buffer size reg */
-#define	malrcbs25	(MAL_DCR_BASE+0x79)  /* RX 25 Channel buffer size reg */
-#define	malrcbs26	(MAL_DCR_BASE+0x7A)  /* RX 26 Channel buffer size reg */
-#define	malrcbs27	(MAL_DCR_BASE+0x7B)  /* RX 27 Channel buffer size reg */
-#define	malrcbs28	(MAL_DCR_BASE+0x7C)  /* RX 28 Channel buffer size reg */
-#define	malrcbs29	(MAL_DCR_BASE+0x7D)  /* RX 29 Channel buffer size reg */
-#define	malrcbs30	(MAL_DCR_BASE+0x7E)  /* RX 30 Channel buffer size reg */
-#define	malrcbs31	(MAL_DCR_BASE+0x7F)  /* RX 31 Channel buffer size reg */
+#define MAL_DCR_BASE    0x380
+#define malmcr      (MAL_DCR_BASE+0x00) /* MAL Config reg         */
+#define malesr      (MAL_DCR_BASE+0x01) /* Err Status reg (Read/Clear)*/
+#define malier      (MAL_DCR_BASE+0x02) /* Interrupt enable reg       */
+#define maldbr      (MAL_DCR_BASE+0x03) /* Mal Debug reg (Read only)  */
+#define maltxcasr   (MAL_DCR_BASE+0x04) /* TX Channel active reg (set)*/
+#define maltxcarr   (MAL_DCR_BASE+0x05) /* TX Channel active reg (Reset)     */
+#define maltxeobisr (MAL_DCR_BASE+0x06) /* TX End of buffer int status reg   */
+#define maltxdeir   (MAL_DCR_BASE+0x07) /* TX Descr. Error Int reg    */
+/*                    0x08-0x0F    Reserved           */
+#define malrxcasr   (MAL_DCR_BASE+0x10) /* RX Channel active reg (set)*/
+#define malrxcarr   (MAL_DCR_BASE+0x11) /* RX Channel active reg (Reset)     */
+#define malrxeobisr (MAL_DCR_BASE+0x12) /* RX End of buffer int status reg   */
+#define malrxdeir   (MAL_DCR_BASE+0x13) /* RX Descr. Error Int reg  */
+/*                    0x14-0x1F    Reserved         */
+#define maltxctp0r  (MAL_DCR_BASE+0x20)  /* TX 0 Channel table ptr reg  */
+#define maltxctp1r  (MAL_DCR_BASE+0x21)  /* TX 1 Channel table ptr reg  */
+#define maltxctp2r  (MAL_DCR_BASE+0x22)  /* TX 2 Channel table ptr reg  */
+#define maltxctp3r  (MAL_DCR_BASE+0x23)  /* TX 3 Channel table ptr reg  */
+#define maltxctp4r  (MAL_DCR_BASE+0x24)  /* TX 4 Channel table ptr reg  */
+#define maltxctp5r  (MAL_DCR_BASE+0x25)  /* TX 5 Channel table ptr reg  */
+#define maltxctp6r  (MAL_DCR_BASE+0x26)  /* TX 6 Channel table ptr reg  */
+#define maltxctp7r  (MAL_DCR_BASE+0x27)  /* TX 7 Channel table ptr reg  */
+#define maltxctp8r  (MAL_DCR_BASE+0x28)  /* TX 8 Channel table ptr reg  */
+#define maltxctp9r  (MAL_DCR_BASE+0x29)  /* TX 9 Channel table ptr reg  */
+#define maltxctp10r (MAL_DCR_BASE+0x2A)  /* TX 10 Channel table ptr reg */
+#define maltxctp11r (MAL_DCR_BASE+0x2B)  /* TX 11 Channel table ptr reg */
+#define maltxctp12r (MAL_DCR_BASE+0x2C)  /* TX 12 Channel table ptr reg */
+#define maltxctp13r (MAL_DCR_BASE+0x2D)  /* TX 13 Channel table ptr reg */
+#define maltxctp14r (MAL_DCR_BASE+0x2E)  /* TX 14 Channel table ptr reg */
+#define maltxctp15r (MAL_DCR_BASE+0x2F)  /* TX 15 Channel table ptr reg */
+#define maltxctp16r (MAL_DCR_BASE+0x30)  /* TX 16 Channel table ptr reg */
+#define maltxctp17r (MAL_DCR_BASE+0x31)  /* TX 17 Channel table ptr reg */
+#define maltxctp18r (MAL_DCR_BASE+0x32)  /* TX 18 Channel table ptr reg */
+#define maltxctp19r (MAL_DCR_BASE+0x33)  /* TX 19 Channel table ptr reg */
+#define maltxctp20r (MAL_DCR_BASE+0x34)  /* TX 20 Channel table ptr reg */
+#define maltxctp21r (MAL_DCR_BASE+0x35)  /* TX 21 Channel table ptr reg */
+#define maltxctp22r (MAL_DCR_BASE+0x36)  /* TX 22 Channel table ptr reg */
+#define maltxctp23r (MAL_DCR_BASE+0x37)  /* TX 23 Channel table ptr reg */
+#define maltxctp24r (MAL_DCR_BASE+0x38)  /* TX 24 Channel table ptr reg */
+#define maltxctp25r (MAL_DCR_BASE+0x39)  /* TX 25 Channel table ptr reg */
+#define maltxctp26r (MAL_DCR_BASE+0x3A)  /* TX 26 Channel table ptr reg */
+#define maltxctp27r (MAL_DCR_BASE+0x3B)  /* TX 27 Channel table ptr reg */
+#define maltxctp28r (MAL_DCR_BASE+0x3C)  /* TX 28 Channel table ptr reg */
+#define maltxctp29r (MAL_DCR_BASE+0x3D)  /* TX 29 Channel table ptr reg */
+#define maltxctp30r (MAL_DCR_BASE+0x3E)  /* TX 30 Channel table ptr reg */
+#define maltxctp31r (MAL_DCR_BASE+0x3F)  /* TX 31 Channel table ptr reg */
+#define malrxctp0r  (MAL_DCR_BASE+0x40)  /* RX 0 Channel table ptr reg  */
+#define malrxctp1r  (MAL_DCR_BASE+0x41)  /* RX 1 Channel table ptr reg  */
+#define malrxctp2r  (MAL_DCR_BASE+0x42)  /* RX 2 Channel table ptr reg  */
+#define malrxctp3r  (MAL_DCR_BASE+0x43)  /* RX 3 Channel table ptr reg  */
+#define malrxctp4r  (MAL_DCR_BASE+0x44)  /* RX 4 Channel table ptr reg  */
+#define malrxctp5r  (MAL_DCR_BASE+0x45)  /* RX 5 Channel table ptr reg  */
+#define malrxctp6r  (MAL_DCR_BASE+0x46)  /* RX 6 Channel table ptr reg  */
+#define malrxctp7r  (MAL_DCR_BASE+0x47)  /* RX 7 Channel table ptr reg  */
+#define malrxctp8r  (MAL_DCR_BASE+0x48)  /* RX 8 Channel table ptr reg  */
+#define malrxctp9r  (MAL_DCR_BASE+0x49)  /* RX 9 Channel table ptr reg  */
+#define malrxctp10r (MAL_DCR_BASE+0x4A)  /* RX 10 Channel table ptr reg */
+#define malrxctp11r (MAL_DCR_BASE+0x4B)  /* RX 11 Channel table ptr reg */
+#define malrxctp12r (MAL_DCR_BASE+0x4C)  /* RX 12 Channel table ptr reg */
+#define malrxctp13r (MAL_DCR_BASE+0x4D)  /* RX 13 Channel table ptr reg */
+#define malrxctp14r (MAL_DCR_BASE+0x4E)  /* RX 14 Channel table ptr reg */
+#define malrxctp15r (MAL_DCR_BASE+0x4F)  /* RX 15 Channel table ptr reg */
+#define malrxctp16r (MAL_DCR_BASE+0x50)  /* RX 16 Channel table ptr reg */
+#define malrxctp17r (MAL_DCR_BASE+0x51)  /* RX 17 Channel table ptr reg */
+#define malrxctp18r (MAL_DCR_BASE+0x52)  /* RX 18 Channel table ptr reg */
+#define malrxctp19r (MAL_DCR_BASE+0x53)  /* RX 19 Channel table ptr reg */
+#define malrxctp20r (MAL_DCR_BASE+0x54)  /* RX 20 Channel table ptr reg */
+#define malrxctp21r (MAL_DCR_BASE+0x55)  /* RX 21 Channel table ptr reg */
+#define malrxctp22r (MAL_DCR_BASE+0x56)  /* RX 22 Channel table ptr reg */
+#define malrxctp23r (MAL_DCR_BASE+0x57)  /* RX 23 Channel table ptr reg */
+#define malrxctp24r (MAL_DCR_BASE+0x58)  /* RX 24 Channel table ptr reg */
+#define malrxctp25r (MAL_DCR_BASE+0x59)  /* RX 25 Channel table ptr reg */
+#define malrxctp26r (MAL_DCR_BASE+0x5A)  /* RX 26 Channel table ptr reg */
+#define malrxctp27r (MAL_DCR_BASE+0x5B)  /* RX 27 Channel table ptr reg */
+#define malrxctp28r (MAL_DCR_BASE+0x5C)  /* RX 28 Channel table ptr reg */
+#define malrxctp29r (MAL_DCR_BASE+0x5D)  /* RX 29 Channel table ptr reg */
+#define malrxctp30r (MAL_DCR_BASE+0x5E)  /* RX 30 Channel table ptr reg */
+#define malrxctp31r (MAL_DCR_BASE+0x5F)  /* RX 31 Channel table ptr reg */
+#define malrcbs0    (MAL_DCR_BASE+0x60)  /* RX 0 Channel buffer size reg */
+#define malrcbs1    (MAL_DCR_BASE+0x61)  /* RX 1 Channel buffer size reg */
+#define malrcbs2    (MAL_DCR_BASE+0x62)  /* RX 2 Channel buffer size reg */
+#define malrcbs3    (MAL_DCR_BASE+0x63)  /* RX 3 Channel buffer size reg */
+#define malrcbs4    (MAL_DCR_BASE+0x64)  /* RX 4 Channel buffer size reg */
+#define malrcbs5    (MAL_DCR_BASE+0x65)  /* RX 5 Channel buffer size reg */
+#define malrcbs6    (MAL_DCR_BASE+0x66)  /* RX 6 Channel buffer size reg */
+#define malrcbs7    (MAL_DCR_BASE+0x67)  /* RX 7 Channel buffer size reg */
+#define malrcbs8    (MAL_DCR_BASE+0x68)  /* RX 8 Channel buffer size reg */
+#define malrcbs9    (MAL_DCR_BASE+0x69)  /* RX 9 Channel buffer size reg */
+#define malrcbs10   (MAL_DCR_BASE+0x6A)  /* RX 10 Channel buffer size reg */
+#define malrcbs11   (MAL_DCR_BASE+0x6B)  /* RX 11 Channel buffer size reg */
+#define malrcbs12   (MAL_DCR_BASE+0x6C)  /* RX 12 Channel buffer size reg */
+#define malrcbs13   (MAL_DCR_BASE+0x6D)  /* RX 13 Channel buffer size reg */
+#define malrcbs14   (MAL_DCR_BASE+0x6E)  /* RX 14 Channel buffer size reg */
+#define malrcbs15   (MAL_DCR_BASE+0x6F)  /* RX 15 Channel buffer size reg */
+#define malrcbs16   (MAL_DCR_BASE+0x70)  /* RX 16 Channel buffer size reg */
+#define malrcbs17   (MAL_DCR_BASE+0x71)  /* RX 17 Channel buffer size reg */
+#define malrcbs18   (MAL_DCR_BASE+0x72)  /* RX 18 Channel buffer size reg */
+#define malrcbs19   (MAL_DCR_BASE+0x73)  /* RX 19 Channel buffer size reg */
+#define malrcbs20   (MAL_DCR_BASE+0x74)  /* RX 20 Channel buffer size reg */
+#define malrcbs21   (MAL_DCR_BASE+0x75)  /* RX 21 Channel buffer size reg */
+#define malrcbs22   (MAL_DCR_BASE+0x76)  /* RX 22 Channel buffer size reg */
+#define malrcbs23   (MAL_DCR_BASE+0x77)  /* RX 23 Channel buffer size reg */
+#define malrcbs24   (MAL_DCR_BASE+0x78)  /* RX 24 Channel buffer size reg */
+#define malrcbs25   (MAL_DCR_BASE+0x79)  /* RX 25 Channel buffer size reg */
+#define malrcbs26   (MAL_DCR_BASE+0x7A)  /* RX 26 Channel buffer size reg */
+#define malrcbs27   (MAL_DCR_BASE+0x7B)  /* RX 27 Channel buffer size reg */
+#define malrcbs28   (MAL_DCR_BASE+0x7C)  /* RX 28 Channel buffer size reg */
+#define malrcbs29   (MAL_DCR_BASE+0x7D)  /* RX 29 Channel buffer size reg */
+#define malrcbs30   (MAL_DCR_BASE+0x7E)  /* RX 30 Channel buffer size reg */
+#define malrcbs31   (MAL_DCR_BASE+0x7F)  /* RX 31 Channel buffer size reg */
 
 #else /* !defined(CONFIG_405EZ) */
 
 #define MAL_DCR_BASE 0x180
-#define malmcr	(MAL_DCR_BASE+0x00)  /* MAL Config reg			     */
-#define malesr	(MAL_DCR_BASE+0x01)  /* Error Status reg (Read/Clear)	     */
-#define malier	(MAL_DCR_BASE+0x02)  /* Interrupt enable reg		     */
-#define maldbr	(MAL_DCR_BASE+0x03)  /* Mal Debug reg (Read only)	     */
-#define maltxcasr  (MAL_DCR_BASE+0x04)	/* TX Channel active reg (set)	     */
-#define maltxcarr  (MAL_DCR_BASE+0x05)	/* TX Channel active reg (Reset)     */
+#define malmcr  (MAL_DCR_BASE+0x00)  /* MAL Config reg               */
+#define malesr  (MAL_DCR_BASE+0x01)  /* Error Status reg (Read/Clear)        */
+#define malier  (MAL_DCR_BASE+0x02)  /* Interrupt enable reg             */
+#define maldbr  (MAL_DCR_BASE+0x03)  /* Mal Debug reg (Read only)        */
+#define maltxcasr  (MAL_DCR_BASE+0x04)  /* TX Channel active reg (set)       */
+#define maltxcarr  (MAL_DCR_BASE+0x05)  /* TX Channel active reg (Reset)     */
 #define maltxeobisr (MAL_DCR_BASE+0x06) /* TX End of buffer int status reg   */
-#define maltxdeir  (MAL_DCR_BASE+0x07)	/* TX Descr. Error Int reg	     */
-#define malrxcasr  (MAL_DCR_BASE+0x10)	/* RX Channel active reg (set)	     */
-#define malrxcarr  (MAL_DCR_BASE+0x11)	/* RX Channel active reg (Reset)     */
+#define maltxdeir  (MAL_DCR_BASE+0x07)  /* TX Descr. Error Int reg       */
+#define malrxcasr  (MAL_DCR_BASE+0x10)  /* RX Channel active reg (set)       */
+#define malrxcarr  (MAL_DCR_BASE+0x11)  /* RX Channel active reg (Reset)     */
 #define malrxeobisr (MAL_DCR_BASE+0x12) /* RX End of buffer int status reg   */
-#define malrxdeir  (MAL_DCR_BASE+0x13)	/* RX Descr. Error Int reg	     */
-#define maltxctp0r (MAL_DCR_BASE+0x20)	/* TX 0 Channel table pointer reg    */
-#define maltxctp1r (MAL_DCR_BASE+0x21)	/* TX 1 Channel table pointer reg    */
-#define maltxctp2r (MAL_DCR_BASE+0x22)	/* TX 2 Channel table pointer reg    */
-#define malrxctp0r (MAL_DCR_BASE+0x40)	/* RX 0 Channel table pointer reg    */
-#define malrxctp1r (MAL_DCR_BASE+0x41)	/* RX 1 Channel table pointer reg    */
-#define malrcbs0   (MAL_DCR_BASE+0x60)	/* RX 0 Channel buffer size reg      */
-#define malrcbs1   (MAL_DCR_BASE+0x61)	/* RX 1 Channel buffer size reg      */
+#define malrxdeir  (MAL_DCR_BASE+0x13)  /* RX Descr. Error Int reg       */
+#define maltxctp0r (MAL_DCR_BASE+0x20)  /* TX 0 Channel table pointer reg    */
+#define maltxctp1r (MAL_DCR_BASE+0x21)  /* TX 1 Channel table pointer reg    */
+#define maltxctp2r (MAL_DCR_BASE+0x22)  /* TX 2 Channel table pointer reg    */
+#define malrxctp0r (MAL_DCR_BASE+0x40)  /* RX 0 Channel table pointer reg    */
+#define malrxctp1r (MAL_DCR_BASE+0x41)  /* RX 1 Channel table pointer reg    */
+#define malrcbs0   (MAL_DCR_BASE+0x60)  /* RX 0 Channel buffer size reg      */
+#define malrcbs1   (MAL_DCR_BASE+0x61)  /* RX 1 Channel buffer size reg      */
 #endif /* defined(CONFIG_405EZ) */
 
 /*-----------------------------------------------------------------------------
 | IIC Register Offsets
 '----------------------------------------------------------------------------*/
-#define    IICMDBUF	    0x00
-#define    IICSDBUF	    0x02
-#define    IICLMADR	    0x04
-#define    IICHMADR	    0x05
-#define    IICCNTL	    0x06
-#define    IICMDCNTL	    0x07
-#define    IICSTS	    0x08
-#define    IICEXTSTS	    0x09
-#define    IICLSADR	    0x0A
-#define    IICHSADR	    0x0B
-#define    IICCLKDIV	    0x0C
-#define    IICINTRMSK	    0x0D
-#define    IICXFRCNT	    0x0E
-#define    IICXTCNTLSS	    0x0F
+#define    IICMDBUF     0x00
+#define    IICSDBUF     0x02
+#define    IICLMADR     0x04
+#define    IICHMADR     0x05
+#define    IICCNTL      0x06
+#define    IICMDCNTL        0x07
+#define    IICSTS       0x08
+#define    IICEXTSTS        0x09
+#define    IICLSADR     0x0A
+#define    IICHSADR     0x0B
+#define    IICCLKDIV        0x0C
+#define    IICINTRMSK       0x0D
+#define    IICXFRCNT        0x0E
+#define    IICXTCNTLSS      0x0F
 #define    IICDIRECTCNTL    0x10
 
 /*-----------------------------------------------------------------------------
 | UART Register Offsets
 '----------------------------------------------------------------------------*/
-#define		DATA_REG	0x00
-#define		DL_LSB		0x00
-#define		DL_MSB		0x01
-#define		INT_ENABLE	0x01
-#define		FIFO_CONTROL	0x02
-#define		LINE_CONTROL	0x03
-#define		MODEM_CONTROL	0x04
-#define		LINE_STATUS	0x05
-#define		MODEM_STATUS	0x06
-#define		SCRATCH		0x07
+#define     DATA_REG    0x00
+#define     DL_LSB      0x00
+#define     DL_MSB      0x01
+#define     INT_ENABLE  0x01
+#define     FIFO_CONTROL    0x02
+#define     LINE_CONTROL    0x03
+#define     MODEM_CONTROL   0x04
+#define     LINE_STATUS 0x05
+#define     MODEM_STATUS    0x06
+#define     SCRATCH     0x07
 
 /******************************************************************************
  * On Chip Memory
  ******************************************************************************/
 #if defined(CONFIG_405EZ)
 #define OCM_DCR_BASE 0x020
-#define ocmplb3cr1	(OCM_DCR_BASE+0x00)  /* OCM PLB3 Bank 1 Config Reg    */
-#define ocmplb3cr2	(OCM_DCR_BASE+0x01)  /* OCM PLB3 Bank 2 Config Reg    */
-#define ocmplb3bear	(OCM_DCR_BASE+0x02)  /* OCM PLB3 Bus Error Add Reg    */
-#define ocmplb3besr0	(OCM_DCR_BASE+0x03)  /* OCM PLB3 Bus Error Stat Reg 0 */
-#define ocmplb3besr1	(OCM_DCR_BASE+0x04)  /* OCM PLB3 Bus Error Stat Reg 1 */
-#define ocmcid		(OCM_DCR_BASE+0x05)  /* OCM Core ID		      */
-#define ocmrevid	(OCM_DCR_BASE+0x06)  /* OCM Revision ID		      */
-#define ocmplb3dpc	(OCM_DCR_BASE+0x07)  /* OCM PLB3 Data Parity Check    */
-#define ocmdscr1	(OCM_DCR_BASE+0x08)  /* OCM D-side Bank 1 Config Reg  */
-#define ocmdscr2	(OCM_DCR_BASE+0x09)  /* OCM D-side Bank 2 Config Reg  */
-#define ocmiscr1	(OCM_DCR_BASE+0x0A)  /* OCM I-side Bank 1 Config Reg  */
-#define ocmiscr2	(OCM_DCR_BASE+0x0B)  /* OCM I-side Bank 2 Config Reg  */
-#define ocmdsisdpc	(OCM_DCR_BASE+0x0C)  /* OCM D-side/I-side Data Par Chk*/
-#define ocmdsisbear	(OCM_DCR_BASE+0x0D)  /* OCM D-side/I-side Bus Err Addr*/
-#define ocmdsisbesr	(OCM_DCR_BASE+0x0E)  /* OCM D-side/I-side Bus Err Stat*/
+#define ocmplb3cr1  (OCM_DCR_BASE+0x00)  /* OCM PLB3 Bank 1 Config Reg    */
+#define ocmplb3cr2  (OCM_DCR_BASE+0x01)  /* OCM PLB3 Bank 2 Config Reg    */
+#define ocmplb3bear (OCM_DCR_BASE+0x02)  /* OCM PLB3 Bus Error Add Reg    */
+#define ocmplb3besr0    (OCM_DCR_BASE+0x03)  /* OCM PLB3 Bus Error Stat Reg 0 */
+#define ocmplb3besr1    (OCM_DCR_BASE+0x04)  /* OCM PLB3 Bus Error Stat Reg 1 */
+#define ocmcid      (OCM_DCR_BASE+0x05)  /* OCM Core ID           */
+#define ocmrevid    (OCM_DCR_BASE+0x06)  /* OCM Revision ID           */
+#define ocmplb3dpc  (OCM_DCR_BASE+0x07)  /* OCM PLB3 Data Parity Check    */
+#define ocmdscr1    (OCM_DCR_BASE+0x08)  /* OCM D-side Bank 1 Config Reg  */
+#define ocmdscr2    (OCM_DCR_BASE+0x09)  /* OCM D-side Bank 2 Config Reg  */
+#define ocmiscr1    (OCM_DCR_BASE+0x0A)  /* OCM I-side Bank 1 Config Reg  */
+#define ocmiscr2    (OCM_DCR_BASE+0x0B)  /* OCM I-side Bank 2 Config Reg  */
+#define ocmdsisdpc  (OCM_DCR_BASE+0x0C)  /* OCM D-side/I-side Data Par Chk*/
+#define ocmdsisbear (OCM_DCR_BASE+0x0D)  /* OCM D-side/I-side Bus Err Addr*/
+#define ocmdsisbesr (OCM_DCR_BASE+0x0E)  /* OCM D-side/I-side Bus Err Stat*/
 #else
 #define OCM_DCR_BASE 0x018
-#define ocmisarc   (OCM_DCR_BASE+0x00)	/* OCM I-side address compare reg    */
-#define ocmiscntl  (OCM_DCR_BASE+0x01)	/* OCM I-side control reg	     */
-#define ocmdsarc   (OCM_DCR_BASE+0x02)	/* OCM D-side address compare reg    */
-#define ocmdscntl  (OCM_DCR_BASE+0x03)	/* OCM D-side control reg	     */
+#define ocmisarc   (OCM_DCR_BASE+0x00)  /* OCM I-side address compare reg    */
+#define ocmiscntl  (OCM_DCR_BASE+0x01)  /* OCM I-side control reg        */
+#define ocmdsarc   (OCM_DCR_BASE+0x02)  /* OCM D-side address compare reg    */
+#define ocmdscntl  (OCM_DCR_BASE+0x03)  /* OCM D-side control reg        */
 #endif /* CONFIG_405EZ */
 
 /******************************************************************************
@@ -751,154 +751,154 @@
 #if defined(CONFIG_405EZ)
 /* Only the 405EZ has 2 GPIOs */
 #define GPIO_BASE  0xEF600700
-#define GPIO0_OR		(GPIO_BASE+0x0)
-#define GPIO0_TCR		(GPIO_BASE+0x4)
-#define GPIO0_OSRL		(GPIO_BASE+0x8)
-#define GPIO0_OSRH		(GPIO_BASE+0xC)
-#define GPIO0_TSRL		(GPIO_BASE+0x10)
-#define GPIO0_TSRH		(GPIO_BASE+0x14)
-#define GPIO0_ODR		(GPIO_BASE+0x18)
-#define GPIO0_IR		(GPIO_BASE+0x1C)
-#define GPIO0_RR1		(GPIO_BASE+0x20)
-#define GPIO0_RR2		(GPIO_BASE+0x24)
-#define GPIO0_RR3		(GPIO_BASE+0x28)
-#define GPIO0_ISR1L		(GPIO_BASE+0x30)
-#define GPIO0_ISR1H		(GPIO_BASE+0x34)
-#define GPIO0_ISR2L		(GPIO_BASE+0x38)
-#define GPIO0_ISR2H		(GPIO_BASE+0x3C)
-#define GPIO0_ISR3L		(GPIO_BASE+0x40)
-#define GPIO0_ISR3H		(GPIO_BASE+0x44)
+#define GPIO0_OR        (GPIO_BASE+0x0)
+#define GPIO0_TCR       (GPIO_BASE+0x4)
+#define GPIO0_OSRL      (GPIO_BASE+0x8)
+#define GPIO0_OSRH      (GPIO_BASE+0xC)
+#define GPIO0_TSRL      (GPIO_BASE+0x10)
+#define GPIO0_TSRH      (GPIO_BASE+0x14)
+#define GPIO0_ODR       (GPIO_BASE+0x18)
+#define GPIO0_IR        (GPIO_BASE+0x1C)
+#define GPIO0_RR1       (GPIO_BASE+0x20)
+#define GPIO0_RR2       (GPIO_BASE+0x24)
+#define GPIO0_RR3       (GPIO_BASE+0x28)
+#define GPIO0_ISR1L     (GPIO_BASE+0x30)
+#define GPIO0_ISR1H     (GPIO_BASE+0x34)
+#define GPIO0_ISR2L     (GPIO_BASE+0x38)
+#define GPIO0_ISR2H     (GPIO_BASE+0x3C)
+#define GPIO0_ISR3L     (GPIO_BASE+0x40)
+#define GPIO0_ISR3H     (GPIO_BASE+0x44)
 
 #define GPIO1_BASE  0xEF600800
-#define GPIO1_OR		(GPIO1_BASE+0x0)
-#define GPIO1_TCR		(GPIO1_BASE+0x4)
-#define GPIO1_OSRL		(GPIO1_BASE+0x8)
-#define GPIO1_OSRH		(GPIO1_BASE+0xC)
-#define GPIO1_TSRL		(GPIO1_BASE+0x10)
-#define GPIO1_TSRH		(GPIO1_BASE+0x14)
-#define GPIO1_ODR		(GPIO1_BASE+0x18)
-#define GPIO1_IR		(GPIO1_BASE+0x1C)
-#define GPIO1_RR1		(GPIO1_BASE+0x20)
-#define GPIO1_RR2		(GPIO1_BASE+0x24)
-#define GPIO1_RR3		(GPIO1_BASE+0x28)
-#define GPIO1_ISR1L		(GPIO1_BASE+0x30)
-#define GPIO1_ISR1H		(GPIO1_BASE+0x34)
-#define GPIO1_ISR2L		(GPIO1_BASE+0x38)
-#define GPIO1_ISR2H		(GPIO1_BASE+0x3C)
-#define GPIO1_ISR3L		(GPIO1_BASE+0x40)
-#define GPIO1_ISR3H		(GPIO1_BASE+0x44)
+#define GPIO1_OR        (GPIO1_BASE+0x0)
+#define GPIO1_TCR       (GPIO1_BASE+0x4)
+#define GPIO1_OSRL      (GPIO1_BASE+0x8)
+#define GPIO1_OSRH      (GPIO1_BASE+0xC)
+#define GPIO1_TSRL      (GPIO1_BASE+0x10)
+#define GPIO1_TSRH      (GPIO1_BASE+0x14)
+#define GPIO1_ODR       (GPIO1_BASE+0x18)
+#define GPIO1_IR        (GPIO1_BASE+0x1C)
+#define GPIO1_RR1       (GPIO1_BASE+0x20)
+#define GPIO1_RR2       (GPIO1_BASE+0x24)
+#define GPIO1_RR3       (GPIO1_BASE+0x28)
+#define GPIO1_ISR1L     (GPIO1_BASE+0x30)
+#define GPIO1_ISR1H     (GPIO1_BASE+0x34)
+#define GPIO1_ISR2L     (GPIO1_BASE+0x38)
+#define GPIO1_ISR2H     (GPIO1_BASE+0x3C)
+#define GPIO1_ISR3L     (GPIO1_BASE+0x40)
+#define GPIO1_ISR3H     (GPIO1_BASE+0x44)
 
 #elif defined(CONFIG_405EX)
 #define GPIO_BASE  0xEF600800
-#define GPIO0_OR	       (GPIO_BASE+0x0)
-#define GPIO0_TCR	       (GPIO_BASE+0x4)
-#define GPIO0_OSRL	       (GPIO_BASE+0x8)
-#define GPIO0_OSRH	       (GPIO_BASE+0xC)
-#define GPIO0_TSRL	       (GPIO_BASE+0x10)
-#define GPIO0_TSRH	       (GPIO_BASE+0x14)
-#define GPIO0_ODR	       (GPIO_BASE+0x18)
-#define GPIO0_IR	       (GPIO_BASE+0x1C)
-#define GPIO0_RR1	       (GPIO_BASE+0x20)
-#define GPIO0_RR2	       (GPIO_BASE+0x24)
-#define GPIO0_ISR1L	       (GPIO_BASE+0x30)
-#define GPIO0_ISR1H	       (GPIO_BASE+0x34)
-#define GPIO0_ISR2L	       (GPIO_BASE+0x38)
-#define GPIO0_ISR2H	       (GPIO_BASE+0x3C)
-#define GPIO0_ISR3L	       (GPIO_BASE+0x40)
-#define GPIO0_ISR3H	       (GPIO_BASE+0x44)
+#define GPIO0_OR           (GPIO_BASE+0x0)
+#define GPIO0_TCR          (GPIO_BASE+0x4)
+#define GPIO0_OSRL         (GPIO_BASE+0x8)
+#define GPIO0_OSRH         (GPIO_BASE+0xC)
+#define GPIO0_TSRL         (GPIO_BASE+0x10)
+#define GPIO0_TSRH         (GPIO_BASE+0x14)
+#define GPIO0_ODR          (GPIO_BASE+0x18)
+#define GPIO0_IR           (GPIO_BASE+0x1C)
+#define GPIO0_RR1          (GPIO_BASE+0x20)
+#define GPIO0_RR2          (GPIO_BASE+0x24)
+#define GPIO0_ISR1L        (GPIO_BASE+0x30)
+#define GPIO0_ISR1H        (GPIO_BASE+0x34)
+#define GPIO0_ISR2L        (GPIO_BASE+0x38)
+#define GPIO0_ISR2H        (GPIO_BASE+0x3C)
+#define GPIO0_ISR3L        (GPIO_BASE+0x40)
+#define GPIO0_ISR3H        (GPIO_BASE+0x44)
 
-#else	/* !405EZ */
+#else   /* !405EZ */
 
 #define GPIO_BASE  0xEF600700
-#define GPIO0_OR	       (GPIO_BASE+0x0)
-#define GPIO0_TCR	       (GPIO_BASE+0x4)
-#define GPIO0_OSRH	       (GPIO_BASE+0x8)
-#define GPIO0_OSRL	       (GPIO_BASE+0xC)
-#define GPIO0_TSRH	       (GPIO_BASE+0x10)
-#define GPIO0_TSRL	       (GPIO_BASE+0x14)
-#define GPIO0_ODR	       (GPIO_BASE+0x18)
-#define GPIO0_IR	       (GPIO_BASE+0x1C)
-#define GPIO0_RR1	       (GPIO_BASE+0x20)
-#define GPIO0_RR2	       (GPIO_BASE+0x24)
-#define GPIO0_ISR1H	       (GPIO_BASE+0x30)
-#define GPIO0_ISR1L	       (GPIO_BASE+0x34)
-#define GPIO0_ISR2H	       (GPIO_BASE+0x38)
-#define GPIO0_ISR2L	       (GPIO_BASE+0x3C)
+#define GPIO0_OR           (GPIO_BASE+0x0)
+#define GPIO0_TCR          (GPIO_BASE+0x4)
+#define GPIO0_OSRH         (GPIO_BASE+0x8)
+#define GPIO0_OSRL         (GPIO_BASE+0xC)
+#define GPIO0_TSRH         (GPIO_BASE+0x10)
+#define GPIO0_TSRL         (GPIO_BASE+0x14)
+#define GPIO0_ODR          (GPIO_BASE+0x18)
+#define GPIO0_IR           (GPIO_BASE+0x1C)
+#define GPIO0_RR1          (GPIO_BASE+0x20)
+#define GPIO0_RR2          (GPIO_BASE+0x24)
+#define GPIO0_ISR1H        (GPIO_BASE+0x30)
+#define GPIO0_ISR1L        (GPIO_BASE+0x34)
+#define GPIO0_ISR2H        (GPIO_BASE+0x38)
+#define GPIO0_ISR2L        (GPIO_BASE+0x3C)
 
 #endif /* CONFIG_405EZ */
 
-#define GPIO0_BASE		GPIO_BASE
+#define GPIO0_BASE      GPIO_BASE
 
 #if defined(CONFIG_405EX)
-#define SDR0_SRST		0x0200
+#define SDR0_SRST       0x0200
 
 /*
  * Software Reset Register
  */
-#define SDR0_SRST_BGO		PPC_REG_VAL(0, 1)
-#define SDR0_SRST_PLB4		PPC_REG_VAL(1, 1)
-#define SDR0_SRST_EBC		PPC_REG_VAL(2, 1)
-#define SDR0_SRST_OPB		PPC_REG_VAL(3, 1)
-#define SDR0_SRST_UART0		PPC_REG_VAL(4, 1)
-#define SDR0_SRST_UART1		PPC_REG_VAL(5, 1)
-#define SDR0_SRST_IIC0		PPC_REG_VAL(6, 1)
-#define SDR0_SRST_BGI		PPC_REG_VAL(7, 1)
-#define SDR0_SRST_GPIO		PPC_REG_VAL(8, 1)
-#define SDR0_SRST_GPT		PPC_REG_VAL(9, 1)
-#define SDR0_SRST_DMC		PPC_REG_VAL(10, 1)
-#define SDR0_SRST_RGMII		PPC_REG_VAL(11, 1)
-#define SDR0_SRST_EMAC0		PPC_REG_VAL(12, 1)
-#define SDR0_SRST_EMAC1		PPC_REG_VAL(13, 1)
-#define SDR0_SRST_CPM		PPC_REG_VAL(14, 1)
-#define SDR0_SRST_EPLL		PPC_REG_VAL(15, 1)
-#define SDR0_SRST_UIC		PPC_REG_VAL(16, 1)
-#define SDR0_SRST_UPRST		PPC_REG_VAL(17, 1)
-#define SDR0_SRST_IIC1		PPC_REG_VAL(18, 1)
-#define SDR0_SRST_SCP		PPC_REG_VAL(19, 1)
-#define SDR0_SRST_UHRST		PPC_REG_VAL(20, 1)
-#define SDR0_SRST_DMA		PPC_REG_VAL(21, 1)
-#define SDR0_SRST_DMAC		PPC_REG_VAL(22, 1)
-#define SDR0_SRST_MAL		PPC_REG_VAL(23, 1)
-#define SDR0_SRST_EBM		PPC_REG_VAL(24, 1)
-#define SDR0_SRST_GPTR		PPC_REG_VAL(25, 1)
-#define SDR0_SRST_PE0		PPC_REG_VAL(26, 1)
-#define SDR0_SRST_PE1		PPC_REG_VAL(27, 1)
-#define SDR0_SRST_CRYP		PPC_REG_VAL(28, 1)
-#define SDR0_SRST_PKP		PPC_REG_VAL(29, 1)
-#define SDR0_SRST_AHB		PPC_REG_VAL(30, 1)
-#define SDR0_SRST_NDFC		PPC_REG_VAL(31, 1)
+#define SDR0_SRST_BGO       PPC_REG_VAL(0, 1)
+#define SDR0_SRST_PLB4      PPC_REG_VAL(1, 1)
+#define SDR0_SRST_EBC       PPC_REG_VAL(2, 1)
+#define SDR0_SRST_OPB       PPC_REG_VAL(3, 1)
+#define SDR0_SRST_UART0     PPC_REG_VAL(4, 1)
+#define SDR0_SRST_UART1     PPC_REG_VAL(5, 1)
+#define SDR0_SRST_IIC0      PPC_REG_VAL(6, 1)
+#define SDR0_SRST_BGI       PPC_REG_VAL(7, 1)
+#define SDR0_SRST_GPIO      PPC_REG_VAL(8, 1)
+#define SDR0_SRST_GPT       PPC_REG_VAL(9, 1)
+#define SDR0_SRST_DMC       PPC_REG_VAL(10, 1)
+#define SDR0_SRST_RGMII     PPC_REG_VAL(11, 1)
+#define SDR0_SRST_EMAC0     PPC_REG_VAL(12, 1)
+#define SDR0_SRST_EMAC1     PPC_REG_VAL(13, 1)
+#define SDR0_SRST_CPM       PPC_REG_VAL(14, 1)
+#define SDR0_SRST_EPLL      PPC_REG_VAL(15, 1)
+#define SDR0_SRST_UIC       PPC_REG_VAL(16, 1)
+#define SDR0_SRST_UPRST     PPC_REG_VAL(17, 1)
+#define SDR0_SRST_IIC1      PPC_REG_VAL(18, 1)
+#define SDR0_SRST_SCP       PPC_REG_VAL(19, 1)
+#define SDR0_SRST_UHRST     PPC_REG_VAL(20, 1)
+#define SDR0_SRST_DMA       PPC_REG_VAL(21, 1)
+#define SDR0_SRST_DMAC      PPC_REG_VAL(22, 1)
+#define SDR0_SRST_MAL       PPC_REG_VAL(23, 1)
+#define SDR0_SRST_EBM       PPC_REG_VAL(24, 1)
+#define SDR0_SRST_GPTR      PPC_REG_VAL(25, 1)
+#define SDR0_SRST_PE0       PPC_REG_VAL(26, 1)
+#define SDR0_SRST_PE1       PPC_REG_VAL(27, 1)
+#define SDR0_SRST_CRYP      PPC_REG_VAL(28, 1)
+#define SDR0_SRST_PKP       PPC_REG_VAL(29, 1)
+#define SDR0_SRST_AHB       PPC_REG_VAL(30, 1)
+#define SDR0_SRST_NDFC      PPC_REG_VAL(31, 1)
 
-#define sdr_uart0	0x0120	/* UART0 Config */
-#define sdr_uart1	0x0121	/* UART1 Config */
-#define sdr_mfr		0x4300	/* SDR0_MFR reg */
+#define sdr_uart0   0x0120  /* UART0 Config */
+#define sdr_uart1   0x0121  /* UART1 Config */
+#define sdr_mfr     0x4300  /* SDR0_MFR reg */
 
 /* Defines for CPC0_EPRCSR register */
-#define CPC0_EPRCSR_E0NFE	   0x80000000
-#define CPC0_EPRCSR_E1NFE	   0x40000000
-#define CPC0_EPRCSR_E1RPP	   0x00000080
-#define CPC0_EPRCSR_E0RPP	   0x00000040
-#define CPC0_EPRCSR_E1ERP	   0x00000020
-#define CPC0_EPRCSR_E0ERP	   0x00000010
-#define CPC0_EPRCSR_E1PCI	   0x00000002
-#define CPC0_EPRCSR_E0PCI	   0x00000001
+#define CPC0_EPRCSR_E0NFE      0x80000000
+#define CPC0_EPRCSR_E1NFE      0x40000000
+#define CPC0_EPRCSR_E1RPP      0x00000080
+#define CPC0_EPRCSR_E0RPP      0x00000040
+#define CPC0_EPRCSR_E1ERP      0x00000020
+#define CPC0_EPRCSR_E0ERP      0x00000010
+#define CPC0_EPRCSR_E1PCI      0x00000002
+#define CPC0_EPRCSR_E0PCI      0x00000001
 
-#define cpr0_clkupd	0x020
-#define cpr0_pllc	0x040
-#define cpr0_plld	0x060
-#define cpr0_cpud	0x080
-#define cpr0_plbd	0x0a0
-#define cpr0_opbd	0x0c0
-#define cpr0_perd	0x0e0
-#define cpr0_ahbd	0x100
-#define cpr0_icfg	0x140
+#define cpr0_clkupd 0x020
+#define cpr0_pllc   0x040
+#define cpr0_plld   0x060
+#define cpr0_cpud   0x080
+#define cpr0_plbd   0x0a0
+#define cpr0_opbd   0x0c0
+#define cpr0_perd   0x0e0
+#define cpr0_ahbd   0x100
+#define cpr0_icfg   0x140
 
-#define SDR_PINSTP	0x0040
-#define sdr_sdcs	0x0060
+#define SDR_PINSTP  0x0040
+#define sdr_sdcs    0x0060
 
-#define SDR0_SDCS_SDD			(0x80000000 >> 31)
+#define SDR0_SDCS_SDD           (0x80000000 >> 31)
 
 /* CUST0 Customer Configuration Register0 */
-#define SDR0_CUST0		     0x4000
+#define SDR0_CUST0           0x4000
 #define   SDR0_CUST0_MUX_E_N_G_MASK   0xC0000000     /* Mux_Emac_NDFC_GPIO */
 #define   SDR0_CUST0_MUX_EMAC_SEL     0x40000000       /* Emac Selection */
 #define   SDR0_CUST0_MUX_NDFC_SEL     0x80000000       /* NDFC Selection */
@@ -924,9 +924,9 @@
 #define   SDR0_CUST0_NDFC_ARE_ENABLE  0x00200000       /* NDFC Auto Read Enable */
 #define   SDR0_CUST0_NDFC_ARE_DISABLE 0x00000000       /* NDFC Auto Read Disable */
 
-#define   SDR0_CUST0_NRB_MASK	      0x00100000     /* NDFC Ready / Busy */
-#define   SDR0_CUST0_NRB_BUSY	      0x00100000       /* Busy */
-#define   SDR0_CUST0_NRB_READY	      0x00000000       /* Ready */
+#define   SDR0_CUST0_NRB_MASK         0x00100000     /* NDFC Ready / Busy */
+#define   SDR0_CUST0_NRB_BUSY         0x00100000       /* Busy */
+#define   SDR0_CUST0_NRB_READY        0x00000000       /* Ready */
 
 #define   SDR0_CUST0_NDRSC_MASK       0x0000FFF0     /* NDFC Device Reset Count Mask */
 #define   SDR0_CUST0_NDRSC_ENCODE(n) ((((unsigned long)(n))&0xFFF)<<4)
@@ -940,41 +940,41 @@
 #define   SDR0_CUST0_CHIPSELGAT_EN2   0x00000002       /* Chip Select2 Gating Enable */
 #define   SDR0_CUST0_CHIPSELGAT_EN3   0x00000001       /* Chip Select3 Gating Enable */
 
-#define SDR0_PFC0		0x4100
-#define SDR0_PFC1		0x4101
-#define SDR0_PFC1_U1ME		0x02000000
-#define SDR0_PFC1_U0ME		0x00080000
-#define SDR0_PFC1_U0IM		0x00040000
-#define SDR0_PFC1_SIS		0x00020000
-#define SDR0_PFC1_DMAAEN	0x00010000
-#define SDR0_PFC1_DMADEN	0x00008000
-#define SDR0_PFC1_USBEN		0x00004000
-#define SDR0_PFC1_AHBSWAP	0x00000020
-#define SDR0_PFC1_USBBIGEN	0x00000010
-#define SDR0_PFC1_GPT_FREQ	0x0000000f
+#define SDR0_PFC0       0x4100
+#define SDR0_PFC1       0x4101
+#define SDR0_PFC1_U1ME      0x02000000
+#define SDR0_PFC1_U0ME      0x00080000
+#define SDR0_PFC1_U0IM      0x00040000
+#define SDR0_PFC1_SIS       0x00020000
+#define SDR0_PFC1_DMAAEN    0x00010000
+#define SDR0_PFC1_DMADEN    0x00008000
+#define SDR0_PFC1_USBEN     0x00004000
+#define SDR0_PFC1_AHBSWAP   0x00000020
+#define SDR0_PFC1_USBBIGEN  0x00000010
+#define SDR0_PFC1_GPT_FREQ  0x0000000f
 #endif
 
 /* General Purpose Timer (GPT) Register Offsets */
-#define GPT0_TBC		0x00000000
-#define GPT0_IM			0x00000018
-#define GPT0_ISS		0x0000001C
-#define GPT0_ISC		0x00000020
-#define GPT0_IE			0x00000024
-#define GPT0_COMP0		0x00000080
-#define GPT0_COMP1		0x00000084
-#define GPT0_COMP2		0x00000088
-#define GPT0_COMP3		0x0000008C
-#define GPT0_COMP4		0x00000090
-#define GPT0_COMP5		0x00000094
-#define GPT0_COMP6		0x00000098
-#define GPT0_MASK0		0x000000C0
-#define GPT0_MASK1		0x000000C4
-#define GPT0_MASK2		0x000000C8
-#define GPT0_MASK3		0x000000CC
-#define GPT0_MASK4		0x000000D0
-#define GPT0_MASK5		0x000000D4
-#define GPT0_MASK6		0x000000D8
-#define GPT0_DCT0		0x00000110
-#define GPT0_DCIS		0x0000011C
+#define GPT0_TBC        0x00000000
+#define GPT0_IM         0x00000018
+#define GPT0_ISS        0x0000001C
+#define GPT0_ISC        0x00000020
+#define GPT0_IE         0x00000024
+#define GPT0_COMP0      0x00000080
+#define GPT0_COMP1      0x00000084
+#define GPT0_COMP2      0x00000088
+#define GPT0_COMP3      0x0000008C
+#define GPT0_COMP4      0x00000090
+#define GPT0_COMP5      0x00000094
+#define GPT0_COMP6      0x00000098
+#define GPT0_MASK0      0x000000C0
+#define GPT0_MASK1      0x000000C4
+#define GPT0_MASK2      0x000000C8
+#define GPT0_MASK3      0x000000CC
+#define GPT0_MASK4      0x000000D0
+#define GPT0_MASK5      0x000000D4
+#define GPT0_MASK6      0x000000D8
+#define GPT0_DCT0       0x00000110
+#define GPT0_DCIS       0x0000011C
 
-#endif	/* __PPC405_H__ */
+#endif  /* __PPC405_H__ */
diff --git a/libcpu/ppc/ppc405/include/asm/ppc4xx-uic.h b/libcpu/ppc/ppc405/include/asm/ppc4xx-uic.h
index cdb542c2da..83b55e5e64 100644
--- a/libcpu/ppc/ppc405/include/asm/ppc4xx-uic.h
+++ b/libcpu/ppc/ppc405/include/asm/ppc4xx-uic.h
@@ -4,8 +4,8 @@
 /*
  * Define the number of UIC's
  */
-#define UIC_MAX		1
-#define IRQ_MAX		UIC_MAX * 32
+#define UIC_MAX     1
+#define IRQ_MAX     UIC_MAX * 32
 
 /* UIC0 dcr base address */
 #define UIC0_DCR_BASE 0xc0
@@ -13,49 +13,49 @@
 /*
  * UIC register
  */
-#define UIC_SR	0x0			/* UIC status			*/
-#define UIC_ER	0x2			/* UIC enable			*/
-#define UIC_CR	0x3			/* UIC critical			*/
-#define UIC_PR	0x4			/* UIC polarity			*/
-#define UIC_TR	0x5			/* UIC triggering		*/
-#define UIC_MSR 0x6			/* UIC masked status		*/
-#define UIC_VR	0x7			/* UIC vector			*/
-#define UIC_VCR 0x8			/* UIC vector configuration	*/
+#define UIC_SR  0x0         /* UIC status           */
+#define UIC_ER  0x2         /* UIC enable           */
+#define UIC_CR  0x3         /* UIC critical         */
+#define UIC_PR  0x4         /* UIC polarity         */
+#define UIC_TR  0x5         /* UIC triggering       */
+#define UIC_MSR 0x6         /* UIC masked status        */
+#define UIC_VR  0x7         /* UIC vector           */
+#define UIC_VCR 0x8         /* UIC vector configuration */
 
-#define uic0sr	(UIC0_DCR_BASE+0x0)	/* UIC0 status			*/
-#define uic0er	(UIC0_DCR_BASE+0x2)	/* UIC0 enable			*/
-#define uic0cr	(UIC0_DCR_BASE+0x3)	/* UIC0 critical		*/
-#define uic0pr	(UIC0_DCR_BASE+0x4)	/* UIC0 polarity		*/
-#define uic0tr	(UIC0_DCR_BASE+0x5)	/* UIC0 triggering		*/
-#define uic0msr (UIC0_DCR_BASE+0x6)	/* UIC0 masked status		*/
-#define uic0vr	(UIC0_DCR_BASE+0x7)	/* UIC0 vector			*/
-#define uic0vcr (UIC0_DCR_BASE+0x8)	/* UIC0 vector configuration	*/
+#define uic0sr  (UIC0_DCR_BASE+0x0) /* UIC0 status          */
+#define uic0er  (UIC0_DCR_BASE+0x2) /* UIC0 enable          */
+#define uic0cr  (UIC0_DCR_BASE+0x3) /* UIC0 critical        */
+#define uic0pr  (UIC0_DCR_BASE+0x4) /* UIC0 polarity        */
+#define uic0tr  (UIC0_DCR_BASE+0x5) /* UIC0 triggering      */
+#define uic0msr (UIC0_DCR_BASE+0x6) /* UIC0 masked status       */
+#define uic0vr  (UIC0_DCR_BASE+0x7) /* UIC0 vector          */
+#define uic0vcr (UIC0_DCR_BASE+0x8) /* UIC0 vector configuration    */
 
 /* The following is for compatibility with 405 code */
-#define uicsr	uic0sr
-#define uicer	uic0er
-#define uiccr	uic0cr
-#define uicpr	uic0pr
-#define uictr	uic0tr
-#define uicmsr	uic0msr
-#define uicvr	uic0vr
-#define uicvcr	uic0vcr
+#define uicsr   uic0sr
+#define uicer   uic0er
+#define uiccr   uic0cr
+#define uicpr   uic0pr
+#define uictr   uic0tr
+#define uicmsr  uic0msr
+#define uicvr   uic0vr
+#define uicvcr  uic0vcr
 
 /* the interrupt vector definitions */
-#define VECNUM_MAL_SERR		10
-#define VECNUM_MAL_TXEOB	11
-#define VECNUM_MAL_RXEOB	12
-#define VECNUM_MAL_TXDE		13
-#define VECNUM_MAL_RXDE		14
-#define VECNUM_ETH0			15
-#define VECNUM_ETH1_OFFS	2
-#define VECNUM_EIRQ6		29
+#define VECNUM_MAL_SERR     10
+#define VECNUM_MAL_TXEOB    11
+#define VECNUM_MAL_RXEOB    12
+#define VECNUM_MAL_TXDE     13
+#define VECNUM_MAL_RXDE     14
+#define VECNUM_ETH0         15
+#define VECNUM_ETH1_OFFS    2
+#define VECNUM_EIRQ6        29
 
 /*
  * Mask definitions (used for example in 4xx_enet.c)
  */
-#define UIC_MASK(vec)		(0x80000000 >> ((vec) & 0x1f))
+#define UIC_MASK(vec)       (0x80000000 >> ((vec) & 0x1f))
 /* UIC_NR won't work for 440GX because of its specific UIC DCR addresses */
-#define UIC_NR(vec)			((vec) >> 5)
+#define UIC_NR(vec)         ((vec) >> 5)
 
 #endif /* _PPC4xx_UIC_H_ */
diff --git a/libcpu/ppc/ppc405/include/asm/ppc4xx.h b/libcpu/ppc/ppc405/include/asm/ppc4xx.h
index 57fe7ab221..2bfef123d6 100644
--- a/libcpu/ppc/ppc405/include/asm/ppc4xx.h
+++ b/libcpu/ppc/ppc405/include/asm/ppc4xx.h
@@ -19,13 +19,13 @@
 |       LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M
 +----------------------------------------------------------------------------*/
 
-#ifndef	__PPC4XX_H__
+#ifndef __PPC4XX_H__
 #define __PPC4XX_H__
 
 /*
  * Configure which SDRAM/DDR/DDR2 controller is equipped
  */
-#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM	/* IBM SDRAM controller */
+#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM   /* IBM SDRAM controller */
 
 #include 
 #include 
@@ -33,102 +33,102 @@
 /*
  * Macro for generating register field mnemonics
  */
-#define	PPC_REG_BITS		32
-#define	PPC_REG_VAL(bit, value)	((value) << ((PPC_REG_BITS - 1) - (bit)))
+#define PPC_REG_BITS        32
+#define PPC_REG_VAL(bit, value) ((value) << ((PPC_REG_BITS - 1) - (bit)))
 
 /*
  * Elide casts when assembling register mnemonics
  */
 #ifndef __ASSEMBLY__
-#define	static_cast(type, val)	(type)(val)
+#define static_cast(type, val)  (type)(val)
 #else
-#define	static_cast(type, val)	(val)
+#define static_cast(type, val)  (val)
 #endif
 
 /*
  * Common stuff for 4xx (405 and 440)
  */
 
-#define EXC_OFF_SYS_RESET	0x0100	/* System reset				*/
-#define _START_OFFSET		(EXC_OFF_SYS_RESET + 0x2000)
+#define EXC_OFF_SYS_RESET   0x0100  /* System reset             */
+#define _START_OFFSET       (EXC_OFF_SYS_RESET + 0x2000)
 
-#define RESET_VECTOR	0xfffffffc
-#define CACHELINE_MASK	(CONFIG_SYS_CACHELINE_SIZE - 1) /* Address mask for cache
-						     line aligned data. */
+#define RESET_VECTOR    0xfffffffc
+#define CACHELINE_MASK  (CONFIG_SYS_CACHELINE_SIZE - 1) /* Address mask for cache
+                             line aligned data. */
 
-#define CPR0_DCR_BASE	0x0C
-#define cprcfga		(CPR0_DCR_BASE+0x0)
-#define cprcfgd		(CPR0_DCR_BASE+0x1)
+#define CPR0_DCR_BASE   0x0C
+#define cprcfga     (CPR0_DCR_BASE+0x0)
+#define cprcfgd     (CPR0_DCR_BASE+0x1)
 
-#define SDR_DCR_BASE	0x0E
-#define sdrcfga		(SDR_DCR_BASE+0x0)
-#define sdrcfgd		(SDR_DCR_BASE+0x1)
+#define SDR_DCR_BASE    0x0E
+#define sdrcfga     (SDR_DCR_BASE+0x0)
+#define sdrcfgd     (SDR_DCR_BASE+0x1)
 
-#define SDRAM_DCR_BASE	0x10
-#define memcfga		(SDRAM_DCR_BASE+0x0)
-#define memcfgd		(SDRAM_DCR_BASE+0x1)
+#define SDRAM_DCR_BASE  0x10
+#define memcfga     (SDRAM_DCR_BASE+0x0)
+#define memcfgd     (SDRAM_DCR_BASE+0x1)
 
-#define EBC_DCR_BASE	0x12
-#define ebccfga		(EBC_DCR_BASE+0x0)
-#define ebccfgd		(EBC_DCR_BASE+0x1)
+#define EBC_DCR_BASE    0x12
+#define ebccfga     (EBC_DCR_BASE+0x0)
+#define ebccfgd     (EBC_DCR_BASE+0x1)
 
 /*
  * Macros for indirect DCR access
  */
-#define mtcpr(reg, d)	do { mtdcr(cprcfga,reg);mtdcr(cprcfgd,d); } while (0)
-#define mfcpr(reg, d)	do { mtdcr(cprcfga,reg);d = mfdcr(cprcfgd); } while (0)
+#define mtcpr(reg, d)   do { mtdcr(cprcfga,reg);mtdcr(cprcfgd,d); } while (0)
+#define mfcpr(reg, d)   do { mtdcr(cprcfga,reg);d = mfdcr(cprcfgd); } while (0)
 
-#define mtebc(reg, d)	do { mtdcr(ebccfga,reg);mtdcr(ebccfgd,d); } while (0)
-#define mfebc(reg, d)	do { mtdcr(ebccfga,reg);d = mfdcr(ebccfgd); } while (0)
+#define mtebc(reg, d)   do { mtdcr(ebccfga,reg);mtdcr(ebccfgd,d); } while (0)
+#define mfebc(reg, d)   do { mtdcr(ebccfga,reg);d = mfdcr(ebccfgd); } while (0)
 
-#define mtsdram(reg, d)	do { mtdcr(memcfga,reg);mtdcr(memcfgd,d); } while (0)
-#define mfsdram(reg, d)	do { mtdcr(memcfga,reg);d = mfdcr(memcfgd); } while (0)
+#define mtsdram(reg, d) do { mtdcr(memcfga,reg);mtdcr(memcfgd,d); } while (0)
+#define mfsdram(reg, d) do { mtdcr(memcfga,reg);d = mfdcr(memcfgd); } while (0)
 
-#define mtsdr(reg, d)	do { mtdcr(sdrcfga,reg);mtdcr(sdrcfgd,d); } while (0)
-#define mfsdr(reg, d)	do { mtdcr(sdrcfga,reg);d = mfdcr(sdrcfgd); } while (0)
+#define mtsdr(reg, d)   do { mtdcr(sdrcfga,reg);mtdcr(sdrcfgd,d); } while (0)
+#define mfsdr(reg, d)   do { mtdcr(sdrcfga,reg);d = mfdcr(sdrcfgd); } while (0)
 
 #ifndef __ASSEMBLY__
 
 typedef struct
 {
-	unsigned long freqDDR;
-	unsigned long freqEBC;
-	unsigned long freqOPB;
-	unsigned long freqPCI;
-	unsigned long freqPLB;
-	unsigned long freqTmrClk;
-	unsigned long freqUART;
-	unsigned long freqProcessor;
-	unsigned long freqVCOHz;
-	unsigned long freqVCOMhz;	/* in MHz                          */
-	unsigned long pciClkSync;	/* PCI clock is synchronous        */
-	unsigned long pciIntArbEn;	/* Internal PCI arbiter is enabled */
-	unsigned long pllExtBusDiv;
-	unsigned long pllFbkDiv;
-	unsigned long pllFwdDiv;
-	unsigned long pllFwdDivA;
-	unsigned long pllFwdDivB;
-	unsigned long pllOpbDiv;
-	unsigned long pllPciDiv;
-	unsigned long pllPlbDiv;
+    unsigned long freqDDR;
+    unsigned long freqEBC;
+    unsigned long freqOPB;
+    unsigned long freqPCI;
+    unsigned long freqPLB;
+    unsigned long freqTmrClk;
+    unsigned long freqUART;
+    unsigned long freqProcessor;
+    unsigned long freqVCOHz;
+    unsigned long freqVCOMhz;   /* in MHz                          */
+    unsigned long pciClkSync;   /* PCI clock is synchronous        */
+    unsigned long pciIntArbEn;  /* Internal PCI arbiter is enabled */
+    unsigned long pllExtBusDiv;
+    unsigned long pllFbkDiv;
+    unsigned long pllFwdDiv;
+    unsigned long pllFwdDivA;
+    unsigned long pllFwdDivB;
+    unsigned long pllOpbDiv;
+    unsigned long pllPciDiv;
+    unsigned long pllPlbDiv;
 } PPC4xx_SYS_INFO;
 
 static inline rt_uint32_t get_mcsr(void)
 {
-	rt_uint32_t val;
+    rt_uint32_t val;
 
-	asm volatile("mfspr %0, 0x23c" : "=r" (val) :);
-	return val;
+    asm volatile("mfspr %0, 0x23c" : "=r" (val) :);
+    return val;
 }
 
 static inline void set_mcsr(rt_uint32_t val)
 {
-	asm volatile("mtspr 0x23c, %0" : "=r" (val) :);
+    asm volatile("mtspr 0x23c, %0" : "=r" (val) :);
 }
 
-#endif	/* __ASSEMBLY__ */
+#endif  /* __ASSEMBLY__ */
 
 /* for multi-cpu support */
-#define NA_OR_UNKNOWN_CPU	-1
+#define NA_OR_UNKNOWN_CPU   -1
 
-#endif	/* __PPC4XX_H__ */
+#endif  /* __PPC4XX_H__ */
diff --git a/libcpu/ppc/ppc405/include/asm/ppc_defs.h b/libcpu/ppc/ppc405/include/asm/ppc_defs.h
index 88aed26009..0b6d06deae 100644
--- a/libcpu/ppc/ppc405/include/asm/ppc_defs.h
+++ b/libcpu/ppc/ppc405/include/asm/ppc_defs.h
@@ -24,50 +24,50 @@
 /*
  * WARNING! This file is automatically generated - DO NOT EDIT!
  */
-#define	STACK_FRAME_OVERHEAD	16
-#define	INT_FRAME_SIZE	192
-#define	GPR0	16
-#define	GPR1	20
-#define	GPR2	24
-#define	GPR3	28
-#define	GPR4	32
-#define	GPR5	36
-#define	GPR6	40
-#define	GPR7	44
-#define	GPR8	48
-#define	GPR9	52
-#define	GPR10	56
-#define	GPR11	60
-#define	GPR12	64
-#define	GPR13	68
-#define	GPR14	72
-#define	GPR15	76
-#define	GPR16	80
-#define	GPR17	84
-#define	GPR18	88
-#define	GPR19	92
-#define	GPR20	96
-#define	GPR21	100
-#define	GPR22	104
-#define	GPR23	108
-#define	GPR24	112
-#define	GPR25	116
-#define	GPR26	120
-#define	GPR27	124
-#define	GPR28	128
-#define	GPR29	132
-#define	GPR30	136
-#define	GPR31	140
-#define	_NIP	144
-#define	_MSR	148
-#define	ORIG_GPR3	152
-#define	_CTR	156
-#define	_LINK	160
-#define	_XER	164
-#define	_CCR	168
-#define	_MQ	    172
-#define	TRAP	176
-#define	_DAR	180
-#define	_DSISR	184
-#define	RESULT	188
+#define STACK_FRAME_OVERHEAD    16
+#define INT_FRAME_SIZE  192
+#define GPR0    16
+#define GPR1    20
+#define GPR2    24
+#define GPR3    28
+#define GPR4    32
+#define GPR5    36
+#define GPR6    40
+#define GPR7    44
+#define GPR8    48
+#define GPR9    52
+#define GPR10   56
+#define GPR11   60
+#define GPR12   64
+#define GPR13   68
+#define GPR14   72
+#define GPR15   76
+#define GPR16   80
+#define GPR17   84
+#define GPR18   88
+#define GPR19   92
+#define GPR20   96
+#define GPR21   100
+#define GPR22   104
+#define GPR23   108
+#define GPR24   112
+#define GPR25   116
+#define GPR26   120
+#define GPR27   124
+#define GPR28   128
+#define GPR29   132
+#define GPR30   136
+#define GPR31   140
+#define _NIP    144
+#define _MSR    148
+#define ORIG_GPR3   152
+#define _CTR    156
+#define _LINK   160
+#define _XER    164
+#define _CCR    168
+#define _MQ     172
+#define TRAP    176
+#define _DAR    180
+#define _DSISR  184
+#define RESULT  188
 
diff --git a/libcpu/ppc/ppc405/include/asm/processor.h b/libcpu/ppc/ppc405/include/asm/processor.h
index 7aeeb01dc5..827de2186b 100644
--- a/libcpu/ppc/ppc405/include/asm/processor.h
+++ b/libcpu/ppc/ppc405/include/asm/processor.h
@@ -15,80 +15,80 @@
 /* Machine State Register (MSR) Fields */
 
 #ifdef CONFIG_PPC64BRIDGE
-#define MSR_SF		(1<<63)
-#define MSR_ISF		(1<<61)
+#define MSR_SF      (1<<63)
+#define MSR_ISF     (1<<61)
 #endif /* CONFIG_PPC64BRIDGE */
-#define MSR_UCLE	(1<<26)		/* User-mode cache lock enable (e500) */
-#define MSR_VEC		(1<<25)		/* Enable AltiVec(74xx) */
-#define MSR_SPE		(1<<25)		/* Enable SPE(e500) */
-#define MSR_POW		(1<<18)		/* Enable Power Management */
-#define MSR_WE		(1<<18)		/* Wait State Enable */
-#define MSR_TGPR	(1<<17)		/* TLB Update registers in use */
-#define MSR_CE		(1<<17)		/* Critical Interrupt Enable */
-#define MSR_ILE		(1<<16)		/* Interrupt Little Endian */
-#define MSR_EE		(1<<15)		/* External Interrupt Enable */
-#define MSR_PR		(1<<14)		/* Problem State / Privilege Level */
-#define MSR_FP		(1<<13)		/* Floating Point enable */
-#define MSR_ME		(1<<12)		/* Machine Check Enable */
-#define MSR_FE0		(1<<11)		/* Floating Exception mode 0 */
-#define MSR_SE		(1<<10)		/* Single Step */
-#define MSR_DWE		(1<<10)		/* Debug Wait Enable (4xx) */
-#define MSR_UBLE	(1<<10)		/* BTB lock enable (e500) */
-#define MSR_BE		(1<<9)		/* Branch Trace */
-#define MSR_DE		(1<<9)		/* Debug Exception Enable */
-#define MSR_FE1		(1<<8)		/* Floating Exception mode 1 */
-#define MSR_IP		(1<<6)		/* Exception prefix 0x000/0xFFF */
-#define MSR_IR		(1<<5)		/* Instruction Relocate */
-#define MSR_IS		(1<<5)		/* Book E Instruction space */
-#define MSR_DR		(1<<4)		/* Data Relocate */
-#define MSR_DS		(1<<4)		/* Book E Data space */
-#define MSR_PE		(1<<3)		/* Protection Enable */
-#define MSR_PX		(1<<2)		/* Protection Exclusive Mode */
-#define MSR_PMM		(1<<2)		/* Performance monitor mark bit (e500) */
-#define MSR_RI		(1<<1)		/* Recoverable Exception */
-#define MSR_LE		(1<<0)		/* Little Endian */
+#define MSR_UCLE    (1<<26)     /* User-mode cache lock enable (e500) */
+#define MSR_VEC     (1<<25)     /* Enable AltiVec(74xx) */
+#define MSR_SPE     (1<<25)     /* Enable SPE(e500) */
+#define MSR_POW     (1<<18)     /* Enable Power Management */
+#define MSR_WE      (1<<18)     /* Wait State Enable */
+#define MSR_TGPR    (1<<17)     /* TLB Update registers in use */
+#define MSR_CE      (1<<17)     /* Critical Interrupt Enable */
+#define MSR_ILE     (1<<16)     /* Interrupt Little Endian */
+#define MSR_EE      (1<<15)     /* External Interrupt Enable */
+#define MSR_PR      (1<<14)     /* Problem State / Privilege Level */
+#define MSR_FP      (1<<13)     /* Floating Point enable */
+#define MSR_ME      (1<<12)     /* Machine Check Enable */
+#define MSR_FE0     (1<<11)     /* Floating Exception mode 0 */
+#define MSR_SE      (1<<10)     /* Single Step */
+#define MSR_DWE     (1<<10)     /* Debug Wait Enable (4xx) */
+#define MSR_UBLE    (1<<10)     /* BTB lock enable (e500) */
+#define MSR_BE      (1<<9)      /* Branch Trace */
+#define MSR_DE      (1<<9)      /* Debug Exception Enable */
+#define MSR_FE1     (1<<8)      /* Floating Exception mode 1 */
+#define MSR_IP      (1<<6)      /* Exception prefix 0x000/0xFFF */
+#define MSR_IR      (1<<5)      /* Instruction Relocate */
+#define MSR_IS      (1<<5)      /* Book E Instruction space */
+#define MSR_DR      (1<<4)      /* Data Relocate */
+#define MSR_DS      (1<<4)      /* Book E Data space */
+#define MSR_PE      (1<<3)      /* Protection Enable */
+#define MSR_PX      (1<<2)      /* Protection Exclusive Mode */
+#define MSR_PMM     (1<<2)      /* Performance monitor mark bit (e500) */
+#define MSR_RI      (1<<1)      /* Recoverable Exception */
+#define MSR_LE      (1<<0)      /* Little Endian */
 
 #ifdef CONFIG_APUS_FAST_EXCEPT
-#define MSR_		MSR_ME|MSR_IP|MSR_RI
+#define MSR_        MSR_ME|MSR_IP|MSR_RI
 #else
-#define MSR_		MSR_ME|MSR_RI
+#define MSR_        MSR_ME|MSR_RI
 #endif
 
 #ifndef CONFIG_E500
-#define MSR_KERNEL	MSR_|MSR_IR|MSR_DR
+#define MSR_KERNEL  MSR_|MSR_IR|MSR_DR
 #else
-#define MSR_KERNEL	MSR_ME
+#define MSR_KERNEL  MSR_ME
 #endif
 
 /* Floating Point Status and Control Register (FPSCR) Fields */
 
-#define FPSCR_FX	0x80000000	/* FPU exception summary */
-#define FPSCR_FEX	0x40000000	/* FPU enabled exception summary */
-#define FPSCR_VX	0x20000000	/* Invalid operation summary */
-#define FPSCR_OX	0x10000000	/* Overflow exception summary */
-#define FPSCR_UX	0x08000000	/* Underflow exception summary */
-#define FPSCR_ZX	0x04000000	/* Zero-devide exception summary */
-#define FPSCR_XX	0x02000000	/* Inexact exception summary */
-#define FPSCR_VXSNAN	0x01000000	/* Invalid op for SNaN */
-#define FPSCR_VXISI	0x00800000	/* Invalid op for Inv - Inv */
-#define FPSCR_VXIDI	0x00400000	/* Invalid op for Inv / Inv */
-#define FPSCR_VXZDZ	0x00200000	/* Invalid op for Zero / Zero */
-#define FPSCR_VXIMZ	0x00100000	/* Invalid op for Inv * Zero */
-#define FPSCR_VXVC	0x00080000	/* Invalid op for Compare */
-#define FPSCR_FR	0x00040000	/* Fraction rounded */
-#define FPSCR_FI	0x00020000	/* Fraction inexact */
-#define FPSCR_FPRF	0x0001f000	/* FPU Result Flags */
-#define FPSCR_FPCC	0x0000f000	/* FPU Condition Codes */
-#define FPSCR_VXSOFT	0x00000400	/* Invalid op for software request */
-#define FPSCR_VXSQRT	0x00000200	/* Invalid op for square root */
-#define FPSCR_VXCVI	0x00000100	/* Invalid op for integer convert */
-#define FPSCR_VE	0x00000080	/* Invalid op exception enable */
-#define FPSCR_OE	0x00000040	/* IEEE overflow exception enable */
-#define FPSCR_UE	0x00000020	/* IEEE underflow exception enable */
-#define FPSCR_ZE	0x00000010	/* IEEE zero divide exception enable */
-#define FPSCR_XE	0x00000008	/* FP inexact exception enable */
-#define FPSCR_NI	0x00000004	/* FPU non IEEE-Mode */
-#define FPSCR_RN	0x00000003	/* FPU rounding control */
+#define FPSCR_FX    0x80000000  /* FPU exception summary */
+#define FPSCR_FEX   0x40000000  /* FPU enabled exception summary */
+#define FPSCR_VX    0x20000000  /* Invalid operation summary */
+#define FPSCR_OX    0x10000000  /* Overflow exception summary */
+#define FPSCR_UX    0x08000000  /* Underflow exception summary */
+#define FPSCR_ZX    0x04000000  /* Zero-devide exception summary */
+#define FPSCR_XX    0x02000000  /* Inexact exception summary */
+#define FPSCR_VXSNAN    0x01000000  /* Invalid op for SNaN */
+#define FPSCR_VXISI 0x00800000  /* Invalid op for Inv - Inv */
+#define FPSCR_VXIDI 0x00400000  /* Invalid op for Inv / Inv */
+#define FPSCR_VXZDZ 0x00200000  /* Invalid op for Zero / Zero */
+#define FPSCR_VXIMZ 0x00100000  /* Invalid op for Inv * Zero */
+#define FPSCR_VXVC  0x00080000  /* Invalid op for Compare */
+#define FPSCR_FR    0x00040000  /* Fraction rounded */
+#define FPSCR_FI    0x00020000  /* Fraction inexact */
+#define FPSCR_FPRF  0x0001f000  /* FPU Result Flags */
+#define FPSCR_FPCC  0x0000f000  /* FPU Condition Codes */
+#define FPSCR_VXSOFT    0x00000400  /* Invalid op for software request */
+#define FPSCR_VXSQRT    0x00000200  /* Invalid op for square root */
+#define FPSCR_VXCVI 0x00000100  /* Invalid op for integer convert */
+#define FPSCR_VE    0x00000080  /* Invalid op exception enable */
+#define FPSCR_OE    0x00000040  /* IEEE overflow exception enable */
+#define FPSCR_UE    0x00000020  /* IEEE underflow exception enable */
+#define FPSCR_ZE    0x00000010  /* IEEE zero divide exception enable */
+#define FPSCR_XE    0x00000008  /* FP inexact exception enable */
+#define FPSCR_NI    0x00000004  /* FPU non IEEE-Mode */
+#define FPSCR_RN    0x00000003  /* FPU rounding control */
 
 /* Special Purpose Registers (SPRNs)*/
 
@@ -97,618 +97,618 @@
 #define CONFIG_BOOKE
 #endif
 
-#define SPRN_CCR0	0x3B3	/* Core Configuration Register 0 */
+#define SPRN_CCR0   0x3B3   /* Core Configuration Register 0 */
 #ifdef CONFIG_BOOKE
-#define SPRN_CCR1	0x378	/* Core Configuration Register for 440 only */
+#define SPRN_CCR1   0x378   /* Core Configuration Register for 440 only */
 #endif
-#define SPRN_CDBCR	0x3D7	/* Cache Debug Control Register */
-#define SPRN_CTR	0x009	/* Count Register */
-#define SPRN_DABR	0x3F5	/* Data Address Breakpoint Register */
+#define SPRN_CDBCR  0x3D7   /* Cache Debug Control Register */
+#define SPRN_CTR    0x009   /* Count Register */
+#define SPRN_DABR   0x3F5   /* Data Address Breakpoint Register */
 #ifndef CONFIG_BOOKE
-#define SPRN_DAC1	0x3F6	/* Data Address Compare 1 */
-#define SPRN_DAC2	0x3F7	/* Data Address Compare 2 */
+#define SPRN_DAC1   0x3F6   /* Data Address Compare 1 */
+#define SPRN_DAC2   0x3F7   /* Data Address Compare 2 */
 #else
-#define SPRN_DAC1	0x13C	/* Book E Data Address Compare 1 */
-#define SPRN_DAC2	0x13D	/* Book E Data Address Compare 2 */
-#endif	/* CONFIG_BOOKE */
-#define SPRN_DAR	0x013	/* Data Address Register */
-#define SPRN_DBAT0L	0x219	/* Data BAT 0 Lower Register */
-#define SPRN_DBAT0U	0x218	/* Data BAT 0 Upper Register */
-#define SPRN_DBAT1L	0x21B	/* Data BAT 1 Lower Register */
-#define SPRN_DBAT1U	0x21A	/* Data BAT 1 Upper Register */
-#define SPRN_DBAT2L	0x21D	/* Data BAT 2 Lower Register */
-#define SPRN_DBAT2U	0x21C	/* Data BAT 2 Upper Register */
-#define SPRN_DBAT3L	0x21F	/* Data BAT 3 Lower Register */
-#define SPRN_DBAT3U	0x21E	/* Data BAT 3 Upper Register */
-#define SPRN_DBAT4L	0x239	/* Data BAT 4 Lower Register */
-#define SPRN_DBAT4U	0x238	/* Data BAT 4 Upper Register */
-#define SPRN_DBAT5L	0x23B	/* Data BAT 5 Lower Register */
-#define SPRN_DBAT5U	0x23A	/* Data BAT 5 Upper Register */
-#define SPRN_DBAT6L	0x23D	/* Data BAT 6 Lower Register */
-#define SPRN_DBAT6U	0x23C	/* Data BAT 6 Upper Register */
-#define SPRN_DBAT7L	0x23F	/* Data BAT 7 Lower Register */
-#define SPRN_DBAT7U	0x23E	/* Data BAT 7 Lower Register */
-#define SPRN_DBCR	0x3F2	/* Debug Control Regsiter */
-#define   DBCR_EDM	0x80000000
-#define   DBCR_IDM	0x40000000
-#define   DBCR_RST(x)	(((x) & 0x3) << 28)
-#define     DBCR_RST_NONE		0
-#define     DBCR_RST_CORE		1
-#define     DBCR_RST_CHIP		2
-#define     DBCR_RST_SYSTEM		3
-#define   DBCR_IC	0x08000000	/* Instruction Completion Debug Evnt */
-#define   DBCR_BT	0x04000000	/* Branch Taken Debug Event */
-#define   DBCR_EDE	0x02000000	/* Exception Debug Event */
-#define   DBCR_TDE	0x01000000	/* TRAP Debug Event */
-#define   DBCR_FER	0x00F80000	/* First Events Remaining Mask */
-#define   DBCR_FT	0x00040000	/* Freeze Timers on Debug Event */
-#define   DBCR_IA1	0x00020000	/* Instr. Addr. Compare 1 Enable */
-#define   DBCR_IA2	0x00010000	/* Instr. Addr. Compare 2 Enable */
-#define   DBCR_D1R	0x00008000	/* Data Addr. Compare 1 Read Enable */
-#define   DBCR_D1W	0x00004000	/* Data Addr. Compare 1 Write Enable */
-#define   DBCR_D1S(x)	(((x) & 0x3) << 12)	/* Data Adrr. Compare 1 Size */
-#define     DAC_BYTE	0
-#define     DAC_HALF	1
-#define     DAC_WORD	2
-#define     DAC_QUAD	3
-#define   DBCR_D2R	0x00000800	/* Data Addr. Compare 2 Read Enable */
-#define   DBCR_D2W	0x00000400	/* Data Addr. Compare 2 Write Enable */
-#define   DBCR_D2S(x)	(((x) & 0x3) << 8)	/* Data Addr. Compare 2 Size */
-#define   DBCR_SBT	0x00000040	/* Second Branch Taken Debug Event */
-#define   DBCR_SED	0x00000020	/* Second Exception Debug Event */
-#define   DBCR_STD	0x00000010	/* Second Trap Debug Event */
-#define   DBCR_SIA	0x00000008	/* Second IAC Enable */
-#define   DBCR_SDA	0x00000004	/* Second DAC Enable */
-#define   DBCR_JOI	0x00000002	/* JTAG Serial Outbound Int. Enable */
-#define   DBCR_JII	0x00000001	/* JTAG Serial Inbound Int. Enable */
+#define SPRN_DAC1   0x13C   /* Book E Data Address Compare 1 */
+#define SPRN_DAC2   0x13D   /* Book E Data Address Compare 2 */
+#endif  /* CONFIG_BOOKE */
+#define SPRN_DAR    0x013   /* Data Address Register */
+#define SPRN_DBAT0L 0x219   /* Data BAT 0 Lower Register */
+#define SPRN_DBAT0U 0x218   /* Data BAT 0 Upper Register */
+#define SPRN_DBAT1L 0x21B   /* Data BAT 1 Lower Register */
+#define SPRN_DBAT1U 0x21A   /* Data BAT 1 Upper Register */
+#define SPRN_DBAT2L 0x21D   /* Data BAT 2 Lower Register */
+#define SPRN_DBAT2U 0x21C   /* Data BAT 2 Upper Register */
+#define SPRN_DBAT3L 0x21F   /* Data BAT 3 Lower Register */
+#define SPRN_DBAT3U 0x21E   /* Data BAT 3 Upper Register */
+#define SPRN_DBAT4L 0x239   /* Data BAT 4 Lower Register */
+#define SPRN_DBAT4U 0x238   /* Data BAT 4 Upper Register */
+#define SPRN_DBAT5L 0x23B   /* Data BAT 5 Lower Register */
+#define SPRN_DBAT5U 0x23A   /* Data BAT 5 Upper Register */
+#define SPRN_DBAT6L 0x23D   /* Data BAT 6 Lower Register */
+#define SPRN_DBAT6U 0x23C   /* Data BAT 6 Upper Register */
+#define SPRN_DBAT7L 0x23F   /* Data BAT 7 Lower Register */
+#define SPRN_DBAT7U 0x23E   /* Data BAT 7 Lower Register */
+#define SPRN_DBCR   0x3F2   /* Debug Control Regsiter */
+#define   DBCR_EDM  0x80000000
+#define   DBCR_IDM  0x40000000
+#define   DBCR_RST(x)   (((x) & 0x3) << 28)
+#define     DBCR_RST_NONE       0
+#define     DBCR_RST_CORE       1
+#define     DBCR_RST_CHIP       2
+#define     DBCR_RST_SYSTEM     3
+#define   DBCR_IC   0x08000000  /* Instruction Completion Debug Evnt */
+#define   DBCR_BT   0x04000000  /* Branch Taken Debug Event */
+#define   DBCR_EDE  0x02000000  /* Exception Debug Event */
+#define   DBCR_TDE  0x01000000  /* TRAP Debug Event */
+#define   DBCR_FER  0x00F80000  /* First Events Remaining Mask */
+#define   DBCR_FT   0x00040000  /* Freeze Timers on Debug Event */
+#define   DBCR_IA1  0x00020000  /* Instr. Addr. Compare 1 Enable */
+#define   DBCR_IA2  0x00010000  /* Instr. Addr. Compare 2 Enable */
+#define   DBCR_D1R  0x00008000  /* Data Addr. Compare 1 Read Enable */
+#define   DBCR_D1W  0x00004000  /* Data Addr. Compare 1 Write Enable */
+#define   DBCR_D1S(x)   (((x) & 0x3) << 12) /* Data Adrr. Compare 1 Size */
+#define     DAC_BYTE    0
+#define     DAC_HALF    1
+#define     DAC_WORD    2
+#define     DAC_QUAD    3
+#define   DBCR_D2R  0x00000800  /* Data Addr. Compare 2 Read Enable */
+#define   DBCR_D2W  0x00000400  /* Data Addr. Compare 2 Write Enable */
+#define   DBCR_D2S(x)   (((x) & 0x3) << 8)  /* Data Addr. Compare 2 Size */
+#define   DBCR_SBT  0x00000040  /* Second Branch Taken Debug Event */
+#define   DBCR_SED  0x00000020  /* Second Exception Debug Event */
+#define   DBCR_STD  0x00000010  /* Second Trap Debug Event */
+#define   DBCR_SIA  0x00000008  /* Second IAC Enable */
+#define   DBCR_SDA  0x00000004  /* Second DAC Enable */
+#define   DBCR_JOI  0x00000002  /* JTAG Serial Outbound Int. Enable */
+#define   DBCR_JII  0x00000001  /* JTAG Serial Inbound Int. Enable */
 #ifndef CONFIG_BOOKE
-#define SPRN_DBCR0	0x3F2		/* Debug Control Register 0 */
+#define SPRN_DBCR0  0x3F2       /* Debug Control Register 0 */
 #else
-#define SPRN_DBCR0	0x134		/* Book E Debug Control Register 0 */
+#define SPRN_DBCR0  0x134       /* Book E Debug Control Register 0 */
 #endif /* CONFIG_BOOKE */
 #ifndef CONFIG_BOOKE
-#define SPRN_DBCR1	0x3BD	/* Debug Control Register 1 */
-#define SPRN_DBSR	0x3F0	/* Debug Status Register */
+#define SPRN_DBCR1  0x3BD   /* Debug Control Register 1 */
+#define SPRN_DBSR   0x3F0   /* Debug Status Register */
 #else
-#define SPRN_DBCR1	0x135		/* Book E Debug Control Register 1 */
+#define SPRN_DBCR1  0x135       /* Book E Debug Control Register 1 */
 #ifdef CONFIG_BOOKE
-#define	SPRN_DBDR	0x3f3		/* Debug Data Register */
+#define SPRN_DBDR   0x3f3       /* Debug Data Register */
 #endif
-#define SPRN_DBSR	0x130		/* Book E Debug Status Register */
-#define   DBSR_IC	    0x08000000	/* Book E Instruction Completion  */
-#define   DBSR_TIE	    0x01000000	/* Book E Trap Instruction Event */
+#define SPRN_DBSR   0x130       /* Book E Debug Status Register */
+#define   DBSR_IC       0x08000000  /* Book E Instruction Completion  */
+#define   DBSR_TIE      0x01000000  /* Book E Trap Instruction Event */
 #endif /* CONFIG_BOOKE */
-#define SPRN_DCCR	0x3FA	/* Data Cache Cacheability Register */
-#define   DCCR_NOCACHE		0	/* Noncacheable */
-#define   DCCR_CACHE		1	/* Cacheable */
+#define SPRN_DCCR   0x3FA   /* Data Cache Cacheability Register */
+#define   DCCR_NOCACHE      0   /* Noncacheable */
+#define   DCCR_CACHE        1   /* Cacheable */
 #ifndef CONFIG_BOOKE
-#define	SPRN_DCDBTRL	0x39c	/* Data Cache Debug Tag Register Low */
-#define	SPRN_DCDBTRH	0x39d	/* Data Cache Debug Tag Register High */
+#define SPRN_DCDBTRL    0x39c   /* Data Cache Debug Tag Register Low */
+#define SPRN_DCDBTRH    0x39d   /* Data Cache Debug Tag Register High */
 #endif
-#define SPRN_DCMP	0x3D1	/* Data TLB Compare Register */
-#define SPRN_DCWR	0x3BA	/* Data Cache Write-thru Register */
-#define   DCWR_COPY		0	/* Copy-back */
-#define   DCWR_WRITE		1	/* Write-through */
+#define SPRN_DCMP   0x3D1   /* Data TLB Compare Register */
+#define SPRN_DCWR   0x3BA   /* Data Cache Write-thru Register */
+#define   DCWR_COPY     0   /* Copy-back */
+#define   DCWR_WRITE        1   /* Write-through */
 #ifndef CONFIG_BOOKE
-#define SPRN_DEAR	0x3D5	/* Data Error Address Register */
+#define SPRN_DEAR   0x3D5   /* Data Error Address Register */
 #else
-#define SPRN_DEAR	0x03D	/* Book E Data Error Address Register */
+#define SPRN_DEAR   0x03D   /* Book E Data Error Address Register */
 #endif /* CONFIG_BOOKE */
-#define SPRN_DEC	0x016	/* Decrement Register */
-#define SPRN_DMISS	0x3D0	/* Data TLB Miss Register */
+#define SPRN_DEC    0x016   /* Decrement Register */
+#define SPRN_DMISS  0x3D0   /* Data TLB Miss Register */
 #ifdef CONFIG_BOOKE
-#define	SPRN_DNV0	0x390	/* Data Cache Normal Victim 0 */
-#define	SPRN_DNV1	0x391	/* Data Cache Normal Victim 1 */
-#define	SPRN_DNV2	0x392	/* Data Cache Normal Victim 2 */
-#define	SPRN_DNV3	0x393	/* Data Cache Normal Victim 3 */
+#define SPRN_DNV0   0x390   /* Data Cache Normal Victim 0 */
+#define SPRN_DNV1   0x391   /* Data Cache Normal Victim 1 */
+#define SPRN_DNV2   0x392   /* Data Cache Normal Victim 2 */
+#define SPRN_DNV3   0x393   /* Data Cache Normal Victim 3 */
 #endif
-#define SPRN_DSISR	0x012	/* Data Storage Interrupt Status Register */
+#define SPRN_DSISR  0x012   /* Data Storage Interrupt Status Register */
 #ifdef CONFIG_BOOKE
-#define	SPRN_DTV0	0x394	/* Data Cache Transient Victim 0 */
-#define	SPRN_DTV1	0x395	/* Data Cache Transient Victim 1 */
-#define	SPRN_DTV2	0x396	/* Data Cache Transient Victim 2 */
-#define	SPRN_DTV3	0x397	/* Data Cache Transient Victim 3 */
-#define	SPRN_DVLIM	0x398	/* Data Cache Victim Limit */
+#define SPRN_DTV0   0x394   /* Data Cache Transient Victim 0 */
+#define SPRN_DTV1   0x395   /* Data Cache Transient Victim 1 */
+#define SPRN_DTV2   0x396   /* Data Cache Transient Victim 2 */
+#define SPRN_DTV3   0x397   /* Data Cache Transient Victim 3 */
+#define SPRN_DVLIM  0x398   /* Data Cache Victim Limit */
 #endif
-#define SPRN_EAR	0x11A	/* External Address Register */
+#define SPRN_EAR    0x11A   /* External Address Register */
 #ifndef CONFIG_BOOKE
-#define SPRN_ESR	0x3D4	/* Exception Syndrome Register */
+#define SPRN_ESR    0x3D4   /* Exception Syndrome Register */
 #else
-#define SPRN_ESR	0x03E		/* Book E Exception Syndrome Register */
+#define SPRN_ESR    0x03E       /* Book E Exception Syndrome Register */
 #endif /* CONFIG_BOOKE */
-#define   ESR_IMCP	0x80000000	/* Instr. Machine Check - Protection */
-#define   ESR_IMCN	0x40000000	/* Instr. Machine Check - Non-config */
-#define   ESR_IMCB	0x20000000	/* Instr. Machine Check - Bus error */
-#define   ESR_IMCT	0x10000000	/* Instr. Machine Check - Timeout */
-#define   ESR_PIL	0x08000000	/* Program Exception - Illegal */
-#define   ESR_PPR	0x04000000	/* Program Exception - Priveleged */
-#define   ESR_PTR	0x02000000	/* Program Exception - Trap */
-#define   ESR_DST	0x00800000	/* Storage Exception - Data miss */
-#define   ESR_DIZ	0x00400000	/* Storage Exception - Zone fault */
-#define SPRN_EVPR	0x3D6	/* Exception Vector Prefix Register */
-#define SPRN_HASH1	0x3D2	/* Primary Hash Address Register */
-#define SPRN_HASH2	0x3D3	/* Secondary Hash Address Resgister */
-#define SPRN_HID0	0x3F0	/* Hardware Implementation Register 0 */
+#define   ESR_IMCP  0x80000000  /* Instr. Machine Check - Protection */
+#define   ESR_IMCN  0x40000000  /* Instr. Machine Check - Non-config */
+#define   ESR_IMCB  0x20000000  /* Instr. Machine Check - Bus error */
+#define   ESR_IMCT  0x10000000  /* Instr. Machine Check - Timeout */
+#define   ESR_PIL   0x08000000  /* Program Exception - Illegal */
+#define   ESR_PPR   0x04000000  /* Program Exception - Priveleged */
+#define   ESR_PTR   0x02000000  /* Program Exception - Trap */
+#define   ESR_DST   0x00800000  /* Storage Exception - Data miss */
+#define   ESR_DIZ   0x00400000  /* Storage Exception - Zone fault */
+#define SPRN_EVPR   0x3D6   /* Exception Vector Prefix Register */
+#define SPRN_HASH1  0x3D2   /* Primary Hash Address Register */
+#define SPRN_HASH2  0x3D3   /* Secondary Hash Address Resgister */
+#define SPRN_HID0   0x3F0   /* Hardware Implementation Register 0 */
 
-#define HID0_ICE_SHIFT		15
-#define HID0_DCE_SHIFT		14
-#define HID0_DLOCK_SHIFT	12
+#define HID0_ICE_SHIFT      15
+#define HID0_DCE_SHIFT      14
+#define HID0_DLOCK_SHIFT    12
 
-#define   HID0_EMCP	(1<<31)		/* Enable Machine Check pin */
-#define   HID0_EBA	(1<<29)		/* Enable Bus Address Parity */
-#define   HID0_EBD	(1<<28)		/* Enable Bus Data Parity */
-#define   HID0_SBCLK	(1<<27)
-#define   HID0_EICE	(1<<26)
-#define   HID0_ECLK	(1<<25)
-#define   HID0_PAR	(1<<24)
-#define   HID0_DOZE	(1<<23)
-#define   HID0_NAP	(1<<22)
-#define   HID0_SLEEP	(1<<21)
-#define   HID0_DPM	(1<<20)
-#define   HID0_ICE	(1<> 16) & 0xFFFF) /* Version field */
-#define SVR_REV(svr)	(((svr) >>  0) & 0xFFFF) /* Revision field */
+#define SVR_VER(svr)    (((svr) >> 16) & 0xFFFF) /* Version field */
+#define SVR_REV(svr)    (((svr) >>  0) & 0xFFFF) /* Revision field */
 
-#define SVR_CID(svr)	(((svr) >> 28) & 0x0F)	 /* Company or manufacturer ID */
-#define SVR_SOCOP(svr)	(((svr) >> 22) & 0x3F)	 /* SOC integration options */
-#define SVR_SID(svr)	(((svr) >> 16) & 0x3F)	 /* SOC ID */
-#define SVR_PROC(svr)	(((svr) >> 12) & 0x0F)	 /* Process revision field */
-#define SVR_MFG(svr)	(((svr) >>  8) & 0x0F)	 /* Manufacturing revision */
-#define SVR_MJREV(svr)	(((svr) >>  4) & 0x0F)	 /* Major SOC design revision indicator */
-#define SVR_MNREV(svr)	(((svr) >>  0) & 0x0F)	 /* Minor SOC design revision indicator */
+#define SVR_CID(svr)    (((svr) >> 28) & 0x0F)   /* Company or manufacturer ID */
+#define SVR_SOCOP(svr)  (((svr) >> 22) & 0x3F)   /* SOC integration options */
+#define SVR_SID(svr)    (((svr) >> 16) & 0x3F)   /* SOC ID */
+#define SVR_PROC(svr)   (((svr) >> 12) & 0x0F)   /* Process revision field */
+#define SVR_MFG(svr)    (((svr) >>  8) & 0x0F)   /* Manufacturing revision */
+#define SVR_MJREV(svr)  (((svr) >>  4) & 0x0F)   /* Major SOC design revision indicator */
+#define SVR_MNREV(svr)  (((svr) >>  0) & 0x0F)   /* Minor SOC design revision indicator */
 
 /* Processor Version Register */
 
 /* Processor Version Register (PVR) field extraction */
 
-#define PVR_VER(pvr)  (((pvr) >>  16) & 0xFFFF)	/* Version field */
-#define PVR_REV(pvr)  (((pvr) >>   0) & 0xFFFF)	/* Revison field */
+#define PVR_VER(pvr)  (((pvr) >>  16) & 0xFFFF) /* Version field */
+#define PVR_REV(pvr)  (((pvr) >>   0) & 0xFFFF) /* Revison field */
 
 /*
  * AMCC has further subdivided the standard PowerPC 16-bit version and
  * revision subfields of the PVR for the PowerPC 403s into the following:
  */
 
-#define PVR_FAM(pvr)	(((pvr) >> 20) & 0xFFF)	/* Family field */
-#define PVR_MEM(pvr)	(((pvr) >> 16) & 0xF)	/* Member field */
-#define PVR_CORE(pvr)	(((pvr) >> 12) & 0xF)	/* Core field */
-#define PVR_CFG(pvr)	(((pvr) >>  8) & 0xF)	/* Configuration field */
-#define PVR_MAJ(pvr)	(((pvr) >>  4) & 0xF)	/* Major revision field */
-#define PVR_MIN(pvr)	(((pvr) >>  0) & 0xF)	/* Minor revision field */
+#define PVR_FAM(pvr)    (((pvr) >> 20) & 0xFFF) /* Family field */
+#define PVR_MEM(pvr)    (((pvr) >> 16) & 0xF)   /* Member field */
+#define PVR_CORE(pvr)   (((pvr) >> 12) & 0xF)   /* Core field */
+#define PVR_CFG(pvr)    (((pvr) >>  8) & 0xF)   /* Configuration field */
+#define PVR_MAJ(pvr)    (((pvr) >>  4) & 0xF)   /* Major revision field */
+#define PVR_MIN(pvr)    (((pvr) >>  0) & 0xF)   /* Minor revision field */
 
 /* e600 core PVR fields */
 
-#define PVR_E600_VER(pvr)	(((pvr) >> 15) & 0xFFFF) /* Version/type */
-#define PVR_E600_TECH(pvr)	(((pvr) >> 12) & 0xF)	 /* Technology */
-#define PVR_E600_MAJ(pvr)	(((pvr) >> 8) & 0xF)	 /* Major revision */
-#define PVR_E600_MIN(pvr)	(((pvr) >> 0) & 0xFF)	 /* Minor revision */
+#define PVR_E600_VER(pvr)   (((pvr) >> 15) & 0xFFFF) /* Version/type */
+#define PVR_E600_TECH(pvr)  (((pvr) >> 12) & 0xF)    /* Technology */
+#define PVR_E600_MAJ(pvr)   (((pvr) >> 8) & 0xF)     /* Major revision */
+#define PVR_E600_MIN(pvr)   (((pvr) >> 0) & 0xFF)    /* Minor revision */
 
 /* Processor Version Numbers */
 
-#define PVR_403GA	0x00200000
-#define PVR_403GB	0x00200100
-#define PVR_403GC	0x00200200
-#define PVR_403GCX	0x00201400
-#define PVR_405GP	0x40110000
-#define PVR_405GP_RB	0x40110040
-#define PVR_405GP_RC	0x40110082
-#define PVR_405GP_RD	0x401100C4
-#define PVR_405GP_RE	0x40110145  /* same as pc405cr rev c */
-#define PVR_405CR_RA	0x40110041
-#define PVR_405CR_RB	0x401100C5
-#define PVR_405CR_RC	0x40110145  /* same as pc405gp rev e */
-#define PVR_405EP_RA	0x51210950
-#define PVR_405GPR_RB	0x50910951
-#define PVR_405EZ_RA	0x41511460
-#define PVR_405EXR1_RA	0x12911473 /* 405EXr rev A/B with Security */
-#define PVR_405EXR2_RA	0x12911471 /* 405EXr rev A/B without Security */
-#define PVR_405EX1_RA	0x12911477 /* 405EX rev A/B with Security */
-#define PVR_405EX2_RA	0x12911475 /* 405EX rev A/B without Security */
-#define PVR_405EXR1_RC	0x1291147B /* 405EXr rev C with Security */
-#define PVR_405EXR2_RC	0x12911479 /* 405EXr rev C without Security */
-#define PVR_405EX1_RC	0x1291147F /* 405EX rev C with Security */
-#define PVR_405EX2_RC	0x1291147D /* 405EX rev C without Security */
-#define PVR_440GP_RB	0x40120440
-#define PVR_440GP_RC	0x40120481
-#define PVR_440EP_RA	0x42221850
-#define PVR_440EP_RB	0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */
-#define PVR_440EP_RC	0x422218D4 /* 440EP rev C and 440GR rev B have same PVR */
-#define PVR_440GR_RA	0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */
-#define PVR_440GR_RB	0x422218D4 /* 440EP rev C and 440GR rev B have same PVR */
-#define PVR_440EPX1_RA	0x216218D0 /* 440EPX rev A with Security / Kasumi */
-#define PVR_440EPX2_RA	0x216218D4 /* 440EPX rev A without Security / Kasumi */
-#define PVR_440GRX1_RA	0x216218D0 /* 440GRX rev A with Security / Kasumi */
-#define PVR_440GRX2_RA	0x216218D4 /* 440GRX rev A without Security / Kasumi */
-#define PVR_440GX_RA	0x51B21850
-#define PVR_440GX_RB	0x51B21851
-#define PVR_440GX_RC	0x51B21892
-#define PVR_440GX_RF	0x51B21894
-#define PVR_405EP_RB	0x51210950
-#define PVR_440SP_6_RAB	0x53221850 /* 440SP rev A&B with RAID 6 support enabled	*/
-#define PVR_440SP_RAB	0x53321850 /* 440SP rev A&B without RAID 6 support	*/
-#define PVR_440SP_6_RC	0x53221891 /* 440SP rev C with RAID 6 support enabled	*/
-#define PVR_440SP_RC	0x53321891 /* 440SP rev C without RAID 6 support	*/
-#define PVR_440SPe_6_RA	0x53421890 /* 440SPe rev A with RAID 6 support enabled	*/
-#define PVR_440SPe_RA	0x53521890 /* 440SPe rev A without RAID 6 support	*/
-#define PVR_440SPe_6_RB	0x53421891 /* 440SPe rev B with RAID 6 support enabled	*/
-#define PVR_440SPe_RB	0x53521891 /* 440SPe rev B without RAID 6 support	*/
-#define PVR_460EX_SE_RA	0x130218A2 /* 460EX rev A with Security Engine	  */
-#define PVR_460EX_RA	0x130218A3 /* 460EX rev A without Security Engine */
-#define PVR_460GT_SE_RA	0x130218A0 /* 460GT rev A with Security Engine	  */
-#define PVR_460GT_RA	0x130218A1 /* 460GT rev A without Security Engine */
+#define PVR_403GA   0x00200000
+#define PVR_403GB   0x00200100
+#define PVR_403GC   0x00200200
+#define PVR_403GCX  0x00201400
+#define PVR_405GP   0x40110000
+#define PVR_405GP_RB    0x40110040
+#define PVR_405GP_RC    0x40110082
+#define PVR_405GP_RD    0x401100C4
+#define PVR_405GP_RE    0x40110145  /* same as pc405cr rev c */
+#define PVR_405CR_RA    0x40110041
+#define PVR_405CR_RB    0x401100C5
+#define PVR_405CR_RC    0x40110145  /* same as pc405gp rev e */
+#define PVR_405EP_RA    0x51210950
+#define PVR_405GPR_RB   0x50910951
+#define PVR_405EZ_RA    0x41511460
+#define PVR_405EXR1_RA  0x12911473 /* 405EXr rev A/B with Security */
+#define PVR_405EXR2_RA  0x12911471 /* 405EXr rev A/B without Security */
+#define PVR_405EX1_RA   0x12911477 /* 405EX rev A/B with Security */
+#define PVR_405EX2_RA   0x12911475 /* 405EX rev A/B without Security */
+#define PVR_405EXR1_RC  0x1291147B /* 405EXr rev C with Security */
+#define PVR_405EXR2_RC  0x12911479 /* 405EXr rev C without Security */
+#define PVR_405EX1_RC   0x1291147F /* 405EX rev C with Security */
+#define PVR_405EX2_RC   0x1291147D /* 405EX rev C without Security */
+#define PVR_440GP_RB    0x40120440
+#define PVR_440GP_RC    0x40120481
+#define PVR_440EP_RA    0x42221850
+#define PVR_440EP_RB    0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */
+#define PVR_440EP_RC    0x422218D4 /* 440EP rev C and 440GR rev B have same PVR */
+#define PVR_440GR_RA    0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */
+#define PVR_440GR_RB    0x422218D4 /* 440EP rev C and 440GR rev B have same PVR */
+#define PVR_440EPX1_RA  0x216218D0 /* 440EPX rev A with Security / Kasumi */
+#define PVR_440EPX2_RA  0x216218D4 /* 440EPX rev A without Security / Kasumi */
+#define PVR_440GRX1_RA  0x216218D0 /* 440GRX rev A with Security / Kasumi */
+#define PVR_440GRX2_RA  0x216218D4 /* 440GRX rev A without Security / Kasumi */
+#define PVR_440GX_RA    0x51B21850
+#define PVR_440GX_RB    0x51B21851
+#define PVR_440GX_RC    0x51B21892
+#define PVR_440GX_RF    0x51B21894
+#define PVR_405EP_RB    0x51210950
+#define PVR_440SP_6_RAB 0x53221850 /* 440SP rev A&B with RAID 6 support enabled */
+#define PVR_440SP_RAB   0x53321850 /* 440SP rev A&B without RAID 6 support  */
+#define PVR_440SP_6_RC  0x53221891 /* 440SP rev C with RAID 6 support enabled   */
+#define PVR_440SP_RC    0x53321891 /* 440SP rev C without RAID 6 support    */
+#define PVR_440SPe_6_RA 0x53421890 /* 440SPe rev A with RAID 6 support enabled  */
+#define PVR_440SPe_RA   0x53521890 /* 440SPe rev A without RAID 6 support   */
+#define PVR_440SPe_6_RB 0x53421891 /* 440SPe rev B with RAID 6 support enabled  */
+#define PVR_440SPe_RB   0x53521891 /* 440SPe rev B without RAID 6 support   */
+#define PVR_460EX_SE_RA 0x130218A2 /* 460EX rev A with Security Engine    */
+#define PVR_460EX_RA    0x130218A3 /* 460EX rev A without Security Engine */
+#define PVR_460GT_SE_RA 0x130218A0 /* 460GT rev A with Security Engine    */
+#define PVR_460GT_RA    0x130218A1 /* 460GT rev A without Security Engine */
 #define PVR_460SX_RA    0x13541800 /* 460SX rev A                   */
 #define PVR_460SX_RA_V1 0x13541801 /* 460SX rev A Variant 1 Security disabled */
 #define PVR_460GX_RA    0x13541802 /* 460GX rev A                   */
 #define PVR_460GX_RA_V1 0x13541803 /* 460GX rev A Variant 1 Security disabled */
-#define PVR_601		0x00010000
-#define PVR_602		0x00050000
-#define PVR_603		0x00030000
-#define PVR_603e	0x00060000
-#define PVR_603ev	0x00070000
-#define PVR_603r	0x00071000
-#define PVR_604		0x00040000
-#define PVR_604e	0x00090000
-#define PVR_604r	0x000A0000
-#define PVR_620		0x00140000
-#define PVR_740		0x00080000
-#define PVR_750		PVR_740
-#define PVR_740P	0x10080000
-#define PVR_750P	PVR_740P
-#define PVR_7400	0x000C0000
-#define PVR_7410	0x800C0000
-#define PVR_7450	0x80000000
+#define PVR_601     0x00010000
+#define PVR_602     0x00050000
+#define PVR_603     0x00030000
+#define PVR_603e    0x00060000
+#define PVR_603ev   0x00070000
+#define PVR_603r    0x00071000
+#define PVR_604     0x00040000
+#define PVR_604e    0x00090000
+#define PVR_604r    0x000A0000
+#define PVR_620     0x00140000
+#define PVR_740     0x00080000
+#define PVR_750     PVR_740
+#define PVR_740P    0x10080000
+#define PVR_750P    PVR_740P
+#define PVR_7400    0x000C0000
+#define PVR_7410    0x800C0000
+#define PVR_7450    0x80000000
 
-#define PVR_85xx	0x80200000
-#define PVR_85xx_REV1	(PVR_85xx | 0x0010)
-#define PVR_85xx_REV2	(PVR_85xx | 0x0020)
+#define PVR_85xx    0x80200000
+#define PVR_85xx_REV1   (PVR_85xx | 0x0010)
+#define PVR_85xx_REV2   (PVR_85xx | 0x0020)
 
-#define PVR_86xx	0x80040000
+#define PVR_86xx    0x80040000
 
 #define PVR_VIRTEX5     0x7ff21912
 
@@ -922,29 +922,29 @@
  * differentiated by the version number in the Communication Processor
  * Module (CPM).
  */
-#define PVR_821		0x00500000
-#define PVR_823		PVR_821
-#define PVR_850		PVR_821
-#define PVR_860		PVR_821
-#define PVR_7400	0x000C0000
-#define PVR_8240	0x00810100
+#define PVR_821     0x00500000
+#define PVR_823     PVR_821
+#define PVR_850     PVR_821
+#define PVR_860     PVR_821
+#define PVR_7400    0x000C0000
+#define PVR_8240    0x00810100
 
 /*
  * PowerQUICC II family processors report different PVR values depending
  * on silicon process (HiP3, HiP4, HiP7, etc.)
  */
-#define PVR_8260	PVR_8240
-#define PVR_8260_HIP3	0x00810101
-#define PVR_8260_HIP4	0x80811014
-#define PVR_8260_HIP7	0x80822011
+#define PVR_8260    PVR_8240
+#define PVR_8260_HIP3   0x00810101
+#define PVR_8260_HIP4   0x80811014
+#define PVR_8260_HIP7   0x80822011
 #define PVR_8260_HIP7R1 0x80822013
-#define PVR_8260_HIP7RA	0x80822014
+#define PVR_8260_HIP7RA 0x80822014
 
 /*
  * MPC 52xx
  */
-#define PVR_5200	0x80822011
-#define PVR_5200B	0x80822014
+#define PVR_5200    0x80822011
+#define PVR_5200B   0x80822014
 
 /*
  * System Version Register
@@ -952,26 +952,26 @@
 
 /* System Version Register (SVR) field extraction */
 
-#define SVR_VER(svr)	(((svr) >>  16) & 0xFFFF)	/* Version field */
-#define SVR_REV(svr)	(((svr) >>   0) & 0xFFFF)	/* Revison field */
+#define SVR_VER(svr)    (((svr) >>  16) & 0xFFFF)   /* Version field */
+#define SVR_REV(svr)    (((svr) >>   0) & 0xFFFF)   /* Revison field */
 
-#define SVR_SUBVER(svr)	(((svr) >>  8) & 0xFF)	/* Process/MFG sub-version */
+#define SVR_SUBVER(svr) (((svr) >>  8) & 0xFF)  /* Process/MFG sub-version */
 
-#define SVR_FAM(svr)	(((svr) >> 20) & 0xFFF)	/* Family field */
-#define SVR_MEM(svr)	(((svr) >> 16) & 0xF)	/* Member field */
+#define SVR_FAM(svr)    (((svr) >> 20) & 0xFFF) /* Family field */
+#define SVR_MEM(svr)    (((svr) >> 16) & 0xF)   /* Member field */
 
-#define SVR_MAJ(svr)	(((svr) >>  4) & 0xF)	/* Major revision field*/
-#define SVR_MIN(svr)	(((svr) >>  0) & 0xF)	/* Minor revision field*/
+#define SVR_MAJ(svr)    (((svr) >>  4) & 0xF)   /* Major revision field*/
+#define SVR_MIN(svr)    (((svr) >>  0) & 0xF)   /* Minor revision field*/
 
 /* Some parts define SVR[0:23] as the SOC version */
-#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFF)	/* SOC Version fields */
+#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFF)  /* SOC Version fields */
 
 /* whether MPC8xxxE (i.e. has SEC) */
 #if defined(CONFIG_MPC85xx)
-#define IS_E_PROCESSOR(svr)	(svr & 0x80000)
+#define IS_E_PROCESSOR(svr) (svr & 0x80000)
 #else
 #if defined(CONFIG_MPC83xx)
-#define IS_E_PROCESSOR(spridr)	(!(spridr & 0x00010000))
+#define IS_E_PROCESSOR(spridr)  (!(spridr & 0x00010000))
 #endif
 #endif
 
@@ -979,98 +979,98 @@
  * SVR_SOC_VER() Version Values
  */
 
-#define SVR_8533	0x803400
-#define SVR_8533_E	0x803C00
-#define SVR_8535	0x803701
-#define SVR_8535_E	0x803F01
-#define SVR_8536	0x803700
-#define SVR_8536_E	0x803F00
-#define SVR_8540	0x803000
-#define SVR_8541	0x807200
-#define SVR_8541_E	0x807A00
-#define SVR_8543	0x803200
-#define SVR_8543_E	0x803A00
-#define SVR_8544	0x803401
-#define SVR_8544_E	0x803C01
-#define SVR_8545	0x803102
-#define SVR_8545_E	0x803902
-#define SVR_8547_E	0x803901
-#define SVR_8548	0x803100
-#define SVR_8548_E	0x803900
-#define SVR_8555	0x807100
-#define SVR_8555_E	0x807900
-#define SVR_8560	0x807000
-#define SVR_8567	0x807600
-#define SVR_8567_E	0x807E00
-#define SVR_8568	0x807500
-#define SVR_8568_E	0x807D00
-#define SVR_8569	0x808000
-#define SVR_8569_E	0x808800
-#define SVR_8572	0x80E000
-#define SVR_8572_E	0x80E800
-#define SVR_P2020	0x80E200
-#define SVR_P2020_E	0x80EA00
+#define SVR_8533    0x803400
+#define SVR_8533_E  0x803C00
+#define SVR_8535    0x803701
+#define SVR_8535_E  0x803F01
+#define SVR_8536    0x803700
+#define SVR_8536_E  0x803F00
+#define SVR_8540    0x803000
+#define SVR_8541    0x807200
+#define SVR_8541_E  0x807A00
+#define SVR_8543    0x803200
+#define SVR_8543_E  0x803A00
+#define SVR_8544    0x803401
+#define SVR_8544_E  0x803C01
+#define SVR_8545    0x803102
+#define SVR_8545_E  0x803902
+#define SVR_8547_E  0x803901
+#define SVR_8548    0x803100
+#define SVR_8548_E  0x803900
+#define SVR_8555    0x807100
+#define SVR_8555_E  0x807900
+#define SVR_8560    0x807000
+#define SVR_8567    0x807600
+#define SVR_8567_E  0x807E00
+#define SVR_8568    0x807500
+#define SVR_8568_E  0x807D00
+#define SVR_8569    0x808000
+#define SVR_8569_E  0x808800
+#define SVR_8572    0x80E000
+#define SVR_8572_E  0x80E800
+#define SVR_P2020   0x80E200
+#define SVR_P2020_E 0x80EA00
 
-#define SVR_8610	0x80A000
-#define SVR_8641	0x809000
-#define SVR_8641D	0x809001
+#define SVR_8610    0x80A000
+#define SVR_8641    0x809000
+#define SVR_8641D   0x809001
 
 #define _GLOBAL(n)\
-	.globl n;\
+    .globl n;\
 n:
 
 /* Macros for setting and retrieving special purpose registers */
 
-#define stringify(s)	tostring(s)
-#define tostring(s)	#s
+#define stringify(s)    tostring(s)
+#define tostring(s) #s
 
-#define mfdcr(rn)	({unsigned int rval; \
-			asm volatile("mfdcr %0," stringify(rn) \
-				     : "=r" (rval)); rval;})
-#define mtdcr(rn, v)	asm volatile("mtdcr " stringify(rn) ",%0" : : "r" (v))
+#define mfdcr(rn)   ({unsigned int rval; \
+            asm volatile("mfdcr %0," stringify(rn) \
+                     : "=r" (rval)); rval;})
+#define mtdcr(rn, v)    asm volatile("mtdcr " stringify(rn) ",%0" : : "r" (v))
 
-#define mfmsr()		({unsigned int rval; \
-			asm volatile("mfmsr %0" : "=r" (rval)); rval;})
-#define mtmsr(v)	asm volatile("mtmsr %0" : : "r" (v))
+#define mfmsr()     ({unsigned int rval; \
+            asm volatile("mfmsr %0" : "=r" (rval)); rval;})
+#define mtmsr(v)    asm volatile("mtmsr %0" : : "r" (v))
 
-#define mfspr(rn)	({unsigned int rval; \
-			asm volatile("mfspr %0," stringify(rn) \
-				     : "=r" (rval)); rval;})
-#define mtspr(rn, v)	asm volatile("mtspr " stringify(rn) ",%0" : : "r" (v))
+#define mfspr(rn)   ({unsigned int rval; \
+            asm volatile("mfspr %0," stringify(rn) \
+                     : "=r" (rval)); rval;})
+#define mtspr(rn, v)    asm volatile("mtspr " stringify(rn) ",%0" : : "r" (v))
 
-#define tlbie(v)	asm volatile("tlbie %0 \n sync" : : "r" (v))
+#define tlbie(v)    asm volatile("tlbie %0 \n sync" : : "r" (v))
 
 /* Segment Registers */
 
-#define SR0	0
-#define SR1	1
-#define SR2	2
-#define SR3	3
-#define SR4	4
-#define SR5	5
-#define SR6	6
-#define SR7	7
-#define SR8	8
-#define SR9	9
-#define SR10	10
-#define SR11	11
-#define SR12	12
-#define SR13	13
-#define SR14	14
-#define SR15	15
+#define SR0 0
+#define SR1 1
+#define SR2 2
+#define SR3 3
+#define SR4 4
+#define SR5 5
+#define SR6 6
+#define SR7 7
+#define SR8 8
+#define SR9 9
+#define SR10    10
+#define SR11    11
+#define SR12    12
+#define SR13    13
+#define SR14    14
+#define SR15    15
 
 #ifndef __ASSEMBLY__
 
 struct cpu_type {
-	char name[15];
-	u32 soc_ver;
+    char name[15];
+    u32 soc_ver;
 };
 
 struct cpu_type *identify_cpu(u32 ver);
 
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 #define CPU_TYPE_ENTRY(n, v) \
-	{ .name = #n, .soc_ver = SVR_##v, }
+    { .name = #n, .soc_ver = SVR_##v, }
 #else
 #if defined(CONFIG_MPC83xx)
 #define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
@@ -1120,65 +1120,65 @@ extern struct task_struct *last_task_used_altivec;
  * as soon as I get around to remapping the io areas with the BATs
  * to match the mac we can raise this. -- Cort
  */
-#define TASK_SIZE	(0x80000000UL)
+#define TASK_SIZE   (0x80000000UL)
 
 /* This decides where the kernel will search for a free chunk of vm
  * space during mmap's.
  */
-#define TASK_UNMAPPED_BASE	(TASK_SIZE / 8 * 3)
+#define TASK_UNMAPPED_BASE  (TASK_SIZE / 8 * 3)
 
 typedef struct {
-	unsigned long seg;
+    unsigned long seg;
 } mm_segment_t;
 
 struct thread_struct {
-	unsigned long	ksp;		/* Kernel stack pointer */
-	unsigned long	wchan;		/* Event task is sleeping on */
-	struct pt_regs	*regs;		/* Pointer to saved register state */
-	mm_segment_t	fs;		/* for get_fs() validation */
-	void		*pgdir;		/* root of page-table tree */
-	signed long	last_syscall;
-	double		fpr[32];	/* Complete floating point set */
-	unsigned long	fpscr_pad;	/* fpr ... fpscr must be contiguous */
-	unsigned long	fpscr;		/* Floating point status */
+    unsigned long   ksp;        /* Kernel stack pointer */
+    unsigned long   wchan;      /* Event task is sleeping on */
+    struct pt_regs  *regs;      /* Pointer to saved register state */
+    mm_segment_t    fs;     /* for get_fs() validation */
+    void        *pgdir;     /* root of page-table tree */
+    signed long last_syscall;
+    double      fpr[32];    /* Complete floating point set */
+    unsigned long   fpscr_pad;  /* fpr ... fpscr must be contiguous */
+    unsigned long   fpscr;      /* Floating point status */
 #ifdef CONFIG_ALTIVEC
-	vector128	vr[32];		/* Complete AltiVec set */
-	vector128	vscr;		/* AltiVec status */
-	unsigned long	vrsave;
+    vector128   vr[32];     /* Complete AltiVec set */
+    vector128   vscr;       /* AltiVec status */
+    unsigned long   vrsave;
 #endif /* CONFIG_ALTIVEC */
 };
 
-#define INIT_SP		(sizeof(init_stack) + (unsigned long) &init_stack)
+#define INIT_SP     (sizeof(init_stack) + (unsigned long) &init_stack)
 
 #define INIT_THREAD  { \
-	INIT_SP, /* ksp */ \
-	0, /* wchan */ \
-	(struct pt_regs *)INIT_SP - 1, /* regs */ \
-	KERNEL_DS, /*fs*/ \
-	swapper_pg_dir, /* pgdir */ \
-	0, /* last_syscall */ \
-	{0}, 0, 0 \
+    INIT_SP, /* ksp */ \
+    0, /* wchan */ \
+    (struct pt_regs *)INIT_SP - 1, /* regs */ \
+    KERNEL_DS, /*fs*/ \
+    swapper_pg_dir, /* pgdir */ \
+    0, /* last_syscall */ \
+    {0}, 0, 0 \
 }
 
 /*
  * Note: the vm_start and vm_end fields here should *not*
- * be in kernel space.	(Could vm_end == vm_start perhaps?)
+ * be in kernel space.  (Could vm_end == vm_start perhaps?)
  */
 #define INIT_MMAP { &init_mm, 0, 0x1000, NULL, \
-		    PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, \
-		    1, NULL, NULL }
+            PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, \
+            1, NULL, NULL }
 
 /*
  * Return saved PC of a blocked thread. For now, this is the "user" PC
  */
 static inline unsigned long thread_saved_pc(struct thread_struct *t)
 {
-	return (t->regs) ? t->regs->nip : 0;
+    return (t->regs) ? t->regs->nip : 0;
 }
 
-#define copy_segments(tsk, mm)		do { } while (0)
-#define release_segments(mm)		do { } while (0)
-#define forget_segments()		do { } while (0)
+#define copy_segments(tsk, mm)      do { } while (0)
+#define release_segments(mm)        do { } while (0)
+#define forget_segments()       do { } while (0)
 
 unsigned long get_wchan(struct task_struct *p);
 
@@ -1190,16 +1190,16 @@ unsigned long get_wchan(struct task_struct *p);
  */
 #define THREAD_SIZE (2*PAGE_SIZE)
 #define alloc_task_struct() \
-	((struct task_struct *) __get_free_pages(GFP_KERNEL,1))
-#define free_task_struct(p)	free_pages((unsigned long)(p),1)
-#define get_task_struct(tsk)	  atomic_inc(&mem_map[MAP_NR(tsk)].count)
+    ((struct task_struct *) __get_free_pages(GFP_KERNEL,1))
+#define free_task_struct(p) free_pages((unsigned long)(p),1)
+#define get_task_struct(tsk)      atomic_inc(&mem_map[MAP_NR(tsk)].count)
 
 /* in process.c - for early bootup debug -- Cort */
 int ll_printk(const char *, ...);
 void ll_puts(const char *);
 
-#define init_task	(init_task_union.task)
-#define init_stack	(init_task_union.stack)
+#define init_task   (init_task_union.task)
+#define init_stack  (init_task_union.stack)
 
 /* In misc.c */
 void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
@@ -1212,7 +1212,7 @@ void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
 #define have_of 0
 #elif defined(CONFIG_OAK)
 #define _machine _MACH_oak
-#define have_of	0
+#define have_of 0
 #elif defined(CONFIG_WALNUT)
 #define _machine _MACH_walnut
 #define have_of 0
diff --git a/libcpu/ppc/ppc405/include/asm/ptrace.h b/libcpu/ppc/ppc405/include/asm/ptrace.h
index d531de889b..d450803f96 100644
--- a/libcpu/ppc/ppc405/include/asm/ptrace.h
+++ b/libcpu/ppc/ppc405/include/asm/ptrace.h
@@ -26,27 +26,27 @@
 #define PPC_REG unsigned long
 #endif
 struct pt_regs {
-	PPC_REG gpr[32];
-	PPC_REG nip;
-	PPC_REG msr;
-	PPC_REG orig_gpr3;	/* Used for restarting system calls */
-	PPC_REG ctr;
-	PPC_REG link;
-	PPC_REG xer;
-	PPC_REG ccr;
-	PPC_REG mq;		/* 601 only (not used at present) */
-				    /* Used on APUS to hold IPL value. */
-	PPC_REG trap;		/* Reason for being here */
-	PPC_REG dar;		/* Fault registers */
-	PPC_REG dsisr;
-	PPC_REG result;		/* Result of a system call */
+    PPC_REG gpr[32];
+    PPC_REG nip;
+    PPC_REG msr;
+    PPC_REG orig_gpr3;  /* Used for restarting system calls */
+    PPC_REG ctr;
+    PPC_REG link;
+    PPC_REG xer;
+    PPC_REG ccr;
+    PPC_REG mq;     /* 601 only (not used at present) */
+                    /* Used on APUS to hold IPL value. */
+    PPC_REG trap;       /* Reason for being here */
+    PPC_REG dar;        /* Fault registers */
+    PPC_REG dsisr;
+    PPC_REG result;     /* Result of a system call */
 }__attribute__((packed)) CELL_STACK_FRAME_t;
 #endif
 
-#define STACK_FRAME_OVERHEAD	16	/* size of minimum stack frame */
+#define STACK_FRAME_OVERHEAD    16  /* size of minimum stack frame */
 
 /* Size of stack frame allocated when calling signal handler. */
-#define __SIGNAL_FRAMESIZE	64
+#define __SIGNAL_FRAMESIZE  64
 
 #define instruction_pointer(regs) ((regs)->nip)
 #define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
@@ -56,51 +56,51 @@ struct pt_regs {
  * These can't be changed without breaking binary compatibility
  * with MkLinux, etc.
  */
-#define PT_R0	0
-#define PT_R1	1
-#define PT_R2	2
-#define PT_R3	3
-#define PT_R4	4
-#define PT_R5	5
-#define PT_R6	6
-#define PT_R7	7
-#define PT_R8	8
-#define PT_R9	9
-#define PT_R10	10
-#define PT_R11	11
-#define PT_R12	12
-#define PT_R13	13
-#define PT_R14	14
-#define PT_R15	15
-#define PT_R16	16
-#define PT_R17	17
-#define PT_R18	18
-#define PT_R19	19
-#define PT_R20	20
-#define PT_R21	21
-#define PT_R22	22
-#define PT_R23	23
-#define PT_R24	24
-#define PT_R25	25
-#define PT_R26	26
-#define PT_R27	27
-#define PT_R28	28
-#define PT_R29	29
-#define PT_R30	30
-#define PT_R31	31
+#define PT_R0   0
+#define PT_R1   1
+#define PT_R2   2
+#define PT_R3   3
+#define PT_R4   4
+#define PT_R5   5
+#define PT_R6   6
+#define PT_R7   7
+#define PT_R8   8
+#define PT_R9   9
+#define PT_R10  10
+#define PT_R11  11
+#define PT_R12  12
+#define PT_R13  13
+#define PT_R14  14
+#define PT_R15  15
+#define PT_R16  16
+#define PT_R17  17
+#define PT_R18  18
+#define PT_R19  19
+#define PT_R20  20
+#define PT_R21  21
+#define PT_R22  22
+#define PT_R23  23
+#define PT_R24  24
+#define PT_R25  25
+#define PT_R26  26
+#define PT_R27  27
+#define PT_R28  28
+#define PT_R29  29
+#define PT_R30  30
+#define PT_R31  31
 
-#define PT_NIP	32
-#define PT_MSR	33
+#define PT_NIP  32
+#define PT_MSR  33
 #ifdef __KERNEL__
 #define PT_ORIG_R3 34
 #endif
-#define PT_CTR	35
-#define PT_LNK	36
-#define PT_XER	37
-#define PT_CCR	38
-#define PT_MQ	39
+#define PT_CTR  35
+#define PT_LNK  36
+#define PT_XER  37
+#define PT_CCR  38
+#define PT_MQ   39
 
-#define PT_FPR0	48	/* each FP reg occupies 2 slots in this space */
+#define PT_FPR0 48  /* each FP reg occupies 2 slots in this space */
 #define PT_FPR31 (PT_FPR0 + 2*31)
 #define PT_FPSCR (PT_FPR0 + 2*32 + 1)
 
diff --git a/libcpu/ppc/ppc405/include/asm/types.h b/libcpu/ppc/ppc405/include/asm/types.h
index 6413895325..88c38e62cc 100644
--- a/libcpu/ppc/ppc405/include/asm/types.h
+++ b/libcpu/ppc/ppc405/include/asm/types.h
@@ -27,7 +27,7 @@ __extension__ typedef unsigned long long __u64;
 #endif
 
 typedef struct {
-	__u32 u[4];
+    __u32 u[4];
 } __attribute__((aligned(16))) vector128;
 
 #ifdef __KERNEL__
diff --git a/libcpu/ppc/ppc405/include/config.h b/libcpu/ppc/ppc405/include/config.h
index dc01549b01..d464a3e371 100644
--- a/libcpu/ppc/ppc405/include/config.h
+++ b/libcpu/ppc/ppc405/include/config.h
@@ -1,25 +1,25 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_405EP		1	/* this is a PPC405 CPU */
-#define CONFIG_4xx		1	/*  member of PPC4xx family */
+#define CONFIG_405EP        1   /* this is a PPC405 CPU */
+#define CONFIG_4xx      1   /*  member of PPC4xx family */
 
-#define CONFIG_SYS_DCACHE_SIZE	(16 << 10)/* For AMCC 405 CPUs	*/
-#define CONFIG_SYS_SDRAM_BASE	0x00000000	/* _must_ be 0		*/
+#define CONFIG_SYS_DCACHE_SIZE  (16 << 10)/* For AMCC 405 CPUs  */
+#define CONFIG_SYS_SDRAM_BASE   0x00000000  /* _must_ be 0      */
 
-#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size	*/
-#define CONFIG_SYS_PROMPT	"=> "	/* Monitor Command Prompt	*/
-#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_CBSIZE   256 /* Console I/O Buffer Size  */
+#define CONFIG_SYS_PROMPT   "=> "   /* Monitor Command Prompt   */
+#define CONFIG_SYS_PBSIZE   (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 
-#define CONFIG_SYS_CLK_RECFG	0	/* Config the sys clks */
+#define CONFIG_SYS_CLK_RECFG    0   /* Config the sys clks */
 #define CONFIG_SYS_CLK_FREQ     33333333 /*3300000*//* external frequency to pll   */
 #define CONFIG_SYS_HZ           100
-#define CONFIG_SYS_PIT_RELOAD   (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)  
+#define CONFIG_SYS_PIT_RELOAD   (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
 
 /*
  * UART
  */
-#define CONFIG_BAUDRATE		115200
+#define CONFIG_BAUDRATE     115200
 #define CONFIG_SERIAL_MULTI
 #define CONFIG_SYS_BAUDRATE_TABLE  \
     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
@@ -33,26 +33,26 @@
  * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
  * set Linux BASE_BAUD to 403200.
  */
-#define CONFIG_SYS_BASE_BAUD		691200
-#define CONFIG_UART1_CONSOLE		1
+#define CONFIG_SYS_BASE_BAUD        691200
+#define CONFIG_UART1_CONSOLE        1
 
 /*-----------------------------------------------------------------------
  * Start addresses for the final memory configuration
  * (Set up by the startup code)
  */
-#define CONFIG_SYS_FLASH_BASE		0xFFE00000
+#define CONFIG_SYS_FLASH_BASE       0xFFE00000
 
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
-#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/
+#define CONFIG_SYS_MAX_FLASH_BANKS  2   /* max number of memory banks       */
+#define CONFIG_SYS_MAX_FLASH_SECT   256 /* max number of sectors on one chip    */
 
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
+#define CONFIG_SYS_FLASH_ERASE_TOUT 120000  /* Timeout for Flash Erase (in ms)  */
+#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms)  */
 
 #define CONFIG_SYS_FLASH_ADDR0         0x555
 #define CONFIG_SYS_FLASH_ADDR1         0x2aa
 #define CONFIG_SYS_FLASH_WORD_SIZE     unsigned short
 
-#endif	/* __CONFIG_H */
+#endif  /* __CONFIG_H */
diff --git a/libcpu/ppc/ppc405/interrupt.c b/libcpu/ppc/ppc405/interrupt.c
index 27a528e2f0..f072dd07e1 100644
--- a/libcpu/ppc/ppc405/interrupt.c
+++ b/libcpu/ppc/ppc405/interrupt.c
@@ -28,18 +28,18 @@ rt_uint32_t rt_thread_switch_interrput_flag;
 
 rt_isr_handler_t rt_hw_interrupt_handler(rt_uint32_t vector, void* param)
 {
-	rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
-	return RT_NULL;
+    rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
+    return RT_NULL;
 }
 
 void uic_irq_ack(unsigned int vec)
 {
-	mtdcr(uic0sr, UIC_MASK(vec));
+    mtdcr(uic0sr, UIC_MASK(vec));
 }
 
 void  uic_int_handler (unsigned int vec)
 {
-	rt_interrupt_enter();
+    rt_interrupt_enter();
 
     /* Allow external interrupts to the CPU. */
     if (isr_table [vec].handler != 0)
@@ -47,91 +47,91 @@ void  uic_int_handler (unsigned int vec)
        (*isr_table[vec].handler)(vec, isr_table[vec].param);
     }
     uic_irq_ack(vec);
-	
+
     rt_interrupt_leave();
 }
 
 /* handler for UIC interrupt */
 void uic_interrupt(rt_uint32_t uic_base, int vec_base)
 {
-	int vec;
-	rt_uint32_t uic_msr;
-	rt_uint32_t msr_shift;
+    int vec;
+    rt_uint32_t uic_msr;
+    rt_uint32_t msr_shift;
 
-	/*
-	 * Read masked interrupt status register to determine interrupt source
-	 */
-	uic_msr = get_dcr(uic_base + UIC_MSR);
-	msr_shift = uic_msr;
-	vec = vec_base;
+    /*
+     * Read masked interrupt status register to determine interrupt source
+     */
+    uic_msr = get_dcr(uic_base + UIC_MSR);
+    msr_shift = uic_msr;
+    vec = vec_base;
 
-	while (msr_shift != 0)
-	{
-		if (msr_shift & 0x80000000)
-			uic_int_handler(vec);
+    while (msr_shift != 0)
+    {
+        if (msr_shift & 0x80000000)
+            uic_int_handler(vec);
 
-		/*
-		 * Shift msr to next position and increment vector
-		 */
-		msr_shift <<= 1;
-		vec++;
-	}
+        /*
+         * Shift msr to next position and increment vector
+         */
+        msr_shift <<= 1;
+        vec++;
+    }
 }
 
-rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, 
+rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler,
     void* param, const char* name)
 {
-    int	intVal;
+    int intVal;
     rt_isr_handler_t old_handler;
 
-    if (((int)vector < 0)  || ((int) vector >= MAX_HANDLERS)) 
-	{
+    if (((int)vector < 0)  || ((int) vector >= MAX_HANDLERS))
+    {
         return RT_NULL;   /*  out of range  */
-	}
-   
+    }
+
     /* install the handler in the system interrupt table  */
     intVal = rt_hw_interrupt_disable (); /* lock interrupts to prevent races */
 
     old_handler = isr_table[vector].handler;
     isr_table[vector].handler = new_handler;
     isr_table[vector].param = param;
-    
+
     rt_hw_interrupt_enable (intVal);
 }
 
 void rt_hw_interrupt_mask(int vector)
 {
-	mtdcr(uic0er, mfdcr(uic0er) & ~UIC_MASK(vector));
+    mtdcr(uic0er, mfdcr(uic0er) & ~UIC_MASK(vector));
 }
 
 void rt_hw_interrupt_unmask(int vector)
 {
-	mtdcr(uic0er, mfdcr(uic0er) | UIC_MASK(vector));
+    mtdcr(uic0er, mfdcr(uic0er) | UIC_MASK(vector));
 }
 
 void rt_hw_interrupt_init()
 {
-	int vector;
+    int vector;
     rt_uint32_t pit_value;
 
     pit_value = RT_TICK_PER_SECOND * (100000000 / RT_CPU_FREQ);
 
     /* enable pit */
-	mtspr(SPRN_PIT, pit_value);
-	mtspr(SPRN_TCR, 0x4400000);
+    mtspr(SPRN_PIT, pit_value);
+    mtspr(SPRN_TCR, 0x4400000);
 
-	/* set default interrupt handler */
+    /* set default interrupt handler */
     for (vector = 0; vector < MAX_HANDLERS; vector++)
     {
-	    isr_table [vector].handler = (rt_isr_handler_t)rt_hw_interrupt_handler;
+        isr_table [vector].handler = (rt_isr_handler_t)rt_hw_interrupt_handler;
         isr_table [vector].param = RT_NULL;
     }
 
-	/* initialize interrupt nest, and context in thread sp */
-	rt_interrupt_nest = 0;
-	rt_interrupt_from_thread = 0;
-	rt_interrupt_to_thread = 0;
-	rt_thread_switch_interrput_flag = 0;
+    /* initialize interrupt nest, and context in thread sp */
+    rt_interrupt_nest = 0;
+    rt_interrupt_from_thread = 0;
+    rt_interrupt_to_thread = 0;
+    rt_thread_switch_interrput_flag = 0;
 }
 
 /*@}*/
diff --git a/libcpu/ppc/ppc405/io.h b/libcpu/ppc/ppc405/io.h
index 32fcd56307..28341ead64 100644
--- a/libcpu/ppc/ppc405/io.h
+++ b/libcpu/ppc/ppc405/io.h
@@ -12,82 +12,82 @@
  */
 static inline int in_8(const volatile unsigned char __iomem *addr)
 {
-	int ret;
+    int ret;
 
-	__asm__ __volatile__(
-		"sync; lbz%U1%X1 %0,%1;\n"
-		"twi 0,%0,0;\n"
-		"isync" : "=r" (ret) : "m" (*addr));
-	return ret;
+    __asm__ __volatile__(
+        "sync; lbz%U1%X1 %0,%1;\n"
+        "twi 0,%0,0;\n"
+        "isync" : "=r" (ret) : "m" (*addr));
+    return ret;
 }
 
 static inline void out_8(volatile unsigned char __iomem *addr, int val)
 {
-	__asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
+    __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
 }
 
 extern inline int in_le16(const volatile unsigned short __iomem *addr)
 {
-	int ret;
+    int ret;
 
-	__asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
-			     "twi 0,%0,0;\n"
-			     "isync" : "=r" (ret) :
-			      "r" (addr), "m" (*addr));
-	return ret;
+    __asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
+                 "twi 0,%0,0;\n"
+                 "isync" : "=r" (ret) :
+                  "r" (addr), "m" (*addr));
+    return ret;
 }
 
 extern inline int in_be16(const volatile unsigned short __iomem *addr)
 {
-	int ret;
+    int ret;
 
-	__asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
-			     "twi 0,%0,0;\n"
-			     "isync" : "=r" (ret) : "m" (*addr));
-	return ret;
+    __asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
+                 "twi 0,%0,0;\n"
+                 "isync" : "=r" (ret) : "m" (*addr));
+    return ret;
 }
 
 extern inline void out_le16(volatile unsigned short __iomem *addr, int val)
 {
-	__asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
-			      "r" (val), "r" (addr));
+    __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
+                  "r" (val), "r" (addr));
 }
 
 extern inline void out_be16(volatile unsigned short __iomem *addr, int val)
 {
-	__asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
+    __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
 }
 
 extern inline unsigned in_le32(const volatile unsigned __iomem *addr)
 {
-	unsigned ret;
+    unsigned ret;
 
-	__asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
-			     "twi 0,%0,0;\n"
-			     "isync" : "=r" (ret) :
-			     "r" (addr), "m" (*addr));
-	return ret;
+    __asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
+                 "twi 0,%0,0;\n"
+                 "isync" : "=r" (ret) :
+                 "r" (addr), "m" (*addr));
+    return ret;
 }
 
 extern inline unsigned in_be32(const volatile unsigned __iomem *addr)
 {
-	unsigned ret;
+    unsigned ret;
 
-	__asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
-			     "twi 0,%0,0;\n"
-			     "isync" : "=r" (ret) : "m" (*addr));
-	return ret;
+    __asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
+                 "twi 0,%0,0;\n"
+                 "isync" : "=r" (ret) : "m" (*addr));
+    return ret;
 }
 
 extern inline void out_le32(volatile unsigned __iomem *addr, int val)
 {
-	__asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
-			     "r" (val), "r" (addr));
+    __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
+                 "r" (val), "r" (addr));
 }
 
 extern inline void out_be32(volatile unsigned __iomem *addr, int val)
 {
-	__asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
+    __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
 }
 
 #endif
diff --git a/libcpu/ppc/ppc405/serial.c b/libcpu/ppc/ppc405/serial.c
index ac68a13748..1fc9039769 100644
--- a/libcpu/ppc/ppc405/serial.c
+++ b/libcpu/ppc/ppc405/serial.c
@@ -12,18 +12,18 @@
 #define UCR1_UDIV_POS   8
 #define UDIV_MAX        127
 
-#define UART_RBR		0x00
-#define UART_THR		0x00
-#define UART_IER		0x01
-#define UART_IIR		0x02
-#define UART_FCR		0x02
-#define UART_LCR		0x03
-#define UART_MCR		0x04
-#define UART_LSR		0x05
-#define UART_MSR		0x06
-#define UART_SCR		0x07
-#define UART_DLL		0x00
-#define UART_DLM		0x01
+#define UART_RBR        0x00
+#define UART_THR        0x00
+#define UART_IER        0x01
+#define UART_IIR        0x02
+#define UART_FCR        0x02
+#define UART_LCR        0x03
+#define UART_MCR        0x04
+#define UART_LSR        0x05
+#define UART_MSR        0x06
+#define UART_SCR        0x07
+#define UART_DLL        0x00
+#define UART_DLM        0x01
 
 /*-----------------------------------------------------------------------------+
   | Line Status Register.
@@ -40,280 +40,280 @@
 /* PPC405 serial device */
 struct rt_ppc405_serial
 {
-	/* inherit from device */
-	struct rt_device parent;
+    /* inherit from device */
+    struct rt_device parent;
 
-	rt_uint32_t hw_base;
-	rt_uint32_t irqno;
-	rt_uint32_t baudrate;
+    rt_uint32_t hw_base;
+    rt_uint32_t irqno;
+    rt_uint32_t baudrate;
 
-	/* reception field */
-	rt_uint16_t save_index, read_index;
-	rt_uint8_t  rx_buffer[RT_UART_RX_BUFFER_SIZE];
+    /* reception field */
+    rt_uint16_t save_index, read_index;
+    rt_uint8_t  rx_buffer[RT_UART_RX_BUFFER_SIZE];
 };
 struct rt_ppc405_serial ppc405_serial;
 
 /* serial character device */
 static rt_err_t rt_serial_init (rt_device_t dev)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	struct rt_ppc405_serial* device;
-	device = (struct rt_ppc405_serial*) dev;
-	
-	RT_ASSERT(device != RT_NULL);
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		/* Enable "RX Data Available" Interrupt on UART */
-		out_8((rt_uint8_t*)device->hw_base + UART_IER, 0x01);
-		/* Setup UART FIFO: RX trigger level: 1 byte, Enable FIFO */
-		out_8((rt_uint8_t*)device->hw_base + UART_FCR, 1);
+    struct rt_ppc405_serial* device;
+    device = (struct rt_ppc405_serial*) dev;
 
-	    /* init UART rx interrupt */
-	    rt_hw_interrupt_unmask(device->irqno);
-	}
+    RT_ASSERT(device != RT_NULL);
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        /* Enable "RX Data Available" Interrupt on UART */
+        out_8((rt_uint8_t*)device->hw_base + UART_IER, 0x01);
+        /* Setup UART FIFO: RX trigger level: 1 byte, Enable FIFO */
+        out_8((rt_uint8_t*)device->hw_base + UART_FCR, 1);
 
-	return RT_EOK;
+        /* init UART rx interrupt */
+        rt_hw_interrupt_unmask(device->irqno);
+    }
+
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_close(rt_device_t dev)
 {
-	struct rt_ppc405_serial* device;
-	device = (struct rt_ppc405_serial*) dev;
-	
-	RT_ASSERT(device != RT_NULL);
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		/* mask UART rx interrupt */
-	    rt_hw_interrupt_mask(device->irqno);
-	}
+    struct rt_ppc405_serial* device;
+    device = (struct rt_ppc405_serial*) dev;
 
-	return RT_EOK;
+    RT_ASSERT(device != RT_NULL);
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        /* mask UART rx interrupt */
+        rt_hw_interrupt_mask(device->irqno);
+    }
+
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_control(rt_device_t dev, int cmd, void *args)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	struct rt_ppc405_serial* device;
+    rt_uint8_t* ptr;
+    struct rt_ppc405_serial* device;
 
-	device = (struct rt_ppc405_serial*) dev;
-	RT_ASSERT(device != RT_NULL);
+    device = (struct rt_ppc405_serial*) dev;
+    RT_ASSERT(device != RT_NULL);
 
-	/* point to buffer */
-	ptr = (rt_uint8_t*) buffer;
+    /* point to buffer */
+    ptr = (rt_uint8_t*) buffer;
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		while (size)
-		{
-			/* interrupt receive */
-			rt_base_t level;
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        while (size)
+        {
+            /* interrupt receive */
+            rt_base_t level;
 
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
-			if (device->read_index != device->save_index)
-			{
-				*ptr = device->rx_buffer[device->read_index];
+            /* disable interrupt */
+            level = rt_hw_interrupt_disable();
+            if (device->read_index != device->save_index)
+            {
+                *ptr = device->rx_buffer[device->read_index];
 
-				device->read_index ++;
-				if (device->read_index >= RT_UART_RX_BUFFER_SIZE)
-					device->read_index = 0;
-			}
-			else
-			{
-				/* no data in rx buffer */
+                device->read_index ++;
+                if (device->read_index >= RT_UART_RX_BUFFER_SIZE)
+                    device->read_index = 0;
+            }
+            else
+            {
+                /* no data in rx buffer */
 
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-				break;
-			}
+                /* enable interrupt */
+                rt_hw_interrupt_enable(level);
+                break;
+            }
 
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
+            /* enable interrupt */
+            rt_hw_interrupt_enable(level);
 
-			ptr ++; size --;
-		}
+            ptr ++; size --;
+        }
 
-		return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
-	}
-	else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
-	{
-		/* not support right now */
-		RT_ASSERT(0);
-	}
+        return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+    }
+    else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
+    {
+        /* not support right now */
+        RT_ASSERT(0);
+    }
 
-	/* polling mode */
-	RT_ASSERT(0);
+    /* polling mode */
+    RT_ASSERT(0);
 
-	return (rt_size_t)ptr - (rt_size_t)buffer;
+    return (rt_size_t)ptr - (rt_size_t)buffer;
 }
 
 static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
 {
-	char *ptr;
-	struct rt_ppc405_serial* device;
+    char *ptr;
+    struct rt_ppc405_serial* device;
 
-	device = (struct rt_ppc405_serial*) dev;
-	RT_ASSERT(device != RT_NULL);
+    device = (struct rt_ppc405_serial*) dev;
+    RT_ASSERT(device != RT_NULL);
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_TX)
-	{
-		/* not support */
-		RT_ASSERT(0);
-	}
-	else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
-	{
-		/* not support */
-		RT_ASSERT(0);
-	}
+    if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+    {
+        /* not support */
+        RT_ASSERT(0);
+    }
+    else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
+    {
+        /* not support */
+        RT_ASSERT(0);
+    }
 
-	/* polling write */
-	ptr = (char *)buffer;
-	
-	if (dev->flag & RT_DEVICE_FLAG_STREAM)
-	{
-		/* stream mode */
-		while (size)
-		{
-			if (*ptr == '\n')
-			{
-				while ((in_8((rt_uint8_t*)device->hw_base + UART_LSR) & 0x20) != 0x20);
-				out_8((rt_uint8_t*)device->hw_base + UART_THR, '\r');
-			}
+    /* polling write */
+    ptr = (char *)buffer;
 
-			while ((in_8((rt_uint8_t*)device->hw_base + UART_LSR) & 0x20) != 0x20);
-			out_8((rt_uint8_t*)device->hw_base + UART_THR, *ptr);
+    if (dev->flag & RT_DEVICE_FLAG_STREAM)
+    {
+        /* stream mode */
+        while (size)
+        {
+            if (*ptr == '\n')
+            {
+                while ((in_8((rt_uint8_t*)device->hw_base + UART_LSR) & 0x20) != 0x20);
+                out_8((rt_uint8_t*)device->hw_base + UART_THR, '\r');
+            }
 
-			ptr ++;
-			size --;
-		}
-	}
-	else
-	{
-		while (size)
-		{
-			while ((in_8((rt_uint8_t*)device->hw_base + UART_LSR) & 0x20) != 0x20);
-			out_8((rt_uint8_t*)device->hw_base + UART_THR, *ptr);
-			
-			ptr ++;
-			size --;
-		}
-	}
-	
-	return (rt_size_t) ptr - (rt_size_t) buffer;
+            while ((in_8((rt_uint8_t*)device->hw_base + UART_LSR) & 0x20) != 0x20);
+            out_8((rt_uint8_t*)device->hw_base + UART_THR, *ptr);
+
+            ptr ++;
+            size --;
+        }
+    }
+    else
+    {
+        while (size)
+        {
+            while ((in_8((rt_uint8_t*)device->hw_base + UART_LSR) & 0x20) != 0x20);
+            out_8((rt_uint8_t*)device->hw_base + UART_THR, *ptr);
+
+            ptr ++;
+            size --;
+        }
+    }
+
+    return (rt_size_t) ptr - (rt_size_t) buffer;
 }
 
 void rt_serial_set_baudrate(struct rt_ppc405_serial* device)
 {
-	rt_uint32_t bdiv;
+    rt_uint32_t bdiv;
 
-	bdiv = 115200;
-	out_8((rt_uint8_t *)device->hw_base + UART_DLL, bdiv);		/* set baudrate divisor */
-	out_8((rt_uint8_t *)device->hw_base + UART_DLM, bdiv >> 8); /* set baudrate divisor */
+    bdiv = 115200;
+    out_8((rt_uint8_t *)device->hw_base + UART_DLL, bdiv);      /* set baudrate divisor */
+    out_8((rt_uint8_t *)device->hw_base + UART_DLM, bdiv >> 8); /* set baudrate divisor */
 }
 
 void rt_serial_isr(int irqno, void* param)
 {
-	unsigned char status;
-	struct rt_ppc405_serial *device;
+    unsigned char status;
+    struct rt_ppc405_serial *device;
 
-	device = (struct rt_ppc405_serial*) param;
-	status = in_8((rt_uint8_t *)device->hw_base + UART_LSR);
+    device = (struct rt_ppc405_serial*) param;
+    status = in_8((rt_uint8_t *)device->hw_base + UART_LSR);
 
-	if (status & 0x01)
-	{
-		rt_base_t level;
+    if (status & 0x01)
+    {
+        rt_base_t level;
 
-		while (status & 0x01)
-		{
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
+        while (status & 0x01)
+        {
+            /* disable interrupt */
+            level = rt_hw_interrupt_disable();
 
-			/* read character */
-			device->rx_buffer[device->save_index] = (0xff & (int) in_8((rt_uint8_t *)device->hw_base));
-			device->save_index ++;
-			if (device->save_index >= RT_UART_RX_BUFFER_SIZE)
-				device->save_index = 0;
-			
-			/* if the next position is read index, discard this 'read char' */
-			if (device->save_index == device->read_index)
-			{
-				device->read_index ++;
-				if (device->read_index >= RT_UART_RX_BUFFER_SIZE)
-					device->read_index = 0;
-			}
+            /* read character */
+            device->rx_buffer[device->save_index] = (0xff & (int) in_8((rt_uint8_t *)device->hw_base));
+            device->save_index ++;
+            if (device->save_index >= RT_UART_RX_BUFFER_SIZE)
+                device->save_index = 0;
 
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
+            /* if the next position is read index, discard this 'read char' */
+            if (device->save_index == device->read_index)
+            {
+                device->read_index ++;
+                if (device->read_index >= RT_UART_RX_BUFFER_SIZE)
+                    device->read_index = 0;
+            }
 
-			/* check error */
-			if ((status & ( asyncLSRFramingError1 |
-					asyncLSROverrunError1 |
-					asyncLSRParityError1  |
-					asyncLSRBreakInterrupt1 )) != 0)
-			{
-				out_8((rt_uint8_t *)device->hw_base + UART_LSR,
-					  asyncLSRFramingError1 |
-					  asyncLSROverrunError1 |
-					  asyncLSRParityError1  |
-					  asyncLSRBreakInterrupt1);
-			}
+            /* enable interrupt */
+            rt_hw_interrupt_enable(level);
 
-			status = in_8((rt_uint8_t *)device->hw_base + UART_LSR);
-		}
+            /* check error */
+            if ((status & ( asyncLSRFramingError1 |
+                    asyncLSROverrunError1 |
+                    asyncLSRParityError1  |
+                    asyncLSRBreakInterrupt1 )) != 0)
+            {
+                out_8((rt_uint8_t *)device->hw_base + UART_LSR,
+                      asyncLSRFramingError1 |
+                      asyncLSROverrunError1 |
+                      asyncLSRParityError1  |
+                      asyncLSRBreakInterrupt1);
+            }
 
-		/* invoke callback */
-		if(device->parent.rx_indicate != RT_NULL)
-		{
-		  device->parent.rx_indicate(&device->parent, 1);
-		}
-	}
+            status = in_8((rt_uint8_t *)device->hw_base + UART_LSR);
+        }
+
+        /* invoke callback */
+        if(device->parent.rx_indicate != RT_NULL)
+        {
+          device->parent.rx_indicate(&device->parent, 1);
+        }
+    }
 }
 
 void rt_hw_serial_init(void)
 {
-	volatile rt_uint8_t val;
-	struct rt_ppc405_serial* device;
+    volatile rt_uint8_t val;
+    struct rt_ppc405_serial* device;
 
-	device = (struct rt_ppc405_serial*) &ppc405_serial;
-	device->parent.type = RT_Device_Class_Char;
-	
-	device->hw_base = UART0_BASE;
-	device->baudrate = 115200;
-	device->irqno = VECNUM_U0;
-	rt_hw_interrupt_install(device->irqno, rt_serial_isr, device, "serial"); /* install isr */
+    device = (struct rt_ppc405_serial*) &ppc405_serial;
+    device->parent.type = RT_Device_Class_Char;
 
-	rt_memset(device->rx_buffer, 0, sizeof(device->rx_buffer));
-	device->read_index = device->save_index = 0;
+    device->hw_base = UART0_BASE;
+    device->baudrate = 115200;
+    device->irqno = VECNUM_U0;
+    rt_hw_interrupt_install(device->irqno, rt_serial_isr, device, "serial"); /* install isr */
 
-	out_8((rt_uint8_t *)device->hw_base + UART_LCR, 0x80);	/* set DLAB bit */
-	/* setup baudrate */
-	rt_serial_set_baudrate(device);
-	out_8((rt_uint8_t *)device->hw_base + UART_LCR, 0x03);	/* clear DLAB; set 8 bits, no parity */
-	out_8((rt_uint8_t *)device->hw_base + UART_FCR, 0x00);	/* disable FIFO */
-	out_8((rt_uint8_t *)device->hw_base + UART_MCR, 0x00);	/* no modem control DTR RTS */
-	val = in_8((rt_uint8_t *)device->hw_base + UART_LSR);	/* clear line status */
-	val = in_8((rt_uint8_t *)device->hw_base + UART_RBR);	/* read receive buffer */
-	out_8((rt_uint8_t *)device->hw_base + UART_SCR, 0x00);	/* set scratchpad */
-	out_8((rt_uint8_t *)device->hw_base + UART_IER, 0x00);	/* set interrupt enable reg */
+    rt_memset(device->rx_buffer, 0, sizeof(device->rx_buffer));
+    device->read_index = device->save_index = 0;
 
-	device->parent.type     = RT_Device_Class_Char;
-	device->parent.init 	= rt_serial_init;
-	device->parent.open 	= rt_serial_open;
-	device->parent.close    = rt_serial_close;
-	device->parent.read 	= rt_serial_read;
-	device->parent.write    = rt_serial_write;
-	device->parent.control  = rt_serial_control;
-	device->parent.user_data  = RT_NULL;
+    out_8((rt_uint8_t *)device->hw_base + UART_LCR, 0x80);  /* set DLAB bit */
+    /* setup baudrate */
+    rt_serial_set_baudrate(device);
+    out_8((rt_uint8_t *)device->hw_base + UART_LCR, 0x03);  /* clear DLAB; set 8 bits, no parity */
+    out_8((rt_uint8_t *)device->hw_base + UART_FCR, 0x00);  /* disable FIFO */
+    out_8((rt_uint8_t *)device->hw_base + UART_MCR, 0x00);  /* no modem control DTR RTS */
+    val = in_8((rt_uint8_t *)device->hw_base + UART_LSR);   /* clear line status */
+    val = in_8((rt_uint8_t *)device->hw_base + UART_RBR);   /* read receive buffer */
+    out_8((rt_uint8_t *)device->hw_base + UART_SCR, 0x00);  /* set scratchpad */
+    out_8((rt_uint8_t *)device->hw_base + UART_IER, 0x00);  /* set interrupt enable reg */
 
-	rt_device_register(&device->parent, 
-		"uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM);
+    device->parent.type     = RT_Device_Class_Char;
+    device->parent.init     = rt_serial_init;
+    device->parent.open     = rt_serial_open;
+    device->parent.close    = rt_serial_close;
+    device->parent.read     = rt_serial_read;
+    device->parent.write    = rt_serial_write;
+    device->parent.control  = rt_serial_control;
+    device->parent.user_data  = RT_NULL;
+
+    rt_device_register(&device->parent,
+        "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM);
 }
diff --git a/libcpu/ppc/ppc405/traps.c b/libcpu/ppc/ppc405/traps.c
index 1deecbc92b..3ee754da23 100644
--- a/libcpu/ppc/ppc405/traps.c
+++ b/libcpu/ppc/ppc405/traps.c
@@ -7,8 +7,8 @@ extern unsigned long search_exception_table(unsigned long);
 
 /* THIS NEEDS CHANGING to use the board info structure.
  */
-#define END_OF_MEM	0x800000
-#define UICB0_ALL	0
+#define END_OF_MEM  0x800000
+#define UICB0_ALL   0
 
 #define ESR_MCI 0x80000000
 #define ESR_PIL 0x08000000
diff --git a/libcpu/risc-v/common/cpuport.c b/libcpu/risc-v/common/cpuport.c
index 6cb8aaf3e7..622e1bd321 100644
--- a/libcpu/risc-v/common/cpuport.c
+++ b/libcpu/risc-v/common/cpuport.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/risc-v/common/cpuport.h b/libcpu/risc-v/common/cpuport.h
index d6cec2f0cf..e625d9f91f 100644
--- a/libcpu/risc-v/common/cpuport.h
+++ b/libcpu/risc-v/common/cpuport.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,13 +30,13 @@
 #define FSTORE                  fsd
 #define FLOAD                   fld
 #define FREGBYTES               8
-#define rv_floatreg_t           rt_int64_t  	       
+#define rv_floatreg_t           rt_int64_t
 #endif
 #ifdef ARCH_RISCV_FPU_S
 #define FSTORE                  fsw
 #define FLOAD                   flw
 #define FREGBYTES               4
-#define rv_floatreg_t           rt_int32_t  	       
+#define rv_floatreg_t           rt_int32_t
 #endif
 #endif
 
diff --git a/libcpu/risc-v/common/riscv-ops.h b/libcpu/risc-v/common/riscv-ops.h
index 0b321c6de4..35d009ad53 100644
--- a/libcpu/risc-v/common/riscv-ops.h
+++ b/libcpu/risc-v/common/riscv-ops.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/risc-v/common/riscv-plic.h b/libcpu/risc-v/common/riscv-plic.h
index 1da14b2e45..53e19d2962 100644
--- a/libcpu/risc-v/common/riscv-plic.h
+++ b/libcpu/risc-v/common/riscv-plic.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/risc-v/k210/cpuport_smp.c b/libcpu/risc-v/k210/cpuport_smp.c
index 8c57dfeafc..113df9b3e2 100644
--- a/libcpu/risc-v/k210/cpuport_smp.c
+++ b/libcpu/risc-v/k210/cpuport_smp.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/risc-v/k210/interrupt.c b/libcpu/risc-v/k210/interrupt.c
index b582599daf..934acbdbf8 100644
--- a/libcpu/risc-v/k210/interrupt.c
+++ b/libcpu/risc-v/k210/interrupt.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/risc-v/k210/tick.c b/libcpu/risc-v/k210/tick.c
index 144f7f1fff..2a76b50b6d 100644
--- a/libcpu/risc-v/k210/tick.c
+++ b/libcpu/risc-v/k210/tick.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/risc-v/k210/tick.h b/libcpu/risc-v/k210/tick.h
index 0821004263..0bfd6f62e8 100644
--- a/libcpu/risc-v/k210/tick.h
+++ b/libcpu/risc-v/k210/tick.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/risc-v/nuclei/cpuport.c b/libcpu/risc-v/nuclei/cpuport.c
index 717e9bb1c7..e74d174a54 100644
--- a/libcpu/risc-v/nuclei/cpuport.c
+++ b/libcpu/risc-v/nuclei/cpuport.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  * Copyright (c) 2019-Present Nuclei Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
@@ -26,23 +26,23 @@
 
 /**
  * @brief from thread used interrupt context switch
- * 
+ *
  */
 volatile rt_ubase_t  rt_interrupt_from_thread = 0;
 /**
  * @brief to thread used interrupt context switch
- * 
+ *
  */
 volatile rt_ubase_t  rt_interrupt_to_thread   = 0;
 /**
  * @brief flag to indicate context switch in interrupt or not
- * 
+ *
  */
 volatile rt_ubase_t rt_thread_switch_interrupt_flag = 0;
 
 /**
  * @brief thread stack frame of saved context
- * 
+ *
  */
 struct rt_hw_stack_frame
 {
@@ -121,7 +121,7 @@ rt_uint8_t *rt_hw_stack_init(void       *tentry,
 
 /**
  * @brief Do rt-thread context switch in interrupt context
- * 
+ *
  * @param from thread sp of from thread
  * @param to thread sp of to thread
  */
@@ -137,7 +137,7 @@ void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to)
 
 /**
  * @brief Do rt-thread context switch in task context
- * 
+ *
  * @param from thread sp of from thread
  * @param to thread sp of to thread
  */
@@ -150,7 +150,7 @@ void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to)
 
 /**
  * @brief shutdown CPU
- * 
+ *
  */
 RT_WEAK void rt_hw_cpu_shutdown()
 {
@@ -166,9 +166,9 @@ RT_WEAK void rt_hw_cpu_shutdown()
 
 /**
  * @brief Do extra task switch code
- * 
+ *
  * @details
- * 
+ *
  * - Clear software timer interrupt request flag
  * - clear rt_thread_switch_interrupt_flag to 0
  */
@@ -181,9 +181,9 @@ void rt_hw_taskswitch(void)
 
 /**
  * @brief Setup systimer and software timer interrupt
- * 
- * @details 
- * 
+ *
+ * @details
+ *
  * - Set Systimer interrupt as NON-VECTOR interrupt with lowest interrupt level
  * - Set software timer interrupt as VECTOR interrupt with lowest interrupt level
  * - Enable these two interrupts
@@ -216,7 +216,7 @@ void rt_hw_ticksetup(void)
 
 /**
  * @brief This is the timer interrupt service routine.
- * 
+ *
  */
 void SysTick_Handler(void)
 {
@@ -235,13 +235,13 @@ void SysTick_Handler(void)
 
 /**
  * @brief Disable cpu interrupt
- * 
+ *
  * @details
- * 
+ *
  * - Disable cpu interrupt by clear MIE bit in MSTATUS
  * - Return the previous value in MSTATUS before clear MIE bit
- * 
- * @return the previous value in MSTATUS before clear MIE bit 
+ *
+ * @return the previous value in MSTATUS before clear MIE bit
  */
 rt_base_t rt_hw_interrupt_disable(void)
 {
@@ -250,7 +250,7 @@ rt_base_t rt_hw_interrupt_disable(void)
 
 /**
  * @brief Restore previous saved interrupt status
- * 
+ *
  * @param level previous saved MSTATUS value
  */
 void rt_hw_interrupt_enable(rt_base_t level)
diff --git a/libcpu/risc-v/nuclei/cpuport.h b/libcpu/risc-v/nuclei/cpuport.h
index 3736f0078a..1f9634d4b1 100644
--- a/libcpu/risc-v/nuclei/cpuport.h
+++ b/libcpu/risc-v/nuclei/cpuport.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  * Copyright (c) 2019-Present Nuclei Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
diff --git a/libcpu/risc-v/rv32m1/interrupt.c b/libcpu/risc-v/rv32m1/interrupt.c
index 72cb344ff7..8da0dcfda6 100644
--- a/libcpu/risc-v/rv32m1/interrupt.c
+++ b/libcpu/risc-v/rv32m1/interrupt.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/risc-v/t-head/e906/cpuport.c b/libcpu/risc-v/t-head/e906/cpuport.c
index 998bfdc340..0eaf5ffbce 100644
--- a/libcpu/risc-v/t-head/e906/cpuport.c
+++ b/libcpu/risc-v/t-head/e906/cpuport.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -131,7 +131,7 @@ rt_uint8_t *rt_hw_stack_init(void       *tentry,
 
 
 /**
- * This function will disable global interrupt 
+ * This function will disable global interrupt
  *
  * @param none
  *
@@ -145,7 +145,7 @@ rt_base_t rt_hw_interrupt_disable(void)
 }
 
 /**
- * This function will ennable global interrupt 
+ * This function will ennable global interrupt
  *
  * @param level not used
  *
diff --git a/libcpu/risc-v/t-head/e906/cpuport.h b/libcpu/risc-v/t-head/e906/cpuport.h
index 90efc07653..20302f44aa 100644
--- a/libcpu/risc-v/t-head/e906/cpuport.h
+++ b/libcpu/risc-v/t-head/e906/cpuport.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -42,13 +42,13 @@
 #define FSTORE                  fsd
 #define FLOAD                   fld
 #define FREGBYTES               8
-#define rv_floatreg_t           rt_int64_t  	       
+#define rv_floatreg_t           rt_int64_t
 #endif
 #ifdef ARCH_RISCV_FPU_S
 #define FSTORE                  fsw
 #define FLOAD                   flw
 #define FREGBYTES               4
-#define rv_floatreg_t           rt_int32_t  	       
+#define rv_floatreg_t           rt_int32_t
 #endif
 #endif
 
diff --git a/libcpu/rx/cpuport.c b/libcpu/rx/cpuport.c
index a01f598e99..00f9e26ba9 100644
--- a/libcpu/rx/cpuport.c
+++ b/libcpu/rx/cpuport.c
@@ -34,9 +34,9 @@ rt_uint32_t rt_thread_switch_interrupt_flag;
 /* stack frame*/
 struct stack_frame
 {
-    rt_uint32_t ACCLO; 
+    rt_uint32_t ACCLO;
     rt_uint32_t ACCHI;
-    rt_uint32_t FPSW;   
+    rt_uint32_t FPSW;
     rt_uint32_t R1;
     rt_uint32_t R2;
     rt_uint32_t R3;
@@ -53,21 +53,21 @@ struct stack_frame
     rt_uint32_t R14;
     rt_uint32_t R15;
     //there is not R0 register,it is special for stack pointer
-    rt_uint32_t PC;  
-    rt_uint32_t PSW; 
+    rt_uint32_t PC;
+    rt_uint32_t PSW;
 };
 
 /**
  * Initilial the thread stack.
- * 
+ *
  * @author LXZ (2014/11/8)
- * 
- * @param void* tentry       
- * @param void* parameter    
- * @param rt_uint8_t* stack_addr 
- * @param void* texit        
- * 
- * @return rt_uint8_t* 
+ *
+ * @param void* tentry
+ * @param void* parameter
+ * @param rt_uint8_t* stack_addr
+ * @param void* texit
+ *
+ * @return rt_uint8_t*
  */
 rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
                              rt_uint8_t *stack_addr, void *texit)
@@ -77,7 +77,7 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
     unsigned long       i;
 
     stk      = (unsigned long *)stack_addr;
-    *(stk)   = (unsigned long)texit;        
+    *(stk)   = (unsigned long)texit;
     stack_frame = (struct stack_frame *)(stack_addr - sizeof(struct stack_frame)) ;
 
     //Initilial all register
@@ -85,12 +85,12 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
     {
         ((rt_uint32_t *)stack_frame)[i] = 0xdeadbeef;
     }
-    
+
     stack_frame->PSW = (unsigned long)0x00030000 ;   /* psw */
     stack_frame->PC = (unsigned long)tentry;        /* thread entery*/
     stack_frame->R1 = (unsigned long )parameter;   /* r1 : parameter */
     stack_frame->FPSW = 0x00000100;                  /* fpsw */
-    
+
     return(rt_uint8_t *)stack_frame;
 }
 
@@ -99,16 +99,16 @@ extern void list_thread(void);
 #endif
 extern rt_thread_t rt_current_thread;
 /**
- * deal exception 
- * 
+ * deal exception
+ *
  * @author LXZ (2014/11/8)
- * 
- * @param struct stack_frame* exception_contex 
+ *
+ * @param struct stack_frame* exception_contex
  */
 void rt_hw_hard_fault_exception(struct stack_frame* exception_contex)
 {
     if (exception_contex != RT_NULL) {
-        rt_kprintf("psw: 0x%08x\n", exception_contex->PSW); 
+        rt_kprintf("psw: 0x%08x\n", exception_contex->PSW);
         rt_kprintf("pc: 0x%08x\n", exception_contex->PC);
         rt_kprintf("r0: 0x%08x\n", exception_contex->R1);
         rt_kprintf("r0: 0x%08x\n", exception_contex->R2);
@@ -134,17 +134,17 @@ void rt_hw_hard_fault_exception(struct stack_frame* exception_contex)
         list_thread();
     #endif
         while (1);
-    
+
 }
 
 
 /**
  * switch thread in interrupt
- * 
+ *
  * @author LXZ (2014/11/8)
- * 
- * @param rt_uint32_t from 
- * @param rt_uint32_t to 
+ *
+ * @param rt_uint32_t from
+ * @param rt_uint32_t to
  */
 void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to)
 {
@@ -159,11 +159,11 @@ void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to)
 }
 /**
  * switch thread out the interrupt
- * 
+ *
  * @author LXZ (2014/11/8)
- * 
- * @param rt_uint32_t from 
- * @param rt_uint32_t to 
+ *
+ * @param rt_uint32_t from
+ * @param rt_uint32_t to
  */
 void rt_hw_context_switch_interrupt(rt_uint32_t from, rt_uint32_t to)
 {
@@ -179,7 +179,7 @@ void rt_hw_context_switch_interrupt(rt_uint32_t from, rt_uint32_t to)
 
 /**
  * shut down the chip
- * 
+ *
  * @author LXZ (2014/11/8)
  */
 RT_WEAK void rt_hw_cpu_shutdown(void)
@@ -190,10 +190,10 @@ RT_WEAK void rt_hw_cpu_shutdown(void)
 }
 /**
  * switch to the first thread,it just call one time
- * 
+ *
  * @author LXZ (2014/11/8)
- * 
- * @param rt_uint32_t to 
+ *
+ * @param rt_uint32_t to
  */
 void rt_hw_context_switch_to(rt_uint32_t to)
 {
diff --git a/libcpu/sim/posix/cpu_port.c b/libcpu/sim/posix/cpu_port.c
index eb1ae4865c..dc3e9379dd 100644
--- a/libcpu/sim/posix/cpu_port.c
+++ b/libcpu/sim/posix/cpu_port.c
@@ -173,8 +173,8 @@ static void *thread_run(void *parameter)
     /*TODO:
      * 鏈鍚庝竴琛岀殑pthread_exit姘歌繙娌℃湁鏈轰細鎵ц锛岃繖鏄洜涓哄湪threead->exit鍑芥暟涓
      * 浼氬彂鐢熺嚎绋嬪垏鎹紝骞舵案涔呭皢姝thread绾跨▼鎸傝捣锛屾墍浠ユ洿瀹岀編鐨勮В鍐虫柟妗堟槸鍦ㄨ繖
-	 * 閲屽彂閫佷俊鍙风粰涓荤嚎绋嬶紝涓荤嚎绋嬩腑鍐嶆鍞ら啋姝ょ嚎绋嬩护鍏惰嚜鍔ㄩ鍑恒
-	 */
+     * 閲屽彂閫佷俊鍙风粰涓荤嚎绋嬶紝涓荤嚎绋嬩腑鍐嶆鍞ら啋姝ょ嚎绋嬩护鍏惰嚜鍔ㄩ鍑恒
+     */
     //sem_destroy(&thread->sem);
 
     pthread_exit(NULL);
diff --git a/libcpu/sim/win32/cpu_port.c b/libcpu/sim/win32/cpu_port.c
index cc8ad9a25c..621420e7bf 100644
--- a/libcpu/sim/win32/cpu_port.c
+++ b/libcpu/sim/win32/cpu_port.c
@@ -5,7 +5,7 @@
 * Version : V1.00.00
 *
 * By      : prife
-* Version : V1.00.01 
+* Version : V1.00.01
 ************************************************************************************************************************
 */
 
@@ -47,10 +47,10 @@ const DWORD MS_VC_EXCEPTION=0x406D1388;
 #pragma pack(push,8)
 typedef struct tagTHREADNAME_INFO
 {
-	DWORD dwType; // Must be 0x1000.
-	LPCSTR szName; // Pointer to name (in user addr space).
-	DWORD dwThreadID; // Thread ID (-1=caller thread).
-	DWORD dwFlags; // Reserved for future use, must be zero.
+    DWORD dwType; // Must be 0x1000.
+    LPCSTR szName; // Pointer to name (in user addr space).
+    DWORD dwThreadID; // Thread ID (-1=caller thread).
+    DWORD dwFlags; // Reserved for future use, must be zero.
 } THREADNAME_INFO;
 #pragma pack(pop)
 
@@ -115,19 +115,19 @@ static DWORD WINAPI ThreadforKeyGet(LPVOID lpParam);
 static void SetThreadName(DWORD dwThreadID, char* threadName)
 {
 #if defined(_MSC_VER)
-	THREADNAME_INFO info;
-	info.dwType = 0x1000;
-	info.szName = threadName;
-	info.dwThreadID = dwThreadID;
-	info.dwFlags = 0;
+    THREADNAME_INFO info;
+    info.dwType = 0x1000;
+    info.szName = threadName;
+    info.dwThreadID = dwThreadID;
+    info.dwFlags = 0;
 
-	__try
-	{
-		RaiseException( MS_VC_EXCEPTION, 0, sizeof(info)/sizeof(ULONG_PTR), (ULONG_PTR*)&info );
-	}
-	__except(EXCEPTION_EXECUTE_HANDLER)
-	{
-	}
+    __try
+    {
+        RaiseException( MS_VC_EXCEPTION, 0, sizeof(info)/sizeof(ULONG_PTR), (ULONG_PTR*)&info );
+    }
+    __except(EXCEPTION_EXECUTE_HANDLER)
+    {
+    }
 #endif
 }
 
@@ -144,15 +144,15 @@ static void SetThreadName(DWORD dwThreadID, char* threadName)
 
 static DWORD WINAPI thread_run( LPVOID lpThreadParameter )
 {
-	rt_thread_t tid = rt_thread_self();
-	win_thread_t  *pWinThread = (win_thread_t *)lpThreadParameter;
+    rt_thread_t tid = rt_thread_self();
+    win_thread_t  *pWinThread = (win_thread_t *)lpThreadParameter;
 
-	SetThreadName(GetCurrentThreadId(), tid->name);
+    SetThreadName(GetCurrentThreadId(), tid->name);
 
-	pWinThread->Entry(pWinThread->Param);
+    pWinThread->Entry(pWinThread->Param);
 
-	pWinThread->Exit();
-	return 0;	
+    pWinThread->Exit();
+    return 0;
 }
 
 rt_uint8_t* rt_hw_stack_init(void *pEntry,void *pParam,rt_uint8_t *pStackAddr,void *pExit)
@@ -261,7 +261,7 @@ void rt_hw_context_switch_interrupt(rt_uint32_t from,
 
     rt_interrupt_to_thread = *((rt_uint32_t *)(to));
 
-	//trigger YIELD exception(cause context switch)
+    //trigger YIELD exception(cause context switch)
     TriggerSimulateInterrupt(CPU_INTERRUPT_YIELD);
 } /*** rt_hw_context_switch_interrupt ***/
 
@@ -312,7 +312,7 @@ void rt_hw_context_switch(rt_uint32_t from,
 */
 void rt_hw_context_switch_to(rt_uint32_t to)
 {
-	//set to thread
+    //set to thread
     rt_interrupt_to_thread = *((rt_uint32_t *)(to));
 
     //clear from thread
diff --git a/libcpu/ti-dsp/c28x/cpuport.c b/libcpu/ti-dsp/c28x/cpuport.c
index 15041fc846..44876a5af5 100644
--- a/libcpu/ti-dsp/c28x/cpuport.c
+++ b/libcpu/ti-dsp/c28x/cpuport.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/libcpu/unicore32/sep6200/context_gcc.S b/libcpu/unicore32/sep6200/context_gcc.S
index 6b958e7f93..9f8e2b8f13 100644
--- a/libcpu/unicore32/sep6200/context_gcc.S
+++ b/libcpu/unicore32/sep6200/context_gcc.S
@@ -1,21 +1,7 @@
 /*
- * File      : context_gcc.S
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/libcpu/unicore32/sep6200/cpu.c b/libcpu/unicore32/sep6200/cpu.c
index 9452b4e59d..966277295d 100644
--- a/libcpu/unicore32/sep6200/cpu.c
+++ b/libcpu/unicore32/sep6200/cpu.c
@@ -1,21 +1,7 @@
 /*
- * File      : cpu.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -34,23 +20,23 @@
 #ifdef __GNUC__
 rt_inline void cache_invalid(void)
 {
-	__asm__ volatile ("movc	p0.c5, r1, #28\n"
-			"nop;nop;nop;nop;nop;nop;nop;nop;\n"
-			:
-			:
-			:"memory", "cc"
-			);
+    __asm__ volatile ("movc p0.c5, r1, #28\n"
+            "nop;nop;nop;nop;nop;nop;nop;nop;\n"
+            :
+            :
+            :"memory", "cc"
+            );
 }
 
 rt_inline void cache_enable(void)
 {
-	__asm__ volatile ( "movc r1, p0.c1, #0\n"
-			"or r1, r1, #0xc\n"
-			"movc p0.c1, r1, #0\n"
-			"nop;nop;nop;nop;nop;nop;nop;nop;\n"
-			:
-			:
-			:"r0", "memory", "cc");
+    __asm__ volatile ( "movc r1, p0.c1, #0\n"
+            "or r1, r1, #0xc\n"
+            "movc p0.c1, r1, #0\n"
+            "nop;nop;nop;nop;nop;nop;nop;nop;\n"
+            :
+            :
+            :"r0", "memory", "cc");
 }
 
 rt_inline void clean_dcache(void)
@@ -59,8 +45,8 @@ rt_inline void clean_dcache(void)
                "movc p0.c5, ip, #10\n"
                "nop; nop; nop; nop; nop; nop; nop; nop\n"
                :
-	       :
-	       :"ip", "memory", "cc");
+           :
+           :"ip", "memory", "cc");
 }
 
 rt_inline rt_uint32_t icache_status(void)
@@ -91,7 +77,7 @@ rt_inline rt_uint32_t dcache_status(void)
 
 rt_inline void dcache_flush(void)
 {
-	__asm__ volatile ( "mov ip, #0\n"
+    __asm__ volatile ( "mov ip, #0\n"
               "movc p0.c5, ip, #14\n"
               "nop; nop; nop; nop; nop; nop; nop; nop\n"
               :
@@ -101,7 +87,7 @@ rt_inline void dcache_flush(void)
 
 rt_inline void icache_invalid(void)
 {
-	 __asm__ volatile ( "mov r0, #0\n"
+     __asm__ volatile ( "mov r0, #0\n"
                "movc p0.c5, r0, #20\n"
                "nop; nop; nop; nop; nop; nop; nop; nop\n"
                :
@@ -121,8 +107,8 @@ rt_inline void dcache_invalid(void)
 
 rt_inline void icache_disable(void)
 {
-	icache_invalid();
-	__asm__ volatile ( "movc r0, p0.c1, #0\n"
+    icache_invalid();
+    __asm__ volatile ( "movc r0, p0.c1, #0\n"
                "andn r0, r0, #8\n"
                "movc p0.c1, r0, #0\n"
                :
@@ -132,8 +118,8 @@ rt_inline void icache_disable(void)
 
 rt_inline void dcache_disable(void)
 {
-	dcache_flush();
-	__asm__ volatile ( "movc r0, p0.c1, #0\n"
+    dcache_flush();
+    __asm__ volatile ( "movc r0, p0.c1, #0\n"
                "andn r0, r0, #20\n"
                "movc p0.c1, r0, #0\n"
                :
@@ -184,7 +170,7 @@ rt_inline void dcache_enable(void)
  */
 void rt_hw_cpu_icache_enable()
 {
-	icache_enable();
+    icache_enable();
 }
 
 /**
@@ -193,7 +179,7 @@ void rt_hw_cpu_icache_enable()
  */
 void rt_hw_cpu_icache_disable()
 {
-	icache_disable();
+    icache_disable();
 }
 
 /**
@@ -202,7 +188,7 @@ void rt_hw_cpu_icache_disable()
  */
 rt_base_t rt_hw_cpu_icache_status()
 {
-	return icache_status();
+    return icache_status();
 }
 
 /**
@@ -211,7 +197,7 @@ rt_base_t rt_hw_cpu_icache_status()
  */
 void rt_hw_cpu_dcache_enable()
 {
-	dcache_enable();
+    dcache_enable();
 }
 
 /**
@@ -220,7 +206,7 @@ void rt_hw_cpu_dcache_enable()
  */
 void rt_hw_cpu_dcache_disable()
 {
-	dcache_disable();
+    dcache_disable();
 }
 
 /**
@@ -229,29 +215,29 @@ void rt_hw_cpu_dcache_disable()
  */
 rt_base_t rt_hw_cpu_dcache_status()
 {
-	return dcache_status();
+    return dcache_status();
 }
 
 static void sep6200_reset(rt_uint32_t addr)
 {
      __asm__ volatile ( "mov ip, #0\n"
-		     "movc p0.c5, ip, #28\n" /*Cache invalidate all*/
-		     "movc p0.c6, ip, #6\n" /*TLB invalidate all*/
-		     "nop;nop;nop;nop;nop;nop;nop;nop;\n"
-		     "movc ip, p0.c1, #0\n" /*ctrl register*/
-		     "andn ip, ip, #0x000f\n" /*disable caches and mmu*/
-		     "movc p0.c1, ip, #0\n"
-		     "nop\n"
-		     "mov pc, %0\n"
-		     "nop;nop;nop;nop;nop;nop;nop;nop;\n"
-		      : "=&r" (addr)
-		      :
-		      :"memory", "cc");
+             "movc p0.c5, ip, #28\n" /*Cache invalidate all*/
+             "movc p0.c6, ip, #6\n" /*TLB invalidate all*/
+             "nop;nop;nop;nop;nop;nop;nop;nop;\n"
+             "movc ip, p0.c1, #0\n" /*ctrl register*/
+             "andn ip, ip, #0x000f\n" /*disable caches and mmu*/
+             "movc p0.c1, ip, #0\n"
+             "nop\n"
+             "mov pc, %0\n"
+             "nop;nop;nop;nop;nop;nop;nop;nop;\n"
+              : "=&r" (addr)
+              :
+              :"memory", "cc");
 }
 
 static void sep6200_poweroff(void)
 {
-	rt_kprintf("sep6200 power off not implemented\n");
+    rt_kprintf("sep6200 power off not implemented\n");
   while(1);
 }
 
@@ -262,12 +248,12 @@ static void sep6200_poweroff(void)
 RT_WEAK void rt_hw_cpu_reset()
 {
 
-	rt_kprintf("Soft reset, Restarting system...\n");
-	sep6200_reset(0);
+    rt_kprintf("Soft reset, Restarting system...\n");
+    sep6200_reset(0);
 
-	while(1);	/* loop forever and wait for reset to happen */
+    while(1);   /* loop forever and wait for reset to happen */
 
-	/* NEVER REACHED */
+    /* NEVER REACHED */
 }
 
 /**
@@ -276,15 +262,15 @@ RT_WEAK void rt_hw_cpu_reset()
  */
 RT_WEAK void rt_hw_cpu_shutdown()
 {
-	rt_uint32_t level;
-	rt_kprintf("shutdown...\n");
+    rt_uint32_t level;
+    rt_kprintf("shutdown...\n");
 
-	level = rt_hw_interrupt_disable();
-	sep6200_poweroff();
-	while (level)
-	{
-		RT_ASSERT(0);
-	}
+    level = rt_hw_interrupt_disable();
+    sep6200_poweroff();
+    while (level)
+    {
+        RT_ASSERT(0);
+    }
 }
 
 /*@}*/
diff --git a/libcpu/unicore32/sep6200/interrupt.c b/libcpu/unicore32/sep6200/interrupt.c
index 31078320ea..b34e648630 100644
--- a/libcpu/unicore32/sep6200/interrupt.c
+++ b/libcpu/unicore32/sep6200/interrupt.c
@@ -1,21 +1,7 @@
 /*
- * File      : interrupt.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -26,38 +12,38 @@
 #include 
 #include 
 
-#define MAX_HANDLERS	64
+#define MAX_HANDLERS    64
 
 
 #define SEP6200_IRQ_TYPE 0
 #define SEP6200_FIQ_TYPE 1
 
-#define int_enable_all() 					  \
-	do {							  \
-		*(volatile unsigned long*)SEP6200_VIC_INT_EN_L = ~0x0;\
-		*(volatile unsigned long*)SEP6200_VIC_INT_EN_H = ~0x0;\
-	}while(0)
-#define int_disable_all() 					 \
-	do {							 \
-		*(volatile unsigned long*)SEP6200_VIC_INT_EN_L = 0x0;\
-		*(volatile unsigned long*)SEP6200_VIC_INT_EN_H = 0x0;\
-	}while(0)
-#define mask_all_int(int_type)					 \
-	do {							 \
-		if (int_type == SEP6200_IRQ_TYPE){		 \
-		*(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = 0x1;\
-		} else if (int_type == SEP6200_FIQ_TYPE) {\
-		*(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = 0x2;\
-		}\
-	}while(0)
+#define int_enable_all()                      \
+    do {                              \
+        *(volatile unsigned long*)SEP6200_VIC_INT_EN_L = ~0x0;\
+        *(volatile unsigned long*)SEP6200_VIC_INT_EN_H = ~0x0;\
+    }while(0)
+#define int_disable_all()                    \
+    do {                             \
+        *(volatile unsigned long*)SEP6200_VIC_INT_EN_L = 0x0;\
+        *(volatile unsigned long*)SEP6200_VIC_INT_EN_H = 0x0;\
+    }while(0)
+#define mask_all_int(int_type)                   \
+    do {                             \
+        if (int_type == SEP6200_IRQ_TYPE){       \
+        *(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = 0x1;\
+        } else if (int_type == SEP6200_FIQ_TYPE) {\
+        *(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = 0x2;\
+        }\
+    }while(0)
 #define unmask_all_int(int_type)\
-	do {							 \
-		if (int_type == SEP6200_IRQ_TYPE){		 \
-		*(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = ~0x1;\
-		} else if (int_type == SEP6200_FIQ_TYPE) {\
-		*(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = ~0x2;\
-		}\
-	}while(0)
+    do {                             \
+        if (int_type == SEP6200_IRQ_TYPE){       \
+        *(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = ~0x1;\
+        } else if (int_type == SEP6200_FIQ_TYPE) {\
+        *(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = ~0x2;\
+        }\
+    }while(0)
 
 #define SEP6200_INT_SET(intnum)                                     \
 do{                                                                 \
@@ -113,27 +99,27 @@ void rt_hw_interrupt_umask(int irq);
 
 rt_inline void sep6200_irq_enable(rt_uint32_t irq)
 {
-	SEP6200_INT_ENABLE(irq);
+    SEP6200_INT_ENABLE(irq);
 }
 
 rt_inline void sep6200_irq_disable(rt_uint32_t irq)
 {
-	SEP6200_INT_DISABLE(irq);
+    SEP6200_INT_DISABLE(irq);
 }
 
 rt_inline void sep6200_irq_unmask(rt_uint32_t irq)
 {
-	SEP6200_INT_ENABLE(irq);
+    SEP6200_INT_ENABLE(irq);
 }
 
 rt_inline void sep6200_irq_mask(rt_uint32_t irq)
 {
-	SEP6200_INT_DISABLE(irq);
+    SEP6200_INT_DISABLE(irq);
 }
 rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector)
 {
-	rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
-	return RT_NULL;
+    rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
+    return RT_NULL;
 }
 
 /**
@@ -141,26 +127,26 @@ rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector)
  */
 void rt_hw_interrupt_init(void)
 {
-	rt_int32_t i;
-	register rt_uint32_t idx;
+    rt_int32_t i;
+    register rt_uint32_t idx;
 
 
-	/* init exceptions table */
-	for(idx=0; idx < MAX_HANDLERS; idx++)
-	{
-		isr_table[idx].handler = (rt_isr_handler_t)rt_hw_interrupt_handle;
-	}
-	int_disable_all();
-	mask_all_int(SEP6200_FIQ_TYPE);
+    /* init exceptions table */
+    for(idx=0; idx < MAX_HANDLERS; idx++)
+    {
+        isr_table[idx].handler = (rt_isr_handler_t)rt_hw_interrupt_handle;
+    }
+    int_disable_all();
+    mask_all_int(SEP6200_FIQ_TYPE);
 
-	//int_enable_all();
-	unmask_all_int(SEP6200_IRQ_TYPE);
+    //int_enable_all();
+    unmask_all_int(SEP6200_IRQ_TYPE);
 
-	/* init interrupt nest, and context in thread sp */
-	rt_interrupt_nest = 0;
-	rt_interrupt_from_thread = 0;
-	rt_interrupt_to_thread = 0;
-	rt_thread_switch_interrupt_flag = 0;
+    /* init interrupt nest, and context in thread sp */
+    rt_interrupt_nest = 0;
+    rt_interrupt_from_thread = 0;
+    rt_interrupt_to_thread = 0;
+    rt_thread_switch_interrupt_flag = 0;
 }
 
 
@@ -171,11 +157,11 @@ void rt_hw_interrupt_init(void)
  */
 void rt_hw_interrupt_mask(int irq)
 {
-	if (irq >= MAX_HANDLERS) {
-		rt_kprintf("Wrong irq num to mask\n");
-	} else {
-		sep6200_irq_mask(irq);
-	}
+    if (irq >= MAX_HANDLERS) {
+        rt_kprintf("Wrong irq num to mask\n");
+    } else {
+        sep6200_irq_mask(irq);
+    }
 
 }
 
@@ -185,11 +171,11 @@ void rt_hw_interrupt_mask(int irq)
  */
 void rt_hw_interrupt_umask(int irq)
 {
-	if (irq >= MAX_HANDLERS) {
-		rt_kprintf("Wrong irq num to unmask\n");
-	} else {
-		sep6200_irq_unmask(irq);
-	}
+    if (irq >= MAX_HANDLERS) {
+        rt_kprintf("Wrong irq num to unmask\n");
+    } else {
+        sep6200_irq_unmask(irq);
+    }
 }
 
 /**
@@ -210,7 +196,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
         if (handler != RT_NULL)
         {
 #ifdef RT_USING_INTERRUPT_INFO
-		    rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
+            rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
 #endif /* RT_USING_INTERRUPT_INFO */
             isr_table[vector].handler = handler;
             isr_table[vector].param = param;
diff --git a/libcpu/unicore32/sep6200/sep6200.h b/libcpu/unicore32/sep6200/sep6200.h
index c09823740b..773b505a02 100644
--- a/libcpu/unicore32/sep6200/sep6200.h
+++ b/libcpu/unicore32/sep6200/sep6200.h
@@ -1,21 +1,7 @@
 /*
- * File      : sep6200.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -29,58 +15,58 @@
 
 /*Core definations*/
 #define PRIVMODE  0x13
-#define	Mode_USR	0x10
-#define	Mode_REAL	0x11
-#define	Mode_IRQ	0x12
-#define	Mode_PRIV	0x13
-#define	Mode_TRAP	0x17
-#define	Mode_EXT	0x1B
-#define	Mode_SUSR	0x1F
+#define Mode_USR    0x10
+#define Mode_REAL   0x11
+#define Mode_IRQ    0x12
+#define Mode_PRIV   0x13
+#define Mode_TRAP   0x17
+#define Mode_EXT    0x1B
+#define Mode_SUSR   0x1F
 
 /*
  *  Address
  */
 
-#define	 SEP6200_VIC_BASE	0xb0000000
-#define  SEP6200_PMU_BASE	0xb0001000
-#define  SEP6200_RTC_BASE	0xb0002000
-#define	 SEP6200_TIMER_BASE 0xb0003000
-#define  SEP6200_PWM_BASE	0xb0004000
-#define  SEP6200_GPIO_BASE	0xb0006000
-#define  SEP6200_TOUCH_ADC	0xb0007000
-#define  SEP6200_SYSCTL_BASE	0xb0008000
-#define  SEP6200_UART0_BASE	0xb1000000
-#define  SEP6200_UART1_BASE	0xb1001000
-#define  SEP6200_UART2_BASE	0xb1002000
-#define  SEP6200_UART3_BASE	0xb1003000
-#define	 SEP6200_SSI1_BASE	0xb1004000
-#define	 SEP6200_SSI2_BASE	0xb1005000
-#define	 SEP6200_SSI3_BASE	0xb1006000
-#define  SEP6200_I2C_BASE	0xb1007000
-#define  SEP6200_I2S_BASE	0xb1008000
+#define  SEP6200_VIC_BASE   0xb0000000
+#define  SEP6200_PMU_BASE   0xb0001000
+#define  SEP6200_RTC_BASE   0xb0002000
+#define  SEP6200_TIMER_BASE 0xb0003000
+#define  SEP6200_PWM_BASE   0xb0004000
+#define  SEP6200_GPIO_BASE  0xb0006000
+#define  SEP6200_TOUCH_ADC  0xb0007000
+#define  SEP6200_SYSCTL_BASE    0xb0008000
+#define  SEP6200_UART0_BASE 0xb1000000
+#define  SEP6200_UART1_BASE 0xb1001000
+#define  SEP6200_UART2_BASE 0xb1002000
+#define  SEP6200_UART3_BASE 0xb1003000
+#define  SEP6200_SSI1_BASE  0xb1004000
+#define  SEP6200_SSI2_BASE  0xb1005000
+#define  SEP6200_SSI3_BASE  0xb1006000
+#define  SEP6200_I2C_BASE   0xb1007000
+#define  SEP6200_I2S_BASE   0xb1008000
 #define  SEP6200_USB_BASE    0xb1010000
 #define  SEP6200_DMAC2_BASE  0xb1011000
 #define  SEP6200_ESRAM_BASE  0xb2000000
-#define	 SEP6200_NORREG_BASE0xb2020000
-#define	 SEP6200_SDIO1_BASE	0xb2022000
-#define	 SEP6200_SDIO2_BASE	0xb2023000
-#define	 SEP6200_LCDC_BASE	0xb2025000
-#define	 SEP6200_VPU_BASE	0xb2026000
-#define	 SEP6200_DMAC1_BASE	0xb2027000
-#define	 SEP6200_DDR2_REG	0xb3000000
-#define	 SEP6200_DDR_MEM	0x40000000
+#define  SEP6200_NORREG_BASE0xb2020000
+#define  SEP6200_SDIO1_BASE 0xb2022000
+#define  SEP6200_SDIO2_BASE 0xb2023000
+#define  SEP6200_LCDC_BASE  0xb2025000
+#define  SEP6200_VPU_BASE   0xb2026000
+#define  SEP6200_DMAC1_BASE 0xb2027000
+#define  SEP6200_DDR2_REG   0xb3000000
+#define  SEP6200_DDR_MEM    0x40000000
 
-#define SEP6200_UART0_DLBL	(SEP6200_UART0_BASE+0x00)
-#define SEP6200_UART0_RXFIFO	(SEP6200_UART0_BASE+0x00)
-#define SEP6200_UART0_TXFIFO	(SEP6200_UART0_BASE+0x00)
-#define SEP6200_UART0_DLBH	(SEP6200_UART0_BASE+0x04)
-#define SEP6200_UART0_IER	(SEP6200_UART0_BASE+0x04)
-#define SEP6200_UART0_IIR	(SEP6200_UART0_BASE+0x08)
-#define SEP6200_UART0_FCR	(SEP6200_UART0_BASE+0x08)
-#define SEP6200_UART0_LCR	(SEP6200_UART0_BASE+0x0c)
-#define SEP6200_UART0_MCR	(SEP6200_UART0_BASE+0x10)
-#define SEP6200_UART0_LSR	(SEP6200_UART0_BASE+0x14)
-#define SEP6200_UART0_MSR	(SEP6200_UART0_BASE+0x18)
+#define SEP6200_UART0_DLBL  (SEP6200_UART0_BASE+0x00)
+#define SEP6200_UART0_RXFIFO    (SEP6200_UART0_BASE+0x00)
+#define SEP6200_UART0_TXFIFO    (SEP6200_UART0_BASE+0x00)
+#define SEP6200_UART0_DLBH  (SEP6200_UART0_BASE+0x04)
+#define SEP6200_UART0_IER   (SEP6200_UART0_BASE+0x04)
+#define SEP6200_UART0_IIR   (SEP6200_UART0_BASE+0x08)
+#define SEP6200_UART0_FCR   (SEP6200_UART0_BASE+0x08)
+#define SEP6200_UART0_LCR   (SEP6200_UART0_BASE+0x0c)
+#define SEP6200_UART0_MCR   (SEP6200_UART0_BASE+0x10)
+#define SEP6200_UART0_LSR   (SEP6200_UART0_BASE+0x14)
+#define SEP6200_UART0_MSR   (SEP6200_UART0_BASE+0x18)
 
 
 #define    SEP6200_TIMER_T1LCR              (SEP6200_TIMER_BASE + 0X000)
@@ -362,7 +348,7 @@ typedef    void                 (*FP)();   /* program start address */
 
 #ifndef    _BOOL_TYPE_
 #define    _BOOL_TYPE_
-typedef    int                  BOOL;	     /* Boolean value.  TRUE (1) or FALSE (0). */
+typedef    int                  BOOL;        /* Boolean value.  TRUE (1) or FALSE (0). */
 #endif
 
 typedef    int                  ER;         /* Error code.  A signed integer. */
@@ -382,88 +368,88 @@ typedef    int                  ER;         /* Error code.  A signed integer. */
 /*Macros for debug*/
 
 #define EOUT(fmt,...) \
-	do \
-	{ 	\
-		rt_kprintf("EOUT:(%s:%i)  ",__FILE__,__LINE__); \
-		rt_kprintf(fmt,##__VA_ARGS__); \
-	}while(0)
+    do \
+    {   \
+        rt_kprintf("EOUT:(%s:%i)  ",__FILE__,__LINE__); \
+        rt_kprintf(fmt,##__VA_ARGS__); \
+    }while(0)
 
 #define RT_DEBUG
 #ifdef RT_DEBUG
-	#define DBOUT(fmt,...) \
-	do \
-	{ 	\
-		rt_kprintf("DBOUT:(%s:%i)  ",__FILE__,__LINE__); \
-		rt_kprintf(fmt,##__VA_ARGS__); \
-	}while(0)
+    #define DBOUT(fmt,...) \
+    do \
+    {   \
+        rt_kprintf("DBOUT:(%s:%i)  ",__FILE__,__LINE__); \
+        rt_kprintf(fmt,##__VA_ARGS__); \
+    }while(0)
 #else
-	#define DBOUT(fmt,...) \
-	do{}while(0)
+    #define DBOUT(fmt,...) \
+    do{}while(0)
 #endif
 
-#ifdef	RT_DEBUG
-	#define ASSERT(arg) \
-	if((arg) == 0) \
-	{		\
-		while(1) \
-		{		  \
-			rt_kprintf("have a assert failure\n"); \
-		}										 \
-	}
+#ifdef  RT_DEBUG
+    #define ASSERT(arg) \
+    if((arg) == 0) \
+    {       \
+        while(1) \
+        {         \
+            rt_kprintf("have a assert failure\n"); \
+        }                                        \
+    }
 #else
-	#define ASSERT(arg) \
-	do		\
-	{		 \
-	}while(0)
+    #define ASSERT(arg) \
+    do      \
+    {        \
+    }while(0)
 #endif
 
 
 #define write_reg(reg,value) \
-	do \
-	{ \
-		*(RP)(reg) = value; \
-	}while(0)
+    do \
+    { \
+        *(RP)(reg) = value; \
+    }while(0)
 
 #define read_reg(reg) (*(RP)reg)
 
 
 struct rt_hw_register
 {
-	rt_uint32_t r0;
-	rt_uint32_t r1;
-	rt_uint32_t r2;
-	rt_uint32_t r3;
-	rt_uint32_t r4;
-	rt_uint32_t r5;
-	rt_uint32_t r6;
-	rt_uint32_t r7;
-	rt_uint32_t r8;
-	rt_uint32_t r9;
-	rt_uint32_t r10;
-	rt_uint32_t r11;
-	rt_uint32_t r12;
-	rt_uint32_t r13;
-	rt_uint32_t r14;
-	rt_uint32_t r15;
-	rt_uint32_t r16;
-	rt_uint32_t r17;
-	rt_uint32_t r18;
-	rt_uint32_t r19;
-	rt_uint32_t r20;
-	rt_uint32_t r21;
-	rt_uint32_t r22;
-	rt_uint32_t r23;
-	rt_uint32_t r24;
-	rt_uint32_t sb;
-	rt_uint32_t sl;
-	rt_uint32_t fp;
-	rt_uint32_t ip;
-	rt_uint32_t sp;
-	rt_uint32_t lr;
-	rt_uint32_t pc;
-	rt_uint32_t asr;
-	rt_uint32_t bsr;
-	rt_uint32_t ORIG_r0;
+    rt_uint32_t r0;
+    rt_uint32_t r1;
+    rt_uint32_t r2;
+    rt_uint32_t r3;
+    rt_uint32_t r4;
+    rt_uint32_t r5;
+    rt_uint32_t r6;
+    rt_uint32_t r7;
+    rt_uint32_t r8;
+    rt_uint32_t r9;
+    rt_uint32_t r10;
+    rt_uint32_t r11;
+    rt_uint32_t r12;
+    rt_uint32_t r13;
+    rt_uint32_t r14;
+    rt_uint32_t r15;
+    rt_uint32_t r16;
+    rt_uint32_t r17;
+    rt_uint32_t r18;
+    rt_uint32_t r19;
+    rt_uint32_t r20;
+    rt_uint32_t r21;
+    rt_uint32_t r22;
+    rt_uint32_t r23;
+    rt_uint32_t r24;
+    rt_uint32_t sb;
+    rt_uint32_t sl;
+    rt_uint32_t fp;
+    rt_uint32_t ip;
+    rt_uint32_t sp;
+    rt_uint32_t lr;
+    rt_uint32_t pc;
+    rt_uint32_t asr;
+    rt_uint32_t bsr;
+    rt_uint32_t ORIG_r0;
 };
 
 /*@}*/
diff --git a/libcpu/unicore32/sep6200/serial.c b/libcpu/unicore32/sep6200/serial.c
index 518257b617..f91834b6a7 100644
--- a/libcpu/unicore32/sep6200/serial.c
+++ b/libcpu/unicore32/sep6200/serial.c
@@ -1,25 +1,11 @@
 /*
- * File      : serial.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
- * 2013-03-16	    Peng Fan     Modified from sep4020
+ * 2013-03-16       Peng Fan     Modified from sep4020
  */
 #include 
 #include 
@@ -36,204 +22,204 @@
  */
 static rt_err_t rt_serial_init (rt_device_t dev)
 {
-	struct serial_device* uart = (struct serial_device*) dev->user_data;
+    struct serial_device* uart = (struct serial_device*) dev->user_data;
 
-	if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
-	{
+    if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
+    {
 
-		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			rt_memset(uart->int_rx->rx_buffer, 0,
-				sizeof(uart->int_rx->rx_buffer));
-			uart->int_rx->read_index = uart->int_rx->save_index = 0;
-		}
+        if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            rt_memset(uart->int_rx->rx_buffer, 0,
+                sizeof(uart->int_rx->rx_buffer));
+            uart->int_rx->read_index = uart->int_rx->save_index = 0;
+        }
 
-		if (dev->flag & RT_DEVICE_FLAG_INT_TX)
-		{
-			rt_memset(uart->int_tx->tx_buffer, 0,
-				sizeof(uart->int_tx->tx_buffer));
-			uart->int_tx->write_index = uart->int_tx->save_index = 0;
-		}
+        if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+        {
+            rt_memset(uart->int_tx->tx_buffer, 0,
+                sizeof(uart->int_tx->tx_buffer));
+            uart->int_tx->write_index = uart->int_tx->save_index = 0;
+        }
 
-		dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
-	}
+        dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /* save a char to serial buffer */
 static void rt_serial_savechar(struct serial_device* uart, char ch)
 {
-	rt_base_t level;
+    rt_base_t level;
 
-	/* disable interrupt */
-	level = rt_hw_interrupt_disable();
+    /* disable interrupt */
+    level = rt_hw_interrupt_disable();
 
-	uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
-	uart->int_rx->save_index ++;
-	if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
-		uart->int_rx->save_index = 0;
+    uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
+    uart->int_rx->save_index ++;
+    if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
+        uart->int_rx->save_index = 0;
 
-	/* if the next position is read index, discard this 'read char' */
-	if (uart->int_rx->save_index == uart->int_rx->read_index)
-	{
-		uart->int_rx->read_index ++;
-		if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-			uart->int_rx->read_index = 0;
-	}
+    /* if the next position is read index, discard this 'read char' */
+    if (uart->int_rx->save_index == uart->int_rx->read_index)
+    {
+        uart->int_rx->read_index ++;
+        if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+            uart->int_rx->read_index = 0;
+    }
 
-	/* enable interrupt */
-	rt_hw_interrupt_enable(level);
+    /* enable interrupt */
+    rt_hw_interrupt_enable(level);
 }
 
 static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	RT_ASSERT(dev != RT_NULL);
-	return RT_EOK;
+    RT_ASSERT(dev != RT_NULL);
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_close(rt_device_t dev)
 {
-	RT_ASSERT(dev != RT_NULL);
-	return RT_EOK;
+    RT_ASSERT(dev != RT_NULL);
+    return RT_EOK;
 }
 
 static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct serial_device* uart;
+    rt_uint8_t* ptr;
+    rt_err_t err_code;
+    struct serial_device* uart;
 
-	ptr = buffer;
-	err_code = RT_EOK;
-	uart = (struct serial_device*)dev->user_data;
+    ptr = buffer;
+    err_code = RT_EOK;
+    uart = (struct serial_device*)dev->user_data;
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		rt_base_t level;
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        rt_base_t level;
 
-		/* interrupt mode Rx */
-		while (size)
-		{
-			if (uart->int_rx->read_index != uart->int_rx->save_index)
-			{
-				*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
-				size --;
+        /* interrupt mode Rx */
+        while (size)
+        {
+            if (uart->int_rx->read_index != uart->int_rx->save_index)
+            {
+                *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
+                size --;
 
-				/* disable interrupt */
-				level = rt_hw_interrupt_disable();
+                /* disable interrupt */
+                level = rt_hw_interrupt_disable();
 
-				uart->int_rx->read_index ++;
-				if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-					uart->int_rx->read_index = 0;
+                uart->int_rx->read_index ++;
+                if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+                    uart->int_rx->read_index = 0;
 
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-			}
-			else
-			{
-				/* set error code */
-				err_code = -RT_EEMPTY;
-				break;
-			}
-		}
-	}
-	else
-	{
-		/* polling mode */
-		while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
-		{
-			while (uart->uart_device->lsr & USTAT_RCV_READY)
-			{
-				*ptr = uart->uart_device->dlbl_fifo.txfifo & 0xff;
-				ptr ++;
-			}
-		}
-	}
+                /* enable interrupt */
+                rt_hw_interrupt_enable(level);
+            }
+            else
+            {
+                /* set error code */
+                err_code = -RT_EEMPTY;
+                break;
+            }
+        }
+    }
+    else
+    {
+        /* polling mode */
+        while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
+        {
+            while (uart->uart_device->lsr & USTAT_RCV_READY)
+            {
+                *ptr = uart->uart_device->dlbl_fifo.txfifo & 0xff;
+                ptr ++;
+            }
+        }
+    }
 
-	/* set error code */
-	rt_set_errno(err_code);
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+    /* set error code */
+    rt_set_errno(err_code);
+    return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
 }
 
 static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct serial_device* uart;
+    rt_uint8_t* ptr;
+    rt_err_t err_code;
+    struct serial_device* uart;
 
-	err_code = RT_EOK;
-	ptr = (rt_uint8_t*)buffer;
-	uart = (struct serial_device*)dev->user_data;
+    err_code = RT_EOK;
+    ptr = (rt_uint8_t*)buffer;
+    uart = (struct serial_device*)dev->user_data;
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_TX)
-	{
-		/* interrupt mode Tx */
-		while (uart->int_tx->save_index != uart->int_tx->write_index)
-		{
-			/* save on tx buffer */
-			uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
+    if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+    {
+        /* interrupt mode Tx */
+        while (uart->int_tx->save_index != uart->int_tx->write_index)
+        {
+            /* save on tx buffer */
+            uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
 
-			-- size;
+            -- size;
 
-			/* move to next position */
-			uart->int_tx->save_index ++;
+            /* move to next position */
+            uart->int_tx->save_index ++;
 
-			/* wrap save index */
-			if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
-				uart->int_tx->save_index = 0;
-		}
+            /* wrap save index */
+            if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
+                uart->int_tx->save_index = 0;
+        }
 
-		/* set error code */
-		if (size > 0)
-			err_code = -RT_EFULL;
-	}
-	else
-	{
-		/* polling mode */
-		while (size)
-		{
-			/*
-			 * to be polite with serial console add a line feed
-			 * to the carriage return character
-			 */
-			if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM))
-			{
-				while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY));
-				uart->uart_device->dlbl_fifo.txfifo = '\r';
-			}
+        /* set error code */
+        if (size > 0)
+            err_code = -RT_EFULL;
+    }
+    else
+    {
+        /* polling mode */
+        while (size)
+        {
+            /*
+             * to be polite with serial console add a line feed
+             * to the carriage return character
+             */
+            if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM))
+            {
+                while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY));
+                uart->uart_device->dlbl_fifo.txfifo = '\r';
+            }
 
-			while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY));
-			uart->uart_device->dlbl_fifo.txfifo = (*ptr & 0x1FF);
+            while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY));
+            uart->uart_device->dlbl_fifo.txfifo = (*ptr & 0x1FF);
 
-			++ptr; --size;
-		}
-	}
+            ++ptr; --size;
+        }
+    }
 
-	/* set error code */
-	rt_set_errno(err_code);
+    /* set error code */
+    rt_set_errno(err_code);
 
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+    return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
 }
 
 static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		break;
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        break;
 
-	case RT_DEVICE_CTRL_RESUME:
-		/* resume device */
-		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
-		break;
-	}
+    case RT_DEVICE_CTRL_RESUME:
+        /* resume device */
+        dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+        break;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /*
@@ -241,49 +227,49 @@ static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
  */
 rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	device->type 		= RT_Device_Class_Char;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_serial_init;
-	device->open		= rt_serial_open;
-	device->close		= rt_serial_close;
-	device->read 		= rt_serial_read;
-	device->write 		= rt_serial_write;
-	device->control 	= rt_serial_control;
-	device->user_data   = serial;
+    device->type        = RT_Device_Class_Char;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = rt_serial_init;
+    device->open        = rt_serial_open;
+    device->close       = rt_serial_close;
+    device->read        = rt_serial_read;
+    device->write       = rt_serial_write;
+    device->control     = rt_serial_control;
+    device->user_data   = serial;
 
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
 }
 
 /* ISR for serial interrupt */
 void rt_hw_serial_isr(rt_device_t device)
 {
-	struct serial_device* uart = (struct serial_device*) device->user_data;
+    struct serial_device* uart = (struct serial_device*) device->user_data;
 
-	/* interrupt mode receive */
-	RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
+    /* interrupt mode receive */
+    RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
 
-	/* save on rx buffer */
-	while (uart->uart_device->lsr & USTAT_RCV_READY)
-	{
-		rt_serial_savechar(uart, uart->uart_device->dlbl_fifo.rxfifo & 0xff);
-	}
+    /* save on rx buffer */
+    while (uart->uart_device->lsr & USTAT_RCV_READY)
+    {
+        rt_serial_savechar(uart, uart->uart_device->dlbl_fifo.rxfifo & 0xff);
+    }
 
-	/* invoke callback */
-	if (device->rx_indicate != RT_NULL)
-	{
-		rt_size_t rx_length;
+    /* invoke callback */
+    if (device->rx_indicate != RT_NULL)
+    {
+        rt_size_t rx_length;
 
-		/* get rx length */
-		rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
-			UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
-			uart->int_rx->save_index - uart->int_rx->read_index;
+        /* get rx length */
+        rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
+            UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
+            uart->int_rx->save_index - uart->int_rx->read_index;
 
-		device->rx_indicate(device, rx_length);
-	}
+        device->rx_indicate(device, rx_length);
+    }
 }
 
 /*@}*/
diff --git a/libcpu/unicore32/sep6200/serial.h b/libcpu/unicore32/sep6200/serial.h
index e626f5e20f..dcfdc517d4 100644
--- a/libcpu/unicore32/sep6200/serial.h
+++ b/libcpu/unicore32/sep6200/serial.h
@@ -1,21 +1,7 @@
 /*
- * File      : serial.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -30,73 +16,73 @@
 
 #include 
 
-#define	USTAT_RCV_READY		0x01   	/* receive data ready */
-#define USTAT_OVERRUN		0x02	/* overrun */
-#define USTAT_PARITY_ERR	0x04	/* parity error */
-#define USTAT_FRAME_ERROR	0x08	/* frame error */
-#define USTAT_BREAK		0x10	/* break */
-#define	USTAT_TXB_EMPTY		0x40   	/* tx buffer empty */
-#define USTAT_RCV_ERR		0x80	/* receive error */
+#define USTAT_RCV_READY     0x01    /* receive data ready */
+#define USTAT_OVERRUN       0x02    /* overrun */
+#define USTAT_PARITY_ERR    0x04    /* parity error */
+#define USTAT_FRAME_ERROR   0x08    /* frame error */
+#define USTAT_BREAK     0x10    /* break */
+#define USTAT_TXB_EMPTY     0x40    /* tx buffer empty */
+#define USTAT_RCV_ERR       0x80    /* receive error */
 
-#define BPS					115200	/* serial baudrate */
+#define BPS                 115200  /* serial baudrate */
 
-#define UART_RX_BUFFER_SIZE		64
-#define UART_TX_BUFFER_SIZE		64
+#define UART_RX_BUFFER_SIZE     64
+#define UART_TX_BUFFER_SIZE     64
 
 /*For sep6200's uart have several secondary function*/
 /*we use union to decribe it*/
 
 union dlbl_fifo
 {
-	rt_uint32_t dlbl;
-	rt_uint32_t rxfifo;
-	rt_uint32_t txfifo;
+    rt_uint32_t dlbl;
+    rt_uint32_t rxfifo;
+    rt_uint32_t txfifo;
 };
 
 union dlbh_ier
 {
-	rt_uint32_t dlbh;
-	rt_uint32_t ier;
+    rt_uint32_t dlbh;
+    rt_uint32_t ier;
 };
 
 union iir_fcr
 {
-	rt_uint32_t iir;
-	rt_uint32_t fcr;
+    rt_uint32_t iir;
+    rt_uint32_t fcr;
 };
 
 struct serial_int_rx
 {
-	rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
-	rt_uint32_t read_index, save_index;
+    rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
+    rt_uint32_t read_index, save_index;
 };
 
 struct serial_int_tx
 {
-	rt_uint8_t  tx_buffer[UART_TX_BUFFER_SIZE];
-	rt_uint32_t write_index, save_index;
+    rt_uint8_t  tx_buffer[UART_TX_BUFFER_SIZE];
+    rt_uint32_t write_index, save_index;
 };
 
 typedef struct uartport
 {
-	union dlbl_fifo dlbl_fifo;
-	union dlbh_ier	dlbh_ier;
-	union iir_fcr	iir_fcr;
-	rt_uint32_t lcr;
-	rt_uint32_t mcr;
-	rt_uint32_t lsr;
-	rt_uint32_t msr;
+    union dlbl_fifo dlbl_fifo;
+    union dlbh_ier  dlbh_ier;
+    union iir_fcr   iir_fcr;
+    rt_uint32_t lcr;
+    rt_uint32_t mcr;
+    rt_uint32_t lsr;
+    rt_uint32_t msr;
 }uartport;
 
 struct serial_device
 {
-	uartport* uart_device;
+    uartport* uart_device;
 
-	/* rx structure */
-	struct serial_int_rx* int_rx;
+    /* rx structure */
+    struct serial_int_rx* int_rx;
 
-	/* tx structure */
-	struct serial_int_tx* int_tx;
+    /* tx structure */
+    struct serial_int_tx* int_tx;
 };
 
 rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial);
diff --git a/libcpu/unicore32/sep6200/stack.c b/libcpu/unicore32/sep6200/stack.c
index 722f40835e..049b075f6c 100644
--- a/libcpu/unicore32/sep6200/stack.c
+++ b/libcpu/unicore32/sep6200/stack.c
@@ -1,21 +1,7 @@
 /*
- * File      : stack.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -42,47 +28,47 @@
  */
 
 rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
-	rt_uint8_t *stack_addr, void *texit)
+    rt_uint8_t *stack_addr, void *texit)
 {
-	rt_uint32_t *stk;
+    rt_uint32_t *stk;
 
-	stk 	 = (rt_uint32_t*)stack_addr;
-	*(stk) 	 = (rt_uint32_t)tentry;			/* entry point */
-	*(--stk) = (rt_uint32_t)texit;			/* lr */
-	*(--stk) = 0;							/* r28 */
-	*(--stk) = 0;							/* r27 */
-	*(--stk) = 0;							/* r26 */
-	*(--stk) = 0;							/* r25 */
-	*(--stk) = 0;							/* r24 */
-	*(--stk) = 0;							/* r23 */
-	*(--stk) = 0;							/* r22 */
-	*(--stk) = 0;							/* r21 */
-	*(--stk) = 0;							/* r20 */
-	*(--stk) = 0;							/* r19 */
-	*(--stk) = 0;							/* r18 */
-	*(--stk) = 0;							/* r17 */
-	*(--stk) = 0;							/* r16 */
-	*(--stk) = 0;							/* r15 */
-	*(--stk) = 0;							/* r14 */
-	*(--stk) = 0;							/* r13 */
-	*(--stk) = 0;							/* r12 */
-	*(--stk) = 0;							/* r11 */
-	*(--stk) = 0;							/* r10 */
-	*(--stk) = 0;							/* r9 */
-	*(--stk) = 0;							/* r8 */
-	*(--stk) = 0;							/* r7 */
-	*(--stk) = 0;							/* r6 */
-	*(--stk) = 0;							/* r5 */
-	*(--stk) = 0;							/* r4 */
-	*(--stk) = 0;							/* r3 */
-	*(--stk) = 0;							/* r2 */
-	*(--stk) = 0;							/* r1 */
-	*(--stk) = (rt_uint32_t)parameter; /* r0 : argument */
-	*(--stk) = Mode_PRIV;					/* asr */
-	*(--stk) = Mode_PRIV;					/* bsr */ /*why both PRIV do not need switch?*/
+    stk      = (rt_uint32_t*)stack_addr;
+    *(stk)   = (rt_uint32_t)tentry;         /* entry point */
+    *(--stk) = (rt_uint32_t)texit;          /* lr */
+    *(--stk) = 0;                           /* r28 */
+    *(--stk) = 0;                           /* r27 */
+    *(--stk) = 0;                           /* r26 */
+    *(--stk) = 0;                           /* r25 */
+    *(--stk) = 0;                           /* r24 */
+    *(--stk) = 0;                           /* r23 */
+    *(--stk) = 0;                           /* r22 */
+    *(--stk) = 0;                           /* r21 */
+    *(--stk) = 0;                           /* r20 */
+    *(--stk) = 0;                           /* r19 */
+    *(--stk) = 0;                           /* r18 */
+    *(--stk) = 0;                           /* r17 */
+    *(--stk) = 0;                           /* r16 */
+    *(--stk) = 0;                           /* r15 */
+    *(--stk) = 0;                           /* r14 */
+    *(--stk) = 0;                           /* r13 */
+    *(--stk) = 0;                           /* r12 */
+    *(--stk) = 0;                           /* r11 */
+    *(--stk) = 0;                           /* r10 */
+    *(--stk) = 0;                           /* r9 */
+    *(--stk) = 0;                           /* r8 */
+    *(--stk) = 0;                           /* r7 */
+    *(--stk) = 0;                           /* r6 */
+    *(--stk) = 0;                           /* r5 */
+    *(--stk) = 0;                           /* r4 */
+    *(--stk) = 0;                           /* r3 */
+    *(--stk) = 0;                           /* r2 */
+    *(--stk) = 0;                           /* r1 */
+    *(--stk) = (rt_uint32_t)parameter; /* r0 : argument */
+    *(--stk) = Mode_PRIV;                   /* asr */
+    *(--stk) = Mode_PRIV;                   /* bsr */ /*why both PRIV do not need switch?*/
 
-	/* return task's current stack address */
-	return (rt_uint8_t *)stk;
+    /* return task's current stack address */
+    return (rt_uint8_t *)stk;
 }
 
 /*@}*/
diff --git a/libcpu/unicore32/sep6200/start_gcc.S b/libcpu/unicore32/sep6200/start_gcc.S
index 4dd17aa387..11676e875c 100644
--- a/libcpu/unicore32/sep6200/start_gcc.S
+++ b/libcpu/unicore32/sep6200/start_gcc.S
@@ -1,21 +1,7 @@
 /*
- * File      : start.S
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/libcpu/unicore32/sep6200/trace.c b/libcpu/unicore32/sep6200/trace.c
index 8f11a18a17..d83447c291 100644
--- a/libcpu/unicore32/sep6200/trace.c
+++ b/libcpu/unicore32/sep6200/trace.c
@@ -1,21 +1,7 @@
 /*
- * File      : trace.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/libcpu/unicore32/sep6200/trap.c b/libcpu/unicore32/sep6200/trap.c
index 1e5d02a279..f2f342cfbe 100644
--- a/libcpu/unicore32/sep6200/trap.c
+++ b/libcpu/unicore32/sep6200/trap.c
@@ -1,21 +1,7 @@
 /*
- * File      : trap.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -42,16 +28,16 @@ extern struct rt_thread *rt_current_thread;
 
 void rt_hw_show_register (struct rt_hw_register *regs)
 {
-	rt_kprintf("Execption:\n");
-	rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
-	rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
-	rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x r11:0x%08x\n", regs->r8, regs->r9, regs->r10,regs->r11);
-	rt_kprintf("r12:0x%08x r13:0x%08x r14:0x%08x r15:0x%08x\n", regs->r12,regs->r13,regs->r14,regs->r15);
-	rt_kprintf("r16:0x%08x r17:0x%08x r18:0x%08x r19:0x%08x\n", regs->r16,regs->r17,regs->r18,regs->r19);
-	rt_kprintf("r20:0x%08x r21:0x%08x r22:0x%08x r23:0x%08x\n", regs->r20,regs->r21,regs->r22,regs->r23);
-	rt_kprintf("r24:0x%08x sb:0x%08x  sl:0x%08xfp :0x%08x ip :0x%08x\n",regs->r24,regs->sb,regs->sl,regs->fp,regs->ip);
-	rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
-	rt_kprintf("asr:0x%08x bsr:0x%08x\n", regs->asr,regs->bsr);
+    rt_kprintf("Execption:\n");
+    rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
+    rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
+    rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x r11:0x%08x\n", regs->r8, regs->r9, regs->r10,regs->r11);
+    rt_kprintf("r12:0x%08x r13:0x%08x r14:0x%08x r15:0x%08x\n", regs->r12,regs->r13,regs->r14,regs->r15);
+    rt_kprintf("r16:0x%08x r17:0x%08x r18:0x%08x r19:0x%08x\n", regs->r16,regs->r17,regs->r18,regs->r19);
+    rt_kprintf("r20:0x%08x r21:0x%08x r22:0x%08x r23:0x%08x\n", regs->r20,regs->r21,regs->r22,regs->r23);
+    rt_kprintf("r24:0x%08x sb:0x%08x  sl:0x%08xfp :0x%08x ip :0x%08x\n",regs->r24,regs->sb,regs->sl,regs->fp,regs->ip);
+    rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
+    rt_kprintf("asr:0x%08x bsr:0x%08x\n", regs->asr,regs->bsr);
 }
 
 /**
@@ -64,13 +50,13 @@ void rt_hw_show_register (struct rt_hw_register *regs)
  */
 void rt_hw_trap_extn(struct rt_hw_register *regs)
 {
-	rt_hw_show_register(regs);
+    rt_hw_show_register(regs);
 
-	rt_kprintf("extn instruction\n");
-	rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
-	rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
+    rt_kprintf("extn instruction\n");
+    rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
+    rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
 
-	rt_hw_cpu_shutdown();
+    rt_hw_cpu_shutdown();
 }
 
 /**
@@ -84,10 +70,10 @@ void rt_hw_trap_extn(struct rt_hw_register *regs)
  */
 void rt_hw_trap_swi(struct rt_hw_register *regs)
 {
-	rt_hw_show_register(regs);
+    rt_hw_show_register(regs);
 
-	rt_kprintf("software interrupt\n");
-	rt_hw_cpu_shutdown();
+    rt_kprintf("software interrupt\n");
+    rt_hw_cpu_shutdown();
 }
 
 /**
@@ -100,13 +86,13 @@ void rt_hw_trap_swi(struct rt_hw_register *regs)
  */
 void rt_hw_trap_pabt(struct rt_hw_register *regs)
 {
-	rt_hw_show_register(regs);
+    rt_hw_show_register(regs);
 
-	rt_kprintf("prefetch abort\n");
-	rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
-	rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
+    rt_kprintf("prefetch abort\n");
+    rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
+    rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
 
-	rt_hw_cpu_shutdown();
+    rt_hw_cpu_shutdown();
 }
 
 /**
@@ -119,13 +105,13 @@ void rt_hw_trap_pabt(struct rt_hw_register *regs)
  */
 void rt_hw_trap_dabt(struct rt_hw_register *regs)
 {
-	rt_hw_show_register(regs);
+    rt_hw_show_register(regs);
 
-	rt_kprintf("data abort\n");
-	rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
-	rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
+    rt_kprintf("data abort\n");
+    rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
+    rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
 
-	rt_hw_cpu_shutdown();
+    rt_hw_cpu_shutdown();
 }
 
 /**
@@ -137,9 +123,9 @@ void rt_hw_trap_dabt(struct rt_hw_register *regs)
  */
 void rt_hw_trap_resv(struct rt_hw_register *regs)
 {
-	rt_kprintf("not used\n");
-	rt_hw_show_register(regs);
-	rt_hw_cpu_shutdown();
+    rt_kprintf("not used\n");
+    rt_hw_show_register(regs);
+    rt_hw_cpu_shutdown();
 }
 
 extern struct rt_irq_desc isr_table[];
@@ -152,7 +138,7 @@ void rt_hw_trap_irq(void)
   void *param;
 
   /* get the interrupt number */
-	irq = *(RP)(SEP6200_VIC_IRQ_VECTOR_NUM);
+    irq = *(RP)(SEP6200_VIC_IRQ_VECTOR_NUM);
 
   /* get interrupt service routine */
   isr_func = isr_table[irq].handler;
@@ -162,13 +148,13 @@ void rt_hw_trap_irq(void)
   isr_func(irq, param);
 
 #ifdef RT_USING_INTERRUPT_INFO
-	isr_table[irq].counter++;
+    isr_table[irq].counter++;
 #endif /* RT_USING_INTERRUPT_INFO */
 }
 
 void rt_hw_trap_fiq()
 {
-	rt_kprintf("fast interrupt request\n");
+    rt_kprintf("fast interrupt request\n");
 }
 
 /*@}*/
diff --git a/libcpu/xilinx/microblaze/cpu.c b/libcpu/xilinx/microblaze/cpu.c
index d37dcda350..37da5fd7c5 100755
--- a/libcpu/xilinx/microblaze/cpu.c
+++ b/libcpu/xilinx/microblaze/cpu.c
@@ -28,8 +28,8 @@ RT_WEAK void rt_hw_cpu_reset()
  */
 RT_WEAK void rt_hw_cpu_shutdown()
 {
-	rt_kprintf("shutdown...\n");
+    rt_kprintf("shutdown...\n");
 
-	while (1);
+    while (1);
 }
 
diff --git a/libcpu/xilinx/microblaze/serial.c b/libcpu/xilinx/microblaze/serial.c
index 17cca9f84d..1902f11710 100755
--- a/libcpu/xilinx/microblaze/serial.c
+++ b/libcpu/xilinx/microblaze/serial.c
@@ -12,7 +12,7 @@
  * 2006-08-23     Bernard      first version
  * 2009-05-14     Bernard      add RT-THread device interface
  *
- * 2011-12-17	  nl1031	   MicroBlaze
+ * 2011-12-17     nl1031       MicroBlaze
  */
 
 #include 
@@ -22,23 +22,23 @@
 typedef volatile rt_uint32_t REG32;
 struct rt_mb_uart_lite_hw
 {
-	REG32	 Rx_FIFO; 	// Receiver Holding Register
-	REG32	 Tx_FIFO; 	// Transmitter Holding Register
-	REG32	 STAT_REG; 	// Channel Status Register
-	REG32	 CTRL_REG; 	// Control Register
+    REG32    Rx_FIFO;   // Receiver Holding Register
+    REG32    Tx_FIFO;   // Transmitter Holding Register
+    REG32    STAT_REG;  // Channel Status Register
+    REG32    CTRL_REG;  // Control Register
 };
 
 struct rt_mb_uart_lite
 {
-	struct rt_device parent;
+    struct rt_device parent;
 
-	struct rt_mb_uart_lite_hw* hw_base;
-	rt_uint16_t peripheral_id;
-	rt_uint32_t baudrate;
+    struct rt_mb_uart_lite_hw* hw_base;
+    rt_uint16_t peripheral_id;
+    rt_uint32_t baudrate;
 
-	/* reception field */
-	rt_uint16_t save_index, read_index;
-	rt_uint8_t  rx_buffer[RT_UART_RX_BUFFER_SIZE];
+    /* reception field */
+    rt_uint16_t save_index, read_index;
+    rt_uint8_t  rx_buffer[RT_UART_RX_BUFFER_SIZE];
 };
 #ifdef RT_USING_UART1
 struct rt_mb_uart_lite serial1;
@@ -46,271 +46,271 @@ struct rt_mb_uart_lite serial1;
 
 static void rt_hw_serial_isr(void)
 {
-	unsigned int status;
-	rt_base_t level;
-	struct rt_device* device;
-	struct rt_mb_uart_lite* serial = RT_NULL;
+    unsigned int status;
+    rt_base_t level;
+    struct rt_device* device;
+    struct rt_mb_uart_lite* serial = RT_NULL;
 
 #ifdef RT_USING_UART1
-	/* serial 1 */
-	serial = &serial1;
+    /* serial 1 */
+    serial = &serial1;
 #endif
-	RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(serial != RT_NULL);
 
-	/* get generic device object */
-	device = (rt_device_t)serial;
+    /* get generic device object */
+    device = (rt_device_t)serial;
 
-	/* disable interrupt */
-	level = rt_hw_interrupt_disable();
+    /* disable interrupt */
+    level = rt_hw_interrupt_disable();
 
-	/* get uart status register */
-	status = serial->hw_base->STAT_REG;
-	while (status & XUL_SR_RX_FIFO_VALID_DATA)
-	{
-		/* get received character */
-		serial->rx_buffer[serial->save_index] = serial->hw_base->Rx_FIFO;
+    /* get uart status register */
+    status = serial->hw_base->STAT_REG;
+    while (status & XUL_SR_RX_FIFO_VALID_DATA)
+    {
+        /* get received character */
+        serial->rx_buffer[serial->save_index] = serial->hw_base->Rx_FIFO;
 
-		/* move to next position */
-		serial->save_index ++;
-		if (serial->save_index >= RT_UART_RX_BUFFER_SIZE)
-			serial->save_index = 0;
+        /* move to next position */
+        serial->save_index ++;
+        if (serial->save_index >= RT_UART_RX_BUFFER_SIZE)
+            serial->save_index = 0;
 
-		/* if the next position is read index, discard this 'read char' */
-		if (serial->save_index == serial->read_index)
-		{
-			serial->read_index ++;
-			if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
-				serial->read_index = 0;
-		}
-		status = serial->hw_base->STAT_REG;
-	}
-	/* enable interrupt */
-	rt_hw_interrupt_enable(level);
+        /* if the next position is read index, discard this 'read char' */
+        if (serial->save_index == serial->read_index)
+        {
+            serial->read_index ++;
+            if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
+                serial->read_index = 0;
+        }
+        status = serial->hw_base->STAT_REG;
+    }
+    /* enable interrupt */
+    rt_hw_interrupt_enable(level);
 
-	/* indicate to upper layer application */
-	if (device->rx_indicate != RT_NULL)
-		device->rx_indicate(device, 1);
+    /* indicate to upper layer application */
+    if (device->rx_indicate != RT_NULL)
+        device->rx_indicate(device, 1);
 
 }
 
 static rt_err_t rt_serial_init (rt_device_t dev)
 {
-	struct rt_mb_uart_lite* serial = (struct rt_mb_uart_lite*) dev;
+    struct rt_mb_uart_lite* serial = (struct rt_mb_uart_lite*) dev;
 
-	RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(serial != RT_NULL);
 
-	RT_ASSERT(serial->peripheral_id != XPAR_UARTLITE_1_DEVICE_ID);
+    RT_ASSERT(serial->peripheral_id != XPAR_UARTLITE_1_DEVICE_ID);
 
 
-	/* reset rx index */
-	serial->save_index = 0;
-	serial->read_index = 0;
+    /* reset rx index */
+    serial->save_index = 0;
+    serial->read_index = 0;
 
-	/* reset rx buffer */
-	rt_memset(serial->rx_buffer, 0, RT_UART_RX_BUFFER_SIZE);
+    /* reset rx buffer */
+    rt_memset(serial->rx_buffer, 0, RT_UART_RX_BUFFER_SIZE);
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
-	RT_ASSERT(serial != RT_NULL);
+    struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
+    RT_ASSERT(serial != RT_NULL);
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		/* enable UART rx interrupt */
-		serial->hw_base->CTRL_REG = XUL_CR_ENABLE_INTR; 		/* enable interrupt */
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        /* enable UART rx interrupt */
+        serial->hw_base->CTRL_REG = XUL_CR_ENABLE_INTR;         /* enable interrupt */
 
-		/* install UART handler */
-		rt_hw_interrupt_install(serial->peripheral_id, (rt_isr_handler_t)rt_hw_serial_isr, RT_NULL);
-		rt_hw_interrupt_umask(serial->peripheral_id);
-	}
+        /* install UART handler */
+        rt_hw_interrupt_install(serial->peripheral_id, (rt_isr_handler_t)rt_hw_serial_isr, RT_NULL);
+        rt_hw_interrupt_umask(serial->peripheral_id);
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_serial_close(rt_device_t dev)
 {
-	struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
-	RT_ASSERT(serial != RT_NULL);
+    struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
+    RT_ASSERT(serial != RT_NULL);
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		/* disable interrupt */
-		serial->hw_base->CTRL_REG =  0; 		/* RxReady interrupt */
-	}
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        /* disable interrupt */
+        serial->hw_base->CTRL_REG =  0;         /* RxReady interrupt */
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
-	RT_ASSERT(serial != RT_NULL);
+    rt_uint8_t* ptr;
+    struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
+    RT_ASSERT(serial != RT_NULL);
 
-	/* point to buffer */
-	ptr = (rt_uint8_t*) buffer;
+    /* point to buffer */
+    ptr = (rt_uint8_t*) buffer;
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		while (size)
-		{
-			/* interrupt receive */
-			rt_base_t level;
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        while (size)
+        {
+            /* interrupt receive */
+            rt_base_t level;
 
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
-			if (serial->read_index != serial->save_index)
-			{
-				*ptr = serial->rx_buffer[serial->read_index];
+            /* disable interrupt */
+            level = rt_hw_interrupt_disable();
+            if (serial->read_index != serial->save_index)
+            {
+                *ptr = serial->rx_buffer[serial->read_index];
 
-				serial->read_index ++;
-				if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
-					serial->read_index = 0;
-			}
-			else
-			{
-				/* no data in rx buffer */
+                serial->read_index ++;
+                if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
+                    serial->read_index = 0;
+            }
+            else
+            {
+                /* no data in rx buffer */
 
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-				break;
-			}
+                /* enable interrupt */
+                rt_hw_interrupt_enable(level);
+                break;
+            }
 
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
+            /* enable interrupt */
+            rt_hw_interrupt_enable(level);
 
-			ptr ++; size --;
-		}
+            ptr ++; size --;
+        }
 
-		return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
-	}
-	else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
-	{
-		/* not support right now */
-		RT_ASSERT(0);
-	}
-	else
-	{
-		/* poll mode */
-		while (size)
-		{
-			/* Wait for Full Rx Buffer */
-			while (!(serial->hw_base->STAT_REG & XUL_SR_RX_FIFO_VALID_DATA));
+        return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+    }
+    else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
+    {
+        /* not support right now */
+        RT_ASSERT(0);
+    }
+    else
+    {
+        /* poll mode */
+        while (size)
+        {
+            /* Wait for Full Rx Buffer */
+            while (!(serial->hw_base->STAT_REG & XUL_SR_RX_FIFO_VALID_DATA));
 
-			/* Read Character */
-			*ptr = serial->hw_base->Rx_FIFO;
-			ptr ++;
-			size --;
-		}
+            /* Read Character */
+            *ptr = serial->hw_base->Rx_FIFO;
+            ptr ++;
+            size --;
+        }
 
-		return (rt_size_t)ptr - (rt_size_t)buffer;
-	}
+        return (rt_size_t)ptr - (rt_size_t)buffer;
+    }
 
-	return 0;
+    return 0;
 }
 
 static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
 {
-	rt_uint8_t* ptr;
-	struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
-	RT_ASSERT(serial != RT_NULL);
+    rt_uint8_t* ptr;
+    struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
+    RT_ASSERT(serial != RT_NULL);
 
-	ptr = (rt_uint8_t*) buffer;
-	if (dev->open_flag & RT_DEVICE_OFLAG_WRONLY)
-	{
-		if (dev->flag & RT_DEVICE_FLAG_STREAM)
-		{
-			/* it's a stream mode device */
-			while (size)
-			{
-				/* stream mode */
-				if (*ptr == '\n')
-				{
-					while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
-					serial->hw_base->Tx_FIFO = '\r';
-				}
+    ptr = (rt_uint8_t*) buffer;
+    if (dev->open_flag & RT_DEVICE_OFLAG_WRONLY)
+    {
+        if (dev->flag & RT_DEVICE_FLAG_STREAM)
+        {
+            /* it's a stream mode device */
+            while (size)
+            {
+                /* stream mode */
+                if (*ptr == '\n')
+                {
+                    while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
+                    serial->hw_base->Tx_FIFO = '\r';
+                }
 
-				/* Wait for Empty Tx Buffer */
-				while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
+                /* Wait for Empty Tx Buffer */
+                while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
 
-				/* Transmit Character */
-				serial->hw_base->Tx_FIFO = *ptr;
-				if (*ptr & 1)
-					rt_hw_board_led_on(2);
-				else
-					rt_hw_board_led_off(2);
-				ptr ++; size --;
-			}
-		}
-		else
-		{
-			while (size)
-			{
-				/* Wait for Empty Tx Buffer */
-				while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
+                /* Transmit Character */
+                serial->hw_base->Tx_FIFO = *ptr;
+                if (*ptr & 1)
+                    rt_hw_board_led_on(2);
+                else
+                    rt_hw_board_led_off(2);
+                ptr ++; size --;
+            }
+        }
+        else
+        {
+            while (size)
+            {
+                /* Wait for Empty Tx Buffer */
+                while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
 
-				/* Transmit Character */
-				serial->hw_base->Tx_FIFO = *ptr;
-				if (*ptr & 1)
-					rt_hw_board_led_on(2);
-				else
-					rt_hw_board_led_off(2);
-				ptr ++; size --;
-			}
-		}
-	}
+                /* Transmit Character */
+                serial->hw_base->Tx_FIFO = *ptr;
+                if (*ptr & 1)
+                    rt_hw_board_led_on(2);
+                else
+                    rt_hw_board_led_off(2);
+                ptr ++; size --;
+            }
+        }
+    }
 
-	return (rt_size_t)ptr - (rt_size_t)buffer;
+    return (rt_size_t)ptr - (rt_size_t)buffer;
 }
 
 static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 rt_err_t rt_hw_serial_init()
 {
-	rt_device_t device;
+    rt_device_t device;
 
 #ifndef RT_USING_CONSOLE
-	int Status;
+    int Status;
 
-	/*
-	 * Initialize the UartLite driver so that it is ready to use.
-	 */
-	Status = XUartLite_Initialize(&uart_lite, RS232_DEVICE_ID);
-	if (Status != XST_SUCCESS)
-	{
-		return;
-	}
+    /*
+     * Initialize the UartLite driver so that it is ready to use.
+     */
+    Status = XUartLite_Initialize(&uart_lite, RS232_DEVICE_ID);
+    if (Status != XST_SUCCESS)
+    {
+        return;
+    }
 
 #endif
 
 #ifdef RT_USING_UART1
-	device = (rt_device_t) &serial1;
+    device = (rt_device_t) &serial1;
 
-	/* init serial device private data */
-	serial1.hw_base 		= (struct rt_mb_uart_lite_hw*)XPAR_USB_UART_BASEADDR;
-	serial1.peripheral_id 	= XPAR_UARTLITE_1_DEVICE_ID;
-	serial1.baudrate		= 115200;
+    /* init serial device private data */
+    serial1.hw_base         = (struct rt_mb_uart_lite_hw*)XPAR_USB_UART_BASEADDR;
+    serial1.peripheral_id   = XPAR_UARTLITE_1_DEVICE_ID;
+    serial1.baudrate        = 115200;
 
-	/* set device virtual interface */
-	device->init 	= rt_serial_init;
-	device->open 	= rt_serial_open;
-	device->close 	= rt_serial_close;
-	device->read 	= rt_serial_read;
-	device->write 	= rt_serial_write;
-	device->control = rt_serial_control;
+    /* set device virtual interface */
+    device->init    = rt_serial_init;
+    device->open    = rt_serial_open;
+    device->close   = rt_serial_close;
+    device->read    = rt_serial_read;
+    device->write   = rt_serial_write;
+    device->control = rt_serial_control;
 
-	/* register uart1 on device subsystem */
-	rt_device_register(device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
+    /* register uart1 on device subsystem */
+    rt_device_register(device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
 #endif
 
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 
diff --git a/libcpu/xilinx/microblaze/stack.c b/libcpu/xilinx/microblaze/stack.c
index 686fc078a3..87f1dfa014 100755
--- a/libcpu/xilinx/microblaze/stack.c
+++ b/libcpu/xilinx/microblaze/stack.c
@@ -29,43 +29,43 @@ extern   void  *_SDA2_BASE_;
  * @return stack address
  */
 rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
-	rt_uint8_t *stack_addr, void *texit)
+    rt_uint8_t *stack_addr, void *texit)
 {
-	unsigned long *stk;
+    unsigned long *stk;
 
-	stk 	 = (unsigned long *)stack_addr;
-	stk--;
-	stk--;
-	*stk-- = 0;								/* r31 */
-	*stk-- = 0;								/* r30 */
-	*stk-- = 0;								/* r29 */
-	*stk-- = 0;								/* r28 */
-	*stk-- = 0;								/* r27 */
-	*stk-- = 0;								/* r26 */
-	*stk-- = 0;								/* r25 */
-	*stk-- = 0;								/* r24 */
-	*stk-- = 0;								/* r23 */
-	*stk-- = 0;								/* r22 */
-	*stk-- = 0;								/* r21 */
-	*stk-- = 0;								/* r20 */
-	*stk-- = 0;								/* r19 */
-	*stk-- = 0;								/* r18 */
-	*stk-- = 0;								/* r17 */
-	*stk-- = (unsigned long)texit - 8;		/* r15 = task return address*/
-	*stk-- = (unsigned long)tentry;		/* r14 = entry address*/
-	*stk-- = (unsigned long)&_SDA_BASE_;	/* r13 */
-	*stk-- = 0;								/* r12 */
-	*stk-- = 0;								/* r11 */
-	*stk-- = 0;								/* r10 */
-	*stk-- = 0;								/* r09 */
-	*stk-- = 0;								/* r08 */
-	*stk-- = 0;								/* r07 */
-	*stk-- = 0;								/* r06 */
-	*stk-- = (unsigned long) parameter;	/* r05 */
-	*stk-- = 0;								/* r04 */
-	*stk-- = 0;								/* r03 */
-	*stk-- = (unsigned long)&_SDA2_BASE_;	/* r02 */
-	*stk   = 2;   							/* enable interrupt */
-	return (rt_uint8_t *)stk;
+    stk      = (unsigned long *)stack_addr;
+    stk--;
+    stk--;
+    *stk-- = 0;                             /* r31 */
+    *stk-- = 0;                             /* r30 */
+    *stk-- = 0;                             /* r29 */
+    *stk-- = 0;                             /* r28 */
+    *stk-- = 0;                             /* r27 */
+    *stk-- = 0;                             /* r26 */
+    *stk-- = 0;                             /* r25 */
+    *stk-- = 0;                             /* r24 */
+    *stk-- = 0;                             /* r23 */
+    *stk-- = 0;                             /* r22 */
+    *stk-- = 0;                             /* r21 */
+    *stk-- = 0;                             /* r20 */
+    *stk-- = 0;                             /* r19 */
+    *stk-- = 0;                             /* r18 */
+    *stk-- = 0;                             /* r17 */
+    *stk-- = (unsigned long)texit - 8;      /* r15 = task return address*/
+    *stk-- = (unsigned long)tentry;     /* r14 = entry address*/
+    *stk-- = (unsigned long)&_SDA_BASE_;    /* r13 */
+    *stk-- = 0;                             /* r12 */
+    *stk-- = 0;                             /* r11 */
+    *stk-- = 0;                             /* r10 */
+    *stk-- = 0;                             /* r09 */
+    *stk-- = 0;                             /* r08 */
+    *stk-- = 0;                             /* r07 */
+    *stk-- = 0;                             /* r06 */
+    *stk-- = (unsigned long) parameter; /* r05 */
+    *stk-- = 0;                             /* r04 */
+    *stk-- = 0;                             /* r03 */
+    *stk-- = (unsigned long)&_SDA2_BASE_;   /* r02 */
+    *stk   = 2;                             /* enable interrupt */
+    return (rt_uint8_t *)stk;
 }
 
diff --git a/libcpu/xilinx/microblaze/trap.c b/libcpu/xilinx/microblaze/trap.c
index 3b3f98d105..bcfb3cc492 100755
--- a/libcpu/xilinx/microblaze/trap.c
+++ b/libcpu/xilinx/microblaze/trap.c
@@ -10,13 +10,13 @@
  * Change Logs:
  * Date           Author       Notes
  * 2006-08-23     Bernard      first version
- * 2011-12-17	  nl1031	   for MicroBlaze
+ * 2011-12-17     nl1031       for MicroBlaze
  *
  */
 
-#include 	
-#include 	"xparameters.h"
-#include 	"xintc.h"
+#include    
+#include    "xparameters.h"
+#include    "xintc.h"
 #include    "xintc_i.h"
 #include    "xintc_l.h"
 
@@ -33,7 +33,7 @@ rt_uint32_t rt_thread_switch_interrupt_flag;
 
 void rt_hw_interrupt_handler(int vector)
 {
-	rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
+    rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
 }
 
 /**
@@ -41,24 +41,24 @@ void rt_hw_interrupt_handler(int vector)
  */
 void rt_hw_interrupt_init()
 {
-	rt_base_t index;
+    rt_base_t index;
 
-	XIntc_Config           *CfgPtr;
+    XIntc_Config           *CfgPtr;
 
 
     CfgPtr = &XIntc_ConfigTable[0];
 
 
-	for (index = 0; index < MAX_HANDLERS; index ++)
-	{
-		CfgPtr->HandlerTable[index].Handler = (XInterruptHandler)rt_hw_interrupt_handler;
-	}
+    for (index = 0; index < MAX_HANDLERS; index ++)
+    {
+        CfgPtr->HandlerTable[index].Handler = (XInterruptHandler)rt_hw_interrupt_handler;
+    }
 
-	/* init interrupt nest, and context in thread sp */
-	rt_interrupt_nest = 0;
-	rt_interrupt_from_thread = 0;
-	rt_interrupt_to_thread = 0;
-	rt_thread_switch_interrupt_flag = 0;
+    /* init interrupt nest, and context in thread sp */
+    rt_interrupt_nest = 0;
+    rt_interrupt_from_thread = 0;
+    rt_interrupt_to_thread = 0;
+    rt_thread_switch_interrupt_flag = 0;
 }
 
 /**
@@ -67,8 +67,8 @@ void rt_hw_interrupt_init()
  */
 void rt_hw_interrupt_mask(int vector)
 {
-	/* disable interrupt */
-	XIntc_Disable(&int_ctl,vector);
+    /* disable interrupt */
+    XIntc_Disable(&int_ctl,vector);
 }
 
 /**
@@ -77,7 +77,7 @@ void rt_hw_interrupt_mask(int vector)
  */
 void rt_hw_interrupt_umask(int vector)
 {
-	XIntc_Enable(&int_ctl,vector);
+    XIntc_Enable(&int_ctl,vector);
 }
 
 /**
@@ -88,15 +88,15 @@ void rt_hw_interrupt_umask(int vector)
  */
 void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_handler_t *old_handler)
 {
-	XIntc_Config           *CfgPtr;
+    XIntc_Config           *CfgPtr;
 
     CfgPtr = &XIntc_ConfigTable[0];
 
-	if(vector >= 0 && vector < MAX_HANDLERS)
-	{
-		if (*old_handler != RT_NULL) *old_handler = (rt_isr_handler_t)CfgPtr->HandlerTable[vector].Handler;
-		if (new_handler != RT_NULL) CfgPtr->HandlerTable[vector].Handler = (XInterruptHandler)new_handler;
-	}
+    if(vector >= 0 && vector < MAX_HANDLERS)
+    {
+        if (*old_handler != RT_NULL) *old_handler = (rt_isr_handler_t)CfgPtr->HandlerTable[vector].Handler;
+        if (new_handler != RT_NULL) CfgPtr->HandlerTable[vector].Handler = (XInterruptHandler)new_handler;
+    }
 }
 
 /*****************************************************************************/
@@ -117,7 +117,7 @@ void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_ha
 * calling an interrupt handler.
 *
 *
-* @return	None.
+* @return   None.
 *
 * @note
 *
@@ -131,81 +131,81 @@ void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_ha
 
 void rt_hw_trap_irq(void )
 {
-	u32 intr_status;
-	u32 intr_mask = 1;
-	int intr_number;
-	volatile u32 reg;			/* used as bit bucket */
-	XIntc_Config *cfg_ptr;
+    u32 intr_status;
+    u32 intr_mask = 1;
+    int intr_number;
+    volatile u32 reg;           /* used as bit bucket */
+    XIntc_Config *cfg_ptr;
 
 
-	/* Get the configuration data using the device ID */
-	cfg_ptr = &XIntc_ConfigTable[0];
+    /* Get the configuration data using the device ID */
+    cfg_ptr = &XIntc_ConfigTable[0];
 
-	/* Get the interrupts that are waiting to be serviced */
-	intr_status = XIntc_GetIntrStatus(XPAR_INTC_0_BASEADDR);
+    /* Get the interrupts that are waiting to be serviced */
+    intr_status = XIntc_GetIntrStatus(XPAR_INTC_0_BASEADDR);
 
-	/* Service each interrupt that is active and enabled by checking each
-	 * bit in the register from LSB to MSB which corresponds to an interrupt
-	 * intput signal
-	 */
-	for (intr_number = 0; intr_number < XPAR_INTC_MAX_NUM_INTR_INPUTS; intr_number++)
-	{
-		if (intr_status & 1)
-		{
-			XIntc_VectorTableEntry *table_ptr;
+    /* Service each interrupt that is active and enabled by checking each
+     * bit in the register from LSB to MSB which corresponds to an interrupt
+     * intput signal
+     */
+    for (intr_number = 0; intr_number < XPAR_INTC_MAX_NUM_INTR_INPUTS; intr_number++)
+    {
+        if (intr_status & 1)
+        {
+            XIntc_VectorTableEntry *table_ptr;
 
-			/* If the interrupt has been setup to acknowledge it
-			 * before servicing the interrupt, then ack it
-			 */
-			if (cfg_ptr->AckBeforeService & intr_mask)
-			{
-				XIntc_AckIntr(cfg_ptr->BaseAddress, intr_mask);
-			}
+            /* If the interrupt has been setup to acknowledge it
+             * before servicing the interrupt, then ack it
+             */
+            if (cfg_ptr->AckBeforeService & intr_mask)
+            {
+                XIntc_AckIntr(cfg_ptr->BaseAddress, intr_mask);
+            }
 
-			/* The interrupt is active and enabled, call the
-			 * interrupt handler that was setup with the specified
-			 * parameter
-			 */
-			table_ptr = &(cfg_ptr->HandlerTable[intr_number]);
-			table_ptr->Handler(table_ptr->CallBackRef);
+            /* The interrupt is active and enabled, call the
+             * interrupt handler that was setup with the specified
+             * parameter
+             */
+            table_ptr = &(cfg_ptr->HandlerTable[intr_number]);
+            table_ptr->Handler(table_ptr->CallBackRef);
 
-			/* If the interrupt has been setup to acknowledge it
-			 * after it has been serviced then ack it
-			 */
-			if ((cfg_ptr->AckBeforeService & intr_mask) == 0)
-			{
-				XIntc_AckIntr(cfg_ptr->BaseAddress, intr_mask);
-			}
+            /* If the interrupt has been setup to acknowledge it
+             * after it has been serviced then ack it
+             */
+            if ((cfg_ptr->AckBeforeService & intr_mask) == 0)
+            {
+                XIntc_AckIntr(cfg_ptr->BaseAddress, intr_mask);
+            }
 
-			/*
-			 * Read the ISR again to handle architectures with posted write
-			 * bus access issues.
-			 */
-			reg = XIntc_GetIntrStatus(cfg_ptr->BaseAddress);
+            /*
+             * Read the ISR again to handle architectures with posted write
+             * bus access issues.
+             */
+            reg = XIntc_GetIntrStatus(cfg_ptr->BaseAddress);
 
-			/*
-			 * If only the highest priority interrupt is to be
-			 * serviced, exit loop and return after servicing
-			 * the interrupt
-			 */
-			if (cfg_ptr->Options == XIN_SVC_SGL_ISR_OPTION)
-			{
-				return;
-			}
-		}
+            /*
+             * If only the highest priority interrupt is to be
+             * serviced, exit loop and return after servicing
+             * the interrupt
+             */
+            if (cfg_ptr->Options == XIN_SVC_SGL_ISR_OPTION)
+            {
+                return;
+            }
+        }
 
-		/* Move to the next interrupt to check */
-		intr_mask <<= 1;
-		intr_status >>= 1;
+        /* Move to the next interrupt to check */
+        intr_mask <<= 1;
+        intr_status >>= 1;
 
-		/* If there are no other bits set indicating that all interrupts
-		 * have been serviced, then exit the loop
-		 */
-		if (intr_status == 0)
-		{
-			break;
-		}
-	}
+        /* If there are no other bits set indicating that all interrupts
+         * have been serviced, then exit the loop
+         */
+        if (intr_status == 0)
+        {
+            break;
+        }
+    }
 }
 
 
diff --git a/tools/eclipse.py b/tools/eclipse.py
index 74c697011e..4d5e28e02e 100644
--- a/tools/eclipse.py
+++ b/tools/eclipse.py
@@ -188,7 +188,8 @@ def HandleToolOption(tools, env, project, reset):
             options = tool.findall('option')
             # find all compile options
             for option in options:
-                if option.get('id').find('compiler.include.paths') != -1 or option.get('id').find('compiler.option.includepaths') != -1:
+                option_id = option.get('id')
+                if ('compiler.include.paths' in  option_id) or ('compiler.option.includepaths' in  option_id) or ('compiler.tasking.include' in  option_id):
                     compile_include_paths_options += [option]
                 elif option.get('id').find('compiler.include.files') != -1 or option.get('id').find('compiler.option.includefiles') != -1 :
                     compile_include_files_options += [option]