From d1a12288adc3eac38c0935507ae1d07b16be1620 Mon Sep 17 00:00:00 2001 From: liuduanfei <939763442@qq.com> Date: Sun, 17 May 2020 13:31:18 +0800 Subject: [PATCH] Add SD Card driver for stm32h743-atk-apollo board --- bsp/stm32/stm32h743-atk-apollo/.config | 40 +- .../board/CubeMX_Config/.mxproject | 10 +- .../board/CubeMX_Config/CubeMX_Config.ioc | 104 ++-- .../CubeMX_Config/Inc/stm32h7xx_hal_conf.h | 45 +- .../board/CubeMX_Config/Inc/stm32h7xx_it.h | 1 + .../board/CubeMX_Config/Src/main.c | 45 +- .../CubeMX_Config/Src/stm32h7xx_hal_msp.c | 91 ++++ .../board/CubeMX_Config/Src/stm32h7xx_it.c | 15 + bsp/stm32/stm32h743-atk-apollo/board/Kconfig | 8 +- .../stm32h743-atk-apollo/board/SConscript | 2 + bsp/stm32/stm32h743-atk-apollo/board/board.c | 2 +- .../board/ports/drv_sdio.c | 497 ++++++++++++++++++ .../board/ports/drv_sdio.h | 105 ++++ .../stm32h743-atk-apollo/project.uvprojx | 17 +- bsp/stm32/stm32h743-atk-apollo/rtconfig.h | 9 +- 15 files changed, 910 insertions(+), 81 deletions(-) create mode 100644 bsp/stm32/stm32h743-atk-apollo/board/ports/drv_sdio.c create mode 100644 bsp/stm32/stm32h743-atk-apollo/board/ports/drv_sdio.h diff --git a/bsp/stm32/stm32h743-atk-apollo/.config b/bsp/stm32/stm32h743-atk-apollo/.config index 8a23a541a5..79ccd6de10 100644 --- a/bsp/stm32/stm32h743-atk-apollo/.config +++ b/bsp/stm32/stm32h743-atk-apollo/.config @@ -52,7 +52,6 @@ CONFIG_RT_USING_MEMPOOL=y # CONFIG_RT_USING_NOHEAP is not set CONFIG_RT_USING_SMALL_MEM=y # CONFIG_RT_USING_SLAB is not set -# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set # CONFIG_RT_USING_MEMTRACE is not set CONFIG_RT_USING_HEAP=y @@ -65,7 +64,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x40002 +CONFIG_RT_VER_NUM=0x40003 CONFIG_ARCH_ARM=y CONFIG_RT_USING_CPU_FFS=y CONFIG_ARCH_ARM_CORTEX_M=y @@ -135,15 +134,9 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_AUDIO is not set # CONFIG_RT_USING_SENSOR is not set # CONFIG_RT_USING_TOUCH is not set - -# -# Using Hardware Crypto drivers -# # CONFIG_RT_USING_HWCRYPTO is not set - -# -# Using WiFi -# +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set # CONFIG_RT_USING_WIFI is not set # @@ -157,6 +150,7 @@ CONFIG_RT_USING_PIN=y # # CONFIG_RT_USING_LIBC is not set # CONFIG_RT_USING_PTHREADS is not set +CONFIG_RT_LIBC_USING_TIME=y # # Network @@ -250,6 +244,10 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_LSSDP is not set # CONFIG_PKG_USING_AIRKISS_OPEN is not set # CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set # # security packages @@ -271,6 +269,8 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set # # tools packages @@ -301,6 +301,7 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_LITTLEFS is not set # CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set # # peripheral libraries and drivers @@ -327,6 +328,8 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_I2C_TOOLS is not set # CONFIG_PKG_USING_NRF24L01 is not set # CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_LCD_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set # # miscellaneous packages @@ -337,12 +340,15 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_QUICKLZ is not set # CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set # CONFIG_PKG_USING_CANFESTIVAL is not set # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set # CONFIG_PKG_USING_KENDRYTE_DEMO is not set # CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set # # samples: kernel and components samples @@ -355,6 +361,9 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_NNOM is not set # CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set CONFIG_SOC_FAMILY_STM32=y CONFIG_SOC_SERIES_STM32H7=y @@ -366,8 +375,11 @@ CONFIG_SOC_STM32H743II=y # # Onboard Peripheral Drivers # +# CONFIG_BSP_USING_COM2 is not set # CONFIG_BSP_USING_SDRAM is not set # CONFIG_BSP_USING_LCD is not set +# CONFIG_BSP_USING_QSPI_FLASH is not set +# CONFIG_BSP_USING_SDMMC is not set # # On-chip Peripheral Drivers @@ -375,9 +387,17 @@ CONFIG_SOC_STM32H743II=y CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART1=y +# CONFIG_BSP_USING_UART2 is not set # CONFIG_BSP_USING_FMC is not set # CONFIG_BSP_USING_LTDC is not set +# CONFIG_BSP_USING_SPI is not set +# CONFIG_BSP_USING_QSPI is not set +# CONFIG_BSP_USING_I2C1 is not set # CONFIG_BSP_USING_ONCHIP_RTC is not set +# CONFIG_BSP_USING_WDT is not set +# CONFIG_BSP_USING_CRC is not set +# CONFIG_BSP_USING_RNG is not set +# CONFIG_BSP_USING_UDID is not set # # Board extended module Drivers diff --git a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/.mxproject index 5c90788c8c..3441326169 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/.mxproject +++ b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/.mxproject @@ -1,14 +1,14 @@ [PreviousGenFiles] -HeaderPath=D:/rt_thread_master/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc +HeaderPath=G:/rt-thread/rt_thraed/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc HeaderFiles=stm32h7xx_it.h;stm32h7xx_hal_conf.h;main.h; -SourcePath=D:/rt_thread_master/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src +SourcePath=G:/rt-thread/rt_thraed/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src SourceFiles=stm32h7xx_it.c;stm32h7xx_hal_msp.c;main.c; [PreviousLibFiles] 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Driver/Inc/stm32h7xx_hal_dma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_mdma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h;Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h743xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/system_stm32h7xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; 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[PreviousUsedKeilFiles] -SourceFiles=..\Src\main.c;..\Src\stm32h7xx_it.c;..\Src\stm32h7xx_hal_msp.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_iwdg.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dsi.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_exti.c;../\Src/system_stm32h7xx.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_iwdg.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dsi.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_exti.c;../\Src/system_stm32h7xx.c;../Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c;null; +SourceFiles=..\Src\main.c;..\Src\stm32h7xx_it.c;..\Src\stm32h7xx_hal_msp.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_exti.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_iwdg.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_sdmmc.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_delayblock.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c;..\\Src/system_stm32h7xx.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_exti.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_iwdg.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_sdmmc.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_delayblock.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c;..\Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c;..\\Src/system_stm32h7xx.c;..\Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c;; HeaderPath=..\Drivers\STM32H7xx_HAL_Driver\Inc;..\Drivers\STM32H7xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32H7xx\Include;..\Drivers\CMSIS\Include;..\Inc; -CDefines=USE_HAL_DRIVER;STM32H743xx;USE_HAL_DRIVER;STM32H743xx; +CDefines=USE_HAL_DRIVER;STM32H743xx;USE_HAL_DRIVER;USE_HAL_DRIVER; diff --git a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/CubeMX_Config.ioc index b73eb16684..f02bd332b1 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/CubeMX_Config.ioc +++ b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/CubeMX_Config.ioc @@ -23,10 +23,11 @@ KeepUserPlacement=false Mcu.Family=STM32H7 Mcu.IP0=CORTEX_M7 Mcu.IP1=DEBUG -Mcu.IP10=SPI2 -Mcu.IP11=SYS -Mcu.IP12=USART1 -Mcu.IP13=USART2 +Mcu.IP10=SDMMC1 +Mcu.IP11=SPI2 +Mcu.IP12=SYS +Mcu.IP13=USART1 +Mcu.IP14=USART2 Mcu.IP2=DMA2D Mcu.IP3=FMC Mcu.IP4=IWDG1 @@ -35,7 +36,7 @@ Mcu.IP6=NVIC Mcu.IP7=QUADSPI Mcu.IP8=RCC Mcu.IP9=RTC -Mcu.IPNb=14 +Mcu.IPNb=15 Mcu.Name=STM32H743IITx Mcu.Package=LQFP176 Mcu.Pin0=PC13 @@ -92,41 +93,47 @@ Mcu.Pin54=PG5 Mcu.Pin55=PG6 Mcu.Pin56=PG7 Mcu.Pin57=PG8 -Mcu.Pin58=PA9 -Mcu.Pin59=PA10 +Mcu.Pin58=PC8 +Mcu.Pin59=PC9 Mcu.Pin6=PF1 -Mcu.Pin60=PA13 (JTMS/SWDIO) -Mcu.Pin61=PH13 -Mcu.Pin62=PH14 -Mcu.Pin63=PH15 -Mcu.Pin64=PI0 -Mcu.Pin65=PI1 -Mcu.Pin66=PI2 -Mcu.Pin67=PA14 (JTCK/SWCLK) -Mcu.Pin68=PD0 -Mcu.Pin69=PD1 +Mcu.Pin60=PA9 +Mcu.Pin61=PA10 +Mcu.Pin62=PA13 (JTMS/SWDIO) +Mcu.Pin63=PH13 +Mcu.Pin64=PH14 +Mcu.Pin65=PH15 +Mcu.Pin66=PI0 +Mcu.Pin67=PI1 +Mcu.Pin68=PI2 +Mcu.Pin69=PA14 (JTCK/SWCLK) Mcu.Pin7=PF2 -Mcu.Pin70=PG11 -Mcu.Pin71=PG15 -Mcu.Pin72=PB6 -Mcu.Pin73=PE0 -Mcu.Pin74=PE1 -Mcu.Pin75=PI4 -Mcu.Pin76=PI5 -Mcu.Pin77=PI6 -Mcu.Pin78=PI7 -Mcu.Pin79=VP_DMA2D_VS_DMA2D +Mcu.Pin70=PC10 +Mcu.Pin71=PC11 +Mcu.Pin72=PC12 +Mcu.Pin73=PD0 +Mcu.Pin74=PD1 +Mcu.Pin75=PD2 +Mcu.Pin76=PG11 +Mcu.Pin77=PG15 +Mcu.Pin78=PB6 +Mcu.Pin79=PE0 Mcu.Pin8=PF3 -Mcu.Pin80=VP_IWDG1_VS_IWDG -Mcu.Pin81=VP_RTC_VS_RTC_Activate -Mcu.Pin82=VP_SYS_VS_Systick +Mcu.Pin80=PE1 +Mcu.Pin81=PI4 +Mcu.Pin82=PI5 +Mcu.Pin83=PI6 +Mcu.Pin84=PI7 +Mcu.Pin85=VP_DMA2D_VS_DMA2D +Mcu.Pin86=VP_IWDG1_VS_IWDG +Mcu.Pin87=VP_RTC_VS_RTC_Activate +Mcu.Pin88=VP_SYS_VS_Systick Mcu.Pin9=PF4 -Mcu.PinsNb=83 +Mcu.PinsNb=89 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32H743IITx -MxCube.Version=5.3.0 -MxDb.Version=DB.5.0.30 +MxCube.Version=5.6.1 +MxDb.Version=DB.5.0.60 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.ForceEnableDMAVector=true @@ -135,6 +142,7 @@ NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SDMMC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true @@ -179,6 +187,15 @@ PB6.Locked=true PB6.Mode=Single Bank 1 PB6.Signal=QUADSPI_BK1_NCS PC0.Signal=FMC_SDNWE +PC10.Locked=true +PC10.Mode=SD_4_bits_Wide_bus +PC10.Signal=SDMMC1_D2 +PC11.Locked=true +PC11.Mode=SD_4_bits_Wide_bus +PC11.Signal=SDMMC1_D3 +PC12.Locked=true +PC12.Mode=SD_4_bits_Wide_bus +PC12.Signal=SDMMC1_CK PC13.Mode=Calibration_1Hz PC13.Signal=RTC_OUT_CALIB PC14-OSC32_IN\ (OSC32_IN).Mode=LSE-External-Oscillator @@ -189,19 +206,20 @@ PC2_C.Mode=SdramChipSelect1_1 PC2_C.Signal=FMC_SDNE0 PC3_C.Mode=SdramChipSelect1_1 PC3_C.Signal=FMC_SDCKE0 -PCC.Checker=true -PCC.Line=STM32H743/753 -PCC.MCU=STM32H743IITx -PCC.PartNumber=STM32H743IITx -PCC.Seq0=0 -PCC.Series=STM32H7 -PCC.Temperature=25 -PCC.Vdd=3.0 +PC8.Locked=true +PC8.Mode=SD_4_bits_Wide_bus +PC8.Signal=SDMMC1_D0 +PC9.Locked=true +PC9.Mode=SD_4_bits_Wide_bus +PC9.Signal=SDMMC1_D1 PD0.Signal=FMC_D2_DA2 PD1.Signal=FMC_D3_DA3 PD10.Signal=FMC_D15_DA15 PD14.Signal=FMC_D0_DA0 PD15.Signal=FMC_D1_DA1 +PD2.Locked=true +PD2.Mode=SD_4_bits_Wide_bus +PD2.Signal=SDMMC1_CMD PD8.Signal=FMC_D13_DA13 PD9.Signal=FMC_D14_DA14 PE0.Locked=true @@ -310,7 +328,7 @@ PI7.Signal=LTDC_B7 PI9.Mode=RGB565 PI9.Signal=LTDC_VSYNC PinOutPanel.RotationAngle=0 -ProjectManager.AskForMigrate=false +ProjectManager.AskForMigrate=true ProjectManager.BackupPrevious=false ProjectManager.CompilerOptimize=6 ProjectManager.ComputerToolchain=false @@ -336,7 +354,7 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=MDK-ARM V5 ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_FMC_Init-FMC-false-HAL-true,6-MX_DMA2D_Init-DMA2D-false-HAL-true,7-MX_LTDC_Init-LTDC-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_IWDG1_Init-IWDG1-false-HAL-true,10-MX_QUADSPI_Init-QUADSPI-false-HAL-true,11-MX_SPI2_Init-SPI2-false-HAL-true,12-MX_USART2_UART_Init-USART2-false-HAL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_FMC_Init-FMC-false-HAL-true,6-MX_DMA2D_Init-DMA2D-false-HAL-true,7-MX_LTDC_Init-LTDC-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_IWDG1_Init-IWDG1-false-HAL-true,10-MX_QUADSPI_Init-QUADSPI-false-HAL-true,11-MX_SPI2_Init-SPI2-false-HAL-true,12-MX_USART2_UART_Init-USART2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true RCC.ADCFreq_Value=50390625 RCC.AHB12Freq_Value=200000000 RCC.AHB4Freq_Value=200000000 diff --git a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc/stm32h7xx_hal_conf.h b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc/stm32h7xx_hal_conf.h index c9bf95675b..74341328db 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc/stm32h7xx_hal_conf.h +++ b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc/stm32h7xx_hal_conf.h @@ -46,12 +46,17 @@ /* #define HAL_ETH_MODULE_ENABLED */ /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_OTFDEC_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ #define HAL_SDRAM_MODULE_ENABLED /* #define HAL_HASH_MODULE_ENABLED */ /* #define HAL_HRTIM_MODULE_ENABLED */ +/* #define HAL_HSEM_MODULE_ENABLED */ +/* #define HAL_GFXMMU_MODULE_ENABLED */ /* #define HAL_JPEG_MODULE_ENABLED */ /* #define HAL_OPAMP_MODULE_ENABLED */ +/* #define HAL_OSPI_MODULE_ENABLED */ +/* #define HAL_OSPI_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ #define HAL_IWDG_MODULE_ENABLED @@ -61,7 +66,7 @@ /* #define HAL_RNG_MODULE_ENABLED */ #define HAL_RTC_MODULE_ENABLED /* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ +#define HAL_SD_MODULE_ENABLED /* #define HAL_MMC_MODULE_ENABLED */ /* #define HAL_SPDIFRX_MODULE_ENABLED */ #define HAL_SPI_MODULE_ENABLED @@ -78,6 +83,8 @@ /* #define HAL_DSI_MODULE_ENABLED */ /* #define HAL_JPEG_MODULE_ENABLED */ /* #define HAL_MDIOS_MODULE_ENABLED */ +/* #define HAL_PSSI_MODULE_ENABLED */ +/* #define HAL_DTS_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED #define HAL_DMA_MODULE_ENABLED #define HAL_MDMA_MODULE_ENABLED @@ -162,6 +169,7 @@ #define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ #define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ #define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_DTS_REGISTER_CALLBACKS 0U /* DTS register callback disabled */ #define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ #define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */ #define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ @@ -170,24 +178,33 @@ #define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ #define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ #define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */ #define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */ #define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ #define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ #define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */ #define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ #define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ #define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ #define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */ +#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U /* OSPI register callback disabled */ +#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */ #define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ #define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ #define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ #define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ #define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ #define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ #define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ #define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ #define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U /* SWPMI register callback disabled */ #define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ #define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ /* ########################### Ethernet Configuration ######################### */ @@ -293,6 +310,10 @@ #include "stm32h7xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32h7xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + #ifdef HAL_HRTIM_MODULE_ENABLED #include "stm32h7xx_hal_hrtim.h" #endif /* HAL_HRTIM_MODULE_ENABLED */ @@ -349,6 +370,14 @@ #include "stm32h7xx_hal_opamp.h" #endif /* HAL_OPAMP_MODULE_ENABLED */ +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32h7xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_OTFDEC_MODULE_ENABLED +#include "stm32h7xx_hal_otfdec.h" +#endif /* HAL_OTFDEC_MODULE_ENABLED */ + #ifdef HAL_PWR_MODULE_ENABLED #include "stm32h7xx_hal_pwr.h" #endif /* HAL_PWR_MODULE_ENABLED */ @@ -428,7 +457,15 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32h7xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32h7xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + +#ifdef HAL_DTS_MODULE_ENABLED + #include "stm32h7xx_hal_dts.h" +#endif /* HAL_DTS_MODULE_ENABLED */ + /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT /** @@ -439,11 +476,11 @@ * If expr is true, it returns no value. * @retval None */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) /* Exported functions ------------------------------------------------------- */ void assert_failed(uint8_t* file, uint32_t line); #else - #define assert_param(expr) ((void)0) + #define assert_param(expr) ((void)0U) #endif /* USE_FULL_ASSERT */ #ifdef __cplusplus diff --git a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc/stm32h7xx_it.h b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc/stm32h7xx_it.h index db941b21c4..4fa3888de2 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc/stm32h7xx_it.h +++ b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc/stm32h7xx_it.h @@ -73,6 +73,7 @@ void PendSV_Handler(void); void SysTick_Handler(void); void USART1_IRQHandler(void); void USART2_IRQHandler(void); +void SDMMC1_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/main.c index d926f91fbd..eac4d102d3 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/main.c +++ b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/main.c @@ -73,6 +73,8 @@ QSPI_HandleTypeDef hqspi; RTC_HandleTypeDef hrtc; +SD_HandleTypeDef hsd1; + SPI_HandleTypeDef hspi2; UART_HandleTypeDef huart1; @@ -96,6 +98,7 @@ static void MX_IWDG1_Init(void); static void MX_QUADSPI_Init(void); static void MX_SPI2_Init(void); static void MX_USART2_UART_Init(void); +static void MX_SDMMC1_SD_Init(void); /* USER CODE BEGIN PFP */ /* USER CODE END PFP */ @@ -114,7 +117,6 @@ int main(void) /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ - /* Enable I-Cache---------------------------------------------------------*/ SCB_EnableICache(); @@ -149,6 +151,7 @@ int main(void) MX_QUADSPI_Init(); MX_SPI2_Init(); MX_USART2_UART_Init(); + MX_SDMMC1_SD_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -229,8 +232,8 @@ void SystemClock_Config(void) } PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_LTDC |RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_USART1 - |RCC_PERIPHCLK_SPI2|RCC_PERIPHCLK_QSPI - |RCC_PERIPHCLK_FMC; + |RCC_PERIPHCLK_SPI2|RCC_PERIPHCLK_SDMMC + |RCC_PERIPHCLK_QSPI|RCC_PERIPHCLK_FMC; PeriphClkInitStruct.PLL3.PLL3M = 5; PeriphClkInitStruct.PLL3.PLL3N = 160; PeriphClkInitStruct.PLL3.PLL3P = 2; @@ -241,6 +244,7 @@ void SystemClock_Config(void) PeriphClkInitStruct.PLL3.PLL3FRACN = 0; PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_D1HCLK; PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK; + PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL; PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2; @@ -270,6 +274,9 @@ static void MX_DMA2D_Init(void) hdma2d.Init.Mode = DMA2D_R2M; hdma2d.Init.ColorMode = DMA2D_OUTPUT_RGB565; hdma2d.Init.OutputOffset = 0; + hdma2d.Init.BytesSwap = DMA2D_BYTES_REGULAR; + hdma2d.Init.LineOffsetMode = DMA2D_LOM_PIXELS; + hdma2d.LayerCfg[1].AlphaInverted = DMA2D_REGULAR_ALPHA; if (HAL_DMA2D_Init(&hdma2d) != HAL_OK) { Error_Handler(); @@ -467,6 +474,38 @@ static void MX_RTC_Init(void) } +/** + * @brief SDMMC1 Initialization Function + * @param None + * @retval None + */ +static void MX_SDMMC1_SD_Init(void) +{ + + /* USER CODE BEGIN SDMMC1_Init 0 */ + + /* USER CODE END SDMMC1_Init 0 */ + + /* USER CODE BEGIN SDMMC1_Init 1 */ + + /* USER CODE END SDMMC1_Init 1 */ + hsd1.Instance = SDMMC1; + hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; + hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + hsd1.Init.ClockDiv = 0; + hsd1.Init.TranceiverPresent = SDMMC_TRANSCEIVER_NOT_PRESENT; + if (HAL_SD_Init(&hsd1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SDMMC1_Init 2 */ + + /* USER CODE END SDMMC1_Init 2 */ + +} + /** * @brief SPI2 Initialization Function * @param None diff --git a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/stm32h7xx_hal_msp.c b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/stm32h7xx_hal_msp.c index e2850cb336..bb790a7df0 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/stm32h7xx_hal_msp.c +++ b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/stm32h7xx_hal_msp.c @@ -432,6 +432,96 @@ void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) } +/** +* @brief SD MSP Initialization +* This function configures the hardware resources used in this example +* @param hsd: SD handle pointer +* @retval None +*/ +//void HAL_SD_MspInit(SD_HandleTypeDef* hsd) +//{ +// GPIO_InitTypeDef GPIO_InitStruct = {0}; +// if(hsd->Instance==SDMMC1) +// { +// /* USER CODE BEGIN SDMMC1_MspInit 0 */ + +// /* USER CODE END SDMMC1_MspInit 0 */ +// /* Peripheral clock enable */ +// __HAL_RCC_SDMMC1_CLK_ENABLE(); +// +// __HAL_RCC_GPIOC_CLK_ENABLE(); +// __HAL_RCC_GPIOD_CLK_ENABLE(); +// /**SDMMC1 GPIO Configuration +// PC8 ------> SDMMC1_D0 +// PC9 ------> SDMMC1_D1 +// PC10 ------> SDMMC1_D2 +// PC11 ------> SDMMC1_D3 +// PC12 ------> SDMMC1_CK +// PD2 ------> SDMMC1_CMD +// */ +// GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11 +// |GPIO_PIN_12; +// GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; +// GPIO_InitStruct.Pull = GPIO_NOPULL; +// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; +// GPIO_InitStruct.Alternate = GPIO_AF12_SDIO1; +// HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + +// GPIO_InitStruct.Pin = GPIO_PIN_2; +// GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; +// GPIO_InitStruct.Pull = GPIO_NOPULL; +// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; +// GPIO_InitStruct.Alternate = GPIO_AF12_SDIO1; +// HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + +// /* SDMMC1 interrupt Init */ +// HAL_NVIC_SetPriority(SDMMC1_IRQn, 2, 0); +// HAL_NVIC_EnableIRQ(SDMMC1_IRQn); +// /* USER CODE BEGIN SDMMC1_MspInit 1 */ + +// /* USER CODE END SDMMC1_MspInit 1 */ +// } + +//} + +/** +* @brief SD MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hsd: SD handle pointer +* @retval None +*/ +void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd) +{ + if(hsd->Instance==SDMMC1) + { + /* USER CODE BEGIN SDMMC1_MspDeInit 0 */ + + /* USER CODE END SDMMC1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SDMMC1_CLK_DISABLE(); + + /**SDMMC1 GPIO Configuration + PC8 ------> SDMMC1_D0 + PC9 ------> SDMMC1_D1 + PC10 ------> SDMMC1_D2 + PC11 ------> SDMMC1_D3 + PC12 ------> SDMMC1_CK + PD2 ------> SDMMC1_CMD + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11 + |GPIO_PIN_12); + + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2); + + /* SDMMC1 interrupt DeInit */ + HAL_NVIC_DisableIRQ(SDMMC1_IRQn); + /* USER CODE BEGIN SDMMC1_MspDeInit 1 */ + + /* USER CODE END SDMMC1_MspDeInit 1 */ + } + +} + /** * @brief SPI MSP Initialization * This function configures the hardware resources used in this example @@ -627,6 +717,7 @@ static void HAL_FMC_MspInit(void){ return; } FMC_Initialized = 1; + /* Peripheral clock enable */ __HAL_RCC_FMC_CLK_ENABLE(); diff --git a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/stm32h7xx_it.c b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/stm32h7xx_it.c index 8e199b27ab..e02a6acc7b 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/stm32h7xx_it.c +++ b/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/stm32h7xx_it.c @@ -71,6 +71,7 @@ /* USER CODE END 0 */ /* External variables --------------------------------------------------------*/ +extern SD_HandleTypeDef hsd1; extern UART_HandleTypeDef huart1; extern UART_HandleTypeDef huart2; /* USER CODE BEGIN EV */ @@ -241,6 +242,20 @@ void USART2_IRQHandler(void) /* USER CODE END USART2_IRQn 1 */ } +/** + * @brief This function handles SDMMC1 global interrupt. + */ +void SDMMC1_IRQHandler(void) +{ + /* USER CODE BEGIN SDMMC1_IRQn 0 */ + + /* USER CODE END SDMMC1_IRQn 0 */ + HAL_SD_IRQHandler(&hsd1); + /* USER CODE BEGIN SDMMC1_IRQn 1 */ + + /* USER CODE END SDMMC1_IRQn 1 */ +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/bsp/stm32/stm32h743-atk-apollo/board/Kconfig b/bsp/stm32/stm32h743-atk-apollo/board/Kconfig index 8fc1fb5789..9972898c7b 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/Kconfig +++ b/bsp/stm32/stm32h743-atk-apollo/board/Kconfig @@ -34,6 +34,12 @@ menu "Onboard Peripheral Drivers" select RT_USING_SFUD select RT_SFUD_USING_QSPI default n + config BSP_USING_SDMMC + bool "Enable SDMMC (SD card)" + select RT_USING_SDIO + select RT_USING_DFS + select RT_USING_DFS_ELMFAT + default n endmenu @@ -133,7 +139,7 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - + source "../libraries/HAL_Drivers/Kconfig" endmenu diff --git a/bsp/stm32/stm32h743-atk-apollo/board/SConscript b/bsp/stm32/stm32h743-atk-apollo/board/SConscript index 2b38b08a81..8ed2e269df 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/SConscript +++ b/bsp/stm32/stm32h743-atk-apollo/board/SConscript @@ -15,6 +15,8 @@ CubeMX_Config/Src/stm32h7xx_hal_msp.c if GetDepend(['BSP_USING_QSPI_FLASH']): src += Glob('ports/drv_qspi_flash.c') +if GetDepend(['BSP_USING_SDMMC']): + src += Glob('ports/drv_sdio.c') path = [cwd] path += [cwd + '/CubeMX_Config/Inc'] diff --git a/bsp/stm32/stm32h743-atk-apollo/board/board.c b/bsp/stm32/stm32h743-atk-apollo/board/board.c index 55fe6a3454..0ae3016460 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/board.c +++ b/bsp/stm32/stm32h743-atk-apollo/board/board.c @@ -43,7 +43,7 @@ void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLM = 5; RCC_OscInitStruct.PLL.PLLN = 160; RCC_OscInitStruct.PLL.PLLP = 2; - RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLQ = 4; RCC_OscInitStruct.PLL.PLLR = 2; RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; diff --git a/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_sdio.c b/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_sdio.c new file mode 100644 index 0000000000..454371859f --- /dev/null +++ b/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_sdio.c @@ -0,0 +1,497 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + */ + +#include "board.h" +#include "drv_sdio.h" + +#ifdef BSP_USING_SDMMC + +#define DBG_TAG "drv.sdio" +#ifdef DRV_DEBUG +#define DBG_LVL DBG_LOG +#else +#define DBG_LVL DBG_INFO +#endif /* DRV_DEBUG */ +#include + +static struct rt_mmcsd_host *host; +#define SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS (100000) + +struct sdio_pkg +{ + struct rt_mmcsd_cmd *cmd; + void *buff; + rt_uint32_t flag; +}; + +struct rthw_sdio +{ + struct rt_mmcsd_host *host; + struct stm32_sdio_des sdio_des; + struct rt_event event; + struct sdio_pkg *pkg; +}; + +ALIGN(SDIO_ALIGN_LEN) +static rt_uint8_t cache_buf[SDIO_BUFF_SIZE]; + +/** + * @brief This function get order from sdio. + * @param data + * @retval sdio order + */ +static int get_order(rt_uint32_t data) +{ + int order = 0; + + switch (data) + { + case 1: + order = 0; + break; + case 2: + order = 1; + break; + case 4: + order = 2; + break; + case 8: + order = 3; + break; + case 16: + order = 4; + break; + case 32: + order = 5; + break; + case 64: + order = 6; + break; + case 128: + order = 7; + break; + case 256: + order = 8; + break; + case 512: + order = 9; + break; + case 1024: + order = 10; + break; + case 2048: + order = 11; + break; + case 4096: + order = 12; + break; + case 8192: + order = 13; + break; + case 16384: + order = 14; + break; + default : + order = 0; + break; + } + return order; +} + +/** + * @brief This function wait sdio cmd completed. + * @param sdio rthw_sdio + * @retval None + */ +static void rthw_sdio_wait_completed(struct rthw_sdio *sdio) +{ + rt_uint32_t status; + struct rt_mmcsd_cmd *cmd = sdio->pkg->cmd; + struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio; + + if (rt_event_recv(&sdio->event, 0xffffffff, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, + rt_tick_from_millisecond(5000), &status) != RT_EOK) + { + LOG_E("wait cmd completed timeout"); + cmd->err = -RT_ETIMEOUT; + return; + } + + cmd->resp[0] = hw_sdio->resp1; + if (resp_type(cmd) == RESP_R2) + { + cmd->resp[1] = hw_sdio->resp2; + cmd->resp[2] = hw_sdio->resp3; + cmd->resp[3] = hw_sdio->resp4; + } + + if (status & SDIO_ERRORS) + { + if ((status & SDMMC_STA_CCRCFAIL) && (resp_type(cmd) & (RESP_R3 | RESP_R4))) + { + cmd->err = RT_EOK; + } + else + { + cmd->err = -RT_ERROR; + } + } + + if (cmd->err == RT_EOK) + { + LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); + } + else + { + LOG_D("send command error = %d", cmd->err); + } +} + +/** + * @brief This function send command. + * @param sdio rthw_sdio + * @param pkg sdio package + * @retval None + */ +static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg) +{ + struct rt_mmcsd_cmd *cmd = pkg->cmd; + struct rt_mmcsd_data *data = cmd->data; + struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio; + rt_uint32_t reg_cmd; + + /* save pkg */ + sdio->pkg = pkg; + + LOG_D("CMD:%d ARG:0x%08x RES:%s%s%s%s%s%s%s%s%s rw:%c len:%d blksize:%d\n", + cmd->cmd_code, + cmd->arg, + resp_type(cmd) == RESP_NONE ? "NONE" : "", + resp_type(cmd) == RESP_R1 ? "R1" : "", + resp_type(cmd) == RESP_R1B ? "R1B" : "", + resp_type(cmd) == RESP_R2 ? "R2" : "", + resp_type(cmd) == RESP_R3 ? "R3" : "", + resp_type(cmd) == RESP_R4 ? "R4" : "", + resp_type(cmd) == RESP_R5 ? "R5" : "", + resp_type(cmd) == RESP_R6 ? "R6" : "", + resp_type(cmd) == RESP_R7 ? "R7" : "", + data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-', + data ? data->blks * data->blksize : 0, + data ? data->blksize : 0 + ); + + hw_sdio->mask |= SDIO_MASKR_ALL; + reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN; + + /* data pre configuration */ + if (data != RT_NULL) + { + SCB_CleanInvalidateDCache(); + + reg_cmd |= SDMMC_CMD_CMDTRANS; + + hw_sdio->mask &= ~(SDMMC_MASK_CMDRENDIE | SDMMC_MASK_CMDSENTIE); + hw_sdio->dtimer = HW_SDIO_DATATIMEOUT; + hw_sdio->dlen = data->blks * data->blksize; + hw_sdio->dctrl = (get_order(data->blksize)<<4) | (data->flags & DATA_DIR_READ ? SDMMC_DCTRL_DTDIR : 0); + hw_sdio->idmabase0r = (rt_uint32_t)cache_buf; + hw_sdio->idmatrlr = SDMMC_IDMA_IDMAEN; + } + + if (resp_type(cmd) == RESP_R2) + reg_cmd |= SDMMC_CMD_WAITRESP; + else if(resp_type(cmd) != RESP_NONE) + reg_cmd |= SDMMC_CMD_WAITRESP_0; + + hw_sdio->arg = cmd->arg; + hw_sdio->cmd = reg_cmd; + /* wait completed */ + rthw_sdio_wait_completed(sdio); + + + /* Waiting for data to be sent to completion */ + if (data != RT_NULL) + { + volatile rt_uint32_t count = SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS; + + while (count && (hw_sdio->sta & SDMMC_STA_DPSMACT)) + { + count--; + } + if ((count == 0) || (hw_sdio->sta & SDIO_ERRORS)) + { + cmd->err = -RT_ERROR; + } + } + + + /* data post configuration */ + if (data != RT_NULL) + { + if (data->flags & DATA_DIR_READ) + { + rt_memcpy(data->buf, cache_buf, data->blks * data->blksize); + SCB_CleanInvalidateDCache(); + } + } +} + +/** + * @brief This function send sdio request. + * @param sdio rthw_sdio + * @param req request + * @retval None + */ +static void rthw_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req) +{ + struct sdio_pkg pkg; + struct rthw_sdio *sdio = host->private_data; + struct rt_mmcsd_data *data; + + if (req->cmd != RT_NULL) + { + rt_memset(&pkg, 0, sizeof(pkg)); + data = req->cmd->data; + pkg.cmd = req->cmd; + + if (data != RT_NULL) + { + rt_uint32_t size = data->blks * data->blksize; + + RT_ASSERT(size <= SDIO_BUFF_SIZE); + + if (data->flags & DATA_DIR_WRITE) + { + rt_memcpy(cache_buf, data->buf, size); + } + } + + rthw_sdio_send_command(sdio, &pkg); + } + + if (req->stop != RT_NULL) + { + rt_memset(&pkg, 0, sizeof(pkg)); + pkg.cmd = req->stop; + rthw_sdio_send_command(sdio, &pkg); + } + + mmcsd_req_complete(sdio->host); +} + + +/** + * @brief This function interrupt process function. + * @param host rt_mmcsd_host + * @retval None + */ +void rthw_sdio_irq_process(struct rt_mmcsd_host *host) +{ + struct rthw_sdio *sdio = host->private_data; + struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio; + rt_uint32_t intstatus = hw_sdio->sta; + + /* clear irq flag*/ + hw_sdio->icr = intstatus; + + rt_event_send(&sdio->event, intstatus); +} + +/** + * @brief This function config sdio. + * @param host rt_mmcsd_host + * @param io_cfg rt_mmcsd_io_cfg + * @retval None + */ +static void rthw_sdio_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg) +{ + rt_uint32_t temp, clk_src; + rt_uint32_t clk = io_cfg->clock; + struct rthw_sdio *sdio = host->private_data; + struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio; + + LOG_D("clk:%dK width:%s%s%s power:%s%s%s", + clk/1000, + io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "", + io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "", + io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "", + io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "", + io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "", + io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : "" + ); + + clk_src = SDIO_CLOCK_FREQ; + + if (clk > 0) + { + if (clk > host->freq_max) + clk = host->freq_max; + temp = DIV_ROUND_UP(clk_src, 2 * clk); + if (temp > 0x3FF) + temp = 0x3FF; + } + + if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4) + temp |= SDMMC_CLKCR_WIDBUS_0; + else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8) + temp |= SDMMC_CLKCR_WIDBUS_1; + + hw_sdio->clkcr = temp; + + if (io_cfg->power_mode == MMCSD_POWER_ON) + hw_sdio->power |= SDMMC_POWER_PWRCTRL; +} + +static const struct rt_mmcsd_host_ops ops = +{ + rthw_sdio_request, + rthw_sdio_iocfg, + RT_NULL, + RT_NULL, +}; + +/** + * @brief This function create mmcsd host. + * @param sdio_des stm32_sdio_des + * @retval rt_mmcsd_host + */ +struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des) +{ + struct rt_mmcsd_host *host; + struct rthw_sdio *sdio = RT_NULL; + + if (sdio_des == RT_NULL) + { + return RT_NULL; + } + + sdio = rt_malloc(sizeof(struct rthw_sdio)); + if (sdio == RT_NULL) + { + LOG_E("malloc rthw_sdio fail"); + return RT_NULL; + } + rt_memset(sdio, 0, sizeof(struct rthw_sdio)); + + host = mmcsd_alloc_host(); + if (host == RT_NULL) + { + LOG_E("alloc host fail"); + goto err; + } + + rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct stm32_sdio_des)); + + sdio->sdio_des.hw_sdio = (struct stm32_sdio *)SDIO_BASE_ADDRESS; + + rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO); + + /* set host default attributes */ + host->ops = &ops; + host->freq_min = 400 * 1000; + host->freq_max = SDIO_MAX_FREQ; + host->valid_ocr = VDD_32_33 | VDD_33_34;/* The voltage range supported is 3.2v-3.4v */ +#ifndef SDIO_USING_1_BIT + host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED; +#else + host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED; +#endif + + host->max_seg_size = SDIO_BUFF_SIZE; + host->max_dma_segs = 1; + host->max_blk_size = 512; + host->max_blk_count = 512; + + /* link up host and sdio */ + sdio->host = host; + host->private_data = sdio; + + /* ready to change */ + mmcsd_change(host); + + return host; + +err: + if (sdio) rt_free(sdio); + + return RT_NULL; +} + +void SDMMC1_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + /* Process All SDIO Interrupt Sources */ + rthw_sdio_irq_process(host); + /* leave interrupt */ + rt_interrupt_leave(); +} + +void HAL_SD_MspInit(SD_HandleTypeDef * hsd) +{ + GPIO_InitTypeDef GPIO_Initure; + + __HAL_RCC_SDMMC1_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + + /* PC8,9,10,11,12 */ + GPIO_Initure.Pin=GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12; + GPIO_Initure.Mode=GPIO_MODE_AF_PP; + GPIO_Initure.Pull=GPIO_NOPULL; + GPIO_Initure.Speed=GPIO_SPEED_FREQ_HIGH; + GPIO_Initure.Alternate=GPIO_AF12_SDIO1; + HAL_GPIO_Init(GPIOC,&GPIO_Initure); + + /* PD2 */ + GPIO_Initure.Pin=GPIO_PIN_2; + HAL_GPIO_Init(GPIOD,&GPIO_Initure); + + HAL_NVIC_SetPriority(SDMMC1_IRQn, 2, 0); + HAL_NVIC_EnableIRQ(SDMMC1_IRQn); +} + +int rt_hw_sdio_init(void) +{ + struct stm32_sdio_des sdio_des; + SD_HandleTypeDef hsd; + + HAL_SD_MspInit(&hsd); + + host = sdio_host_create(&sdio_des); + if (host == RT_NULL) + { + LOG_E("host create fail"); + return RT_NULL; + } + return 0; +} +INIT_DEVICE_EXPORT(rt_hw_sdio_init); + + +#include + +int mnt_init(void) +{ + rt_thread_delay(RT_TICK_PER_SECOND); + + if (dfs_mount("sd0", "/", "elm", 0, 0) != 0) + { + rt_kprintf("file system mount failed!\n"); + } + else + { + rt_kprintf("file system mount success!\n"); + } + + return 0; +} +INIT_ENV_EXPORT(mnt_init); + +#endif /* BSP_USING_SDMMC */ diff --git a/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_sdio.h b/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_sdio.h new file mode 100644 index 0000000000..10be3b972a --- /dev/null +++ b/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_sdio.h @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * + */ + +#ifndef __DRV_SDIO_H__ +#define __DRV_SDIO_H__ +#include +#include "rtdevice.h" +#include +#include +//#include "drv_dma.h" +#include +#include +#include + +#define SDIO_BUFF_SIZE 4096 +#define SDIO_ALIGN_LEN 32 + + +#ifndef SDIO_BASE_ADDRESS +#define SDIO_BASE_ADDRESS (0x52007000) +#endif + +#ifndef SDIO_CLOCK_FREQ +#define SDIO_CLOCK_FREQ (200U * 1000 * 1000) +#endif + +#ifndef SDIO_BUFF_SIZE +#define SDIO_BUFF_SIZE (4096) +#endif + +#ifndef SDIO_ALIGN_LEN +#define SDIO_ALIGN_LEN (32) +#endif + +#ifndef SDIO_MAX_FREQ +#define SDIO_MAX_FREQ (25 * 1000 * 1000) +#endif + +#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) + +#define SDIO_ERRORS \ + (SDMMC_STA_IDMATE | SDMMC_STA_ACKTIMEOUT | \ + SDMMC_STA_RXOVERR | SDMMC_STA_TXUNDERR | \ + SDMMC_STA_DTIMEOUT | SDMMC_STA_CTIMEOUT | \ + SDMMC_STA_DCRCFAIL | SDMMC_STA_CCRCFAIL) + +//#define SDIO_MASKR_ALL (0x17E00FFF) +#define SDIO_MASKR_ALL (0x11C003FF) + +#define HW_SDIO_DATATIMEOUT (0xFFFFFFFFU) + +struct stm32_sdio +{ + volatile rt_uint32_t power; /* offset 0x00 */ + volatile rt_uint32_t clkcr; /* offset 0x04 */ + volatile rt_uint32_t arg; /* offset 0x08 */ + volatile rt_uint32_t cmd; /* offset 0x0C */ + volatile rt_uint32_t respcmd; /* offset 0x10 */ + volatile rt_uint32_t resp1; /* offset 0x14 */ + volatile rt_uint32_t resp2; /* offset 0x18 */ + volatile rt_uint32_t resp3; /* offset 0x1C */ + volatile rt_uint32_t resp4; /* offset 0x20 */ + volatile rt_uint32_t dtimer; /* offset 0x24 */ + volatile rt_uint32_t dlen; /* offset 0x28 */ + volatile rt_uint32_t dctrl; /* offset 0x2C */ + volatile rt_uint32_t dcount; /* offset 0x30 */ + volatile rt_uint32_t sta; /* offset 0x34 */ + volatile rt_uint32_t icr; /* offset 0x38 */ + volatile rt_uint32_t mask; /* offset 0x3C */ + volatile rt_uint32_t acktimer; /* offset 0x40 */ + volatile rt_uint32_t reserved0[3]; /* offset 0x44 ~ 0x4C */ + volatile rt_uint32_t idmatrlr; /* offset 0x50 */ + volatile rt_uint32_t idmabsizer; /* offset 0x54 */ + volatile rt_uint32_t idmabase0r; /* offset 0x58 */ + volatile rt_uint32_t idmabase1r; /* offset 0x5C */ + volatile rt_uint32_t reserved1[8]; /* offset 0x60 ~ 7C */ + volatile rt_uint32_t fifo; /* offset 0x80 */ +}; + +typedef rt_uint32_t (*sdio_clk_get)(struct stm32_sdio *hw_sdio); + +struct stm32_sdio_des +{ + struct stm32_sdio *hw_sdio; + sdio_clk_get clk_get; +}; + +/* stm32 sdio dirver class */ +struct stm32_sdio_class +{ + struct stm32_sdio_des *des; + const struct stm32_sdio_config *cfg; + struct rt_mmcsd_host host; +}; + +extern void stm32_mmcsd_change(void); + +#endif /* __DRV_SDIO_H__ */ diff --git a/bsp/stm32/stm32h743-atk-apollo/project.uvprojx b/bsp/stm32/stm32h743-atk-apollo/project.uvprojx index b93e3828f7..770bc641af 100644 --- a/bsp/stm32/stm32h743-atk-apollo/project.uvprojx +++ b/bsp/stm32/stm32h743-atk-apollo/project.uvprojx @@ -392,13 +392,6 @@ ..\..\..\src\components.c - - - cpu.c - 1 - ..\..\..\src\cpu.c - - device.c @@ -681,6 +674,16 @@ + + libc + + + time.c + 1 + ..\..\..\components\libc\compilers\common\time.c + + + STM32_HAL diff --git a/bsp/stm32/stm32h743-atk-apollo/rtconfig.h b/bsp/stm32/stm32h743-atk-apollo/rtconfig.h index 929918ba1e..bc9a31c7ab 100644 --- a/bsp/stm32/stm32h743-atk-apollo/rtconfig.h +++ b/bsp/stm32/stm32h743-atk-apollo/rtconfig.h @@ -38,7 +38,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x40002 +#define RT_VER_NUM 0x40003 #define ARCH_ARM #define RT_USING_CPU_FFS #define ARCH_ARM_CORTEX_M @@ -82,17 +82,12 @@ #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN -/* Using Hardware Crypto drivers */ - - -/* Using WiFi */ - - /* Using USB */ /* POSIX layer and C standard library */ +#define RT_LIBC_USING_TIME /* Network */