From d188fa496cde833bf5dedba1ad79aa88756ac911 Mon Sep 17 00:00:00 2001 From: liquanqing Date: Mon, 25 Jun 2018 13:25:54 +0800 Subject: [PATCH] solve the dependency on the stm32 header file for freemodbus --- .../net/freemodbus/modbus/functions/mbutils.c | 4 ++-- components/net/freemodbus/modbus/rtu/mbrtu.c | 8 ++++---- components/net/freemodbus/port/portserial.c | 6 +++--- components/net/freemodbus/port/user_mb_app.h | 18 +++++++++++------- 4 files changed, 20 insertions(+), 16 deletions(-) diff --git a/components/net/freemodbus/modbus/functions/mbutils.c b/components/net/freemodbus/modbus/functions/mbutils.c index 4ffbd3e001..2afe3b84b7 100644 --- a/components/net/freemodbus/modbus/functions/mbutils.c +++ b/components/net/freemodbus/modbus/functions/mbutils.c @@ -53,8 +53,8 @@ xMBUtilSetBits( UCHAR * ucByteBuf, USHORT usBitOffset, UCHAR ucNBits, USHORT usNPreBits; USHORT usValue = ucValue; - assert_param( ucNBits <= 8 ); - assert_param( ( size_t )BITS_UCHAR == sizeof( UCHAR ) * 8 ); + RT_ASSERT( ucNBits <= 8 ); + RT_ASSERT( ( size_t )BITS_UCHAR == sizeof( UCHAR ) * 8 ); /* Calculate byte offset for first byte containing the bit values starting * at usBitOffset. */ diff --git a/components/net/freemodbus/modbus/rtu/mbrtu.c b/components/net/freemodbus/modbus/rtu/mbrtu.c index c023c92654..c7e07826b9 100644 --- a/components/net/freemodbus/modbus/rtu/mbrtu.c +++ b/components/net/freemodbus/modbus/rtu/mbrtu.c @@ -153,7 +153,7 @@ eMBRTUReceive( UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHORT * pusLength ) eMBErrorCode eStatus = MB_ENOERR; ENTER_CRITICAL_SECTION( ); - assert_param( usRcvBufferPos < MB_SER_PDU_SIZE_MAX ); + RT_ASSERT( usRcvBufferPos < MB_SER_PDU_SIZE_MAX ); /* Length and CRC check */ if( ( usRcvBufferPos >= MB_SER_PDU_SIZE_MIN ) @@ -226,7 +226,7 @@ xMBRTUReceiveFSM( void ) BOOL xTaskNeedSwitch = FALSE; UCHAR ucByte; - assert_param( eSndState == STATE_TX_IDLE ); + RT_ASSERT( eSndState == STATE_TX_IDLE ); /* Always read the character. */ ( void )xMBPortSerialGetByte( ( CHAR * ) & ucByte ); @@ -285,7 +285,7 @@ xMBRTUTransmitFSM( void ) { BOOL xNeedPoll = FALSE; - assert_param( eRcvState == STATE_RX_IDLE ); + RT_ASSERT( eRcvState == STATE_RX_IDLE ); switch ( eSndState ) { @@ -342,7 +342,7 @@ xMBRTUTimerT35Expired( void ) /* Function called in an illegal state. */ default: - assert_param( ( eRcvState == STATE_RX_INIT ) || + RT_ASSERT( ( eRcvState == STATE_RX_INIT ) || ( eRcvState == STATE_RX_RCV ) || ( eRcvState == STATE_RX_ERROR ) ); break; } diff --git a/components/net/freemodbus/port/portserial.c b/components/net/freemodbus/port/portserial.c index 11173579ad..0ad33d7a7c 100644 --- a/components/net/freemodbus/port/portserial.c +++ b/components/net/freemodbus/port/portserial.c @@ -56,7 +56,7 @@ BOOL xMBPortSerialInit(UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, * set 485 mode receive and transmit control IO * @note MODBUS_SLAVE_RT_CONTROL_PIN_INDEX need be defined by user */ - rt_pin_mode(MODBUS_SLAVE_RT_CONTROL_PIN_INDEX, PIN_MODE_OUTPUT); + //rt_pin_mode(MODBUS_SLAVE_RT_CONTROL_PIN_INDEX, PIN_MODE_OUTPUT); /* set serial name */ if (ucPORT == 1) { @@ -127,12 +127,12 @@ void vMBPortSerialEnable(BOOL xRxEnable, BOOL xTxEnable) /* enable RX interrupt */ serial->ops->control(serial, RT_DEVICE_CTRL_SET_INT, (void *)RT_DEVICE_FLAG_INT_RX); /* switch 485 to receive mode */ - rt_pin_write(MODBUS_SLAVE_RT_CONTROL_PIN_INDEX, PIN_LOW); + //rt_pin_write(MODBUS_SLAVE_RT_CONTROL_PIN_INDEX, PIN_LOW); } else { /* switch 485 to transmit mode */ - rt_pin_write(MODBUS_SLAVE_RT_CONTROL_PIN_INDEX, PIN_HIGH); + //rt_pin_write(MODBUS_SLAVE_RT_CONTROL_PIN_INDEX, PIN_HIGH); /* disable RX interrupt */ serial->ops->control(serial, RT_DEVICE_CTRL_CLR_INT, (void *)RT_DEVICE_FLAG_INT_RX); } diff --git a/components/net/freemodbus/port/user_mb_app.h b/components/net/freemodbus/port/user_mb_app.h index 864c3860bf..ce3e69f382 100644 --- a/components/net/freemodbus/port/user_mb_app.h +++ b/components/net/freemodbus/port/user_mb_app.h @@ -12,10 +12,10 @@ #define S_DISCRETE_INPUT_NDISCRETES 16 #define S_COIL_START 0 #define S_COIL_NCOILS 64 -#define S_REG_INPUT_START 0 -#define S_REG_INPUT_NREGS 100 +#define S_REG_INPUT_START (0x0000) +#define S_REG_INPUT_NREGS (0x0006 - 0x0000) #define S_REG_HOLDING_START 0 -#define S_REG_HOLDING_NREGS 100 +#define S_REG_HOLDING_NREGS (0x004B) /* salve mode: holding register's all address */ #define S_HD_RESERVE 0 /* salve mode: input register's all address */ @@ -24,15 +24,19 @@ #define S_CO_RESERVE 0 /* salve mode: discrete's all address */ #define S_DI_RESERVE 0 +/* slave mode: holding register"s startup address */ +#define S_SYSTEM_START_ADDR 0x003A +#define S_SYSTEM_SLAVE_ID_ADDR 0x0040 +#define S_SYSTEM_KEEP_TEMP 0x0009 /* -----------------------Master Defines -------------------------------------*/ -#define M_DISCRETE_INPUT_START 0 +#define M_DISCRETE_INPUT_START 1 #define M_DISCRETE_INPUT_NDISCRETES 16 -#define M_COIL_START 0 +#define M_COIL_START 1 #define M_COIL_NCOILS 64 -#define M_REG_INPUT_START 0 +#define M_REG_INPUT_START 1 #define M_REG_INPUT_NREGS 100 -#define M_REG_HOLDING_START 0 +#define M_REG_HOLDING_START 1 #define M_REG_HOLDING_NREGS 100 /* master mode: holding register's all address */ #define M_HD_RESERVE 0