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Merge pull request #1574 from misonyo/dev 

[components][drivers][pin module]:typo fix for pin_detach_irq
This commit is contained in:
Bernard Xiong 2018-06-27 13:30:56 +08:00 committed by GitHub
parent 37ce32e840 ef8398c2bb
commit cf73f3a3c0
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
11 changed files with 23 additions and 25 deletions
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4
bsp/allwinner_tina/drivers/drv_gpio.c
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@ -493,7 +493,7 @@ static rt_err_t pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint
gpio_set_irq_type(pin_index[pin].pin_port, pin_index[pin].pin, mode); gpio_set_irq_type(pin_index[pin].pin_port, pin_index[pin].pin, mode);
return RT_EOK; return RT_EOK;
} }
static rt_err_t pin_dettach_irq(struct rt_device *device, rt_int32_t pin) static rt_err_t pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{ {
if ((pin > PIN_NUM(pin_index)) || (pin_index[pin].magic != PIN_MAGIC)) if ((pin > PIN_NUM(pin_index)) || (pin_index[pin].magic != PIN_MAGIC))
{ {
@ -539,7 +539,7 @@ static const struct rt_pin_ops ops =
pin_write, pin_write,
pin_read, pin_read,
pin_attach_irq, pin_attach_irq,
pin_dettach_irq, pin_detach_irq,
pin_irq_enable, pin_irq_enable,
}; };
#endif #endif

4
bsp/imxrt1052-evk/drivers/drv_pin.c
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@ -536,7 +536,7 @@ static rt_err_t rt1052_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK; return RT_EOK;
} }
static rt_err_t rt1052_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) static rt_err_t rt1052_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{ {
struct rt1052_pin* pin_map = RT_NULL; struct rt1052_pin* pin_map = RT_NULL;
struct rt1052_irq* irq_map = RT_NULL; struct rt1052_irq* irq_map = RT_NULL;
@ -675,7 +675,7 @@ int rt_hw_pin_init(void)
rt1052_pin_ops.pin_read = rt1052_pin_read; rt1052_pin_ops.pin_read = rt1052_pin_read;
rt1052_pin_ops.pin_write = rt1052_pin_write; rt1052_pin_ops.pin_write = rt1052_pin_write;
rt1052_pin_ops.pin_attach_irq = rt1052_pin_attach_irq; rt1052_pin_ops.pin_attach_irq = rt1052_pin_attach_irq;
rt1052_pin_ops.pin_dettach_irq = rt1052_pin_dettach_irq; rt1052_pin_ops.pin_detach_irq = rt1052_pin_detach_irq;
rt1052_pin_ops.pin_irq_enable = rt1052_pin_irq_enable; rt1052_pin_ops.pin_irq_enable = rt1052_pin_irq_enable;
ret = rt_device_pin_register("pin", &rt1052_pin_ops, RT_NULL); ret = rt_device_pin_register("pin", &rt1052_pin_ops, RT_NULL);

4
bsp/ls1cdev/drivers/drv_gpio.c
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@ -95,7 +95,7 @@ rt_err_t ls1c_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK; return RT_EOK;
} }
rt_err_t ls1c_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) rt_err_t ls1c_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{ {
return RT_EOK; return RT_EOK;
} }
@ -119,7 +119,7 @@ const static struct rt_pin_ops _ls1c_pin_ops =
ls1c_pin_read, ls1c_pin_read,
ls1c_pin_attach_irq, ls1c_pin_attach_irq,
ls1c_pin_dettach_irq, ls1c_pin_detach_irq,
ls1c_pin_irq_enable ls1c_pin_irq_enable
}; };

4
bsp/stm32f10x-HAL/drivers/drv_gpio.c
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@ -695,7 +695,7 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK; return RT_EOK;
} }
rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{ {
const struct pin_index *index; const struct pin_index *index;
rt_base_t level; rt_base_t level;
@ -798,7 +798,7 @@ const static struct rt_pin_ops _stm32_pin_ops =
stm32_pin_write, stm32_pin_write,
stm32_pin_read, stm32_pin_read,
stm32_pin_attach_irq, stm32_pin_attach_irq,
stm32_pin_dettach_irq, stm32_pin_detach_irq,
stm32_pin_irq_enable, stm32_pin_irq_enable,
}; };

4
bsp/stm32f10x/drivers/gpio.c
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@ -622,7 +622,7 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK; return RT_EOK;
} }
rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{ {
const struct pin_index *index; const struct pin_index *index;
rt_base_t level; rt_base_t level;
@ -742,7 +742,7 @@ const static struct rt_pin_ops _stm32_pin_ops =
stm32_pin_write, stm32_pin_write,
stm32_pin_read, stm32_pin_read,
stm32_pin_attach_irq, stm32_pin_attach_irq,
stm32_pin_dettach_irq, stm32_pin_detach_irq,
stm32_pin_irq_enable, stm32_pin_irq_enable,
}; };

4
bsp/stm32f40x/drivers/gpio.c
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@ -667,7 +667,7 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK; return RT_EOK;
} }
rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{ {
const struct pin_index *index; const struct pin_index *index;
rt_base_t level; rt_base_t level;
@ -787,7 +787,7 @@ const static struct rt_pin_ops _stm32_pin_ops =
stm32_pin_write, stm32_pin_write,
stm32_pin_read, stm32_pin_read,
stm32_pin_attach_irq, stm32_pin_attach_irq,
stm32_pin_dettach_irq, stm32_pin_detach_irq,
stm32_pin_irq_enable, stm32_pin_irq_enable,
}; };

4
bsp/stm32f429-apollo/drivers/drv_gpio.c
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@ -1698,7 +1698,7 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK; return RT_EOK;
} }
rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{ {
const struct pin_index *index; const struct pin_index *index;
rt_base_t level; rt_base_t level;
@ -1802,7 +1802,7 @@ const static struct rt_pin_ops _stm32_pin_ops =
stm32_pin_write, stm32_pin_write,
stm32_pin_read, stm32_pin_read,
stm32_pin_attach_irq, stm32_pin_attach_irq,
stm32_pin_dettach_irq, stm32_pin_detach_irq,
stm32_pin_irq_enable, stm32_pin_irq_enable,
}; };

4
bsp/stm32f4xx-HAL/drivers/drv_gpio.c
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@ -1701,7 +1701,7 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK; return RT_EOK;
} }
rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{ {
rt_uint16_t gpio_pin; rt_uint16_t gpio_pin;
rt_base_t level; rt_base_t level;
@ -1802,7 +1802,7 @@ const static struct rt_pin_ops _stm32_pin_ops =
stm32_pin_write, stm32_pin_write,
stm32_pin_read, stm32_pin_read,
stm32_pin_attach_irq, stm32_pin_attach_irq,
stm32_pin_dettach_irq, stm32_pin_detach_irq,
stm32_pin_irq_enable, stm32_pin_irq_enable,
}; };

4
bsp/stm32l476-nucleo/drivers/drv_gpio.c
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@ -682,7 +682,7 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK; return RT_EOK;
} }
rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{ {
const struct pin_index *index; const struct pin_index *index;
rt_base_t level; rt_base_t level;
@ -786,7 +786,7 @@ const static struct rt_pin_ops _stm32_pin_ops =
stm32_pin_write, stm32_pin_write,
stm32_pin_read, stm32_pin_read,
stm32_pin_attach_irq, stm32_pin_attach_irq,
stm32_pin_dettach_irq, stm32_pin_detach_irq,
stm32_pin_irq_enable, stm32_pin_irq_enable,
}; };

6
components/drivers/include/drivers/pin.h
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@ -86,7 +86,7 @@ struct rt_pin_ops
/* TODO: add GPIO interrupt */ /* TODO: add GPIO interrupt */
rt_err_t (*pin_attach_irq)(struct rt_device *device, rt_int32_t pin, rt_err_t (*pin_attach_irq)(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args); rt_uint32_t mode, void (*hdr)(void *args), void *args);
rt_err_t (*pin_dettach_irq)(struct rt_device *device, rt_int32_t pin); rt_err_t (*pin_detach_irq)(struct rt_device *device, rt_int32_t pin);
rt_err_t (*pin_irq_enable)(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled); rt_err_t (*pin_irq_enable)(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled);
}; };
@ -97,11 +97,9 @@ void rt_pin_write(rt_base_t pin, rt_base_t value);
int rt_pin_read(rt_base_t pin); int rt_pin_read(rt_base_t pin);
rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode, rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode,
void (*hdr)(void *args), void *args); void (*hdr)(void *args), void *args);
rt_err_t rt_pin_dettach_irq(rt_int32_t pin); rt_err_t rt_pin_detach_irq(rt_int32_t pin);
rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint32_t enabled); rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint32_t enabled);
int rt_device_pin_irq_register(const char *name, const struct rt_pin_ops *ops,
void *user_data);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

6
components/drivers/misc/pin.c
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@ -124,12 +124,12 @@ rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode,
} }
return RT_ENOSYS; return RT_ENOSYS;
} }
rt_err_t rt_pin_dettach_irq(rt_int32_t pin) rt_err_t rt_pin_detach_irq(rt_int32_t pin)
{ {
RT_ASSERT(_hw_pin.ops != RT_NULL); RT_ASSERT(_hw_pin.ops != RT_NULL);
if(_hw_pin.ops->pin_dettach_irq) if(_hw_pin.ops->pin_detach_irq)
{ {
return _hw_pin.ops->pin_dettach_irq(&_hw_pin.parent, pin); return _hw_pin.ops->pin_detach_irq(&_hw_pin.parent, pin);
} }
return RT_ENOSYS; return RT_ENOSYS;
} }