enhancement hard fault exception handler.
This commit is contained in:
aozima
parent
4f0cb88739
commit
ce4f0329db
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@ -1,7 +1,7 @@
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/*
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* File : context_gcc.S
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
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* COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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@ -14,6 +14,7 @@
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* 2011-06-17 onelife Merge all of the assembly source code into context_gcc.S
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* 2011-07-12 onelife Add interrupt context check function
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* 2013-06-18 aozima add restore MSP feature.
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* 2013-07-09 aozima enhancement hard fault exception handler.
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*/
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.cpu cortex-m3
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@ -176,7 +177,23 @@ rt_hw_interrupt_thread_switch:
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.type HardFault_Handler, %function
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HardFault_Handler:
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/* get current context */
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MRS R0, PSP /* get fault thread stack pointer */
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MRS r0, msp /* get fault context from handler. */
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TST lr, #0x04 /* if(!EXC_RETURN[2]) */
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BEQ _get_sp_done
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MRS r0, psp /* get fault context from thread. */
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_get_sp_done:
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STMFD r0!, {r4 - r11} /* push r4 - r11 register */
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STMFD r0!, {lr} /* push exec_return register */
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TST lr, #0x04 /* if(!EXC_RETURN[2])
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BEQ _update_msp
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MSR psp, r0 /* update stack pointer to PSP. */
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B _update_done
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_update_msp:
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MSR msp, r0 /* update stack pointer to MSP. */
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_update_done:
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PUSH {LR}
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BL rt_hw_hard_fault_exception
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POP {LR}
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@ -1,7 +1,7 @@
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;/*
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; * File : context_iar.S
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; * This file is part of RT-Thread RTOS
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; * COPYRIGHT (C) 2009, RT-Thread Development Team
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; * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
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; *
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; * The license and distribution terms for this file may be
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; * found in the file LICENSE in this distribution or at
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@ -12,6 +12,7 @@
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; * 2009-01-17 Bernard first version
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; * 2009-09-27 Bernard add protect when contex switch occurs
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; * 2013-06-18 aozima add restore MSP feature.
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; * 2013-07-09 aozima enhancement hard fault exception handler.
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; */
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;/**
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@ -174,7 +175,25 @@ rt_hw_interrupt_thread_switch:
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HardFault_Handler:
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; get current context
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MRS r0, psp ; get fault thread stack pointer
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MRS r0, msp ; get fault context from handler.
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TST lr, #0x04 ; if(!EXC_RETURN[2])
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BEQ _get_sp_done
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MRS r0, psp ; get fault context from thread.
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_get_sp_done
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STMFD r0!, {r4 - r11} ; push r4 - r11 register
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;STMFD r0!, {lr} ; push exec_return register
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SUB r0, r0, #0x04
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STR lr, [r0]
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TST lr, #0x04 ; if(!EXC_RETURN[2])
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BEQ _update_msp
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MSR psp, r0 ; update stack pointer to PSP.
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B _update_done
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_update_msp
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MSR msp, r0 ; update stack pointer to MSP.
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_update_done
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PUSH {lr}
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BL rt_hw_hard_fault_exception
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POP {lr}
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@ -1,7 +1,7 @@
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;/*
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; * File : context_rvds.S
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; * This file is part of RT-Thread RTOS
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; * COPYRIGHT (C) 2009, RT-Thread Development Team
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; * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
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; *
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; * The license and distribution terms for this file may be
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; * found in the file LICENSE in this distribution or at
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@ -11,6 +11,7 @@
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; * Date Author Notes
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; * 2009-01-17 Bernard first version
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; * 2013-06-18 aozima add restore MSP feature.
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; * 2013-07-09 aozima enhancement hard fault exception handler.
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; */
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;/**
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@ -164,7 +165,6 @@ rt_hw_context_switch_to PROC
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LDR r0, =SCB_VTOR
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LDR r0, [r0]
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LDR r0, [r0]
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NOP
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MSR msp, r0
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; enable interrupts at processor level
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@ -185,7 +185,16 @@ rt_hw_interrupt_thread_switch PROC
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HardFault_Handler PROC
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; get current context
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MRS r0, psp ; get fault thread stack pointer
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TST lr, #0x04 ; if(!EXC_RETURN[2])
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MRSNE r0, msp ; get fault context from handler.
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MRSEQ r0, psp ; get fault context from thread.
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STMFD r0!, {r4 - r11} ; push r4 - r11 register
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STMFD r0!, {lr} ; push exec_return register
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MSRNE msp, r0 ; update stack pointer to MSP.
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MSREQ psp, r0 ; update stack pointer to PSP.
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PUSH {lr}
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BL rt_hw_hard_fault_exception
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POP {lr}
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@ -1,7 +1,7 @@
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/*
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* File : cpuport.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
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* COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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@ -14,6 +14,7 @@
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* 2011-06-17 onelife Merge all of the C source code into cpuport.c
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* 2012-12-23 aozima stack addr align to 8byte.
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* 2012-12-29 Bernard Add exception hook.
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* 2013-07-09 aozima enhancement hard fault exception handler.
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*/
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#include <rtthread.h>
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@ -105,39 +106,240 @@ void rt_hw_exception_install(rt_err_t (*exception_handle)(void* context))
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rt_exception_hook = exception_handle;
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}
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#define SCB_CFSR (*(volatile const unsigned *)0xE000ED28) /* Configurable Fault Status Register */
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#define SCB_HFSR (*(volatile const unsigned *)0xE000ED2C) /* HardFault Status Register */
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#define SCB_MMAR (*(volatile const unsigned *)0xE000ED34) /* MemManage Fault Address register */
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#define SCB_BFAR (*(volatile const unsigned *)0xE000ED38) /* Bus Fault Address Register */
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#define SCB_CFSR_MFSR (*(volatile const unsigned char*)0xE000ED28) /* Memory-management Fault Status Register */
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#define SCB_CFSR_BFSR (*(volatile const unsigned char*)0xE000ED29) /* Bus Fault Status Register */
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#define SCB_CFSR_UFSR (*(volatile const unsigned short*)0xE000ED2A) /* Usage Fault Status Register */
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#ifdef RT_USING_FINSH
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static void usage_fault_track(void)
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{
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rt_kprintf("usage fault:\n");
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rt_kprintf("SCB_CFSR_UFSR:0x%02X ", SCB_CFSR_UFSR);
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if(SCB_CFSR_UFSR & (1<<0))
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{
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/* [0]:UNDEFINSTR */
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rt_kprintf("UNDEFINSTR ");
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}
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if(SCB_CFSR_UFSR & (1<<1))
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{
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/* [1]:INVSTATE */
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rt_kprintf("INVSTATE ");
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}
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if(SCB_CFSR_UFSR & (1<<2))
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{
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/* [2]:INVPC */
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rt_kprintf("INVPC ");
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}
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if(SCB_CFSR_UFSR & (1<<3))
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{
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/* [3]:NOCP */
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rt_kprintf("NOCP ");
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}
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if(SCB_CFSR_UFSR & (1<<8))
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{
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/* [8]:UNALIGNED */
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rt_kprintf("UNALIGNED ");
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}
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if(SCB_CFSR_UFSR & (1<<9))
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{
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/* [9]:DIVBYZERO */
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rt_kprintf("DIVBYZERO ");
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}
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rt_kprintf("\n");
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}
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static void bus_fault_track(void)
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{
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rt_kprintf("bus fault:\n");
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rt_kprintf("SCB_CFSR_BFSR:0x%02X ", SCB_CFSR_BFSR);
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if(SCB_CFSR_BFSR & (1<<0))
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{
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/* [0]:IBUSERR */
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rt_kprintf("IBUSERR ");
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}
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if(SCB_CFSR_BFSR & (1<<1))
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{
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/* [1]:PRECISERR */
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rt_kprintf("PRECISERR ");
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}
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if(SCB_CFSR_BFSR & (1<<2))
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{
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/* [2]:IMPRECISERR */
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rt_kprintf("IMPRECISERR ");
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}
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if(SCB_CFSR_BFSR & (1<<3))
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{
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/* [3]:UNSTKERR */
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rt_kprintf("UNSTKERR ");
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}
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if(SCB_CFSR_BFSR & (1<<4))
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{
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/* [4]:STKERR */
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rt_kprintf("STKERR ");
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}
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if(SCB_CFSR_BFSR & (1<<7))
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{
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rt_kprintf("SCB->BFAR:%08X\n", SCB_BFAR);
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}
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else
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{
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rt_kprintf("\n");
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}
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}
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static void mem_manage_fault_track(void)
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{
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rt_kprintf("mem manage fault:\n");
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rt_kprintf("SCB_CFSR_MFSR:0x%02X ", SCB_CFSR_MFSR);
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if(SCB_CFSR_MFSR & (1<<0))
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{
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/* [0]:IACCVIOL */
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rt_kprintf("IACCVIOL ");
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}
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if(SCB_CFSR_MFSR & (1<<1))
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{
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/* [1]:DACCVIOL */
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rt_kprintf("DACCVIOL ");
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}
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if(SCB_CFSR_MFSR & (1<<3))
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{
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/* [3]:MUNSTKERR */
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rt_kprintf("MUNSTKERR ");
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}
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if(SCB_CFSR_MFSR & (1<<4))
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{
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/* [4]:MSTKERR */
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rt_kprintf("MSTKERR ");
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}
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if(SCB_CFSR_MFSR & (1<<7))
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{
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/* [7]:MMARVALID */
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rt_kprintf("SCB->MMAR:%08X\n", SCB_MMAR);
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}
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else
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{
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rt_kprintf("\n");
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}
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}
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static void hard_fault_track(void)
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{
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if(SCB_HFSR & (1UL<<1))
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{
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/* [1]:VECTBL, Indicates hard fault is caused by failed vector fetch. */
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rt_kprintf("failed vector fetch\n");
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}
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if(SCB_HFSR & (1UL<<30))
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{
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/* [30]:FORCED, Indicates hard fault is taken because of bus fault,
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memory management fault, or usage fault. */
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if(SCB_CFSR_BFSR)
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{
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bus_fault_track();
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}
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if(SCB_CFSR_MFSR)
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{
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mem_manage_fault_track();
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}
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if(SCB_CFSR_UFSR)
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{
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usage_fault_track();
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}
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}
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if(SCB_HFSR & (1UL<<31))
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{
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/* [31]:DEBUGEVT, Indicates hard fault is triggered by debug event. */
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rt_kprintf("debug event\n");
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}
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}
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#endif /* RT_USING_FINSH */
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struct exception_info
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{
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rt_uint32_t exc_return;
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struct stack_frame stack_frame;
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};
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/*
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* fault exception handler
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*/
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void rt_hw_hard_fault_exception(struct exception_stack_frame* context)
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void rt_hw_hard_fault_exception(struct exception_info * exception_info)
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{
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extern long list_thread(void);
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struct stack_frame* context = &exception_info->stack_frame;
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if (rt_exception_hook != RT_NULL)
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{
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rt_err_t result;
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result = rt_exception_hook(context);
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result = rt_exception_hook(exception_info);
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if (result == RT_EOK)
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return;
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}
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rt_kprintf("psr: 0x%08x\n", context->psr);
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rt_kprintf(" pc: 0x%08x\n", context->pc);
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rt_kprintf(" lr: 0x%08x\n", context->lr);
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rt_kprintf("r12: 0x%08x\n", context->r12);
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rt_kprintf("r03: 0x%08x\n", context->r3);
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rt_kprintf("r02: 0x%08x\n", context->r2);
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rt_kprintf("r01: 0x%08x\n", context->r1);
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rt_kprintf("r00: 0x%08x\n", context->r0);
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rt_kprintf("psr: 0x%08x\n", context->exception_stack_frame.psr);
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rt_kprintf("hard fault on thread: %s\n", rt_thread_self()->name);
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rt_kprintf("r00: 0x%08x\n", context->exception_stack_frame.r0);
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rt_kprintf("r01: 0x%08x\n", context->exception_stack_frame.r1);
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rt_kprintf("r02: 0x%08x\n", context->exception_stack_frame.r2);
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rt_kprintf("r03: 0x%08x\n", context->exception_stack_frame.r3);
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rt_kprintf("r04: 0x%08x\n", context->r4);
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rt_kprintf("r05: 0x%08x\n", context->r5);
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rt_kprintf("r06: 0x%08x\n", context->r6);
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rt_kprintf("r07: 0x%08x\n", context->r7);
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rt_kprintf("r08: 0x%08x\n", context->r8);
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rt_kprintf("r09: 0x%08x\n", context->r9);
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rt_kprintf("r10: 0x%08x\n", context->r10);
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rt_kprintf("r11: 0x%08x\n", context->r11);
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rt_kprintf("r12: 0x%08x\n", context->exception_stack_frame.r12);
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rt_kprintf(" lr: 0x%08x\n", context->exception_stack_frame.lr);
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rt_kprintf(" pc: 0x%08x\n", context->exception_stack_frame.pc);
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if(exception_info->exc_return & (1 << 2) )
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{
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rt_kprintf("hard fault on thread: %s\r\n\r\n", rt_thread_self()->name);
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#ifdef RT_USING_FINSH
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list_thread();
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#endif
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#endif /* RT_USING_FINSH */
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}
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else
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{
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rt_kprintf("hard fault on handler\r\n\r\n");
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}
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while (1)
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;
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#ifdef RT_USING_FINSH
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hard_fault_track();
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#endif /* RT_USING_FINSH */
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while (1);
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}
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/**
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@ -170,7 +372,7 @@ __asm int __rt_ffs(int value)
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CLZ r0, r0
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ADDS r0, r0, #0x01
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exit
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exit
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BX lr
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}
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#elif defined(__IAR_SYSTEMS_ICC__)
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