update libcpu: cortex-m0 fault handlers always enable.
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@ -182,7 +182,6 @@ rt_hw_context_switch_to:
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MSR MSP, R0
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/* enable interrupts at processor level */
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CPSIE F
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CPSIE I
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/* never reach here! */
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@ -188,7 +188,6 @@ rt_hw_context_switch_to:
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MSR msp, r0
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; enable interrupts at processor level
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CPSIE F
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CPSIE I
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; never reach here!
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@ -191,7 +191,6 @@ rt_hw_context_switch_to PROC
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MSR msp, r0
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; enable interrupts at processor level
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CPSIE F
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CPSIE I
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; never reach here!
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