Merge pull request #2487 from wangyq2018/es32f0654
[bsp/es32f0654] add hwtimer driver
This commit is contained in:
Bernard Xiong
GitHub
commit
c949383704
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@ -346,6 +346,14 @@ CONFIG_BSP_USING_UART2=y
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# CONFIG_BSP_USING_PWM2 is not set
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# CONFIG_BSP_USING_PWM3 is not set
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#
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# HWtimer Drivers
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#
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# CONFIG_BSP_USING_HWTIMER0 is not set
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# CONFIG_BSP_USING_HWTIMER1 is not set
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# CONFIG_BSP_USING_HWTIMER2 is not set
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# CONFIG_BSP_USING_HWTIMER3 is not set
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#
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# Onboard Peripheral Drivers
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#
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@ -35,14 +35,17 @@ ES-PDS-ES32F0654-V1.1
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| **板载外设** | **支持情况** | **备注** |
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| :---------------- | :----------: | :------------------------------------|
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| SPI FLASH | 支持 | SPI0 |
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| **片上外设** | **支持情况** | **备注** |
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| :---------------- | :----------: | :------------------------------------|
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| GPIO | 支持 | 54 GPIOs |
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| UART | 支持 | UART0/1/2/3 |
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| SPI | 支持 | SPI0/1 |
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| I2C | 支持 | I2C0/1 |
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| PWM | 支持 | PWM0/1/2/3 |
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| TIMER | 支持 | TIMER0/1/2/3 |
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### 1.2 注意事项
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- 本BSP中，UART2和TIMER1不能同时使用，UART3和TIMER2不能同时使用
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更多详细信息请咨询[上海东软载波微电子技术支持](http://www.essemi.com/)
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@ -16,16 +16,18 @@ menu "Hardware Drivers Config"
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bool "Enable UART1 PC10/PC11(T/R)"
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select RT_USING_SERIAL
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default n
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config BSP_USING_UART2
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bool "Enable UART2 PC12/PD02(T/R)"
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select RT_USING_SERIAL
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default y
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depends on !BSP_USING_HWTIMER1
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config BSP_USING_UART3
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bool "Enable UART3 PC04/PC05(T/R)"
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select RT_USING_SERIAL
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default n
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depends on !BSP_USING_HWTIMER2
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endmenu
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menu "SPI Drivers"
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@ -47,6 +49,7 @@ menu "Hardware Drivers Config"
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bool "Enable I2C0 BUS PB08/PB09(SCL/SDA)"
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select RT_USING_I2C
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default n
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config BSP_USING_I2C1
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bool "Enable I2C1 BUS PB10/PB11(SCL/SDA)"
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select RT_USING_I2C
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@ -62,18 +65,43 @@ menu "Hardware Drivers Config"
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config BSP_USING_PWM1
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bool "Using PWM1 PB06/PB07/PB08/PB09"
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select RT_USING_PWM
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default n
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default n
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config BSP_USING_PWM2
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bool "Using PWM2 PA00/PA01"
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select RT_USING_PWM
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default n
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default n
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config BSP_USING_PWM3
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bool "Using PWM3 PC06/PC07"
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select RT_USING_PWM
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default n
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default n
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endmenu
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menu "HWtimer Drivers"
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config BSP_USING_HWTIMER0
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bool "Using timer0"
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select RT_USING_HWTIMER
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default n
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config BSP_USING_HWTIMER1
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bool "Using timer1"
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select RT_USING_HWTIMER
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default n
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depends on !BSP_USING_UART2
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config BSP_USING_HWTIMER2
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bool "Using timer2"
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select RT_USING_HWTIMER
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default n
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depends on !BSP_USING_UART3
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config BSP_USING_HWTIMER3
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bool "Using timer3"
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select RT_USING_HWTIMER
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default n
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endmenu
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endmenu
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menu "Onboard Peripheral Drivers"
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@ -31,6 +31,10 @@ if GetDepend('BSP_USING_SPI_FLASH'):
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if GetDepend('BSP_USING_PWM0') or GetDepend('BSP_USING_PWM1') or GetDepend('BSP_USING_PWM2') or GetDepend('BSP_USING_PWM3'):
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src += ['drv_pwm.c']
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# add hwtimer driver code
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if GetDepend('BSP_USING_HWTIMER0') or GetDepend('BSP_USING_HWTIMER1') or GetDepend('BSP_USING_HWTIMER2') or GetDepend('BSP_USING_HWTIMER3'):
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src += ['drv_hwtimer.c']
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CPPPATH = [cwd]
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
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@ -0,0 +1,252 @@
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/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-3-19 wangyq the first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <drv_hwtimer.h>
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#include <board.h>
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#include <ald_cmu.h>
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#include <ald_timer.h>
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#ifdef RT_USING_HWTIMER
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struct es32f0_hwtimer_dev
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{
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rt_hwtimer_t parent;
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timer_handle_t *hwtimer_periph;
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IRQn_Type IRQn;
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};
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#ifdef BSP_USING_HWTIMER0
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static struct es32f0_hwtimer_dev hwtimer0;
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void BS16T0_Handler(void)
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{
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timer_clear_flag_status(hwtimer0.hwtimer_periph, TIMER_FLAG_UPDATE);
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rt_device_hwtimer_isr(&hwtimer0.parent);
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if (HWTIMER_MODE_ONESHOT == hwtimer0.parent.mode)
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{
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timer_base_stop(hwtimer0.hwtimer_periph);
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}
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}
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#endif
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#ifdef BSP_USING_HWTIMER1
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static struct es32f0_hwtimer_dev hwtimer1;
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/* can not use when UART2 Handler is enabled */
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void BS16T1_UART2_Handler(void)
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{
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/* if BS16T1 it */
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if (timer_get_it_status(hwtimer1.hwtimer_periph, TIMER_IT_UPDATE) &&
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timer_get_flag_status(hwtimer1.hwtimer_periph, TIMER_FLAG_UPDATE))
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{
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timer_clear_flag_status(hwtimer1.hwtimer_periph, TIMER_FLAG_UPDATE);
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rt_device_hwtimer_isr(&hwtimer1.parent);
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if (HWTIMER_MODE_ONESHOT == hwtimer1.parent.mode)
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{
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timer_base_stop(hwtimer1.hwtimer_periph);
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}
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}
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}
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#endif
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#ifdef BSP_USING_HWTIMER2
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static struct es32f0_hwtimer_dev hwtimer2;
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/* can not use when UART3 Handler is enabled */
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void BS16T2_UART3_Handler(void)
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{
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/* if BS16T2 it */
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if (timer_get_it_status(hwtimer2.hwtimer_periph, TIMER_IT_UPDATE) &&
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timer_get_flag_status(hwtimer2.hwtimer_periph, TIMER_FLAG_UPDATE))
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{
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timer_clear_flag_status(hwtimer2.hwtimer_periph, TIMER_FLAG_UPDATE);
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rt_device_hwtimer_isr(&hwtimer2.parent);
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if (HWTIMER_MODE_ONESHOT == hwtimer2.parent.mode)
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{
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timer_base_stop(hwtimer2.hwtimer_periph);
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}
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}
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}
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#endif
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#ifdef BSP_USING_HWTIMER3
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static struct es32f0_hwtimer_dev hwtimer3;
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/* can not use when DAC0 Handler is enabled */
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void BS16T3_DAC0_Handler(void)
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{
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/* if BS16T3 it */
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if (timer_get_it_status(hwtimer3.hwtimer_periph, TIMER_IT_UPDATE) &&
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timer_get_flag_status(hwtimer3.hwtimer_periph, TIMER_FLAG_UPDATE))
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{
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timer_clear_flag_status(hwtimer3.hwtimer_periph, TIMER_FLAG_UPDATE);
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rt_device_hwtimer_isr(&hwtimer3.parent);
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if (HWTIMER_MODE_ONESHOT == hwtimer3.parent.mode)
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{
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timer_base_stop(hwtimer3.hwtimer_periph);
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}
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}
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}
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#endif
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static struct rt_hwtimer_info es32f0_hwtimer_info =
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{
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48000000, /* maximum count frequency */
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1, /* minimum count frequency */
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65535, /* counter maximum value */
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HWTIMER_CNTMODE_UP
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};
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static void es32f0_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
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{
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struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data;
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RT_ASSERT(hwtimer != RT_NULL);
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if (1 == state)
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{
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timer_base_init(hwtimer->hwtimer_periph);
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timer_interrupt_config(hwtimer->hwtimer_periph, TIMER_IT_UPDATE, ENABLE);
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NVIC_EnableIRQ(hwtimer->IRQn);
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}
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hwtimer->parent.freq = cmu_get_pclk1_clock();
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es32f0_hwtimer_info.maxfreq = cmu_get_pclk1_clock();
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es32f0_hwtimer_info.minfreq = cmu_get_pclk1_clock();
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}
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static rt_err_t es32f0_hwtimer_start(rt_hwtimer_t *timer,
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rt_uint32_t cnt,
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rt_hwtimer_mode_t mode)
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{
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struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data;
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RT_ASSERT(hwtimer != RT_NULL);
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WRITE_REG(hwtimer->hwtimer_periph->perh->AR, cnt);
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timer_base_start(hwtimer->hwtimer_periph);
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return RT_EOK;
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}
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static void es32f0_hwtimer_stop(rt_hwtimer_t *timer)
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{
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struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data;
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RT_ASSERT(hwtimer != RT_NULL);
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timer_base_stop(hwtimer->hwtimer_periph);
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}
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static rt_uint32_t es32f0_hwtimer_count_get(rt_hwtimer_t *timer)
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{
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struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data;
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uint32_t hwtimer_count = 0;
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RT_ASSERT(hwtimer != RT_NULL);
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hwtimer_count = READ_REG(hwtimer->hwtimer_periph->perh->COUNT);
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return hwtimer_count;
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}
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static rt_err_t es32f0_hwtimer_control(rt_hwtimer_t *timer,
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rt_uint32_t cmd,
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void *args)
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{
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rt_err_t ret = RT_EOK;
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rt_uint32_t freq = 0;
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struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data;
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RT_ASSERT(hwtimer != RT_NULL);
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switch (cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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freq = *(rt_uint32_t *)args;
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if (freq != cmu_get_pclk1_clock())
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{
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ret = -RT_ERROR;
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}
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break;
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case HWTIMER_CTRL_STOP:
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timer_base_stop(hwtimer->hwtimer_periph);
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break;
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default:
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ret = RT_EINVAL;
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break;
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}
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return ret;
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}
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static struct rt_hwtimer_ops es32f0_hwtimer_ops =
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{
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es32f0_hwtimer_init,
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es32f0_hwtimer_start,
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es32f0_hwtimer_stop,
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es32f0_hwtimer_count_get,
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es32f0_hwtimer_control
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};
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int rt_hw_hwtimer_init(void)
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{
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rt_err_t ret = RT_EOK;
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#ifdef BSP_USING_HWTIMER0
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static timer_handle_t _hwtimer_periph0;
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_hwtimer_periph0.perh = BS16T0;
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hwtimer0.IRQn = BS16T0_IRQn;
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hwtimer0.hwtimer_periph = &_hwtimer_periph0;
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hwtimer0.parent.info = &es32f0_hwtimer_info;
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hwtimer0.parent.ops = &es32f0_hwtimer_ops;
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ret = rt_device_hwtimer_register(&hwtimer0.parent, "timer0", &hwtimer0);
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#endif
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#ifdef BSP_USING_HWTIMER1
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static timer_handle_t _hwtimer_periph1;
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_hwtimer_periph1.perh = BS16T1;
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hwtimer1.IRQn = BS16T1_UART2_IRQn;
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hwtimer1.hwtimer_periph = &_hwtimer_periph1;
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hwtimer1.parent.info = &es32f0_hwtimer_info;
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hwtimer1.parent.ops = &es32f0_hwtimer_ops;
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ret = rt_device_hwtimer_register(&hwtimer1.parent, "timer1", &hwtimer1);
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#endif
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#ifdef BSP_USING_HWTIMER2
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static timer_handle_t _hwtimer_periph2;
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_hwtimer_periph2.perh = BS16T2;
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hwtimer2.IRQn = BS16T2_UART3_IRQn;
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hwtimer2.hwtimer_periph = &_hwtimer_periph2;
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hwtimer2.parent.info = &es32f0_hwtimer_info;
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hwtimer2.parent.ops = &es32f0_hwtimer_ops;
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ret = rt_device_hwtimer_register(&hwtimer2.parent, "timer2", &hwtimer2);
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#endif
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#ifdef BSP_USING_HWTIMER3
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static timer_handle_t _hwtimer_periph3;
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_hwtimer_periph3.perh = BS16T3;
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hwtimer3.IRQn = BS16T3_DAC0_IRQn;
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hwtimer3.hwtimer_periph = &_hwtimer_periph3;
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hwtimer3.parent.info = &es32f0_hwtimer_info;
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hwtimer3.parent.ops = &es32f0_hwtimer_ops;
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ret = rt_device_hwtimer_register(&hwtimer3.parent, "timer3", &hwtimer3);
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#endif
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return ret;
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}
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INIT_BOARD_EXPORT(rt_hw_hwtimer_init);
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#endif
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@ -0,0 +1,16 @@
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/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-3-19 wangyq the first version
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*/
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#ifndef DRV_HWTIMER_H__
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#define DRV_HWTIMER_H__
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int rt_hw_hwtimer_init(void);
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#endif
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@ -19,7 +19,7 @@
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static void pwm_set_freq(timer_handle_t *timer_initstruct, uint32_t ns)
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{
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uint64_t _arr = (uint64_t)cmu_get_pclk1_clock() * ns / 1000000000 /
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(timer_initstruct->init.prescaler + 1) - 1;
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(timer_initstruct->init.prescaler + 1);
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WRITE_REG(timer_initstruct->perh->AR, (uint32_t)_arr);
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timer_initstruct->init.period = (uint32_t)_arr;
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@ -28,7 +28,7 @@ static void pwm_set_freq(timer_handle_t *timer_initstruct, uint32_t ns)
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static void pwm_set_duty(timer_handle_t *timer_initstruct, timer_channel_t ch, uint32_t ns)
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{
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uint64_t tmp = (uint64_t)cmu_get_pclk1_clock() * ns / 1000000000 /
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(timer_initstruct->init.prescaler + 1) - 1;
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(timer_initstruct->init.prescaler + 1);
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if (ch == TIMER_CHANNEL_1)
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WRITE_REG(timer_initstruct->perh->CCVAL1, (uint32_t)tmp);
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@ -38,10 +38,6 @@ static void pwm_set_duty(timer_handle_t *timer_initstruct, timer_channel_t ch, u
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WRITE_REG(timer_initstruct->perh->CCVAL3, (uint32_t)tmp);
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else if (ch == TIMER_CHANNEL_4)
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WRITE_REG(timer_initstruct->perh->CCVAL4, (uint32_t)tmp);
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else
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{
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;/* do nothing */
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}
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}
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static rt_err_t es32f0_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
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@ -172,6 +172,9 @@
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/* PWM Drivers */
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/* HWtimer Drivers */
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/* Onboard Peripheral Drivers */
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