diff --git a/bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig b/bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig
index 54cfe142a7..eda0fd2c52 100644
--- a/bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig
+++ b/bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig
@@ -237,7 +237,7 @@ menu "On-chip Peripheral Drivers"
         bool "Enable CAN"
         default n
         select RT_USING_CAN
-        select BSP_USING_TCA9539
+        select RT_CAN_USING_HDR
         if BSP_USING_CAN
             config BSP_USING_CAN1
                 bool "using can1"
diff --git a/bsp/hc32/libraries/hc32_drivers/drv_adc.c b/bsp/hc32/libraries/hc32_drivers/drv_adc.c
index def29c677c..a5c46bdc91 100644
--- a/bsp/hc32/libraries/hc32_drivers/drv_adc.c
+++ b/bsp/hc32/libraries/hc32_drivers/drv_adc.c
@@ -8,6 +8,7 @@
  * Date           Author               Notes
  * 2022-04-28     CDT                  first version
  * 2022-06-08     xiaoxiaolisunny      add hc32f460 series
+ * 2022-06-14     CDT                  fix a bug of internal trigger
  */
 
 #include <board.h>
@@ -128,8 +129,8 @@ static void _adc_internal_trigger1_set(adc_device *p_adc_dev)
     default:
         break;
     }
-    AOS_CommonTriggerCmd(u32TriggerSel, AOS_COMM_TRIG1, (en_functional_state_t)p_adc_dev->init.internal_trig0_comtrg0_enable);
-    AOS_CommonTriggerCmd(u32TriggerSel, AOS_COMM_TRIG2, (en_functional_state_t)p_adc_dev->init.internal_trig0_comtrg1_enable);
+    AOS_CommonTriggerCmd(u32TriggerSel, AOS_COMM_TRIG1, (en_functional_state_t)p_adc_dev->init.internal_trig1_comtrg0_enable);
+    AOS_CommonTriggerCmd(u32TriggerSel, AOS_COMM_TRIG2, (en_functional_state_t)p_adc_dev->init.internal_trig1_comtrg1_enable);
 #endif
 
 #if defined(HC32F460)
@@ -144,8 +145,8 @@ static void _adc_internal_trigger1_set(adc_device *p_adc_dev)
     default:
         break;
     }
-    AOS_CommonTriggerCmd(u32TriggerSel, AOS_COMM_TRIG1, (en_functional_state_t)p_adc_dev->init.internal_trig0_comtrg0_enable);
-    AOS_CommonTriggerCmd(u32TriggerSel, AOS_COMM_TRIG2, (en_functional_state_t)p_adc_dev->init.internal_trig0_comtrg1_enable);
+    AOS_CommonTriggerCmd(u32TriggerSel, AOS_COMM_TRIG1, (en_functional_state_t)p_adc_dev->init.internal_trig1_comtrg0_enable);
+    AOS_CommonTriggerCmd(u32TriggerSel, AOS_COMM_TRIG2, (en_functional_state_t)p_adc_dev->init.internal_trig1_comtrg1_enable);
 #endif
     AOS_SetTriggerEventSrc(u32TriggerSel, p_adc_dev->init.internal_trig1_sel);
 }
diff --git a/bsp/hc32/libraries/hc32_drivers/drv_can.c b/bsp/hc32/libraries/hc32_drivers/drv_can.c
index 38bae21720..b6e5f1a390 100644
--- a/bsp/hc32/libraries/hc32_drivers/drv_can.c
+++ b/bsp/hc32/libraries/hc32_drivers/drv_can.c
@@ -8,6 +8,7 @@
  * Date           Author               Notes
  * 2022-04-28     CDT                  first version
  * 2022-06-07     xiaoxiaolisunny      add hc32f460 series
+ * 2022-06-08     CDT                  fix a bug of RT_CAN_CMD_SET_FILTER
  */
 
 #include "drv_can.h"
@@ -274,7 +275,14 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
                 {
                     p_can_dev->ll_init.pstcFilter[i].u32ID = filter_cfg->items[i].id;
                     p_can_dev->ll_init.pstcFilter[i].u32IDMask = filter_cfg->items[i].mask;
-                    p_can_dev->ll_init.pstcFilter[i].u32IDType = filter_cfg->items[i].ide;
+                    if (filter_cfg->items[i].ide == RT_CAN_STDID)
+                    {
+                        p_can_dev->ll_init.pstcFilter[i].u32IDType = CAN_ID_STD;
+                    }
+                    else
+                    {
+                        p_can_dev->ll_init.pstcFilter[i].u32IDType = CAN_ID_EXT;
+                    }
                 }
             }
             (void)CAN_Init(p_can_dev->instance, &p_can_dev->ll_init);
@@ -623,7 +631,7 @@ int rt_hw_can_init(void)
         g_can_dev_array[i].ll_init.u16FilterSelect = CAN_FILTER1;
         g_can_dev_array[i].rt_can.config = rt_can_config;
 
-        /* register CAN1 device */
+        /* register CAN device */
         rt_hw_board_can_init(g_can_dev_array[i].instance);
         rt_hw_can_register(&g_can_dev_array[i].rt_can,
                            g_can_dev_array[i].init.name,