commit
c5543593e2
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@ -55,7 +55,7 @@ if GetDepend(['BSP_USING_LCD']):
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if GetDepend(['RT_USING_USB_HOST']) or GetDepend(['RT_USING_USB_DEVICE']):
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src += ['MIMXRT1052/drivers/fsl_usdhc.c']
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if GetDepend(['RT_USING_CAN']):
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if GetDepend(['BSP_USING_CAN']):
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src += ['MIMXRT1052/drivers/fsl_flexcan.c']
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if GetDepend(['BSP_USING_ETH']):
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@ -31,6 +31,9 @@ if GetDepend('BSP_USING_PWM'):
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if GetDepend('BSP_USING_ADC'):
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src += ['drv_adc.c']
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if GetDepend('BSP_USING_CAN'):
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src += ['drv_can.c']
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if GetDepend('BSP_USING_SDRAM'):
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src += ['drv_sdram.c']
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@ -0,0 +1,461 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-06-27 misonyo the first version.
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*/
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#include <rtthread.h>
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#ifdef BSP_USING_CAN
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#include <rtdevice.h>
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#include "drv_can.h"
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#include "fsl_common.h"
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#include "fsl_iomuxc.h"
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#include "fsl_flexcan.h"
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#define LOG_TAG "drv.can"
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#include <drv_log.h>
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#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
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#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
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#endif
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#define RX_MB_COUNT 32
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static flexcan_frame_t frame[RX_MB_COUNT]; /* one frame buffer per RX MB */
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static rt_uint32_t filter_mask = 0;
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enum
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{
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#ifdef BSP_USING_CAN1
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CAN1_INDEX,
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#endif
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#ifdef BSP_USING_CAN2
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CAN2_INDEX,
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#endif
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};
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struct imxrt_can
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{
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char *name;
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CAN_Type *base;
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IRQn_Type irqn;
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flexcan_handle_t handle;
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struct rt_can_device can_dev;
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};
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struct imxrt_can flexcans[] =
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{
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#ifdef BSP_USING_CAN1
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{
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.name = "can1",
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.base = CAN1,
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.irqn = CAN1_IRQn,
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},
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#endif
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#ifdef BSP_USING_CAN2
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{
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.name = "can2",
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.base = CAN2,
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.irqn = CAN2_IRQn,
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},
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#endif
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};
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uint32_t GetCanSrcFreq(void)
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{
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uint32_t freq;
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freq = (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 6) / (CLOCK_GetDiv(kCLOCK_CanDiv) + 1U);
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return freq;
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}
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static void flexcan_callback(CAN_Type *base, flexcan_handle_t *handle, status_t status, uint32_t result, void *userData)
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{
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struct imxrt_can *can;
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flexcan_mb_transfer_t rxXfer;
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can = (struct imxrt_can *)userData;
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switch (status)
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{
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case kStatus_FLEXCAN_RxIdle:
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rt_hw_can_isr(&can->can_dev, RT_CAN_EVENT_RX_IND | result << 8);
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rxXfer.frame = &frame[result - 1];
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rxXfer.mbIdx = result;
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FLEXCAN_TransferReceiveNonBlocking(can->base, &can->handle, &rxXfer);
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break;
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case kStatus_FLEXCAN_TxIdle:
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rt_hw_can_isr(&can->can_dev, RT_CAN_EVENT_TX_DONE | (63 - result) << 8);
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break;
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case kStatus_FLEXCAN_WakeUp:
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case kStatus_FLEXCAN_ErrorStatus:
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if ((result >= 47) && (result <= 63))
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{
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rt_hw_can_isr(&can->can_dev, RT_CAN_EVENT_TX_FAIL | (63 - result) << 8);
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}
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break;
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case kStatus_FLEXCAN_TxSwitchToRx:
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break;
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default:
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break;
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}
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}
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static rt_err_t can_cfg(struct rt_can_device *can_dev, struct can_configure *cfg)
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{
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struct imxrt_can *can;
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flexcan_config_t config;
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rt_uint32_t res = RT_EOK;
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flexcan_rx_mb_config_t mbConfig;
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flexcan_mb_transfer_t rxXfer;
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rt_uint8_t i, mailbox;
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RT_ASSERT(can_dev != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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can = (struct imxrt_can *)can_dev->parent.user_data;
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RT_ASSERT(can != RT_NULL);
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FLEXCAN_GetDefaultConfig(&config);
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config.baudRate = cfg->baud_rate;
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config.maxMbNum = 64; /* all series have 64 MB */
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config.enableIndividMask = true; /* one filter per MB */
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switch (cfg->mode)
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{
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case RT_CAN_MODE_NORMAL:
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/* default mode */
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break;
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case RT_CAN_MODE_LISEN:
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break;
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case RT_CAN_MODE_LOOPBACK:
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config.enableLoopBack = true;
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break;
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case RT_CAN_MODE_LOOPBACKANLISEN:
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break;
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}
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FLEXCAN_Init(can->base, &config, GetCanSrcFreq());
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FLEXCAN_TransferCreateHandle(can->base, &can->handle, flexcan_callback, can);
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/* init RX_MB_COUNT RX MB to default status */
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mbConfig.format = kFLEXCAN_FrameFormatStandard; /* standard ID */
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mbConfig.type = kFLEXCAN_FrameTypeData; /* data frame */
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mbConfig.id = FLEXCAN_ID_STD(0); /* default ID is 0 */
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for (i = 0; i < RX_MB_COUNT; i++)
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{
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/* the used MB index from 1 to RX_MB_COUNT */
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mailbox = i + 1;
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/* all ID bit in the filter is "don't care" */
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FLEXCAN_SetRxIndividualMask(can->base, mailbox, FLEXCAN_RX_MB_STD_MASK(0, 0, 0));
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FLEXCAN_SetRxMbConfig(can->base, mailbox, &mbConfig, true);
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/* one frame buffer per MB */
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rxXfer.frame = &frame[i];
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rxXfer.mbIdx = mailbox;
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FLEXCAN_TransferReceiveNonBlocking(can->base, &can->handle, &rxXfer);
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}
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return res;
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}
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static rt_err_t can_control(struct rt_can_device *can_dev, int cmd, void *arg)
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{
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struct imxrt_can *can;
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rt_uint32_t argval, mask;
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rt_uint32_t res = RT_EOK;
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flexcan_rx_mb_config_t mbConfig;
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struct rt_can_filter_config *cfg;
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struct rt_can_filter_item *item;
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rt_uint8_t i, count, index;
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RT_ASSERT(can_dev != RT_NULL);
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can = (struct imxrt_can *)can_dev->parent.user_data;
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RT_ASSERT(can != RT_NULL);
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switch (cmd)
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{
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case RT_DEVICE_CTRL_SET_INT:
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argval = (rt_uint32_t) arg;
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if (argval == RT_DEVICE_FLAG_INT_RX)
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{
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mask = kFLEXCAN_RxWarningInterruptEnable;
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}
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else if (argval == RT_DEVICE_FLAG_INT_TX)
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{
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mask = kFLEXCAN_TxWarningInterruptEnable;
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}
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else if (argval == RT_DEVICE_CAN_INT_ERR)
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{
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mask = kFLEXCAN_ErrorInterruptEnable;
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}
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FLEXCAN_EnableInterrupts(can->base, mask);
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NVIC_SetPriority(can->irqn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 5, 0));
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EnableIRQ(can->irqn);
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break;
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case RT_DEVICE_CTRL_CLR_INT:
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/* each CAN device have one IRQ number. */
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DisableIRQ(can->irqn);
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break;
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case RT_CAN_CMD_SET_FILTER:
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cfg = (struct rt_can_filter_config *)arg;
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item = cfg->items;
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count = cfg->count;
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if (filter_mask == 0xffffffff)
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{
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LOG_E("%s filter is full!\n", can->name);
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res = RT_ERROR;
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break;
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}
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else if (filter_mask == 0)
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{
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/* deinit all init RX MB */
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for (i = 0; i < RX_MB_COUNT; i++)
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{
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FLEXCAN_SetRxMbConfig(can->base, i + 1, RT_NULL, false);
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}
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}
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while (count)
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{
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if (item->ide)
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{
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mbConfig.format = kFLEXCAN_FrameFormatExtend;
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mbConfig.id = FLEXCAN_ID_EXT(item->id);
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mask = FLEXCAN_RX_MB_EXT_MASK(item->mask, 0, 0);
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}
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else
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{
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mbConfig.format = kFLEXCAN_FrameFormatStandard;
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mbConfig.id = FLEXCAN_ID_STD(item->id);
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mask = FLEXCAN_RX_MB_STD_MASK(item->mask, 0, 0);
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}
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if (item->rtr)
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{
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mbConfig.type = kFLEXCAN_FrameTypeRemote;
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}
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else
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{
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mbConfig.type = kFLEXCAN_FrameTypeData;
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}
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/* user does not specify hdr index,set hdr from RX MB 1 */
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if (item->hdr == -1)
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{
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for (i = 0; i < 32; i++)
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{
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if (!(filter_mask & (1 << i)))
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{
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index = i;
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break;
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}
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}
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}
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else /* use user specified hdr */
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{
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if (filter_mask & (1 << item->hdr))
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{
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res = RT_ERROR;
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LOG_E("%s hdr%d filter already set!\n", can->name, item->hdr);
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break;
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}
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else
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{
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index = item->hdr;
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}
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}
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/* RX MB index from 1 to 32,hdr index 0~31 map RX MB index 1~32. */
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FLEXCAN_SetRxIndividualMask(can->base, index + 1, mask);
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FLEXCAN_SetRxMbConfig(can->base, index + 1, &mbConfig, true);
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filter_mask |= 1 << index;
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item++;
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count--;
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}
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break;
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case RT_CAN_CMD_SET_BAUD:
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res = RT_ERROR;
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break;
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case RT_CAN_CMD_SET_MODE:
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res = RT_ERROR;
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break;
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case RT_CAN_CMD_SET_PRIV:
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res = RT_ERROR;
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break;
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case RT_CAN_CMD_GET_STATUS:
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FLEXCAN_GetBusErrCount(can->base, (rt_uint8_t *)(&can->can_dev.status.snderrcnt), (rt_uint8_t *)(&can->can_dev.status.rcverrcnt));
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rt_memcpy(arg, &can->can_dev.status, sizeof(can->can_dev.status));
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break;
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default:
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res = RT_ERROR;
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break;
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}
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return res;
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}
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static int can_send(struct rt_can_device *can_dev, const void *buf, rt_uint32_t boxno)
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{
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struct imxrt_can *can;
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struct rt_can_msg *msg;
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status_t ret;
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flexcan_frame_t frame;
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flexcan_mb_transfer_t txXfer;
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rt_uint8_t sendMB;
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RT_ASSERT(can_dev != RT_NULL);
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RT_ASSERT(buf != RT_NULL);
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can = (struct imxrt_can *)can_dev->parent.user_data;
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msg = (struct rt_can_msg *) buf;
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RT_ASSERT(can != RT_NULL);
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RT_ASSERT(msg != RT_NULL);
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/* use the last 16 MB to send msg */
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sendMB = 63 - boxno;
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FLEXCAN_SetTxMbConfig(can->base, sendMB, true);
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if (RT_CAN_STDID == msg->ide)
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{
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frame.id = FLEXCAN_ID_STD(msg->id);
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frame.format = kFLEXCAN_FrameFormatStandard;
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}
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else if (RT_CAN_EXTID == msg->ide)
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{
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frame.id = FLEXCAN_ID_EXT(msg->id);
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frame.format = kFLEXCAN_FrameFormatExtend;
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}
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if (RT_CAN_DTR == msg->rtr)
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{
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frame.type = kFLEXCAN_FrameTypeData;
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}
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else if (RT_CAN_RTR == msg->rtr)
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{
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frame.type = kFLEXCAN_FrameTypeRemote;
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}
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frame.length = msg->len;
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frame.dataByte0 = msg->data[0];
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frame.dataByte1 = msg->data[1];
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frame.dataByte2 = msg->data[2];
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frame.dataByte3 = msg->data[3];
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frame.dataByte4 = msg->data[4];
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frame.dataByte5 = msg->data[5];
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frame.dataByte6 = msg->data[6];
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frame.dataByte7 = msg->data[7];
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txXfer.mbIdx = sendMB;
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txXfer.frame = &frame;
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ret = FLEXCAN_TransferSendNonBlocking(can->base, &can->handle, &txXfer);
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switch (ret)
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{
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case kStatus_Success:
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ret = RT_EOK;
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break;
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case kStatus_Fail:
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ret = RT_ERROR;
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break;
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case kStatus_FLEXCAN_TxBusy:
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ret = RT_EBUSY;
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break;
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}
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return ret;
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}
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static int can_recv(struct rt_can_device *can_dev, void *buf, rt_uint32_t boxno)
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{
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struct imxrt_can *can;
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struct rt_can_msg *pmsg;
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rt_uint8_t index;
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RT_ASSERT(can_dev != RT_NULL);
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can = (struct imxrt_can *)can_dev->parent.user_data;
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pmsg = (struct rt_can_msg *) buf;
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RT_ASSERT(can != RT_NULL);
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index = boxno - 1;
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if (frame[index].format == kFLEXCAN_FrameFormatStandard)
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{
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pmsg->ide = RT_CAN_STDID;
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pmsg->id = frame[index].id >> CAN_ID_STD_SHIFT;
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}
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else
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{
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pmsg->ide = RT_CAN_EXTID;
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pmsg->id = frame[index].id >> CAN_ID_EXT_SHIFT;
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}
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if (frame[index].type == kFLEXCAN_FrameTypeData)
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{
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pmsg->rtr = RT_CAN_DTR;
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}
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else if (frame[index].type == kFLEXCAN_FrameTypeRemote)
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{
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pmsg->rtr = RT_CAN_RTR;
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}
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pmsg->hdr = index; /* one hdr filter per MB */
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pmsg->len = frame[index].length;
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pmsg->data[0] = frame[index].dataByte0;
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pmsg->data[1] = frame[index].dataByte1;
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pmsg->data[2] = frame[index].dataByte2;
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pmsg->data[3] = frame[index].dataByte3;
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pmsg->data[4] = frame[index].dataByte4;
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pmsg->data[5] = frame[index].dataByte5;
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pmsg->data[6] = frame[index].dataByte6;
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pmsg->data[7] = frame[index].dataByte7;
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return 0;
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}
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static struct rt_can_ops imxrt_can_ops =
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{
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.configure = can_cfg,
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.control = can_control,
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.sendmsg = can_send,
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.recvmsg = can_recv,
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};
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int rt_hw_can_init(void)
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{
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int i;
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rt_err_t ret = RT_EOK;
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struct can_configure config = CANDEFAULTCONFIG;
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config.privmode = 0;
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config.ticks = 50;
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config.sndboxnumber = 16; /* send Mailbox count */
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config.msgboxsz = RX_MB_COUNT; /* RX msg buffer count */
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#ifdef RT_CAN_USING_HDR
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config.maxhdr = RX_MB_COUNT; /* filter count,one filter per MB */
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#endif
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for (i = 0; i < sizeof(flexcans) / sizeof(flexcans[0]); i++)
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{
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flexcans[i].can_dev.config = config;
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ret = rt_hw_can_register(&flexcans[i].can_dev, flexcans[i].name, &imxrt_can_ops, &flexcans[i]);
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}
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return ret;
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}
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INIT_BOARD_EXPORT(rt_hw_can_init);
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#endif /* BSP_USING_CAN */
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|
@ -0,0 +1,16 @@
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/*
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||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-06-28 misonyo the first version.
|
||||
*/
|
||||
|
||||
#ifndef DRV_SPI_H__
|
||||
#define DRV_SPI_H__
|
||||
|
||||
int rt_hw_can_init(void);
|
||||
|
||||
#endif /* DRV_SPI_H__ */
|
|
@ -54,6 +54,7 @@ i.MX RT1052 EVK Pro 是野火推出的一款基于 ARM Cortex-M7 内核的开发
|
|||
| WDT | 支持 | |
|
||||
| PWM | 支持 | |
|
||||
| GPT | 支持 | |
|
||||
| CAN | 支持 | CAN1 |
|
||||
|
||||
## 使用说明
|
||||
|
||||
|
|
|
@ -16,6 +16,17 @@ menu "On-chip Peripheral Drivers"
|
|||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
menuconfig BSP_USING_CAN
|
||||
bool "Enable CAN"
|
||||
select RT_USING_CAN
|
||||
default n
|
||||
|
||||
if BSP_USING_CAN
|
||||
config BSP_USING_CAN1
|
||||
bool "Enable CAN1"
|
||||
default y
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_LPUART
|
||||
bool "Enable UART"
|
||||
select RT_USING_SERIAL
|
||||
|
|
|
@ -53,7 +53,7 @@ name: BOARD_BootClockRUN
|
|||
called_from_default_init: true
|
||||
outputs:
|
||||
- {id: AHB_CLK_ROOT.outFreq, value: 600 MHz}
|
||||
- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
|
||||
- {id: CAN_CLK_ROOT.outFreq, value: 20 MHz}
|
||||
- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
|
||||
- {id: CLK_1M.outFreq, value: 1 MHz}
|
||||
- {id: CLK_24M.outFreq, value: 24 MHz}
|
||||
|
@ -93,6 +93,7 @@ outputs:
|
|||
settings:
|
||||
- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
|
||||
- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
|
||||
- {id: CCM.CAN_CLK_PODF.scale, value: '4', locked: true}
|
||||
- {id: CCM.FLEXSPI_PODF.scale, value: '1', locked: true}
|
||||
- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
|
||||
- {id: CCM.LCDIF_PODF.scale, value: '8', locked: true}
|
||||
|
@ -297,7 +298,7 @@ void BOARD_BootClockRUN(void)
|
|||
CLOCK_DisableClock(kCLOCK_Can1S);
|
||||
CLOCK_DisableClock(kCLOCK_Can2S);
|
||||
/* Set CAN_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_CanDiv, 1);
|
||||
CLOCK_SetDiv(kCLOCK_CanDiv, 3);
|
||||
/* Set Can clock source. */
|
||||
CLOCK_SetMux(kCLOCK_CanMux, 2);
|
||||
/* Disable UART clock gate. */
|
||||
|
|
|
@ -110,6 +110,32 @@ void BOARD_InitPins(void) {
|
|||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_13_LPUART5_RX, /* GPIO_B1_13 is configured as LPUART5_RX */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX, /* GPIO_AD_B0_14 is configured as FLEXCAN2_TX */
|
||||
1U); /* Software Input On Field: Force input path of pad GPIO_AD_B0_14 */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX, /* GPIO_AD_B0_15 is configured as FLEXCAN2_RX */
|
||||
1U); /* Software Input On Field: Force input path of pad GPIO_AD_B0_15 */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX, /* GPIO_AD_B0_14 PAD functional properties : */
|
||||
0x10B0u); /* Slew Rate Field: Slow Slew Rate
|
||||
Drive Strength Field: R0/6
|
||||
Speed Field: medium(100MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
Pull / Keep Enable Field: Pull/Keeper Enabled
|
||||
Pull / Keep Select Field: Keeper
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Down
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX, /* GPIO_AD_B0_15 PAD functional properties : */
|
||||
0x10B0u); /* Slew Rate Field: Slow Slew Rate
|
||||
Drive Strength Field: R0/6
|
||||
Speed Field: medium(100MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
Pull / Keep Enable Field: Pull/Keeper Enabled
|
||||
Pull / Keep Select Field: Keeper
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Down
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
}
|
||||
|
||||
/***********************************************************************************************************************
|
||||
|
|
|
@ -78,6 +78,8 @@
|
|||
#define RT_USING_SERIAL
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_CAN
|
||||
#define RT_CAN_USING_HDR
|
||||
#define RT_USING_CPUTIME
|
||||
#define RT_USING_PIN
|
||||
|
||||
|
@ -158,6 +160,8 @@
|
|||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_CAN
|
||||
#define BSP_USING_CAN2
|
||||
#define BSP_USING_LPUART
|
||||
#define BSP_USING_LPUART1
|
||||
|
||||
|
|
Loading…
Reference in New Issue