diff --git a/bsp/imxrt1052-evk/.config b/bsp/imxrt1052-evk/.config index 0c6ea00ec9..130d4835b5 100644 --- a/bsp/imxrt1052-evk/.config +++ b/bsp/imxrt1052-evk/.config @@ -127,7 +127,7 @@ CONFIG_RT_USING_SERIAL=y # CONFIG_RT_USING_CPUTIME is not set CONFIG_RT_USING_I2C=y CONFIG_RT_USING_I2C_BITOPS=y -# CONFIG_RT_USING_PIN is not set +CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_RTC is not set diff --git a/bsp/imxrt1052-evk/drivers/SConscript b/bsp/imxrt1052-evk/drivers/SConscript index d5264e5388..4025fb6fbc 100644 --- a/bsp/imxrt1052-evk/drivers/SConscript +++ b/bsp/imxrt1052-evk/drivers/SConscript @@ -15,6 +15,9 @@ drv_sdram.c CPPPATH = [cwd] CPPDEFINES = [] +if GetDepend('RT_USING_PIN'): + src += ['drv_pin.c'] + if GetDepend('RT_USING_LWIP'): src += ['drv_eth.c', 'fsl_phy.c'] CPPDEFINES += ['FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE'] diff --git a/bsp/imxrt1052-evk/drivers/drv_pin.c b/bsp/imxrt1052-evk/drivers/drv_pin.c new file mode 100644 index 0000000000..84e3733039 --- /dev/null +++ b/bsp/imxrt1052-evk/drivers/drv_pin.c @@ -0,0 +1,279 @@ +/* + * File : drv_pin.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006-2013, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2018-03-13 Liuguang the first version. + */ +#include "drv_pin.h" + +#include "fsl_common.h" +#include "fsl_iomuxc.h" +#include "fsl_gpio.h" + +#ifdef RT_USING_PIN + +/* GPIO外设时钟会在GPIO_PinInit中自动配置, 如果定义了以下宏则不会自动配置 */ +#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL + #error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!" +#endif + +/* RT1052 PIN描述结构体 */ +struct rt1052_pin +{ + rt_uint16_t pin; + GPIO_Type *gpio; + rt_uint32_t gpio_pin; +}; + +#define __ARRAY_LEN(array) (sizeof(array)/sizeof(array[0])) +#define __RT1052_PIN_DEFAULT {0, 0, 0} +#define __RT1052_PIN(INDEX, PORT, PIN) {INDEX, PORT, PIN} + +static struct rt1052_pin rt1052_pin_map[] = +{ + __RT1052_PIN_DEFAULT, + + /* GPIO4 */ + __RT1052_PIN( 1, GPIO4, 0), /* GPIO_EMC_00 */ + __RT1052_PIN( 2, GPIO4, 1), /* GPIO_EMC_01 */ + __RT1052_PIN( 3, GPIO4, 2), /* GPIO_EMC_02 */ + __RT1052_PIN( 4, GPIO4, 3), /* GPIO_EMC_03 */ + __RT1052_PIN( 5, GPIO4, 4), /* GPIO_EMC_04 */ + __RT1052_PIN( 6, GPIO4, 5), /* GPIO_EMC_05 */ + __RT1052_PIN( 7, GPIO4, 6), /* GPIO_EMC_06 */ + __RT1052_PIN( 8, GPIO4, 7), /* GPIO_EMC_07 */ + __RT1052_PIN( 9, GPIO4, 8), /* GPIO_EMC_08 */ + __RT1052_PIN(10, GPIO4, 9), /* GPIO_EMC_09 */ + __RT1052_PIN(11, GPIO4, 10), /* GPIO_EMC_10 */ + __RT1052_PIN(12, GPIO4, 11), /* GPIO_EMC_11 */ + __RT1052_PIN(13, GPIO4, 12), /* GPIO_EMC_12 */ + __RT1052_PIN(14, GPIO4, 13), /* GPIO_EMC_13 */ + __RT1052_PIN(15, GPIO4, 14), /* GPIO_EMC_14 */ + __RT1052_PIN(16, GPIO4, 15), /* GPIO_EMC_15 */ + __RT1052_PIN(17, GPIO4, 16), /* GPIO_EMC_16 */ + __RT1052_PIN(18, GPIO4, 17), /* GPIO_EMC_17 */ + __RT1052_PIN(19, GPIO4, 18), /* GPIO_EMC_18 */ + __RT1052_PIN(20, GPIO4, 19), /* GPIO_EMC_19 */ + __RT1052_PIN(21, GPIO4, 20), /* GPIO_EMC_20 */ + __RT1052_PIN(22, GPIO4, 21), /* GPIO_EMC_21 */ + __RT1052_PIN(23, GPIO4, 22), /* GPIO_EMC_22 */ + __RT1052_PIN(24, GPIO4, 23), /* GPIO_EMC_23 */ + __RT1052_PIN(25, GPIO4, 24), /* GPIO_EMC_24 */ + __RT1052_PIN(26, GPIO4, 25), /* GPIO_EMC_25 */ + __RT1052_PIN(27, GPIO4, 26), /* GPIO_EMC_26 */ + __RT1052_PIN(28, GPIO4, 27), /* GPIO_EMC_27 */ + __RT1052_PIN(29, GPIO4, 28), /* GPIO_EMC_28 */ + __RT1052_PIN(30, GPIO4, 29), /* GPIO_EMC_29 */ + __RT1052_PIN(31, GPIO4, 30), /* GPIO_EMC_30 */ + __RT1052_PIN(32, GPIO4, 31), /* GPIO_EMC_31 */ + + __RT1052_PIN(33, GPIO3, 18), /* GPIO_EMC_32 */ + __RT1052_PIN(34, GPIO3, 19), /* GPIO_EMC_33 */ + __RT1052_PIN(35, GPIO3, 20), /* GPIO_EMC_34 */ + __RT1052_PIN(36, GPIO3, 21), /* GPIO_EMC_35 */ + __RT1052_PIN(37, GPIO3, 22), /* GPIO_EMC_36 */ + __RT1052_PIN(38, GPIO3, 23), /* GPIO_EMC_37 */ + __RT1052_PIN(39, GPIO3, 24), /* GPIO_EMC_38 */ + __RT1052_PIN(40, GPIO3, 25), /* GPIO_EMC_39 */ + __RT1052_PIN(41, GPIO3, 26), /* GPIO_EMC_40 */ + __RT1052_PIN(42, GPIO3, 27), /* GPIO_EMC_41 */ + + /* GPIO1 */ + __RT1052_PIN(43, GPIO1, 0), /* GPIO_AD_B0_00 */ + __RT1052_PIN(44, GPIO1, 1), /* GPIO_AD_B0_01 */ + __RT1052_PIN(45, GPIO1, 2), /* GPIO_AD_B0_02 */ + __RT1052_PIN(46, GPIO1, 3), /* GPIO_AD_B0_03 */ + __RT1052_PIN(47, GPIO1, 4), /* GPIO_AD_B0_04 */ + __RT1052_PIN(48, GPIO1, 5), /* GPIO_AD_B0_05 */ + __RT1052_PIN(49, GPIO1, 6), /* GPIO_AD_B0_06 */ + __RT1052_PIN(50, GPIO1, 7), /* GPIO_AD_B0_07 */ + __RT1052_PIN(51, GPIO1, 8), /* GPIO_AD_B0_08 */ + __RT1052_PIN(52, GPIO1, 9), /* GPIO_AD_B0_09 */ + __RT1052_PIN(53, GPIO1, 10), /* GPIO_AD_B0_10 */ + __RT1052_PIN(54, GPIO1, 11), /* GPIO_AD_B0_11 */ + __RT1052_PIN(55, GPIO1, 12), /* GPIO_AD_B0_12 */ + __RT1052_PIN(56, GPIO1, 13), /* GPIO_AD_B0_13 */ + __RT1052_PIN(57, GPIO1, 14), /* GPIO_AD_B0_14 */ + __RT1052_PIN(58, GPIO1, 15), /* GPIO_AD_B0_15 */ + __RT1052_PIN(59, GPIO1, 16), /* GPIO_AD_B1_00 */ + __RT1052_PIN(60, GPIO1, 17), /* GPIO_AD_B1_01 */ + __RT1052_PIN(61, GPIO1, 18), /* GPIO_AD_B1_02 */ + __RT1052_PIN(62, GPIO1, 19), /* GPIO_AD_B1_03 */ + __RT1052_PIN(63, GPIO1, 20), /* GPIO_AD_B1_04 */ + __RT1052_PIN(64, GPIO1, 21), /* GPIO_AD_B1_05 */ + __RT1052_PIN(65, GPIO1, 22), /* GPIO_AD_B1_06 */ + __RT1052_PIN(66, GPIO1, 23), /* GPIO_AD_B1_07 */ + __RT1052_PIN(67, GPIO1, 24), /* GPIO_AD_B1_08 */ + __RT1052_PIN(68, GPIO1, 25), /* GPIO_AD_B1_09 */ + __RT1052_PIN(69, GPIO1, 26), /* GPIO_AD_B1_10 */ + __RT1052_PIN(70, GPIO1, 27), /* GPIO_AD_B1_11 */ + __RT1052_PIN(71, GPIO1, 28), /* GPIO_AD_B1_12 */ + __RT1052_PIN(72, GPIO1, 29), /* GPIO_AD_B1_13 */ + __RT1052_PIN(73, GPIO1, 30), /* GPIO_AD_B1_14 */ + __RT1052_PIN(74, GPIO1, 31), /* GPIO_AD_B1_15 */ + + /* GPIO2 */ + __RT1052_PIN( 75, GPIO2, 0), /* GPIO_B0_00 */ + __RT1052_PIN( 76, GPIO2, 1), /* GPIO_B0_01 */ + __RT1052_PIN( 77, GPIO2, 2), /* GPIO_B0_02 */ + __RT1052_PIN( 78, GPIO2, 3), /* GPIO_B0_03 */ + __RT1052_PIN( 79, GPIO2, 4), /* GPIO_B0_04 */ + __RT1052_PIN( 80, GPIO2, 5), /* GPIO_B0_05 */ + __RT1052_PIN( 81, GPIO2, 6), /* GPIO_B0_06 */ + __RT1052_PIN( 82, GPIO2, 7), /* GPIO_B0_07 */ + __RT1052_PIN( 83, GPIO2, 8), /* GPIO_B0_08 */ + __RT1052_PIN( 84, GPIO2, 9), /* GPIO_B0_09 */ + __RT1052_PIN( 85, GPIO2, 10), /* GPIO_B0_10 */ + __RT1052_PIN( 86, GPIO2, 11), /* GPIO_B0_11 */ + __RT1052_PIN( 87, GPIO2, 12), /* GPIO_B0_12 */ + __RT1052_PIN( 88, GPIO2, 13), /* GPIO_B0_13 */ + __RT1052_PIN( 89, GPIO2, 14), /* GPIO_B0_14 */ + __RT1052_PIN( 90, GPIO2, 15), /* GPIO_B0_15 */ + __RT1052_PIN( 91, GPIO2, 16), /* GPIO_B1_00 */ + __RT1052_PIN( 92, GPIO2, 17), /* GPIO_B1_01 */ + __RT1052_PIN( 93, GPIO2, 18), /* GPIO_B1_02 */ + __RT1052_PIN( 94, GPIO2, 19), /* GPIO_B1_03 */ + __RT1052_PIN( 95, GPIO2, 20), /* GPIO_B1_04 */ + __RT1052_PIN( 96, GPIO2, 21), /* GPIO_B1_05 */ + __RT1052_PIN( 97, GPIO2, 22), /* GPIO_B1_06 */ + __RT1052_PIN( 98, GPIO2, 23), /* GPIO_B1_07 */ + __RT1052_PIN( 99, GPIO2, 24), /* GPIO_B1_08 */ + __RT1052_PIN(100, GPIO2, 25), /* GPIO_B1_09 */ + __RT1052_PIN(101, GPIO2, 26), /* GPIO_B1_10 */ + __RT1052_PIN(102, GPIO2, 27), /* GPIO_B1_11 */ + __RT1052_PIN(103, GPIO2, 28), /* GPIO_B1_12 */ + __RT1052_PIN(104, GPIO2, 29), /* GPIO_B1_13 */ + __RT1052_PIN(105, GPIO2, 30), /* GPIO_B1_14 */ + __RT1052_PIN(106, GPIO2, 31), /* GPIO_B1_15 */ + + /* GPIO3 */ + __RT1052_PIN(107, GPIO3, 0), /* GPIO_SD_B1_00 */ + __RT1052_PIN(108, GPIO3, 1), /* GPIO_SD_B1_01 */ + __RT1052_PIN(109, GPIO3, 2), /* GPIO_SD_B1_02 */ + __RT1052_PIN(110, GPIO3, 3), /* GPIO_SD_B1_03 */ + __RT1052_PIN(111, GPIO3, 4), /* GPIO_SD_B1_04 */ + __RT1052_PIN(112, GPIO3, 5), /* GPIO_SD_B1_05 */ + __RT1052_PIN(113, GPIO3, 6), /* GPIO_SD_B1_06 */ + __RT1052_PIN(114, GPIO3, 7), /* GPIO_SD_B1_07 */ + __RT1052_PIN(115, GPIO3, 8), /* GPIO_SD_B1_08 */ + __RT1052_PIN(116, GPIO3, 9), /* GPIO_SD_B1_09 */ + __RT1052_PIN(117, GPIO3, 10), /* GPIO_SD_B1_10 */ + __RT1052_PIN(118, GPIO3, 11), /* GPIO_SD_B1_11 */ + __RT1052_PIN(119, GPIO3, 12), /* GPIO_SD_B0_00 */ + __RT1052_PIN(120, GPIO3, 13), /* GPIO_SD_B0_01 */ + __RT1052_PIN(121, GPIO3, 14), /* GPIO_SD_B0_02 */ + __RT1052_PIN(122, GPIO3, 15), /* GPIO_SD_B0_03 */ + __RT1052_PIN(123, GPIO3, 16), /* GPIO_SD_B0_04 */ + __RT1052_PIN(124, GPIO3, 17), /* GPIO_SD_B0_05 */ + + /* GPIO5 */ + __RT1052_PIN(125, GPIO5, 0), /* WAKEUP */ + __RT1052_PIN(126, GPIO5, 1), /* PMIC_ON_REQ */ + __RT1052_PIN(127, GPIO5, 2) /* PMIC_STBY_REQ */ +}; + +static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) +{ + gpio_pin_config_t gpio; + rt_uint32_t config_value = 0; + + if((pin > __ARRAY_LEN(rt1052_pin_map)) || (pin == 0)) + { + return; + } + + if(rt1052_pin_map[pin].gpio != GPIO5) + { + CLOCK_EnableClock(kCLOCK_Iomuxc); + + } + else + { + CLOCK_EnableClock(kCLOCK_IomuxcSnvs); + } + + /* 配置IOMUXC: 将IO配置为GPIO */ + IOMUXC_SetPinMux(0x401F8010U + pin*4, 0x5U, 0, 0, 0, 0); + + gpio.outputLogic = 0; + gpio.interruptMode = kGPIO_NoIntmode; + + switch(mode) + { + case PIN_MODE_OUTPUT: + { + config_value = 0x1030U; + gpio.direction = kGPIO_DigitalOutput; + } + break; + + case PIN_MODE_INPUT: + { + config_value = 0x1030U; + gpio.direction = kGPIO_DigitalInput; + } + break; + + case PIN_MODE_INPUT_PULLDOWN: + { + config_value = 0x1030U; + gpio.direction = kGPIO_DigitalInput; + } + break; + + case PIN_MODE_INPUT_PULLUP: + { + config_value = 0x5030U; + gpio.direction = kGPIO_DigitalInput; + } + break; + + case PIN_MODE_OUTPUT_OD: + { + config_value = 0x1830U; + gpio.direction = kGPIO_DigitalOutput; + } + break; + } + + /* 配置GPIO模式: 上下拉模式, 开漏模, IO翻转速度(50MHz) */ + IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value); + + GPIO_PinInit(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, &gpio); +} + +static int rt1052_pin_read(rt_device_t dev, rt_base_t pin) +{ + return GPIO_PinRead(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin); +} + +static void rt1052_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) +{ + GPIO_PinWrite(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, value); +} + +static struct rt_pin_ops rt1052_pin_ops = +{ + .pin_mode = rt1052_pin_mode, + .pin_read = rt1052_pin_read, + .pin_write = rt1052_pin_write +}; + +int rt_hw_pin_init(void) +{ + int ret = RT_EOK; + + ret = rt_device_pin_register("pin", &rt1052_pin_ops, RT_NULL); + + return ret; +} +INIT_BOARD_EXPORT(rt_hw_pin_init); + +#endif /*RT_USING_PIN */ diff --git a/bsp/imxrt1052-evk/drivers/drv_pin.h b/bsp/imxrt1052-evk/drivers/drv_pin.h new file mode 100644 index 0000000000..f1de4fbea7 --- /dev/null +++ b/bsp/imxrt1052-evk/drivers/drv_pin.h @@ -0,0 +1,23 @@ +/* + * File : drv_pin.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006-2013, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2018-03-13 Liuguang the first version. + */ + +#ifndef __DRV_PIN_H__ +#define __DRV_PIN_H__ + +#include +#include + +int rt_hw_pin_init(void); + +#endif diff --git a/bsp/imxrt1052-evk/project.uvoptx b/bsp/imxrt1052-evk/project.uvoptx index 6c7347668a..deca1cf444 100644 --- a/bsp/imxrt1052-evk/project.uvoptx +++ b/bsp/imxrt1052-evk/project.uvoptx @@ -73,7 +73,7 @@ 0 - 1 + 0 0 1 @@ -117,26 +117,6 @@ BIN\CMSIS_AGDI.dll - - 0 - ARMRTXEVENTFLAGS - -L70 -Z18 -C0 -M0 -T1 - - - 0 - DLGTARM - (1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) - - - 0 - ARMDBGFLAGS - - - - 0 - DLGUARM - - 0 JL2CM3 @@ -145,7 +125,7 @@ 0 CMSIS_AGDI - -X"" -O974 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_HYPER_256KB_SEC.FLM -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\MIMXRT105x_HYPER_256KB_SEC.FLM) + -X"" -O974 -S0 -C0 -P00 -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_HYPER_256KB_SEC.FLM -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\MIMXRT105x_HYPER_256KB_SEC.FLM) 0 @@ -160,12 +140,12 @@ 0 0 - 1 + 0 0 0 0 0 - 1 + 0 0 0 0 @@ -199,2138 +179,6 @@ - - Applications - 1 - 0 - 0 - 0 - - 1 - 1 - 1 - 0 - 0 - 0 - applications\device_test.c - device_test.c - 0 - 0 - - - 1 - 2 - 1 - 0 - 0 - 0 - applications\main.c - main.c - 0 - 0 - - - 1 - 3 - 1 - 0 - 0 - 0 - applications\mem_dump.c - mem_dump.c - 0 - 0 - - - 1 - 4 - 1 - 0 - 0 - 0 - applications\mem_test.c - mem_test.c - 0 - 0 - - - - - Drivers - 1 - 0 - 0 - 0 - - 2 - 5 - 1 - 0 - 0 - 0 - drivers\board.c - board.c - 0 - 0 - - - 2 - 6 - 1 - 0 - 0 - 0 - drivers\usart.c - usart.c - 0 - 0 - - - 2 - 7 - 1 - 0 - 0 - 0 - drivers\hyper_flash_boot.c - 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a/bsp/imxrt1052-evk/project.uvprojx b/bsp/imxrt1052-evk/project.uvprojx index 4ec4dbb077..40d5d8b5d7 100644 --- a/bsp/imxrt1052-evk/project.uvprojx +++ b/bsp/imxrt1052-evk/project.uvprojx @@ -1,16 +1,13 @@ - 2.1 -
### uVision Project, (C) Keil Software
- RT-Thread IMXRT1052 0x4 ARM-ADS - 5060750::V5.06 update 6 (build 750)::ARMCC + 5060528::V5.06 update 5 (build 528)::ARMCC 0 @@ -19,28 +16,28 @@ NXP.iMXRT_DFP.1.0.2 http://mcuxpresso.nxp.com/cmsis_pack/repo/ IRAM(0x20000000,0x00060000) IRAM2(0x00000000,0x00020000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ELITTLE - - + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0RT1050 -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\RT1050.FLM)) 0 $$Device:MIMXRT1052$Device\Include\MIMXRT1052.h - - - - - - - - - + + + + + + + + + $$Device:MIMXRT1052$SVD\MIMXRT1052.svd 0 0 - - - - - + + + + + 0 0 @@ -62,8 +59,8 @@ 0 0 - - + + 0 0 0 @@ -72,8 +69,8 @@ 0 0 - - + + 0 0 0 @@ -83,14 +80,14 @@ 1 0 fromelf --bin !L --output rtthread-mdk.bin - + 0 0 0 0 0 - + 0 @@ -104,8 +101,8 @@ 0 0 3 - - + + 1 @@ -138,11 +135,11 @@ 1 BIN\UL2CM3.DLL - - - - - + + + + + 0 @@ -175,7 +172,7 @@ 0 0 "Cortex-M7" - + 0 0 0 @@ -307,7 +304,7 @@ 0x20000 - + 1 @@ -335,8 +332,8 @@ --library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186 SKIP_SYSCLK_INIT, CPU_MIMXRT1052DVL6A, FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1, EVK_MCIMXRM, FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE, RT_USING_ARM_LIBC - - applications;.;drivers;Libraries;Libraries\drivers;Libraries\utilities;Libraries\CMSIS\Include;..\..\include;..\..\libcpu\arm\cortex-m7;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\net\lwip-2.0.2\src;..\..\components\net\lwip-2.0.2\src\include;..\..\components\net\lwip-2.0.2\src\include\ipv4;..\..\components\net\lwip-2.0.2\src\arch\include;..\..\components\net\lwip-2.0.2\src\include\netif;..\..\components\net\lwip-2.0.2\src\include\posix + + applications;.;drivers;Libraries;Libraries\drivers;Libraries\utilities;Libraries\CMSIS\Include;..\..\include;..\..\libcpu\arm\cortex-m7;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\net\lwip-2.0.2\src;..\..\components\net\lwip-2.0.2\src\include;..\..\components\net\lwip-2.0.2\src\include\ipv4;..\..\components\net\lwip-2.0.2\src\arch\include;..\..\components\net\lwip-2.0.2\src\include\netif;..\..\components\net\lwip-2.0.2\src\include\posix @@ -351,10 +348,10 @@ 0 0 - - - - + + + + @@ -366,13 +363,13 @@ 0 0x00000000 0x10000000 - + .\Libraries\arm\MIMXRT1052xxxxx_flexspi_nor.scf - - - --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) --diag_suppress 6314 - - + + + --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) + + @@ -385,16 +382,22 @@ 1 applications\device_test.c + + main.c 1 applications\main.c + + mem_dump.c 1 applications\mem_dump.c + + mem_test.c 1 @@ -410,31 +413,50 @@ 1 drivers\board.c + + usart.c 1 drivers\usart.c + + hyper_flash_boot.c 1 drivers\hyper_flash_boot.c + + drv_sdram.c 1 drivers\drv_sdram.c + + + + drv_pin.c + 1 + drivers\drv_pin.c + + + drv_eth.c 1 drivers\drv_eth.c + + fsl_phy.c 1 drivers\fsl_phy.c + + drv_sdio.c 1 @@ -450,301 +472,421 @@ 1 Libraries\drivers\fsl_adc.c + + fsl_adc_etc.c 1 Libraries\drivers\fsl_adc_etc.c + + fsl_aipstz.c 1 Libraries\drivers\fsl_aipstz.c + + fsl_aoi.c 1 Libraries\drivers\fsl_aoi.c + + fsl_bee.c 1 Libraries\drivers\fsl_bee.c + + fsl_cache.c 1 Libraries\drivers\fsl_cache.c + + fsl_clock.c 1 Libraries\drivers\fsl_clock.c + + fsl_cmp.c 1 Libraries\drivers\fsl_cmp.c + + fsl_common.c 1 Libraries\drivers\fsl_common.c + + fsl_csi.c 1 Libraries\drivers\fsl_csi.c + + fsl_dcdc.c 1 Libraries\drivers\fsl_dcdc.c + + fsl_dcp.c 1 Libraries\drivers\fsl_dcp.c + + fsl_dmamux.c 1 Libraries\drivers\fsl_dmamux.c + + fsl_edma.c 1 Libraries\drivers\fsl_edma.c + + fsl_elcdif.c 1 Libraries\drivers\fsl_elcdif.c + + fsl_enc.c 1 Libraries\drivers\fsl_enc.c + + fsl_enet.c 1 Libraries\drivers\fsl_enet.c + + fsl_ewm.c 1 Libraries\drivers\fsl_ewm.c + + fsl_flexcan.c 1 Libraries\drivers\fsl_flexcan.c + + fsl_flexio.c 1 Libraries\drivers\fsl_flexio.c + + fsl_flexio_i2c_master.c 1 Libraries\drivers\fsl_flexio_i2c_master.c + + fsl_flexio_i2s.c 1 Libraries\drivers\fsl_flexio_i2s.c + + fsl_flexio_i2s_edma.c 1 Libraries\drivers\fsl_flexio_i2s_edma.c + + fsl_flexio_spi.c 1 Libraries\drivers\fsl_flexio_spi.c + + fsl_flexio_spi_edma.c 1 Libraries\drivers\fsl_flexio_spi_edma.c + + fsl_flexio_uart.c 1 Libraries\drivers\fsl_flexio_uart.c + + fsl_flexio_uart_edma.c 1 Libraries\drivers\fsl_flexio_uart_edma.c + + fsl_flexram.c 1 Libraries\drivers\fsl_flexram.c + + fsl_flexspi.c 1 Libraries\drivers\fsl_flexspi.c + + fsl_gpc.c 1 Libraries\drivers\fsl_gpc.c + + fsl_gpio.c 1 Libraries\drivers\fsl_gpio.c + + fsl_gpt.c 1 Libraries\drivers\fsl_gpt.c + + fsl_kpp.c 1 Libraries\drivers\fsl_kpp.c + + fsl_lpi2c.c 1 Libraries\drivers\fsl_lpi2c.c + + fsl_lpi2c_edma.c 1 Libraries\drivers\fsl_lpi2c_edma.c + + fsl_lpspi.c 1 Libraries\drivers\fsl_lpspi.c + + fsl_lpspi_edma.c 1 Libraries\drivers\fsl_lpspi_edma.c + + fsl_lpuart.c 1 Libraries\drivers\fsl_lpuart.c + + fsl_lpuart_edma.c 1 Libraries\drivers\fsl_lpuart_edma.c + + fsl_pit.c 1 Libraries\drivers\fsl_pit.c + + fsl_pmu.c 1 Libraries\drivers\fsl_pmu.c + + fsl_pwm.c 1 Libraries\drivers\fsl_pwm.c + + fsl_pxp.c 1 Libraries\drivers\fsl_pxp.c + + fsl_qtmr.c 1 Libraries\drivers\fsl_qtmr.c + + fsl_rtwdog.c 1 Libraries\drivers\fsl_rtwdog.c + + fsl_sai.c 1 Libraries\drivers\fsl_sai.c + + fsl_sai_edma.c 1 Libraries\drivers\fsl_sai_edma.c + + fsl_semc.c 1 Libraries\drivers\fsl_semc.c + + fsl_snvs_hp.c 1 Libraries\drivers\fsl_snvs_hp.c + + fsl_snvs_lp.c 1 Libraries\drivers\fsl_snvs_lp.c + + fsl_spdif.c 1 Libraries\drivers\fsl_spdif.c + + fsl_spdif_edma.c 1 Libraries\drivers\fsl_spdif_edma.c + + fsl_src.c 1 Libraries\drivers\fsl_src.c + + fsl_trng.c 1 Libraries\drivers\fsl_trng.c + + fsl_tsc.c 1 Libraries\drivers\fsl_tsc.c + + fsl_usdhc.c 1 Libraries\drivers\fsl_usdhc.c + + fsl_wdog.c 1 Libraries\drivers\fsl_wdog.c + + fsl_xbara.c 1 Libraries\drivers\fsl_xbara.c + + fsl_xbarb.c 1 Libraries\drivers\fsl_xbarb.c + + system_MIMXRT1052.c 1 Libraries\system_MIMXRT1052.c + + startup_MIMXRT1052.s 2 @@ -760,61 +902,85 @@ 1 ..\..\src\clock.c + + components.c 1 ..\..\src\components.c + + device.c 1 ..\..\src\device.c + + idle.c 1 ..\..\src\idle.c + + ipc.c 1 ..\..\src\ipc.c + + irq.c 1 ..\..\src\irq.c + + kservice.c 1 ..\..\src\kservice.c + + memheap.c 1 ..\..\src\memheap.c + + object.c 1 ..\..\src\object.c + + scheduler.c 1 ..\..\src\scheduler.c + + signal.c 1 ..\..\src\signal.c + + thread.c 1 ..\..\src\thread.c + + timer.c 1 @@ -830,21 +996,29 @@ 1 ..\..\libcpu\arm\cortex-m7\cpuport.c + + context_rvds.S 2 ..\..\libcpu\arm\cortex-m7\context_rvds.S + + backtrace.c 1 ..\..\libcpu\arm\common\backtrace.c + + div0.c 1 ..\..\libcpu\arm\common\div0.c + + showmem.c 1 @@ -860,36 +1034,50 @@ 1 ..\..\components\dfs\src\dfs.c + + dfs_file.c 1 ..\..\components\dfs\src\dfs_file.c + + dfs_fs.c 1 ..\..\components\dfs\src\dfs_fs.c + + dfs_posix.c 1 ..\..\components\dfs\src\dfs_posix.c + + devfs.c 1 ..\..\components\dfs\filesystems\devfs\devfs.c + + dfs_elm.c 1 ..\..\components\dfs\filesystems\elmfat\dfs_elm.c + + ff.c 1 ..\..\components\dfs\filesystems\elmfat\ff.c + + ccsbcs.c 1 @@ -905,71 +1093,106 @@ 1 ..\..\components\drivers\i2c\i2c_core.c + + i2c_dev.c 1 ..\..\components\drivers\i2c\i2c_dev.c + + i2c-bit-ops.c 1 ..\..\components\drivers\i2c\i2c-bit-ops.c + + + + pin.c + 1 + ..\..\components\drivers\misc\pin.c + + + block_dev.c 1 ..\..\components\drivers\sdio\block_dev.c + + mmcsd_core.c 1 ..\..\components\drivers\sdio\mmcsd_core.c + + sd.c 1 ..\..\components\drivers\sdio\sd.c + + sdio.c 1 ..\..\components\drivers\sdio\sdio.c + + mmc.c 1 ..\..\components\drivers\sdio\mmc.c + + serial.c 1 ..\..\components\drivers\serial\serial.c + + completion.c 1 ..\..\components\drivers\src\completion.c + + dataqueue.c 1 ..\..\components\drivers\src\dataqueue.c + + pipe.c 1 ..\..\components\drivers\src\pipe.c + + ringbuffer.c 1 ..\..\components\drivers\src\ringbuffer.c + + waitqueue.c 1 ..\..\components\drivers\src\waitqueue.c + + workqueue.c 1 @@ -985,76 +1208,106 @@ 1 ..\..\components\finsh\shell.c + + symbol.c 1 ..\..\components\finsh\symbol.c + + cmd.c 1 ..\..\components\finsh\cmd.c + + msh.c 1 ..\..\components\finsh\msh.c + + msh_cmd.c 1 ..\..\components\finsh\msh_cmd.c + + msh_file.c 1 ..\..\components\finsh\msh_file.c + + finsh_compiler.c 1 ..\..\components\finsh\finsh_compiler.c + + finsh_error.c 1 ..\..\components\finsh\finsh_error.c + + finsh_heap.c 1 ..\..\components\finsh\finsh_heap.c + + finsh_init.c 1 ..\..\components\finsh\finsh_init.c + + finsh_node.c 1 ..\..\components\finsh\finsh_node.c + + finsh_ops.c 1 ..\..\components\finsh\finsh_ops.c + + finsh_parser.c 1 ..\..\components\finsh\finsh_parser.c + + finsh_var.c 1 ..\..\components\finsh\finsh_var.c + + finsh_vm.c 1 ..\..\components\finsh\finsh_vm.c + + finsh_token.c 1 @@ -1070,26 +1323,36 @@ 1 ..\..\components\libc\compilers\armlibc\libc.c + + libc_syms.c 1 ..\..\components\libc\compilers\armlibc\libc_syms.c + + mem_std.c 1 ..\..\components\libc\compilers\armlibc\mem_std.c + + stdio.c 1 ..\..\components\libc\compilers\armlibc\stdio.c + + stubs.c 1 ..\..\components\libc\compilers\armlibc\stubs.c + + time.c 1 @@ -1105,176 +1368,246 @@ 1 ..\..\components\net\lwip-2.0.2\src\arch\sys_arch.c + + api_lib.c 1 ..\..\components\net\lwip-2.0.2\src\api\api_lib.c + + api_msg.c 1 ..\..\components\net\lwip-2.0.2\src\api\api_msg.c + + err.c 1 ..\..\components\net\lwip-2.0.2\src\api\err.c + + netbuf.c 1 ..\..\components\net\lwip-2.0.2\src\api\netbuf.c + + netdb.c 1 ..\..\components\net\lwip-2.0.2\src\api\netdb.c + + netifapi.c 1 ..\..\components\net\lwip-2.0.2\src\api\netifapi.c + + sockets.c 1 ..\..\components\net\lwip-2.0.2\src\api\sockets.c + + tcpip.c 1 ..\..\components\net\lwip-2.0.2\src\api\tcpip.c + + def.c 1 ..\..\components\net\lwip-2.0.2\src\core\def.c + + dns.c 1 ..\..\components\net\lwip-2.0.2\src\core\dns.c + + inet_chksum.c 1 ..\..\components\net\lwip-2.0.2\src\core\inet_chksum.c + + init.c 1 ..\..\components\net\lwip-2.0.2\src\core\init.c + + ip.c 1 ..\..\components\net\lwip-2.0.2\src\core\ip.c + + memp.c 1 ..\..\components\net\lwip-2.0.2\src\core\memp.c + + netif.c 1 ..\..\components\net\lwip-2.0.2\src\core\netif.c + + pbuf.c 1 ..\..\components\net\lwip-2.0.2\src\core\pbuf.c + + raw.c 1 ..\..\components\net\lwip-2.0.2\src\core\raw.c + + stats.c 1 ..\..\components\net\lwip-2.0.2\src\core\stats.c + + sys.c 1 ..\..\components\net\lwip-2.0.2\src\core\sys.c + + tcp.c 1 ..\..\components\net\lwip-2.0.2\src\core\tcp.c + + tcp_in.c 1 ..\..\components\net\lwip-2.0.2\src\core\tcp_in.c + + tcp_out.c 1 ..\..\components\net\lwip-2.0.2\src\core\tcp_out.c + + timeouts.c 1 ..\..\components\net\lwip-2.0.2\src\core\timeouts.c + + udp.c 1 ..\..\components\net\lwip-2.0.2\src\core\udp.c + + ethernet.c 1 ..\..\components\net\lwip-2.0.2\src\netif\ethernet.c + + ethernetif.c 1 ..\..\components\net\lwip-2.0.2\src\netif\ethernetif.c + + lowpan6.c 1 ..\..\components\net\lwip-2.0.2\src\netif\lowpan6.c + + autoip.c 1 ..\..\components\net\lwip-2.0.2\src\core\ipv4\autoip.c + + dhcp.c 1 ..\..\components\net\lwip-2.0.2\src\core\ipv4\dhcp.c + + etharp.c 1 ..\..\components\net\lwip-2.0.2\src\core\ipv4\etharp.c + + icmp.c 1 ..\..\components\net\lwip-2.0.2\src\core\ipv4\icmp.c + + igmp.c 1 ..\..\components\net\lwip-2.0.2\src\core\ipv4\igmp.c + + ip4.c 1 ..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4.c + + ip4_addr.c 1 ..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_addr.c + + ip4_frag.c 1 @@ -1282,24 +1615,19 @@ - - ::CMSIS - - - + - + - + - + - diff --git a/bsp/imxrt1052-evk/rtconfig.h b/bsp/imxrt1052-evk/rtconfig.h index d62bc158c2..b04305f7b9 100644 --- a/bsp/imxrt1052-evk/rtconfig.h +++ b/bsp/imxrt1052-evk/rtconfig.h @@ -8,7 +8,9 @@ #define RT_NAME_MAX 8 #define RT_ALIGN_SIZE 4 +/* RT_THREAD_PRIORITY_8 is not set */ #define RT_THREAD_PRIORITY_32 +/* RT_THREAD_PRIORITY_256 is not set */ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG @@ -17,6 +19,7 @@ #define RT_DEBUG_THREAD 0 #define RT_USING_HOOK #define IDLE_THREAD_STACK_SIZE 256 +/* RT_USING_TIMER_SOFT is not set */ /* Inter-Thread communication */ @@ -25,19 +28,26 @@ #define RT_USING_EVENT #define RT_USING_MAILBOX #define RT_USING_MESSAGEQUEUE +/* RT_USING_SIGNALS is not set */ /* Memory Management */ +/* RT_USING_MEMPOOL is not set */ #define RT_USING_MEMHEAP +/* RT_USING_NOHEAP is not set */ +/* RT_USING_SMALL_MEM is not set */ +/* RT_USING_SLAB is not set */ #define RT_USING_MEMHEAP_AS_HEAP #define RT_USING_HEAP /* Kernel Device Object */ #define RT_USING_DEVICE +/* RT_USING_INTERRUPT_INFO is not set */ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart1" +/* RT_USING_MODULE is not set */ #define ARCH_ARM #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M7 @@ -50,6 +60,7 @@ /* C++ features */ +/* RT_USING_CPLUSPLUS is not set */ /* Command shell */ @@ -62,8 +73,10 @@ #define FINSH_THREAD_PRIORITY 20 #define FINSH_THREAD_STACK_SIZE 4096 #define FINSH_CMD_SIZE 80 +/* FINSH_USING_AUTH is not set */ #define FINSH_USING_MSH #define FINSH_USING_MSH_DEFAULT +/* FINSH_USING_MSH_ONLY is not set */ /* Device virtual file system */ @@ -78,36 +91,65 @@ #define RT_DFS_ELM_CODE_PAGE 437 #define RT_DFS_ELM_WORD_ACCESS +/* RT_DFS_ELM_USE_LFN_0 is not set */ +/* RT_DFS_ELM_USE_LFN_1 is not set */ +/* RT_DFS_ELM_USE_LFN_2 is not set */ #define RT_DFS_ELM_USE_LFN_3 #define RT_DFS_ELM_USE_LFN 3 #define RT_DFS_ELM_MAX_LFN 255 #define RT_DFS_ELM_DRIVES 2 #define RT_DFS_ELM_MAX_SECTOR_SIZE 512 +/* RT_DFS_ELM_USE_ERASE is not set */ #define RT_DFS_ELM_REENTRANT #define RT_USING_DFS_DEVFS +/* RT_USING_DFS_NET is not set */ +/* RT_USING_DFS_ROMFS is not set */ +/* RT_USING_DFS_RAMFS is not set */ +/* RT_USING_DFS_UFFS is not set */ +/* RT_USING_DFS_JFFS2 is not set */ +/* RT_USING_DFS_NFS is not set */ /* Device Drivers */ #define RT_USING_DEVICE_IPC #define RT_USING_SERIAL +/* RT_USING_CAN is not set */ +/* RT_USING_HWTIMER is not set */ +/* RT_USING_CPUTIME is not set */ #define RT_USING_I2C #define RT_USING_I2C_BITOPS +#define RT_USING_PIN +/* RT_USING_MTD_NOR is not set */ +/* RT_USING_MTD_NAND is not set */ +/* RT_USING_RTC is not set */ #define RT_USING_SDIO +/* RT_USING_SPI is not set */ +/* RT_USING_WDT is not set */ +/* RT_USING_WIFI is not set */ /* Using USB */ +/* RT_USING_USB_HOST is not set */ +/* RT_USING_USB_DEVICE is not set */ /* POSIX layer and C standard library */ #define RT_USING_LIBC +/* RT_USING_PTHREADS is not set */ +/* RT_USING_POSIX is not set */ +/* HAVE_SYS_SIGNALS is not set */ /* Network stack */ /* light weight TCP/IP stack */ #define RT_USING_LWIP +/* RT_USING_LWIP141 is not set */ #define RT_USING_LWIP202 +/* RT_USING_LWIP_IPV6 is not set */ +/* RT_LWIP_IGMP is not set */ #define RT_LWIP_ICMP +/* RT_LWIP_SNMP is not set */ #define RT_LWIP_DNS #define RT_LWIP_DHCP #define IP_SOF_BROADCAST 1 @@ -120,6 +162,8 @@ #define RT_LWIP_MSKADDR "255.255.255.0" #define RT_LWIP_UDP #define RT_LWIP_TCP +/* RT_LWIP_RAW is not set */ +/* RT_LWIP_PPP is not set */ #define RT_MEMP_NUM_NETCONN 8 #define RT_LWIP_PBUF_NUM 16 #define RT_LWIP_RAW_PCB_NUM 4 @@ -134,24 +178,33 @@ #define RT_LWIP_ETHTHREAD_PRIORITY 12 #define RT_LWIP_ETHTHREAD_STACKSIZE 1024 #define RT_LWIP_ETHTHREAD_MBOX_SIZE 8 +/* RT_LWIP_REASSEMBLY_FRAG is not set */ #define LWIP_NETIF_STATUS_CALLBACK 1 #define SO_REUSE 1 #define LWIP_SO_RCVTIMEO 1 #define LWIP_SO_SNDTIMEO 1 #define LWIP_SO_RCVBUF 1 +/* RT_LWIP_NETIF_LOOPBACK is not set */ #define LWIP_NETIF_LOOPBACK 0 /* Modbus master and slave stack */ +/* RT_USING_MODBUS is not set */ +/* LWIP_USING_DHCPD is not set */ /* VBUS(Virtual Software BUS) */ +/* RT_USING_VBUS is not set */ /* Utilities */ +/* RT_USING_LOGTRACE is not set */ +/* RT_USING_RYM is not set */ /* ARM CMSIS */ +/* RT_USING_CMSIS_OS is not set */ +/* RT_USING_RTT_CMSIS is not set */ /* RT-Thread online packages */ @@ -159,35 +212,70 @@ /* RT-Thread GUI Engine */ +/* PKG_USING_GUIENGINE is not set */ +/* PKG_USING_PERSIMMON is not set */ +/* PKG_USING_LWEXT4 is not set */ +/* PKG_USING_PARTITION is not set */ +/* PKG_USING_SQLITE is not set */ +/* PKG_USING_RTI is not set */ /* IoT - internet of things */ +/* PKG_USING_PAHOMQTT is not set */ +/* PKG_USING_WEBCLIENT is not set */ +/* PKG_USING_MONGOOSE is not set */ +/* PKG_USING_WEBTERMINAL is not set */ +/* PKG_USING_CJSON is not set */ +/* PKG_USING_LJSON is not set */ +/* PKG_USING_EZXML is not set */ +/* PKG_USING_NANOPB is not set */ +/* PKG_USING_GAGENT_CLOUD is not set */ /* Wi-Fi */ /* Marvell WiFi */ +/* PKG_USING_WLANMARVELL is not set */ /* Wiced WiFi */ +/* PKG_USING_WLAN_WICED is not set */ +/* PKG_USING_COAP is not set */ +/* PKG_USING_NOPOLL is not set */ +/* PKG_USING_NETUTILS is not set */ /* security packages */ +/* PKG_USING_MBEDTLS is not set */ +/* PKG_USING_libsodium is not set */ +/* PKG_USING_TINYCRYPT is not set */ /* language packages */ +/* PKG_USING_JERRYSCRIPT is not set */ +/* PKG_USING_MICROPYTHON is not set */ /* multimedia packages */ +/* PKG_USING_OPENMV is not set */ /* tools packages */ +/* PKG_USING_CMBACKTRACE is not set */ +/* PKG_USING_EASYLOGGER is not set */ +/* PKG_USING_SYSTEMVIEW is not set */ +/* PKG_USING_IPERF is not set */ /* miscellaneous packages */ +/* PKG_USING_FASTLZ is not set */ +/* PKG_USING_MINILZO is not set */ +/* PKG_USING_QUICKLZ is not set */ /* example package: hello */ +/* PKG_USING_HELLO is not set */ +/* PKG_USING_MULTIBUTTON is not set */ #define SOC_IMXRT1052 #define RT_USING_UART #define RT_USING_UART1 diff --git a/bsp/stm32f10x/.config b/bsp/stm32f10x/.config index c8e303cc90..360fa61320 100644 --- a/bsp/stm32f10x/.config +++ b/bsp/stm32f10x/.config @@ -58,7 +58,8 @@ CONFIG_ARCH_ARM_CORTEX_M3=y # # RT-Thread Components # -# CONFIG_RT_USING_COMPONENTS_INIT is not set +CONFIG_RT_USING_COMPONENTS_INIT=y +# CONFIG_RT_USING_USER_MAIN is not set # # C++ features @@ -261,12 +262,12 @@ CONFIG_RT_USING_RTT_CMSIS=y # CONFIG_PKG_USING_FASTLZ is not set # CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set # # example package: hello # # CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_MULTIBUTTON is not set CONFIG_SOC_STM32F1=y CONFIG_RT_USING_UART1=y CONFIG_RT_USING_UART2=y diff --git a/bsp/stm32f10x/drivers/SConscript b/bsp/stm32f10x/drivers/SConscript index c8609944d5..8e40f0c280 100644 --- a/bsp/stm32f10x/drivers/SConscript +++ b/bsp/stm32f10x/drivers/SConscript @@ -29,7 +29,7 @@ if GetDepend('RT_USING_DFS'): # add Ethernet drivers. if GetDepend('RT_USING_RTC'): - src += ['rtc.c'] + src += ['stm32f1_rtc.c'] # add Ethernet drivers. if GetDepend('PKG_USING_GUIENGINE'): diff --git a/bsp/stm32f10x/project.ewp b/bsp/stm32f10x/project.ewp index 7586b0ef49..809023b16e 100644 --- a/bsp/stm32f10x/project.ewp +++ b/bsp/stm32f10x/project.ewp @@ -165,6 +165,8 @@ USE_STDPERIPH_DRIVER STM32F10X_HD + RT_USING_DLIBC + _DLIB_FILE_DESCRIPTOR