Bernard Xiong
GitHub
commit
c042690e59
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@ -362,7 +362,7 @@ void GPIO5_Combined_0_15_IRQHandler(void)
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static IRQn_Type rt1052_get_irqnum(GPIO_Type *gpio, rt_uint32_t gpio_pin)
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{
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IRQn_Type irq_num = -100; /* Invalid interrupt number */
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IRQn_Type irq_num = NotAvail_IRQn; /* Invalid interrupt number */
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if(gpio == GPIO1)
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{
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@ -137,13 +137,15 @@ CONFIG_RT_PIPE_BUFSZ=512
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CONFIG_RT_USING_SERIAL=y
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# CONFIG_RT_USING_CAN is not set
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# CONFIG_RT_USING_HWTIMER is not set
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# CONFIG_RT_USING_CPUTIME is not set
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CONFIG_RT_USING_CPUTIME=y
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CONFIG_RT_USING_CPUTIME_CORTEXM=y
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CONFIG_RT_USING_I2C=y
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CONFIG_RT_USING_I2C_BITOPS=y
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CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_PWM is not set
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# CONFIG_RT_USING_MTD_NOR is not set
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# CONFIG_RT_USING_MTD_NAND is not set
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# CONFIG_RT_USING_MTD is not set
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CONFIG_RT_USING_RTC=y
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# CONFIG_RT_USING_SOFT_RTC is not set
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# CONFIG_RTC_SYNC_USING_NTP is not set
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@ -175,8 +177,11 @@ CONFIG_RT_USING_SPI=y
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# POSIX layer and C standard library
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#
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CONFIG_RT_USING_LIBC=y
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# CONFIG_RT_USING_PTHREADS is not set
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# CONFIG_RT_USING_POSIX is not set
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CONFIG_RT_USING_PTHREADS=y
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CONFIG_RT_USING_POSIX=y
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# CONFIG_RT_USING_POSIX_MMAP is not set
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# CONFIG_RT_USING_POSIX_TERMIOS is not set
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# CONFIG_RT_USING_POSIX_AIO is not set
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# CONFIG_RT_USING_MODULE is not set
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#
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@ -2,7 +2,6 @@ import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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@ -42,26 +41,9 @@ Export('RTT_ROOT')
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Export('rtconfig')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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objs = PrepareBuilding(env, RTT_ROOT)
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objs = objs + SConscript('../Libraries/imxrt1050/SConscript')
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# make a building
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DoBuilding(TARGET, objs)
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def Update_MDKFlashProgrammingAlgorithm(flash_dict):
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import xml.etree.ElementTree as etree
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from utils import xml_indent
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project_tree = etree.parse('project.uvoptx')
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root = project_tree.getroot()
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out = file('project.uvoptx', 'wb')
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for elem in project_tree.iterfind('.//Target/TargetOption/TargetDriverDllRegistry/SetRegEntry'):
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Key = elem.find('Key')
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if Key.text in flash_dict.keys():
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elem.find('Name').text = flash_dict[Key.text]
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xml_indent(root)
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out.write(etree.tostring(root, encoding='utf-8'))
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out.close()
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@ -0,0 +1,276 @@
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/*
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** ###################################################################
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** Processors: MIMXRT1052CVL5A
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** MIMXRT1052DVL6A
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**
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** Compiler: GNU C Compiler
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** Reference manual: IMXRT1050RM Rev.C, 08/2017
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** Version: rev. 0.1, 2017-01-10
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** Build: b170927
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**
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** Abstract:
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** Linker file for the GNU C Compiler
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**
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** Copyright 2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2017 NXP
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** Redistribution and use in source and binary forms, with or without modification,
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** are permitted provided that the following conditions are met:
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**
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** 1. Redistributions of source code must retain the above copyright notice, this list
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** of conditions and the following disclaimer.
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**
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** 2. Redistributions in binary form must reproduce the above copyright notice, this
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** list of conditions and the following disclaimer in the documentation and/or
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** other materials provided with the distribution.
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**
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** 3. Neither the name of the copyright holder nor the names of its
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** contributors may be used to endorse or promote products derived from this
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** software without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
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** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** ###################################################################
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
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STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
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/* Specify the memory areas */
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MEMORY
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{
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m_boot_data (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000
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m_image_vertor_table (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000
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m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400
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m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x1F7FDC00
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m_itcm (RW) : ORIGIN = 0x00000000, LENGTH = 0x00020000
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m_dtcm (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
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m_ocram (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000
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m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000
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m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000
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}
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/* Define output sections */
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SECTIONS
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{
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.boot_data :
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{
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KEEP(*(.boot_hdr.conf))
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} > m_boot_data
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.image_vertor_table :
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{
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KEEP(*(.boot_hdr.ivt))
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KEEP(*(.boot_hdr.boot_data))
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KEEP(*(.boot_hdr.dcd_data))
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} > m_image_vertor_table
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/* The startup code goes first into internal RAM */
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.interrupts :
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{
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__VECTOR_TABLE = .;
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} > m_interrupts
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__VECTOR_RAM = __VECTOR_TABLE;
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__RAM_VECTOR_TABLE_SIZE_BYTES = 0x0;
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/* The program code and other data goes into internal RAM */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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/* section information for finsh shell */
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. = ALIGN(4);
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__fsymtab_start = .;
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KEEP(*(FSymTab))
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__fsymtab_end = .;
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. = ALIGN(4);
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__vsymtab_start = .;
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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. = ALIGN(4);
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/* section information for initial. */
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. = ALIGN(4);
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__rt_init_start = .;
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KEEP(*(SORT(.rti_fn*)))
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__rt_init_end = .;
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} > m_text
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > m_text
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.ARM :
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{
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} > m_text
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.ctors :
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{
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PROVIDE(__ctors_start__ = .);
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/* __CTOR_LIST__ = .; */
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/* gcc uses crtbegin.o to find the start of
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the constructors, so we make sure it is
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first. Because this is a wildcard, it
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doesn't matter if the user does not
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actually link against crtbegin.o; the
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linker won't look for a file to match a
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wildcard. The wildcard also means that it
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doesn't matter which directory crtbegin.o
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is in. */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*crtbegin?.o(.ctors))
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/* We don't want to include the .ctor section from
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from the crtend.o file until after the sorted ctors.
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The .ctor section from the crtend file contains the
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end of ctors marker and it must be last */
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KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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/* __CTOR_END__ = .; */
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PROVIDE(__ctors_end__ = .);
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} > m_text
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.dtors :
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{
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PROVIDE(__dtors_start__ = .);
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/* __DTOR_LIST__ = .; */
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KEEP (*crtbegin.o(.dtors))
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KEEP (*crtbegin?.o(.dtors))
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KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* __DTOR_END__ = .; */
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PROVIDE(__dtors_end__ = .);
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} > m_text
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} > m_text
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} > m_text
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} > m_text
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__etext = .; /* define a global symbol at end of code */
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__DATA_ROM = .; /* Symbol is used by startup for data initialization */
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.data : AT(__DATA_ROM)
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{
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. = ALIGN(4);
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__DATA_RAM = .;
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__data_start__ = .; /* create a global symbol at data start */
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*(m_usb_dma_init_data)
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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KEEP(*(.jcr*))
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. = ALIGN(4);
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__data_end__ = .; /* define a global symbol at data end */
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} > m_dtcm
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__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
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.ncache.init : AT(__NDATA_ROM)
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{
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__noncachedata_start__ = .; /* create a global symbol at ncache data start */
|
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*(NonCacheable.init)
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. = ALIGN(4);
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__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
|
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} > m_nocache
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. = __noncachedata_init_end__;
|
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.ncache :
|
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{
|
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*(NonCacheable)
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. = ALIGN(4);
|
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__noncachedata_end__ = .; /* define a global symbol at ncache data end */
|
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} > m_nocache
|
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__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
|
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text_end = ORIGIN(m_text) + LENGTH(m_text);
|
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ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
|
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|
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/* Uninitialized data section */
|
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.bss :
|
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{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
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. = ALIGN(4);
|
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__START_BSS = .;
|
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__bss_start__ = .;
|
||||
*(m_usb_dma_noninit_data)
|
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*(.bss)
|
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*(.bss*)
|
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
|
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__END_BSS = .;
|
||||
} > m_dtcm
|
||||
|
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.stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
stack_start = .;
|
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. += STACK_SIZE;
|
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stack_end = .;
|
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__StackTop = .;
|
||||
} > m_dtcm
|
||||
|
||||
.RTT_HEAP :
|
||||
{
|
||||
heap_start = .;
|
||||
. = ALIGN(8);
|
||||
} > m_dtcm
|
||||
|
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PROVIDE(heap_end = ORIGIN(m_dtcm) + LENGTH(m_dtcm));
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,125 @@
|
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#! armcc -E
|
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/*
|
||||
** ###################################################################
|
||||
** Processors: MIMXRT1052CVL5A
|
||||
** MIMXRT1052DVL6A
|
||||
**
|
||||
** Compiler: Keil ARM C/C++ Compiler
|
||||
** Reference manual: IMXRT1050RM Rev.C, 08/2017
|
||||
** Version: rev. 0.1, 2017-01-10
|
||||
** Build: b170927
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the Keil ARM C/C++ Compiler
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2017 NXP
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
**
|
||||
** 1. Redistributions of source code must retain the above copyright notice, this list
|
||||
** of conditions and the following disclaimer.
|
||||
**
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice, this
|
||||
** list of conditions and the following disclaimer in the documentation and/or
|
||||
** other materials provided with the distribution.
|
||||
**
|
||||
** 3. Neither the name of the copyright holder nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from this
|
||||
** software without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
#define m_flash_config_start 0x60000000
|
||||
#define m_flash_config_size 0x00001000
|
||||
|
||||
#define m_ivt_start 0x60001000
|
||||
#define m_ivt_size 0x00001000
|
||||
|
||||
#define m_text_start 0x60002000
|
||||
#define m_text_size 0x1F7FE000
|
||||
|
||||
#define m_data_start 0x20000000
|
||||
#define m_data_size 0x00020000
|
||||
|
||||
#define m_ncache_start 0x81E00000
|
||||
#define m_ncache_size 0x00200000
|
||||
|
||||
/* Sizes */
|
||||
#if (defined(__stack_size__))
|
||||
#define Stack_Size __stack_size__
|
||||
#else
|
||||
#define Stack_Size 0x1000
|
||||
#endif
|
||||
|
||||
#if (defined(__heap_size__))
|
||||
#define Heap_Size __heap_size__
|
||||
#else
|
||||
#define Heap_Size 0x0400
|
||||
#endif
|
||||
|
||||
#include "rtconfig.h"
|
||||
|
||||
#if (defined(BOARD_USING_HYPERFLASH))
|
||||
LR_m_rom_config m_flash_config_start m_flash_config_size ; load region size_region
|
||||
{
|
||||
RW_m_config_text m_flash_config_start m_flash_config_size ; load address = execution address
|
||||
{
|
||||
* (.boot_hdr.conf, +FIRST)
|
||||
}
|
||||
}
|
||||
|
||||
LR_m_rom_ivt m_ivt_start m_ivt_size ; load region size_region
|
||||
{
|
||||
RW_m_ivt_text m_ivt_start m_ivt_size ; load address = execution address
|
||||
{
|
||||
* (.boot_hdr.ivt, +FIRST)
|
||||
* (.boot_hdr.boot_data)
|
||||
* (.boot_hdr.dcd_data)
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#define RTT_HEAP_SIZE (m_data_size-ImageLength(RW_m_data)-ImageLength(ARM_LIB_HEAP)-ImageLength(ARM_LIB_STACK))
|
||||
|
||||
; load region size_region
|
||||
LR_IROM1 m_text_start m_text_size
|
||||
{
|
||||
ER_IROM1 m_text_start m_text_size ; load address = execution address
|
||||
{
|
||||
* (RESET,+FIRST)
|
||||
* (InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size ; RW data
|
||||
{
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP +0 EMPTY Heap_Size{} ; Heap region growing up
|
||||
ARM_LIB_STACK +0 EMPTY Stack_Size{} ; Stack region growing down
|
||||
RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
|
||||
|
||||
; ncache RW data
|
||||
RW_m_ncache m_ncache_start m_ncache_size
|
||||
{
|
||||
* (NonCacheable.init)
|
||||
* (NonCacheable)
|
||||
}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -93,6 +93,8 @@
|
|||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_CPUTIME
|
||||
#define RT_USING_CPUTIME_CORTEXM
|
||||
#define RT_USING_I2C
|
||||
#define RT_USING_I2C_BITOPS
|
||||
#define RT_USING_PIN
|
||||
|
|
@ -111,6 +113,8 @@
|
|||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
#define RT_USING_PTHREADS
|
||||
#define RT_USING_POSIX
|
||||
|
||||
/* Network */
|
||||
|
||||
|
|
|
|||
|
|
@ -42,8 +42,8 @@ if PLATFORM == 'gcc':
|
|||
|
||||
DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -std=c99 -Wall -D__FPU_PRESENT -eentry'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-imxrt-gcc.map,-cref,-u,Reset_Handler -T ./Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb -D__START=entry'
|
||||
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-imxrt-gcc.map,-cref,-u,Reset_Handler -T flexspi_nor.ld'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
|
@ -135,7 +135,7 @@ elif PLATFORM == 'iar':
|
|||
AFLAGS += ' --cpu Cortex-M7'
|
||||
AFLAGS += ' --fpu None'
|
||||
|
||||
LFLAGS = ' --config ./Libraries/iar/MIMXRT1052xxxxx_flexspi_nor.icf'
|
||||
LFLAGS = ' --config flexspi_nor.icf'
|
||||
LFLAGS += ' --redirect _Printf=_PrintfTiny'
|
||||
LFLAGS += ' --redirect _Scanf=_ScanfSmall'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
|
|
|||
|
|
@ -73,7 +73,7 @@
|
|||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
|
|
@ -101,9 +101,7 @@
|
|||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>3</nTsel>
|
||||
<nTsel>2</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
|
|
@ -113,7 +111,7 @@
|
|||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile>.\Libraries\arm\evkmimxrt1050_flexspi_nor.ini</tIfile>
|
||||
<tIfile>.\flexspi_nor.ini</tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
|
|
@ -172,10 +170,6 @@
|
|||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
|
|
|
|||
|
|
@ -11,7 +11,6 @@
|
|||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>MIMXRT1052:M7</Device>
|
||||
|
|
@ -367,7 +366,7 @@
|
|||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x10000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\Libraries\arm\MIMXRT1052xxxxx_flexspi_nor.scf</ScatterFile>
|
||||
<ScatterFile>.\flexspi_nor.scf</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
|
|
|
|||
Loading…
Reference in New Issue