Merge pull request #1832 from RT-Thread/bsp_imxrt1050

Bsp imxrt1050

bsp/imxrt/Libraries/imxrt1050/drivers/drv_pin.c

@@ -362,7 +362,7 @@ void GPIO5_Combined_0_15_IRQHandler(void)
 
 static IRQn_Type rt1052_get_irqnum(GPIO_Type *gpio, rt_uint32_t gpio_pin)
 {
-    IRQn_Type irq_num = -100;  /* Invalid interrupt number */
+    IRQn_Type irq_num = NotAvail_IRQn;  /* Invalid interrupt number */
     
     if(gpio == GPIO1)
     {

bsp/imxrt/imxrt1050-evk/.config

@@ -137,13 +137,15 @@ CONFIG_RT_PIPE_BUFSZ=512
 CONFIG_RT_USING_SERIAL=y
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_HWTIMER is not set
-# CONFIG_RT_USING_CPUTIME is not set
+CONFIG_RT_USING_CPUTIME=y
+CONFIG_RT_USING_CPUTIME_CORTEXM=y
 CONFIG_RT_USING_I2C=y
 CONFIG_RT_USING_I2C_BITOPS=y
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_PWM is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_MTD is not set
 CONFIG_RT_USING_RTC=y
 # CONFIG_RT_USING_SOFT_RTC is not set
 # CONFIG_RTC_SYNC_USING_NTP is not set
@@ -175,8 +177,11 @@ CONFIG_RT_USING_SPI=y
 # POSIX layer and C standard library
 #
 CONFIG_RT_USING_LIBC=y
-# CONFIG_RT_USING_PTHREADS is not set
+CONFIG_RT_USING_PTHREADS=y
-# CONFIG_RT_USING_POSIX is not set
+CONFIG_RT_USING_POSIX=y
+# CONFIG_RT_USING_POSIX_MMAP is not set
+# CONFIG_RT_USING_POSIX_TERMIOS is not set
+# CONFIG_RT_USING_POSIX_AIO is not set
 # CONFIG_RT_USING_MODULE is not set
 
 #

bsp/imxrt/imxrt1050-evk/SConstruct

@@ -2,7 +2,6 @@ import os
 import sys
 import rtconfig
 
-
 if os.getenv('RTT_ROOT'):
     RTT_ROOT = os.getenv('RTT_ROOT')
 else:
@@ -42,26 +41,9 @@ Export('RTT_ROOT')
 Export('rtconfig')
 
 # prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+objs = PrepareBuilding(env, RTT_ROOT)
 
 objs = objs + SConscript('../Libraries/imxrt1050/SConscript')
 
 # make a building
 DoBuilding(TARGET, objs)
-
-def Update_MDKFlashProgrammingAlgorithm(flash_dict):
-    import xml.etree.ElementTree as etree
-    from utils import xml_indent
-
-    project_tree = etree.parse('project.uvoptx')
-    root = project_tree.getroot()
-    out = file('project.uvoptx', 'wb')
-
-    for elem in project_tree.iterfind('.//Target/TargetOption/TargetDriverDllRegistry/SetRegEntry'):
-        Key = elem.find('Key')
-        if Key.text in flash_dict.keys():
-            elem.find('Name').text = flash_dict[Key.text]
-
-    xml_indent(root)
-    out.write(etree.tostring(root, encoding='utf-8'))
-    out.close()

bsp/imxrt/imxrt1050-evk/flexspi_nor.ld

@@ -0,0 +1,276 @@
+/*
+** ###################################################################
+**     Processors:          MIMXRT1052CVL5A
+**                          MIMXRT1052DVL6A
+**
+**     Compiler:            GNU C Compiler
+**     Reference manual:    IMXRT1050RM Rev.C, 08/2017
+**     Version:             rev. 0.1, 2017-01-10
+**     Build:               b170927
+**
+**     Abstract:
+**         Linker file for the GNU C Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2017 NXP
+**     Redistribution and use in source and binary forms, with or without modification,
+**     are permitted provided that the following conditions are met:
+**
+**     1. Redistributions of source code must retain the above copyright notice, this list
+**       of conditions and the following disclaimer.
+**
+**     2. Redistributions in binary form must reproduce the above copyright notice, this
+**       list of conditions and the following disclaimer in the documentation and/or
+**       other materials provided with the distribution.
+**
+**     3. Neither the name of the copyright holder nor the names of its
+**       contributors may be used to endorse or promote products derived from this
+**       software without specific prior written permission.
+**
+**     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+**     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+**     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+**     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+**     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+**     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+**     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+**     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
+
+/* Specify the memory areas */
+MEMORY
+{
+  m_boot_data           (RX)  : ORIGIN = 0x60000000, LENGTH = 0x00001000
+  m_image_vertor_table  (RX)  : ORIGIN = 0x60001000, LENGTH = 0x00001000
+
+  m_interrupts          (RX)  : ORIGIN = 0x60002000, LENGTH = 0x00000400
+  m_text                (RX)  : ORIGIN = 0x60002400, LENGTH = 0x1F7FDC00
+
+  m_itcm                (RW)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
+  m_dtcm                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00020000
+  m_ocram               (RW)  : ORIGIN = 0x20200000, LENGTH = 0x00040000
+
+  m_sdram               (RW)  : ORIGIN = 0x80000000, LENGTH = 0x01E00000
+  m_nocache             (RW)  : ORIGIN = 0x81E00000, LENGTH = 0x00200000
+}
+
+/* Define output sections */
+SECTIONS
+{
+  .boot_data :
+  {
+    KEEP(*(.boot_hdr.conf))
+  } > m_boot_data
+
+  .image_vertor_table :
+  {
+    KEEP(*(.boot_hdr.ivt))
+    KEEP(*(.boot_hdr.boot_data))
+    KEEP(*(.boot_hdr.dcd_data))
+  } > m_image_vertor_table
+
+  /* The startup code goes first into internal RAM */
+  .interrupts :
+  {
+    __VECTOR_TABLE = .;
+    . = ALIGN(4);
+    KEEP(*(.isr_vector))     /* Startup code */
+    . = ALIGN(4);
+  } > m_interrupts
+
+  __VECTOR_RAM = __VECTOR_TABLE;
+  __RAM_VECTOR_TABLE_SIZE_BYTES = 0x0;
+
+  /* The program code and other data goes into internal RAM */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)                 /* .text sections (code) */
+    *(.text*)                /* .text* sections (code) */
+    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
+    *(.glue_7)               /* glue arm to thumb code */
+    *(.glue_7t)              /* glue thumb to arm code */
+    *(.eh_frame)
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(4);
+
+    /* section information for finsh shell */
+    . = ALIGN(4);
+    __fsymtab_start = .;
+    KEEP(*(FSymTab))
+    __fsymtab_end = .;
+    . = ALIGN(4);
+    __vsymtab_start = .;
+    KEEP(*(VSymTab))
+    __vsymtab_end = .;
+    . = ALIGN(4);
+
+    /* section information for initial. */
+    . = ALIGN(4);
+    __rt_init_start = .;
+    KEEP(*(SORT(.rti_fn*)))
+    __rt_init_end = .;
+  } > m_text
+
+  .ARM.extab :
+  {
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+  } > m_text
+
+  .ARM :
+  {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } > m_text
+
+ .ctors :
+  {
+    PROVIDE(__ctors_start__ = .);
+    /* __CTOR_LIST__ = .; */
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       from the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    /* __CTOR_END__ = .; */
+    PROVIDE(__ctors_end__ = .);
+  } > m_text
+
+  .dtors :
+  {
+    PROVIDE(__dtors_start__ = .);
+    /* __DTOR_LIST__ = .; */
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /* __DTOR_END__ = .; */
+    PROVIDE(__dtors_end__ = .);
+  } > m_text
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } > m_text
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } > m_text
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } > m_text
+
+  __etext = .;    /* define a global symbol at end of code */
+  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
+
+  .data : AT(__DATA_ROM)
+  {
+    . = ALIGN(4);
+    __DATA_RAM = .;
+    __data_start__ = .;      /* create a global symbol at data start */
+    *(m_usb_dma_init_data)
+    *(.data)                 /* .data sections */
+    *(.data*)                /* .data* sections */
+    KEEP(*(.jcr*))
+    . = ALIGN(4);
+    __data_end__ = .;        /* define a global symbol at data end */
+  } > m_dtcm
+
+  __NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
+  .ncache.init : AT(__NDATA_ROM)
+  {
+    __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
+    *(NonCacheable.init)
+    . = ALIGN(4);
+    __noncachedata_init_end__ = .;   /* create a global symbol at initialized ncache data end */
+  } > m_nocache
+  . = __noncachedata_init_end__;
+  .ncache :
+  {
+    *(NonCacheable)
+    . = ALIGN(4);
+    __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
+  } > m_nocache
+
+  __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
+  text_end = ORIGIN(m_text) + LENGTH(m_text);
+  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
+
+  /* Uninitialized data section */
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    . = ALIGN(4);
+    __START_BSS = .;
+    __bss_start__ = .;
+    *(m_usb_dma_noninit_data)
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(4);
+    __bss_end__ = .;
+    __END_BSS = .;
+  } > m_dtcm
+
+  .stack :
+  {
+    . = ALIGN(8);
+    stack_start = .;
+    . += STACK_SIZE;
+    stack_end = .;
+    __StackTop = .;
+  } > m_dtcm
+  
+  .RTT_HEAP :
+  {
+    heap_start = .;
+    . = ALIGN(8);
+  } > m_dtcm
+
+  PROVIDE(heap_end = ORIGIN(m_dtcm) + LENGTH(m_dtcm));
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+
+}
+

bsp/imxrt/imxrt1050-evk/flexspi_nor.scf

@@ -0,0 +1,125 @@
+#! armcc -E
+/*
+** ###################################################################
+**     Processors:          MIMXRT1052CVL5A
+**                          MIMXRT1052DVL6A
+**
+**     Compiler:            Keil ARM C/C++ Compiler
+**     Reference manual:    IMXRT1050RM Rev.C, 08/2017
+**     Version:             rev. 0.1, 2017-01-10
+**     Build:               b170927
+**
+**     Abstract:
+**         Linker file for the Keil ARM C/C++ Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2017 NXP
+**     Redistribution and use in source and binary forms, with or without modification,
+**     are permitted provided that the following conditions are met:
+**
+**     1. Redistributions of source code must retain the above copyright notice, this list
+**       of conditions and the following disclaimer.
+**
+**     2. Redistributions in binary form must reproduce the above copyright notice, this
+**       list of conditions and the following disclaimer in the documentation and/or
+**       other materials provided with the distribution.
+**
+**     3. Neither the name of the copyright holder nor the names of its
+**       contributors may be used to endorse or promote products derived from this
+**       software without specific prior written permission.
+**
+**     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+**     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+**     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+**     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+**     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+**     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+**     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+**     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+#define m_flash_config_start           0x60000000
+#define m_flash_config_size            0x00001000
+
+#define m_ivt_start                    0x60001000
+#define m_ivt_size                     0x00001000
+
+#define m_text_start                   0x60002000
+#define m_text_size                    0x1F7FE000
+
+#define m_data_start                   0x20000000
+#define m_data_size                    0x00020000
+
+#define m_ncache_start                 0x81E00000
+#define m_ncache_size                  0x00200000
+
+/* Sizes */
+#if (defined(__stack_size__))
+  #define Stack_Size                   __stack_size__
+#else
+  #define Stack_Size                   0x1000
+#endif
+
+#if (defined(__heap_size__))
+  #define Heap_Size                    __heap_size__
+#else
+  #define Heap_Size                    0x0400
+#endif
+
+#include "rtconfig.h"
+
+#if (defined(BOARD_USING_HYPERFLASH))
+LR_m_rom_config m_flash_config_start m_flash_config_size      ; load region size_region
+{   
+    RW_m_config_text m_flash_config_start m_flash_config_size ; load address = execution address
+    { 
+        * (.boot_hdr.conf, +FIRST)
+    }  
+}
+
+LR_m_rom_ivt m_ivt_start m_ivt_size ; load region size_region
+{   
+    RW_m_ivt_text m_ivt_start m_ivt_size ; load address = execution address
+    { 
+        * (.boot_hdr.ivt, +FIRST)
+        * (.boot_hdr.boot_data)
+        * (.boot_hdr.dcd_data)
+    }   
+}
+#endif
+
+#define RTT_HEAP_SIZE (m_data_size-ImageLength(RW_m_data)-ImageLength(ARM_LIB_HEAP)-ImageLength(ARM_LIB_STACK))
+
+; load region size_region
+LR_IROM1 m_text_start m_text_size 
+{   
+    ER_IROM1 m_text_start m_text_size ; load address = execution address
+    { 
+        * (RESET,+FIRST)
+        * (InRoot$$Sections)
+        .ANY (+RO)
+    }
+  
+    RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size ; RW data
+    { 
+        .ANY (+RW +ZI)
+    }
+    
+    ARM_LIB_HEAP +0 EMPTY Heap_Size{}   ; Heap region growing up
+    ARM_LIB_STACK +0 EMPTY Stack_Size{} ; Stack region growing down
+    RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
+
+    ; ncache RW data
+    RW_m_ncache m_ncache_start m_ncache_size 
+    { 
+        * (NonCacheable.init)
+        * (NonCacheable)
+    }
+}

bsp/imxrt/imxrt1050-evk/rtconfig.h

@@ -93,6 +93,8 @@
 #define RT_USING_DEVICE_IPC
 #define RT_PIPE_BUFSZ 512
 #define RT_USING_SERIAL
+#define RT_USING_CPUTIME
+#define RT_USING_CPUTIME_CORTEXM
 #define RT_USING_I2C
 #define RT_USING_I2C_BITOPS
 #define RT_USING_PIN
@@ -111,6 +113,8 @@
 /* POSIX layer and C standard library */
 
 #define RT_USING_LIBC
+#define RT_USING_PTHREADS
+#define RT_USING_POSIX
 
 /* Network */
 

bsp/imxrt/imxrt1050-evk/rtconfig.py

@@ -42,8 +42,8 @@ if PLATFORM == 'gcc':
 
     DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
     CFLAGS = DEVICE + ' -std=c99 -Wall -D__FPU_PRESENT -eentry'
-    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb -D__START=entry'
-    LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-imxrt-gcc.map,-cref,-u,Reset_Handler -T ./Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld'
+    LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-imxrt-gcc.map,-cref,-u,Reset_Handler -T flexspi_nor.ld'
 
     CPATH = ''
     LPATH = ''
@@ -135,7 +135,7 @@ elif PLATFORM == 'iar':
     AFLAGS += ' --cpu Cortex-M7'
     AFLAGS += ' --fpu None'
 
-    LFLAGS = ' --config ./Libraries/iar/MIMXRT1052xxxxx_flexspi_nor.icf'
+    LFLAGS = ' --config flexspi_nor.icf'
     LFLAGS += ' --redirect _Printf=_PrintfTiny'
     LFLAGS += ' --redirect _Scanf=_ScanfSmall'
     LFLAGS += ' --entry __iar_program_start'

bsp/imxrt/imxrt1050-evk/template.uvoptx

@@ -73,7 +73,7 @@
         <LExpSel>0</LExpSel>
       </OPTXL>
       <OPTFL>
-        <tvExp>0</tvExp>
+        <tvExp>1</tvExp>
         <tvExpOptDlg>0</tvExpOptDlg>
         <IsCurrentTarget>1</IsCurrentTarget>
       </OPTFL>
@@ -101,9 +101,7 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <bSchkAxf>0</bSchkAxf>
+        <nTsel>2</nTsel>
-        <bTchkAxf>0</bTchkAxf>
-        <nTsel>3</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -113,7 +111,7 @@
         <tDllPa></tDllPa>
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
-        <tIfile>.\Libraries\arm\evkmimxrt1050_flexspi_nor.ini</tIfile>
+        <tIfile>.\flexspi_nor.ini</tIfile>
         <pMon>BIN\CMSIS_AGDI.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
@@ -172,10 +170,6 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
-      <pMisraNamep></pMisraNamep>
-      <pszMrulep></pszMrulep>
-      <pSingCmdsp></pSingCmdsp>
-      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 

bsp/imxrt/imxrt1050-evk/template.uvprojx

@@ -11,7 +11,6 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>MIMXRT1052:M7</Device>
@@ -367,7 +366,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x10000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile>.\Libraries\arm\MIMXRT1052xxxxx_flexspi_nor.scf</ScatterFile>
+            <ScatterFile>.\flexspi_nor.scf</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>