Merge pull request #2 from nongxiaoming/stm32f429-disco
[bsp] stm32:fix the lcd driver for stm32f429 discovery board.
This commit is contained in:
Bernard Xiong
GitHub
commit
bea966ee9d
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@ -144,7 +144,7 @@ CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_PM is not set
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# CONFIG_RT_USING_PM is not set
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# CONFIG_RT_USING_RTC is not set
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# CONFIG_RT_USING_RTC is not set
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# CONFIG_RT_USING_SDIO is not set
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# CONFIG_RT_USING_SDIO is not set
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# CONFIG_RT_USING_SPI is not set
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CONFIG_RT_USING_SPI=y
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# CONFIG_RT_USING_WDT is not set
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# CONFIG_RT_USING_WDT is not set
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# CONFIG_RT_USING_AUDIO is not set
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# CONFIG_RT_USING_AUDIO is not set
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# CONFIG_RT_USING_SENSOR is not set
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# CONFIG_RT_USING_SENSOR is not set
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@ -68,7 +68,7 @@ menu "On-chip Peripheral Drivers"
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menuconfig BSP_USING_SPI
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menuconfig BSP_USING_SPI
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bool "Enable SPI BUS"
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bool "Enable SPI BUS"
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select RT_USING_SPI
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select RT_USING_SPI
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default n
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default y
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if BSP_USING_SPI
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if BSP_USING_SPI
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config BSP_USING_SPI3
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config BSP_USING_SPI3
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bool "Enable SPI3 BUS"
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bool "Enable SPI3 BUS"
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@ -27,6 +27,9 @@ if GetDepend(['BSP_USING_SDCARD']):
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if GetDepend(['BSP_USING_QSPI']):
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if GetDepend(['BSP_USING_QSPI']):
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src += ['ports/drv_qspi_flash.c']
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src += ['ports/drv_qspi_flash.c']
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if GetDepend(['BSP_USING_LCD']):
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src += ['ports/ili9341.c']
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path = [cwd]
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path = [cwd]
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path += [cwd + '/CubeMX_Config/Inc']
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path += [cwd + '/CubeMX_Config/Inc']
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path += [cwd + '/ports']
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path += [cwd + '/ports']
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@ -48,12 +48,15 @@ void SystemClock_Config(void)
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{
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{
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Error_Handler();
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Error_Handler();
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}
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}
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/*##-2- LTDC Clock Configuration ###########################################*/
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/* LCD clock configuration */
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/* PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 MHz */
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/* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 192 MHz */
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/* PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 192/4 = 48 MHz */
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/* LTDC clock frequency = PLLLCDCLK / RCC_PLLSAIDIVR_8 = 48/8 = 6 MHz */
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
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PeriphClkInitStruct.PLLSAI.PLLSAIN = 50;
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PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
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PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
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PeriphClkInitStruct.PLLSAI.PLLSAIR = 4;
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PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
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PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_8;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
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{
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Error_Handler();
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}
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}
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}
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@ -0,0 +1,313 @@
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/*
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* File : ili9341.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2020, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2020-08-11 RT-Thread the first version
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*/
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#include "rtthread.h"
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#include "stm32f4xx_hal.h"
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#include "ili9341.h"
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/**
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* @brief LCD Control pin
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*/
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#define LCD_NCS_PIN GPIO_PIN_2
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#define LCD_NCS_GPIO_PORT GPIOC
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#define LCD_NCS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
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#define LCD_NCS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
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/**
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* @brief LCD Command/data pin
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*/
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#define LCD_WRX_PIN GPIO_PIN_13
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#define LCD_WRX_GPIO_PORT GPIOD
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#define LCD_WRX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
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#define LCD_WRX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
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#define LCD_RDX_PIN GPIO_PIN_12
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#define LCD_RDX_GPIO_PORT GPIOD
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#define LCD_RDX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
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#define LCD_RDX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
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/* Maximum Timeout values for flags waiting loops */
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#define SPIx_TIMEOUT_MAX ((uint32_t)0x1000)
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/* Chip Select macro definition */
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#define LCD_CS_LOW() HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_RESET)
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#define LCD_CS_HIGH() HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_SET)
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/* Set WRX High to send data */
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#define LCD_WRX_LOW() HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_RESET)
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#define LCD_WRX_HIGH() HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_SET)
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/* Set WRX High to send data */
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#define LCD_RDX_LOW() HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_RESET)
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#define LCD_RDX_HIGH() HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_SET)
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static uint8_t Is_LCD_IO_Initialized = 0;
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static SPI_HandleTypeDef SpiHandle;
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/**
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* @brief SPIx Bus initialization
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*/
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static void SPIx_Init(void)
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{
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if(HAL_SPI_GetState(&SpiHandle) == HAL_SPI_STATE_RESET)
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{
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/* SPI configuration -----------------------------------------------------*/
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SpiHandle.Instance = SPI5;
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/* SPI baudrate is set to 5.6 MHz (PCLK2/SPI_BaudRatePrescaler = 90/16 = 5.625 MHz)
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*/
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SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
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/* On STM32F429I-Discovery, LCD ID cannot be read then keep a common configuration */
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/* for LCD and GYRO (SPI_DIRECTION_2LINES) */
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/* Note: To read a register a LCD, SPI_DIRECTION_1LINE should be set */
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SpiHandle.Init.Direction = SPI_DIRECTION_2LINES;
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SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE;
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SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW;
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SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
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SpiHandle.Init.CRCPolynomial = 7;
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SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT;
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SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB;
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SpiHandle.Init.NSS = SPI_NSS_SOFT;
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SpiHandle.Init.TIMode = SPI_TIMODE_DISABLED;
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SpiHandle.Init.Mode = SPI_MODE_MASTER;
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HAL_SPI_Init(&SpiHandle);
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}
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}
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/**
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* @brief Configures the LCD_SPI interface.
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*/
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static void LCD_GPIO_Init(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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if(Is_LCD_IO_Initialized == 0)
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{
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Is_LCD_IO_Initialized = 1;
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/* Configure NCS in Output Push-Pull mode */
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LCD_WRX_GPIO_CLK_ENABLE();
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GPIO_InitStructure.Pin = LCD_WRX_PIN;
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GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
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HAL_GPIO_Init(LCD_WRX_GPIO_PORT, &GPIO_InitStructure);
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LCD_RDX_GPIO_CLK_ENABLE();
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GPIO_InitStructure.Pin = LCD_RDX_PIN;
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GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
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HAL_GPIO_Init(LCD_RDX_GPIO_PORT, &GPIO_InitStructure);
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/* Configure the LCD Control pins ----------------------------------------*/
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LCD_NCS_GPIO_CLK_ENABLE();
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/* Configure NCS in Output Push-Pull mode */
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GPIO_InitStructure.Pin = LCD_NCS_PIN;
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GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
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HAL_GPIO_Init(LCD_NCS_GPIO_PORT, &GPIO_InitStructure);
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/* Set or Reset the control line */
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LCD_CS_LOW();
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LCD_CS_HIGH();
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SPIx_Init();
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}
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}
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/**
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* @brief Writes data to the selected LCD register.
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* @param data: data to lcd.
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* @retval None
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*/
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static void ili9341_write_data(uint16_t data)
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{
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/* Set WRX to send data */
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LCD_WRX_HIGH();
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/* Reset LCD control line(/CS) and Send data */
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LCD_CS_LOW();
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HAL_SPI_Transmit(&SpiHandle, (uint8_t*) &data, 1, SPIx_TIMEOUT_MAX);
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/* Deselect: Chip Select high */
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LCD_CS_HIGH();
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}
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/**
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* @brief Writes to the selected LCD register.
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* @param reg: address of the selected register.
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* @retval None
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*/
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static void ili9341_write_register(uint8_t reg)
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{
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/* Reset WRX to send command */
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LCD_WRX_LOW();
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/* Reset LCD control line(/CS) and Send command */
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LCD_CS_LOW();
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HAL_SPI_Transmit(&SpiHandle, (uint8_t*) ®, 1, SPIx_TIMEOUT_MAX);
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/* Deselect: Chip Select high */
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LCD_CS_HIGH();
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}
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/**
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* @brief Power on the LCD.
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* @param None
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* @retval int
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*/
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int ili9341_hw_init(void)
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{
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/* Initialize ILI9341 low level bus layer ----------------------------------*/
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LCD_GPIO_Init();
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/* Configure LCD */
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ili9341_write_register(0xCA);
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ili9341_write_data(0xC3);
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ili9341_write_data(0x08);
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ili9341_write_data(0x50);
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ili9341_write_register(LCD_POWERB);
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ili9341_write_data(0x00);
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ili9341_write_data(0xC1);
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ili9341_write_data(0x30);
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ili9341_write_register(LCD_POWER_SEQ);
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ili9341_write_data(0x64);
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ili9341_write_data(0x03);
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ili9341_write_data(0x12);
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ili9341_write_data(0x81);
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ili9341_write_register(LCD_DTCA);
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ili9341_write_data(0x85);
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ili9341_write_data(0x00);
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ili9341_write_data(0x78);
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ili9341_write_register(LCD_POWERA);
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ili9341_write_data(0x39);
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ili9341_write_data(0x2C);
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ili9341_write_data(0x00);
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ili9341_write_data(0x34);
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ili9341_write_data(0x02);
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ili9341_write_register(LCD_PRC);
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ili9341_write_data(0x20);
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ili9341_write_register(LCD_DTCB);
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ili9341_write_data(0x00);
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ili9341_write_data(0x00);
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ili9341_write_register(LCD_FRMCTR1);
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ili9341_write_data(0x00);
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ili9341_write_data(0x1B);
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ili9341_write_register(LCD_DFC);
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ili9341_write_data(0x0A);
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ili9341_write_data(0xA2);
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ili9341_write_register(LCD_POWER1);
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ili9341_write_data(0x10);
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ili9341_write_register(LCD_POWER2);
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ili9341_write_data(0x10);
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ili9341_write_register(LCD_VCOM1);
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ili9341_write_data(0x45);
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ili9341_write_data(0x15);
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ili9341_write_register(LCD_VCOM2);
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ili9341_write_data(0x90);
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ili9341_write_register(LCD_MAC);
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ili9341_write_data(0xC8);
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ili9341_write_register(LCD_3GAMMA_EN);
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ili9341_write_data(0x00);
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ili9341_write_register(LCD_RGB_INTERFACE);
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ili9341_write_data(0xC2);
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ili9341_write_register(LCD_DFC);
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ili9341_write_data(0x0A);
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ili9341_write_data(0xA7);
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ili9341_write_data(0x27);
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ili9341_write_data(0x04);
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/* Colomn address set */
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ili9341_write_register(LCD_COLUMN_ADDR);
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ili9341_write_data(0x00);
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ili9341_write_data(0x00);
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ili9341_write_data(0x00);
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ili9341_write_data(0xEF);
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/* Page address set */
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ili9341_write_register(LCD_PAGE_ADDR);
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ili9341_write_data(0x00);
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ili9341_write_data(0x00);
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ili9341_write_data(0x01);
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ili9341_write_data(0x3F);
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ili9341_write_register(LCD_INTERFACE);
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ili9341_write_data(0x01);
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ili9341_write_data(0x00);
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ili9341_write_data(0x06);
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ili9341_write_register(LCD_GRAM);
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rt_thread_mdelay(20);
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ili9341_write_register(LCD_GAMMA);
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ili9341_write_data(0x01);
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ili9341_write_register(LCD_PGAMMA);
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ili9341_write_data(0x0F);
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ili9341_write_data(0x29);
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ili9341_write_data(0x24);
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ili9341_write_data(0x0C);
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ili9341_write_data(0x0E);
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ili9341_write_data(0x09);
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ili9341_write_data(0x4E);
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ili9341_write_data(0x78);
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ili9341_write_data(0x3C);
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ili9341_write_data(0x09);
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|
ili9341_write_data(0x13);
|
||||||
|
ili9341_write_data(0x05);
|
||||||
|
ili9341_write_data(0x17);
|
||||||
|
ili9341_write_data(0x11);
|
||||||
|
ili9341_write_data(0x00);
|
||||||
|
ili9341_write_register(LCD_NGAMMA);
|
||||||
|
ili9341_write_data(0x00);
|
||||||
|
ili9341_write_data(0x16);
|
||||||
|
ili9341_write_data(0x1B);
|
||||||
|
ili9341_write_data(0x04);
|
||||||
|
ili9341_write_data(0x11);
|
||||||
|
ili9341_write_data(0x07);
|
||||||
|
ili9341_write_data(0x31);
|
||||||
|
ili9341_write_data(0x33);
|
||||||
|
ili9341_write_data(0x42);
|
||||||
|
ili9341_write_data(0x05);
|
||||||
|
ili9341_write_data(0x0C);
|
||||||
|
ili9341_write_data(0x0A);
|
||||||
|
ili9341_write_data(0x28);
|
||||||
|
ili9341_write_data(0x2F);
|
||||||
|
ili9341_write_data(0x0F);
|
||||||
|
|
||||||
|
ili9341_write_register(LCD_SLEEP_OUT);
|
||||||
|
rt_thread_mdelay(20);
|
||||||
|
ili9341_write_register(LCD_DISPLAY_ON);
|
||||||
|
/* GRAM start writing */
|
||||||
|
ili9341_write_register(LCD_GRAM);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
INIT_DEVICE_EXPORT(ili9341_hw_init);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -0,0 +1,145 @@
|
||||||
|
/*
|
||||||
|
* File : ili9341.h
|
||||||
|
* This file is part of RT-Thread RTOS
|
||||||
|
* COPYRIGHT (C) 2020, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License along
|
||||||
|
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||||
|
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-08-11 RT-Thread the first version
|
||||||
|
*/
|
||||||
|
#ifndef __ILI9341_H
|
||||||
|
#define __ILI9341_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ILI9341 chip IDs
|
||||||
|
*/
|
||||||
|
#define ILI9341_ID 0x9341
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ILI9341 Registers
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Level 1 Commands */
|
||||||
|
#define LCD_SWRESET 0x01 /* Software Reset */
|
||||||
|
#define LCD_READ_DISPLAY_ID 0x04 /* Read display identification information */
|
||||||
|
#define LCD_RDDST 0x09 /* Read Display Status */
|
||||||
|
#define LCD_RDDPM 0x0A /* Read Display Power Mode */
|
||||||
|
#define LCD_RDDMADCTL 0x0B /* Read Display MADCTL */
|
||||||
|
#define LCD_RDDCOLMOD 0x0C /* Read Display Pixel Format */
|
||||||
|
#define LCD_RDDIM 0x0D /* Read Display Image Format */
|
||||||
|
#define LCD_RDDSM 0x0E /* Read Display Signal Mode */
|
||||||
|
#define LCD_RDDSDR 0x0F /* Read Display Self-Diagnostic Result */
|
||||||
|
#define LCD_SPLIN 0x10 /* Enter Sleep Mode */
|
||||||
|
#define LCD_SLEEP_OUT 0x11 /* Sleep out register */
|
||||||
|
#define LCD_PTLON 0x12 /* Partial Mode ON */
|
||||||
|
#define LCD_NORMAL_MODE_ON 0x13 /* Normal Display Mode ON */
|
||||||
|
#define LCD_DINVOFF 0x20 /* Display Inversion OFF */
|
||||||
|
#define LCD_DINVON 0x21 /* Display Inversion ON */
|
||||||
|
#define LCD_GAMMA 0x26 /* Gamma register */
|
||||||
|
#define LCD_DISPLAY_OFF 0x28 /* Display off register */
|
||||||
|
#define LCD_DISPLAY_ON 0x29 /* Display on register */
|
||||||
|
#define LCD_COLUMN_ADDR 0x2A /* Colomn address register */
|
||||||
|
#define LCD_PAGE_ADDR 0x2B /* Page address register */
|
||||||
|
#define LCD_GRAM 0x2C /* GRAM register */
|
||||||
|
#define LCD_RGBSET 0x2D /* Color SET */
|
||||||
|
#define LCD_RAMRD 0x2E /* Memory Read */
|
||||||
|
#define LCD_PLTAR 0x30 /* Partial Area */
|
||||||
|
#define LCD_VSCRDEF 0x33 /* Vertical Scrolling Definition */
|
||||||
|
#define LCD_TEOFF 0x34 /* Tearing Effect Line OFF */
|
||||||
|
#define LCD_TEON 0x35 /* Tearing Effect Line ON */
|
||||||
|
#define LCD_MAC 0x36 /* Memory Access Control register*/
|
||||||
|
#define LCD_VSCRSADD 0x37 /* Vertical Scrolling Start Address */
|
||||||
|
#define LCD_IDMOFF 0x38 /* Idle Mode OFF */
|
||||||
|
#define LCD_IDMON 0x39 /* Idle Mode ON */
|
||||||
|
#define LCD_PIXEL_FORMAT 0x3A /* Pixel Format register */
|
||||||
|
#define LCD_WRITE_MEM_CONTINUE 0x3C /* Write Memory Continue */
|
||||||
|
#define LCD_READ_MEM_CONTINUE 0x3E /* Read Memory Continue */
|
||||||
|
#define LCD_SET_TEAR_SCANLINE 0x44 /* Set Tear Scanline */
|
||||||
|
#define LCD_GET_SCANLINE 0x45 /* Get Scanline */
|
||||||
|
#define LCD_WDB 0x51 /* Write Brightness Display register */
|
||||||
|
#define LCD_RDDISBV 0x52 /* Read Display Brightness */
|
||||||
|
#define LCD_WCD 0x53 /* Write Control Display register*/
|
||||||
|
#define LCD_RDCTRLD 0x54 /* Read CTRL Display */
|
||||||
|
#define LCD_WRCABC 0x55 /* Write Content Adaptive Brightness Control */
|
||||||
|
#define LCD_RDCABC 0x56 /* Read Content Adaptive Brightness Control */
|
||||||
|
#define LCD_WRITE_CABC 0x5E /* Write CABC Minimum Brightness */
|
||||||
|
#define LCD_READ_CABC 0x5F /* Read CABC Minimum Brightness */
|
||||||
|
#define LCD_READ_ID1 0xDA /* Read ID1 */
|
||||||
|
#define LCD_READ_ID2 0xDB /* Read ID2 */
|
||||||
|
#define LCD_READ_ID3 0xDC /* Read ID3 */
|
||||||
|
|
||||||
|
/* Level 2 Commands */
|
||||||
|
#define LCD_RGB_INTERFACE 0xB0 /* RGB Interface Signal Control */
|
||||||
|
#define LCD_FRMCTR1 0xB1 /* Frame Rate Control (In Normal Mode) */
|
||||||
|
#define LCD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle Mode) */
|
||||||
|
#define LCD_FRMCTR3 0xB3 /* Frame Rate Control (In Partial Mode) */
|
||||||
|
#define LCD_INVTR 0xB4 /* Display Inversion Control */
|
||||||
|
#define LCD_BPC 0xB5 /* Blanking Porch Control register */
|
||||||
|
#define LCD_DFC 0xB6 /* Display Function Control register */
|
||||||
|
#define LCD_ETMOD 0xB7 /* Entry Mode Set */
|
||||||
|
#define LCD_BACKLIGHT1 0xB8 /* Backlight Control 1 */
|
||||||
|
#define LCD_BACKLIGHT2 0xB9 /* Backlight Control 2 */
|
||||||
|
#define LCD_BACKLIGHT3 0xBA /* Backlight Control 3 */
|
||||||
|
#define LCD_BACKLIGHT4 0xBB /* Backlight Control 4 */
|
||||||
|
#define LCD_BACKLIGHT5 0xBC /* Backlight Control 5 */
|
||||||
|
#define LCD_BACKLIGHT7 0xBE /* Backlight Control 7 */
|
||||||
|
#define LCD_BACKLIGHT8 0xBF /* Backlight Control 8 */
|
||||||
|
#define LCD_POWER1 0xC0 /* Power Control 1 register */
|
||||||
|
#define LCD_POWER2 0xC1 /* Power Control 2 register */
|
||||||
|
#define LCD_VCOM1 0xC5 /* VCOM Control 1 register */
|
||||||
|
#define LCD_VCOM2 0xC7 /* VCOM Control 2 register */
|
||||||
|
#define LCD_NVMWR 0xD0 /* NV Memory Write */
|
||||||
|
#define LCD_NVMPKEY 0xD1 /* NV Memory Protection Key */
|
||||||
|
#define LCD_RDNVM 0xD2 /* NV Memory Status Read */
|
||||||
|
#define LCD_READ_ID4 0xD3 /* Read ID4 */
|
||||||
|
#define LCD_PGAMMA 0xE0 /* Positive Gamma Correction register */
|
||||||
|
#define LCD_NGAMMA 0xE1 /* Negative Gamma Correction register */
|
||||||
|
#define LCD_DGAMCTRL1 0xE2 /* Digital Gamma Control 1 */
|
||||||
|
#define LCD_DGAMCTRL2 0xE3 /* Digital Gamma Control 2 */
|
||||||
|
#define LCD_INTERFACE 0xF6 /* Interface control register */
|
||||||
|
|
||||||
|
/* Extend register commands */
|
||||||
|
#define LCD_POWERA 0xCB /* Power control A register */
|
||||||
|
#define LCD_POWERB 0xCF /* Power control B register */
|
||||||
|
#define LCD_DTCA 0xE8 /* Driver timing control A */
|
||||||
|
#define LCD_DTCB 0xEA /* Driver timing control B */
|
||||||
|
#define LCD_POWER_SEQ 0xED /* Power on sequence register */
|
||||||
|
#define LCD_3GAMMA_EN 0xF2 /* 3 Gamma enable register */
|
||||||
|
#define LCD_PRC 0xF7 /* Pump ratio control register */
|
||||||
|
|
||||||
|
/* Size of read registers */
|
||||||
|
#define LCD_READ_ID4_SIZE 3 /* Size of Read ID4 */
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup ILI9341_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
int ili9341_hw_init(void);
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ILI9341_H */
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -18,12 +18,12 @@
|
||||||
#define LCD_BUF_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
|
#define LCD_BUF_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
|
||||||
#define LCD_PIXEL_FORMAT RTGRAPHIC_PIXEL_FORMAT_RGB565
|
#define LCD_PIXEL_FORMAT RTGRAPHIC_PIXEL_FORMAT_RGB565
|
||||||
|
|
||||||
#define LCD_HSYNC_WIDTH 2
|
#define LCD_HSYNC_WIDTH 10
|
||||||
#define LCD_VSYNC_HEIGHT 2
|
#define LCD_VSYNC_HEIGHT 2
|
||||||
#define LCD_HBP 46
|
#define LCD_HBP 20
|
||||||
#define LCD_VBP 23
|
#define LCD_VBP 2
|
||||||
#define LCD_HFP 22
|
#define LCD_HFP 10
|
||||||
#define LCD_VFP 22
|
#define LCD_VFP 5
|
||||||
|
|
||||||
#define LCD_BACKLIGHT_USING_GPIO
|
#define LCD_BACKLIGHT_USING_GPIO
|
||||||
#define LCD_BL_GPIO_NUM GET_PIN(D, 7)
|
#define LCD_BL_GPIO_NUM GET_PIN(D, 7)
|
||||||
|
|
|
||||||
|
|
@ -92,7 +92,7 @@
|
||||||
#define RT_USING_I2C
|
#define RT_USING_I2C
|
||||||
#define RT_USING_I2C_BITOPS
|
#define RT_USING_I2C_BITOPS
|
||||||
#define RT_USING_PIN
|
#define RT_USING_PIN
|
||||||
|
#define RT_USING_SPI
|
||||||
/* Using USB */
|
/* Using USB */
|
||||||
|
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue