From bde47018b8327fb8106c68e84a719a97243a1653 Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Mon, 7 Jan 2019 06:09:45 +0800 Subject: [PATCH] [libcpu] Add SConscript in libcpu. --- bsp/qemu-vexpress-a9/SConstruct | 1 + bsp/qemu-vexpress-gemini/SConstruct | 9 +- bsp/realview-a8/SConstruct | 9 +- libcpu/SConscript | 41 ++------ libcpu/arm/AT91SAM7S/SConscript | 23 +++++ libcpu/arm/AT91SAM7S/context_rvds.S | 130 +++++++++++++------------- libcpu/arm/AT91SAM7X/SConscript | 23 +++++ libcpu/arm/AT91SAM7X/context_rvds.S | 22 ++--- libcpu/arm/SConscript | 18 ++++ libcpu/arm/am335x/SConscript | 23 +++++ libcpu/arm/arm926/SConscript | 25 +++++ libcpu/arm/arm926/context_gcc.S | 18 +--- libcpu/arm/arm926/context_iar.S | 34 ++----- libcpu/arm/arm926/context_rvds.S | 22 +---- libcpu/arm/arm926/start_iar.S | 18 +--- libcpu/arm/arm926/start_rvds.S | 37 +------- libcpu/arm/armv6/SConscript | 23 +++++ libcpu/arm/common/SConscript | 23 +++++ libcpu/arm/common/backtrace.c | 58 ++++++------ libcpu/arm/cortex-a/SConscript | 23 +++++ libcpu/arm/cortex-m0/SConscript | 23 +++++ libcpu/arm/cortex-m0/context_iar.S | 8 +- libcpu/arm/cortex-m0/context_rvds.S | 8 +- libcpu/arm/cortex-m3/SConscript | 23 +++++ libcpu/arm/cortex-m3/context_iar.S | 8 +- libcpu/arm/cortex-m3/context_rvds.S | 8 +- libcpu/arm/cortex-m4/SConscript | 23 +++++ libcpu/arm/cortex-m4/context_iar.S | 8 +- libcpu/arm/cortex-m7/SConscript | 23 +++++ libcpu/arm/cortex-m7/context_iar.S | 8 +- libcpu/arm/cortex-m7/context_rvds.S | 8 +- libcpu/arm/cortex-r4/SConscript | 23 +++++ libcpu/arm/cortex-r4/context_ccs.asm | 10 +- libcpu/arm/dm36x/SConscript | 23 +++++ libcpu/arm/dm36x/context_rvds.S | 18 +--- libcpu/arm/lpc214x/SConscript | 23 +++++ libcpu/arm/lpc214x/context_rvds.S | 8 +- libcpu/arm/lpc24xx/SConscript | 23 +++++ libcpu/arm/lpc24xx/context_rvds.S | 8 +- libcpu/arm/realview-a8-vmm/SConscript | 24 +++-- libcpu/arm/s3c24x0/SConscript | 23 +++++ libcpu/arm/s3c24x0/context_rvds.S | 8 +- libcpu/arm/s3c44b0/SConscript | 23 +++++ libcpu/arm/s3c44b0/context_rvds.S | 8 +- libcpu/arm/sep4020/SConscript | 23 +++++ libcpu/arm/sep4020/context_rvds.S | 8 +- libcpu/arm/zynq7000/SConscript | 24 +++-- libcpu/arm/zynq7000/context_gcc.S | 20 +--- libcpu/arm/zynq7000/cp15.h | 29 ++---- libcpu/arm/zynq7000/gic.c | 20 +--- libcpu/arm/zynq7000/gic.h | 20 +--- libcpu/arm/zynq7000/interrupt.h | 29 ++---- libcpu/arm/zynq7000/mmu.c | 20 +--- libcpu/arm/zynq7000/trap.c | 20 +--- libcpu/avr32/SConscript | 15 +++ libcpu/avr32/uc3/SConscript | 14 +++ libcpu/blackfin/SConscript | 15 +++ libcpu/blackfin/bf53x/SConscript | 14 +++ libcpu/c-sky/SConscript | 18 ++++ libcpu/c-sky/ck802/SConscript | 14 +++ libcpu/c-sky/common/SConscript | 14 +++ libcpu/ia32/SConscript | 14 +++ libcpu/m16c/SConscript | 15 +++ libcpu/m16c/m16c62p/SConscript | 14 +++ libcpu/mips/SConscript | 18 ++++ libcpu/mips/common/SConscript | 14 +++ libcpu/mips/loongson_1b/SConscript | 14 +++ libcpu/mips/loongson_1c/SConscript | 14 +++ libcpu/mips/pic32/SConscript | 14 +++ libcpu/mips/x1000/SConscript | 14 +++ libcpu/mips/xburst/SConscript.1 | 14 +++ libcpu/nios/SConscript | 15 +++ libcpu/nios/nios_ii/SConscript | 14 +++ libcpu/ppc/SConscript | 18 ++++ libcpu/ppc/common/SConscript | 14 +++ libcpu/ppc/common/ptrace.h | 28 +++--- libcpu/ppc/ppc405/SConscript | 14 +++ libcpu/risc-v/SConscript | 18 ++++ libcpu/risc-v/common/SConscript | 12 +++ libcpu/risc-v/e310/SConscript | 13 +-- libcpu/risc-v/k210/SConscript | 14 +++ libcpu/risc-v/rv32m1/SConscript | 14 +++ libcpu/rx/SConscript | 14 +++ libcpu/sim/SConscript | 15 +++ libcpu/sim/posix/SConscript | 14 +++ libcpu/sim/win32/SConscript | 14 +++ libcpu/ti-dsp/SConscript | 15 +++ libcpu/ti-dsp/c28x/SConscript | 14 +++ libcpu/unicore32/SConscript | 15 +++ libcpu/unicore32/sep6200/SConscript | 14 +++ libcpu/v850/70f34/SConscript | 14 +++ libcpu/v850/SConscript | 15 +++ libcpu/xilinx/SConscript | 15 +++ libcpu/xilinx/microblaze/SConscript | 14 +++ 94 files changed, 1255 insertions(+), 504 deletions(-) create mode 100644 libcpu/arm/AT91SAM7S/SConscript create mode 100644 libcpu/arm/AT91SAM7X/SConscript create mode 100644 libcpu/arm/SConscript create mode 100644 libcpu/arm/am335x/SConscript create mode 100644 libcpu/arm/arm926/SConscript create mode 100644 libcpu/arm/armv6/SConscript create mode 100644 libcpu/arm/common/SConscript create mode 100644 libcpu/arm/cortex-a/SConscript create mode 100644 libcpu/arm/cortex-m0/SConscript create mode 100644 libcpu/arm/cortex-m3/SConscript create mode 100644 libcpu/arm/cortex-m4/SConscript create mode 100644 libcpu/arm/cortex-m7/SConscript create mode 100644 libcpu/arm/cortex-r4/SConscript create mode 100644 libcpu/arm/dm36x/SConscript create mode 100644 libcpu/arm/lpc214x/SConscript create mode 100644 libcpu/arm/lpc24xx/SConscript create mode 100644 libcpu/arm/s3c24x0/SConscript create mode 100644 libcpu/arm/s3c44b0/SConscript create mode 100644 libcpu/arm/sep4020/SConscript create mode 100644 libcpu/avr32/SConscript create mode 100644 libcpu/avr32/uc3/SConscript create mode 100644 libcpu/blackfin/SConscript create mode 100644 libcpu/blackfin/bf53x/SConscript create mode 100644 libcpu/c-sky/SConscript create mode 100644 libcpu/c-sky/ck802/SConscript create mode 100644 libcpu/c-sky/common/SConscript create mode 100644 libcpu/ia32/SConscript create mode 100644 libcpu/m16c/SConscript create mode 100644 libcpu/m16c/m16c62p/SConscript create mode 100644 libcpu/mips/SConscript create mode 100644 libcpu/mips/common/SConscript create mode 100644 libcpu/mips/loongson_1b/SConscript create mode 100644 libcpu/mips/loongson_1c/SConscript create mode 100644 libcpu/mips/pic32/SConscript create mode 100644 libcpu/mips/x1000/SConscript create mode 100644 libcpu/mips/xburst/SConscript.1 create mode 100644 libcpu/nios/SConscript create mode 100644 libcpu/nios/nios_ii/SConscript create mode 100644 libcpu/ppc/SConscript create mode 100644 libcpu/ppc/common/SConscript create mode 100644 libcpu/ppc/ppc405/SConscript create mode 100644 libcpu/risc-v/SConscript create mode 100644 libcpu/risc-v/common/SConscript create mode 100644 libcpu/risc-v/k210/SConscript create mode 100644 libcpu/risc-v/rv32m1/SConscript create mode 100644 libcpu/rx/SConscript create mode 100644 libcpu/sim/SConscript create mode 100644 libcpu/sim/posix/SConscript create mode 100644 libcpu/sim/win32/SConscript create mode 100644 libcpu/ti-dsp/SConscript create mode 100644 libcpu/ti-dsp/c28x/SConscript create mode 100644 libcpu/unicore32/SConscript create mode 100644 libcpu/unicore32/sep6200/SConscript create mode 100644 libcpu/v850/70f34/SConscript create mode 100644 libcpu/v850/SConscript create mode 100644 libcpu/xilinx/SConscript create mode 100644 libcpu/xilinx/microblaze/SConscript diff --git a/bsp/qemu-vexpress-a9/SConstruct b/bsp/qemu-vexpress-a9/SConstruct index 61af0ee620..638311d697 100644 --- a/bsp/qemu-vexpress-a9/SConstruct +++ b/bsp/qemu-vexpress-a9/SConstruct @@ -19,6 +19,7 @@ env = Environment(tools = ['mingw'], AR = rtconfig.AR, ARFLAGS = '-rc', LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) env.PrependENVPath('PATH', rtconfig.EXEC_PATH) +env['ASCOM'] = env['ASPPCOM'] Export('RTT_ROOT') Export('rtconfig') diff --git a/bsp/qemu-vexpress-gemini/SConstruct b/bsp/qemu-vexpress-gemini/SConstruct index 6fa1553e4d..765abd555a 100644 --- a/bsp/qemu-vexpress-gemini/SConstruct +++ b/bsp/qemu-vexpress-gemini/SConstruct @@ -13,11 +13,12 @@ from building import * TARGET = 'rtthread-vexpress.' + rtconfig.TARGET_EXT env = Environment(tools = ['mingw'], - AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, - CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, - AR = rtconfig.AR, ARFLAGS = '-rc', - LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) env.PrependENVPath('PATH', rtconfig.EXEC_PATH) +env['ASCOM'] = env['ASPPCOM'] Export('RTT_ROOT') Export('rtconfig') diff --git a/bsp/realview-a8/SConstruct b/bsp/realview-a8/SConstruct index 67ae413023..0885dbfc0e 100644 --- a/bsp/realview-a8/SConstruct +++ b/bsp/realview-a8/SConstruct @@ -13,11 +13,12 @@ from building import * TARGET = 'rtthread-realview.' + rtconfig.TARGET_EXT env = Environment(tools = ['mingw'], - AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, - CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, - AR = rtconfig.AR, ARFLAGS = '-rc', - LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) env.PrependENVPath('PATH', rtconfig.EXEC_PATH) +env['ASCOM'] = env['ASPPCOM'] Export('RTT_ROOT') Export('rtconfig') diff --git a/libcpu/SConscript b/libcpu/SConscript index 568da67cc9..774e7f4043 100644 --- a/libcpu/SConscript +++ b/libcpu/SConscript @@ -1,38 +1,15 @@ -Import('RTT_ROOT') -Import('rtconfig') +# RT-Thread building script for bridge + +import os from building import * -arch = rtconfig.ARCH -comm = rtconfig.ARCH + '/common' -path = rtconfig.ARCH + '/' + rtconfig.CPU -src = [] -ASFLAGS = '' +Import('rtconfig') -# The set of source files associated with this SConscript file. -if rtconfig.PLATFORM == 'armcc': - src += Glob(path + '/*.c') + Glob(path + '/*_rvds.S') - src += Glob(comm + '/*.c') + Glob(comm + '/*_rvds.S') +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) -if rtconfig.PLATFORM == 'gcc': - src += Glob(path + '/*_init.S') - src += Glob(path + '/*.c') + Glob(path + '/*_gcc.S') - src += Glob(comm + '/*.c') + Glob(comm + '/*_gcc.S') - -if rtconfig.PLATFORM == 'iar': - src += Glob(path + '/*.c') + Glob(path + '/*_iar.S') - src += Glob(comm + '/*.c') + Glob(comm + '/*_iar.S') - -if rtconfig.PLATFORM == 'cl': - src = Glob(path + '/*.c') - -if rtconfig.PLATFORM == 'mingw': - src = Glob(path + '/*.c') - -if rtconfig.PLATFORM == 'armcc' and rtconfig.ARCH == 'arm' and rtconfig.CPU == 'arm926': - ASFLAGS = ' --cpreproc' - -CPPPATH = [RTT_ROOT + '/libcpu/' + arch + '/' + rtconfig.CPU, RTT_ROOT + '/libcpu/' + arch + '/common'] - -group = DefineGroup(rtconfig.CPU.upper(), src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) +if rtconfig.ARCH in list: + group = group + SConscript(os.path.join(cwd, rtconfig.ARCH, 'SConscript')) Return('group') diff --git a/libcpu/arm/AT91SAM7S/SConscript b/libcpu/arm/AT91SAM7S/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/AT91SAM7S/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/AT91SAM7S/context_rvds.S b/libcpu/arm/AT91SAM7S/context_rvds.S index 641ec7a6b1..78e3df9736 100644 --- a/libcpu/arm/AT91SAM7S/context_rvds.S +++ b/libcpu/arm/AT91SAM7S/context_rvds.S @@ -1,43 +1,39 @@ -;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team -; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE -; * -; * Change Logs: -; * Date Author Notes -; * 2009-01-20 Bernard first version -; */ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2009-01-20 Bernard first version + */ NOINT EQU 0xc0 ; disable interrupt in psr - AREA |.text|, CODE, READONLY, ALIGN=2 - ARM - REQUIRE8 - PRESERVE8 + AREA |.text|, CODE, READONLY, ALIGN=2 + ARM + REQUIRE8 + PRESERVE8 ;/* ; * rt_base_t rt_hw_interrupt_disable(); ; */ rt_hw_interrupt_disable PROC - EXPORT rt_hw_interrupt_disable - MRS r0, cpsr - ORR r1, r0, #NOINT - MSR cpsr_c, r1 - BX lr - ENDP + EXPORT rt_hw_interrupt_disable + MRS r0, cpsr + ORR r1, r0, #NOINT + MSR cpsr_c, r1 + BX lr + ENDP ;/* ; * void rt_hw_interrupt_enable(rt_base_t level); ; */ rt_hw_interrupt_enable PROC - EXPORT rt_hw_interrupt_enable - MSR cpsr_c, r0 - BX lr - ENDP + EXPORT rt_hw_interrupt_enable + MSR cpsr_c, r0 + BX lr + ENDP ;/* ; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to); @@ -45,63 +41,63 @@ rt_hw_interrupt_enable PROC ; * r1 --> to ; */ rt_hw_context_switch PROC - EXPORT rt_hw_context_switch - STMFD sp!, {lr} ; push pc (lr should be pushed in place of PC) - STMFD sp!, {r0-r12, lr} ; push lr & register file + EXPORT rt_hw_context_switch + STMFD sp!, {lr} ; push pc (lr should be pushed in place of PC) + STMFD sp!, {r0-r12, lr} ; push lr & register file - MRS r4, cpsr - STMFD sp!, {r4} ; push cpsr - MRS r4, spsr - STMFD sp!, {r4} ; push spsr + MRS r4, cpsr + STMFD sp!, {r4} ; push cpsr + MRS r4, spsr + STMFD sp!, {r4} ; push spsr - STR sp, [r0] ; store sp in preempted tasks TCB - LDR sp, [r1] ; get new task stack pointer + STR sp, [r0] ; store sp in preempted tasks TCB + LDR sp, [r1] ; get new task stack pointer - LDMFD sp!, {r4} ; pop new task spsr - MSR spsr_cxsf, r4 - LDMFD sp!, {r4} ; pop new task cpsr - MSR cpsr_cxsf, r4 + LDMFD sp!, {r4} ; pop new task spsr + MSR spsr_cxsf, r4 + LDMFD sp!, {r4} ; pop new task cpsr + MSR cpsr_cxsf, r4 - LDMFD sp!, {r0-r12, lr, pc} ; pop new task r0-r12, lr & pc - ENDP + LDMFD sp!, {r0-r12, lr, pc} ; pop new task r0-r12, lr & pc + ENDP ;/* ; * void rt_hw_context_switch_to(rt_uint32 to); ; * r0 --> to ; */ rt_hw_context_switch_to PROC - EXPORT rt_hw_context_switch_to - LDR sp, [r0] ; get new task stack pointer + EXPORT rt_hw_context_switch_to + LDR sp, [r0] ; get new task stack pointer - LDMFD sp!, {r4} ; pop new task spsr - MSR spsr_cxsf, r4 - LDMFD sp!, {r4} ; pop new task cpsr - MSR cpsr_cxsf, r4 + LDMFD sp!, {r4} ; pop new task spsr + MSR spsr_cxsf, r4 + LDMFD sp!, {r4} ; pop new task cpsr + MSR cpsr_cxsf, r4 - LDMFD sp!, {r0-r12, lr, pc} ; pop new task r0-r12, lr & pc - ENDP + LDMFD sp!, {r0-r12, lr, pc} ; pop new task r0-r12, lr & pc + ENDP ;/* ; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to); ; */ - IMPORT rt_thread_switch_interrupt_flag - IMPORT rt_interrupt_from_thread - IMPORT rt_interrupt_to_thread + IMPORT rt_thread_switch_interrupt_flag + IMPORT rt_interrupt_from_thread + IMPORT rt_interrupt_to_thread rt_hw_context_switch_interrupt PROC - EXPORT rt_hw_context_switch_interrupt - LDR r2, =rt_thread_switch_interrupt_flag - LDR r3, [r2] - CMP r3, #1 - BEQ _reswitch - MOV r3, #1 ; set rt_thread_switch_interrupt_flag to 1 - STR r3, [r2] - LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread - STR r0, [r2] + EXPORT rt_hw_context_switch_interrupt + LDR r2, =rt_thread_switch_interrupt_flag + LDR r3, [r2] + CMP r3, #1 + BEQ _reswitch + MOV r3, #1 ; set rt_thread_switch_interrupt_flag to 1 + STR r3, [r2] + LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread + STR r0, [r2] _reswitch - LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread - STR r1, [r2] - BX lr - ENDP + LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread + STR r1, [r2] + BX lr + ENDP - END \ No newline at end of file + END \ No newline at end of file diff --git a/libcpu/arm/AT91SAM7X/SConscript b/libcpu/arm/AT91SAM7X/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/AT91SAM7X/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/AT91SAM7X/context_rvds.S b/libcpu/arm/AT91SAM7X/context_rvds.S index 641ec7a6b1..0d8bf56237 100644 --- a/libcpu/arm/AT91SAM7X/context_rvds.S +++ b/libcpu/arm/AT91SAM7X/context_rvds.S @@ -1,16 +1,12 @@ -;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team -; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE -; * -; * Change Logs: -; * Date Author Notes -; * 2009-01-20 Bernard first version -; */ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2009-01-20 Bernard first version + */ NOINT EQU 0xc0 ; disable interrupt in psr diff --git a/libcpu/arm/SConscript b/libcpu/arm/SConscript new file mode 100644 index 0000000000..36a214327b --- /dev/null +++ b/libcpu/arm/SConscript @@ -0,0 +1,18 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# add common code files +group = group + SConscript(os.path.join(cwd, 'common', 'SConscript')) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/arm/am335x/SConscript b/libcpu/arm/am335x/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/am335x/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/arm926/SConscript b/libcpu/arm/arm926/SConscript new file mode 100644 index 0000000000..00785a135b --- /dev/null +++ b/libcpu/arm/arm926/SConscript @@ -0,0 +1,25 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] +ASFLAGS = '' + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + ASFLAGS = ' --cpreproc' + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/arm/arm926/context_gcc.S b/libcpu/arm/arm926/context_gcc.S index 5152618d24..b6b7863679 100644 --- a/libcpu/arm/arm926/context_gcc.S +++ b/libcpu/arm/arm926/context_gcc.S @@ -1,21 +1,7 @@ ;/* -; * File : context_iar.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * This program is free software; you can redistribute it and/or modify -; * it under the terms of the GNU General Public License as published by -; * the Free Software Foundation; either version 2 of the License, or -; * (at your option) any later version. -; * -; * This program is distributed in the hope that it will be useful, -; * but WITHOUT ANY WARRANTY; without even the implied warranty of -; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -; * GNU General Public License for more details. -; * -; * You should have received a copy of the GNU General Public License along -; * with this program; if not, write to the Free Software Foundation, Inc., -; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/arm926/context_iar.S b/libcpu/arm/arm926/context_iar.S index 14110e5220..902552734e 100644 --- a/libcpu/arm/arm926/context_iar.S +++ b/libcpu/arm/arm926/context_iar.S @@ -1,27 +1,13 @@ -;/* -; * File : context_iar.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team -; * -; * This program is free software; you can redistribute it and/or modify -; * it under the terms of the GNU General Public License as published by -; * the Free Software Foundation; either version 2 of the License, or -; * (at your option) any later version. -; * -; * This program is distributed in the hope that it will be useful, -; * but WITHOUT ANY WARRANTY; without even the implied warranty of -; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -; * GNU General Public License for more details. -; * -; * You should have received a copy of the GNU General Public License along -; * with this program; if not, write to the Free Software Foundation, Inc., -; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -; * -; * Change Logs: -; * Date Author Notes -; * 2011-08-14 weety copy from mini2440 -; * 2015-04-15 ArdaFu convert from context_gcc.s -; */ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2011-08-14 weety copy from mini2440 + * 2015-04-15 ArdaFu convert from context_gcc.s + */ #define NOINT 0xc0 diff --git a/libcpu/arm/arm926/context_rvds.S b/libcpu/arm/arm926/context_rvds.S index 32bd235fef..03eff68d4c 100644 --- a/libcpu/arm/arm926/context_rvds.S +++ b/libcpu/arm/arm926/context_rvds.S @@ -1,24 +1,10 @@ ;/* -; * file : context_rvds.s -; * this file is part of rt-thread rtos -; * copyright (c) 2006, rt-thread development team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * this program is free software; you can redistribute it and/or modify -; * it under the terms of the gnu general public license as published by -; * the free software foundation; either version 2 of the license, or -; * (at your option) any later version. +; * SPDX-License-Identifier: Apache-2.0 ; * -; * this program is distributed in the hope that it will be useful, -; * but without any warranty; without even the implied warranty of -; * merchantability or fitness for a particular purpose. see the -; * gnu general public license for more details. -; * -; * you should have received a copy of the gnu general public license along -; * with this program; if not, write to the free software foundation, inc., -; * 51 franklin street, fifth floor, boston, ma 02110-1301 usa. -; * -; * change logs: -; * date author notes +; * Change Logs: +; * Date Author Notes ; * 2011-08-14 weety copy from mini2440 ; */ diff --git a/libcpu/arm/arm926/start_iar.S b/libcpu/arm/arm926/start_iar.S index 880f2d9706..080acd57b6 100644 --- a/libcpu/arm/arm926/start_iar.S +++ b/libcpu/arm/arm926/start_iar.S @@ -1,21 +1,7 @@ ;/* -; * File : start.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * This program is free software; you can redistribute it and/or modify -; * it under the terms of the GNU General Public License as published by -; * the Free Software Foundation; either version 2 of the License, or -; * (at your option) any later version. -; * -; * This program is distributed in the hope that it will be useful, -; * but WITHOUT ANY WARRANTY; without even the implied warranty of -; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -; * GNU General Public License for more details. -; * -; * You should have received a copy of the GNU General Public License along -; * with this program; if not, write to the Free Software Foundation, Inc., -; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/arm926/start_rvds.S b/libcpu/arm/arm926/start_rvds.S index aca0e4577f..fc7e84ffaa 100644 --- a/libcpu/arm/arm926/start_rvds.S +++ b/libcpu/arm/arm926/start_rvds.S @@ -1,21 +1,7 @@ ;/* -; * File : start_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * This program is free software; you can redistribute it and/or modify -; * it under the terms of the GNU General Public License as published by -; * the Free Software Foundation; either version 2 of the License, or -; * (at your option) any later version. -; * -; * This program is distributed in the hope that it will be useful, -; * but WITHOUT ANY WARRANTY; without even the implied warranty of -; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -; * GNU General Public License for more details. -; * -; * You should have received a copy of the GNU General Public License along -; * with this program; if not, write to the Free Software Foundation, Inc., -; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes @@ -25,7 +11,6 @@ ; * 2015-06-04 aozima Align stack address to 8 byte. ; */ -;#include "rt_low_level_init.h" UND_STK_SIZE EQU 512 SVC_STK_SIZE EQU 4096 ABT_STK_SIZE EQU 512 @@ -35,25 +20,7 @@ SYS_STK_SIZE EQU 512 Heap_Size EQU 512 S_FRAME_SIZE EQU (18*4) ;72 -;S_SPSR EQU (17*4) ;SPSR -;S_CPSR EQU (16*4) ;CPSR S_PC EQU (15*4) ;R15 -;S_LR EQU (14*4) ;R14 -;S_SP EQU (13*4) ;R13 - -;S_IP EQU (12*4) ;R12 -;S_FP EQU (11*4) ;R11 -;S_R10 EQU (10*4) -;S_R9 EQU (9*4) -;S_R8 EQU (8*4) -;S_R7 EQU (7*4) -;S_R6 EQU (6*4) -;S_R5 EQU (5*4) -;S_R4 EQU (4*4) -;S_R3 EQU (3*4) -;S_R2 EQU (2*4) -;S_R1 EQU (1*4) -;S_R0 EQU (0*4) MODE_USR EQU 0X10 MODE_FIQ EQU 0X11 diff --git a/libcpu/arm/armv6/SConscript b/libcpu/arm/armv6/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/armv6/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/common/SConscript b/libcpu/arm/common/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/common/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/common/backtrace.c b/libcpu/arm/common/backtrace.c index f61c69ef01..4fc87b20d1 100644 --- a/libcpu/arm/common/backtrace.c +++ b/libcpu/arm/common/backtrace.c @@ -13,51 +13,51 @@ #ifdef __GNUC__ /* -->High Address,Stack Top -PC<-----| -LR | -IP | -FP | -...... | -PC<-| | -LR | | -IP | | +PC<------| +LR | +IP | +FP | +...... | +PC <-| | +LR | | +IP | | FP---|-- | -...... | -PC | -LR | -IP | +...... | +PC | +LR | +IP | FP--- -->Low Address,Stack Bottom */ void rt_hw_backtrace(rt_uint32_t *fp, rt_uint32_t thread_entry) { - rt_uint32_t i, pc, func_entry; + rt_uint32_t i, pc, func_entry; - pc = *fp; - rt_kprintf("[0x%x]\n", pc-0xC); + pc = *fp; + rt_kprintf("[0x%x]\n", pc-0xC); - for(i=0; i<10; i++) - { - fp = (rt_uint32_t *)*(fp - 3); - pc = *fp ; + for(i=0; i<10; i++) + { + fp = (rt_uint32_t *)*(fp - 3); + pc = *fp ; - func_entry = pc - 0xC; + func_entry = pc - 0xC; - if(func_entry <= 0x30000000) break; + if(func_entry <= 0x30000000) break; - if(func_entry == thread_entry) - { - rt_kprintf("EntryPoint:0x%x\n", func_entry); + if(func_entry == thread_entry) + { + rt_kprintf("EntryPoint:0x%x\n", func_entry); - break; - } + break; + } - rt_kprintf("[0x%x]\n", func_entry); - } + rt_kprintf("[0x%x]\n", func_entry); + } } #else void rt_hw_backtrace(rt_uint32_t *fp, rt_uint32_t thread_entry) { - /* old compiler implementation */ + /* old compiler implementation */ } #endif diff --git a/libcpu/arm/cortex-a/SConscript b/libcpu/arm/cortex-a/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/cortex-a/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/cortex-m0/SConscript b/libcpu/arm/cortex-m0/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/cortex-m0/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/cortex-m0/context_iar.S b/libcpu/arm/cortex-m0/context_iar.S index 67ea808d8c..50d3781359 100644 --- a/libcpu/arm/cortex-m0/context_iar.S +++ b/libcpu/arm/cortex-m0/context_iar.S @@ -1,11 +1,7 @@ ;/* -; * File : context_iar.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2009, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/cortex-m0/context_rvds.S b/libcpu/arm/cortex-m0/context_rvds.S index bf68592e63..fb9ce9b4bf 100644 --- a/libcpu/arm/cortex-m0/context_rvds.S +++ b/libcpu/arm/cortex-m0/context_rvds.S @@ -1,11 +1,7 @@ ;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2009, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/cortex-m3/SConscript b/libcpu/arm/cortex-m3/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/cortex-m3/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/cortex-m3/context_iar.S b/libcpu/arm/cortex-m3/context_iar.S index 95dee8062d..91645c48b3 100644 --- a/libcpu/arm/cortex-m3/context_iar.S +++ b/libcpu/arm/cortex-m3/context_iar.S @@ -1,11 +1,7 @@ ;/* -; * File : context_iar.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/cortex-m3/context_rvds.S b/libcpu/arm/cortex-m3/context_rvds.S index 9a7ff10abe..a2a7f41a27 100644 --- a/libcpu/arm/cortex-m3/context_rvds.S +++ b/libcpu/arm/cortex-m3/context_rvds.S @@ -1,11 +1,7 @@ ;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/cortex-m4/SConscript b/libcpu/arm/cortex-m4/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/cortex-m4/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/cortex-m4/context_iar.S b/libcpu/arm/cortex-m4/context_iar.S index bf707d0d53..06b8c7f884 100644 --- a/libcpu/arm/cortex-m4/context_iar.S +++ b/libcpu/arm/cortex-m4/context_iar.S @@ -1,11 +1,7 @@ ;/* -; * File : context_iar.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/cortex-m7/SConscript b/libcpu/arm/cortex-m7/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/cortex-m7/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/cortex-m7/context_iar.S b/libcpu/arm/cortex-m7/context_iar.S index bf707d0d53..06b8c7f884 100644 --- a/libcpu/arm/cortex-m7/context_iar.S +++ b/libcpu/arm/cortex-m7/context_iar.S @@ -1,11 +1,7 @@ ;/* -; * File : context_iar.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/cortex-m7/context_rvds.S b/libcpu/arm/cortex-m7/context_rvds.S index 1abe477eab..ea9e9cb8b3 100644 --- a/libcpu/arm/cortex-m7/context_rvds.S +++ b/libcpu/arm/cortex-m7/context_rvds.S @@ -1,11 +1,7 @@ ;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/cortex-r4/SConscript b/libcpu/arm/cortex-r4/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/cortex-r4/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/cortex-r4/context_ccs.asm b/libcpu/arm/cortex-r4/context_ccs.asm index 2b459f8238..9463556743 100644 --- a/libcpu/arm/cortex-r4/context_ccs.asm +++ b/libcpu/arm/cortex-r4/context_ccs.asm @@ -1,14 +1,10 @@ ;/* -; * File : context_ccs.asm -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: -; * Date Author Notes +; * Date Author Notes ; * 2009-01-20 Bernard first version ; * 2011-07-22 Bernard added thumb mode porting ; * 2013-05-24 Grissiom port to CCS diff --git a/libcpu/arm/dm36x/SConscript b/libcpu/arm/dm36x/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/dm36x/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/dm36x/context_rvds.S b/libcpu/arm/dm36x/context_rvds.S index 631da83372..8e0fc4465b 100644 --- a/libcpu/arm/dm36x/context_rvds.S +++ b/libcpu/arm/dm36x/context_rvds.S @@ -1,21 +1,7 @@ ;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * This program is free software; you can redistribute it and/or modify -; * it under the terms of the GNU General Public License as published by -; * the Free Software Foundation; either version 2 of the License, or -; * (at your option) any later version. -; * -; * This program is distributed in the hope that it will be useful, -; * but WITHOUT ANY WARRANTY; without even the implied warranty of -; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -; * GNU General Public License for more details. -; * -; * You should have received a copy of the GNU General Public License along -; * with this program; if not, write to the Free Software Foundation, Inc., -; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/lpc214x/SConscript b/libcpu/arm/lpc214x/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/lpc214x/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/lpc214x/context_rvds.S b/libcpu/arm/lpc214x/context_rvds.S index 762b67d42e..47ca31cd1f 100644 --- a/libcpu/arm/lpc214x/context_rvds.S +++ b/libcpu/arm/lpc214x/context_rvds.S @@ -1,11 +1,7 @@ ;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/lpc24xx/SConscript b/libcpu/arm/lpc24xx/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/lpc24xx/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/lpc24xx/context_rvds.S b/libcpu/arm/lpc24xx/context_rvds.S index ecd20e4bbe..0d9915f4f1 100644 --- a/libcpu/arm/lpc24xx/context_rvds.S +++ b/libcpu/arm/lpc24xx/context_rvds.S @@ -1,11 +1,7 @@ ;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/realview-a8-vmm/SConscript b/libcpu/arm/realview-a8-vmm/SConscript index 61057c04cc..9ff30a796b 100644 --- a/libcpu/arm/realview-a8-vmm/SConscript +++ b/libcpu/arm/realview-a8-vmm/SConscript @@ -1,17 +1,23 @@ -Import('rtconfig') +# RT-Thread building script for component + from building import * +Import('rtconfig') + cwd = GetCurrentDir() -src = Glob('*.c') +src = Glob('*.c') + Glob('*.cpp') CPPPATH = [cwd] -if rtconfig.PLATFORM == 'iar': - src += Glob('*_iar.S') -elif rtconfig.PLATFORM == 'gcc': - src += Glob('*_gcc.S') -elif rtconfig.PLATFORM == 'armcc': - src += Glob('*_rvds.S') +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') -group = DefineGroup('AM335x', src, depend = [''], CPPPATH = CPPPATH) +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/libcpu/arm/s3c24x0/SConscript b/libcpu/arm/s3c24x0/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/s3c24x0/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/s3c24x0/context_rvds.S b/libcpu/arm/s3c24x0/context_rvds.S index 54d655afe1..9078f6173a 100644 --- a/libcpu/arm/s3c24x0/context_rvds.S +++ b/libcpu/arm/s3c24x0/context_rvds.S @@ -1,11 +1,7 @@ ;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/s3c44b0/SConscript b/libcpu/arm/s3c44b0/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/s3c44b0/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/s3c44b0/context_rvds.S b/libcpu/arm/s3c44b0/context_rvds.S index 641ec7a6b1..27ebf8f5e3 100644 --- a/libcpu/arm/s3c44b0/context_rvds.S +++ b/libcpu/arm/s3c44b0/context_rvds.S @@ -1,11 +1,7 @@ ;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/sep4020/SConscript b/libcpu/arm/sep4020/SConscript new file mode 100644 index 0000000000..9ff30a796b --- /dev/null +++ b/libcpu/arm/sep4020/SConscript @@ -0,0 +1,23 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') + +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/libcpu/arm/sep4020/context_rvds.S b/libcpu/arm/sep4020/context_rvds.S index 641ec7a6b1..27ebf8f5e3 100644 --- a/libcpu/arm/sep4020/context_rvds.S +++ b/libcpu/arm/sep4020/context_rvds.S @@ -1,11 +1,7 @@ ;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team +; * Copyright (c) 2006-2018, RT-Thread Development Team ; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE +; * SPDX-License-Identifier: Apache-2.0 ; * ; * Change Logs: ; * Date Author Notes diff --git a/libcpu/arm/zynq7000/SConscript b/libcpu/arm/zynq7000/SConscript index 2ad51b573e..9ff30a796b 100644 --- a/libcpu/arm/zynq7000/SConscript +++ b/libcpu/arm/zynq7000/SConscript @@ -1,17 +1,23 @@ -Import('rtconfig') +# RT-Thread building script for component + from building import * +Import('rtconfig') + cwd = GetCurrentDir() -src = Glob('*.c') +src = Glob('*.c') + Glob('*.cpp') CPPPATH = [cwd] -if rtconfig.PLATFORM == 'iar': - src += Glob('*_iar.S') -elif rtconfig.PLATFORM == 'gcc': - src += Glob('*_gcc.S') -elif rtconfig.PLATFORM == 'armcc': - src += Glob('*_rvds.S') +if rtconfig.PLATFORM == 'armcc': + src += Glob('*_rvds.S') -group = DefineGroup('AM1808', src, depend = [''], CPPPATH = CPPPATH) +if rtconfig.PLATFORM == 'gcc': + src += Glob('*_init.S') + src += Glob('*_gcc.S') + +if rtconfig.PLATFORM == 'iar': + src += Glob('*_iar.S') + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/libcpu/arm/zynq7000/context_gcc.S b/libcpu/arm/zynq7000/context_gcc.S index 3dbf3c861d..98f98a0244 100644 --- a/libcpu/arm/zynq7000/context_gcc.S +++ b/libcpu/arm/zynq7000/context_gcc.S @@ -1,21 +1,11 @@ /* - * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd + * Copyright (c) 2006-2018, Shanghai Real-Thread Technology Co., Ltd * - * All rights reserved. + * SPDX-License-Identifier: Apache-2.0 * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * Change Logs: + * Date Author Notes + * 2009-01-20 Bernard first version */ #define NOINT 0xc0 diff --git a/libcpu/arm/zynq7000/cp15.h b/libcpu/arm/zynq7000/cp15.h index bd6a23f1b2..75d81736ab 100644 --- a/libcpu/arm/zynq7000/cp15.h +++ b/libcpu/arm/zynq7000/cp15.h @@ -1,24 +1,15 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2013-07-20 Bernard first version + */ + #ifndef __CP15_H__ #define __CP15_H__ -/* - * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd - * - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ unsigned long rt_cpu_get_smp_id(void); diff --git a/libcpu/arm/zynq7000/gic.c b/libcpu/arm/zynq7000/gic.c index 498446db43..e23a359e6e 100644 --- a/libcpu/arm/zynq7000/gic.c +++ b/libcpu/arm/zynq7000/gic.c @@ -1,21 +1,11 @@ /* - * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd + * Copyright (c) 2006-2018, RT-Thread Development Team * - * All rights reserved. + * SPDX-License-Identifier: Apache-2.0 * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * Change Logs: + * Date Author Notes + * 2013-07-20 Bernard first version */ #include diff --git a/libcpu/arm/zynq7000/gic.h b/libcpu/arm/zynq7000/gic.h index 4b89538948..8fcdf05f6f 100644 --- a/libcpu/arm/zynq7000/gic.h +++ b/libcpu/arm/zynq7000/gic.h @@ -1,21 +1,11 @@ /* - * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd + * Copyright (c) 2006-2018, RT-Thread Development Team * - * All rights reserved. + * SPDX-License-Identifier: Apache-2.0 * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * Change Logs: + * Date Author Notes + * 2013-07-20 Bernard first version */ #ifndef __GIC_H__ diff --git a/libcpu/arm/zynq7000/interrupt.h b/libcpu/arm/zynq7000/interrupt.h index 07eafc84e5..da266c42a2 100644 --- a/libcpu/arm/zynq7000/interrupt.h +++ b/libcpu/arm/zynq7000/interrupt.h @@ -1,24 +1,15 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2013-07-20 Bernard first version + */ + #ifndef __INTERRUPT_H__ #define __INTERRUPT_H__ -/* - * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd - * - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ void rt_hw_interrupt_clear(int vector); diff --git a/libcpu/arm/zynq7000/mmu.c b/libcpu/arm/zynq7000/mmu.c index 2a58fabe4f..fbdacca10f 100644 --- a/libcpu/arm/zynq7000/mmu.c +++ b/libcpu/arm/zynq7000/mmu.c @@ -1,21 +1,11 @@ /* - * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd + * Copyright (c) 2006-2018, RT-Thread Development Team * - * All rights reserved. + * SPDX-License-Identifier: Apache-2.0 * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * Change Logs: + * Date Author Notes + * 2013-07-20 Bernard first version */ #include diff --git a/libcpu/arm/zynq7000/trap.c b/libcpu/arm/zynq7000/trap.c index 9bf58f916c..6243ea82b4 100644 --- a/libcpu/arm/zynq7000/trap.c +++ b/libcpu/arm/zynq7000/trap.c @@ -1,21 +1,11 @@ /* - * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd + * Copyright (c) 2006-2018, RT-Thread Development Team * - * All rights reserved. + * SPDX-License-Identifier: Apache-2.0 * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * Change Logs: + * Date Author Notes + * 2013-07-20 Bernard first version */ #include diff --git a/libcpu/avr32/SConscript b/libcpu/avr32/SConscript new file mode 100644 index 0000000000..ebdd1357ee --- /dev/null +++ b/libcpu/avr32/SConscript @@ -0,0 +1,15 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/avr32/uc3/SConscript b/libcpu/avr32/uc3/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/avr32/uc3/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/blackfin/SConscript b/libcpu/blackfin/SConscript new file mode 100644 index 0000000000..ebdd1357ee --- /dev/null +++ b/libcpu/blackfin/SConscript @@ -0,0 +1,15 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/blackfin/bf53x/SConscript b/libcpu/blackfin/bf53x/SConscript new file mode 100644 index 0000000000..af9ba4bc81 --- /dev/null +++ b/libcpu/blackfin/bf53x/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_vdsp.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/c-sky/SConscript b/libcpu/c-sky/SConscript new file mode 100644 index 0000000000..36a214327b --- /dev/null +++ b/libcpu/c-sky/SConscript @@ -0,0 +1,18 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# add common code files +group = group + SConscript(os.path.join(cwd, 'common', 'SConscript')) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/c-sky/ck802/SConscript b/libcpu/c-sky/ck802/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/c-sky/ck802/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/c-sky/common/SConscript b/libcpu/c-sky/common/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/c-sky/common/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/ia32/SConscript b/libcpu/ia32/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/ia32/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/m16c/SConscript b/libcpu/m16c/SConscript new file mode 100644 index 0000000000..ebdd1357ee --- /dev/null +++ b/libcpu/m16c/SConscript @@ -0,0 +1,15 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/m16c/m16c62p/SConscript b/libcpu/m16c/m16c62p/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/m16c/m16c62p/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/mips/SConscript b/libcpu/mips/SConscript new file mode 100644 index 0000000000..ced01a4b3e --- /dev/null +++ b/libcpu/mips/SConscript @@ -0,0 +1,18 @@ +# RT-Thread building script for bridge + +import os +from building import * + +import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# add common code files +group = group + SConscript(os.path.join(cwd, 'common', 'SConscript')) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/mips/common/SConscript b/libcpu/mips/common/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/mips/common/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/mips/loongson_1b/SConscript b/libcpu/mips/loongson_1b/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/mips/loongson_1b/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/mips/loongson_1c/SConscript b/libcpu/mips/loongson_1c/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/mips/loongson_1c/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/mips/pic32/SConscript b/libcpu/mips/pic32/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/mips/pic32/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/mips/x1000/SConscript b/libcpu/mips/x1000/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/mips/x1000/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/mips/xburst/SConscript.1 b/libcpu/mips/xburst/SConscript.1 new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/mips/xburst/SConscript.1 @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/nios/SConscript b/libcpu/nios/SConscript new file mode 100644 index 0000000000..ebdd1357ee --- /dev/null +++ b/libcpu/nios/SConscript @@ -0,0 +1,15 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/nios/nios_ii/SConscript b/libcpu/nios/nios_ii/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/nios/nios_ii/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/ppc/SConscript b/libcpu/ppc/SConscript new file mode 100644 index 0000000000..36a214327b --- /dev/null +++ b/libcpu/ppc/SConscript @@ -0,0 +1,18 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# add common code files +group = group + SConscript(os.path.join(cwd, 'common', 'SConscript')) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/ppc/common/SConscript b/libcpu/ppc/common/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/ppc/common/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/ppc/common/ptrace.h b/libcpu/ppc/common/ptrace.h index d60e7fdcef..72ef31bfbc 100644 --- a/libcpu/ppc/common/ptrace.h +++ b/libcpu/ppc/common/ptrace.h @@ -21,20 +21,20 @@ #define PPC_REG unsigned long struct pt_regs { - PPC_REG gpr[32]; - PPC_REG nip; - PPC_REG msr; - PPC_REG orig_gpr3; /* Used for restarting system calls */ - PPC_REG ctr; - PPC_REG link; - PPC_REG xer; - PPC_REG ccr; - PPC_REG mq; /* 601 only (not used at present) */ - /* Used on APUS to hold IPL value. */ - PPC_REG trap; /* Reason for being here */ - PPC_REG dar; /* Fault registers */ - PPC_REG dsisr; - PPC_REG result; /* Result of a system call */ + PPC_REG gpr[32]; + PPC_REG nip; + PPC_REG msr; + PPC_REG orig_gpr3; /* Used for restarting system calls */ + PPC_REG ctr; + PPC_REG link; + PPC_REG xer; + PPC_REG ccr; + PPC_REG mq; /* 601 only (not used at present) */ + /* Used on APUS to hold IPL value. */ + PPC_REG trap; /* Reason for being here */ + PPC_REG dar; /* Fault registers */ + PPC_REG dsisr; + PPC_REG result; /* Result of a system call */ }__attribute__((packed)) CELL_STACK_FRAME_t; #endif diff --git a/libcpu/ppc/ppc405/SConscript b/libcpu/ppc/ppc405/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/ppc/ppc405/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/risc-v/SConscript b/libcpu/risc-v/SConscript new file mode 100644 index 0000000000..36a214327b --- /dev/null +++ b/libcpu/risc-v/SConscript @@ -0,0 +1,18 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# add common code files +group = group + SConscript(os.path.join(cwd, 'common', 'SConscript')) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/risc-v/common/SConscript b/libcpu/risc-v/common/SConscript new file mode 100644 index 0000000000..2f698f530a --- /dev/null +++ b/libcpu/risc-v/common/SConscript @@ -0,0 +1,12 @@ +# RT-Thread building script for component + +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/risc-v/e310/SConscript b/libcpu/risc-v/e310/SConscript index 4e4bc0c3d9..b0ae20ba02 100644 --- a/libcpu/risc-v/e310/SConscript +++ b/libcpu/risc-v/e310/SConscript @@ -1,13 +1,14 @@ -Import('rtconfig') +# RT-Thread building script for component + from building import * +Import('rtconfig') + cwd = GetCurrentDir() -src = Glob('*.c') +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') CPPPATH = [cwd] +ASFLAGS = '' -if rtconfig.PLATFORM == 'gcc': - src += Glob('*_gcc.S') - -group = DefineGroup('libcpu', src, depend = [''], CPPPATH = CPPPATH) +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) Return('group') diff --git a/libcpu/risc-v/k210/SConscript b/libcpu/risc-v/k210/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/risc-v/k210/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/risc-v/rv32m1/SConscript b/libcpu/risc-v/rv32m1/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/risc-v/rv32m1/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/rx/SConscript b/libcpu/rx/SConscript new file mode 100644 index 0000000000..e5890498c9 --- /dev/null +++ b/libcpu/rx/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_iar.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/sim/SConscript b/libcpu/sim/SConscript new file mode 100644 index 0000000000..ebdd1357ee --- /dev/null +++ b/libcpu/sim/SConscript @@ -0,0 +1,15 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/sim/posix/SConscript b/libcpu/sim/posix/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/sim/posix/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/sim/win32/SConscript b/libcpu/sim/win32/SConscript new file mode 100644 index 0000000000..afab42d47c --- /dev/null +++ b/libcpu/sim/win32/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/ti-dsp/SConscript b/libcpu/ti-dsp/SConscript new file mode 100644 index 0000000000..ebdd1357ee --- /dev/null +++ b/libcpu/ti-dsp/SConscript @@ -0,0 +1,15 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/ti-dsp/c28x/SConscript b/libcpu/ti-dsp/c28x/SConscript new file mode 100644 index 0000000000..08b274341b --- /dev/null +++ b/libcpu/ti-dsp/c28x/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*.s') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/unicore32/SConscript b/libcpu/unicore32/SConscript new file mode 100644 index 0000000000..ebdd1357ee --- /dev/null +++ b/libcpu/unicore32/SConscript @@ -0,0 +1,15 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/unicore32/sep6200/SConscript b/libcpu/unicore32/sep6200/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/unicore32/sep6200/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/v850/70f34/SConscript b/libcpu/v850/70f34/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/v850/70f34/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/v850/SConscript b/libcpu/v850/SConscript new file mode 100644 index 0000000000..ebdd1357ee --- /dev/null +++ b/libcpu/v850/SConscript @@ -0,0 +1,15 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/xilinx/SConscript b/libcpu/xilinx/SConscript new file mode 100644 index 0000000000..ebdd1357ee --- /dev/null +++ b/libcpu/xilinx/SConscript @@ -0,0 +1,15 @@ +# RT-Thread building script for bridge + +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +group = [] +list = os.listdir(cwd) + +# cpu porting code files +group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript')) + +Return('group') diff --git a/libcpu/xilinx/microblaze/SConscript b/libcpu/xilinx/microblaze/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/xilinx/microblaze/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group')