update gcc/iar assemble files according to armcc version.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@218 bbd45198-f89e-11dd-88c7-29a3b14d5316
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@ -35,7 +35,7 @@
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.type rt_hw_interrupt_disable, %function
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.type rt_hw_interrupt_disable, %function
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rt_hw_interrupt_disable:
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rt_hw_interrupt_disable:
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MRS r0, PRIMASK
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MRS r0, PRIMASK
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CPSID I
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CPSID I
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BX LR
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BX LR
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/*
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/*
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@ -60,21 +60,21 @@ rt_hw_interrupt_enable:
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rt_hw_context_switch_interrupt:
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rt_hw_context_switch_interrupt:
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rt_hw_context_switch:
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rt_hw_context_switch:
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/* set rt_thread_switch_interrput_flag to 1 */
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/* set rt_thread_switch_interrput_flag to 1 */
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LDR r2, =rt_thread_switch_interrput_flag
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LDR r2, =rt_thread_switch_interrput_flag
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LDR r3, [r2]
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LDR r3, [r2]
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CMP r3, #1
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CMP r3, #1
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BEQ _reswitch
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BEQ _reswitch
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MOV r3, #1
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MOV r3, #1
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STR r3, [r2]
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STR r3, [r2]
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LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */
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LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */
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STR r0, [r2]
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STR r0, [r2]
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_reswitch:
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_reswitch:
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LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */
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LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */
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STR r1, [r2]
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STR r1, [r2]
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LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
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LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
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LDR r1, =NVIC_PENDSVSET
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LDR r1, =NVIC_PENDSVSET
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STR r1, [r0]
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STR r1, [r0]
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BX LR
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BX LR
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@ -88,10 +88,14 @@ _reswitch:
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rt_hw_pend_sv:
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rt_hw_pend_sv:
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/* disable interrupt to protect context switch */
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/* disable interrupt to protect context switch */
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MRS r2, PRIMASK
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MRS r2, PRIMASK
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CPSID I
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CPSID I
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/* get rt_thread_switch_interrupt_flag */
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LDR r0, =rt_thread_switch_interrput_flag
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LDR r1, [r0]
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CBZ r1, pendsv_exit /* pendsv already handled */
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/* clear rt_thread_switch_interrput_flag to 0 */
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/* clear rt_thread_switch_interrput_flag to 0 */
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LDR r0, =rt_thread_switch_interrput_flag
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MOV r1, #0x00
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MOV r1, #0x00
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STR r1, [r0]
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STR r1, [r0]
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@ -99,19 +103,20 @@ rt_hw_pend_sv:
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LDR r1, [r0]
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LDR r1, [r0]
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CBZ r1, swtich_to_thread /* skip register save at the first time */
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CBZ r1, swtich_to_thread /* skip register save at the first time */
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MRS r1, psp /* get from thread stack pointer */
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MRS r1, psp /* get from thread stack pointer */
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STMFD r1!, {r4 - r11} /* push r4 - r11 register */
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STMFD r1!, {r4 - r11} /* push r4 - r11 register */
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LDR r0, [r0]
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LDR r0, [r0]
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STR r1, [r0] /* update from thread stack pointer */
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STR r1, [r0] /* update from thread stack pointer */
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swtich_to_thread:
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swtich_to_thread:
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LDR r1, =rt_interrupt_to_thread
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LDR r1, =rt_interrupt_to_thread
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LDR r1, [r1]
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LDR r1, [r1]
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LDR r1, [r1] /* load thread stack pointer */
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LDR r1, [r1] /* load thread stack pointer */
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LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
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LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
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MSR psp, r1 /* update stack pointer */
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MSR psp, r1 /* update stack pointer */
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pendsv_exit:
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/* restore interrupt */
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/* restore interrupt */
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MSR PRIMASK, r2
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MSR PRIMASK, r2
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@ -133,6 +138,11 @@ rt_hw_context_switch_to:
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MOV r0, #0x0
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MOV r0, #0x0
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STR r0, [r1]
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STR r0, [r1]
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/* set interrupt flag to 1 */
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LDR r1, =rt_thread_switch_interrput_flag
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MOV r0, #1
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STR r0, [r1]
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/* set the PendSV exception priority */
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/* set the PendSV exception priority */
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LDR r0, =NVIC_SYSPRI2
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LDR r0, =NVIC_SYSPRI2
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LDR r1, =NVIC_PENDSV_PRI
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LDR r1, =NVIC_PENDSV_PRI
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@ -142,7 +152,7 @@ rt_hw_context_switch_to:
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LDR r1, =NVIC_PENDSVSET
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LDR r1, =NVIC_PENDSVSET
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STR r1, [r0]
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STR r1, [r0]
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CPSIE I /* enable interrupts at processor level */
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CPSIE I /* enable interrupts at processor level */
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/* never reach here! */
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/* never reach here! */
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@ -88,8 +88,12 @@ rt_hw_pend_sv:
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MRS r2, PRIMASK
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MRS r2, PRIMASK
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CPSID I
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CPSID I
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; clear rt_thread_switch_interrput_flag to 0
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; get rt_thread_switch_interrupt_flag
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LDR r0, =rt_thread_switch_interrput_flag
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LDR r0, =rt_thread_switch_interrput_flag
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LDR r1, [r0]
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CBZ r1, pendsv_exit ; pendsv already handled
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; clear rt_thread_switch_interrput_flag to 0
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MOV r1, #0x00
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MOV r1, #0x00
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STR r1, [r0]
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STR r1, [r0]
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@ -110,6 +114,7 @@ swtich_to_thread
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LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
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LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
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MSR psp, r1 ; update stack pointer
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MSR psp, r1 ; update stack pointer
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pendsv_exit
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; restore interrupt
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; restore interrupt
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MSR PRIMASK, r2
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MSR PRIMASK, r2
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@ -130,6 +135,11 @@ rt_hw_context_switch_to:
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MOV r0, #0x0
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MOV r0, #0x0
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STR r0, [r1]
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STR r0, [r1]
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; set interrupt flag to 1
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LDR r1, =rt_thread_switch_interrput_flag
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MOV r0, #1
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STR r0, [r1]
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; set the PendSV exception priority
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; set the PendSV exception priority
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LDR r0, =NVIC_SYSPRI2
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LDR r0, =NVIC_SYSPRI2
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LDR r1, =NVIC_PENDSV_PRI
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LDR r1, =NVIC_PENDSV_PRI
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@ -107,7 +107,6 @@ rt_hw_pend_sv PROC
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MRS r1, psp ; get from thread stack pointer
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MRS r1, psp ; get from thread stack pointer
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STMFD r1!, {r4 - r11} ; push r4 - r11 register
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STMFD r1!, {r4 - r11} ; push r4 - r11 register
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LDR r0, [r0]
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LDR r0, [r0]
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STR r1, [r0] ; update from thread stack pointer
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STR r1, [r0] ; update from thread stack pointer
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swtich_to_thread
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swtich_to_thread
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