[bsp\raspi4]move io to `iomap.h`
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098eccc057
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bcae196541
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@ -18,10 +18,6 @@
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#include "mmu.h"
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#include "mmu.h"
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static rt_uint64_t timerStep;
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static rt_uint64_t timerStep;
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// 0x40, 0x44, 0x48, 0x4c: Core 0~3 Timers interrupt control
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#define CORE0_TIMER_IRQ_CTRL HWREG32(0xFF800040)
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#define TIMER_IRQ 30
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#define NON_SECURE_TIMER_IRQ (1 << 1)
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int rt_hw_get_gtimer_frq(void);
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int rt_hw_get_gtimer_frq(void);
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void rt_hw_set_gtimer_val(rt_uint64_t value);
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void rt_hw_set_gtimer_val(rt_uint64_t value);
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@ -29,7 +25,7 @@ int rt_hw_get_gtimer_val(void);
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int rt_hw_get_cntpct_val(void);
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int rt_hw_get_cntpct_val(void);
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void rt_hw_gtimer_enable(void);
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void rt_hw_gtimer_enable(void);
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void core0_timer_enable_interrupt_controller()
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void core0_timer_enable_interrupt_controller(void)
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{
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{
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CORE0_TIMER_IRQ_CTRL |= NON_SECURE_TIMER_IRQ;
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CORE0_TIMER_IRQ_CTRL |= NON_SECURE_TIMER_IRQ;
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}
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}
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@ -12,6 +12,7 @@
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#define BOARD_H__
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#define BOARD_H__
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#include <stdint.h>
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#include <stdint.h>
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#include "iomap.h"
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extern unsigned char __bss_start;
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extern unsigned char __bss_start;
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extern unsigned char __bss_end;
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extern unsigned char __bss_end;
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@ -22,4 +23,3 @@ extern unsigned char __bss_end;
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void rt_hw_board_init(void);
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void rt_hw_board_init(void);
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#endif
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#endif
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@ -17,8 +17,6 @@
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#include "board.h"
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#include "board.h"
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#include "interrupt.h"
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#include "interrupt.h"
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#define GPIO_BASE (0xFE000000 + 0x00200000)
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#define GPIO_REG_GPFSEL0(BASE) HWREG32(BASE + 0x00)
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#define GPIO_REG_GPFSEL0(BASE) HWREG32(BASE + 0x00)
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#define GPIO_REG_GPFSEL1(BASE) HWREG32(BASE + 0x04)
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#define GPIO_REG_GPFSEL1(BASE) HWREG32(BASE + 0x04)
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#define GPIO_REG_GPFSEL2(BASE) HWREG32(BASE + 0x08)
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#define GPIO_REG_GPFSEL2(BASE) HWREG32(BASE + 0x08)
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@ -16,12 +16,6 @@
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#include "drv_uart.h"
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#include "drv_uart.h"
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#include "drv_gpio.h"
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#include "drv_gpio.h"
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#define UART0_BASE (0xFE000000 + 0x00201000)
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#define PL011_BASE UART0_BASE
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#define IRQ_PL011 (121 + 32)
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#define UART_REFERENCE_CLOCK 48000000
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struct hw_uart_device
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struct hw_uart_device
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{
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{
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rt_ubase_t hw_base;
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rt_ubase_t hw_base;
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@ -81,4 +81,3 @@
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int rt_hw_uart_init(void);
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int rt_hw_uart_init(void);
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#endif /* DRV_UART_H__ */
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#endif /* DRV_UART_H__ */
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@ -1,8 +1,23 @@
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#ifndef __RASPI4_H__
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#ifndef __RASPI4_H__
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#define __RASPI4_H__
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#define __RASPI4_H__
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#define ARM_GIC_NR_IRQS 512
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//gpio
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#define INTC_BASE 0xff800000
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#define GPIO_BASE (0xFE000000 + 0x00200000)
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//uart
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#define UART0_BASE (0xFE000000 + 0x00201000)
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#define PL011_BASE UART0_BASE
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#define IRQ_PL011 (121 + 32)
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#define UART_REFERENCE_CLOCK (48000000)
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// 0x40, 0x44, 0x48, 0x4c: Core 0~3 Timers interrupt control
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#define CORE0_TIMER_IRQ_CTRL HWREG32(0xFF800040)
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#define TIMER_IRQ 30
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#define NON_SECURE_TIMER_IRQ (1 << 1)
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//gic max
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#define ARM_GIC_NR_IRQS (512)
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#define INTC_BASE (0xff800000)
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#define GIC_V2_DISTRIBUTOR_BASE (INTC_BASE + 0x00041000)
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#define GIC_V2_DISTRIBUTOR_BASE (INTC_BASE + 0x00041000)
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#define GIC_V2_CPU_INTERFACE_BASE (INTC_BASE + 0x00042000)
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#define GIC_V2_CPU_INTERFACE_BASE (INTC_BASE + 0x00042000)
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#define GIC_V2_HYPERVISOR_BASE (INTC_BASE + 0x00044000)
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#define GIC_V2_HYPERVISOR_BASE (INTC_BASE + 0x00044000)
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