Merge pull request #20 from RT-Thread/master

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This commit is contained in:
Meco Jianting Man 2021-02-24 08:01:14 -06:00 committed by GitHub
commit bc28df8b35
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GPG Key ID: 4AEE18F83AFDEB23
21 changed files with 539 additions and 158 deletions

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@ -211,7 +211,6 @@
#endif
/* SECTION: Runtime library */
// #define RT_USING_NOLIBC
// #define RT_USING_NEWLIB
#define RT_LIBC_USING_TIME

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@ -34,6 +34,7 @@ if GetDepend(['BSP_USING_HWTIMER']) or GetDepend(['BSP_USING_PWM']):
if GetDepend(['BSP_USING_PWM']):
src += ['MIMXRT1052/drivers/fsl_pwm.c']
src += ['MIMXRT1052/drivers/fsl_qtmr.c']
if GetDepend(['BSP_USING_RTC']):
src += ['MIMXRT1052/drivers/fsl_snvs_hp.c']
@ -52,9 +53,6 @@ if GetDepend(['BSP_USING_SDRAM']):
if GetDepend(['BSP_USING_LCD']):
src += ['MIMXRT1052/drivers/fsl_elcdif.c']
if GetDepend(['RT_USING_USB_HOST']) or GetDepend(['RT_USING_USB_DEVICE']):
src += ['MIMXRT1052/drivers/fsl_usdhc.c']
if GetDepend(['BSP_USING_CAN']):
src += ['MIMXRT1052/drivers/fsl_flexcan.c']
@ -78,6 +76,9 @@ if GetDepend(['BSP_USING_DMA']):
src += ['MIMXRT1052/drivers/fsl_lpspi_edma.c']
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path)
if rtconfig.CROSS_TOOL == 'gcc':
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, ASFLAGS = '$ASFLAGS -D __STARTUP_CLEAR_BSS')
else:
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path)
Return('group')

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@ -49,9 +49,6 @@ if GetDepend(['BSP_USING_ADC']):
if GetDepend(['BSP_USING_SDRAM']):
src += ['MIMXRT1064/drivers/fsl_semc.c']
if GetDepend(['RT_USING_USB_HOST']) or GetDepend(['RT_USING_USB_DEVICE']):
src += ['MIMXRT1064/drivers/fsl_usdhc.c']
if GetDepend(['RT_USING_CAN']):
src += ['MIMXRT1064/drivers/fsl_flexcan.c']
@ -77,6 +74,9 @@ if GetDepend(['RT_SERIAL_USING_DMA']):
src += ['MIMXRT1064/drivers/fsl_lpuart_edma.c']
src += ['MIMXRT1064/drivers/fsl_lpspi_edma.c']
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path)
if rtconfig.CROSS_TOOL == 'gcc':
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, ASFLAGS = '$ASFLAGS -D __STARTUP_CLEAR_BSS')
else:
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path)
Return('group')

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@ -16,8 +16,12 @@
#if !defined(BSP_USING_PWM1_CH0) && !defined(BSP_USING_PWM1_CH1) && !defined(BSP_USING_PWM1_CH2) && !defined(BSP_USING_PWM1_CH3) && \
!defined(BSP_USING_PWM2_CH0) && !defined(BSP_USING_PWM2_CH1) && !defined(BSP_USING_PWM2_CH2) && !defined(BSP_USING_PWM2_CH3) && \
!defined(BSP_USING_PWM3_CH0) && !defined(BSP_USING_PWM3_CH1) && !defined(BSP_USING_PWM3_CH2) && !defined(BSP_USING_PWM3_CH3) && \
!defined(BSP_USING_PWM4_CH0) && !defined(BSP_USING_PWM4_CH1) && !defined(BSP_USING_PWM4_CH2) && !defined(BSP_USING_PWM4_CH3)
#error "Please define at least one BSP_USING_PWMx_CHx"
!defined(BSP_USING_PWM4_CH0) && !defined(BSP_USING_PWM4_CH1) && !defined(BSP_USING_PWM4_CH2) && !defined(BSP_USING_PWM4_CH3) && \
!defined(BSP_USING_QTMR1_CH0) && !defined(BSP_USING_QTMR1_CH1) && !defined(BSP_USING_QTMR1_CH2) && !defined(BSP_USING_QTMR1_CH3) && \
!defined(BSP_USING_QTMR2_CH0) && !defined(BSP_USING_QTMR2_CH1) && !defined(BSP_USING_QTMR2_CH2) && !defined(BSP_USING_QTMR2_CH3) && \
!defined(BSP_USING_QTMR3_CH0) && !defined(BSP_USING_QTMR3_CH1) && !defined(BSP_USING_QTMR3_CH2) && !defined(BSP_USING_QTMR3_CH3) && \
!defined(BSP_USING_QTMR4_CH0) && !defined(BSP_USING_QTMR4_CH1) && !defined(BSP_USING_QTMR4_CH2) && !defined(BSP_USING_QTMR4_CH3)
#error "Please define at least one BSP_USING_PWMx_CHx or BSP_USING_QTMRx_CHx"
#endif
#define LOG_TAG "drv.pwm"
@ -25,6 +29,9 @@
#include <rtdevice.h>
#include "fsl_pwm.h"
#if defined(FSL_FEATURE_SOC_TMR_COUNT) && FSL_FEATURE_SOC_TMR_COUNT > 0
#include "fsl_qtmr.h"
#endif
#include "drv_pwm.h"
#define DEFAULT_PRE 5
@ -153,7 +160,7 @@ static rt_err_t imxrt_drv_pwm_init(PWM_Type *base, pwm_submodule_t pwm_submodule
if (PWM_Init(base, pwm_submodule, &PwmConfig) == kStatus_Fail)
{
LOG_E("init pwm failed \n");
return RT_ERROR;
return -RT_ERROR;
}
base->SM[fault_input].DISMAP[0] = 0x00;
@ -176,28 +183,28 @@ static rt_err_t imxrt_pwm1_init(PWM_Type *base)
#ifdef BSP_USING_PWM1_CH0
if (imxrt_drv_pwm_init(base, kPWM_Module_0, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM1_CH0 */
#ifdef BSP_USING_PWM1_CH1
if (imxrt_drv_pwm_init(base, kPWM_Module_1, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM1_CH1 */
#ifdef BSP_USING_PWM1_CH2
if (imxrt_drv_pwm_init(base, kPWM_Module_2, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /*BSP_USING_PWM1_CH2 */
#ifdef BSP_USING_PWM1_CH3
if (imxrt_drv_pwm_init(base, kPWM_Module_3, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM1_CH3 */
@ -213,28 +220,28 @@ static rt_err_t imxrt_pwm2_init(PWM_Type *base)
#ifdef BSP_USING_PWM2_CH0
if (imxrt_drv_pwm_init(base, kPWM_Module_0, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM2_CH0 */
#ifdef BSP_USING_PWM2_CH1
if (imxrt_drv_pwm_init(base, kPWM_Module_1, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM2_CH1 */
#ifdef BSP_USING_PWM2_CH2
if (imxrt_drv_pwm_init(base, kPWM_Module_2, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /*BSP_USING_PWM2_CH2 */
#ifdef BSP_USING_PWM2_CH3
if (imxrt_drv_pwm_init(base, kPWM_Module_3, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM2_CH3 */
@ -250,28 +257,28 @@ static rt_err_t imxrt_pwm3_init(PWM_Type *base)
#ifdef BSP_USING_PWM3_CH0
if (imxrt_drv_pwm_init(base, kPWM_Module_0, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM3_CH0 */
#ifdef BSP_USING_PWM3_CH1
if (imxrt_drv_pwm_init(base, kPWM_Module_1, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM3_CH1 */
#ifdef BSP_USING_PWM3_CH2
if (imxrt_drv_pwm_init(base, kPWM_Module_2, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /*BSP_USING_PWM3_CH2 */
#ifdef BSP_USING_PWM3_CH3
if (imxrt_drv_pwm_init(base, kPWM_Module_3, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM3_CH3 */
@ -287,28 +294,28 @@ static rt_err_t imxrt_pwm4_init(PWM_Type *base)
#ifdef BSP_USING_PWM4_CH0
if (imxrt_drv_pwm_init(base, kPWM_Module_0, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM4_CH0 */
#ifdef BSP_USING_PWM4_CH1
if (imxrt_drv_pwm_init(base, kPWM_Module_1, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM4_CH1 */
#ifdef BSP_USING_PWM4_CH2
if (imxrt_drv_pwm_init(base, kPWM_Module_2, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /*BSP_USING_PWM4_CH2 */
#ifdef BSP_USING_PWM4_CH3
if (imxrt_drv_pwm_init(base, kPWM_Module_3, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return RT_ERROR;
return -RT_ERROR;
}
#endif /* BSP_USING_PWM4_CH3 */
@ -317,6 +324,224 @@ static rt_err_t imxrt_pwm4_init(PWM_Type *base)
#endif /* BSP_USING_PWM4 */
static rt_err_t imxrt_drv_qtmr_control(struct rt_device_pwm *device, int cmd, void *arg);
static struct rt_pwm_ops imxrt_drv_qtmr_ops =
{
.control = imxrt_drv_qtmr_control
};
static rt_err_t imxrt_drv_qtmr_enable(struct rt_device_pwm *device, struct rt_pwm_configuration *configuration, rt_bool_t enable)
{
TMR_Type *base;
base = (TMR_Type *)device->parent.user_data;
if (!enable)
{
QTMR_StopTimer(base, configuration->channel);
base->CHANNEL[configuration->channel].SCTRL |= (TMR_SCTRL_FORCE_MASK | TMR_SCTRL_OEN_MASK);
}
else
{
QTMR_StartTimer(base, configuration->channel, kQTMR_PriSrcRiseEdge);
}
return RT_EOK;
}
static rt_err_t imxrt_drv_qtmr_get(struct rt_device_pwm *device, struct rt_pwm_configuration *configuration)
{
TMR_Type *base;
rt_uint32_t high_count, low_count, clk_divider, clk_freq;
base = (TMR_Type *)device->parent.user_data;
low_count = base->CHANNEL[configuration->channel].COMP1;
high_count = base->CHANNEL[configuration->channel].COMP2;
clk_divider = 1 << (((base->CHANNEL[configuration->channel].CTRL & TMR_CTRL_PCS_MASK) >> TMR_CTRL_PCS_SHIFT) - 8);
clk_freq = CLOCK_GetFreq(kCLOCK_IpgClk) / clk_divider;
configuration->period = 1000000000 / clk_freq * (high_count + low_count);
configuration->pulse = 1000000000 / clk_freq * high_count;
return RT_EOK;
}
static rt_err_t imxrt_drv_qtmr_set(struct rt_device_pwm *device, struct rt_pwm_configuration *configuration)
{
RT_ASSERT(configuration->period > 0);
RT_ASSERT(configuration->pulse <= configuration->period);
TMR_Type *base = (TMR_Type *)device->parent.user_data;
rt_size_t clk_freq = CLOCK_GetFreq(kCLOCK_IpgClk) / (1 << (((base->CHANNEL[configuration->channel].CTRL & TMR_CTRL_PCS_MASK) >> TMR_CTRL_PCS_SHIFT) - 8));
rt_size_t current_period_count = base->CHANNEL[configuration->channel].CMPLD1 + base->CHANNEL[configuration->channel].CMPLD2;
rt_size_t period_count = clk_freq / (1000000000 / configuration->period);
if (current_period_count == period_count)
{
rt_size_t high_count = period_count * configuration->pulse / configuration->period;
rt_size_t low_count = period_count - high_count;
base->CHANNEL[configuration->channel].CMPLD1 = (uint16_t)low_count;
base->CHANNEL[configuration->channel].CMPLD2 = (uint16_t)high_count;
}
else
{
rt_bool_t timer_is_on = base->CHANNEL[configuration->channel].CTRL & TMR_CTRL_CM_MASK;
rt_uint8_t duty = configuration->pulse * 100 / configuration->period;
QTMR_StopTimer(base, configuration->channel);
if (kStatus_Success != QTMR_SetupPwm(base, configuration->channel, 1000000000 / configuration->period, duty, DEFAULT_POLARITY, clk_freq))
{
LOG_E(LOG_TAG" setup pwm failed \n");
return -RT_ERROR;
}
if (timer_is_on)
{
QTMR_StartTimer(base, configuration->channel, kQTMR_PriSrcRiseEdge);
}
}
return RT_EOK;
}
static rt_err_t imxrt_drv_qtmr_control(struct rt_device_pwm *device, int cmd, void *arg)
{
struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
switch (cmd)
{
case PWM_CMD_ENABLE:
return imxrt_drv_qtmr_enable(device, configuration, RT_TRUE);
case PWM_CMD_DISABLE:
return imxrt_drv_qtmr_enable(device, configuration, RT_FALSE);
case PWM_CMD_SET:
return imxrt_drv_qtmr_set(device, configuration);
case PWM_CMD_GET:
return imxrt_drv_qtmr_get(device, configuration);
default:
return RT_EINVAL;
}
}
static rt_err_t imxrt_drv_qtmr_init(TMR_Type *base, qtmr_channel_selection_t channel, uint16_t psc, uint32_t fre, uint8_t duty)
{
qtmr_config_t qtmr_config;
rt_uint32_t qtmr_clock_freq;
QTMR_GetDefaultConfig(&qtmr_config);
qtmr_config.primarySource = (qtmr_primary_count_source_t)(psc + 8);
qtmr_clock_freq = CLOCK_GetFreq(kCLOCK_IpgClk) / (1 << psc);
QTMR_Init(base, channel, &qtmr_config);
if (kStatus_Success != QTMR_SetupPwm(base, channel, fre, duty, DEFAULT_POLARITY, qtmr_clock_freq))
{
LOG_E(LOG_TAG" setup pwm failed \n");
return -RT_ERROR;
}
return RT_EOK;
}
static rt_err_t imxrt_qtmr_init()
{
TMR_Type *base_list[] =
{
#ifdef BSP_USING_QTMR1
TMR1,
#endif
#ifdef BSP_USING_QTMR2
TMR2,
#endif
#ifdef BSP_USING_QTMR3
TMR3,
#endif
#ifdef BSP_USING_QTMR4
TMR4,
#endif
};
rt_uint8_t channel_list[] =
{
#ifdef BSP_USING_QTMR1
#ifdef BSP_USING_QTMR1_CH0
1 << 0 |
#endif
#ifdef BSP_USING_QTMR1_CH1
1 << 1 |
#endif
#ifdef BSP_USING_QTMR1_CH2
1 << 2 |
#endif
#ifdef BSP_USING_QTMR1_CH3
1 << 3 |
#endif
0,
#endif
#ifdef BSP_USING_QTMR2
#ifdef BSP_USING_QTMR2_CH0
1 << 0 |
#endif
#ifdef BSP_USING_QTMR2_CH1
1 << 1 |
#endif
#ifdef BSP_USING_QTMR2_CH2
1 << 2 |
#endif
#ifdef BSP_USING_QTMR2_CH3
1 << 3 |
#endif
0,
#endif
#ifdef BSP_USING_QTMR3
#ifdef BSP_USING_QTMR3_CH0
1 << 0 |
#endif
#ifdef BSP_USING_QTMR3_CH1
1 << 1 |
#endif
#ifdef BSP_USING_QTMR3_CH2
1 << 2 |
#endif
#ifdef BSP_USING_QTMR3_CH3
1 << 3 |
#endif
0,
#endif
#ifdef BSP_USING_QTMR4
#ifdef BSP_USING_QTMR4_CH0
1 << 0 |
#endif
#ifdef BSP_USING_QTMR4_CH1
1 << 1 |
#endif
#ifdef BSP_USING_QTMR4_CH2
1 << 2 |
#endif
#ifdef BSP_USING_QTMR4_CH3
1 << 3 |
#endif
0,
#endif
};
for (rt_uint8_t i = 0; i < sizeof(base_list)/sizeof(TMR_Type *); ++i)
{
for (rt_uint8_t j = 0; j < 8; ++j)
{
if ((channel_list[i] >> j) & 1)
{
if (imxrt_drv_qtmr_init(base_list[i], j, DEFAULT_PRE, DEFAULT_FRE, DEFAULT_DUTY) != RT_EOK)
{
return -RT_ERROR;
}
}
}
}
return RT_EOK;
}
int rt_hw_pwm_init(void)
{
rt_err_t ret = RT_EOK;
@ -391,9 +616,52 @@ int rt_hw_pwm_init(void)
}
#endif /* BSP_USING_PWM4 */
#if defined(BSP_USING_QTMR1) || defined(BSP_USING_QTMR2) || defined(BSP_USING_QTMR3) || defined(BSP_USING_QTMR4)
if (imxrt_qtmr_init() != RT_EOK)
{
LOG_E(LOG_TAG" init qtmr failed");
}
#endif
#ifdef BSP_USING_QTMR1
static struct rt_device_pwm qtmr1_device;
ret = rt_device_pwm_register(&qtmr1_device, "pwm5", &imxrt_drv_qtmr_ops, TMR1);
if (ret != RT_EOK)
{
LOG_E("%s register failed", "pwm5");
}
#endif /* BSP_USING_QTMR1 */
#ifdef BSP_USING_QTMR2
static struct rt_device_pwm qtmr2_device;
ret = rt_device_pwm_register(&qtmr2_device, "pwm6", &imxrt_drv_qtmr_ops, TMR2);
if (ret != RT_EOK)
{
LOG_E("%s register failed", "pwm6");
}
#endif /* BSP_USING_QTMR2 */
#ifdef BSP_USING_QTMR3
static struct rt_device_pwm qtmr3_device;
ret = rt_device_pwm_register(&qtmr3_device, "pwm7", &imxrt_drv_qtmr_ops, TMR3);
if (ret != RT_EOK)
{
LOG_E("%s register failed", "pwm7");
}
#endif /* BSP_USING_QTMR3 */
#ifdef BSP_USING_QTMR4
static struct rt_device_pwm qtmr4_device;
ret = rt_device_pwm_register(&qtmr4_device, "pwm8", &imxrt_drv_qtmr_ops, TMR4);
if (ret != RT_EOK)
{
LOG_E("%s register failed", "pwm8");
}
#endif /* BSP_USING_QTMR4 */
return ret;
}
INIT_DEVICE_EXPORT(rt_hw_pwm_init);
INIT_BOARD_EXPORT(rt_hw_pwm_init);
#endif /* BSP_USING_PWM */

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@ -64,6 +64,8 @@ struct imxrt_spi
char *bus_name;
LPSPI_Type *base;
struct rt_spi_bus spi_bus;
rt_sem_t xfer_sem;
lpspi_master_handle_t spi_normal;
struct dma_config *dma;
rt_uint8_t dma_flag;
};
@ -159,9 +161,18 @@ static void spi_get_dma_config(void)
#endif
}
void normal_xfer_callback(LPSPI_Type *base, lpspi_master_handle_t *handle, status_t status, void *userData)
{
/* xfer complete callback */
struct imxrt_spi *spi = (struct imxrt_spi *)userData;
rt_sem_release(spi->xfer_sem);
}
void edma_xfer_callback(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, status_t status, void *userData)
{
/* xfer complete callback */
struct imxrt_spi *spi = (struct imxrt_spi *)userData;
rt_sem_release(spi->xfer_sem);
}
rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t pin)
@ -217,6 +228,17 @@ static uint32_t imxrt_get_lpspi_freq(void)
return freq;
}
static void lpspi_normal_config(struct imxrt_spi *spi)
{
RT_ASSERT(spi != RT_NULL);
LPSPI_MasterTransferCreateHandle(spi->base,
&spi->spi_normal,
normal_xfer_callback,
spi);
LOG_D(LOG_TAG" %s normal config done\n", spi->bus_name);
}
static void lpspi_dma_config(struct imxrt_spi *spi)
{
RT_ASSERT(spi != RT_NULL);
@ -325,12 +347,17 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
if(RT_FALSE == spi->dma_flag)
{
#ifdef BSP_USING_BLOCKING_SPI
status = LPSPI_MasterTransferBlocking(spi->base, &transfer);
#else
status = LPSPI_MasterTransferNonBlocking(spi->base, &spi->spi_normal, &transfer);
#endif
}
else
{
status = LPSPI_MasterTransferEDMA(spi->base,&spi->dma->spi_edma,&transfer);
}
rt_sem_take(spi->xfer_sem, RT_WAITING_FOREVER);
if(message->cs_release)
{
@ -369,6 +396,13 @@ int rt_hw_spi_bus_init(void)
{
lpspi_dma_config(&lpspis[i]);
}
else
{
lpspi_normal_config(&lpspis[i]);
}
char sem_name[RT_NAME_MAX];
rt_sprintf(sem_name, "%s_s", lpspis[i].bus_name);
lpspis[i].xfer_sem = rt_sem_create(sem_name, 0, RT_IPC_FLAG_PRIO);
}
return ret;

View File

@ -60,6 +60,23 @@ static rt_err_t pico_uart_configure(struct rt_serial_device *serial, struct seri
static rt_err_t pico_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
// Select correct interrupt for the UART we are using
int UART_IRQ = UART_ID == uart0 ? UART0_IRQ : UART1_IRQ;
switch (cmd)
{
/* enable interrupt */
case RT_DEVICE_CTRL_SET_INT:
// Set up a RX interrupt
// We need to set up the handler first
// And set up and enable the interrupt handlers
irq_set_exclusive_handler(UART_IRQ, pico_uart_isr);
irq_set_enabled(UART_IRQ, true);
// Now enable the UART to send interrupts - RX only
uart_set_irq_enables(UART_ID, true, false);
break;
}
return RT_EOK;
}
@ -125,18 +142,6 @@ int rt_hw_uart_init(void)
// Turn off FIFO's - we want to do this character by character
uart_set_fifo_enabled(UART_ID, false);
// Set up a RX interrupt
// We need to set up the handler first
// Select correct interrupt for the UART we are using
int UART_IRQ = UART_ID == uart0 ? UART0_IRQ : UART1_IRQ;
// And set up and enable the interrupt handlers
irq_set_exclusive_handler(UART_IRQ, pico_uart_isr);
irq_set_enabled(UART_IRQ, true);
// Now enable the UART to send interrupts - RX only
uart_set_irq_enables(UART_ID, true, false);
uart0_dev.parent.ops = &_uart_ops;
uart0_dev.parent.config = config;

View File

@ -17,9 +17,6 @@
#pragma warning(disable:4267) /* to ignore: warning C4267: conversion from 'size_t' to 'rt_size_t', possible loss of data */
#pragma warning(disable:4244) /* to ignore: warning C4244: '=' : conversion from '__w64 int' to 'rt_size_t', possible loss of data */
#elif defined(__GNUC__)
#define RT_USING_NOLIBC
#endif /* end of _MSC_VER */
#endif

View File

@ -341,7 +341,7 @@ rt_err_t stm32_qspi_bus_attach_device(const char *bus_name, const char *device_n
qspi_device->exit_qspi_mode = exit_qspi_mode;
qspi_device->config.qspi_dl_width = data_line_width;
cs_pin->Pin = pin;
cs_pin->pin = pin;
#ifdef BSP_QSPI_USING_SOFTCS
rt_pin_mode(pin, PIN_MODE_OUTPUT);
rt_pin_write(pin, 1);

View File

@ -53,7 +53,6 @@
/* Using Small MM*/
#define RT_USING_SMALL_MEM
// #define RT_USING_NOLIBC
#define RT_TINY_SIZE
/* SECTION: Device System */

View File

@ -15,7 +15,9 @@
typedef int32_t clockid_t;
typedef int32_t key_t; /* Used for interprocess communication. */
typedef int32_t pid_t; /* Used for process IDs and process group IDs. */
typedef int pid_t; /* Used for process IDs and process group IDs. */
typedef unsigned short uid_t;
typedef unsigned short gid_t;
#ifndef ARCH_CPU_64BIT
typedef signed int ssize_t; /* Used for a count of bytes or an error indication. */
#else

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@ -73,4 +73,11 @@ char * ttyname (int desc);
unsigned int sleep(unsigned int seconds);
int usleep(useconds_t usec);
pid_t getpid(void);
pid_t getppid(void);
uid_t getuid(void);
uid_t geteuid(void);
gid_t getgid(void);
gid_t getegid(void);
#endif /* _SYS_UNISTD_H */

View File

@ -1,8 +1,8 @@
## Attentions
1. This folder is "common" for armlibc newlibc and dlib. It's not "common" for minilibc.
1. This folder is "common" for armlibc newlibc and dlib.
2. If you want to add new .c files, please do not forget to fix SConscript file too. eg:
2. If you want to add new `.c` files, please do not forget to fix SConscript file too. eg:
```python
if GetDepend('RT_USING_POSIX') == False:

View File

@ -14,18 +14,10 @@ void __rt_libc_exit(int status)
{
rt_thread_t self = rt_thread_self();
#ifdef RT_USING_MODULE
if (dlmodule_self())
{
dlmodule_exit(status);
}
#endif
if (self != RT_NULL)
{
rt_kprintf("thread:%s exit:%d!\n", self->name, status);
rt_thread_suspend(self);
rt_schedule();
rt_thread_control(self, RT_THREAD_CTRL_CLOSE, RT_NULL);
}
}

View File

@ -49,3 +49,40 @@ int usleep(useconds_t usec)
return 0;
}
RTM_EXPORT(usleep);
pid_t getpid(void)
{
/*TODO*/
return 0;
}
RTM_EXPORT(getpid);
pid_t getppid(void)
{
return 0;
}
RTM_EXPORT(getppid);
uid_t getuid(void)
{
return 0; /*ROOT*/
}
RTM_EXPORT(getuid);
uid_t geteuid(void)
{
return 0; /*ROOT*/
}
RTM_EXPORT(geteuid);
gid_t getgid(void)
{
return 0; /*ROOT*/
}
RTM_EXPORT(getgid);
gid_t getegid(void)
{
return 0; /*ROOT*/
}
RTM_EXPORT(getegid);

View File

@ -14,7 +14,9 @@
typedef int32_t clockid_t;
typedef int32_t key_t; /* Used for interprocess communication. */
typedef int32_t pid_t; /* Used for process IDs and process group IDs. */
typedef int pid_t; /* Used for process IDs and process group IDs. */
typedef unsigned short uid_t;
typedef unsigned short gid_t;
#ifndef ARCH_CPU_64BIT
typedef signed int ssize_t; /* Used for a count of bytes or an error indication. */
#else

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@ -47,4 +47,11 @@ char * ttyname (int desc);
unsigned int sleep(unsigned int seconds);
int usleep(useconds_t usec);
pid_t getpid(void);
pid_t getppid(void);
uid_t getuid(void);
uid_t geteuid(void);
gid_t getgid(void);
gid_t getegid(void);
#endif /* _SYS_UNISTD_H */

View File

@ -7,12 +7,13 @@
* Date Author Notes
* 2021-02-11 Meco Man remove _gettimeofday_r() and _times_r()
* 2020-02-13 Meco Man re-implement exit() and abort()
* 2020-02-21 Meco Man improve and beautify syscalls
*/
#include <reent.h>
#include <sys/errno.h>
#include <sys/time.h>
#include <errno.h>
#include <stdio.h>
#include <sys/time.h>
#include <rtthread.h>
@ -34,11 +35,19 @@ __errno ()
}
#endif
int
_getpid_r(struct _reent *ptr)
{
return 0;
}
int
_close_r(struct _reent *ptr, int fd)
{
#ifndef RT_USING_DFS
return 0;
/* return "not supported" */
ptr->_errno = ENOTSUP;
return -1;
#else
return close(fd);
#endif
@ -76,20 +85,14 @@ _fstat_r(struct _reent *ptr, int fd, struct stat *pstat)
return -1;
}
int
_getpid_r(struct _reent *ptr)
{
return 0;
}
int
_isatty_r(struct _reent *ptr, int fd)
{
if (fd >=0 && fd < 3) return 1;
if (fd >=0 && fd < 3)
return 1;
/* return "not supported" */
ptr->_errno = ENOTSUP;
return -1;
ptr->_errno = ENOTTY ;
return 0;
}
int
@ -112,7 +115,9 @@ _off_t
_lseek_r(struct _reent *ptr, int fd, _off_t pos, int whence)
{
#ifndef RT_USING_DFS
return 0;
/* return "not supported" */
ptr->_errno = ENOTSUP;
return -1;
#else
_off_t rc;
@ -125,7 +130,9 @@ int
_mkdir_r(struct _reent *ptr, const char *name, int mode)
{
#ifndef RT_USING_DFS
return 0;
/* return "not supported" */
ptr->_errno = ENOTSUP;
return -1;
#else
int rc;
@ -138,7 +145,9 @@ int
_open_r(struct _reent *ptr, const char *file, int flags, int mode)
{
#ifndef RT_USING_DFS
return 0;
/* return "not supported" */
ptr->_errno = ENOTSUP;
return -1;
#else
int rc;
@ -151,7 +160,9 @@ _ssize_t
_read_r(struct _reent *ptr, int fd, void *buf, size_t nbytes)
{
#ifndef RT_USING_DFS
return 0;
/* return "not supported" */
ptr->_errno = ENOTSUP;
return -1;
#else
_ssize_t rc;
@ -164,7 +175,9 @@ int
_rename_r(struct _reent *ptr, const char *old, const char *new)
{
#ifndef RT_USING_DFS
return 0;
/* return "not supported" */
ptr->_errno = ENOTSUP;
return -1;
#else
int rc;
@ -184,7 +197,9 @@ int
_stat_r(struct _reent *ptr, const char *file, struct stat *pstat)
{
#ifndef RT_USING_DFS
return 0;
/* return "not supported" */
ptr->_errno = ENOTSUP;
return -1;
#else
int rc;
@ -197,6 +212,8 @@ int
_unlink_r(struct _reent *ptr, const char *file)
{
#ifndef RT_USING_DFS
/* return "not supported" */
ptr->_errno = ENOTSUP;
return -1;
#else
return unlink(file);
@ -211,11 +228,11 @@ _wait_r(struct _reent *ptr, int *status)
return -1;
}
#ifdef RT_USING_DEVICE
_ssize_t
_write_r(struct _reent *ptr, int fd, const void *buf, size_t nbytes)
{
#ifndef RT_USING_DFS
#ifdef RT_USING_DEVICE
if (fileno(stdout) == fd)
{
rt_device_t console;
@ -225,7 +242,11 @@ _write_r(struct _reent *ptr, int fd, const void *buf, size_t nbytes)
}
return 0;
#else
/* return "not supported" */
ptr->_errno = ENOTSUP;
return -1;
#endif /*RT_USING_DEVICE*/
#else
_ssize_t rc;
@ -233,7 +254,6 @@ _write_r(struct _reent *ptr, int fd, const void *buf, size_t nbytes)
return rc;
#endif
}
#endif
/* Memory routine */
void *
@ -304,11 +324,6 @@ void __libc_init_array(void)
/* we not use __libc init_aray to initialize C++ objects */
}
uid_t getuid(void)
{
return 0;
}
mode_t umask(mode_t mask)
{
return 022;
@ -320,7 +335,7 @@ int flock(int fd, int operation)
}
/*
These functions will be implemented and replaced by the 'common/time.c' file
These functions are implemented and replaced by the 'common/time.c' file
int _gettimeofday_r(struct _reent *ptr, struct timeval *__tp, void *__tzp);
_CLOCK_T_ _times_r(struct _reent *ptr, struct tms *ptms);
*/

View File

@ -10,11 +10,19 @@
#include <rtthread.h>
#ifdef ARM_CM33_ENABLE_TRUSTZONE
extern void TZ_InitContextSystem_S(void);
extern rt_uint32_t TZ_AllocModuleContext_S (rt_uint32_t module);
extern rt_uint32_t TZ_FreeModuleContext_S(rt_uint32_t id);
extern rt_uint32_t TZ_LoadContext_S(rt_uint32_t id);
extern rt_uint32_t TZ_StoreContext_S(rt_uint32_t id);
#else
void TZ_InitContextSystem_S(void){}
rt_uint32_t TZ_AllocModuleContext_S (rt_uint32_t module){return 0;}
rt_uint32_t TZ_FreeModuleContext_S(rt_uint32_t id) {return 0;}
rt_uint32_t TZ_LoadContext_S(rt_uint32_t id){return 0;};
rt_uint32_t TZ_StoreContext_S(rt_uint32_t id){return 0;};
#endif
extern int tzcall(int id, rt_ubase_t arg0, rt_ubase_t arg1, rt_ubase_t arg2);
#define TZ_INIT_CONTEXT_ID (0x1001)

View File

@ -2203,7 +2203,7 @@ rt_err_t rt_mq_send_wait(rt_mq_t mq,
}
/* message queue is full */
while ((msg = mq->msg_queue_free) == RT_NULL)
while ((msg = (struct rt_mq_message *)mq->msg_queue_free) == RT_NULL)
{
/* reset error number in thread */
thread->error = RT_EOK;

View File

@ -26,6 +26,7 @@
* bug when thread has not startup.
* 2018-11-22 Jesven yield is same to rt_schedule
* add support for tasks bound to cpu
* 2021-02-24 Meco Man rearrange rt_thread_control() - schedule the thread when close it
*/
#include <rthw.h>
@ -670,83 +671,93 @@ rt_err_t rt_thread_control(rt_thread_t thread, int cmd, void *arg)
switch (cmd)
{
case RT_THREAD_CTRL_CHANGE_PRIORITY:
/* disable interrupt */
temp = rt_hw_interrupt_disable();
/* for ready thread, change queue */
if ((thread->stat & RT_THREAD_STAT_MASK) == RT_THREAD_READY)
case RT_THREAD_CTRL_CHANGE_PRIORITY:
{
/* remove thread from schedule queue first */
rt_schedule_remove_thread(thread);
/* disable interrupt */
temp = rt_hw_interrupt_disable();
/* change thread priority */
thread->current_priority = *(rt_uint8_t *)arg;
/* for ready thread, change queue */
if ((thread->stat & RT_THREAD_STAT_MASK) == RT_THREAD_READY)
{
/* remove thread from schedule queue first */
rt_schedule_remove_thread(thread);
/* recalculate priority attribute */
#if RT_THREAD_PRIORITY_MAX > 32
thread->number = thread->current_priority >> 3; /* 5bit */
thread->number_mask = 1 << thread->number;
thread->high_mask = 1 << (thread->current_priority & 0x07); /* 3bit */
#else
thread->number_mask = 1 << thread->current_priority;
#endif
/* change thread priority */
thread->current_priority = *(rt_uint8_t *)arg;
/* insert thread to schedule queue again */
rt_schedule_insert_thread(thread);
}
else
{
thread->current_priority = *(rt_uint8_t *)arg;
/* recalculate priority attribute */
#if RT_THREAD_PRIORITY_MAX > 32
thread->number = thread->current_priority >> 3; /* 5bit */
thread->number_mask = 1 << thread->number;
thread->high_mask = 1 << (thread->current_priority & 0x07); /* 3bit */
#else
thread->number_mask = 1 << thread->current_priority;
#endif
/* recalculate priority attribute */
#if RT_THREAD_PRIORITY_MAX > 32
thread->number = thread->current_priority >> 3; /* 5bit */
thread->number_mask = 1 << thread->number;
thread->high_mask = 1 << (thread->current_priority & 0x07); /* 3bit */
#else
thread->number_mask = 1 << thread->current_priority;
#endif
/* insert thread to schedule queue again */
rt_schedule_insert_thread(thread);
}
else
{
thread->current_priority = *(rt_uint8_t *)arg;
/* recalculate priority attribute */
#if RT_THREAD_PRIORITY_MAX > 32
thread->number = thread->current_priority >> 3; /* 5bit */
thread->number_mask = 1 << thread->number;
thread->high_mask = 1 << (thread->current_priority & 0x07); /* 3bit */
#else
thread->number_mask = 1 << thread->current_priority;
#endif
}
/* enable interrupt */
rt_hw_interrupt_enable(temp);
break;
}
/* enable interrupt */
rt_hw_interrupt_enable(temp);
break;
case RT_THREAD_CTRL_STARTUP:
return rt_thread_startup(thread);
case RT_THREAD_CTRL_CLOSE:
if (rt_object_is_systemobject((rt_object_t)thread) == RT_TRUE)
case RT_THREAD_CTRL_STARTUP:
{
return rt_thread_detach(thread);
}
#ifdef RT_USING_HEAP
else
{
return rt_thread_delete(thread);
}
#endif
#ifdef RT_USING_SMP
case RT_THREAD_CTRL_BIND_CPU:
{
rt_uint8_t cpu;
if ((thread->stat & RT_THREAD_STAT_MASK) != RT_THREAD_INIT)
{
/* we only support bind cpu before started phase. */
return RT_ERROR;
return rt_thread_startup(thread);
}
cpu = (rt_uint8_t)(size_t)arg;
thread->bind_cpu = cpu > RT_CPUS_NR? RT_CPUS_NR : cpu;
break;
}
#endif /*RT_USING_SMP*/
default:
break;
case RT_THREAD_CTRL_CLOSE:
{
rt_err_t rt_err;
if (rt_object_is_systemobject((rt_object_t)thread) == RT_TRUE)
{
rt_err = rt_thread_detach(thread);
}
#ifdef RT_USING_HEAP
else
{
rt_err = rt_thread_delete(thread);
}
#endif
rt_schedule();
return rt_err;
}
#ifdef RT_USING_SMP
case RT_THREAD_CTRL_BIND_CPU:
{
rt_uint8_t cpu;
if ((thread->stat & RT_THREAD_STAT_MASK) != RT_THREAD_INIT)
{
/* we only support bind cpu before started phase. */
return RT_ERROR;
}
cpu = (rt_uint8_t)(size_t)arg;
thread->bind_cpu = cpu > RT_CPUS_NR? RT_CPUS_NR : cpu;
break;
}
#endif /*RT_USING_SMP*/
default:
break;
}
return RT_EOK;

View File

@ -276,9 +276,6 @@ def PrepareBuilding(env, root_directory, has_libcpu=False, remove_components = [
except KeyError:
print ('Unknow target: '+ tgt_name+'. Avaible targets: ' +', '.join(tgt_dict.keys()))
sys.exit(1)
elif (GetDepend('RT_USING_NEWLIB') == False and GetDepend('RT_USING_NOLIBC') == False) \
and rtconfig.PLATFORM == 'gcc':
AddDepend('RT_USING_MINILIBC')
# auto change the 'RTT_EXEC_PATH' when 'rtconfig.EXEC_PATH' get failed
if not os.path.exists(rtconfig.EXEC_PATH):