From 31ffc4582c04b4ff5e59404b06d1e52d4b5cff63 Mon Sep 17 00:00:00 2001 From: yangjie Date: Wed, 3 Jul 2019 18:47:11 +0800 Subject: [PATCH] [libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7 --- libcpu/arm/cortex-m3/cpuport.c | 20 ++++++++++++++++++++ libcpu/arm/cortex-m4/cpuport.c | 22 +++++++++++++++++++++- libcpu/arm/cortex-m7/cpuport.c | 22 +++++++++++++++++++++- 3 files changed, 62 insertions(+), 2 deletions(-) diff --git a/libcpu/arm/cortex-m3/cpuport.c b/libcpu/arm/cortex-m3/cpuport.c index a386747750..0a948c528b 100644 --- a/libcpu/arm/cortex-m3/cpuport.c +++ b/libcpu/arm/cortex-m3/cpuport.c @@ -11,6 +11,7 @@ * 2012-12-23 aozima stack addr align to 8byte. * 2012-12-29 Bernard Add exception hook. * 2013-07-09 aozima enhancement hard fault exception handler. + * 2019-07-03 yangjie add __rt_ffs() for armclang. */ #include @@ -382,6 +383,25 @@ __asm int __rt_ffs(int value) exit BX lr } +#elif defined(__CLANG_ARM) +int __rt_ffs(int value) +{ + __asm volatile( + "CMP r0, #0x00 \n" + "BEQ exit \n" + + "RBIT r0, r0 \n" + "CLZ r0, r0 \n" + "ADDS r0, r0, #0x01 \n" + + "exit: \n" + "BX lr \n" + + : "=r"(value) + : "r"(value) + ); + return value; +} #elif defined(__IAR_SYSTEMS_ICC__) int __rt_ffs(int value) { diff --git a/libcpu/arm/cortex-m4/cpuport.c b/libcpu/arm/cortex-m4/cpuport.c index 18f027895b..71a7fb16f9 100644 --- a/libcpu/arm/cortex-m4/cpuport.c +++ b/libcpu/arm/cortex-m4/cpuport.c @@ -14,6 +14,7 @@ * 2012-12-29 Bernard Add exception hook. * 2013-06-23 aozima support lazy stack optimized. * 2018-07-24 aozima enhancement hard fault exception handler. + * 2019-07-03 yangjie add __rt_ffs() for armclang. */ #include @@ -453,7 +454,7 @@ RT_WEAK void rt_hw_cpu_reset(void) * @return return the index of the first bit set. If value is 0, then this function * shall return 0. */ -#if defined(__CC_ARM) || defined(__CLANG_ARM) +#if defined(__CC_ARM) __asm int __rt_ffs(int value) { CMP r0, #0x00 @@ -466,6 +467,25 @@ __asm int __rt_ffs(int value) exit BX lr } +#elif defined(__CLANG_ARM) +int __rt_ffs(int value) +{ + __asm volatile( + "CMP r0, #0x00 \n" + "BEQ exit \n" + + "RBIT r0, r0 \n" + "CLZ r0, r0 \n" + "ADDS r0, r0, #0x01 \n" + + "exit: \n" + "BX lr \n" + + : "=r"(value) + : "r"(value) + ); + return value; +} #elif defined(__IAR_SYSTEMS_ICC__) int __rt_ffs(int value) { diff --git a/libcpu/arm/cortex-m7/cpuport.c b/libcpu/arm/cortex-m7/cpuport.c index 18f027895b..85960baede 100644 --- a/libcpu/arm/cortex-m7/cpuport.c +++ b/libcpu/arm/cortex-m7/cpuport.c @@ -14,6 +14,7 @@ * 2012-12-29 Bernard Add exception hook. * 2013-06-23 aozima support lazy stack optimized. * 2018-07-24 aozima enhancement hard fault exception handler. + * 2019-07-03 yangjie add __rt_ffs() for armclang. */ #include @@ -453,7 +454,7 @@ RT_WEAK void rt_hw_cpu_reset(void) * @return return the index of the first bit set. If value is 0, then this function * shall return 0. */ -#if defined(__CC_ARM) || defined(__CLANG_ARM) +#if defined(__CC_ARM) __asm int __rt_ffs(int value) { CMP r0, #0x00 @@ -466,6 +467,25 @@ __asm int __rt_ffs(int value) exit BX lr } +#elif defined(__CLANG_ARM) +int __rt_ffs(int value) +{ + __asm volatile( + "CMP r0, #0x00 \n" + "BEQ exit \n" + + "RBIT r0, r0 \n" + "CLZ r0, r0 \n" + "ADDS r0, r0, #0x01 \n" + + "exit: \n" + "BX lr \n" + + : "=r"(value) + : "r"(value) + ); + return value; +} #elif defined(__IAR_SYSTEMS_ICC__) int __rt_ffs(int value) {