Merge remote-tracking branch 'upstream/master'

2020-10-26 15:02:42 +08:00 · 2020-10-26 15:02:42 +08:00 · b982de3971
parent 102976e89f 9cd38972a2
commit b982de3971
40 changed files with 2630 additions and 35 deletions
--- a/bsp/bm3803/.config
+++ b/bsp/bm3803/.config
@ -0,0 +1,456 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Configuration
+#
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_ALIGN_SIZE=4
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=100
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=4096
+# CONFIG_RT_USING_TIMER_SOFT is not set
+CONFIG_RT_DEBUG=y
+# CONFIG_RT_DEBUG_COLOR is not set
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_SIGNALS is not set
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+CONFIG_RT_USING_MEMHEAP=y
+# CONFIG_RT_USING_NOHEAP is not set
+CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+CONFIG_RT_USING_DEVICE_OPS=y
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
+CONFIG_RT_VER_NUM=0x40003
+# CONFIG_RT_USING_CPU_FFS is not set
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=4096
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+
+#
+# C++ features
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Command shell
+#
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=4096
+CONFIG_FINSH_CMD_SIZE=80
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_USING_MSH_DEFAULT=y
+# CONFIG_FINSH_USING_MSH_ONLY is not set
+CONFIG_FINSH_ARG_MAX=10
+
+#
+# Device virtual file system
+#
+CONFIG_RT_USING_DFS=y
+CONFIG_DFS_USING_WORKDIR=y
+CONFIG_DFS_FILESYSTEMS_MAX=2
+CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
+CONFIG_DFS_FD_MAX=16
+# CONFIG_RT_USING_DFS_MNTTABLE is not set
+# CONFIG_RT_USING_DFS_ELMFAT is not set
+CONFIG_RT_USING_DFS_DEVFS=y
+# CONFIG_RT_USING_DFS_ROMFS is not set
+# CONFIG_RT_USING_DFS_RAMFS is not set
+# CONFIG_RT_USING_DFS_UFFS is not set
+# CONFIG_RT_USING_DFS_JFFS2 is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
+CONFIG_RT_USING_SERIAL=y
+# CONFIG_RT_SERIAL_USING_DMA is not set
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PIN is not set
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+# CONFIG_RT_USING_SPI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_WIFI is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# POSIX layer and C standard library
+#
+CONFIG_RT_USING_LIBC=y
+# CONFIG_RT_USING_PTHREADS is not set
+CONFIG_RT_USING_POSIX=y
+# CONFIG_RT_USING_POSIX_MMAP is not set
+# CONFIG_RT_USING_POSIX_TERMIOS is not set
+# CONFIG_RT_USING_POSIX_GETLINE is not set
+# CONFIG_RT_USING_POSIX_AIO is not set
+# CONFIG_RT_USING_MODULE is not set
+
+#
+# Network
+#
+
+#
+# Socket abstraction layer
+#
+# CONFIG_RT_USING_SAL is not set
+
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
+#
+# light weight TCP/IP stack
+#
+# CONFIG_RT_USING_LWIP is not set
+
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+
+#
+# VBUS(Virtual Software BUS)
+#
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_NANOPB is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
+# CONFIG_PKG_USING_WIZNET is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PDULIB is not set
+# CONFIG_PKG_USING_BTSTACK is not set
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_libsodium is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
+
+#
+# language packages
+#
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+
+#
+# multimedia packages
+#
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+
+#
+# system packages
+#
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_PPOOL is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+# CONFIG_PKG_USING_LY68L6400 is not set
+
+#
+# miscellaneous packages
+#
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_LWGPS is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+CONFIG_SOC_BM3803=y
+CONFIG_RT_USING_UART1=y
--- a/bsp/bm3803/Kconfig
+++ b/bsp/bm3803/Kconfig
@ -0,0 +1,38 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../.."
+    
+# you can change the RTT_ROOT default "../.." to your rtthread_root,
+# example: default "F:/git_repositories/rt-thread"
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+    
+config ENV_DIR
+    string
+    option env="ENV_ROOT"
+    default "/"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+
+config SOC_BM3803
+    bool
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+
+config RT_USING_UART1
+    bool "Using RT_USING_UART1"
+    default y
+
--- a/bsp/bm3803/README.md
+++ b/bsp/bm3803/README.md
@ -0,0 +1,46 @@
+# BM3803板级支持包
+
+## 1. 简介
+
+BM3803是中国航天科技集团公司第九研究院第七七二研究所推出的基于SPARC V8内核的抗辐射32位处理器
+包括如下硬件特性：
+
+| 硬件 | 描述 |
+| -- | -- |
+|芯片型号| BM3803 |
+|CPU| SPARC V8 |
+|主频| 50 - 100MHz |
+|SRAM | 2MB |
+
+## 2. 编译说明
+
+| 环境 | 说明 |
+| --- | --- |
+|PC操作系统|Windows|
+|编译器|sparc-gaisler-elf-gcc|
+|构建工具|scons|
+1) 下载源码
+```
+git clone https://github.com/RT-Thread/rt-thread.git
+```
+2) 下载编译工具和调试工具
+```
+下载对应的编译工具链 https://www.gaisler.com/index.php/downloads/compilers
+下载对应的调试工具 https://www.gaisler.com/index.php/downloads/debug-tools
+```
+3) 通过env配置工程
+```
+打开env工具，并切换到bsp/bm3803目录
+输入menuconfig进行配置并保存
+```
+4) 编译
+```
+配置rtconfig.py中的EXEC_PATH为对应的编译工具目录
+输入scons进行编译
+```
+如果编译正确无误，会产生rtthread-bm3803.elf、rtthread.bin文件。可以使用rtthread-bm3803.elf进行调试。
+
+5) 调试
+```
+调试环境配置请参考 https://www.gaisler.com/eclipse/qsg_sw_ide.pdf
+```
--- a/bsp/bm3803/SConscript
+++ b/bsp/bm3803/SConscript
@ -0,0 +1,14 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+
+cwd = str(Dir('#'))
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')
--- a/bsp/bm3803/SConstruct
+++ b/bsp/bm3803/SConstruct
@ -0,0 +1,31 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'rtthread-bm3803.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+	CXX= rtconfig.CXX, CXXFLAGS = rtconfig.CFLAGS,
+	AR = rtconfig.AR, ARFLAGS = '-rc',
+	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT)
+
+# make a building
+DoBuilding(TARGET, objs)
--- a/bsp/bm3803/applications/SConscript
+++ b/bsp/bm3803/applications/SConscript
@ -0,0 +1,11 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'applications')
+src	= Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/bm3803/applications/board.c
+++ b/bsp/bm3803/applications/board.c
@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include <finsh.h>
+
+#include "board.h"
+#include <interrupt.h>
+
+extern int __bss_end;
+
+static void rt_hw_timer_isr(int vector, void *param)
+{
+    rt_tick_increase();
+    /* timer interrupt cleared by hardware */
+}
+
+int rt_hw_timer_init(void)
+{
+    unsigned int counter = 1000000 / RT_TICK_PER_SECOND;
+    volatile struct lregs *regs = (struct lregs *)PREGS;
+
+    regs->scalercnt = CPU_FREQ / 1000000 - 1;
+    regs->scalerload = CPU_FREQ / 1000000 - 1;
+    regs->timercnt2 = counter - 1;
+    regs->timerload2 = counter - 1;
+
+    rt_hw_interrupt_install(TIMER2_TT, rt_hw_timer_isr, RT_NULL, "tick");
+    rt_hw_interrupt_umask(TIMER2_TT);
+
+    /* start timer */
+    regs->timerctrl2 = 0x7;
+
+    return 0;
+}
+INIT_BOARD_EXPORT(rt_hw_timer_init);
+
+/**
+ * This function will initialize beaglebone board
+ */
+void rt_hw_board_init(void)
+{
+    rt_system_heap_init((void *)&__bss_end, (unsigned char *)&__bss_end + 0x01000000);
+    rt_components_board_init();
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+}
--- a/bsp/bm3803/applications/board.h
+++ b/bsp/bm3803/applications/board.h
@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <bm3803.h>
+
+#define CPU_FREQ 90000000
+
+void rt_hw_board_init(void);
+
+#endif
--- a/bsp/bm3803/applications/main.c
+++ b/bsp/bm3803/applications/main.c
@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int main(void)
+{
+    printf("hello rt-thread\n");
+    return 0;
+}
--- a/bsp/bm3803/bm3803.lds
+++ b/bsp/bm3803/bm3803.lds
@ -0,0 +1,90 @@
+OUTPUT_ARCH(sparc)
+SECTIONS
+{
+    . = 0x40000000;
+
+    __text_start = .;
+    .text :
+    {
+        *(.vectors)
+        *(.text)
+        *(.text.*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+        . = ALIGN(4);	
+
+        /* section information for modules */
+        . = ALIGN(4);
+        __rtmsymtab_start = .;
+        KEEP(*(RTMSymTab))
+        __rtmsymtab_end = .;
+
+        /* section information for initialization */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+    } =0
+    __text_end = .;
+
+    __rodata_start = .;
+    .rodata   : { *(.rodata) *(.rodata.*) }
+    __rodata_end = .;
+
+    . = ALIGN(4);
+    .ctors :
+    {
+        PROVIDE(__ctors_start__ = .);
+        KEEP(*(SORT(.ctors.*)))
+        KEEP(*(.ctors))
+        PROVIDE(__ctors_end__ = .);
+    }
+
+    .dtors :
+    {
+        PROVIDE(__dtors_start__ = .);
+        KEEP(*(SORT(.dtors.*)))
+        KEEP(*(.dtors))
+        PROVIDE(__dtors_end__ = .);
+    }
+
+    . = ALIGN(8);
+    __data_start = .;
+    .data :
+    {
+        *(.data)
+        *(.data.*)
+    }
+    __data_end = .;
+
+    . = ALIGN(8);
+    __bss_start = .;
+    .bss       :
+    {
+    *(.bss)
+    *(.bss.*)
+    *(COMMON)
+    . = ALIGN(4);
+    }
+    . = ALIGN(4);
+    __bss_end = .;
+
+    /* Stabs debugging sections.  */
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+
+    _end = .;
+}
--- a/bsp/bm3803/drivers/SConscript
+++ b/bsp/bm3803/drivers/SConscript
@ -0,0 +1,11 @@
+import copy
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+src	= Glob('*.c')
+CPPPATH = [cwd]
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/bm3803/drivers/uart.c
+++ b/bsp/bm3803/drivers/uart.c
@ -0,0 +1,170 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#include <board.h>
+#include <interrupt.h>
+#include "uart.h"
+#include "uart_reg.h"
+
+struct bm3803_uart
+{
+    void *uart_base;
+    int irq;
+};
+
+static void bm3803_uart_isr(int tt, void *param)
+{
+    struct bm3803_uart *uart;
+    struct rt_serial_device *serial;
+    struct uart_reg *uart_base;
+
+    serial = (struct rt_serial_device *)param;
+    uart = (struct bm3803_uart *)serial->parent.user_data;
+    uart_base = uart->uart_base;
+
+    if (uart_base->uartstatus & 0x1)
+    {
+        rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
+    }
+}
+
+#define NOT_IMPLEMENTED() RT_ASSERT(0)
+
+static rt_err_t bm3803_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    struct bm3803_uart *uart;
+    struct uart_reg *uart_base;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct bm3803_uart *)serial->parent.user_data;
+    RT_ASSERT(uart);
+    uart_base = uart->uart_base;
+
+    if (cfg->baud_rate == BAUD_RATE_115200)
+    {
+        uart_base->uartscaler = ((((CPU_FREQ * 10) / (8 * 115200)) - 5) / 10);
+    }
+    else if (cfg->baud_rate == BAUD_RATE_9600)
+    {
+        uart_base->uartscaler = ((((CPU_FREQ * 10) / (8 * 9600)) - 5) / 10);
+    }
+    else
+    {
+        NOT_IMPLEMENTED();
+    }
+
+    uart_base->uartctrl |= 0x3;
+
+    return RT_EOK;
+}
+
+static rt_err_t bm3803_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    struct bm3803_uart *uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct bm3803_uart *)serial->parent.user_data;
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_CLR_INT:
+        /* disable rx irq */
+        rt_hw_interrupt_mask(uart->irq);
+        break;
+    case RT_DEVICE_CTRL_SET_INT:
+        /* enable rx irq */
+        rt_hw_interrupt_umask(uart->irq);
+        break;
+    }
+
+    return RT_EOK;
+}
+
+static int bm3803_putc(struct rt_serial_device *serial, char c)
+{
+    struct bm3803_uart *uart;
+    struct uart_reg *uart_base;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct bm3803_uart *)serial->parent.user_data;
+    uart_base = uart->uart_base;
+
+    while (!(uart_base->uartstatus & 0x4));
+    uart_base->uartdata = c;
+
+    return 1;
+}
+
+static int bm3803_getc(struct rt_serial_device *serial)
+{
+    int ch;
+    struct bm3803_uart *uart;
+    struct uart_reg *uart_base;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct bm3803_uart *)serial->parent.user_data;
+    uart_base = uart->uart_base;
+
+    ch = -1;
+    if (uart_base->uartstatus & 0x1)
+    {
+        ch = uart_base->uartdata;
+    }
+
+    return ch;
+}
+
+static const struct rt_uart_ops bm3803_uart_ops =
+{
+    bm3803_configure,
+    bm3803_control,
+    bm3803_putc,
+    bm3803_getc,
+};
+
+/* UART device driver structure */
+#ifdef RT_USING_UART1
+struct bm3803_uart uart1 =
+{
+    (void *)UART1_BASE,
+    UART1_TT,
+};
+struct rt_serial_device serial1;
+#endif
+
+int rt_hw_serial_init(void)
+{
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+#ifdef RT_USING_UART1
+    volatile struct lregs *regs = (struct lregs *)PREGS;
+    serial1.ops = &bm3803_uart_ops;
+    serial1.config = config;
+    /* configure gpio direction */
+    regs->piodir |= (1 << 15);
+    regs->piodir &= ~(1 << 14);
+    /* enable RX interrupt */
+    regs->uartctrl1 = 0;
+    regs->uartctrl1 |= 0x4;
+    /* install ISR */
+    rt_hw_interrupt_install(uart1.irq, bm3803_uart_isr, &serial1, "uart1");
+    rt_hw_interrupt_mask(uart1.irq);
+    /* register UART1 device */
+    rt_hw_serial_register(&serial1, "uart1",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+                          &uart1);
+#endif
+    return 0;
+}
+INIT_BOARD_EXPORT(rt_hw_serial_init);
--- a/bsp/bm3803/drivers/uart.h
+++ b/bsp/bm3803/drivers/uart.h
@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#ifndef __SERIAL_H__
+#define __SERIAL_H__
+
+int rt_hw_serial_init(void);
+
+#endif
--- a/bsp/bm3803/drivers/uart_reg.h
+++ b/bsp/bm3803/drivers/uart_reg.h
@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#ifndef SERIAL_REG_H
+#define SERIAL_REG_H
+
+struct uart_reg
+{
+    unsigned int uartdata;
+    unsigned int uartstatus;
+    unsigned int uartctrl;
+    unsigned int uartscaler;
+};
+
+#endif /* end of include guard: SERIAL_REG_H */
--- a/bsp/bm3803/rtconfig.h
+++ b/bsp/bm3803/rtconfig.h
@ -0,0 +1,156 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 8
+#define RT_ALIGN_SIZE 4
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 100
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 4096
+#define RT_DEBUG
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_MEMHEAP
+#define RT_USING_SMALL_MEM
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_DEVICE_OPS
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart1"
+#define RT_VER_NUM 0x40003
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 4096
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
+
+
+/* Command shell */
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_CMD_SIZE 80
+#define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
+#define FINSH_ARG_MAX 10
+
+/* Device virtual file system */
+
+#define RT_USING_DFS
+#define DFS_USING_WORKDIR
+#define DFS_FILESYSTEMS_MAX 2
+#define DFS_FILESYSTEM_TYPES_MAX 2
+#define DFS_FD_MAX 16
+#define RT_USING_DFS_DEVFS
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
+#define RT_USING_SERIAL
+#define RT_SERIAL_RB_BUFSZ 64
+
+/* Using USB */
+
+
+/* POSIX layer and C standard library */
+
+#define RT_USING_LIBC
+#define RT_USING_POSIX
+
+/* Network */
+
+/* Socket abstraction layer */
+
+
+/* Network interface device */
+
+
+/* light weight TCP/IP stack */
+
+
+/* AT commands */
+
+
+/* VBUS(Virtual Software BUS) */
+
+
+/* Utilities */
+
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+
+/* Wiced WiFi */
+
+
+/* IoT Cloud */
+
+
+/* security packages */
+
+
+/* language packages */
+
+
+/* multimedia packages */
+
+
+/* tools packages */
+
+
+/* system packages */
+
+
+/* peripheral libraries and drivers */
+
+
+/* miscellaneous packages */
+
+
+/* samples: kernel and components samples */
+
+#define SOC_BM3803
+#define RT_USING_UART1
+
+#endif
--- a/bsp/bm3803/rtconfig.py
+++ b/bsp/bm3803/rtconfig.py
@ -0,0 +1,43 @@
+import os
+
+# toolchains options
+ARCH='sparc-v8'
+CPU='bm3803'
+CROSS_TOOL='gcc'
+
+if  CROSS_TOOL == 'gcc':
+    PLATFORM 	= 'gcc'
+    EXEC_PATH 	= r'C:\Users\97981\Downloads\bcc-2.1.1-gcc\bin'
+
+BUILD = 'debug'
+
+if PLATFORM == 'gcc':
+    # toolchains
+    PREFIX = 'sparc-gaisler-elf-'
+    CC = PREFIX + 'gcc'
+    CXX = PREFIX + 'g++'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+
+    DEVICE = ' -mcpu=v8 -nostartfiles'
+    #DEVICE = ' '
+    CFLAGS = DEVICE
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__'
+    LFLAGS = DEVICE + ' -Wl,-Map=rtthread-bm3803.map -T bm3803.lds -Ttext=0x40000000'
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -gdwarf-2 -Wall'
+        AFLAGS += ' -gdwarf-2'
+    else:
+        CFLAGS += ' -O2 -Wall'
+
+    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' +\
+                  SIZE + ' $TARGET \n'
--- a/bsp/stm32/stm32f103-blue-pill/README.md
+++ b/bsp/stm32/stm32f103-blue-pill/README.md
@ -9,7 +9,7 @@ The document is covered in four parts:
 - Onboard Resources
 - Quickly Get Started
 - Advanced Features
- References
+- Read more

 By reading the ***Quickly Get Started*** section developers can quickly get their hands on this BSP and run RT-Thread on the board. More advanced features will be introduced in the Advanced Features section to help developers take advantage of RT-Thread to drive more on-board resources.

@ -17,7 +17,7 @@ By reading the ***Quickly Get Started*** section developers can quickly get thei

 ## Onboard Resources

-The "blue pill" is a STM32F103 based development board with Cortex-M3 ARM CPU that runs at 72 MHz, 20 KB of RAM and 64 or 128 KB of flash memory. The microcontroller (MCU) has a USB port, two serial ports, 16 bit PWM pins and 12 bit ADC pins. It runs at 3.3V, but some of its pins are 5V tolerant.
+The Blue Pill is a STM32F103 based development board with Cortex-M3 ARM CPU that runs at 72 MHz, 20 KB of RAM and 64 or 128 KB of flash memory. The microcontroller (MCU) has a USB port, two serial ports, 16 bit PWM pins and 12 bit ADC pins. It runs at 3.3V, but some of its pins are 5V tolerant.

 - MCU：STM32F103C8T6 @72MHz, 64KB FLASH , 20KB RAM

@ -25,7 +25,7 @@ The "blue pill" is a STM32F103 based development board with Cortex-M3 ARM CPU th
  
  - LED：PC13
  
- Debug IO interface type: SWD / ST-LINK
+- Debug IO interface type: ST-LINK V2 (SWD)


 ![board](figures/Bluepill_pinout.png)
@ -38,23 +38,73 @@ The "blue pill" is a STM32F103 based development board with Cortex-M3 ARM CPU th

 This BSP provides MDK4, MDK5, and IAR projects for developers and it supports the GCC development environment. Here's an example of the MDK5 development environment, to introduce how to run the system.

-### Hardware connection
+### Use ST-LINK Debugger to connect the Blue Pill Board
+
+ST-LINK driver: https://www.st.com/en/development-tools/stsw-link009.html
+
+| ST-LINK Debugger | Blue Pill 4-Pin SWD |
+| :--------------: | :-----------------: |
+|      SWDIO       |         IO          |
+|      SWDCLK      |         CLK         |
+|      VCC3.3      |       VCC3.3        |
+|       GND        |         GND         |
+
+![connection](figures/connecter1.jpeg)
+
+![connection](figures/connecter2.png)
+
+![connection](figures/connecter3.jpeg)
+
+
+
+### Use FTDI adapter(USB to UART) to connect the Blue Pill Board's PA9(Tx) and PA10(Rx) pins
+
+FTDI adapter driver: https://www.ftdichip.com/FTDrivers.htm
+
+You can use other USB to UART adapters to replace FTDI adapter.
+
+| FTDI adapter(USB to UART) |            Blue Pill Board            |
+| :-----------------------: | :-----------------------------------: |
+|            Tx             |                PA10 Rx                |
+|            Rx             |                PA9 Tx                 |
+|            GND            |                  GND                  |
+|          VCC 3.3          | **Don't need to connect VCC 3.3 pin** |
+|           VCC 5           |  **Don't need to connect VCC 5 pin**  |

-1) Use a Type-A to Mini-B cable to connect the development board to the PC and turn on the power switch. 

-2) Use FTDI adapter(USB to UART) to connect the Blue Pill board's PA9(Tx) and PA10(Rx) pins.

 ![connection](figures/connection.jpg)

+
+
+### Make sure Jumper Position (Both 0 Position)
+
+| BOOTx | High / Low |
+| :---: | :--------: |
+| BOOT0 |     0      |
+| BOOT1 |     0      |
+
+![connection](figures/jumper.jpg)
+
+
+
 ### Compile and Download

-Double-click the `project.uvprojx` file to open the MDK5 project; compile and download the program to the board.
+- Double-click the `project.uvprojx` file to open the MDK5 project  (**NOT** `template.uvprojx` file)
+- Click the “option for target” button
+  - Debug: Choose "ST-LINK Debugger" and Click "Setting" button:
+    - Port: choose "SW (Serial Wire)"
+    - Flash Download: check "Reset and Run"
+
+- Compile and download the program to the board
+
+

 ### Running Results

 After the program is successfully downloaded, the system runs automatically. Observe the running results of the LED on the development board, and you will see the LED is flashing periodically.

-The USB virtual COM port connects to USART1(PA9-Tx, PA10-Rx) by default, and when the corresponding serial port (115200-8-1-N) is opened in the terminal tool, the output information of RT-Thread can be seen when the device is reset:
+The USB virtual COM port connects to **USART1 (PA9-Tx, PA10-Rx) by default**, and when the corresponding serial port (**115200**-8-1-N) is opened in the terminal tool, the output information of RT-Thread can be seen when the device is reset:

 ```shell
 \ | /
@ -64,6 +114,8 @@ The USB virtual COM port connects to USART1(PA9-Tx, PA10-Rx) by default, and whe
 msh >
 ```

+- If you have no terminal tool software available, you can download *Putty*: https://www.chiark.greenend.org.uk/~sgtatham/putty/latest.html
+


 ## **Advanced Features**
@ -79,7 +131,7 @@ Learn how to use RT-Thread ENV, click [Here](https://github.com/RT-Thread/rtthre



-## References
+## Read more

 - [[Schematic]](https://stm32duinoforum.com/forum/images/c/c1/wiki_subdomain/Vcc-gnd.com-STM32F103C8-schematic.pdf)
 - [[STM32 Blue Pill vs Black Pill Microcontroller Boards]](https://www.youtube.com/watch?v=QCdnO43RBK4&t=875s)
@ -91,7 +143,7 @@ Learn how to use RT-Thread ENV, click [Here](https://github.com/RT-Thread/rtthre

 ## Maintained By

-Meco Man @ rt-thread community
+Meco Man @ RT-Thread Community

 jiantingman@foxmail.com 

--- a/bsp/stm32/stm32f103-blue-pill/README.pdf
+++ b/bsp/stm32/stm32f103-blue-pill/README.pdf
--- a/bsp/stm32/stm32f103-blue-pill/board/CubeMX_Config/Inc/stm32f1xx_hal_conf.h
+++ b/bsp/stm32/stm32f103-blue-pill/board/CubeMX_Config/Inc/stm32f1xx_hal_conf.h
@ -71,7 +71,7 @@
 /*#define HAL_HCD_MODULE_ENABLED   */
 /*#define HAL_PWR_MODULE_ENABLED   */
 /*#define HAL_RCC_MODULE_ENABLED   */
-/*#define HAL_RTC_MODULE_ENABLED   */
+#define HAL_RTC_MODULE_ENABLED
 /*#define HAL_SD_MODULE_ENABLED   */
 /*#define HAL_MMC_MODULE_ENABLED   */
 /*#define HAL_SDRAM_MODULE_ENABLED   */
--- a/bsp/stm32/stm32f103-blue-pill/board/Kconfig
+++ b/bsp/stm32/stm32f103-blue-pill/board/Kconfig
@ -38,7 +38,25 @@ menu "On-chip Peripheral Drivers"
                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
                default n
        endif
+        
+    menuconfig BSP_USING_ONCHIP_RTC
+        bool "Enable RTC"
+        select RT_USING_RTC
+        select RT_USING_LIBC
+        default n
+        if BSP_USING_ONCHIP_RTC
+            choice
+                prompt "Select clock source"
+                default BSP_RTC_USING_LSE

+                config BSP_RTC_USING_LSE
+                    bool "RTC USING LSE"
+
+                config BSP_RTC_USING_LSI
+                    bool "RTC USING LSI"
+            endchoice
+        endif
+        
    menuconfig BSP_USING_SPI
        bool "Enable SPI BUS"
        default n
--- a/bsp/stm32/stm32f103-blue-pill/figures/connecter1.jpeg
+++ b/bsp/stm32/stm32f103-blue-pill/figures/connecter1.jpeg
--- a/bsp/stm32/stm32f103-blue-pill/figures/connecter2.png
+++ b/bsp/stm32/stm32f103-blue-pill/figures/connecter2.png
--- a/bsp/stm32/stm32f103-blue-pill/figures/connecter3.jpeg
+++ b/bsp/stm32/stm32f103-blue-pill/figures/connecter3.jpeg
--- a/bsp/stm32/stm32f103-blue-pill/figures/jumper.jpg
+++ b/bsp/stm32/stm32f103-blue-pill/figures/jumper.jpg
--- a/components/net/lwip-1.4.1/src/arch/include/arch/cc.h
+++ b/components/net/lwip-1.4.1/src/arch/include/arch/cc.h
@ -84,9 +84,9 @@ typedef uintptr_t mem_ptr_t;
 #define PACK_STRUCT_BEGIN
 #define PACK_STRUCT_END
 #elif defined(__IAR_SYSTEMS_ICC__)   /* IAR Compiler */
-#define PACK_STRUCT_BEGIN   #pragma pack(1)
-#define PACK_STRUCT_STRUCT 
-#define PACK_STRUCT_END     #pragma pack()
+#define PACK_STRUCT_BEGIN
+#define PACK_STRUCT_STRUCT
+#define PACK_STRUCT_END
 #define PACK_STRUCT_FIELD(x) x
 #define PACK_STRUCT_USE_INCLUDES
 #elif defined(__GNUC__)     /* GNU GCC Compiler */
--- a/components/net/lwip-2.0.2/src/arch/include/arch/cc.h
+++ b/components/net/lwip-2.0.2/src/arch/include/arch/cc.h
@ -63,9 +63,9 @@
 #define PACK_STRUCT_BEGIN
 #define PACK_STRUCT_END
 #elif defined(__IAR_SYSTEMS_ICC__)   /* IAR Compiler */
-#define PACK_STRUCT_BEGIN   #pragma pack(1)
+#define PACK_STRUCT_BEGIN
 #define PACK_STRUCT_STRUCT
-#define PACK_STRUCT_END     #pragma pack()
+#define PACK_STRUCT_END
 #define PACK_STRUCT_FIELD(x) x
 #define PACK_STRUCT_USE_INCLUDES
 #elif defined(__GNUC__)     /* GNU GCC Compiler */
--- a/components/net/lwip-2.1.2/src/arch/include/arch/cc.h
+++ b/components/net/lwip-2.1.2/src/arch/include/arch/cc.h
@ -77,9 +77,9 @@
 #define PACK_STRUCT_BEGIN
 #define PACK_STRUCT_END
 #elif defined(__IAR_SYSTEMS_ICC__)   /* IAR Compiler */
-#define PACK_STRUCT_BEGIN   #pragma pack(1)
+#define PACK_STRUCT_BEGIN
 #define PACK_STRUCT_STRUCT
-#define PACK_STRUCT_END     #pragma pack()
+#define PACK_STRUCT_END
 #define PACK_STRUCT_FIELD(x) x
 #define PACK_STRUCT_USE_INCLUDES
 #elif defined(__GNUC__)     /* GNU GCC Compiler */
--- a/include/rtdef.h
+++ b/include/rtdef.h
@ -33,6 +33,7 @@
 * 2019-05-17     Bernard      change version number to v4.0.2
 * 2019-12-20     Bernard      change version number to v4.0.3
 * 2020-08-10     Meco Man     add macro for struct rt_device_ops
+ * 2020-10-23     Meco Man     define maximum value of ipc type
 */

 #ifndef __RT_DEF_H__
@ -102,6 +103,13 @@ typedef rt_base_t                       rt_off_t;       /**< Type for offset */
 #define RT_UINT32_MAX                   0xffffffff      /**< Maxium number of UINT32 */
 #define RT_TICK_MAX                     RT_UINT32_MAX   /**< Maxium number of tick */

+/* maximum value of ipc type */
+#define RT_SEM_VALUE_MAX                RT_UINT16_MAX   /**< Maxium number of semaphore .value */
+#define RT_MUTEX_VALUE_MAX              RT_UINT16_MAX   /**< Maxium number of mutex .value */
+#define RT_MUTEX_HOLD_MAX               RT_UINT8_MAX    /**< Maxium number of mutex .hold */
+#define RT_MB_ENTRY_MAX                 RT_UINT16_MAX   /**< Maxium number of mailbox .entry */
+#define RT_MQ_ENTRY_MAX                 RT_UINT16_MAX   /**< Maxium number of message queue .entry */
+
 #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
 #define __CLANG_ARM
 #endif
--- a/libcpu/sparc-v8/SConscript
+++ b/libcpu/sparc-v8/SConscript
@ -0,0 +1,16 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd = GetCurrentDir()
+
+# add common code files
+group = SConscript(os.path.join('common', 'SConscript'))
+
+# cpu porting code files
+group = group + SConscript(os.path.join(rtconfig.CPU, 'SConscript'))
+
+Return('group')
--- a/libcpu/sparc-v8/bm3803/SConscript
+++ b/libcpu/sparc-v8/bm3803/SConscript
@ -0,0 +1,17 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/libcpu/sparc-v8/bm3803/bm3803.h
+++ b/libcpu/sparc-v8/bm3803/bm3803.h
@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#ifndef __BM3803_H__
+#define __BM3803_H__
+
+struct lregs
+{
+    /* address = 0x80000000 */
+    unsigned int memcfg1;           /* 0x00 */
+    unsigned int memcfg2;
+    unsigned int memcfg3;
+    unsigned int failaddr;
+
+    unsigned int memstatus;     /* 0x10 */
+    unsigned int cachectrl;
+    unsigned int powerdown;
+    unsigned int writeprot1;
+
+    unsigned int writeprot2;        /* 0x20 */
+    unsigned int pcr;
+    unsigned int dummy2;
+    unsigned int dummy3;
+
+    unsigned int dummy4;            /* 0x30 */
+    unsigned int dummy5;
+    unsigned int dummy6;
+    unsigned int dummy7;
+
+    unsigned int timercnt1;     /* 0x40 */
+    unsigned int timerload1;
+    unsigned int timerctrl1;
+    unsigned int wdog;
+
+    unsigned int timercnt2;        /* 0x50 */
+    unsigned int timerload2;
+    unsigned int timerctrl2;
+    unsigned int dummy8;
+
+    unsigned int scalercnt;        /* 0x60 */
+    unsigned int scalerload;
+    unsigned int dummy9;
+    unsigned int dummy10;
+
+    unsigned int uartdata1;        /* 0x70 */
+    unsigned int uartstatus1;
+    unsigned int uartctrl1;
+    unsigned int uartscaler1;
+
+    unsigned int uartdata2;        /* 0x80 */
+    unsigned int uartstatus2;
+    unsigned int uartctrl2;
+    unsigned int uartscaler2;
+
+    unsigned int irqmask;           /* 0x90 */
+    unsigned int irqpend;
+    unsigned int irqforce;
+    unsigned int irqclear;
+
+    unsigned int piodata;            /* 0xA0 */
+    unsigned int piodir;
+    unsigned int pioirq;
+    unsigned int dummy11;
+
+    unsigned int imask2;            /* 0xB0 */
+    unsigned int ipend2;
+    unsigned int istat2;
+    unsigned int dummy12;
+
+    unsigned int dummy13;          /* 0xC0 */
+    unsigned int dcomstatus;
+    unsigned int dcomctrl;
+    unsigned int dcomscaler;
+
+    unsigned int dummy14;           /* 0xD0 */
+    unsigned int dummy15;
+    unsigned int dummy16;
+    unsigned int dummy17;
+
+    unsigned int uartdata3;         /* 0xE0 */
+    unsigned int uartstatus3;
+    unsigned int uartctrl3;
+    unsigned int uartscaler3;
+};
+
+#define PREGS 0x80000000
+
+#define UART1_BASE (PREGS + 0x70)
+
+#define TIMER2_TT 0x19
+#define UART1_TT 0x13
+
+#endif
--- a/libcpu/sparc-v8/bm3803/context_gcc.S
+++ b/libcpu/sparc-v8/bm3803/context_gcc.S
@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#define SPARC_PSR_PIL_MASK 0x00000F00
+#define SPARC_PSR_ET_MASK 0x00000020
+
+/*
+ * rt_base_t rt_hw_interrupt_disable();
+ */
+.globl rt_hw_interrupt_disable
+rt_hw_interrupt_disable:
+	mov %psr, %o0
+	or %o0, SPARC_PSR_PIL_MASK, %o1
+	mov %o1, %psr
+	nop
+	nop
+	nop
+	retl
+	nop
+
+/*
+ * void rt_hw_interrupt_enable(rt_base_t level);
+ */
+.globl rt_hw_interrupt_enable
+rt_hw_interrupt_enable:
+	mov %o0, %psr
+	nop
+	nop
+	nop
+	retl
+	nop
+
+/*
+ * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
+ * o0 --> from
+ * o1 --> to
+ */
+.globl rt_hw_context_switch
+rt_hw_context_switch:
+	ta 2
+	retl
+	nop
+	
+/*
+ * void rt_hw_context_switch_to(rt_uint32 to);
+ * o0 --> to
+ */
+.globl rt_hw_context_switch_to
+rt_hw_context_switch_to:
+	mov %o0, %o1
+	ta 3
+	retl
+	nop
+	
+/*
+ * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
+ */
+.globl rt_thread_switch_interrupt_flag
+.globl rt_interrupt_from_thread
+.globl rt_interrupt_to_thread
+.globl rt_hw_context_switch_interrupt
+rt_hw_context_switch_interrupt:
+	set rt_thread_switch_interrupt_flag, %o2
+	ld [%o2], %o3
+	cmp %o3, 1
+	be _reswitch
+	nop
+	mov 1, %o3
+	st %o3, [%o2]
+	set rt_interrupt_from_thread, %o2
+	st %o0, [%o2]
+_reswitch:
+	set rt_interrupt_to_thread, %o2
+	st %o1, [%o2]
+	retl
+	nop
--- a/libcpu/sparc-v8/bm3803/interrupt.c
+++ b/libcpu/sparc-v8/bm3803/interrupt.c
@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "bm3803.h"
+#include "interrupt.h"
+
+#define MAX_HANDLERS 256
+
+extern volatile rt_uint8_t rt_interrupt_nest;
+struct rt_irq_desc isr_table[MAX_HANDLERS];
+rt_uint32_t rt_interrupt_from_thread;
+rt_uint32_t rt_interrupt_to_thread;
+rt_uint32_t rt_thread_switch_interrupt_flag;
+
+/**
+ * This function will initialize hardware interrupt
+ */
+void rt_hw_interrupt_init(void)
+{
+    /* init exceptions table */
+    rt_memset(isr_table, 0x00, sizeof(isr_table));
+
+    /* init interrupt nest, and context in thread sp */
+    rt_interrupt_nest = 0;
+    rt_interrupt_from_thread = 0;
+    rt_interrupt_to_thread = 0;
+    rt_thread_switch_interrupt_flag = 0;
+}
+
+/**
+ * This function will mask a interrupt.
+ * @param vector the interrupt number
+ */
+void rt_hw_interrupt_mask(int vector)
+{
+    if (vector > 0x1F || vector < 0x11)
+        return;
+    volatile struct lregs *regs = (struct lregs *)PREGS;
+    regs->irqmask &= ~(1 << (vector - 0x10));
+}
+
+/**
+ * This function will un-mask a interrupt.
+ * @param vector the interrupt number
+ */
+void rt_hw_interrupt_umask(int vector)
+{
+    if (vector > 0x1F || vector < 0x11)
+        return;
+    volatile struct lregs *regs = (struct lregs *)PREGS;
+    regs->irqmask |= 1 << (vector - 0x10);
+}
+
+/**
+ * This function will install a interrupt service routine to a interrupt.
+ * @param vector the interrupt number
+ * @param new_handler the interrupt service routine to be installed
+ * @param old_handler the old interrupt service routine
+ */
+rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
+        void *param, const char *name)
+{
+    rt_isr_handler_t old_handler = RT_NULL;
+
+    if (vector < MAX_HANDLERS || vector >= 0)
+    {
+        old_handler = isr_table[vector].handler;
+
+        if (handler != RT_NULL)
+        {
+#ifdef RT_USING_INTERRUPT_INFO
+            rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
+#endif /* RT_USING_INTERRUPT_INFO */
+            isr_table[vector].handler = handler;
+            isr_table[vector].param = param;
+        }
+    }
+
+    return old_handler;
+}
+
+void rt_hw_interrupt_clear(int vector)
+{
+    if (vector > 0x1F || vector < 0x11)
+        return;
+    volatile struct lregs *regs = (struct lregs *)PREGS;
+    regs->irqclear |= 1 << (vector - 0x10);
+}
--- a/libcpu/sparc-v8/bm3803/interrupt.h
+++ b/libcpu/sparc-v8/bm3803/interrupt.h
@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ * 2020-10-21     Dystopia     Add new function
+ */
+
+#ifndef __INTERRUPT_H__
+#define __INTERRUPT_H__
+
+void rt_hw_interrupt_clear(int vector);
+
+#endif
--- a/libcpu/sparc-v8/bm3803/stack.c
+++ b/libcpu/sparc-v8/bm3803/stack.c
@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#include <rtthread.h>
+
+/**
+ * This function will initialize thread stack
+ *
+ * @param tentry the entry of thread
+ * @param parameter the parameter of entry
+ * @param stack_addr the beginning stack address
+ * @param texit the function will be called when thread exit
+ *
+ * @return stack address
+ */
+rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
+                             rt_uint8_t *stack_addr, void *texit)
+{
+    rt_uint32_t *stk;
+    int window_index;
+    int register_index;
+
+    stack_addr += sizeof(rt_uint32_t);
+    stack_addr  = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8);
+    stk      = (rt_uint32_t *)stack_addr;
+
+    stk -= 24;
+    stk -= 8;
+
+    for (register_index = 0; register_index != 8; register_index++)
+        stk[register_index] = 0xdeadbeef;
+
+    for (window_index = 0; window_index != 8; window_index++)
+    {
+        stk -= 16;
+        for (register_index = 0; register_index != 16; register_index++)
+            stk[register_index] = 0xdeadbeef;
+        if (window_index == 0)
+        {
+            stk[8] = (rt_uint32_t)parameter;
+            stk[15] = (rt_uint32_t)texit - 8;
+        }
+    }
+
+    stk -= 34;
+    for (register_index = 0; register_index != 34; register_index++)
+        stk[register_index] = 0;
+
+    stk -= 4;
+    stk[0] = (rt_uint32_t)tentry; //pc
+    stk[1] = (rt_uint32_t)tentry + 4; //npc
+    stk[2] = 0x10C7; //psr
+    stk[3] = 0x2; //wim
+
+    /* return task's current stack address */
+    return (rt_uint8_t *)stk;
+}
--- a/libcpu/sparc-v8/bm3803/start_gcc.S
+++ b/libcpu/sparc-v8/bm3803/start_gcc.S
@ -0,0 +1,664 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#define PSR_INIT 0x10C0
+#define PREGS 0x80000000
+#define IMASK 0x90
+#define ICLEAR 0x9c
+#define NWINDOWS 8
+#define CPU_INTERRUPT_FRAME_SIZE (0x60 + 0x50 + 34 * 4)
+#define SPARC_PSR_PIL_MASK 0x00000F00
+#define SPARC_PSR_ET_MASK 0x00000020
+#define SPARC_PSR_CWP_MASK 0x07
+
+.text
+
+.globl system_vectors
+.globl _reset
+.globl _context_switch
+
+_reset:
+	mov %g0, %asr16
+	mov %g0, %asr17
+	nop
+	nop
+	nop
+	
+	set PSR_INIT, %g1
+	mov %g1, %psr
+	nop
+	nop
+	nop
+	
+	mov %g0, %wim
+	nop
+	nop
+	nop
+	
+	mov %g0, %g1
+	mov %g0, %g2
+	mov %g0, %g3
+	mov %g0, %g4
+	mov %g0, %g5
+	mov %g0, %g6
+	mov %g0, %g7
+	
+	mov 0x8, %g1
+1:
+	mov %g0, %l0
+	mov %g0, %l1
+	mov %g0, %l2
+	mov %g0, %l3
+	mov %g0, %l4
+	mov %g0, %l5
+	mov %g0, %l6
+	mov %g0, %l7
+	mov %g0, %i0
+	mov %g0, %i1
+	mov %g0, %i2
+	mov %g0, %i3
+	mov %g0, %i4
+	mov %g0, %i5
+	mov %g0, %i6
+	mov %g0, %i7
+	subcc %g1, 1, %g1
+	save
+	bne 1b
+	nop
+	
+	set 2, %g1
+	mov %g1, %wim
+	nop
+	nop
+	nop
+	
+	sethi %hi(system_vectors), %g1
+	mov %g1, %tbr
+	nop
+	nop
+	nop
+	
+	set PREGS, %g1
+	set 0xffff, %g2
+	st %g2, [%g1 + ICLEAR]
+	st %g0, [%g1 + IMASK]
+	
+	set 0x7C47907F, %g2
+	st %g2, [%g1 + 4]
+	
+	set PSR_INIT | 0x20, %g1
+	mov %g1, %psr
+	nop
+	nop
+	nop
+	
+	set _fsrinit, %g1
+	ld [%g1], %fsr
+	nop
+	nop
+	nop
+
+	set _fpdata, %g1
+	ldd [%g1], %f0
+	ldd [%g1], %f2
+	ldd [%g1], %f4
+	ldd [%g1], %f6
+	ldd [%g1], %f8
+	ldd [%g1], %f10
+	ldd [%g1], %f12
+	ldd [%g1], %f14
+	ldd [%g1], %f16
+	ldd [%g1], %f18
+	ldd [%g1], %f20
+	ldd [%g1], %f22
+	ldd [%g1], %f24
+	ldd [%g1], %f26
+	ldd [%g1], %f28
+	ldd [%g1], %f30
+
+	set __bss_start, %g2
+	set __bss_end, %g3
+	mov %g0, %g1
+bss_loop:
+	std %g0, [%g2]
+	add %g2, 8, %g2
+	cmp %g2, %g3
+	bleu,a bss_loop
+	nop
+	
+	set 0x401FFF00, %g1
+	mov %g1, %sp
+
+    /* start RT-Thread Kernel */
+    call rtthread_startup
+    nop
+    
+/*
+l0 = psr
+l1 = pc
+l2 = npc
+l3 = tbr
+*/
+.globl _ISR_Handler
+_ISR_Handler:
+	mov %g4, %l4
+	mov %g5, %l5
+	mov %wim, %g4
+	srl %g4, %l0, %g5
+	cmp %g5, 1
+	bne dont_do_the_window
+	nop
+	srl %g4, 1, %g5
+	sll %g4, NWINDOWS - 1, %g4
+	or %g4, %g5, %g4
+	save
+	mov %g4, %wim
+	nop
+	nop
+	nop
+	
+	std %l0, [%sp + 0x00]
+	std %l2, [%sp + 0x08]
+	std %l4, [%sp + 0x10]
+	std %l6, [%sp + 0x18]
+
+	std %i0, [%sp + 0x20]
+	std %i2, [%sp + 0x28]
+	std %i4, [%sp + 0x30]
+	std %i6, [%sp + 0x38]
+	
+	restore
+	nop
+
+dont_do_the_window:
+	sub %fp, CPU_INTERRUPT_FRAME_SIZE, %sp
+	
+	std %l0, [%sp + 0x60]
+	st %l2, [%sp + 0x68]
+	st %g1, [%sp + 0x6c]
+	std %g2, [%sp + 0x70]
+	std %l4, [%sp + 0x78]
+	std %g6, [%sp + 0x80]
+	
+	std %i0, [%sp + 0x88]
+	std %i2, [%sp + 0x90]
+	std %i4, [%sp + 0x98]
+	std %i6, [%sp + 0xA0]
+	
+	mov %y, %g1
+	st %g1, [%sp + 0xA8]
+	st %l6, [%sp + 0xAc]
+
+	std %f0, [%sp + 0xB0 + 8 * 0x0]
+	std %f2, [%sp + 0xB0 + 8 * 0x1]
+	std %f4, [%sp + 0xB0 + 8 * 0x2]
+	std %f6, [%sp + 0xB0 + 8 * 0x3]
+	std %f8, [%sp + 0xB0 + 8 * 0x4]
+	std %f10, [%sp + 0xB0 + 8 * 0x5]
+	std %f12, [%sp + 0xB0 + 8 * 0x6]
+	std %f14, [%sp + 0xB0 + 8 * 0x7]
+	std %f16, [%sp + 0xB0 + 8 * 0x8]
+	std %f18, [%sp + 0xB0 + 8 * 0x9]
+	std %f20, [%sp + 0xB0 + 8 * 0xA]
+	std %f22, [%sp + 0xB0 + 8 * 0xB]
+	std %f24, [%sp + 0xB0 + 8 * 0xC]
+	std %f26, [%sp + 0xB0 + 8 * 0xD]
+	std %f28, [%sp + 0xB0 + 8 * 0xE]
+	std %f30, [%sp + 0xB0 + 8 * 0xF]
+	st %fsr, [%sp + 0xB0 + 8 * 0x10]
+	
+	mov %l0, %g5
+	or %g5, SPARC_PSR_PIL_MASK, %g5
+	wr %g5, SPARC_PSR_ET_MASK, %psr
+	nop
+	nop
+	nop
+	
+	call rt_interrupt_enter
+	nop
+	
+	and %l3, 0x0FF0, %l3
+	srl %l3, 4, %o0
+	mov %sp, %o1
+	
+	call rt_hw_trap
+	nop
+	
+	call rt_interrupt_leave
+	nop
+	
+	mov %l0, %psr
+	nop
+	nop
+	nop
+	
+	ld [%sp + 0xA8], %l5
+	mov %l5, %y
+	ldd [%sp + 0x60], %l0
+	ld [%sp + 0x68], %l2
+	
+	ld [%sp + 0x6c], %g1
+	ldd [%sp + 0x70], %g2
+	ldd [%sp + 0x78], %g4
+	ldd [%sp + 0x80], %g6
+
+	ldd [%sp + 0x88], %i0
+	ldd [%sp + 0x90], %i2
+	ldd [%sp + 0x98], %i4
+	ldd [%sp + 0xA0], %i6
+
+	ldd [%sp + 0xB0 + 8 * 0x0], %f0
+	ldd [%sp + 0xB0 + 8 * 0x1], %f2
+	ldd [%sp + 0xB0 + 8 * 0x2], %f4
+	ldd [%sp + 0xB0 + 8 * 0x3], %f6
+	ldd [%sp + 0xB0 + 8 * 0x4], %f8
+	ldd [%sp + 0xB0 + 8 * 0x5], %f10
+	ldd [%sp + 0xB0 + 8 * 0x6], %f12
+	ldd [%sp + 0xB0 + 8 * 0x7], %f14
+	ldd [%sp + 0xB0 + 8 * 0x8], %f16
+	ldd [%sp + 0xB0 + 8 * 0x9], %f18
+	ldd [%sp + 0xB0 + 8 * 0xA], %f20
+	ldd [%sp + 0xB0 + 8 * 0xB], %f22
+	ldd [%sp + 0xB0 + 8 * 0xC], %f24
+	ldd [%sp + 0xB0 + 8 * 0xD], %f26
+	ldd [%sp + 0xB0 + 8 * 0xE], %f28
+	ldd [%sp + 0xB0 + 8 * 0xF], %f30
+	ld [%sp + 0xB0 + 8 * 0x10], %fsr
+	nop
+	nop
+	nop
+	
+	mov %wim, %l4
+	add %l0, 1, %l6
+	and %l6, SPARC_PSR_CWP_MASK, %l6
+	srl %l4, %l6, %l5
+	cmp %l5, 1
+	bne good_task_window
+	nop
+	sll %l4, 1, %l5
+	srl %l4, NWINDOWS - 1, %l4
+	or %l4, %l5, %l4
+	mov %l4, %wim
+	nop
+	nop
+	nop
+	
+	restore
+	ldd [%sp + 0], %l0             ! Restore window from the stack
+	ldd [%sp + 8], %l2
+	ldd [%sp + 16], %l4
+	ldd [%sp + 24], %l6
+	ldd [%sp + 32], %i0
+	ldd [%sp + 40], %i2
+	ldd [%sp + 48], %i4
+	ldd [%sp + 56], %i6
+	save
+	
+good_task_window:
+	set rt_thread_switch_interrupt_flag, %l4
+	ld [%l4], %l5
+	cmp %l5, 1
+	be rt_hw_context_switch_interrupt_do
+	nop
+
+	mov %l0, %psr
+	nop
+	nop
+	nop
+	
+	jmp %l1
+	rett %l2
+
+rt_hw_context_switch_interrupt_do:
+	st %g0, [%l4]
+	
+	sub %fp, 0x20, %sp
+	std %g0, [%sp + 0x00]
+	std %g2, [%sp + 0x08]
+	std %g4, [%sp + 0x10]
+	std %g6, [%sp + 0x18]
+	
+	mov %sp, %g3
+	mov %l1, %g4
+	mov %l2, %g5
+	mov %l0, %g6
+	mov %wim, %g7
+	
+	mov %g0, %wim
+	nop
+	nop
+	nop
+	set 0xFFFFFFF8, %g1
+	and %g1, %g6, %g1
+	mov %g1, %psr
+	nop
+	nop
+	nop
+	
+	mov %g0, %g1
+save_loop:
+	save
+	sub %g3, 0x40, %g3
+	std %l0, [%g3 + 0x00]
+	std %l2, [%g3 + 0x08]
+	std %l4, [%g3 + 0x10]
+	std %l6, [%g3 + 0x18]
+	std %i0, [%g3 + 0x20]
+	std %i2, [%g3 + 0x28]
+	std %i4, [%g3 + 0x30]
+	std %i6, [%g3 + 0x38]
+	inc %g1
+	cmp %g1, NWINDOWS
+	bne save_loop
+	nop
+	
+	sub %g3, 0x88, %g3
+	std %f0, [%g3 + 0x00]
+	std %f2, [%g3 + 0x08]
+	std %f4, [%g3 + 0x10]
+	std %f6, [%g3 + 0x18]
+	std %f8, [%g3 + 0x20]
+	std %f10, [%g3 + 0x28]
+	std %f12, [%g3 + 0x30]
+	std %f14, [%g3 + 0x38]
+	std %f16, [%g3 + 0x40]
+	std %f18, [%g3 + 0x48]
+	std %f20, [%g3 + 0x50]
+	std %f22, [%g3 + 0x58]
+	std %f24, [%g3 + 0x60]
+	std %f26, [%g3 + 0x68]
+	std %f28, [%g3 + 0x70]
+	std %f30, [%g3 + 0x78]
+	mov %y, %g1
+	st %g1, [%g3 + 0x80]
+	st %fsr, [%g3 + 0x84]
+	
+	sub %g3, 0x10, %g3
+	std %g4, [%g3 + 0x00]
+	std %g6, [%g3 + 0x08]
+	
+	set rt_interrupt_from_thread, %g1
+	ld [%g1], %g2
+	st %g3, [%g2]
+	
+	set rt_interrupt_to_thread, %g1
+	ld [%g1], %g1
+	ld [%g1], %g3
+
+	ldd [%g3 + 0x00], %g4
+	ldd [%g3 + 0x08], %g6
+	add %g3, 0x10, %g3
+	
+	ldd [%g3 + 0x00], %f0
+	ldd [%g3 + 0x08], %f2
+	ldd [%g3 + 0x10], %f4
+	ldd [%g3 + 0x18], %f6
+	ldd [%g3 + 0x20], %f8
+	ldd [%g3 + 0x28], %f10
+	ldd [%g3 + 0x30], %f12
+	ldd [%g3 + 0x38], %f14
+	ldd [%g3 + 0x40], %f16
+	ldd [%g3 + 0x48], %f18
+	ldd [%g3 + 0x50], %f20
+	ldd [%g3 + 0x58], %f22
+	ldd [%g3 + 0x60], %f24
+	ldd [%g3 + 0x68], %f26
+	ldd [%g3 + 0x70], %f28
+	ldd [%g3 + 0x78], %f30
+	ld [%g3 + 0x80], %g1
+	mov %g1, %y
+	ld [%g3 + 0x84], %fsr
+	add %g3, 0x88, %g3
+	
+	set NWINDOWS - 1, %g1
+	or %g1, %g6, %g1
+	mov %g1, %psr
+	nop
+	nop
+	nop
+	
+	mov %g0, %g1
+restore_loop:
+	restore
+	ldd [%g3 + 0x00], %l0
+	ldd [%g3 + 0x08], %l2
+	ldd [%g3 + 0x10], %l4
+	ldd [%g3 + 0x18], %l6 
+	ldd [%g3 + 0x20], %i0
+	ldd [%g3 + 0x28], %i2
+	ldd [%g3 + 0x30], %i4
+	ldd [%g3 + 0x38], %i6
+	add %g3, 0x40, %g3
+	inc %g1
+	cmp %g1, NWINDOWS
+	bne restore_loop
+	nop
+	
+	mov %g6, %psr
+	nop
+	nop
+	nop
+	mov %g7, %wim
+	nop
+	nop
+	nop
+	
+	mov %g4, %l1
+	mov %g5, %l2
+	mov %g3, %sp
+	
+	ldd [%sp + 0x00], %g0
+	ldd [%sp + 0x08], %g2
+	ldd [%sp + 0x10], %g4
+	ldd [%sp + 0x18], %g6	
+	add %sp, 0x20, %fp
+	jmp %l1
+	rett %l2
+
+/*
+l0 = psr
+l1 = pc
+l2 = npc
+l3 = tbr
+*/
+_context_switch:
+	mov %l2, %l1
+	add %l2, 4, %l2
+	
+	mov %g4, %l4
+	mov %g5, %l5
+	mov %wim, %g4
+	srl %g4, %l0, %g5
+	cmp %g5, 1
+	bne good_window
+	nop
+	srl %g4, 1, %g5
+	sll %g4, NWINDOWS - 1, %g4
+	or %g4, %g5, %g4
+	save
+	mov %g4, %wim
+	nop
+	nop
+	nop
+	
+	std %l0, [%sp + 0x00]
+	std %l2, [%sp + 0x08]
+	std %l4, [%sp + 0x10]
+	std %l6, [%sp + 0x18]
+
+	std %i0, [%sp + 0x20]
+	std %i2, [%sp + 0x28]
+	std %i4, [%sp + 0x30]
+	std %i6, [%sp + 0x38]
+	
+	restore
+	nop
+
+good_window:
+	and %l3, 0x0FF0, %l3
+	srl %l3, 4, %l4
+	cmp %l4, 0x82
+	bne switch_to
+	nop
+	
+	sub %fp, 0x20, %sp
+	std %g0, [%sp + 0x00]
+	std %g2, [%sp + 0x08]
+	std %g4, [%sp + 0x10]
+	std %g6, [%sp + 0x18]
+	
+	mov %sp, %g3
+	mov %l1, %g4
+	mov %l2, %g5
+	mov %l0, %g6
+	mov %wim, %g7
+	
+	mov %g0, %wim
+	nop
+	nop
+	nop
+	set 0xFFFFFFF8, %g1
+	and %g1, %g6, %g1
+	mov %g1, %psr
+	nop
+	nop
+	nop
+	
+	mov %g0, %g1
+save_window:
+	save
+	sub %g3, 0x40, %g3
+	std %l0, [%g3 + 0x00]
+	std %l2, [%g3 + 0x08]
+	std %l4, [%g3 + 0x10]
+	std %l6, [%g3 + 0x18]
+	std %i0, [%g3 + 0x20]
+	std %i2, [%g3 + 0x28]
+	std %i4, [%g3 + 0x30]
+	std %i6, [%g3 + 0x38]
+	inc %g1
+	cmp %g1, NWINDOWS
+	bne save_window
+	nop
+	
+	sub %g3, 0x88, %g3
+	std %f0, [%g3 + 0x00]
+	std %f2, [%g3 + 0x08]
+	std %f4, [%g3 + 0x10]
+	std %f6, [%g3 + 0x18]
+	std %f8, [%g3 + 0x20]
+	std %f10, [%g3 + 0x28]
+	std %f12, [%g3 + 0x30]
+	std %f14, [%g3 + 0x38]
+	std %f16, [%g3 + 0x40]
+	std %f18, [%g3 + 0x48]
+	std %f20, [%g3 + 0x50]
+	std %f22, [%g3 + 0x58]
+	std %f24, [%g3 + 0x60]
+	std %f26, [%g3 + 0x68]
+	std %f28, [%g3 + 0x70]
+	std %f30, [%g3 + 0x78]
+	mov %y, %g1
+	st %g1, [%g3 + 0x80]
+	st %fsr, [%g3 + 0x84]
+	
+	sub %g3, 0x10, %g3
+	std %g4, [%g3 + 0x00]
+	std %g6, [%g3 + 0x08]
+	
+	mov %g6, %psr
+	nop
+	nop
+	nop
+	
+	st %g3, [%i0]
+switch_to:
+	mov %g0, %wim
+	nop
+	nop
+	nop
+	ld [%i1], %g3
+
+	ldd [%g3 + 0x00], %g4
+	ldd [%g3 + 0x08], %g6
+	add %g3, 0x10, %g3
+	
+	ldd [%g3 + 0x00], %f0
+	ldd [%g3 + 0x08], %f2
+	ldd [%g3 + 0x10], %f4
+	ldd [%g3 + 0x18], %f6
+	ldd [%g3 + 0x20], %f8
+	ldd [%g3 + 0x28], %f10
+	ldd [%g3 + 0x30], %f12
+	ldd [%g3 + 0x38], %f14
+	ldd [%g3 + 0x40], %f16
+	ldd [%g3 + 0x48], %f18
+	ldd [%g3 + 0x50], %f20
+	ldd [%g3 + 0x58], %f22
+	ldd [%g3 + 0x60], %f24
+	ldd [%g3 + 0x68], %f26
+	ldd [%g3 + 0x70], %f28
+	ldd [%g3 + 0x78], %f30
+	ld [%g3 + 0x80], %g1
+	mov %g1, %y
+	ld [%g3 + 0x84], %fsr
+	add %g3, 0x88, %g3
+	
+	set NWINDOWS - 1, %g1
+	or %g1, %g6, %g1
+	mov %g1, %psr
+	nop
+	nop
+	nop
+	
+	mov %g0, %g1
+restore_window:
+	restore
+	ldd [%g3 + 0x00], %l0
+	ldd [%g3 + 0x08], %l2
+	ldd [%g3 + 0x10], %l4
+	ldd [%g3 + 0x18], %l6 
+	ldd [%g3 + 0x20], %i0
+	ldd [%g3 + 0x28], %i2
+	ldd [%g3 + 0x30], %i4
+	ldd [%g3 + 0x38], %i6
+	add %g3, 0x40, %g3
+	inc %g1
+	cmp %g1, NWINDOWS
+	bne restore_window
+	nop
+	
+	mov %g6, %psr
+	nop
+	nop
+	nop
+	mov %g7, %wim
+	nop
+	nop
+	nop
+	
+	mov %g4, %l1
+	mov %g5, %l2
+	mov %g3, %sp
+	
+	ldd [%sp + 0x00], %g0
+	ldd [%sp + 0x08], %g2
+	ldd [%sp + 0x10], %g4
+	ldd [%sp + 0x18], %g6	
+	add %sp, 0x20, %fp
+	jmp %l1
+	rett %l2
+	
+.data 
+.align 8
+_fpdata:
+	.word 0, 0
+_fsrinit:
+	.word 0
--- a/libcpu/sparc-v8/bm3803/trap.c
+++ b/libcpu/sparc-v8/bm3803/trap.c
@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+
+extern struct rt_irq_desc isr_table[];
+
+void rt_hw_trap(int tt, unsigned int *sp)
+{
+    void *param;
+    rt_isr_handler_t isr_func;
+
+    /* get interrupt service routine */
+    isr_func = isr_table[tt].handler;
+    param = isr_table[tt].param;
+
+    /* turn to interrupt service routine */
+    if (isr_func != RT_NULL)
+        isr_func(tt, param);
+}
--- a/libcpu/sparc-v8/bm3803/vector_gcc.S
+++ b/libcpu/sparc-v8/bm3803/vector_gcc.S
@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2020, Shenzhen Academy of Aerospace Technology
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-10-16     Dystopia     the first version
+ */
+
+#define TRAPL(H) mov %g0, %l0; sethi %hi(H), %l4; jmp %l4 + %lo(H); nop;
+#define TRAP(H) mov %psr, %l0; sethi %hi(H), %l4; jmp %l4 + %lo(H); nop;
+#define TRAP_ENTRY(H) mov %psr, %l0; sethi %hi(H), %l4; jmp %l4 + %lo(H); mov %tbr, %l3;
+#define BAD_TRAP ta 0; nop; nop; nop;
+#define SOFT_TRAP BAD_TRAP
+#define NWINDOWS 8
+
+.section .vectors, "ax"
+
+.globl _ISR_Handler
+.globl _window_overflow
+.globl _window_underflow
+.globl _reset
+.globl _context_switch
+
+.globl system_vectors
+system_vectors:
+    TRAPL(_reset);       ! 00 reset trap
+    BAD_TRAP;			 ! 01 instruction_access_exception
+    BAD_TRAP;			 ! 02 illegal_instruction
+    BAD_TRAP;			 ! 03 priveleged_instruction
+    BAD_TRAP;
+    TRAP(_window_overflow);	            ! 05 window_overflow
+    TRAP(_window_underflow);	        ! 06 window_underflow
+    BAD_TRAP;			 ! 07 memory_add0ress_not_aligned
+    BAD_TRAP;			 ! 08 fp_exception
+    BAD_TRAP;			 ! 09 data_access_exception
+    BAD_TRAP;			 ! 0A tag_overflow
+    BAD_TRAP;			 ! 0B undefined
+    BAD_TRAP;			 ! 0C undefined
+    BAD_TRAP;			 ! 0D undefined
+    BAD_TRAP;			 ! 0E undefined
+    BAD_TRAP;			 ! 0F undefined
+    BAD_TRAP;			 ! 10 undefined
+
+    /* Interrupt entries */
+    TRAP_ENTRY(_ISR_Handler) 	       ! 11 interrupt level 1
+    TRAP_ENTRY(_ISR_Handler) 		   ! 12 interrupt level 2
+    TRAP_ENTRY(_ISR_Handler) 		   ! 13 interrupt level 3
+    TRAP_ENTRY(_ISR_Handler) 		   ! 14 interrupt level 4
+    TRAP_ENTRY(_ISR_Handler) 		   ! 15 interrupt level 5
+    TRAP_ENTRY(_ISR_Handler) 		   ! 16 interrupt level 6
+    TRAP_ENTRY(_ISR_Handler) 		   ! 17 interrupt level 7
+    TRAP_ENTRY(_ISR_Handler) 		   ! 18 interrupt level 8
+    TRAP_ENTRY(_ISR_Handler) 		   ! 19 interrupt level 9
+    TRAP_ENTRY(_ISR_Handler) 		   ! 1A interrupt level 1
+    TRAP_ENTRY(_ISR_Handler) 		   ! 1B interrupt level 11
+    TRAP_ENTRY(_ISR_Handler) 		   ! 1C interrupt level 12
+    TRAP_ENTRY(_ISR_Handler) 		   ! 1D interrupt level 13
+    TRAP_ENTRY(_ISR_Handler) 		   ! 1E interrupt level 14
+    TRAP_ENTRY(_ISR_Handler) 		   ! 1F interrupt level 15
+
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 20 - 23 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;		! 24 - 27 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;     ! 28 - 2B undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 2C - 2F undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 30 - 33 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 34 - 37 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 38 - 3B undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 3C - 3F undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 40 - 43 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 44 - 47 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 48 - 4B undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 4C - 4F undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 50 - 53 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 54 - 57 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 58 - 5B undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 5C - 5F undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 60 - 63 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 64 - 67 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 68 - 6B undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 6C - 6F undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 70 - 73 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 74 - 77 undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 78 - 7B undefined
+    BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	    ! 7C - 7F undefined
+
+    /* Software traps */
+    SOFT_TRAP; SOFT_TRAP; TRAP_ENTRY(_context_switch); TRAP_ENTRY(_context_switch) ! 80 - 83
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 84 - 87
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 88 - 8B
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 8C - 8F
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 90 - 93
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 94 - 97
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 98 - 9B
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 9C - 9F
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! A0 - A3
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! A4 - A7
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! A8 - AB
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! AC - AF
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! B0 - B3
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! B4 - B7
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! B8 - BB
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! BC - BF
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! C0 - C3
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! C4 - C7
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! C8 - CB
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! CC - CF
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! D0 - D3
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! D4 - D7
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! D8 - DB
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! DC - DF
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! E0 - E3
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! E4 - E7
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! E8 - EB
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! EC - EF
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! F0 - F3
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! F4 - F7
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! F8 - FB
+    SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! FC - FF
+    
+_window_overflow:
+	mov %wim, %l3                   ! Calculate next WIM
+	mov %g1, %l7
+	srl %l3, 1, %g1
+	sll %l3, NWINDOWS - 1, %l4
+	or %l4, %g1, %g1
+	save                             ! Get into window to be saved.
+	mov %g1, %wim
+	nop
+	nop
+	nop
+	std %l0, [%sp + 0]
+	std %l2, [%sp + 8]
+	std %l4, [%sp + 16]
+	std %l6, [%sp + 24]
+	std %i0, [%sp + 32]
+	std %i2, [%sp + 40]
+	std %i4, [%sp + 48]
+	std %i6, [%sp + 56]
+	restore                          ! Go back to trap window.
+	mov %l7, %g1
+	jmp %l1                         ! Re-execute save.
+	rett %l2
+	
+_window_underflow:
+	mov %wim, %l3                   ! Calculate next WIM
+	sll %l3, 1, %l4
+	srl %l3, NWINDOWS - 1, %l5
+	or %l5, %l4, %l5
+	mov %l5, %wim
+	nop
+	nop
+	nop
+	restore                          ! Two restores to get into the
+	restore                          ! window to restore
+	ldd [%sp + 0], %l0             ! Restore window from the stack
+	ldd [%sp + 8], %l2
+	ldd [%sp + 16], %l4
+	ldd [%sp + 24], %l6
+	ldd [%sp + 32], %i0
+	ldd [%sp + 40], %i2
+	ldd [%sp + 48], %i4
+	ldd [%sp + 56], %i6
+	save                             ! Get back to the trap window.
+	save
+	jmp %l1                         ! Re-execute restore.
+	rett %l2
--- a/libcpu/sparc-v8/common/SConscript
+++ b/libcpu/sparc-v8/common/SConscript
@ -0,0 +1,17 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/src/ipc.c
+++ b/src/ipc.c
@ -36,8 +36,7 @@
 * 2019-09-16     tyx          add send wait support for message queue
 * 2020-07-29     Meco Man     fix thread->event_set/event_info when received an 
 *                             event without pending
- * 2020-10-11     Meco Man     add semaphore values' overflow-check code
- * 2020-10-21     Meco Man     add mutex values' overflow-check code
+ * 2020-10-11     Meco Man     add value overflow-check code
 */

 #include <rtthread.h>
@ -466,7 +465,7 @@ rt_err_t rt_sem_release(rt_sem_t sem)
    }
    else
    {
-        if(sem->value < 65535u)
+        if(sem->value < RT_SEM_VALUE_MAX)
        {
            sem->value ++; /* increase value */
        }
@ -697,7 +696,7 @@ rt_err_t rt_mutex_take(rt_mutex_t mutex, rt_int32_t time)

    if (mutex->owner == thread)
    {
-        if(mutex->hold < 255u)
+        if(mutex->hold < RT_MUTEX_HOLD_MAX)
        {
            /* it's the same thread */
            mutex->hold ++;
@ -724,7 +723,15 @@ __again:
            /* set mutex owner and original priority */
            mutex->owner             = thread;
            mutex->original_priority = thread->current_priority;
-            mutex->hold ++;
+            if(mutex->hold < RT_MUTEX_HOLD_MAX)
+            {
+                mutex->hold ++;
+            }
+            else
+            {
+                rt_hw_interrupt_enable(temp); /* enable interrupt */
+                return -RT_EFULL; /* value overflowed */
+            }
        }
        else
        {
@ -881,7 +888,15 @@ rt_err_t rt_mutex_release(rt_mutex_t mutex)
            /* set new owner and priority */
            mutex->owner             = thread;
            mutex->original_priority = thread->current_priority;
-            mutex->hold ++;
+            if(mutex->hold < RT_MUTEX_HOLD_MAX)
+            {
+                mutex->hold ++;
+            }
+            else
+            {
+                rt_hw_interrupt_enable(temp); /* enable interrupt */
+                return -RT_EFULL; /* value overflowed */
+            }

            /* resume thread */
            rt_ipc_list_resume(&(mutex->parent.suspend_thread));
@ -890,9 +905,17 @@ rt_err_t rt_mutex_release(rt_mutex_t mutex)
        }
        else
        {
-            /* increase value */
-            mutex->value ++;
-
+            if(mutex->value < RT_MUTEX_VALUE_MAX)
+            {
+                /* increase value */
+                mutex->value ++;
+            }
+            else
+            {
+                rt_hw_interrupt_enable(temp); /* enable interrupt */
+                return -RT_EFULL; /* value overflowed */
+            }
+            
            /* clear owner */
            mutex->owner             = RT_NULL;
            mutex->original_priority = 0xff;
@ -1583,9 +1606,18 @@ rt_err_t rt_mb_send_wait(rt_mailbox_t mb,
    ++ mb->in_offset;
    if (mb->in_offset >= mb->size)
        mb->in_offset = 0;
-    /* increase message entry */
-    mb->entry ++;
-
+    
+    if(mb->entry < RT_MB_ENTRY_MAX)
+    {
+        /* increase message entry */
+        mb->entry ++;
+    }
+    else
+    {
+        rt_hw_interrupt_enable(temp); /* enable interrupt */
+        return -RT_EFULL; /* value overflowed */
+    }
+    
    /* resume suspended thread */
    if (!rt_list_isempty(&mb->parent.suspend_thread))
    {
@ -2147,8 +2179,16 @@ rt_err_t rt_mq_send_wait(rt_mq_t     mq,
    if (mq->msg_queue_head == RT_NULL)
        mq->msg_queue_head = msg;

-    /* increase message entry */
-    mq->entry ++;
+    if(mq->entry < RT_MQ_ENTRY_MAX)
+    {
+        /* increase message entry */
+        mq->entry ++;
+    }
+    else
+    {
+        rt_hw_interrupt_enable(temp); /* enable interrupt */
+        return -RT_EFULL; /* value overflowed */
+    }

    /* resume suspended thread */
    if (!rt_list_isempty(&mq->parent.suspend_thread))
@ -2247,9 +2287,17 @@ rt_err_t rt_mq_urgent(rt_mq_t mq, const void *buffer, rt_size_t size)
    if (mq->msg_queue_tail == RT_NULL)
        mq->msg_queue_tail = msg;

-    /* increase message entry */
-    mq->entry ++;
-
+    if(mq->entry < RT_MQ_ENTRY_MAX)
+    {
+        /* increase message entry */
+        mq->entry ++;
+    }
+    else
+    {
+        rt_hw_interrupt_enable(temp); /* enable interrupt */
+        return -RT_EFULL; /* value overflowed */
+    }
+    
    /* resume suspended thread */
    if (!rt_list_isempty(&mq->parent.suspend_thread))
    {