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flush cache after exception code install

This commit is contained in:
kontais 2016-06-15 08:09:56 -07:00
parent 99481cd0ac
commit b96f07e477
4 changed files with 15 additions and 2 deletions
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3
bsp/ls1bdev/applications/startup.c
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@ -32,6 +32,9 @@ extern int rt_application_init(void);
extern void tlb_refill_exception(void); extern void tlb_refill_exception(void);
extern void general_exception(void); extern void general_exception(void);
extern void irq_exception(void); extern void irq_exception(void);
extern void rt_hw_cache_init(void);
extern void invalidate_writeback_dcache_all(void);
extern void invalidate_icache_all(void);
/** /**
* This function will startup RT-Thread RTOS. * This function will startup RT-Thread RTOS.

6
bsp/ls1cdev/applications/startup.c
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@ -33,6 +33,9 @@ extern int rt_application_init(void);
extern void tlb_refill_exception(void); extern void tlb_refill_exception(void);
extern void general_exception(void); extern void general_exception(void);
extern void irq_exception(void); extern void irq_exception(void);
extern void rt_hw_cache_init(void);
extern void invalidate_writeback_dcache_all(void);
extern void invalidate_icache_all(void);
/** /**
* This function will startup RT-Thread RTOS. * This function will startup RT-Thread RTOS.
@ -52,6 +55,9 @@ void rtthread_startup(void)
rt_memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x20); rt_memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x20);
rt_memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x20); rt_memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x20);
invalidate_writeback_dcache_all();
invalidate_icache_all();
/* init board */ /* init board */
rt_hw_board_init(); rt_hw_board_init();

4
libcpu/mips/loongson_1b/cache.c
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@ -13,6 +13,7 @@
* 2011-08-08 lgnq modified for LS1B * 2011-08-08 lgnq modified for LS1B
*/ */
#include <rtthread.h>
#include "../common/mipsregs.h" #include "../common/mipsregs.h"
#define K0BASE 0x80000000 #define K0BASE 0x80000000
@ -23,6 +24,7 @@ extern void Invalidate_Icache_Ls1b(unsigned int);
extern void Invalidate_Dcache_ClearTag_Ls1b(unsigned int); extern void Invalidate_Dcache_ClearTag_Ls1b(unsigned int);
extern void Invalidate_Dcache_Fill_Ls1b(unsigned int); extern void Invalidate_Dcache_Fill_Ls1b(unsigned int);
extern void Writeback_Invalidate_Dcache(unsigned int); extern void Writeback_Invalidate_Dcache(unsigned int);
extern void enable_cpu_cache(void);
typedef struct cacheinfo_t typedef struct cacheinfo_t
{ {
@ -151,7 +153,7 @@ void invalidate_dcache_all(void)
unsigned int end = (start + pcacheinfo->dcache_size); unsigned int end = (start + pcacheinfo->dcache_size);
while (start <end) while (start <end)
{ {
Invalidate_Dcache_Fill_Gc3210I(start); Invalidate_Dcache_Fill_Ls1b(start);
start += pcacheinfo->icacheline_size; start += pcacheinfo->icacheline_size;
} }
} }

4
libcpu/mips/loongson_1c/cache.c
View File

@ -14,6 +14,7 @@
* 2015-07-08 chinesebear modified for loongson 1c * 2015-07-08 chinesebear modified for loongson 1c
*/ */
#include <rtthread.h>
#include "../common/mipsregs.h" #include "../common/mipsregs.h"
#define K0BASE 0x80000000 #define K0BASE 0x80000000
@ -24,6 +25,7 @@ extern void Invalidate_Icache_Ls1c(unsigned int);
extern void Invalidate_Dcache_ClearTag_Ls1c(unsigned int); extern void Invalidate_Dcache_ClearTag_Ls1c(unsigned int);
extern void Invalidate_Dcache_Fill_Ls1c(unsigned int); extern void Invalidate_Dcache_Fill_Ls1c(unsigned int);
extern void Writeback_Invalidate_Dcache(unsigned int); extern void Writeback_Invalidate_Dcache(unsigned int);
extern void enable_cpu_cache(void);
typedef struct cacheinfo_t typedef struct cacheinfo_t
{ {
@ -152,7 +154,7 @@ void invalidate_dcache_all(void)
unsigned int end = (start + pcacheinfo->dcache_size); unsigned int end = (start + pcacheinfo->dcache_size);
while (start <end) while (start <end)
{ {
Invalidate_Dcache_Fill_Gc3210I(start); Invalidate_Dcache_Fill_Ls1c(start);
start += pcacheinfo->icacheline_size; start += pcacheinfo->icacheline_size;
} }
} }