[BSP][stm32f4xx-HAL] Add GNU GCC support.
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Bernard Xiong
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9dd8855938
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/**
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*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
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* @file gcc_startup.s
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* @author MCD Application Team
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* @version V4.2.0
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* @date 31-March-2017
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* @brief Based on STM32F103xE's startup file.
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* This module performs:
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* - Set the initial SP
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* - Set the initial PC == Reset_Handler,
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* - Set the vector table entries with the exceptions ISR address
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* - Configure the clock system
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* - Configure external SRAM mounted on STM3210E-EVAL board
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* to be used as data memory (optional, to be enabled by user)
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* - Branches to entry in the C library (which eventually
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* calls main(), but entry() in RT-Thread).
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* After Reset the Cortex-M3 processor is in Thread mode,
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* priority is Privileged, and the Stack is set to Main.
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******************************************************************************
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*
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* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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.syntax unified
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.cpu cortex-m3
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.fpu softvfp
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.thumb
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/**
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* @brief This is the code that gets called when the processor first
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* starts execution following a reset event. Only the absolutely
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* necessary set is performed, after which the application
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* supplied main() routine is called.
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* @param None
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* @retval : None
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*/
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.global Reset_Handler
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.section .text.Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Copy the data segment initializers from flash to SRAM */
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movs r1, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r3, =_sidata
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ldr r3, [r3, r1]
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str r3, [r0, r1]
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adds r1, r1, #4
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LoopCopyDataInit:
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ldr r0, =_sdata
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ldr r3, =_edata
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adds r2, r0, r1
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cmp r2, r3
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bcc CopyDataInit
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ldr r2, =_sbss
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b LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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movs r3, #0
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str r3, [r2], #4
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LoopFillZerobss:
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ldr r3, = _ebss
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cmp r2, r3
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bcc FillZerobss
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/* Call the clock system intitialization function.*/
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bl SystemInit
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/* Call static constructors */
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/* bl __libc_init_array */
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/* Call the application's entry point.*/
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bl entry
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bx lr
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.size Reset_Handler, .-Reset_Handler
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@ -61,10 +61,12 @@ CPPDEFINES = [STM32_TYPE]
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# add for startup script
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if rtconfig.CROSS_TOOL == 'gcc':
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folder = 'gcc'
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src += ['Device/ST/STM32F4xx/Source/Templates/gcc/gcc_startup.s']
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elif rtconfig.CROSS_TOOL == 'keil':
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folder = 'arm'
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elif rtconfig.CROSS_TOOL == 'iar':
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folder = 'iar'
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#Device/ST/STM32F4xx/Source/Templates/iar/startup_stm32f411xe.s
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src += ['Device/ST/STM32F4xx/Source/Templates/' + folder + '/startup_' + STM32_TYPE.lower() + '.s']
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@ -20,8 +20,3 @@ int main(void)
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return 0;
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}
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