diff --git a/bsp/stm32f4xx-HAL/Libraries/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/gcc_startup.s b/bsp/stm32f4xx-HAL/Libraries/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/gcc_startup.s
new file mode 100644
index 0000000000..c16f4bf9a9
--- /dev/null
+++ b/bsp/stm32f4xx-HAL/Libraries/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/gcc_startup.s
@@ -0,0 +1,104 @@
+/**
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
+ * @file gcc_startup.s
+ * @author MCD Application Team
+ * @version V4.2.0
+ * @date 31-March-2017
+ * @brief Based on STM32F103xE's startup file.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address
+ * - Configure the clock system
+ * - Configure external SRAM mounted on STM3210E-EVAL board
+ * to be used as data memory (optional, to be enabled by user)
+ * - Branches to entry in the C library (which eventually
+ * calls main(), but entry() in RT-Thread).
+ * After Reset the Cortex-M3 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ *
+ *
© COPYRIGHT(c) 2017 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m3
+ .fpu softvfp
+ .thumb
+
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .global Reset_Handler
+
+ .section .text.Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+
+/* Copy the data segment initializers from flash to SRAM */
+ movs r1, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r3, =_sidata
+ ldr r3, [r3, r1]
+ str r3, [r0, r1]
+ adds r1, r1, #4
+
+LoopCopyDataInit:
+ ldr r0, =_sdata
+ ldr r3, =_edata
+ adds r2, r0, r1
+ cmp r2, r3
+ bcc CopyDataInit
+ ldr r2, =_sbss
+ b LoopFillZerobss
+/* Zero fill the bss segment. */
+FillZerobss:
+ movs r3, #0
+ str r3, [r2], #4
+
+LoopFillZerobss:
+ ldr r3, = _ebss
+ cmp r2, r3
+ bcc FillZerobss
+
+/* Call the clock system intitialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ /* bl __libc_init_array */
+/* Call the application's entry point.*/
+ bl entry
+ bx lr
+.size Reset_Handler, .-Reset_Handler
+
diff --git a/bsp/stm32f4xx-HAL/Libraries/CMSIS/SConscript b/bsp/stm32f4xx-HAL/Libraries/CMSIS/SConscript
index 73d0c0ee4b..a0e5729813 100644
--- a/bsp/stm32f4xx-HAL/Libraries/CMSIS/SConscript
+++ b/bsp/stm32f4xx-HAL/Libraries/CMSIS/SConscript
@@ -61,10 +61,12 @@ CPPDEFINES = [STM32_TYPE]
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
folder = 'gcc'
+ src += ['Device/ST/STM32F4xx/Source/Templates/gcc/gcc_startup.s']
elif rtconfig.CROSS_TOOL == 'keil':
folder = 'arm'
elif rtconfig.CROSS_TOOL == 'iar':
folder = 'iar'
+
#Device/ST/STM32F4xx/Source/Templates/iar/startup_stm32f411xe.s
src += ['Device/ST/STM32F4xx/Source/Templates/' + folder + '/startup_' + STM32_TYPE.lower() + '.s']
diff --git a/bsp/stm32f4xx-HAL/applications/main.c b/bsp/stm32f4xx-HAL/applications/main.c
index 6e190ae3cc..c9008d5a82 100644
--- a/bsp/stm32f4xx-HAL/applications/main.c
+++ b/bsp/stm32f4xx-HAL/applications/main.c
@@ -20,8 +20,3 @@ int main(void)
return 0;
}
-
-
-
-
-