From b7554a70d21582cab97028477941fb692ef248b8 Mon Sep 17 00:00:00 2001 From: Shell Date: Sun, 14 May 2023 23:48:16 +0800 Subject: [PATCH] [libcpu][component][debug] add debug info for gdb (#7033) --- .../lwp/arch/aarch64/cortex-a/lwp_gcc.S | 8 +-- components/lwp/arch/arm/cortex-a/lwp_gcc.S | 4 +- components/lwp/arch/risc-v/rv64/lwp_gcc.S | 5 +- libcpu/aarch64/common/asm-generic.h | 26 +++++++ libcpu/aarch64/common/asm_fpu.h | 47 ------------ libcpu/aarch64/common/context_gcc.S | 16 +++-- libcpu/aarch64/common/cpuport.h | 1 + libcpu/aarch64/common/stack.c | 71 ++++++++++--------- libcpu/arm/cortex-a/asm-generic.h | 25 +++++++ libcpu/arm/cortex-a/cpuport.h | 2 + libcpu/arm/cortex-a/stack.c | 6 +- libcpu/arm/cortex-a/start_gcc.S | 9 +++ libcpu/risc-v/t-head/c906/asm-generic.h | 26 +++++++ libcpu/risc-v/virt64/asm-generic.h | 26 +++++++ libcpu/risc-v/virt64/cpuport_gcc.S | 12 ++-- 15 files changed, 184 insertions(+), 100 deletions(-) create mode 100644 libcpu/aarch64/common/asm-generic.h delete mode 100644 libcpu/aarch64/common/asm_fpu.h create mode 100644 libcpu/arm/cortex-a/asm-generic.h create mode 100644 libcpu/risc-v/t-head/c906/asm-generic.h create mode 100644 libcpu/risc-v/virt64/asm-generic.h diff --git a/components/lwp/arch/aarch64/cortex-a/lwp_gcc.S b/components/lwp/arch/aarch64/cortex-a/lwp_gcc.S index c873cd5357..43cac34edd 100644 --- a/components/lwp/arch/aarch64/cortex-a/lwp_gcc.S +++ b/components/lwp/arch/aarch64/cortex-a/lwp_gcc.S @@ -9,7 +9,7 @@ */ #include "rtconfig.h" - +#include "asm-generic.h" #include "asm-fpu.h" /********************* @@ -188,10 +188,9 @@ lwp_exec_user: /* * void SVC_Handler(regs); + * since this routine reset the SP, we take it as a start point */ -.global SVC_Handler -.type SVC_Handler, % function -SVC_Handler: +START_POINT(SVC_Handler) /* x0 is initial sp */ mov sp, x0 @@ -220,6 +219,7 @@ SVC_Handler: blr x30 /* jump explictly, make this code position independant */ b arch_syscall_exit +START_POINT_END(SVC_Handler) .global arch_syscall_exit arch_syscall_exit: diff --git a/components/lwp/arch/arm/cortex-a/lwp_gcc.S b/components/lwp/arch/arm/cortex-a/lwp_gcc.S index c25d5ee3ff..34f4d7e371 100644 --- a/components/lwp/arch/arm/cortex-a/lwp_gcc.S +++ b/components/lwp/arch/arm/cortex-a/lwp_gcc.S @@ -9,6 +9,7 @@ */ #include "rtconfig.h" +#include "asm-generic.h" #define Mode_USR 0x10 #define Mode_FIQ 0x11 @@ -153,7 +154,7 @@ lwp_exec_user: */ .global vector_swi .type vector_swi, % function -vector_swi: +START_POINT(vector_swi) push {lr} mrs lr, spsr push {r4, r5, lr} @@ -179,6 +180,7 @@ vector_swi: pop {r0 - r3, r12} beq arch_syscall_exit blx lr +START_POINT_END(vector_swi) .global arch_syscall_exit arch_syscall_exit: diff --git a/components/lwp/arch/risc-v/rv64/lwp_gcc.S b/components/lwp/arch/risc-v/rv64/lwp_gcc.S index 3977553dbf..de47b1e0ca 100644 --- a/components/lwp/arch/risc-v/rv64/lwp_gcc.S +++ b/components/lwp/arch/risc-v/rv64/lwp_gcc.S @@ -21,6 +21,7 @@ #include "cpuport.h" #include "encoding.h" #include "stackframe.h" +#include "asm-generic.h" .section .text.lwp @@ -269,8 +270,7 @@ arch_fork_exit: arch_clone_exit: j arch_syscall_exit -.global syscall_entry -syscall_entry: +START_POINT(syscall_entry) #ifndef ARCH_USING_NEW_CTX_SWITCH //swap to thread kernel stack csrr t0, sstatus @@ -319,6 +319,7 @@ copy_context_loop: OPEN_INTERRUPT call syscall_handler j arch_syscall_exit +START_POINT_END(syscall_entry) .global arch_syscall_exit arch_syscall_exit: diff --git a/libcpu/aarch64/common/asm-generic.h b/libcpu/aarch64/common/asm-generic.h new file mode 100644 index 0000000000..9d90b37a92 --- /dev/null +++ b/libcpu/aarch64/common/asm-generic.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2006-2023 RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2023-03-12 WangXiaoyao the first version + */ +#ifndef __ASM_GENERIC_H__ +#define __ASM_GENERIC_H__ + +/* use to mark a start point where every task start from */ +#define START_POINT(funcname) \ + .global funcname; \ + .type funcname, %function; \ + funcname: \ + .cfi_sections .debug_frame, .eh_frame; \ + .cfi_startproc; \ + .cfi_undefined x30 + +#define START_POINT_END(name) \ + .cfi_endproc; \ + .size name, .-name; + +#endif /* __ASM_GENERIC_H__ */ diff --git a/libcpu/aarch64/common/asm_fpu.h b/libcpu/aarch64/common/asm_fpu.h deleted file mode 100644 index f40ac7a9a2..0000000000 --- a/libcpu/aarch64/common/asm_fpu.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-05-18 Jesven the first version - */ - -.macro SAVE_FPU, reg - STR Q0, [\reg, #-0x10]! - STR Q1, [\reg, #-0x10]! - STR Q2, [\reg, #-0x10]! - STR Q3, [\reg, #-0x10]! - STR Q4, [\reg, #-0x10]! - STR Q5, [\reg, #-0x10]! - STR Q6, [\reg, #-0x10]! - STR Q7, [\reg, #-0x10]! - STR Q8, [\reg, #-0x10]! - STR Q9, [\reg, #-0x10]! - STR Q10, [\reg, #-0x10]! - STR Q11, [\reg, #-0x10]! - STR Q12, [\reg, #-0x10]! - STR Q13, [\reg, #-0x10]! - STR Q14, [\reg, #-0x10]! - STR Q15, [\reg, #-0x10]! -.endm - -.macro RESTORE_FPU, reg - LDR Q15, [\reg], #0x10 - LDR Q14, [\reg], #0x10 - LDR Q13, [\reg], #0x10 - LDR Q12, [\reg], #0x10 - LDR Q11, [\reg], #0x10 - LDR Q10, [\reg], #0x10 - LDR Q9, [\reg], #0x10 - LDR Q8, [\reg], #0x10 - LDR Q7, [\reg], #0x10 - LDR Q6, [\reg], #0x10 - LDR Q5, [\reg], #0x10 - LDR Q4, [\reg], #0x10 - LDR Q3, [\reg], #0x10 - LDR Q2, [\reg], #0x10 - LDR Q1, [\reg], #0x10 - LDR Q0, [\reg], #0x10 -.endm diff --git a/libcpu/aarch64/common/context_gcc.S b/libcpu/aarch64/common/context_gcc.S index 6afc676ae3..11e54bfa7b 100644 --- a/libcpu/aarch64/common/context_gcc.S +++ b/libcpu/aarch64/common/context_gcc.S @@ -9,6 +9,7 @@ */ #include "rtconfig.h" +#include "asm-generic.h" #include "asm-fpu.h" @@ -77,6 +78,13 @@ rt_hw_get_gtimer_frq: MRS X0,CNTFRQ_EL0 RET +START_POINT(_thread_start) + blr x19 + mov x29, #0 + blr x20 + b . /* never here */ +START_POINT_END(_thread_start) + .macro SAVE_CONTEXT /* Save the entire context. */ SAVE_FPU SP @@ -499,18 +507,18 @@ vector_irq_exit: // ------------------------------------------------- - .globl vector_exception -vector_exception: +START_POINT(vector_exception) SAVE_CONTEXT STP X0, X1, [SP, #-0x10]! BL rt_hw_trap_exception LDP X0, X1, [SP], #0x10 MOV SP, X0 RESTORE_CONTEXT_WITHOUT_MMU_SWITCH +START_POINT_END(vector_exception) - .globl vector_serror -vector_serror: +START_POINT(vector_serror) SAVE_CONTEXT STP X0, X1, [SP, #-0x10]! BL rt_hw_trap_serror b . +START_POINT_END(vector_exception) diff --git a/libcpu/aarch64/common/cpuport.h b/libcpu/aarch64/common/cpuport.h index d20c1d5008..12719c4531 100644 --- a/libcpu/aarch64/common/cpuport.h +++ b/libcpu/aarch64/common/cpuport.h @@ -48,4 +48,5 @@ rt_inline void rt_hw_dsb(void) __asm__ volatile ("dsb ish":::"memory"); } +void _thread_start(void); #endif /*CPUPORT_H__*/ diff --git a/libcpu/aarch64/common/stack.c b/libcpu/aarch64/common/stack.c index eaa9a4d158..acb07dba6e 100644 --- a/libcpu/aarch64/common/stack.c +++ b/libcpu/aarch64/common/stack.c @@ -9,6 +9,7 @@ */ #include #include +#include #include @@ -64,44 +65,44 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, *(--stk) = (rt_ubase_t)0; /* Q15 */ *(--stk) = (rt_ubase_t)0; /* Q15 */ - *(--stk) = (rt_ubase_t)1; /* X1 */ - *(--stk) = (rt_ubase_t)parameter; /* X0 */ - *(--stk) = (rt_ubase_t)3; /* X3 */ - *(--stk) = (rt_ubase_t)2; /* X2 */ - *(--stk) = (rt_ubase_t)5; /* X5 */ - *(--stk) = (rt_ubase_t)4; /* X4 */ - *(--stk) = (rt_ubase_t)7; /* X7 */ - *(--stk) = (rt_ubase_t)6; /* X6 */ - *(--stk) = (rt_ubase_t)9; /* X9 */ - *(--stk) = (rt_ubase_t)8; /* X8 */ - *(--stk) = (rt_ubase_t)11; /* X11 */ - *(--stk) = (rt_ubase_t)10; /* X10 */ - *(--stk) = (rt_ubase_t)13; /* X13 */ - *(--stk) = (rt_ubase_t)12; /* X12 */ - *(--stk) = (rt_ubase_t)15; /* X15 */ - *(--stk) = (rt_ubase_t)14; /* X14 */ - *(--stk) = (rt_ubase_t)17; /* X17 */ - *(--stk) = (rt_ubase_t)16; /* X16 */ - *(--stk) = (rt_ubase_t)19; /* X19 */ - *(--stk) = (rt_ubase_t)18; /* X18 */ - *(--stk) = (rt_ubase_t)21; /* X21 */ - *(--stk) = (rt_ubase_t)20; /* X20 */ - *(--stk) = (rt_ubase_t)23; /* X23 */ - *(--stk) = (rt_ubase_t)22; /* X22 */ - *(--stk) = (rt_ubase_t)25; /* X25 */ - *(--stk) = (rt_ubase_t)24; /* X24 */ - *(--stk) = (rt_ubase_t)27; /* X27 */ - *(--stk) = (rt_ubase_t)26; /* X26 */ - *(--stk) = (rt_ubase_t)29; /* X29 */ - *(--stk) = (rt_ubase_t)28; /* X28 */ - *(--stk) = (rt_ubase_t)0; /* FPSR */ - *(--stk) = (rt_ubase_t)0; /* FPCR */ - *(--stk) = (rt_ubase_t)texit; /* X30 - procedure call link register. */ - *(--stk) = (rt_ubase_t)0; /* sp_el0 */ + *(--stk) = (rt_ubase_t)0; /* X1 */ + *(--stk) = (rt_ubase_t)parameter; /* X0 */ + *(--stk) = (rt_ubase_t)3; /* X3 */ + *(--stk) = (rt_ubase_t)2; /* X2 */ + *(--stk) = (rt_ubase_t)5; /* X5 */ + *(--stk) = (rt_ubase_t)4; /* X4 */ + *(--stk) = (rt_ubase_t)7; /* X7 */ + *(--stk) = (rt_ubase_t)6; /* X6 */ + *(--stk) = (rt_ubase_t)9; /* X9 */ + *(--stk) = (rt_ubase_t)8; /* X8 */ + *(--stk) = (rt_ubase_t)11; /* X11 */ + *(--stk) = (rt_ubase_t)10; /* X10 */ + *(--stk) = (rt_ubase_t)13; /* X13 */ + *(--stk) = (rt_ubase_t)12; /* X12 */ + *(--stk) = (rt_ubase_t)15; /* X15 */ + *(--stk) = (rt_ubase_t)14; /* X14 */ + *(--stk) = (rt_ubase_t)17; /* X17 */ + *(--stk) = (rt_ubase_t)16; /* X16 */ + *(--stk) = (rt_ubase_t)tentry; /* X19, 1st param */ + *(--stk) = (rt_ubase_t)18; /* X18 */ + *(--stk) = (rt_ubase_t)21; /* X21 */ + *(--stk) = (rt_ubase_t)texit; /* X20, 2nd param */ + *(--stk) = (rt_ubase_t)23; /* X23 */ + *(--stk) = (rt_ubase_t)22; /* X22 */ + *(--stk) = (rt_ubase_t)25; /* X25 */ + *(--stk) = (rt_ubase_t)24; /* X24 */ + *(--stk) = (rt_ubase_t)27; /* X27 */ + *(--stk) = (rt_ubase_t)26; /* X26 */ + *(--stk) = (rt_ubase_t)0; /* X29 - addr 0 as AAPCS64 specified */ + *(--stk) = (rt_ubase_t)28; /* X28 */ + *(--stk) = (rt_ubase_t)0; /* FPSR */ + *(--stk) = (rt_ubase_t)0; /* FPCR */ + *(--stk) = (rt_ubase_t)0; /* X30 - procedure call link register. */ + *(--stk) = (rt_ubase_t)0; /* sp_el0 */ *(--stk) = INITIAL_SPSR_EL1; - *(--stk) = (rt_ubase_t)tentry; /* Exception return address. */ + *(--stk) = (rt_ubase_t)_thread_start; /* Exception return address. */ /* return task's current stack address */ return (rt_uint8_t *)stk; diff --git a/libcpu/arm/cortex-a/asm-generic.h b/libcpu/arm/cortex-a/asm-generic.h new file mode 100644 index 0000000000..c106f9c1c8 --- /dev/null +++ b/libcpu/arm/cortex-a/asm-generic.h @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2006-2023 RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2023-03-12 WangXiaoyao the first version + */ +#ifndef __ASM_GENERIC_H__ +#define __ASM_GENERIC_H__ + +#define START_POINT(funcname) \ + .type funcname, %function; \ + .global funcname; \ + funcname: \ + .cfi_sections .debug_frame, .eh_frame; \ + .cfi_startproc; \ + .cfi_undefined lr + +#define START_POINT_END(name) \ + .cfi_endproc; \ + .size name, .-name; + +#endif /* __ASM_GENERIC_H__ */ diff --git a/libcpu/arm/cortex-a/cpuport.h b/libcpu/arm/cortex-a/cpuport.h index e881da9147..2cb80f0d33 100644 --- a/libcpu/arm/cortex-a/cpuport.h +++ b/libcpu/arm/cortex-a/cpuport.h @@ -97,4 +97,6 @@ rt_inline void rt_hw_dsb(void) __asm volatile ("dsb":::"memory"); } +void _thread_start(void); + #endif /*CPUPORT_H__*/ diff --git a/libcpu/arm/cortex-a/stack.c b/libcpu/arm/cortex-a/stack.c index ec2a51a8e8..4c955677f8 100644 --- a/libcpu/arm/cortex-a/stack.c +++ b/libcpu/arm/cortex-a/stack.c @@ -35,7 +35,7 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, stack_addr += sizeof(rt_uint32_t); stack_addr = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8); stk = (rt_uint32_t *)stack_addr; - *(--stk) = (rt_uint32_t)tentry; /* entry point */ + *(--stk) = (rt_uint32_t)_thread_start; /* entry point */ *(--stk) = (rt_uint32_t)texit; /* lr */ *(--stk) = 0xdeadbeef; /* r12 */ *(--stk) = 0xdeadbeef; /* r11 */ @@ -48,8 +48,8 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, *(--stk) = 0xdeadbeef; /* r4 */ *(--stk) = 0xdeadbeef; /* r3 */ *(--stk) = 0xdeadbeef; /* r2 */ - *(--stk) = 0xdeadbeef; /* r1 */ - *(--stk) = (rt_uint32_t)parameter; /* r0 : argument */ + *(--stk) = (rt_uint32_t)tentry; /* r1 : argument 2 for trampoline */ + *(--stk) = (rt_uint32_t)parameter; /* r0 : argument 1 */ /* cpsr */ if ((rt_uint32_t)tentry & 0x01) *(--stk) = SVCMODE | 0x20; /* thumb mode */ diff --git a/libcpu/arm/cortex-a/start_gcc.S b/libcpu/arm/cortex-a/start_gcc.S index 1283686439..d79ffd2f6a 100644 --- a/libcpu/arm/cortex-a/start_gcc.S +++ b/libcpu/arm/cortex-a/start_gcc.S @@ -673,6 +673,15 @@ rt_hw_clz: #define RT_CPUS_NR 1 #endif +#include "asm-generic.h" + +START_POINT(_thread_start) + mov r10, lr + blx r1 + blx r10 + b . /* never here */ +START_POINT_END(_thread_start) + .bss .align 3 /* align to 2~3=8 */ svc_stack_n: diff --git a/libcpu/risc-v/t-head/c906/asm-generic.h b/libcpu/risc-v/t-head/c906/asm-generic.h new file mode 100644 index 0000000000..625af2ce1a --- /dev/null +++ b/libcpu/risc-v/t-head/c906/asm-generic.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2006-2023 RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2023-03-12 WangXiaoyao the first version + */ +#ifndef __ASM_GENERIC_H__ +#define __ASM_GENERIC_H__ + +/* use to mark a start point where every task start from */ +#define START_POINT(funcname) \ + .global funcname; \ + .type funcname, %function; \ + funcname: \ + .cfi_sections .debug_frame, .eh_frame; \ + .cfi_startproc; \ + .cfi_undefined ra + +#define START_POINT_END(name) \ + .cfi_endproc; \ + .size name, .-name; + +#endif /* __ASM_GENERIC_H__ */ diff --git a/libcpu/risc-v/virt64/asm-generic.h b/libcpu/risc-v/virt64/asm-generic.h new file mode 100644 index 0000000000..625af2ce1a --- /dev/null +++ b/libcpu/risc-v/virt64/asm-generic.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2006-2023 RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2023-03-12 WangXiaoyao the first version + */ +#ifndef __ASM_GENERIC_H__ +#define __ASM_GENERIC_H__ + +/* use to mark a start point where every task start from */ +#define START_POINT(funcname) \ + .global funcname; \ + .type funcname, %function; \ + funcname: \ + .cfi_sections .debug_frame, .eh_frame; \ + .cfi_startproc; \ + .cfi_undefined ra + +#define START_POINT_END(name) \ + .cfi_endproc; \ + .size name, .-name; + +#endif /* __ASM_GENERIC_H__ */ diff --git a/libcpu/risc-v/virt64/cpuport_gcc.S b/libcpu/risc-v/virt64/cpuport_gcc.S index cb636c9a4f..8ea52d4796 100644 --- a/libcpu/risc-v/virt64/cpuport_gcc.S +++ b/libcpu/risc-v/virt64/cpuport_gcc.S @@ -10,13 +10,17 @@ #include "cpuport.h" #include "stackframe.h" +#include "asm-generic.h" -.global _rt_thread_entry -_rt_thread_entry: - LOAD ra, (sp) /* texit */ +START_POINT(_rt_thread_entry) + LOAD ra, (sp) /* thread exit */ addi sp, sp, 8 LOAD a0, (sp) /* parameter */ addi sp, sp, 8 LOAD t0, (sp) /* tentry */ addi sp, sp, 8 - jr t0 + mv s1, ra + jalr t0 + jalr s1 + j . /* never here */ +START_POINT_END(_rt_thread_entry)