finish testing
This commit is contained in:
LeeChunHei
LeeChunHei
parent
fa5c8e1502
commit
b51c6339f0
|
|
@ -1,450 +0,0 @@
|
|||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# RT-Thread Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# RT-Thread Kernel
|
||||
#
|
||||
CONFIG_RT_NAME_MAX=8
|
||||
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
|
||||
# CONFIG_RT_USING_SMP is not set
|
||||
CONFIG_RT_ALIGN_SIZE=4
|
||||
# CONFIG_RT_THREAD_PRIORITY_8 is not set
|
||||
CONFIG_RT_THREAD_PRIORITY_32=y
|
||||
# CONFIG_RT_THREAD_PRIORITY_256 is not set
|
||||
CONFIG_RT_THREAD_PRIORITY_MAX=32
|
||||
CONFIG_RT_TICK_PER_SECOND=100
|
||||
CONFIG_RT_USING_OVERFLOW_CHECK=y
|
||||
CONFIG_RT_USING_HOOK=y
|
||||
CONFIG_RT_USING_IDLE_HOOK=y
|
||||
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
|
||||
CONFIG_IDLE_THREAD_STACK_SIZE=256
|
||||
# CONFIG_RT_USING_TIMER_SOFT is not set
|
||||
CONFIG_RT_DEBUG=y
|
||||
CONFIG_RT_DEBUG_COLOR=y
|
||||
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
|
||||
|
||||
#
|
||||
# Inter-Thread communication
|
||||
#
|
||||
CONFIG_RT_USING_SEMAPHORE=y
|
||||
CONFIG_RT_USING_MUTEX=y
|
||||
CONFIG_RT_USING_EVENT=y
|
||||
CONFIG_RT_USING_MAILBOX=y
|
||||
CONFIG_RT_USING_MESSAGEQUEUE=y
|
||||
# CONFIG_RT_USING_SIGNALS is not set
|
||||
|
||||
#
|
||||
# Memory Management
|
||||
#
|
||||
CONFIG_RT_USING_MEMPOOL=y
|
||||
CONFIG_RT_USING_MEMHEAP=y
|
||||
# CONFIG_RT_USING_NOHEAP is not set
|
||||
# CONFIG_RT_USING_SMALL_MEM is not set
|
||||
# CONFIG_RT_USING_SLAB is not set
|
||||
CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
|
||||
# CONFIG_RT_USING_USERHEAP is not set
|
||||
CONFIG_RT_USING_HEAP=y
|
||||
|
||||
#
|
||||
# Kernel Device Object
|
||||
#
|
||||
CONFIG_RT_USING_DEVICE=y
|
||||
# CONFIG_RT_USING_DEVICE_OPS is not set
|
||||
# CONFIG_RT_USING_INTERRUPT_INFO is not set
|
||||
CONFIG_RT_USING_CONSOLE=y
|
||||
CONFIG_RT_CONSOLEBUF_SIZE=128
|
||||
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
|
||||
CONFIG_RT_VER_NUM=0x40003
|
||||
# CONFIG_RT_USING_CPU_FFS is not set
|
||||
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
|
||||
|
||||
#
|
||||
# RT-Thread Components
|
||||
#
|
||||
CONFIG_RT_USING_COMPONENTS_INIT=y
|
||||
CONFIG_RT_USING_USER_MAIN=y
|
||||
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
|
||||
CONFIG_RT_MAIN_THREAD_PRIORITY=10
|
||||
|
||||
#
|
||||
# C++ features
|
||||
#
|
||||
# CONFIG_RT_USING_CPLUSPLUS is not set
|
||||
|
||||
#
|
||||
# Command shell
|
||||
#
|
||||
CONFIG_RT_USING_FINSH=y
|
||||
CONFIG_FINSH_THREAD_NAME="tshell"
|
||||
CONFIG_FINSH_USING_HISTORY=y
|
||||
CONFIG_FINSH_HISTORY_LINES=5
|
||||
CONFIG_FINSH_USING_SYMTAB=y
|
||||
CONFIG_FINSH_USING_DESCRIPTION=y
|
||||
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
|
||||
CONFIG_FINSH_THREAD_PRIORITY=20
|
||||
CONFIG_FINSH_THREAD_STACK_SIZE=4096
|
||||
CONFIG_FINSH_CMD_SIZE=80
|
||||
# CONFIG_FINSH_USING_AUTH is not set
|
||||
CONFIG_FINSH_USING_MSH=y
|
||||
CONFIG_FINSH_USING_MSH_DEFAULT=y
|
||||
CONFIG_FINSH_USING_MSH_ONLY=y
|
||||
CONFIG_FINSH_ARG_MAX=10
|
||||
|
||||
#
|
||||
# Device virtual file system
|
||||
#
|
||||
CONFIG_RT_USING_DFS=y
|
||||
CONFIG_DFS_USING_WORKDIR=y
|
||||
CONFIG_DFS_FILESYSTEMS_MAX=2
|
||||
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
|
||||
CONFIG_DFS_FD_MAX=16
|
||||
# CONFIG_RT_USING_DFS_MNTTABLE is not set
|
||||
# CONFIG_RT_USING_DFS_ELMFAT is not set
|
||||
CONFIG_RT_USING_DFS_DEVFS=y
|
||||
# CONFIG_RT_USING_DFS_ROMFS is not set
|
||||
# CONFIG_RT_USING_DFS_RAMFS is not set
|
||||
# CONFIG_RT_USING_DFS_UFFS is not set
|
||||
# CONFIG_RT_USING_DFS_JFFS2 is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
CONFIG_RT_USING_DEVICE_IPC=y
|
||||
CONFIG_RT_PIPE_BUFSZ=512
|
||||
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
|
||||
CONFIG_RT_USING_SERIAL=y
|
||||
CONFIG_RT_SERIAL_USING_DMA=y
|
||||
CONFIG_RT_SERIAL_RB_BUFSZ=64
|
||||
# CONFIG_RT_USING_CAN is not set
|
||||
# CONFIG_RT_USING_HWTIMER is not set
|
||||
CONFIG_RT_USING_CPUTIME=y
|
||||
# CONFIG_RT_USING_I2C is not set
|
||||
# CONFIG_RT_USING_PHY is not set
|
||||
CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_RT_USING_ADC is not set
|
||||
# CONFIG_RT_USING_DAC is not set
|
||||
# CONFIG_RT_USING_PWM is not set
|
||||
# CONFIG_RT_USING_MTD_NOR is not set
|
||||
# CONFIG_RT_USING_MTD_NAND is not set
|
||||
# CONFIG_RT_USING_PM is not set
|
||||
# CONFIG_RT_USING_RTC is not set
|
||||
# CONFIG_RT_USING_SDIO is not set
|
||||
# CONFIG_RT_USING_SPI is not set
|
||||
# CONFIG_RT_USING_WDT is not set
|
||||
# CONFIG_RT_USING_AUDIO is not set
|
||||
# CONFIG_RT_USING_SENSOR is not set
|
||||
# CONFIG_RT_USING_TOUCH is not set
|
||||
# CONFIG_RT_USING_HWCRYPTO is not set
|
||||
CONFIG_RT_USING_PULSE_ENCODER=y
|
||||
# CONFIG_RT_USING_INPUT_CAPTURE is not set
|
||||
# CONFIG_RT_USING_WIFI is not set
|
||||
|
||||
#
|
||||
# Using USB
|
||||
#
|
||||
CONFIG_RT_USING_USB_HOST=y
|
||||
CONFIG_RT_USBH_MSTORAGE=y
|
||||
CONFIG_UDISK_MOUNTPOINT="/"
|
||||
# CONFIG_RT_USING_USB_DEVICE is not set
|
||||
CONFIG_RT_USBD_THREAD_STACK_SZ=4096
|
||||
|
||||
#
|
||||
# POSIX layer and C standard library
|
||||
#
|
||||
CONFIG_RT_USING_LIBC=y
|
||||
# CONFIG_RT_USING_PTHREADS is not set
|
||||
CONFIG_RT_USING_POSIX=y
|
||||
# CONFIG_RT_USING_POSIX_MMAP is not set
|
||||
# CONFIG_RT_USING_POSIX_TERMIOS is not set
|
||||
# CONFIG_RT_USING_POSIX_GETLINE is not set
|
||||
# CONFIG_RT_USING_POSIX_AIO is not set
|
||||
# CONFIG_RT_USING_MODULE is not set
|
||||
|
||||
#
|
||||
# Network
|
||||
#
|
||||
|
||||
#
|
||||
# Socket abstraction layer
|
||||
#
|
||||
# CONFIG_RT_USING_SAL is not set
|
||||
|
||||
#
|
||||
# Network interface device
|
||||
#
|
||||
# CONFIG_RT_USING_NETDEV is not set
|
||||
|
||||
#
|
||||
# light weight TCP/IP stack
|
||||
#
|
||||
# CONFIG_RT_USING_LWIP is not set
|
||||
|
||||
#
|
||||
# AT commands
|
||||
#
|
||||
# CONFIG_RT_USING_AT is not set
|
||||
|
||||
#
|
||||
# VBUS(Virtual Software BUS)
|
||||
#
|
||||
# CONFIG_RT_USING_VBUS is not set
|
||||
|
||||
#
|
||||
# Utilities
|
||||
#
|
||||
# CONFIG_RT_USING_RYM is not set
|
||||
# CONFIG_RT_USING_ULOG is not set
|
||||
# CONFIG_RT_USING_UTEST is not set
|
||||
|
||||
#
|
||||
# RT-Thread online packages
|
||||
#
|
||||
|
||||
#
|
||||
# IoT - internet of things
|
||||
#
|
||||
# CONFIG_PKG_USING_PAHOMQTT is not set
|
||||
# CONFIG_PKG_USING_WEBCLIENT is not set
|
||||
# CONFIG_PKG_USING_WEBNET is not set
|
||||
# CONFIG_PKG_USING_MONGOOSE is not set
|
||||
# CONFIG_PKG_USING_MYMQTT is not set
|
||||
# CONFIG_PKG_USING_MQTTCLIENT is not set
|
||||
# CONFIG_PKG_USING_WEBTERMINAL is not set
|
||||
# CONFIG_PKG_USING_CJSON is not set
|
||||
# CONFIG_PKG_USING_JSMN is not set
|
||||
# CONFIG_PKG_USING_LIBMODBUS is not set
|
||||
# CONFIG_PKG_USING_FREEMODBUS is not set
|
||||
# CONFIG_PKG_USING_LJSON is not set
|
||||
# CONFIG_PKG_USING_EZXML is not set
|
||||
# CONFIG_PKG_USING_NANOPB is not set
|
||||
|
||||
#
|
||||
# Wi-Fi
|
||||
#
|
||||
|
||||
#
|
||||
# Marvell WiFi
|
||||
#
|
||||
# CONFIG_PKG_USING_WLANMARVELL is not set
|
||||
|
||||
#
|
||||
# Wiced WiFi
|
||||
#
|
||||
# CONFIG_PKG_USING_WLAN_WICED is not set
|
||||
# CONFIG_PKG_USING_RW007 is not set
|
||||
# CONFIG_PKG_USING_COAP is not set
|
||||
# CONFIG_PKG_USING_NOPOLL is not set
|
||||
# CONFIG_PKG_USING_NETUTILS is not set
|
||||
# CONFIG_PKG_USING_PPP_DEVICE is not set
|
||||
# CONFIG_PKG_USING_AT_DEVICE is not set
|
||||
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
|
||||
# CONFIG_PKG_USING_WIZNET is not set
|
||||
|
||||
#
|
||||
# IoT Cloud
|
||||
#
|
||||
# CONFIG_PKG_USING_ONENET is not set
|
||||
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
|
||||
# CONFIG_PKG_USING_ALI_IOTKIT is not set
|
||||
# CONFIG_PKG_USING_AZURE is not set
|
||||
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
|
||||
# CONFIG_PKG_USING_JIOT-C-SDK is not set
|
||||
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
|
||||
# CONFIG_PKG_USING_NIMBLE is not set
|
||||
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
|
||||
# CONFIG_PKG_USING_IPMSG is not set
|
||||
# CONFIG_PKG_USING_LSSDP is not set
|
||||
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
|
||||
# CONFIG_PKG_USING_LIBRWS is not set
|
||||
# CONFIG_PKG_USING_TCPSERVER is not set
|
||||
# CONFIG_PKG_USING_PROTOBUF_C is not set
|
||||
# CONFIG_PKG_USING_ONNX_PARSER is not set
|
||||
# CONFIG_PKG_USING_ONNX_BACKEND is not set
|
||||
# CONFIG_PKG_USING_DLT645 is not set
|
||||
# CONFIG_PKG_USING_QXWZ is not set
|
||||
# CONFIG_PKG_USING_SMTP_CLIENT is not set
|
||||
# CONFIG_PKG_USING_ABUP_FOTA is not set
|
||||
# CONFIG_PKG_USING_LIBCURL2RTT is not set
|
||||
# CONFIG_PKG_USING_CAPNP is not set
|
||||
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
|
||||
# CONFIG_PKG_USING_AGILE_TELNET is not set
|
||||
|
||||
#
|
||||
# security packages
|
||||
#
|
||||
# CONFIG_PKG_USING_MBEDTLS is not set
|
||||
# CONFIG_PKG_USING_libsodium is not set
|
||||
# CONFIG_PKG_USING_TINYCRYPT is not set
|
||||
# CONFIG_PKG_USING_TFM is not set
|
||||
|
||||
#
|
||||
# language packages
|
||||
#
|
||||
# CONFIG_PKG_USING_LUA is not set
|
||||
# CONFIG_PKG_USING_JERRYSCRIPT is not set
|
||||
# CONFIG_PKG_USING_MICROPYTHON is not set
|
||||
|
||||
#
|
||||
# multimedia packages
|
||||
#
|
||||
# CONFIG_PKG_USING_OPENMV is not set
|
||||
# CONFIG_PKG_USING_MUPDF is not set
|
||||
# CONFIG_PKG_USING_STEMWIN is not set
|
||||
# CONFIG_PKG_USING_WAVPLAYER is not set
|
||||
# CONFIG_PKG_USING_TJPGD is not set
|
||||
|
||||
#
|
||||
# tools packages
|
||||
#
|
||||
# CONFIG_PKG_USING_CMBACKTRACE is not set
|
||||
# CONFIG_PKG_USING_EASYFLASH is not set
|
||||
# CONFIG_PKG_USING_EASYLOGGER is not set
|
||||
# CONFIG_PKG_USING_SYSTEMVIEW is not set
|
||||
# CONFIG_PKG_USING_RDB is not set
|
||||
# CONFIG_PKG_USING_QRCODE is not set
|
||||
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
|
||||
# CONFIG_PKG_USING_ADBD is not set
|
||||
# CONFIG_PKG_USING_COREMARK is not set
|
||||
# CONFIG_PKG_USING_DHRYSTONE is not set
|
||||
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
|
||||
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
|
||||
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
|
||||
# CONFIG_PKG_USING_BS8116A is not set
|
||||
|
||||
#
|
||||
# system packages
|
||||
#
|
||||
# CONFIG_PKG_USING_GUIENGINE is not set
|
||||
# CONFIG_PKG_USING_CAIRO is not set
|
||||
# CONFIG_PKG_USING_PIXMAN is not set
|
||||
# CONFIG_PKG_USING_LWEXT4 is not set
|
||||
# CONFIG_PKG_USING_PARTITION is not set
|
||||
# CONFIG_PKG_USING_FAL is not set
|
||||
# CONFIG_PKG_USING_SQLITE is not set
|
||||
# CONFIG_PKG_USING_RTI is not set
|
||||
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
|
||||
# CONFIG_PKG_USING_CMSIS is not set
|
||||
# CONFIG_PKG_USING_DFS_YAFFS is not set
|
||||
# CONFIG_PKG_USING_LITTLEFS is not set
|
||||
# CONFIG_PKG_USING_THREAD_POOL is not set
|
||||
# CONFIG_PKG_USING_ROBOTS is not set
|
||||
# CONFIG_PKG_USING_EV is not set
|
||||
# CONFIG_PKG_USING_SYSWATCH is not set
|
||||
|
||||
#
|
||||
# peripheral libraries and drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
|
||||
# CONFIG_PKG_USING_SHT2X is not set
|
||||
# CONFIG_PKG_USING_SHT3X is not set
|
||||
# CONFIG_PKG_USING_STM32_SDIO is not set
|
||||
# CONFIG_PKG_USING_ICM20608 is not set
|
||||
# CONFIG_PKG_USING_U8G2 is not set
|
||||
# CONFIG_PKG_USING_BUTTON is not set
|
||||
# CONFIG_PKG_USING_PCF8574 is not set
|
||||
# CONFIG_PKG_USING_SX12XX is not set
|
||||
# CONFIG_PKG_USING_SIGNAL_LED is not set
|
||||
# CONFIG_PKG_USING_LEDBLINK is not set
|
||||
# CONFIG_PKG_USING_LITTLED is not set
|
||||
# CONFIG_PKG_USING_WM_LIBRARIES is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
|
||||
# CONFIG_PKG_USING_INFRARED is not set
|
||||
# CONFIG_PKG_USING_ROSSERIAL is not set
|
||||
# CONFIG_PKG_USING_AGILE_BUTTON is not set
|
||||
# CONFIG_PKG_USING_AGILE_LED is not set
|
||||
# CONFIG_PKG_USING_AT24CXX is not set
|
||||
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
|
||||
# CONFIG_PKG_USING_AD7746 is not set
|
||||
# CONFIG_PKG_USING_PCA9685 is not set
|
||||
# CONFIG_PKG_USING_I2C_TOOLS is not set
|
||||
# CONFIG_PKG_USING_NRF24L01 is not set
|
||||
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_MAX17048 is not set
|
||||
# CONFIG_PKG_USING_RPLIDAR is not set
|
||||
# CONFIG_PKG_USING_AS608 is not set
|
||||
# CONFIG_PKG_USING_RC522 is not set
|
||||
# CONFIG_PKG_USING_EMBARC_BSP is not set
|
||||
|
||||
#
|
||||
# miscellaneous packages
|
||||
#
|
||||
# CONFIG_PKG_USING_LIBCSV is not set
|
||||
# CONFIG_PKG_USING_OPTPARSE is not set
|
||||
# CONFIG_PKG_USING_FASTLZ is not set
|
||||
# CONFIG_PKG_USING_MINILZO is not set
|
||||
# CONFIG_PKG_USING_QUICKLZ is not set
|
||||
# CONFIG_PKG_USING_MULTIBUTTON is not set
|
||||
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
|
||||
# CONFIG_PKG_USING_CANFESTIVAL is not set
|
||||
# CONFIG_PKG_USING_ZLIB is not set
|
||||
# CONFIG_PKG_USING_DSTR is not set
|
||||
# CONFIG_PKG_USING_TINYFRAME is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
|
||||
# CONFIG_PKG_USING_DIGITALCTRL is not set
|
||||
# CONFIG_PKG_USING_UPACKER is not set
|
||||
# CONFIG_PKG_USING_UPARAM is not set
|
||||
|
||||
#
|
||||
# samples: kernel and components samples
|
||||
#
|
||||
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
|
||||
# CONFIG_PKG_USING_HELLO is not set
|
||||
# CONFIG_PKG_USING_VI is not set
|
||||
# CONFIG_PKG_USING_NNOM is not set
|
||||
# CONFIG_PKG_USING_LIBANN is not set
|
||||
# CONFIG_PKG_USING_ELAPACK is not set
|
||||
# CONFIG_PKG_USING_ARMv7M_DWT is not set
|
||||
# CONFIG_PKG_USING_VT100 is not set
|
||||
# CONFIG_PKG_USING_ULAPACK is not set
|
||||
# CONFIG_PKG_USING_UKAL is not set
|
||||
|
||||
#
|
||||
# Hardware Drivers Config
|
||||
#
|
||||
CONFIG_SOC_IMXRT1052CVL5B=y
|
||||
|
||||
#
|
||||
# On-chip Peripheral Drivers
|
||||
#
|
||||
# CONFIG_BSP_USING_DMA is not set
|
||||
CONFIG_BSP_USING_GPIO=y
|
||||
CONFIG_BSP_USING_LPUART=y
|
||||
CONFIG_BSP_USING_LPUART1=y
|
||||
# CONFIG_BSP_LPUART1_RX_USING_DMA is not set
|
||||
# CONFIG_BSP_LPUART1_TX_USING_DMA is not set
|
||||
# CONFIG_BSP_USING_LPUART4 is not set
|
||||
# CONFIG_BSP_USING_PWM is not set
|
||||
# CONFIG_BSP_USING_I2C is not set
|
||||
# CONFIG_BSP_USING_SPI is not set
|
||||
CONFIG_BSP_USING_PULSE_ENCODER=y
|
||||
CONFIG_BSP_USING_PULSE_ENCODER1=y
|
||||
CONFIG_BSP_USING_USB=y
|
||||
CONFIG_BSP_USING_USB0=y
|
||||
CONFIG_BSP_USB0_HOST=y
|
||||
# CONFIG_BSP_USB0_DEVICE is not set
|
||||
# CONFIG_BSP_USING_USB1 is not set
|
||||
|
||||
#
|
||||
# Onboard Peripheral Drivers
|
||||
#
|
||||
# CONFIG_BSP_USING_SDRAM is not set
|
||||
# CONFIG_BSP_USING_MPU6050 is not set
|
||||
|
||||
#
|
||||
# Board extended module Drivers
|
||||
#
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
{
|
||||
"configurations": [
|
||||
{
|
||||
"name": "Win32",
|
||||
"includePath": [
|
||||
"${workspaceFolder}/**"
|
||||
],
|
||||
"defines": [
|
||||
"_DEBUG",
|
||||
"UNICODE",
|
||||
"_UNICODE"
|
||||
],
|
||||
"intelliSenseMode": "gcc-x64",
|
||||
"compilerPath": "C:/Program Files (x86)/GNU Arm Embedded Toolchain/9 2020-q2-update/bin/arm-none-eabi-gcc.exe"
|
||||
}
|
||||
],
|
||||
"version": 4
|
||||
}
|
||||
|
|
@ -1,20 +0,0 @@
|
|||
{
|
||||
// Use IntelliSense to learn about possible attributes.
|
||||
// Hover to view descriptions of existing attributes.
|
||||
// For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
|
||||
"version": "0.2.0",
|
||||
"configurations": [
|
||||
{
|
||||
"name": "Cortex Debug",
|
||||
"cwd": "${workspaceRoot}",
|
||||
"executable": "./rtthread.elf",
|
||||
"request": "launch",
|
||||
"type": "cortex-debug",
|
||||
"servertype": "jlink",
|
||||
"serverpath": "C:/Program Files (x86)/SEGGER/JLink/JLinkGDBServerCL.exe",
|
||||
"device": "MCIMXRT1052QSPI",
|
||||
"runToMain": true,
|
||||
"interface": "swd"
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../../.."
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
source "../libraries/Kconfig"
|
||||
source "board/Kconfig"
|
||||
|
|
@ -1,123 +0,0 @@
|
|||
# BSP README 模板
|
||||
|
||||
## 简介
|
||||
|
||||
本文档为 xxx 开发板的 BSP (板级支持包) 说明。
|
||||
|
||||
主要内容如下：
|
||||
|
||||
- 开发板资源介绍
|
||||
- BSP 快速上手
|
||||
- 进阶使用方法
|
||||
|
||||
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
|
||||
|
||||
## 开发板介绍
|
||||
|
||||
【此处简单介绍一下开发板】
|
||||
|
||||
开发板外观如下图所示：
|
||||
|
||||
|
||||
|
||||
该开发板常用 **板载资源** 如下：
|
||||
|
||||
- MCU：MIMXRT105xxx，主频 xxxMHz，xxxKB FLASH ，xxxKB RAM
|
||||
- 外部 RAM：型号，xMB
|
||||
- 外部 FLASH：型号，xMB
|
||||
- 常用外设
|
||||
- LED：x个，DS0（红色，PB1），DS1（绿色，PB0）
|
||||
- 按键：x个，K0（兼具唤醒功能，PA0），K1（PC13）
|
||||
- 常用接口：USB 转串口、SD 卡接口、以太网接口、LCD 接口等
|
||||
- 调试接口，标准 JTAG/SWD
|
||||
|
||||
开发板更多详细信息请参考【厂商名】 [xxx开发板介绍](https://xxx)。
|
||||
|
||||
## 外设支持
|
||||
|
||||
本 BSP 目前对外设的支持情况如下：
|
||||
|
||||
| **板载外设** | **支持情况** | **备注** |
|
||||
| :----------------- | :----------: | :------------------------------------- |
|
||||
| USB 转串口 | 支持 | |
|
||||
| SPI Flash | 支持 | |
|
||||
| 以太网 | 支持 | |
|
||||
| SD卡 | 暂不支持 | |
|
||||
| CAN | 暂不支持 | |
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| GPIO | 支持 | PA0, PA1... PK15 ---> PIN: 0, 1...176 |
|
||||
| UART | 支持 | UART1/x/x |
|
||||
| SPI | 支持 | SPI1/x/x |
|
||||
| I2C | 支持 | 软件 I2C |
|
||||
| SDIO | 暂不支持 | 即将支持 |
|
||||
| RTC | 暂不支持 | 即将支持 |
|
||||
| PWM | 暂不支持 | 即将支持 |
|
||||
| USB Device | 暂不支持 | 即将支持 |
|
||||
| USB Host | 暂不支持 | 即将支持 |
|
||||
| IWG | 暂不支持 | 即将支持 |
|
||||
| **扩展模块** | **支持情况** | **备注** |
|
||||
| xxx 模块 | 支持 | |
|
||||
|
||||
## 使用说明
|
||||
|
||||
使用说明分为如下两个章节：
|
||||
|
||||
- 快速上手
|
||||
|
||||
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
|
||||
|
||||
- 进阶使用
|
||||
|
||||
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
|
||||
|
||||
|
||||
### 快速上手
|
||||
|
||||
本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
|
||||
|
||||
#### 硬件连接
|
||||
|
||||
使用数据线连接开发板到 PC，打开电源开关。
|
||||
|
||||
#### 编译下载
|
||||
|
||||
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
|
||||
|
||||
> 工程默认配置使用 xxx 仿真器下载程序，在通过 xxx 连接开发板的基础上，点击下载按钮即可下载程序到开发板
|
||||
|
||||
#### 运行结果
|
||||
|
||||
下载程序成功之后，系统会自动运行，【这里写开发板运行起来之后的现象，如：LED 闪烁等】。
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 3.1.1 build Nov 19 2018
|
||||
2006 - 2018 Copyright by rt-thread team
|
||||
msh >
|
||||
```
|
||||
### 进阶使用
|
||||
|
||||
此 BSP 默认只开启了 GPIO 和 串口1 的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
|
||||
|
||||
1. 在 bsp 下打开 env 工具。
|
||||
|
||||
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
|
||||
|
||||
3. 输入`pkgs --update`命令更新软件包。
|
||||
|
||||
4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
|
||||
|
||||
本章节更多详细的介绍请参考 [IMXRT 系列 BSP 外设驱动使用教程](../docs/IMXRT系列BSP外设驱动使用教程.md)。
|
||||
|
||||
## 注意事项
|
||||
|
||||
- xxx
|
||||
|
||||
## 联系人信息
|
||||
|
||||
维护人:
|
||||
|
||||
- [xxx](https://个人主页), 邮箱：<xxx@xxx.com>
|
||||
|
|
@ -1,14 +0,0 @@
|
|||
# for module compiling
|
||||
import os
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
DefaultEnvironment(tools=[])
|
||||
if rtconfig.PLATFORM == 'armcc':
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
|
||||
# overwrite cflags, because cflags has '--C99'
|
||||
CXXCOM = '$CXX -o $TARGET --cpp -c $CXXFLAGS $_CCCOMCOM $SOURCES')
|
||||
else:
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
|
||||
CXXCOM = '$CXX -o $TARGET -c $CXXFLAGS $_CCCOMCOM $SOURCES')
|
||||
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
|
||||
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
imxrt_library = 'MIMXRT1050'
|
||||
rtconfig.BSP_LIBRARY_TYPE = imxrt_library
|
||||
|
||||
# include libraries
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, imxrt_library, 'SConscript')))
|
||||
|
||||
# include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
import rtconfig
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
# add for startup script
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
CPPDEFINES = ['__START=entry']
|
||||
else:
|
||||
CPPDEFINES = []
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
|
|
@ -1,30 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-04-29 tyustli first version
|
||||
*/
|
||||
|
||||
#include <rtdevice.h>
|
||||
#include "drv_gpio.h"
|
||||
|
||||
/* defined the LED pin: GPIO1_IO9 */
|
||||
#define LED0_PIN GET_PIN(1, 9)
|
||||
|
||||
int main(void)
|
||||
{
|
||||
/* set LED0 pin mode to output */
|
||||
rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
while (1)
|
||||
{
|
||||
rt_pin_write(LED0_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED0_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1,240 +0,0 @@
|
|||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_IMXRT1052CVL5B
|
||||
bool
|
||||
select SOC_MIMXRT1050_SERIES
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
config BSP_USING_DMA
|
||||
bool "Enable DMA"
|
||||
default n
|
||||
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
menuconfig BSP_USING_LPUART
|
||||
bool "Enable UART"
|
||||
select RT_USING_SERIAL
|
||||
default y
|
||||
|
||||
if BSP_USING_LPUART
|
||||
config BSP_USING_LPUART1
|
||||
bool "Enable LPUART1"
|
||||
default y
|
||||
|
||||
config BSP_LPUART1_RX_USING_DMA
|
||||
bool "Enable LPUART1 RX DMA"
|
||||
depends on BSP_USING_LPUART1
|
||||
select BSP_USING_DMA
|
||||
select RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_LPUART1_RX_DMA_CHANNEL
|
||||
depends on BSP_LPUART1_RX_USING_DMA
|
||||
int "Set LPUART1 RX DMA channel (0-32)"
|
||||
default 0
|
||||
|
||||
config BSP_LPUART1_TX_USING_DMA
|
||||
bool "Enable LPUART1 TX DMA"
|
||||
depends on BSP_USING_LPUART1
|
||||
select BSP_USING_DMA
|
||||
select RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_LPUART1_TX_DMA_CHANNEL
|
||||
depends on BSP_LPUART1_TX_USING_DMA
|
||||
int "Set LPUART1 TX DMA channel (0-32)"
|
||||
default 1
|
||||
config BSP_USING_LPUART4
|
||||
bool "Enable LPUART4"
|
||||
default y
|
||||
|
||||
config BSP_LPUART4_RX_USING_DMA
|
||||
bool "Enable LPUART4 RX DMA"
|
||||
depends on BSP_USING_LPUART4
|
||||
select BSP_USING_DMA
|
||||
select RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_LPUART4_RX_DMA_CHANNEL
|
||||
depends on BSP_LPUART4_RX_USING_DMA
|
||||
int "Set LPUART4 RX DMA channel (0-32)"
|
||||
default 0
|
||||
|
||||
config BSP_LPUART4_TX_USING_DMA
|
||||
bool "Enable LPUART4 TX DMA"
|
||||
depends on BSP_USING_LPUART4
|
||||
select BSP_USING_DMA
|
||||
select RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_LPUART4_TX_DMA_CHANNEL
|
||||
depends on BSP_LPUART4_TX_USING_DMA
|
||||
int "Set LPUART4 TX DMA channel (0-32)"
|
||||
default 1
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
default n
|
||||
select RT_USING_PWM
|
||||
if BSP_USING_PWM
|
||||
menuconfig BSP_USING_PWM2
|
||||
bool "Enable output pwm2"
|
||||
default n
|
||||
if BSP_USING_PWM2
|
||||
config BSP_USING_PWM2_CH0
|
||||
bool "Enable PWM2 channel0"
|
||||
default n
|
||||
config BSP_USING_PWM2_CH1
|
||||
bool "Enable PWM2 channel1"
|
||||
default n
|
||||
config BSP_USING_PWM2_CH2
|
||||
bool "Enable PWM2 channel2"
|
||||
default n
|
||||
config BSP_USING_PWM2_CH3
|
||||
bool "Enable PWM2 channel3"
|
||||
default n
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C"
|
||||
select RT_USING_I2C
|
||||
default n
|
||||
if BSP_USING_I2C
|
||||
menuconfig BSP_USING_I2C1
|
||||
bool "Enable I2C1"
|
||||
default n
|
||||
if BSP_USING_I2C1
|
||||
choice
|
||||
prompt "Select I2C1 badurate"
|
||||
default HW_I2C1_BADURATE_100kHZ
|
||||
|
||||
config HW_I2C1_BADURATE_100kHZ
|
||||
bool "Badurate 100kHZ"
|
||||
|
||||
config HW_I2C1_BADURATE_400kHZ
|
||||
bool "Badurate 400kHZ"
|
||||
endchoice
|
||||
endif
|
||||
menuconfig BSP_USING_I2C2
|
||||
bool "Enable I2C2"
|
||||
default n
|
||||
if BSP_USING_I2C2
|
||||
choice
|
||||
prompt "Select I2C2 badurate"
|
||||
default HW_I2C2_BADURATE_100kHZ
|
||||
|
||||
config HW_I2C2_BADURATE_100kHZ
|
||||
bool "Badurate 100kHZ"
|
||||
|
||||
config HW_I2C2_BADURATE_400kHZ
|
||||
bool "Badurate 400kHZ"
|
||||
endchoice
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI"
|
||||
select RT_USING_SPI
|
||||
select RT_USING_PIN
|
||||
default n
|
||||
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI4
|
||||
bool "Enable SPI4"
|
||||
default n
|
||||
|
||||
config BSP_SPI4_USING_DMA
|
||||
bool "Enable SPI4 DMA xfer"
|
||||
depends on BSP_USING_SPI4
|
||||
select BSP_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_SPI4_RX_DMA_CHANNEL
|
||||
depends on BSP_SPI4_USING_DMA
|
||||
int "Set SPI4 RX DMA channel (0-32)"
|
||||
default 4
|
||||
|
||||
config BSP_SPI4_TX_DMA_CHANNEL
|
||||
depends on BSP_SPI4_USING_DMA
|
||||
int "Set SPI4 TX DMA channel (0-32)"
|
||||
default 5
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PULSE_ENCODER
|
||||
bool "Enable Pulse Encoder"
|
||||
select RT_USING_PULSE_ENCODER
|
||||
default n
|
||||
|
||||
if BSP_USING_PULSE_ENCODER
|
||||
config BSP_USING_PULSE_ENCODER1
|
||||
bool "Enable PULSE_ENCODER1"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_USB
|
||||
bool "Enable USB"
|
||||
default n
|
||||
if BSP_USING_USB
|
||||
config BSP_USING_USB0
|
||||
bool "Enable USB0"
|
||||
default n
|
||||
choice
|
||||
prompt "Select USB0 Role"
|
||||
depends on BSP_USING_USB0
|
||||
default BSP_USB0_HOST
|
||||
|
||||
config BSP_USB0_HOST
|
||||
bool "Host"
|
||||
select RT_USING_USB_HOST
|
||||
|
||||
config BSP_USB0_DEVICE
|
||||
bool "Device"
|
||||
select RT_USING_USB_DEVICE
|
||||
endchoice
|
||||
config BSP_USING_USB1
|
||||
bool "Enable USB1"
|
||||
default n
|
||||
choice
|
||||
prompt "Select USB1 Role"
|
||||
depends on BSP_USING_USB1
|
||||
default BSP_USB1_HOST
|
||||
|
||||
config BSP_USB1_HOST
|
||||
bool "Host"
|
||||
select RT_USING_USB_HOST
|
||||
|
||||
config BSP_USB1_DEVICE
|
||||
bool "Device"
|
||||
select RT_USING_USB_DEVICE
|
||||
endchoice
|
||||
endif
|
||||
endmenu
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
config BSP_USING_SDRAM
|
||||
bool "Enable SDRAM"
|
||||
default n
|
||||
|
||||
config BSP_USING_MPU6050
|
||||
bool "Enable MPU6050 (I2C1:J11 --> SCL; K11 --> SDA)"
|
||||
select BSP_USING_I2C1
|
||||
select PKG_USING_MPU6XXX
|
||||
default n
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
|
@ -1,645 +0,0 @@
|
|||
<?xml version="1.0" encoding= "UTF-8" ?>
|
||||
<configuration name="IMXRT1050-EVKB" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.9 http://mcuxpresso.nxp.com/XSD/mex_configuration_1.9.xsd" uuid="789fd1d3-821c-40a6-b04d-44ccc5a5d158" version="1.9" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.9" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<common>
|
||||
<processor>MIMXRT1052xxxxB</processor>
|
||||
<package>MIMXRT1052DVL6B</package>
|
||||
<board>IMXRT1050-EVKB</board>
|
||||
<board_revision>A</board_revision>
|
||||
<mcu_data>ksdk2_0</mcu_data>
|
||||
<cores selected="core0">
|
||||
<core name="Cortex-M7F" id="core0" description="M7 core"/>
|
||||
</cores>
|
||||
<description></description>
|
||||
</common>
|
||||
<preferences>
|
||||
<validate_boot_init_only>false</validate_boot_init_only>
|
||||
<generate_extended_information>false</generate_extended_information>
|
||||
<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
|
||||
</preferences>
|
||||
<tools>
|
||||
<pins name="Pins" version="9.0" enabled="true" update_project_code="true">
|
||||
<generated_project_files>
|
||||
<file path="board/pin_mux.c" update_enabled="true"/>
|
||||
<file path="board/pin_mux.h" update_enabled="true"/>
|
||||
</generated_project_files>
|
||||
<pins_profile>
|
||||
<processor_version>9.0.0</processor_version>
|
||||
<power_domains/>
|
||||
<pin_labels>
|
||||
<pin_label pin_num="G11" pin_signal="GPIO_AD_B0_03" label="BSP_BEEP"/>
|
||||
<pin_label pin_num="L13" pin_signal="GPIO_AD_B1_10" label="BSP_RS485_RE" identifier="CSI_D7"/>
|
||||
<pin_label pin_num="J13" pin_signal="GPIO_AD_B1_11" label="BSP_DS18B20" identifier="CSI_D6"/>
|
||||
<pin_label pin_num="K12" pin_signal="GPIO_AD_B1_05" label="BSP_AP3216C_INT" identifier="CSI_MCLK"/>
|
||||
</pin_labels>
|
||||
</pins_profile>
|
||||
<functions_list>
|
||||
<function name="BOARD_InitPins">
|
||||
<description>Configures pin routing and optionally pin electrical features.</description>
|
||||
<options>
|
||||
<callFromInitBoot>false</callFromInitBoot>
|
||||
<coreID>core0</coreID>
|
||||
<enableClock>true</enableClock>
|
||||
</options>
|
||||
<dependencies>
|
||||
<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="PWM2" description="Peripheral PWM2 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="CSI" description="Peripheral CSI is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="ADC1" description="Peripheral ADC1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="GPIO2" description="Peripheral GPIO2 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="LPSPI4" description="Peripheral LPSPI4 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="ENC1" description="Peripheral ENC1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="Peripheral" resourceId="LPUART4" description="Peripheral LPUART4 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
||||
<feature name="initialized" evaluation="equal">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
|
||||
<feature name="enabled" evaluation="equal" configuration="core0">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
|
||||
<feature name="enabled" evaluation="equal" configuration="core0">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
|
||||
<feature name="enabled" evaluation="equal" configuration="core0">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.xbara" description="Pins initialization requires the XBARA Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
|
||||
<feature name="enabled" evaluation="equal" configuration="core0">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
</dependencies>
|
||||
<pins>
|
||||
<pin peripheral="LPUART1" signal="TX" pin_num="K14" pin_signal="GPIO_AD_B0_12"/>
|
||||
<pin peripheral="LPUART1" signal="RX" pin_num="L14" pin_signal="GPIO_AD_B0_13"/>
|
||||
<pin peripheral="USDHC1" signal="usdhc_data, 0" pin_num="J1" pin_signal="GPIO_SD_B0_02"/>
|
||||
<pin peripheral="USDHC1" signal="usdhc_data, 1" pin_num="K1" pin_signal="GPIO_SD_B0_03"/>
|
||||
<pin peripheral="USDHC1" signal="usdhc_data, 2" pin_num="H2" pin_signal="GPIO_SD_B0_04"/>
|
||||
<pin peripheral="USDHC1" signal="usdhc_data, 3" pin_num="J2" pin_signal="GPIO_SD_B0_05"/>
|
||||
<pin peripheral="USDHC1" signal="usdhc_clk" pin_num="J3" pin_signal="GPIO_SD_B0_01"/>
|
||||
<pin peripheral="USDHC1" signal="usdhc_cmd" pin_num="J4" pin_signal="GPIO_SD_B0_00"/>
|
||||
<pin peripheral="USDHC1" signal="usdhc_cd_b" pin_num="D13" pin_signal="GPIO_B1_12"/>
|
||||
<pin peripheral="PWM2" signal="A, 3" pin_num="M3" pin_signal="GPIO_SD_B1_02"/>
|
||||
<pin peripheral="GPIO3" signal="gpio_io, 00" pin_num="L5" pin_signal="GPIO_SD_B1_00">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
<pin_feature name="gpio_init_state" value="true"/>
|
||||
<pin_feature name="software_input_on" value="Enable"/>
|
||||
<pin_feature name="open_drain" value="Enable"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO3" signal="gpio_io, 01" pin_num="M5" pin_signal="GPIO_SD_B1_01">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
<pin_feature name="gpio_init_state" value="true"/>
|
||||
<pin_feature name="software_input_on" value="Enable"/>
|
||||
<pin_feature name="open_drain" value="Enable"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="CSI" signal="csi_data, 02" pin_num="J14" pin_signal="GPIO_AD_B1_15"/>
|
||||
<pin peripheral="CSI" signal="csi_data, 03" pin_num="G12" pin_signal="GPIO_AD_B1_14"/>
|
||||
<pin peripheral="CSI" signal="csi_data, 04" pin_num="H11" pin_signal="GPIO_AD_B1_13"/>
|
||||
<pin peripheral="CSI" signal="csi_data, 05" pin_num="H12" pin_signal="GPIO_AD_B1_12"/>
|
||||
<pin peripheral="CSI" signal="csi_data, 06" pin_num="J13" pin_signal="GPIO_AD_B1_11"/>
|
||||
<pin peripheral="CSI" signal="csi_data, 07" pin_num="L13" pin_signal="GPIO_AD_B1_10"/>
|
||||
<pin peripheral="CSI" signal="csi_data, 08" pin_num="M13" pin_signal="GPIO_AD_B1_09"/>
|
||||
<pin peripheral="CSI" signal="csi_data, 09" pin_num="H13" pin_signal="GPIO_AD_B1_08"/>
|
||||
<pin peripheral="CSI" signal="csi_pixclk" pin_num="L12" pin_signal="GPIO_AD_B1_04"/>
|
||||
<pin peripheral="CSI" signal="csi_hsync" pin_num="K10" pin_signal="GPIO_AD_B1_07"/>
|
||||
<pin peripheral="CSI" signal="csi_vsync" pin_num="J12" pin_signal="GPIO_AD_B1_06"/>
|
||||
<pin peripheral="ADC1" signal="IN, 3" pin_num="H14" pin_signal="GPIO_AD_B0_14"/>
|
||||
<pin peripheral="ADC1" signal="IN, 8" pin_num="M12" pin_signal="GPIO_AD_B1_03"/>
|
||||
<pin peripheral="ADC1" signal="IN, 7" pin_num="L11" pin_signal="GPIO_AD_B1_02"/>
|
||||
<pin peripheral="LPI2C1" signal="SDA" pin_num="K11" pin_signal="GPIO_AD_B1_01"/>
|
||||
<pin peripheral="LPI2C1" signal="SCL" pin_num="J11" pin_signal="GPIO_AD_B1_00"/>
|
||||
<pin peripheral="GPIO2" signal="gpio_io, 24" pin_num="A12" pin_signal="GPIO_B1_08">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO2" signal="gpio_io, 23" pin_num="B12" pin_signal="GPIO_B1_07">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO2" signal="gpio_io, 25" pin_num="A13" pin_signal="GPIO_B1_09">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="PWM2" signal="A, 0" pin_num="A8" pin_signal="GPIO_B0_06"/>
|
||||
<pin peripheral="PWM2" signal="B, 0" pin_num="A9" pin_signal="GPIO_B0_07"/>
|
||||
<pin peripheral="PWM2" signal="A, 1" pin_num="B9" pin_signal="GPIO_B0_08"/>
|
||||
<pin peripheral="PWM2" signal="B, 1" pin_num="C9" pin_signal="GPIO_B0_09"/>
|
||||
<pin peripheral="PWM2" signal="A, 2" pin_num="D9" pin_signal="GPIO_B0_10"/>
|
||||
<pin peripheral="PWM2" signal="B, 2" pin_num="A10" pin_signal="GPIO_B0_11">
|
||||
<pin_features>
|
||||
<pin_feature name="identifier" value=""/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO2" signal="gpio_io, 12" pin_num="C10" pin_signal="GPIO_B0_12">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO2" signal="gpio_io, 26" pin_num="B13" pin_signal="GPIO_B1_10">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="LPSPI4" signal="SDI" pin_num="E7" pin_signal="GPIO_B0_01"/>
|
||||
<pin peripheral="LPSPI4" signal="SDO" pin_num="E8" pin_signal="GPIO_B0_02"/>
|
||||
<pin peripheral="LPSPI4" signal="SCK" pin_num="D8" pin_signal="GPIO_B0_03"/>
|
||||
<pin peripheral="LPSPI4" signal="PCS0" pin_num="D7" pin_signal="GPIO_B0_00"/>
|
||||
<pin peripheral="LPSPI4" signal="PCS1" pin_num="D11" pin_signal="GPIO_B1_03"/>
|
||||
<pin peripheral="LPSPI4" signal="PCS2" pin_num="C11" pin_signal="GPIO_B1_02"/>
|
||||
<pin peripheral="GPIO2" signal="gpio_io, 27" pin_num="C13" pin_signal="GPIO_B1_11">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO2" signal="gpio_io, 22" pin_num="C12" pin_signal="GPIO_B1_06">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO2" signal="gpio_io, 20" pin_num="E12" pin_signal="GPIO_B1_04">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="OUTPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="GPIO2" signal="gpio_io, 21" pin_num="D12" pin_signal="GPIO_B1_05">
|
||||
<pin_features>
|
||||
<pin_feature name="direction" value="INPUT"/>
|
||||
</pin_features>
|
||||
</pin>
|
||||
<pin peripheral="ENC1" signal="PHASE, A" pin_num="D10" pin_signal="GPIO_B0_13"/>
|
||||
<pin peripheral="ENC1" signal="PHASE, B" pin_num="E10" pin_signal="GPIO_B0_14"/>
|
||||
<pin peripheral="LPUART4" signal="TX" pin_num="A11" pin_signal="GPIO_B1_00"/>
|
||||
<pin peripheral="LPUART4" signal="RX" pin_num="B11" pin_signal="GPIO_B1_01"/>
|
||||
</pins>
|
||||
</function>
|
||||
</functions_list>
|
||||
</pins>
|
||||
<clocks name="Clocks" version="7.0" enabled="true" update_project_code="true">
|
||||
<generated_project_files>
|
||||
<file path="board/clock_config.c" update_enabled="true"/>
|
||||
<file path="board/clock_config.h" update_enabled="true"/>
|
||||
</generated_project_files>
|
||||
<clocks_profile>
|
||||
<processor_version>9.0.0</processor_version>
|
||||
</clocks_profile>
|
||||
<clock_configurations>
|
||||
<clock_configuration name="BOARD_BootClockRUN">
|
||||
<description></description>
|
||||
<options/>
|
||||
<dependencies>
|
||||
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="'RTC_XTALI' (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
||||
<feature name="routed" evaluation="">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="'RTC_XTALI' (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have 'INPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
||||
<feature name="direction" evaluation="">
|
||||
<data>INPUT</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="'RTC_XTALO' (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
||||
<feature name="routed" evaluation="">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="'RTC_XTALO' (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have 'OUTPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
||||
<feature name="direction" evaluation="">
|
||||
<data>OUTPUT</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="'XTALI' (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
||||
<feature name="routed" evaluation="">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="'XTALI' (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have 'INPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
||||
<feature name="direction" evaluation="">
|
||||
<data>INPUT</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="'XTALO' (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
||||
<feature name="routed" evaluation="">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="'XTALO' (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have 'OUTPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
||||
<feature name="direction" evaluation="">
|
||||
<data>OUTPUT</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
|
||||
<feature name="enabled" evaluation="equal" configuration="core0">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
|
||||
<feature name="enabled" evaluation="equal" configuration="core0">
|
||||
<data>true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
</dependencies>
|
||||
<clock_sources>
|
||||
<clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
|
||||
</clock_sources>
|
||||
<clock_outputs>
|
||||
<clock_output id="AHB_CLK_ROOT.outFreq" value="600 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="CAN_CLK_ROOT.outFreq" value="40 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
|
||||
<clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="CSI_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="ENET1_TX_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="ENET_125M_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="ENET_25M_REF_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="FLEXIO2_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="2880/11 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="IPG_CLK_ROOT.outFreq" value="150 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="LCDIF_CLK_ROOT.outFreq" value="67.5/7 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="LVDS1_CLK.outFreq" value="1.2 GHz" locked="false" accuracy=""/>
|
||||
<clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="PERCLK_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="PLL7_MAIN_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SEMC_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="TRACE_CLK_ROOT.outFreq" value="352/3 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="USBPHY2_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="USDHC1_CLK_ROOT.outFreq" value="158.4 MHz" locked="false" accuracy=""/>
|
||||
<clock_output id="USDHC2_CLK_ROOT.outFreq" value="158.4 MHz" locked="false" accuracy=""/>
|
||||
</clock_outputs>
|
||||
<clock_settings>
|
||||
<setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
|
||||
<setting id="CCM.ARM_PODF.scale" value="2" locked="true"/>
|
||||
<setting id="CCM.CSI_CLK_SEL.sel" value="CCM.PLL3_SW_120M_CLK_DIV" locked="false"/>
|
||||
<setting id="CCM.CSI_PODF.scale" value="2" locked="true"/>
|
||||
<setting id="CCM.FLEXSPI_PODF.scale" value="1" locked="true"/>
|
||||
<setting id="CCM.FLEXSPI_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
|
||||
<setting id="CCM.LCDIF_PODF.scale" value="8" locked="true"/>
|
||||
<setting id="CCM.LCDIF_PRED.scale" value="7" locked="true"/>
|
||||
<setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
|
||||
<setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
|
||||
<setting id="CCM.SEMC_PODF.scale" value="8" locked="false"/>
|
||||
<setting id="CCM.TRACE_PODF.scale" value="3" locked="true"/>
|
||||
<setting id="CCM_ANALOG.PLL1_BYPASS.sel" value="CCM_ANALOG.PLL1" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL1_PREDIV.scale" value="1" locked="true"/>
|
||||
<setting id="CCM_ANALOG.PLL1_VDIV.scale" value="50" locked="true"/>
|
||||
<setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
|
||||
<setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
|
||||
<setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL2_PFD2_DIV.scale" value="30" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="33" locked="true"/>
|
||||
<setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
|
||||
<setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL5.denom" value="1" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL5.div" value="40" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL5.num" value="0" locked="false"/>
|
||||
<setting id="CCM_ANALOG.PLL7_BYPASS.sel" value="CCM_ANALOG.PLL7" locked="false"/>
|
||||
<setting id="CCM_ANALOG_PLL_ENET_POWERDOWN_CFG" value="Yes" locked="false"/>
|
||||
<setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
|
||||
<setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
|
||||
<setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
|
||||
<setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
|
||||
<setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
|
||||
<setting id="CCM_ANALOG_PLL_USB2_POWER_CFG" value="Yes" locked="false"/>
|
||||
</clock_settings>
|
||||
<called_from_default_init>true</called_from_default_init>
|
||||
</clock_configuration>
|
||||
</clock_configurations>
|
||||
</clocks>
|
||||
<dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
|
||||
<generated_project_files/>
|
||||
<dcdx_profile>
|
||||
<processor_version>N/A</processor_version>
|
||||
</dcdx_profile>
|
||||
<dcdx_configurations/>
|
||||
</dcdx>
|
||||
<periphs name="Peripherals" version="9.0" enabled="true" update_project_code="true">
|
||||
<dependencies>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpuart" description="LPUART Driver not found in the toolchain/IDE project. Project will not compile!" problem_level="2" source="Peripherals">
|
||||
<feature name="enabled" evaluation="equal">
|
||||
<data type="Boolean">true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpuart" description="Unsupported version of the LPUART Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. Project might not compile correctly." problem_level="1" source="Peripherals">
|
||||
<feature name="version" evaluation="equivalent">
|
||||
<data type="Version">2.2.4</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpi2c" description="LPI2C Driver not found in the toolchain/IDE project. Project will not compile!" problem_level="2" source="Peripherals">
|
||||
<feature name="enabled" evaluation="equal">
|
||||
<data type="Boolean">true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpi2c" description="Unsupported version of the LPI2C Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. Project might not compile correctly." problem_level="1" source="Peripherals">
|
||||
<feature name="version" evaluation="equivalent">
|
||||
<data type="Version">2.1.5</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
</dependencies>
|
||||
<generated_project_files>
|
||||
<file path="board/peripherals.c" update_enabled="true"/>
|
||||
<file path="board/peripherals.h" update_enabled="true"/>
|
||||
</generated_project_files>
|
||||
<peripherals_profile>
|
||||
<processor_version>9.0.0</processor_version>
|
||||
</peripherals_profile>
|
||||
<functional_groups>
|
||||
<functional_group name="BOARD_InitPeripherals" uuid="a7525270-2da6-4556-8d91-4ab9d0edc0e2" called_from_default_init="true" id_prefix="" core="core0">
|
||||
<description></description>
|
||||
<options/>
|
||||
<dependencies>
|
||||
<dependency resourceType="ClockOutput" resourceId="UART_CLK_ROOT" description="UART_CLK_ROOT is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="frequency" evaluation="greaterThan">
|
||||
<data type="Frequency" unit="Hz">0</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART1.uart_tx" description="Signal TX of the peripheral LPUART1 is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="routed" evaluation="equal">
|
||||
<data type="Boolean">true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART1.uart_rx" description="Signal RX of the peripheral LPUART1 is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="routed" evaluation="equal">
|
||||
<data type="Boolean">true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="ClockOutput" resourceId="LPI2C_CLK_ROOT" description="LPI2C_CLK_ROOT is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="frequency" evaluation="greaterThan">
|
||||
<data type="Frequency" unit="Hz">0</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PeripheralUnifiedSignal" resourceId="LPI2C1.lpi2c_scl" description="Signal serial clock of the peripheral LPI2C1 is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="routed" evaluation="">
|
||||
<data type="Boolean">true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PeripheralUnifiedSignal" resourceId="LPI2C1.lpi2c_sda" description="Signal serial data of the peripheral LPI2C1 is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="routed" evaluation="">
|
||||
<data type="Boolean">true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="ClockOutput" resourceId="UART_CLK_ROOT" description="UART_CLK_ROOT is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="frequency" evaluation="greaterThan">
|
||||
<data type="Frequency" unit="Hz">0</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART2.uart_tx" description="Signal TX of the peripheral LPUART2 is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="routed" evaluation="equal">
|
||||
<data type="Boolean">true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART2.uart_rx" description="Signal RX of the peripheral LPUART2 is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="routed" evaluation="equal">
|
||||
<data type="Boolean">true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="ClockOutput" resourceId="UART_CLK_ROOT" description="UART_CLK_ROOT is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="frequency" evaluation="greaterThan">
|
||||
<data type="Frequency" unit="Hz">0</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART5.uart_tx" description="Signal TX of the peripheral LPUART5 is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="routed" evaluation="equal">
|
||||
<data type="Boolean">true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
<dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART5.uart_rx" description="Signal RX of the peripheral LPUART5 is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
|
||||
<feature name="routed" evaluation="equal">
|
||||
<data type="Boolean">true</data>
|
||||
</feature>
|
||||
</dependency>
|
||||
</dependencies>
|
||||
<instances>
|
||||
<instance name="LPUART_1" uuid="f8a4434a-48d6-4fd0-9741-a24c3b4d7a26" type="lpuart" type_id="lpuart_bebe3e12b6ec22bbd14199038f2bf459" mode="polling" peripheral="LPUART1" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
|
||||
<config_set name="lpuartConfig_t" quick_selection="QuickSelection1">
|
||||
<struct name="lpuartConfig">
|
||||
<setting name="clockSource" value="LpuartClock"/>
|
||||
<setting name="lpuartSrcClkFreq" value="BOARD_BootClockRUN"/>
|
||||
<setting name="baudRate_Bps" value="115200"/>
|
||||
<setting name="parityMode" value="kLPUART_ParityDisabled"/>
|
||||
<setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
|
||||
<setting name="isMsb" value="false"/>
|
||||
<setting name="stopBitCount" value="kLPUART_OneStopBit"/>
|
||||
<setting name="txFifoWatermark" value="0"/>
|
||||
<setting name="rxFifoWatermark" value="1"/>
|
||||
<setting name="enableRxRTS" value="false"/>
|
||||
<setting name="enableTxCTS" value="false"/>
|
||||
<setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
|
||||
<setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
|
||||
<setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
|
||||
<setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
|
||||
<setting name="enableTx" value="true"/>
|
||||
<setting name="enableRx" value="true"/>
|
||||
</struct>
|
||||
</config_set>
|
||||
</instance>
|
||||
<instance name="LPI2C_1" uuid="f2c6ecfd-546b-4de7-b9b6-cea8aa876bbd" type="lpi2c" type_id="lpi2c_db68d4f4f06a22e25ab51fe9bd6db4d2" mode="master" peripheral="LPI2C1" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
|
||||
<config_set name="main" quick_selection="qs_interrupt">
|
||||
<setting name="clockSource" value="Lpi2cClock"/>
|
||||
<setting name="clockSourceFreq" value="BOARD_BootClockRUN"/>
|
||||
<struct name="interrupt">
|
||||
<setting name="IRQn" value="LPI2C1_IRQn"/>
|
||||
<setting name="enable_interrrupt" value="enabled"/>
|
||||
<setting name="enable_priority" value="false"/>
|
||||
<setting name="priority" value="0"/>
|
||||
<setting name="enable_custom_name" value="false"/>
|
||||
</struct>
|
||||
</config_set>
|
||||
<config_set name="master" quick_selection="qs_master_transfer">
|
||||
<setting name="mode" value="transfer"/>
|
||||
<struct name="config">
|
||||
<setting name="enableMaster" value="true"/>
|
||||
<setting name="enableDoze" value="true"/>
|
||||
<setting name="debugEnable" value="false"/>
|
||||
<setting name="ignoreAck" value="false"/>
|
||||
<setting name="pinConfig" value="kLPI2C_2PinOpenDrain"/>
|
||||
<setting name="baudRate_Hz" value="100000"/>
|
||||
<setting name="busIdleTimeout_ns" value="0"/>
|
||||
<setting name="pinLowTimeout_ns" value="0"/>
|
||||
<setting name="sdaGlitchFilterWidth_ns" value="0"/>
|
||||
<setting name="sclGlitchFilterWidth_ns" value="0"/>
|
||||
<struct name="hostRequest">
|
||||
<setting name="enable" value="false"/>
|
||||
<setting name="source" value="kLPI2C_HostRequestExternalPin"/>
|
||||
<setting name="polarity" value="kLPI2C_HostRequestPinActiveHigh"/>
|
||||
</struct>
|
||||
<set name="edmaRequestSources">
|
||||
<selected/>
|
||||
</set>
|
||||
</struct>
|
||||
<struct name="transfer">
|
||||
<setting name="blocking" value="false"/>
|
||||
<setting name="enable_custom_handle" value="false"/>
|
||||
<struct name="callback">
|
||||
<setting name="name" value=""/>
|
||||
<setting name="userData" value=""/>
|
||||
</struct>
|
||||
<set name="flags">
|
||||
<selected/>
|
||||
</set>
|
||||
<setting name="slaveAddress" value="0"/>
|
||||
<setting name="direction" value="kLPI2C_Write"/>
|
||||
<setting name="subaddress" value="0"/>
|
||||
<setting name="subaddressSize" value="1"/>
|
||||
<setting name="blocking_buffer" value="false"/>
|
||||
<setting name="enable_custom_buffer" value="false"/>
|
||||
<setting name="dataSize" value="1"/>
|
||||
</struct>
|
||||
</config_set>
|
||||
</instance>
|
||||
<instance name="LPUART_2" uuid="1ee26946-12b4-4ab3-b208-91ec8aa4629a" type="lpuart" type_id="lpuart_bebe3e12b6ec22bbd14199038f2bf459" mode="polling" peripheral="LPUART2" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
|
||||
<config_set name="lpuartConfig_t" quick_selection="QuickSelection1">
|
||||
<struct name="lpuartConfig">
|
||||
<setting name="clockSource" value="LpuartClock"/>
|
||||
<setting name="lpuartSrcClkFreq" value="BOARD_BootClockRUN"/>
|
||||
<setting name="baudRate_Bps" value="115200"/>
|
||||
<setting name="parityMode" value="kLPUART_ParityDisabled"/>
|
||||
<setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
|
||||
<setting name="isMsb" value="false"/>
|
||||
<setting name="stopBitCount" value="kLPUART_OneStopBit"/>
|
||||
<setting name="txFifoWatermark" value="0"/>
|
||||
<setting name="rxFifoWatermark" value="1"/>
|
||||
<setting name="enableRxRTS" value="false"/>
|
||||
<setting name="enableTxCTS" value="false"/>
|
||||
<setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
|
||||
<setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
|
||||
<setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
|
||||
<setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
|
||||
<setting name="enableTx" value="true"/>
|
||||
<setting name="enableRx" value="true"/>
|
||||
</struct>
|
||||
</config_set>
|
||||
</instance>
|
||||
<instance name="LPUART_3" uuid="f660eee0-6687-4744-8366-5b66b1cf256a" type="lpuart" type_id="lpuart_bebe3e12b6ec22bbd14199038f2bf459" mode="polling" peripheral="LPUART5" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
|
||||
<config_set name="lpuartConfig_t" quick_selection="QuickSelection1">
|
||||
<struct name="lpuartConfig">
|
||||
<setting name="clockSource" value="LpuartClock"/>
|
||||
<setting name="lpuartSrcClkFreq" value="BOARD_BootClockRUN"/>
|
||||
<setting name="baudRate_Bps" value="115200"/>
|
||||
<setting name="parityMode" value="kLPUART_ParityDisabled"/>
|
||||
<setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
|
||||
<setting name="isMsb" value="false"/>
|
||||
<setting name="stopBitCount" value="kLPUART_OneStopBit"/>
|
||||
<setting name="txFifoWatermark" value="0"/>
|
||||
<setting name="rxFifoWatermark" value="1"/>
|
||||
<setting name="enableRxRTS" value="false"/>
|
||||
<setting name="enableTxCTS" value="false"/>
|
||||
<setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
|
||||
<setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
|
||||
<setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
|
||||
<setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
|
||||
<setting name="enableTx" value="true"/>
|
||||
<setting name="enableRx" value="true"/>
|
||||
</struct>
|
||||
</config_set>
|
||||
</instance>
|
||||
</instances>
|
||||
</functional_group>
|
||||
</functional_groups>
|
||||
<components>
|
||||
<component name="system" uuid="f2a67c27-d1dc-4ba7-b57c-f5cc323a396b" type_id="system_54b53072540eeeb8f8e9343e71f28176">
|
||||
<config_set_global name="global_system_definitions">
|
||||
<setting name="user_definitions" value=""/>
|
||||
<setting name="user_includes" value=""/>
|
||||
</config_set_global>
|
||||
</component>
|
||||
<component name="msg" uuid="927ccc97-7b93-4411-b355-bf686ef8c99c" type_id="msg_6e2baaf3b97dbeef01c0043275f9a0e7">
|
||||
<config_set_global name="global_messages"/>
|
||||
</component>
|
||||
<component name="generic_uart" uuid="5134aaf2-fe38-438c-881f-2dd22530ff09" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
|
||||
<config_set_global name="global_uart"/>
|
||||
</component>
|
||||
<component name="generic_can" uuid="9dc83217-c951-472e-92ac-cbfda29a2cc5" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
|
||||
<config_set_global name="global_can"/>
|
||||
</component>
|
||||
</components>
|
||||
</periphs>
|
||||
<tee name="TEE" version="3.0" enabled="false" update_project_code="true">
|
||||
<generated_project_files/>
|
||||
<tee_profile>
|
||||
<processor_version>N/A</processor_version>
|
||||
</tee_profile>
|
||||
<global_options/>
|
||||
<user_memory_regions/>
|
||||
</tee>
|
||||
<common name="common" version="1.0" enabled="true" update_project_code="true">
|
||||
<core name="core0" role="primary" project_name="Project"/>
|
||||
</common>
|
||||
</tools>
|
||||
</configuration>
|
||||
|
|
@ -1,476 +0,0 @@
|
|||
/*
|
||||
* How to setup clock using clock driver functions:
|
||||
*
|
||||
* 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
|
||||
*
|
||||
* 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
|
||||
*
|
||||
* 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
|
||||
*
|
||||
* 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
|
||||
*
|
||||
* 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
|
||||
*
|
||||
*/
|
||||
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!GlobalInfo
|
||||
product: Clocks v7.0
|
||||
processor: MIMXRT1052xxxxB
|
||||
package_id: MIMXRT1052DVL6B
|
||||
mcu_data: ksdk2_0
|
||||
processor_version: 9.0.0
|
||||
board: IMXRT1050-EVKB
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
|
||||
#include "clock_config.h"
|
||||
#include "fsl_iomuxc.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
/* System clock frequency. */
|
||||
extern uint32_t SystemCoreClock;
|
||||
|
||||
/*******************************************************************************
|
||||
************************ BOARD_InitBootClocks function ************************
|
||||
******************************************************************************/
|
||||
void BOARD_InitBootClocks(void)
|
||||
{
|
||||
BOARD_BootClockRUN();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
********************** Configuration BOARD_BootClockRUN ***********************
|
||||
******************************************************************************/
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!Configuration
|
||||
name: BOARD_BootClockRUN
|
||||
called_from_default_init: true
|
||||
outputs:
|
||||
- {id: AHB_CLK_ROOT.outFreq, value: 600 MHz}
|
||||
- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
|
||||
- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
|
||||
- {id: CLK_1M.outFreq, value: 1 MHz}
|
||||
- {id: CLK_24M.outFreq, value: 24 MHz}
|
||||
- {id: CSI_CLK_ROOT.outFreq, value: 60 MHz}
|
||||
- {id: ENET1_TX_CLK.outFreq, value: 2.4 MHz}
|
||||
- {id: ENET_125M_CLK.outFreq, value: 2.4 MHz}
|
||||
- {id: ENET_25M_REF_CLK.outFreq, value: 1.2 MHz}
|
||||
- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
|
||||
- {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz}
|
||||
- {id: FLEXSPI_CLK_ROOT.outFreq, value: 2880/11 MHz}
|
||||
- {id: GPT1_ipg_clk_highfreq.outFreq, value: 75 MHz}
|
||||
- {id: GPT2_ipg_clk_highfreq.outFreq, value: 75 MHz}
|
||||
- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
|
||||
- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5/7 MHz}
|
||||
- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
|
||||
- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
|
||||
- {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
|
||||
- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
|
||||
- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
|
||||
- {id: PLL7_MAIN_CLK.outFreq, value: 480 MHz}
|
||||
- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
|
||||
- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
|
||||
- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
|
||||
- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
|
||||
- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
|
||||
- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
|
||||
- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
|
||||
- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
|
||||
- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
|
||||
- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
|
||||
- {id: SEMC_CLK_ROOT.outFreq, value: 75 MHz}
|
||||
- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
|
||||
- {id: TRACE_CLK_ROOT.outFreq, value: 352/3 MHz}
|
||||
- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
|
||||
- {id: USBPHY1_CLK.outFreq, value: 480 MHz}
|
||||
- {id: USBPHY2_CLK.outFreq, value: 480 MHz}
|
||||
- {id: USDHC1_CLK_ROOT.outFreq, value: 158.4 MHz}
|
||||
- {id: USDHC2_CLK_ROOT.outFreq, value: 158.4 MHz}
|
||||
settings:
|
||||
- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
|
||||
- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
|
||||
- {id: CCM.CSI_CLK_SEL.sel, value: CCM.PLL3_SW_120M_CLK_DIV}
|
||||
- {id: CCM.CSI_PODF.scale, value: '2', locked: true}
|
||||
- {id: CCM.FLEXSPI_PODF.scale, value: '1', locked: true}
|
||||
- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
|
||||
- {id: CCM.LCDIF_PODF.scale, value: '8', locked: true}
|
||||
- {id: CCM.LCDIF_PRED.scale, value: '7', locked: true}
|
||||
- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
|
||||
- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
|
||||
- {id: CCM.SEMC_PODF.scale, value: '8'}
|
||||
- {id: CCM.TRACE_PODF.scale, value: '3', locked: true}
|
||||
- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
|
||||
- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
|
||||
- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
|
||||
- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
|
||||
- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
|
||||
- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
|
||||
- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
|
||||
- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
|
||||
- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
|
||||
- {id: CCM_ANALOG.PLL2_PFD2_DIV.scale, value: '30'}
|
||||
- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
|
||||
- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
|
||||
- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
|
||||
- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '33', locked: true}
|
||||
- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
|
||||
- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
|
||||
- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
|
||||
- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
|
||||
- {id: CCM_ANALOG.PLL4.denom, value: '50'}
|
||||
- {id: CCM_ANALOG.PLL4.div, value: '47'}
|
||||
- {id: CCM_ANALOG.PLL5.denom, value: '1'}
|
||||
- {id: CCM_ANALOG.PLL5.div, value: '40'}
|
||||
- {id: CCM_ANALOG.PLL5.num, value: '0'}
|
||||
- {id: CCM_ANALOG.PLL7_BYPASS.sel, value: CCM_ANALOG.PLL7}
|
||||
- {id: CCM_ANALOG_PLL_ENET_POWERDOWN_CFG, value: 'Yes'}
|
||||
- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
|
||||
- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
|
||||
- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
|
||||
- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG, value: Enabled}
|
||||
- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG, value: Enabled}
|
||||
- {id: CCM_ANALOG_PLL_USB2_POWER_CFG, value: 'Yes'}
|
||||
sources:
|
||||
- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables for BOARD_BootClockRUN configuration
|
||||
******************************************************************************/
|
||||
const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
|
||||
{
|
||||
.loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */
|
||||
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
|
||||
};
|
||||
const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
|
||||
{
|
||||
.loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
|
||||
.numerator = 0, /* 30 bit numerator of fractional loop divider */
|
||||
.denominator = 1, /* 30 bit denominator of fractional loop divider */
|
||||
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
|
||||
};
|
||||
const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
|
||||
{
|
||||
.loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */
|
||||
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
|
||||
};
|
||||
const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN =
|
||||
{
|
||||
.loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */
|
||||
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
|
||||
};
|
||||
/*******************************************************************************
|
||||
* Code for BOARD_BootClockRUN configuration
|
||||
******************************************************************************/
|
||||
void BOARD_BootClockRUN(void)
|
||||
{
|
||||
/* Init RTC OSC clock frequency. */
|
||||
CLOCK_SetRtcXtalFreq(32768U);
|
||||
/* Enable 1MHz clock output. */
|
||||
XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
|
||||
/* Use free 1MHz clock output. */
|
||||
XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
|
||||
/* Set XTAL 24MHz clock frequency. */
|
||||
CLOCK_SetXtalFreq(24000000U);
|
||||
/* Enable XTAL 24MHz clock source. */
|
||||
CLOCK_InitExternalClk(0);
|
||||
/* Enable internal RC. */
|
||||
CLOCK_InitRcOsc24M();
|
||||
/* Switch clock source to external OSC. */
|
||||
CLOCK_SwitchOsc(kCLOCK_XtalOsc);
|
||||
/* Set Oscillator ready counter value. */
|
||||
CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
|
||||
/* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
|
||||
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
|
||||
CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
|
||||
/* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */
|
||||
DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13);
|
||||
/* Waiting for DCDC_STS_DC_OK bit is asserted */
|
||||
while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
|
||||
{
|
||||
}
|
||||
/* Set AHB_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
|
||||
/* Disable IPG clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Adc1);
|
||||
CLOCK_DisableClock(kCLOCK_Adc2);
|
||||
CLOCK_DisableClock(kCLOCK_Xbar1);
|
||||
CLOCK_DisableClock(kCLOCK_Xbar2);
|
||||
CLOCK_DisableClock(kCLOCK_Xbar3);
|
||||
/* Set IPG_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
|
||||
/* Set ARM_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_ArmDiv, 1);
|
||||
/* Set PERIPH_CLK2_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
|
||||
/* Disable PERCLK clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Gpt1);
|
||||
CLOCK_DisableClock(kCLOCK_Gpt1S);
|
||||
CLOCK_DisableClock(kCLOCK_Gpt2);
|
||||
CLOCK_DisableClock(kCLOCK_Gpt2S);
|
||||
CLOCK_DisableClock(kCLOCK_Pit);
|
||||
/* Set PERCLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
|
||||
/* Disable USDHC1 clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Usdhc1);
|
||||
/* Set USDHC1_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
|
||||
/* Set Usdhc1 clock source. */
|
||||
CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
|
||||
/* Disable USDHC2 clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Usdhc2);
|
||||
/* Set USDHC2_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);
|
||||
/* Set Usdhc2 clock source. */
|
||||
CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
|
||||
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
|
||||
* With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
|
||||
* Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
|
||||
#ifndef SKIP_SYSCLK_INIT
|
||||
/* Disable Semc clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Semc);
|
||||
/* Set SEMC_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
|
||||
/* Set Semc alt clock source. */
|
||||
CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
|
||||
/* Set Semc clock source. */
|
||||
CLOCK_SetMux(kCLOCK_SemcMux, 0);
|
||||
#endif
|
||||
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
|
||||
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
|
||||
* Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
|
||||
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
|
||||
/* Disable Flexspi clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_FlexSpi);
|
||||
/* Set FLEXSPI_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0);
|
||||
/* Set Flexspi clock source. */
|
||||
CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
|
||||
#endif
|
||||
/* Disable CSI clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Csi);
|
||||
/* Set CSI_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_CsiDiv, 1);
|
||||
/* Set Csi clock source. */
|
||||
CLOCK_SetMux(kCLOCK_CsiMux, 2);
|
||||
/* Disable LPSPI clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Lpspi1);
|
||||
CLOCK_DisableClock(kCLOCK_Lpspi2);
|
||||
CLOCK_DisableClock(kCLOCK_Lpspi3);
|
||||
CLOCK_DisableClock(kCLOCK_Lpspi4);
|
||||
/* Set LPSPI_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
|
||||
/* Set Lpspi clock source. */
|
||||
CLOCK_SetMux(kCLOCK_LpspiMux, 2);
|
||||
/* Disable TRACE clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Trace);
|
||||
/* Set TRACE_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_TraceDiv, 2);
|
||||
/* Set Trace clock source. */
|
||||
CLOCK_SetMux(kCLOCK_TraceMux, 2);
|
||||
/* Disable SAI1 clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Sai1);
|
||||
/* Set SAI1_CLK_PRED. */
|
||||
CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
|
||||
/* Set SAI1_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
|
||||
/* Set Sai1 clock source. */
|
||||
CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
|
||||
/* Disable SAI2 clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Sai2);
|
||||
/* Set SAI2_CLK_PRED. */
|
||||
CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
|
||||
/* Set SAI2_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
|
||||
/* Set Sai2 clock source. */
|
||||
CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
|
||||
/* Disable SAI3 clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Sai3);
|
||||
/* Set SAI3_CLK_PRED. */
|
||||
CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
|
||||
/* Set SAI3_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
|
||||
/* Set Sai3 clock source. */
|
||||
CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
|
||||
/* Disable Lpi2c clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Lpi2c1);
|
||||
CLOCK_DisableClock(kCLOCK_Lpi2c2);
|
||||
CLOCK_DisableClock(kCLOCK_Lpi2c3);
|
||||
/* Set LPI2C_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
|
||||
/* Set Lpi2c clock source. */
|
||||
CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
|
||||
/* Disable CAN clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Can1);
|
||||
CLOCK_DisableClock(kCLOCK_Can2);
|
||||
CLOCK_DisableClock(kCLOCK_Can1S);
|
||||
CLOCK_DisableClock(kCLOCK_Can2S);
|
||||
/* Set CAN_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_CanDiv, 1);
|
||||
/* Set Can clock source. */
|
||||
CLOCK_SetMux(kCLOCK_CanMux, 2);
|
||||
/* Disable UART clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Lpuart1);
|
||||
CLOCK_DisableClock(kCLOCK_Lpuart2);
|
||||
CLOCK_DisableClock(kCLOCK_Lpuart3);
|
||||
CLOCK_DisableClock(kCLOCK_Lpuart4);
|
||||
CLOCK_DisableClock(kCLOCK_Lpuart5);
|
||||
CLOCK_DisableClock(kCLOCK_Lpuart6);
|
||||
CLOCK_DisableClock(kCLOCK_Lpuart7);
|
||||
CLOCK_DisableClock(kCLOCK_Lpuart8);
|
||||
/* Set UART_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_UartDiv, 0);
|
||||
/* Set Uart clock source. */
|
||||
CLOCK_SetMux(kCLOCK_UartMux, 0);
|
||||
/* Disable LCDIF clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_LcdPixel);
|
||||
/* Set LCDIF_PRED. */
|
||||
CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 6);
|
||||
/* Set LCDIF_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_LcdifDiv, 7);
|
||||
/* Set Lcdif pre clock source. */
|
||||
CLOCK_SetMux(kCLOCK_LcdifPreMux, 5);
|
||||
/* Disable SPDIF clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Spdif);
|
||||
/* Set SPDIF0_CLK_PRED. */
|
||||
CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
|
||||
/* Set SPDIF0_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
|
||||
/* Set Spdif clock source. */
|
||||
CLOCK_SetMux(kCLOCK_SpdifMux, 3);
|
||||
/* Disable Flexio1 clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Flexio1);
|
||||
/* Set FLEXIO1_CLK_PRED. */
|
||||
CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
|
||||
/* Set FLEXIO1_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
|
||||
/* Set Flexio1 clock source. */
|
||||
CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
|
||||
/* Disable Flexio2 clock gate. */
|
||||
CLOCK_DisableClock(kCLOCK_Flexio2);
|
||||
/* Set FLEXIO2_CLK_PRED. */
|
||||
CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1);
|
||||
/* Set FLEXIO2_CLK_PODF. */
|
||||
CLOCK_SetDiv(kCLOCK_Flexio2Div, 7);
|
||||
/* Set Flexio2 clock source. */
|
||||
CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);
|
||||
/* Set Pll3 sw clock source. */
|
||||
CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
|
||||
/* Init ARM PLL. */
|
||||
CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
|
||||
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
|
||||
* With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
|
||||
* Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
|
||||
#ifndef SKIP_SYSCLK_INIT
|
||||
#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
|
||||
#warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
|
||||
#endif
|
||||
/* Init System PLL. */
|
||||
CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
|
||||
/* Init System pfd0. */
|
||||
CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
|
||||
/* Init System pfd1. */
|
||||
CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
|
||||
/* Init System pfd2. */
|
||||
CLOCK_InitSysPfd(kCLOCK_Pfd2, 30);
|
||||
/* Init System pfd3. */
|
||||
CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
|
||||
/* Disable pfd offset. */
|
||||
CCM_ANALOG->PLL_SYS &= ~CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK;
|
||||
#endif
|
||||
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
|
||||
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
|
||||
* Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
|
||||
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
|
||||
/* Init Usb1 PLL. */
|
||||
CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
|
||||
/* Init Usb1 pfd0. */
|
||||
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
|
||||
/* Init Usb1 pfd1. */
|
||||
CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
|
||||
/* Init Usb1 pfd2. */
|
||||
CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
|
||||
/* Init Usb1 pfd3. */
|
||||
CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
|
||||
#endif
|
||||
/* DeInit Audio PLL. */
|
||||
CLOCK_DeinitAudioPll();
|
||||
/* Bypass Audio PLL. */
|
||||
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
|
||||
/* Set divider for Audio PLL. */
|
||||
CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
|
||||
CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
|
||||
/* Enable Audio PLL output. */
|
||||
CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
|
||||
/* DeInit Video PLL. */
|
||||
CLOCK_DeinitVideoPll();
|
||||
/* Bypass Video PLL. */
|
||||
CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_BYPASS_MASK;
|
||||
/* Set divider for Video PLL. */
|
||||
CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(0);
|
||||
/* Enable Video PLL output. */
|
||||
CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
|
||||
/* DeInit Enet PLL. */
|
||||
CLOCK_DeinitEnetPll();
|
||||
/* Bypass Enet PLL. */
|
||||
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
|
||||
/* Set Enet output divider. */
|
||||
CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
|
||||
/* Enable Enet output. */
|
||||
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
|
||||
/* Enable Enet25M output. */
|
||||
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
|
||||
/* Init Usb2 PLL. */
|
||||
CLOCK_InitUsb2Pll(&usb2PllConfig_BOARD_BootClockRUN);
|
||||
/* Set preperiph clock source. */
|
||||
CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
|
||||
/* Set periph clock source. */
|
||||
CLOCK_SetMux(kCLOCK_PeriphMux, 0);
|
||||
/* Set periph clock2 clock source. */
|
||||
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
|
||||
/* Set per clock source. */
|
||||
CLOCK_SetMux(kCLOCK_PerclkMux, 0);
|
||||
/* Set lvds1 clock source. */
|
||||
CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
|
||||
/* Set clock out1 divider. */
|
||||
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
|
||||
/* Set clock out1 source. */
|
||||
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
|
||||
/* Set clock out2 divider. */
|
||||
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
|
||||
/* Set clock out2 source. */
|
||||
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
|
||||
/* Set clock out1 drives clock out1. */
|
||||
CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
|
||||
/* Disable clock out1. */
|
||||
CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
|
||||
/* Disable clock out2. */
|
||||
CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
|
||||
/* Set SAI1 MCLK1 clock source. */
|
||||
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
|
||||
/* Set SAI1 MCLK2 clock source. */
|
||||
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
|
||||
/* Set SAI1 MCLK3 clock source. */
|
||||
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
|
||||
/* Set SAI2 MCLK3 clock source. */
|
||||
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
|
||||
/* Set SAI3 MCLK3 clock source. */
|
||||
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
|
||||
/* Set MQS configuration. */
|
||||
IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
|
||||
/* Set ENET Tx clock source. */
|
||||
IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false);
|
||||
/* Set GPT1 High frequency reference clock source. */
|
||||
IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
|
||||
/* Set GPT2 High frequency reference clock source. */
|
||||
IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
|
||||
/* Set SystemCoreClock variable. */
|
||||
SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
|
||||
}
|
||||
|
||||
|
|
@ -1,116 +0,0 @@
|
|||
#ifndef _CLOCK_CONFIG_H_
|
||||
#define _CLOCK_CONFIG_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */
|
||||
|
||||
#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */
|
||||
/*******************************************************************************
|
||||
************************ BOARD_InitBootClocks function ************************
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*!
|
||||
* @brief This function executes default configuration of clocks.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitBootClocks(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*******************************************************************************
|
||||
********************** Configuration BOARD_BootClockRUN ***********************
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Definitions for BOARD_BootClockRUN configuration
|
||||
******************************************************************************/
|
||||
#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U /*!< Core clock frequency: 600000000Hz */
|
||||
|
||||
/* Clock outputs (values are in Hz): */
|
||||
#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 600000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL
|
||||
#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT 60000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_ENET1_TX_CLK 2400000UL
|
||||
#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 2400000UL
|
||||
#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 1200000UL
|
||||
#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT 30000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 261818181UL
|
||||
#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 75000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 75000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 9642857UL
|
||||
#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL
|
||||
#define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL
|
||||
#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK 480000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 75000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
|
||||
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 480000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 480000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 158400000UL
|
||||
#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 158400000UL
|
||||
|
||||
/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
|
||||
*/
|
||||
extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN;
|
||||
/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
|
||||
*/
|
||||
extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
|
||||
/*! @brief Usb2 PLL set for BOARD_BootClockRUN configuration.
|
||||
*/
|
||||
extern const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN;
|
||||
/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
|
||||
*/
|
||||
extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
|
||||
|
||||
/*******************************************************************************
|
||||
* API for BOARD_BootClockRUN configuration
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*!
|
||||
* @brief This function executes configuration of clocks.
|
||||
*
|
||||
*/
|
||||
void BOARD_BootClockRUN(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
#endif /* _CLOCK_CONFIG_H_ */
|
||||
|
||||
|
|
@ -1,274 +0,0 @@
|
|||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*
|
||||
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!GlobalInfo
|
||||
product: Pins v9.0
|
||||
processor: MIMXRT1052xxxxB
|
||||
package_id: MIMXRT1052DVL6B
|
||||
mcu_data: ksdk2_0
|
||||
processor_version: 9.0.0
|
||||
board: IMXRT1050-EVKB
|
||||
pin_labels:
|
||||
- {pin_num: G11, pin_signal: GPIO_AD_B0_03, label: BSP_BEEP}
|
||||
- {pin_num: L13, pin_signal: GPIO_AD_B1_10, label: BSP_RS485_RE, identifier: CSI_D7}
|
||||
- {pin_num: J13, pin_signal: GPIO_AD_B1_11, label: BSP_DS18B20, identifier: CSI_D6}
|
||||
- {pin_num: K12, pin_signal: GPIO_AD_B1_05, label: BSP_AP3216C_INT, identifier: CSI_MCLK}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||||
*/
|
||||
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_xbara.h"
|
||||
#include "fsl_iomuxc.h"
|
||||
#include "fsl_gpio.h"
|
||||
#include "pin_mux.h"
|
||||
|
||||
/* FUNCTION ************************************************************************************************************
|
||||
*
|
||||
* Function Name : BOARD_InitBootPins
|
||||
* Description : Calls initialization functions.
|
||||
*
|
||||
* END ****************************************************************************************************************/
|
||||
void BOARD_InitBootPins(void) {
|
||||
}
|
||||
|
||||
/*
|
||||
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
BOARD_InitPins:
|
||||
- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
|
||||
- pin_list:
|
||||
- {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12}
|
||||
- {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13}
|
||||
- {pin_num: J1, peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_02}
|
||||
- {pin_num: K1, peripheral: USDHC1, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B0_03}
|
||||
- {pin_num: H2, peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_04}
|
||||
- {pin_num: J2, peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_05}
|
||||
- {pin_num: J3, peripheral: USDHC1, signal: usdhc_clk, pin_signal: GPIO_SD_B0_01}
|
||||
- {pin_num: J4, peripheral: USDHC1, signal: usdhc_cmd, pin_signal: GPIO_SD_B0_00}
|
||||
- {pin_num: D13, peripheral: USDHC1, signal: usdhc_cd_b, pin_signal: GPIO_B1_12}
|
||||
- {pin_num: M3, peripheral: PWM2, signal: 'A, 3', pin_signal: GPIO_SD_B1_02}
|
||||
- {pin_num: L5, peripheral: GPIO3, signal: 'gpio_io, 00', pin_signal: GPIO_SD_B1_00, direction: OUTPUT, gpio_init_state: 'true', software_input_on: Enable, open_drain: Enable}
|
||||
- {pin_num: M5, peripheral: GPIO3, signal: 'gpio_io, 01', pin_signal: GPIO_SD_B1_01, direction: OUTPUT, gpio_init_state: 'true', software_input_on: Enable, open_drain: Enable}
|
||||
- {pin_num: J14, peripheral: CSI, signal: 'csi_data, 02', pin_signal: GPIO_AD_B1_15}
|
||||
- {pin_num: G12, peripheral: CSI, signal: 'csi_data, 03', pin_signal: GPIO_AD_B1_14}
|
||||
- {pin_num: H11, peripheral: CSI, signal: 'csi_data, 04', pin_signal: GPIO_AD_B1_13}
|
||||
- {pin_num: H12, peripheral: CSI, signal: 'csi_data, 05', pin_signal: GPIO_AD_B1_12}
|
||||
- {pin_num: J13, peripheral: CSI, signal: 'csi_data, 06', pin_signal: GPIO_AD_B1_11}
|
||||
- {pin_num: L13, peripheral: CSI, signal: 'csi_data, 07', pin_signal: GPIO_AD_B1_10}
|
||||
- {pin_num: M13, peripheral: CSI, signal: 'csi_data, 08', pin_signal: GPIO_AD_B1_09}
|
||||
- {pin_num: H13, peripheral: CSI, signal: 'csi_data, 09', pin_signal: GPIO_AD_B1_08}
|
||||
- {pin_num: L12, peripheral: CSI, signal: csi_pixclk, pin_signal: GPIO_AD_B1_04}
|
||||
- {pin_num: K10, peripheral: CSI, signal: csi_hsync, pin_signal: GPIO_AD_B1_07}
|
||||
- {pin_num: J12, peripheral: CSI, signal: csi_vsync, pin_signal: GPIO_AD_B1_06}
|
||||
- {pin_num: H14, peripheral: ADC1, signal: 'IN, 3', pin_signal: GPIO_AD_B0_14}
|
||||
- {pin_num: M12, peripheral: ADC1, signal: 'IN, 8', pin_signal: GPIO_AD_B1_03}
|
||||
- {pin_num: L11, peripheral: ADC1, signal: 'IN, 7', pin_signal: GPIO_AD_B1_02}
|
||||
- {pin_num: K11, peripheral: LPI2C1, signal: SDA, pin_signal: GPIO_AD_B1_01}
|
||||
- {pin_num: J11, peripheral: LPI2C1, signal: SCL, pin_signal: GPIO_AD_B1_00}
|
||||
- {pin_num: A12, peripheral: GPIO2, signal: 'gpio_io, 24', pin_signal: GPIO_B1_08, direction: INPUT}
|
||||
- {pin_num: B12, peripheral: GPIO2, signal: 'gpio_io, 23', pin_signal: GPIO_B1_07, direction: INPUT}
|
||||
- {pin_num: A13, peripheral: GPIO2, signal: 'gpio_io, 25', pin_signal: GPIO_B1_09, direction: INPUT}
|
||||
- {pin_num: A8, peripheral: PWM2, signal: 'A, 0', pin_signal: GPIO_B0_06}
|
||||
- {pin_num: A9, peripheral: PWM2, signal: 'B, 0', pin_signal: GPIO_B0_07}
|
||||
- {pin_num: B9, peripheral: PWM2, signal: 'A, 1', pin_signal: GPIO_B0_08}
|
||||
- {pin_num: C9, peripheral: PWM2, signal: 'B, 1', pin_signal: GPIO_B0_09}
|
||||
- {pin_num: D9, peripheral: PWM2, signal: 'A, 2', pin_signal: GPIO_B0_10}
|
||||
- {pin_num: A10, peripheral: PWM2, signal: 'B, 2', pin_signal: GPIO_B0_11, identifier: ''}
|
||||
- {pin_num: C10, peripheral: GPIO2, signal: 'gpio_io, 12', pin_signal: GPIO_B0_12, direction: OUTPUT}
|
||||
- {pin_num: B13, peripheral: GPIO2, signal: 'gpio_io, 26', pin_signal: GPIO_B1_10, direction: INPUT}
|
||||
- {pin_num: E7, peripheral: LPSPI4, signal: SDI, pin_signal: GPIO_B0_01}
|
||||
- {pin_num: E8, peripheral: LPSPI4, signal: SDO, pin_signal: GPIO_B0_02}
|
||||
- {pin_num: D8, peripheral: LPSPI4, signal: SCK, pin_signal: GPIO_B0_03}
|
||||
- {pin_num: D7, peripheral: LPSPI4, signal: PCS0, pin_signal: GPIO_B0_00}
|
||||
- {pin_num: D11, peripheral: LPSPI4, signal: PCS1, pin_signal: GPIO_B1_03}
|
||||
- {pin_num: C11, peripheral: LPSPI4, signal: PCS2, pin_signal: GPIO_B1_02}
|
||||
- {pin_num: C13, peripheral: GPIO2, signal: 'gpio_io, 27', pin_signal: GPIO_B1_11, direction: OUTPUT}
|
||||
- {pin_num: C12, peripheral: GPIO2, signal: 'gpio_io, 22', pin_signal: GPIO_B1_06, direction: OUTPUT}
|
||||
- {pin_num: E12, peripheral: GPIO2, signal: 'gpio_io, 20', pin_signal: GPIO_B1_04, direction: OUTPUT}
|
||||
- {pin_num: D12, peripheral: GPIO2, signal: 'gpio_io, 21', pin_signal: GPIO_B1_05, direction: INPUT}
|
||||
- {pin_num: D10, peripheral: ENC1, signal: 'PHASE, A', pin_signal: GPIO_B0_13}
|
||||
- {pin_num: E10, peripheral: ENC1, signal: 'PHASE, B', pin_signal: GPIO_B0_14}
|
||||
- {pin_num: A11, peripheral: LPUART4, signal: TX, pin_signal: GPIO_B1_00}
|
||||
- {pin_num: B11, peripheral: LPUART4, signal: RX, pin_signal: GPIO_B1_01}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||||
*/
|
||||
|
||||
/* FUNCTION ************************************************************************************************************
|
||||
*
|
||||
* Function Name : BOARD_InitPins
|
||||
* Description : Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
* END ****************************************************************************************************************/
|
||||
void BOARD_InitPins(void) {
|
||||
CLOCK_EnableClock(kCLOCK_Iomuxc);
|
||||
CLOCK_EnableClock(kCLOCK_Xbar1);
|
||||
|
||||
/* GPIO configuration of LCDIF_D8 on GPIO_B0_12 (pin C10) */
|
||||
gpio_pin_config_t LCDIF_D8_config = {
|
||||
.direction = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_B0_12 (pin C10) */
|
||||
GPIO_PinInit(GPIO2, 12U, &LCDIF_D8_config);
|
||||
|
||||
/* GPIO configuration of ENET_RXD0 on GPIO_B1_04 (pin E12) */
|
||||
gpio_pin_config_t ENET_RXD0_config = {
|
||||
.direction = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_B1_04 (pin E12) */
|
||||
GPIO_PinInit(GPIO2, 20U, &ENET_RXD0_config);
|
||||
|
||||
/* GPIO configuration of ENET_RXD1 on GPIO_B1_05 (pin D12) */
|
||||
gpio_pin_config_t ENET_RXD1_config = {
|
||||
.direction = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_B1_05 (pin D12) */
|
||||
GPIO_PinInit(GPIO2, 21U, &ENET_RXD1_config);
|
||||
|
||||
/* GPIO configuration of ENET_CRS_DV on GPIO_B1_06 (pin C12) */
|
||||
gpio_pin_config_t ENET_CRS_DV_config = {
|
||||
.direction = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_B1_06 (pin C12) */
|
||||
GPIO_PinInit(GPIO2, 22U, &ENET_CRS_DV_config);
|
||||
|
||||
/* GPIO configuration of ENET_TXD0 on GPIO_B1_07 (pin B12) */
|
||||
gpio_pin_config_t ENET_TXD0_config = {
|
||||
.direction = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_B1_07 (pin B12) */
|
||||
GPIO_PinInit(GPIO2, 23U, &ENET_TXD0_config);
|
||||
|
||||
/* GPIO configuration of ENET_TXD1 on GPIO_B1_08 (pin A12) */
|
||||
gpio_pin_config_t ENET_TXD1_config = {
|
||||
.direction = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_B1_08 (pin A12) */
|
||||
GPIO_PinInit(GPIO2, 24U, &ENET_TXD1_config);
|
||||
|
||||
/* GPIO configuration of ENET_TXEN on GPIO_B1_09 (pin A13) */
|
||||
gpio_pin_config_t ENET_TXEN_config = {
|
||||
.direction = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_B1_09 (pin A13) */
|
||||
GPIO_PinInit(GPIO2, 25U, &ENET_TXEN_config);
|
||||
|
||||
/* GPIO configuration of ENET_TX_CLK on GPIO_B1_10 (pin B13) */
|
||||
gpio_pin_config_t ENET_TX_CLK_config = {
|
||||
.direction = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_B1_10 (pin B13) */
|
||||
GPIO_PinInit(GPIO2, 26U, &ENET_TX_CLK_config);
|
||||
|
||||
/* GPIO configuration of ENET_RXER on GPIO_B1_11 (pin C13) */
|
||||
gpio_pin_config_t ENET_RXER_config = {
|
||||
.direction = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_B1_11 (pin C13) */
|
||||
GPIO_PinInit(GPIO2, 27U, &ENET_RXER_config);
|
||||
|
||||
/* GPIO configuration of FlexSPI_D3_B on GPIO_SD_B1_00 (pin L5) */
|
||||
gpio_pin_config_t FlexSPI_D3_B_config = {
|
||||
.direction = kGPIO_DigitalOutput,
|
||||
.outputLogic = 1U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_SD_B1_00 (pin L5) */
|
||||
GPIO_PinInit(GPIO3, 0U, &FlexSPI_D3_B_config);
|
||||
|
||||
/* GPIO configuration of FlexSPI_D2_B on GPIO_SD_B1_01 (pin M5) */
|
||||
gpio_pin_config_t FlexSPI_D2_B_config = {
|
||||
.direction = kGPIO_DigitalOutput,
|
||||
.outputLogic = 1U,
|
||||
.interruptMode = kGPIO_NoIntmode
|
||||
};
|
||||
/* Initialize GPIO functionality on GPIO_SD_B1_01 (pin M5) */
|
||||
GPIO_PinInit(GPIO3, 1U, &FlexSPI_D2_B_config);
|
||||
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_14_GPIO1_IO14, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_GPIO1_IO18, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_GPIO1_IO19, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_CSI_VSYNC, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_CSI_HSYNC, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_CSI_DATA09, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_CSI_DATA08, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_CSI_DATA07, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_CSI_DATA06, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_12_CSI_DATA05, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_CSI_DATA04, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_CSI_DATA03, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_CSI_DATA02, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LPSPI4_PCS0, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LPSPI4_SDI, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LPSPI4_SDO, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_03_LPSPI4_SCK, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_06_FLEXPWM2_PWMA00, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_07_FLEXPWM2_PWMB00, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_08_FLEXPWM2_PWMA01, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_09_FLEXPWM2_PWMB01, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_10_FLEXPWM2_PWMA02, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_11_FLEXPWM2_PWMB02, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_12_GPIO2_IO12, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_13_XBAR1_INOUT11, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_14_XBAR1_INOUT12, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_00_LPUART4_TX, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_01_LPUART4_RX, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_02_LPSPI4_PCS2, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_03_LPSPI4_PCS1, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_GPIO2_IO20, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_05_GPIO2_IO21, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_06_GPIO2_IO22, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_07_GPIO2_IO23, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_08_GPIO2_IO24, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_09_GPIO2_IO25, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_10_GPIO2_IO26, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_11_GPIO2_IO27, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_12_USDHC1_CD_B, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_USDHC1_CLK, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, 0U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_00_GPIO3_IO00, 1U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_01_GPIO3_IO01, 1U);
|
||||
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_02_FLEXPWM2_PWMA03, 0U);
|
||||
IOMUXC_GPR->GPR6 = ((IOMUXC_GPR->GPR6 &
|
||||
(~(IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK)))
|
||||
| IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11(0x00U)
|
||||
| IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12(0x00U)
|
||||
);
|
||||
XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout11, kXBARA1_OutputEnc1PhaseAInput);
|
||||
XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout12, kXBARA1_OutputEnc1PhaseBInput);
|
||||
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_00_GPIO3_IO00, 0x18B0U);
|
||||
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_01_GPIO3_IO01, 0x18B0U);
|
||||
}
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* EOF
|
||||
**********************************************************************************************************************/
|
||||
|
|
@ -1,430 +0,0 @@
|
|||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef _PIN_MUX_H_
|
||||
#define _PIN_MUX_H_
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*! @brief Direction type */
|
||||
typedef enum _pin_mux_direction
|
||||
{
|
||||
kPIN_MUX_DirectionInput = 0U, /* Input direction */
|
||||
kPIN_MUX_DirectionOutput = 1U, /* Output direction */
|
||||
kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
|
||||
} pin_mux_direction_t;
|
||||
|
||||
/*!
|
||||
* @addtogroup pin_mux
|
||||
* @{
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* API
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Calls initialization functions.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitBootPins(void);
|
||||
|
||||
/* GPIO_AD_B0_12 (coord K14), UART1_TXD */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_UART1_TXD_PERIPHERAL LPUART1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_UART1_TXD_SIGNAL TX /*!< Signal name */
|
||||
|
||||
/* GPIO_AD_B0_13 (coord L14), UART1_RXD */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_UART1_RXD_PERIPHERAL LPUART1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_UART1_RXD_SIGNAL RX /*!< Signal name */
|
||||
|
||||
/* GPIO_SD_B0_02 (coord J1), SD1_D0/J24[4]/SPI_MOSI/PWM */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_SD1_D0_PERIPHERAL USDHC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_SD1_D0_SIGNAL usdhc_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_SD1_D0_CHANNEL 0U /*!< Signal channel */
|
||||
|
||||
/* GPIO_SD_B0_03 (coord K1), SD1_D1/J24[5]/SPI_MISO */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_SD1_D1_PERIPHERAL USDHC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_SD1_D1_SIGNAL usdhc_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_SD1_D1_CHANNEL 1U /*!< Signal channel */
|
||||
|
||||
/* GPIO_SD_B0_04 (coord H2), SD1_D2 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_SD1_D2_PERIPHERAL USDHC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_SD1_D2_SIGNAL usdhc_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_SD1_D2_CHANNEL 2U /*!< Signal channel */
|
||||
|
||||
/* GPIO_SD_B0_05 (coord J2), SD1_D3 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_SD1_D3_PERIPHERAL USDHC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_SD1_D3_SIGNAL usdhc_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_SD1_D3_CHANNEL 3U /*!< Signal channel */
|
||||
|
||||
/* GPIO_SD_B0_01 (coord J3), SD1_CLK/J24[3] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_SD1_CLK_PERIPHERAL USDHC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_SD1_CLK_SIGNAL usdhc_clk /*!< Signal name */
|
||||
|
||||
/* GPIO_SD_B0_00 (coord J4), SD1_CMD/J24[6] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_SD1_CMD_PERIPHERAL USDHC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_SD1_CMD_SIGNAL usdhc_cmd /*!< Signal name */
|
||||
|
||||
/* GPIO_B1_12 (coord D13), SD_CD_SW */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_SD_CD_SW_PERIPHERAL USDHC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_SD_CD_SW_SIGNAL usdhc_cd_b /*!< Signal name */
|
||||
|
||||
/* GPIO_SD_B1_02 (coord M3), FlexSPI_D1_B */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_FlexSPI_D1_B_PERIPHERAL PWM2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_FlexSPI_D1_B_SIGNAL A /*!< Signal name */
|
||||
#define BOARD_INITPINS_FlexSPI_D1_B_CHANNEL 3U /*!< Signal channel */
|
||||
|
||||
/* GPIO_SD_B1_00 (coord L5), FlexSPI_D3_B */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_FlexSPI_D3_B_PERIPHERAL GPIO3 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_FlexSPI_D3_B_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_FlexSPI_D3_B_CHANNEL 0U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_FlexSPI_D3_B_GPIO GPIO3 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_FlexSPI_D3_B_GPIO_PIN 0U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_FlexSPI_D3_B_GPIO_PIN_MASK (1U << 0U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_FlexSPI_D3_B_PORT GPIO3 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_FlexSPI_D3_B_PIN 0U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_FlexSPI_D3_B_PIN_MASK (1U << 0U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_SD_B1_01 (coord M5), FlexSPI_D2_B */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_FlexSPI_D2_B_PERIPHERAL GPIO3 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_FlexSPI_D2_B_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_FlexSPI_D2_B_CHANNEL 1U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_FlexSPI_D2_B_GPIO GPIO3 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_FlexSPI_D2_B_GPIO_PIN 1U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_FlexSPI_D2_B_GPIO_PIN_MASK (1U << 1U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_FlexSPI_D2_B_PORT GPIO3 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_FlexSPI_D2_B_PIN 1U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_FlexSPI_D2_B_PIN_MASK (1U << 1U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_AD_B1_15 (coord J14), SAI1_TX_SYNC/CSI_D2/J35[6]/U13[13] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_D2_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_D2_SIGNAL csi_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_CSI_D2_CHANNEL 2U /*!< Signal channel */
|
||||
|
||||
/* GPIO_AD_B1_14 (coord G12), SAI1_TX_BCLK/CSI_D3/J35[4]/U13[12] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_D3_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_D3_SIGNAL csi_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_CSI_D3_CHANNEL 3U /*!< Signal channel */
|
||||
|
||||
/* GPIO_AD_B1_13 (coord H11), SAI1_TXD/CSI_D4/J35[3]/U13[14] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_D4_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_D4_SIGNAL csi_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_CSI_D4_CHANNEL 4U /*!< Signal channel */
|
||||
|
||||
/* GPIO_AD_B1_12 (coord H12), SAI1_RXD/CSI_D5/J35[5]/U13[16] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_D5_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_D5_SIGNAL csi_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_CSI_D5_CHANNEL 5U /*!< Signal channel */
|
||||
|
||||
/* GPIO_AD_B1_11 (coord J13), BSP_DS18B20 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_D6_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_D6_SIGNAL csi_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_CSI_D6_CHANNEL 6U /*!< Signal channel */
|
||||
|
||||
/* GPIO_AD_B1_10 (coord L13), BSP_RS485_RE */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_D7_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_D7_SIGNAL csi_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_CSI_D7_CHANNEL 7U /*!< Signal channel */
|
||||
|
||||
/* GPIO_AD_B1_09 (coord M13), SAI1_MCLK/CSI_D8/J35[11] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_D8_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_D8_SIGNAL csi_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_CSI_D8_CHANNEL 8U /*!< Signal channel */
|
||||
|
||||
/* GPIO_AD_B1_08 (coord H13), AUD_INT/CSI_D9//J35[13]/J22[4] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_D9_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_D9_SIGNAL csi_data /*!< Signal name */
|
||||
#define BOARD_INITPINS_CSI_D9_CHANNEL 9U /*!< Signal channel */
|
||||
|
||||
/* GPIO_AD_B1_04 (coord L12), CSI_PIXCLK/J35[8]/J23[3] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_PIXCLK_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_PIXCLK_SIGNAL csi_pixclk /*!< Signal name */
|
||||
|
||||
/* GPIO_AD_B1_07 (coord K10), CSI_HSYNC/J35[16]/J22[1]/UART_RX */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_HSYNC_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_HSYNC_SIGNAL csi_hsync /*!< Signal name */
|
||||
|
||||
/* GPIO_AD_B1_06 (coord J12), CSI_VSYNC/J35[18]/J22[2]/UART_TX */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CSI_VSYNC_PERIPHERAL CSI /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CSI_VSYNC_SIGNAL csi_vsync /*!< Signal name */
|
||||
|
||||
/* GPIO_AD_B0_14 (coord H14), CAN2_TX/U12[1] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_CAN2_TX_PERIPHERAL ADC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_CAN2_TX_SIGNAL IN /*!< Signal name */
|
||||
#define BOARD_INITPINS_CAN2_TX_CHANNEL 3U /*!< Signal channel */
|
||||
|
||||
/* GPIO_AD_B1_03 (coord M12), SPDIF_IN/J22[8] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_SPDIF_IN_PERIPHERAL ADC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_SPDIF_IN_SIGNAL IN /*!< Signal name */
|
||||
#define BOARD_INITPINS_SPDIF_IN_CHANNEL 8U /*!< Signal channel */
|
||||
|
||||
/* GPIO_AD_B1_02 (coord L11), SPDIF_OUT/J22[7] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_SPDIF_OUT_PERIPHERAL ADC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_SPDIF_OUT_SIGNAL IN /*!< Signal name */
|
||||
#define BOARD_INITPINS_SPDIF_OUT_CHANNEL 7U /*!< Signal channel */
|
||||
|
||||
/* GPIO_B1_08 (coord A12), ENET_TXD1 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_ENET_TXD1_PERIPHERAL GPIO2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_ENET_TXD1_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_ENET_TXD1_CHANNEL 24U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_ENET_TXD1_GPIO GPIO2 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_TXD1_GPIO_PIN 24U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_ENET_TXD1_GPIO_PIN_MASK (1U << 24U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_ENET_TXD1_PORT GPIO2 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_TXD1_PIN 24U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_ENET_TXD1_PIN_MASK (1U << 24U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_B1_07 (coord B12), ENET_TXD0 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_ENET_TXD0_PERIPHERAL GPIO2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_ENET_TXD0_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_ENET_TXD0_CHANNEL 23U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_ENET_TXD0_GPIO GPIO2 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_TXD0_GPIO_PIN 23U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_ENET_TXD0_GPIO_PIN_MASK (1U << 23U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_ENET_TXD0_PORT GPIO2 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_TXD0_PIN 23U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_ENET_TXD0_PIN_MASK (1U << 23U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_B1_09 (coord A13), ENET_TXEN */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_ENET_TXEN_PERIPHERAL GPIO2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_ENET_TXEN_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_ENET_TXEN_CHANNEL 25U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_ENET_TXEN_GPIO GPIO2 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_TXEN_GPIO_PIN 25U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_ENET_TXEN_GPIO_PIN_MASK (1U << 25U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_ENET_TXEN_PORT GPIO2 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_TXEN_PIN 25U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_ENET_TXEN_PIN_MASK (1U << 25U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_B0_06 (coord A8), LCDIF_D2/BT_CFG[2] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D2_PERIPHERAL PWM2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D2_SIGNAL A /*!< Signal name */
|
||||
#define BOARD_INITPINS_LCDIF_D2_CHANNEL 0U /*!< Signal channel */
|
||||
|
||||
/* GPIO_B0_07 (coord A9), LCDIF_D3/BT_CFG[3] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D3_PERIPHERAL PWM2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D3_SIGNAL B /*!< Signal name */
|
||||
#define BOARD_INITPINS_LCDIF_D3_CHANNEL 0U /*!< Signal channel */
|
||||
|
||||
/* GPIO_B0_08 (coord B9), LCDIF_D4/BT_CFG[4] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D4_PERIPHERAL PWM2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D4_SIGNAL A /*!< Signal name */
|
||||
#define BOARD_INITPINS_LCDIF_D4_CHANNEL 1U /*!< Signal channel */
|
||||
|
||||
/* GPIO_B0_09 (coord C9), LCDIF_D5/BT_CFG[5] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D5_PERIPHERAL PWM2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D5_SIGNAL B /*!< Signal name */
|
||||
#define BOARD_INITPINS_LCDIF_D5_CHANNEL 1U /*!< Signal channel */
|
||||
|
||||
/* GPIO_B0_10 (coord D9), LCDIF_D6/BT_CFG[6] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D6_PERIPHERAL PWM2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D6_SIGNAL A /*!< Signal name */
|
||||
#define BOARD_INITPINS_LCDIF_D6_CHANNEL 2U /*!< Signal channel */
|
||||
|
||||
/* GPIO_B0_12 (coord C10), LCDIF_D8/BT_CFG[8] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D8_PERIPHERAL GPIO2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D8_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_LCDIF_D8_CHANNEL 12U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_LCDIF_D8_GPIO GPIO2 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_LCDIF_D8_GPIO_PIN 12U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_LCDIF_D8_GPIO_PIN_MASK (1U << 12U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_LCDIF_D8_PORT GPIO2 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_LCDIF_D8_PIN 12U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_LCDIF_D8_PIN_MASK (1U << 12U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_B1_10 (coord B13), ENET_TX_CLK */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_ENET_TX_CLK_PERIPHERAL GPIO2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_ENET_TX_CLK_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_ENET_TX_CLK_CHANNEL 26U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_ENET_TX_CLK_GPIO GPIO2 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_TX_CLK_GPIO_PIN 26U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_ENET_TX_CLK_GPIO_PIN_MASK (1U << 26U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_ENET_TX_CLK_PORT GPIO2 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_TX_CLK_PIN 26U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_ENET_TX_CLK_PIN_MASK (1U << 26U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_B0_01 (coord E7), LCDIF_ENABLE */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_ENABLE_PERIPHERAL LPSPI4 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_ENABLE_SIGNAL SDI /*!< Signal name */
|
||||
|
||||
/* GPIO_B0_02 (coord E8), LCDIF_HSYNC */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_HSYNC_PERIPHERAL LPSPI4 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_HSYNC_SIGNAL SDO /*!< Signal name */
|
||||
|
||||
/* GPIO_B0_03 (coord D8), LCDIF_VSYNC */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_VSYNC_PERIPHERAL LPSPI4 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_VSYNC_SIGNAL SCK /*!< Signal name */
|
||||
|
||||
/* GPIO_B0_00 (coord D7), LCDIF_CLK */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_CLK_PERIPHERAL LPSPI4 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_CLK_SIGNAL PCS0 /*!< Signal name */
|
||||
|
||||
/* GPIO_B1_03 (coord D11), LCDIF_D15 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D15_PERIPHERAL LPSPI4 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D15_SIGNAL PCS1 /*!< Signal name */
|
||||
|
||||
/* GPIO_B1_02 (coord C11), LCDIF_D14 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D14_PERIPHERAL LPSPI4 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D14_SIGNAL PCS2 /*!< Signal name */
|
||||
|
||||
/* GPIO_B1_11 (coord C13), ENET_RXER */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_ENET_RXER_PERIPHERAL GPIO2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_ENET_RXER_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_ENET_RXER_CHANNEL 27U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_ENET_RXER_GPIO GPIO2 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_RXER_GPIO_PIN 27U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_ENET_RXER_GPIO_PIN_MASK (1U << 27U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_ENET_RXER_PORT GPIO2 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_RXER_PIN 27U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_ENET_RXER_PIN_MASK (1U << 27U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_B1_06 (coord C12), ENET_CRS_DV */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_ENET_CRS_DV_PERIPHERAL GPIO2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_ENET_CRS_DV_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_ENET_CRS_DV_CHANNEL 22U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_ENET_CRS_DV_GPIO GPIO2 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_CRS_DV_GPIO_PIN 22U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_ENET_CRS_DV_GPIO_PIN_MASK (1U << 22U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_ENET_CRS_DV_PORT GPIO2 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_CRS_DV_PIN 22U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_ENET_CRS_DV_PIN_MASK (1U << 22U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_B1_04 (coord E12), ENET_RXD0 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_ENET_RXD0_PERIPHERAL GPIO2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_ENET_RXD0_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_ENET_RXD0_CHANNEL 20U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_ENET_RXD0_GPIO GPIO2 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_RXD0_GPIO_PIN 20U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_ENET_RXD0_GPIO_PIN_MASK (1U << 20U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_ENET_RXD0_PORT GPIO2 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_RXD0_PIN 20U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_ENET_RXD0_PIN_MASK (1U << 20U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_B1_05 (coord D12), ENET_RXD1 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_ENET_RXD1_PERIPHERAL GPIO2 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_ENET_RXD1_SIGNAL gpio_io /*!< Signal name */
|
||||
#define BOARD_INITPINS_ENET_RXD1_CHANNEL 21U /*!< Signal channel */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define BOARD_INITPINS_ENET_RXD1_GPIO GPIO2 /*!< GPIO peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_RXD1_GPIO_PIN 21U /*!< GPIO pin number */
|
||||
#define BOARD_INITPINS_ENET_RXD1_GPIO_PIN_MASK (1U << 21U) /*!< GPIO pin mask */
|
||||
#define BOARD_INITPINS_ENET_RXD1_PORT GPIO2 /*!< PORT peripheral base pointer */
|
||||
#define BOARD_INITPINS_ENET_RXD1_PIN 21U /*!< PORT pin number */
|
||||
#define BOARD_INITPINS_ENET_RXD1_PIN_MASK (1U << 21U) /*!< PORT pin mask */
|
||||
|
||||
/* GPIO_B0_13 (coord D10), LCDIF_D9/BT_CFG[9] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D9_PERIPHERAL ENC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D9_SIGNAL PHASE /*!< Signal name */
|
||||
#define BOARD_INITPINS_LCDIF_D9_CHANNEL A /*!< Signal channel */
|
||||
|
||||
/* GPIO_B0_14 (coord E10), LCDIF_D10/BT_CFG[10] */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D10_PERIPHERAL ENC1 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D10_SIGNAL PHASE /*!< Signal name */
|
||||
#define BOARD_INITPINS_LCDIF_D10_CHANNEL B /*!< Signal channel */
|
||||
|
||||
/* GPIO_B1_00 (coord A11), LCDIF_D12 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D12_PERIPHERAL LPUART4 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D12_SIGNAL TX /*!< Signal name */
|
||||
|
||||
/* GPIO_B1_01 (coord B11), LCDIF_D13 */
|
||||
/* Routed pin properties */
|
||||
#define BOARD_INITPINS_LCDIF_D13_PERIPHERAL LPUART4 /*!< Peripheral name */
|
||||
#define BOARD_INITPINS_LCDIF_D13_SIGNAL RX /*!< Signal name */
|
||||
|
||||
|
||||
/*!
|
||||
* @brief Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitPins(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @}
|
||||
*/
|
||||
#endif /* _PIN_MUX_H_ */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* EOF
|
||||
**********************************************************************************************************************/
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add the general drivers.
|
||||
src = Split("""
|
||||
board.c
|
||||
MCUX_Config/clock_config.c
|
||||
MCUX_Config/pin_mux.c
|
||||
""")
|
||||
|
||||
CPPPATH = [cwd,cwd + '/MCUX_Config',cwd + '/ports']
|
||||
CPPDEFINES = ['CPU_MIMXRT1052CVL5B', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1','XIP_EXTERNAL_FLASH=1','XIP_BOOT_HEADER_ENABLE=1']
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
|
|
@ -1,138 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-01-05 Bernard first implementation
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include "board.h"
|
||||
#include "pin_mux.h"
|
||||
|
||||
#ifdef BSP_USING_DMA
|
||||
#include "fsl_dmamux.h"
|
||||
#include "fsl_edma.h"
|
||||
#endif
|
||||
|
||||
#define NVIC_PRIORITYGROUP_0 0x00000007U /*!< 0 bits for pre-emption priority
|
||||
4 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_1 0x00000006U /*!< 1 bits for pre-emption priority
|
||||
3 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_2 0x00000005U /*!< 2 bits for pre-emption priority
|
||||
2 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_3 0x00000004U /*!< 3 bits for pre-emption priority
|
||||
1 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_4 0x00000003U /*!< 4 bits for pre-emption priority
|
||||
0 bits for subpriority */
|
||||
|
||||
/* MPU configuration. */
|
||||
static void BOARD_ConfigMPU(void)
|
||||
{
|
||||
/* Disable I cache and D cache */
|
||||
SCB_DisableICache();
|
||||
SCB_DisableDCache();
|
||||
|
||||
/* Disable MPU */
|
||||
ARM_MPU_Disable();
|
||||
|
||||
/* Region 0 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(0, 0xC0000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
|
||||
|
||||
/* Region 1 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
|
||||
|
||||
/* Region 2 setting */
|
||||
// spi flash: normal type, cacheable, no bufferable, no shareable
|
||||
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 0, 0, ARM_MPU_REGION_SIZE_512MB);
|
||||
|
||||
/* Region 3 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(3, 0x00000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
|
||||
|
||||
/* Region 4 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
|
||||
|
||||
/* Region 5 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(5, 0x20000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
|
||||
|
||||
/* Region 6 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(6, 0x20200000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_256KB);
|
||||
|
||||
#if defined(BSP_USING_SDRAM)
|
||||
/* Region 7 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);
|
||||
|
||||
/* Region 8 setting */
|
||||
MPU->RBAR = ARM_MPU_RBAR(8, 0x81E00000U);
|
||||
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 1, 0, 0, 0, ARM_MPU_REGION_SIZE_2MB);
|
||||
#endif
|
||||
|
||||
/* Enable MPU */
|
||||
ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
|
||||
|
||||
/* Enable I cache and D cache */
|
||||
SCB_EnableDCache();
|
||||
SCB_EnableICache();
|
||||
}
|
||||
|
||||
|
||||
/* This is the timer interrupt service routine. */
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
#ifdef BSP_USING_DMA
|
||||
void imxrt_dma_init(void)
|
||||
{
|
||||
edma_config_t config;
|
||||
|
||||
DMAMUX_Init(DMAMUX);
|
||||
EDMA_GetDefaultConfig(&config);
|
||||
EDMA_Init(DMA0, &config);
|
||||
}
|
||||
#endif
|
||||
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
BOARD_ConfigMPU();
|
||||
BOARD_InitPins();
|
||||
BOARD_BootClockRUN();
|
||||
|
||||
NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
||||
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
|
||||
#ifdef BSP_USING_DMA
|
||||
imxrt_dma_init();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -1,44 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-09-22 Bernard add board.h to this bsp
|
||||
*/
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include "fsl_common.h"
|
||||
#include "clock_config.h"
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RTT_HEAP$$ZI$$Base;
|
||||
extern int Image$$RTT_HEAP$$ZI$$Limit;
|
||||
#define HEAP_BEGIN (&Image$$RTT_HEAP$$ZI$$Base)
|
||||
#define HEAP_END (&Image$$RTT_HEAP$$ZI$$Limit)
|
||||
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#define HEAP_BEGIN (__segment_end("HEAP"))
|
||||
extern void __RTT_HEAP_END;
|
||||
#define HEAP_END (&__RTT_HEAP_END)
|
||||
|
||||
#else
|
||||
extern int heap_start;
|
||||
extern int heap_end;
|
||||
#define HEAP_BEGIN (&heap_start)
|
||||
#define HEAP_END (&heap_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_SIZE ((uint32_t)HEAP_END - (uint32_t)HEAP_BEGIN)
|
||||
|
||||
#define BOARD_FLASH_SIZE (0x400000U)
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -1,95 +0,0 @@
|
|||
/*
|
||||
** ###################################################################
|
||||
** Processors: MIMXRT1052CVJ5B
|
||||
** MIMXRT1052CVL5B
|
||||
** MIMXRT1052DVJ6B
|
||||
** MIMXRT1052DVL6B
|
||||
**
|
||||
** Compiler: IAR ANSI C/C++ Compiler for ARM
|
||||
** Reference manual: IMXRT1050RM Rev.1, 03/2018
|
||||
** Version: rev. 1.0, 2018-09-21
|
||||
** Build: b180921
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the IAR ANSI C/C++ Compiler for ARM
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2018 NXP
|
||||
** All rights reserved.
|
||||
**
|
||||
** SPDX-License-Identifier: BSD-3-Clause
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
define symbol m_interrupts_start = 0x60002000;
|
||||
define symbol m_interrupts_end = 0x600023FF;
|
||||
|
||||
define symbol m_text_start = 0x60002400;
|
||||
define symbol m_text_end = 0x63FFFFFF;
|
||||
|
||||
define symbol m_data_start = 0x20000000;
|
||||
define symbol m_data_end = 0x2001FFFF;
|
||||
|
||||
define symbol m_data2_start = 0x20200000;
|
||||
define symbol m_data2_end = 0x2023FFFF;
|
||||
|
||||
define exported symbol m_boot_hdr_conf_start = 0x60000000;
|
||||
define symbol m_boot_hdr_ivt_start = 0x60001000;
|
||||
define symbol m_boot_hdr_boot_data_start = 0x60001020;
|
||||
define symbol m_boot_hdr_dcd_data_start = 0x60001030;
|
||||
|
||||
/* Sizes */
|
||||
if (isdefinedsymbol(__stack_size__)) {
|
||||
define symbol __size_cstack__ = __stack_size__;
|
||||
} else {
|
||||
define symbol __size_cstack__ = 0x0400;
|
||||
}
|
||||
|
||||
if (isdefinedsymbol(__heap_size__)) {
|
||||
define symbol __size_heap__ = __heap_size__;
|
||||
} else {
|
||||
define symbol __size_heap__ = 0x0400;
|
||||
}
|
||||
|
||||
define exported symbol __VECTOR_TABLE = m_interrupts_start;
|
||||
define exported symbol __VECTOR_RAM = m_interrupts_start;
|
||||
define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0;
|
||||
define exported symbol __RTT_HEAP_END = m_data2_end;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
|
||||
| mem:[from m_text_start to m_text_end];
|
||||
|
||||
define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
|
||||
define region DATA2_region = mem:[from m_data2_start to m_data2_end];
|
||||
define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
||||
define block RW { readwrite };
|
||||
define block ZI { zi };
|
||||
define block NCACHE_VAR { section NonCacheable , section NonCacheable.init };
|
||||
|
||||
initialize by copy { readwrite, section .textrw };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem: m_interrupts_start { readonly section .intvec };
|
||||
|
||||
place at address mem:m_boot_hdr_conf_start { section .boot_hdr.conf };
|
||||
place at address mem:m_boot_hdr_ivt_start { section .boot_hdr.ivt };
|
||||
place at address mem:m_boot_hdr_boot_data_start { readonly section .boot_hdr.boot_data };
|
||||
place at address mem:m_boot_hdr_dcd_data_start { readonly section .boot_hdr.dcd_data };
|
||||
|
||||
keep{ section .boot_hdr.conf, section .boot_hdr.ivt, section .boot_hdr.boot_data, section .boot_hdr.dcd_data };
|
||||
|
||||
place in TEXT_region { readonly };
|
||||
place in DATA_region { block RW };
|
||||
place in DATA_region { block ZI };
|
||||
place in DATA_region { last block HEAP };
|
||||
place in DATA_region { block NCACHE_VAR };
|
||||
place in CSTACK_region { block CSTACK };
|
||||
|
||||
|
|
@ -1,298 +0,0 @@
|
|||
/*
|
||||
** ###################################################################
|
||||
** Processors: MIMXRT1052CVJ5B
|
||||
** MIMXRT1052CVL5B
|
||||
** MIMXRT1052DVJ6B
|
||||
** MIMXRT1052DVL6B
|
||||
**
|
||||
** Compiler: GNU C Compiler
|
||||
** Reference manual: IMXRT1050RM Rev.1, 03/2018
|
||||
** Version: rev. 0.1, 2017-01-10
|
||||
** Build: b180509
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the GNU C Compiler
|
||||
**
|
||||
** The Clear BSD License
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2018 NXP
|
||||
** All rights reserved.
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without
|
||||
** modification, are permitted (subject to the limitations in the
|
||||
** disclaimer below) provided that the following conditions are met:
|
||||
**
|
||||
** * Redistributions of source code must retain the above copyright
|
||||
** notice, this list of conditions and the following disclaimer.
|
||||
**
|
||||
** * Redistributions in binary form must reproduce the above copyright
|
||||
** notice, this list of conditions and the following disclaimer in the
|
||||
** documentation and/or other materials provided with the distribution.
|
||||
**
|
||||
** * Neither the name of the copyright holder nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from
|
||||
** this software without specific prior written permission.
|
||||
**
|
||||
** NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
|
||||
** GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
|
||||
** HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
** WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
** MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
|
||||
** BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
** WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
|
||||
** OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
|
||||
** IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
|
||||
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
m_flash_config (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000
|
||||
m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000
|
||||
m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400
|
||||
m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x03FFDC00
|
||||
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
|
||||
m_data2 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
.flash_config :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__FLASH_BASE = .;
|
||||
KEEP(* (.boot_hdr.conf)) /* flash config section */
|
||||
. = ALIGN(4);
|
||||
} > m_flash_config
|
||||
|
||||
ivt_begin= ORIGIN(m_flash_config) + LENGTH(m_flash_config);
|
||||
|
||||
.ivt : AT(ivt_begin)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(* (.boot_hdr.ivt)) /* ivt section */
|
||||
KEEP(* (.boot_hdr.boot_data)) /* boot section */
|
||||
KEEP(* (.boot_hdr.dcd_data)) /* dcd section */
|
||||
. = ALIGN(4);
|
||||
} > m_ivt
|
||||
|
||||
/* The startup code goes first into internal RAM */
|
||||
.interrupts :
|
||||
{
|
||||
__VECTOR_TABLE = .;
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} > m_interrupts
|
||||
|
||||
__VECTOR_RAM = __VECTOR_TABLE;
|
||||
__RAM_VECTOR_TABLE_SIZE_BYTES = 0x0;
|
||||
|
||||
/* The program code and other data goes into internal RAM */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
. = ALIGN(4);
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
} > m_text
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > m_text
|
||||
|
||||
.ARM :
|
||||
{
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} > m_text
|
||||
|
||||
.ctors :
|
||||
{
|
||||
__CTOR_LIST__ = .;
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*crtbegin?.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
from the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
__CTOR_END__ = .;
|
||||
} > m_text
|
||||
|
||||
.dtors :
|
||||
{
|
||||
__DTOR_LIST__ = .;
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*crtbegin?.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
__DTOR_END__ = .;
|
||||
} > m_text
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} > m_text
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} > m_text
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} > m_text
|
||||
|
||||
__etext = .; /* define a global symbol at end of code */
|
||||
__DATA_ROM = .; /* Symbol is used by startup for data initialization */
|
||||
|
||||
.data : AT(__DATA_ROM)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__DATA_RAM = .;
|
||||
__data_start__ = .; /* create a global symbol at data start */
|
||||
*(m_usb_dma_init_data)
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
__data_end__ = .; /* define a global symbol at data end */
|
||||
} > m_data
|
||||
|
||||
__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
|
||||
.ncache.init : AT(__NDATA_ROM)
|
||||
{
|
||||
__noncachedata_start__ = .; /* create a global symbol at ncache data start */
|
||||
*(NonCacheable.init)
|
||||
. = ALIGN(4);
|
||||
__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
|
||||
} > m_data
|
||||
. = __noncachedata_init_end__;
|
||||
.ncache :
|
||||
{
|
||||
*(NonCacheable)
|
||||
. = ALIGN(4);
|
||||
__noncachedata_end__ = .; /* define a global symbol at ncache data end */
|
||||
} > m_data
|
||||
|
||||
__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
|
||||
text_end = ORIGIN(m_text) + LENGTH(m_text);
|
||||
ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
|
||||
|
||||
/* Uninitialized data section */
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
. = ALIGN(4);
|
||||
__START_BSS = .;
|
||||
__bss_start__ = .;
|
||||
*(m_usb_dma_noninit_data)
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
__END_BSS = .;
|
||||
} > m_data
|
||||
|
||||
.heap :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__end__ = .;
|
||||
PROVIDE(end = .);
|
||||
__HeapBase = .;
|
||||
. += HEAP_SIZE;
|
||||
__HeapLimit = .;
|
||||
__heap_limit = .; /* Add for _sbrk */
|
||||
} > m_data
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
stack_start = .;
|
||||
. += STACK_SIZE;
|
||||
stack_end = .;
|
||||
__StackTop = .;
|
||||
} > m_data
|
||||
|
||||
.RTT_HEAP :
|
||||
{
|
||||
heap_start = .;
|
||||
. = ALIGN(8);
|
||||
} > m_data
|
||||
|
||||
PROVIDE(heap_end = ORIGIN(m_data) + LENGTH(m_data));
|
||||
|
||||
/* Initializes stack on the end of block */
|
||||
__StackLimit = __StackTop - STACK_SIZE;
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
|
||||
}
|
||||
|
||||
|
|
@ -1,92 +0,0 @@
|
|||
#! armcc -E
|
||||
/*
|
||||
** ###################################################################
|
||||
** Processors: MIMXRT1052CVJ5B
|
||||
** MIMXRT1052CVL5B
|
||||
** MIMXRT1052DVJ6B
|
||||
** MIMXRT1052DVL6B
|
||||
**
|
||||
** Compiler: Keil ARM C/C++ Compiler
|
||||
** Reference manual: IMXRT1050RM Rev.1, 03/2018
|
||||
** Version: rev. 1.0, 2018-09-21
|
||||
** Build: b180921
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the Keil ARM C/C++ Compiler
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2018 NXP
|
||||
** All rights reserved.
|
||||
**
|
||||
** SPDX-License-Identifier: BSD-3-Clause
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
#define m_flash_config_start 0x60000000
|
||||
#define m_flash_config_size 0x00001000
|
||||
|
||||
#define m_ivt_start 0x60001000
|
||||
#define m_ivt_size 0x00001000
|
||||
|
||||
#define m_interrupts_start 0x60002000
|
||||
#define m_interrupts_size 0x00000400
|
||||
|
||||
#define m_text_start 0x60002400
|
||||
#define m_text_size 0x1fffdbff
|
||||
|
||||
#define m_data_start 0x20000000
|
||||
#define m_data_size 0x00020000
|
||||
|
||||
#define m_data2_start 0x20200000
|
||||
#define m_data2_size 0x00040000
|
||||
|
||||
/* Sizes */
|
||||
#if (defined(__stack_size__))
|
||||
#define Stack_Size __stack_size__
|
||||
#else
|
||||
#define Stack_Size 0x0400
|
||||
#endif
|
||||
|
||||
#if (defined(__heap_size__))
|
||||
#define Heap_Size __heap_size__
|
||||
#else
|
||||
#define Heap_Size 0x0400
|
||||
#endif
|
||||
|
||||
#define RTT_HEAP_SIZE (m_data_size-ImageLength(RW_m_data)-ImageLength(ARM_LIB_HEAP)-ImageLength(ARM_LIB_STACK))
|
||||
|
||||
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
|
||||
LR_m_text m_flash_config_start m_text_start+m_text_size-m_flash_config_start { ; load region size_region
|
||||
RW_m_config_text m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
|
||||
* (.boot_hdr.conf, +FIRST)
|
||||
}
|
||||
|
||||
RW_m_ivt_text m_ivt_start FIXED m_ivt_size { ; load address = execution address
|
||||
* (.boot_hdr.ivt, +FIRST)
|
||||
* (.boot_hdr.boot_data)
|
||||
* (.boot_hdr.dcd_data)
|
||||
}
|
||||
#else
|
||||
LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region
|
||||
#endif
|
||||
VECTOR_ROM m_interrupts_start FIXED m_interrupts_size { ; load address = execution address
|
||||
* (RESET,+FIRST)
|
||||
}
|
||||
ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
|
||||
* (InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
* (NonCacheable.init)
|
||||
* (NonCacheable)
|
||||
}
|
||||
ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
|
||||
}
|
||||
ARM_LIB_STACK +0 EMPTY Stack_Size{} ; Stack region growing down
|
||||
RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
|
||||
}
|
||||
Binary file not shown.
|
Before Width: | Height: | Size: 150 KiB |
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,10 +0,0 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\project.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
|
|
@ -1,930 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rtthread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>8</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>3</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile>.\flexspi_nor.ini</tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST1 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_QuadSPI_4KB_SEC -FS060000000 -FL0800000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"Fire CMSIS-DAP" -UFS-00007888 -O974 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FCF000 -FN1 -FF0iMXRT1052_W25Q256JV_CFG_By_Fire -FS060000000 -FL02000000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_HYPER_256KB_SEC -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\MIMXRT105x_HYPER_256KB_SEC.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Kernel</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\clock.c</PathWithFileName>
|
||||
<FilenameWithoutPath>clock.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\components.c</PathWithFileName>
|
||||
<FilenameWithoutPath>components.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\cpu.c</PathWithFileName>
|
||||
<FilenameWithoutPath>cpu.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\device.c</PathWithFileName>
|
||||
<FilenameWithoutPath>device.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>5</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\idle.c</PathWithFileName>
|
||||
<FilenameWithoutPath>idle.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>6</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\ipc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>ipc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>7</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\irq.c</PathWithFileName>
|
||||
<FilenameWithoutPath>irq.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>8</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\kservice.c</PathWithFileName>
|
||||
<FilenameWithoutPath>kservice.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>9</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\memheap.c</PathWithFileName>
|
||||
<FilenameWithoutPath>memheap.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>10</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\mempool.c</PathWithFileName>
|
||||
<FilenameWithoutPath>mempool.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>11</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\object.c</PathWithFileName>
|
||||
<FilenameWithoutPath>object.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>12</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\scheduler.c</PathWithFileName>
|
||||
<FilenameWithoutPath>scheduler.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>13</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\signal.c</PathWithFileName>
|
||||
<FilenameWithoutPath>signal.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>14</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\thread.c</PathWithFileName>
|
||||
<FilenameWithoutPath>thread.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>15</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\src\timer.c</PathWithFileName>
|
||||
<FilenameWithoutPath>timer.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Applications</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>16</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>applications\main.c</PathWithFileName>
|
||||
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Drivers</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>17</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>board\board.c</PathWithFileName>
|
||||
<FilenameWithoutPath>board.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>18</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>board\MCUX_Config\clock_config.c</PathWithFileName>
|
||||
<FilenameWithoutPath>clock_config.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>19</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>board\MCUX_Config\pin_mux.c</PathWithFileName>
|
||||
<FilenameWithoutPath>pin_mux.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>20</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\drivers\drv_gpio.c</PathWithFileName>
|
||||
<FilenameWithoutPath>drv_gpio.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>21</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\drivers\drv_uart.c</PathWithFileName>
|
||||
<FilenameWithoutPath>drv_uart.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>22</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\libcpu\arm\common\backtrace.c</PathWithFileName>
|
||||
<FilenameWithoutPath>backtrace.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>23</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\libcpu\arm\common\div0.c</PathWithFileName>
|
||||
<FilenameWithoutPath>div0.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>24</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\libcpu\arm\common\showmem.c</PathWithFileName>
|
||||
<FilenameWithoutPath>showmem.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>25</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\libcpu\arm\cortex-m7\cpuport.c</PathWithFileName>
|
||||
<FilenameWithoutPath>cpuport.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>26</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\libcpu\arm\cortex-m7\context_rvds.S</PathWithFileName>
|
||||
<FilenameWithoutPath>context_rvds.S</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>DeviceDrivers</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>27</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\drivers\cputime\cputime.c</PathWithFileName>
|
||||
<FilenameWithoutPath>cputime.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>28</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\drivers\misc\pin.c</PathWithFileName>
|
||||
<FilenameWithoutPath>pin.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>29</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\drivers\serial\serial.c</PathWithFileName>
|
||||
<FilenameWithoutPath>serial.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>30</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\drivers\src\completion.c</PathWithFileName>
|
||||
<FilenameWithoutPath>completion.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>31</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\drivers\src\dataqueue.c</PathWithFileName>
|
||||
<FilenameWithoutPath>dataqueue.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>32</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\drivers\src\pipe.c</PathWithFileName>
|
||||
<FilenameWithoutPath>pipe.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>33</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\drivers\src\ringblk_buf.c</PathWithFileName>
|
||||
<FilenameWithoutPath>ringblk_buf.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>34</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\drivers\src\ringbuffer.c</PathWithFileName>
|
||||
<FilenameWithoutPath>ringbuffer.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>35</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\drivers\src\waitqueue.c</PathWithFileName>
|
||||
<FilenameWithoutPath>waitqueue.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>36</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\drivers\src\workqueue.c</PathWithFileName>
|
||||
<FilenameWithoutPath>workqueue.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>finsh</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>6</GroupNumber>
|
||||
<FileNumber>37</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\finsh\shell.c</PathWithFileName>
|
||||
<FilenameWithoutPath>shell.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>6</GroupNumber>
|
||||
<FileNumber>38</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\finsh\symbol.c</PathWithFileName>
|
||||
<FilenameWithoutPath>symbol.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>6</GroupNumber>
|
||||
<FileNumber>39</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\finsh\cmd.c</PathWithFileName>
|
||||
<FilenameWithoutPath>cmd.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>6</GroupNumber>
|
||||
<FileNumber>40</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\finsh\msh.c</PathWithFileName>
|
||||
<FilenameWithoutPath>msh.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>6</GroupNumber>
|
||||
<FileNumber>41</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\finsh\msh_cmd.c</PathWithFileName>
|
||||
<FilenameWithoutPath>msh_cmd.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>6</GroupNumber>
|
||||
<FileNumber>42</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\finsh\msh_file.c</PathWithFileName>
|
||||
<FilenameWithoutPath>msh_file.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>libc</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>7</GroupNumber>
|
||||
<FileNumber>43</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\libc\compilers\armlibc\libc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>libc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>7</GroupNumber>
|
||||
<FileNumber>44</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\libc\compilers\armlibc\mem_std.c</PathWithFileName>
|
||||
<FilenameWithoutPath>mem_std.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>7</GroupNumber>
|
||||
<FileNumber>45</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\libc\compilers\armlibc\stubs.c</PathWithFileName>
|
||||
<FilenameWithoutPath>stubs.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>7</GroupNumber>
|
||||
<FileNumber>46</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\libc\compilers\armlibc\time.c</PathWithFileName>
|
||||
<FilenameWithoutPath>time.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>7</GroupNumber>
|
||||
<FileNumber>47</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\components\libc\compilers\common\gmtime_r.c</PathWithFileName>
|
||||
<FilenameWithoutPath>gmtime_r.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Libraries</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>48</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\MIMXRT1050\MIMXRT1052\system_MIMXRT1052.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_MIMXRT1052.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>49</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_common.c</PathWithFileName>
|
||||
<FilenameWithoutPath>fsl_common.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>50</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_clock.c</PathWithFileName>
|
||||
<FilenameWithoutPath>fsl_clock.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>51</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_cache.c</PathWithFileName>
|
||||
<FilenameWithoutPath>fsl_cache.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>52</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\MIMXRT1050\MIMXRT1052\arm\startup_MIMXRT1052.s</PathWithFileName>
|
||||
<FilenameWithoutPath>startup_MIMXRT1052.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>53</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_gpio.c</PathWithFileName>
|
||||
<FilenameWithoutPath>fsl_gpio.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>54</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_lpuart.c</PathWithFileName>
|
||||
<FilenameWithoutPath>fsl_lpuart.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>55</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_dmamux.c</PathWithFileName>
|
||||
<FilenameWithoutPath>fsl_dmamux.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>56</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_edma.c</PathWithFileName>
|
||||
<FilenameWithoutPath>fsl_edma.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>57</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_lpuart_edma.c</PathWithFileName>
|
||||
<FilenameWithoutPath>fsl_lpuart_edma.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
|
|
@ -1,724 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>rtthread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>MIMXRT1052:M7</Device>
|
||||
<Vendor>NXP</Vendor>
|
||||
<PackID>NXP.iMXRT_DFP.1.0.3</PackID>
|
||||
<PackURL>http://mcuxpresso.nxp.com/cmsis_pack/repo/</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x00060000) IRAM2(0x00000000,0x00020000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0RT1050 -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\RT1050.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:MIMXRT1052$Device\Include\MIMXRT1052.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:MIMXRT1052$SVD\MIMXRT1052.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
|
||||
<OutputName>rtthread</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM7</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4099</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\CMSIS_AGDI.dll</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M7"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>0</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>1</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>0</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>0</RoSelD>
|
||||
<RwSelD>4</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>0</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x60000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x60000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>3</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls>--library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186</MiscControls>
|
||||
<Define>SKIP_SYSCLK_INIT, XIP_EXTERNAL_FLASH, CPU_MIMXRT1052CVL5B, FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL, EVK_MCIMXRM, RT_USING_ARM_LIBC</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>.;..\..\..\include;applications;board;board\MCUX_Config;board\ports;..\Libraries\drivers;..\Libraries\drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m7;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;..\Libraries\MIMXRT1050\CMSIS\Include;..\Libraries\MIMXRT1050\MIMXRT1052;..\Libraries\MIMXRT1050\MIMXRT1052\drivers</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x10000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Kernel</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>clock.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\clock.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>components.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\components.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>cpu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\cpu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>device.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\device.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>idle.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\idle.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>ipc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\ipc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>irq.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\irq.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>kservice.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\kservice.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>memheap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\memheap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mempool.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\mempool.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>object.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\object.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>scheduler.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\scheduler.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>signal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\signal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>thread.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\thread.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>timer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\timer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Applications</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>applications\main.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>board.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\board.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>clock_config.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\MCUX_Config\clock_config.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>pin_mux.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\MCUX_Config\pin_mux.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>drv_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\drivers\drv_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>drv_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\drivers\drv_uart.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>backtrace.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>div0.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>showmem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>cpuport.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\cortex-m7\cpuport.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>context_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\cortex-m7\context_rvds.S</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>DeviceDrivers</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cputime.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\drivers\cputime\cputime.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>pin.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>serial.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>completion.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\drivers\src\completion.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>dataqueue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>pipe.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\drivers\src\pipe.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>ringblk_buf.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>ringbuffer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>waitqueue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>workqueue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>finsh</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>shell.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>symbol.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\symbol.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>cmd.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>msh.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>msh_cmd.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\msh_cmd.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>msh_file.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\msh_file.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>libc</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>libc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\libc\compilers\armlibc\libc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mem_std.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\libc\compilers\armlibc\mem_std.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stubs.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\libc\compilers\armlibc\stubs.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>time.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\libc\compilers\armlibc\time.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>gmtime_r.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\libc\compilers\common\gmtime_r.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Libraries</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>system_MIMXRT1052.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\MIMXRT1050\MIMXRT1052\system_MIMXRT1052.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_common.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_common.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_clock.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_clock.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_cache.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_cache.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>startup_MIMXRT1052.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\Libraries\MIMXRT1050\MIMXRT1052\arm\startup_MIMXRT1052.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_lpuart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_lpuart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_dmamux.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_dmamux.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_edma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_edma.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_lpuart_edma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Libraries\MIMXRT1050\MIMXRT1052\drivers\fsl_lpuart_edma.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.1.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="RT-Thread IMXRT1052"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
|
|
@ -1,184 +0,0 @@
|
|||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
#define RT_DEBUG
|
||||
#define RT_DEBUG_COLOR
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_USING_MEMHEAP_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x40003
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 2
|
||||
#define DFS_FD_MAX 16
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_CPUTIME
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_PULSE_ENCODER
|
||||
|
||||
/* Using USB */
|
||||
|
||||
#define RT_USING_USB_HOST
|
||||
#define RT_USBH_MSTORAGE
|
||||
#define UDISK_MOUNTPOINT "/"
|
||||
#define RT_USBD_THREAD_STACK_SZ 4096
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
#define RT_USING_POSIX
|
||||
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
||||
|
||||
/* Network interface device */
|
||||
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
|
||||
/* AT commands */
|
||||
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_IMXRT1052CVL5B
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_LPUART
|
||||
#define BSP_USING_LPUART1
|
||||
#define BSP_USING_PULSE_ENCODER
|
||||
#define BSP_USING_PULSE_ENCODER1
|
||||
#define BSP_USING_USB
|
||||
#define BSP_USING_USB0
|
||||
#define BSP_USB0_HOST
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
|
||||
/* Board extended module Drivers */
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -1,160 +0,0 @@
|
|||
import os
|
||||
import sys
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m7'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = r'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
#BUILD = 'release'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
STRIP = PREFIX + 'strip'
|
||||
|
||||
DEVICE = ' -mcpu=' + CPU + ' -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Wall -D__FPU_PRESENT -eentry'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb -D__START=entry'
|
||||
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -gdwarf-2'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
CFLAGS += ' -O0'
|
||||
else:
|
||||
CFLAGS += ' -O2 -Os'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary --remove-section=.boot_data --remove-section=.image_vertor_table --remove-section=.ncache $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
# module setting
|
||||
CXXFLAGS = ' -Woverloaded-virtual -fno-exceptions -fno-rtti '
|
||||
M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC '
|
||||
M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC'
|
||||
M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' +\
|
||||
' -shared -fPIC -nostartfiles -static-libgcc'
|
||||
M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu ' + CPU + '.fp.sp'
|
||||
CFLAGS = DEVICE + ' --apcs=interwork'
|
||||
AFLAGS = DEVICE
|
||||
LFLAGS = DEVICE + ' --libpath "' + EXEC_PATH + '\ARM\ARMCC\lib" --info sizes --info totals --info unused --info veneers --list rtthread.map --scatter "board\linker_scripts\link.sct"'
|
||||
|
||||
CFLAGS += ' --diag_suppress=66,1296,186,6134'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
|
||||
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
|
||||
|
||||
EXEC_PATH += '/arm/bin40/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' --c99'
|
||||
|
||||
POST_ACTION = 'fromelf -z $TARGET'
|
||||
# POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = ' -D__FPU_PRESENT'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=' + CPU
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=None'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' -Ol'
|
||||
CFLAGS += ' --use_c++_inline'
|
||||
|
||||
AFLAGS = ''
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu ' + CPU
|
||||
AFLAGS += ' --fpu None'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --redirect _Printf=_PrintfTiny'
|
||||
LFLAGS += ' --redirect _Scanf=_ScanfSmall'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,10 +0,0 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\template.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
|
|
@ -1,182 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rtthread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>8</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>3</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile>.\flexspi_nor.ini</tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST1 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_QuadSPI_4KB_SEC -FS060000000 -FL0800000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"Fire CMSIS-DAP" -UFS-00007888 -O974 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FCF000 -FN1 -FF0iMXRT1052_W25Q256JV_CFG_By_Fire -FS060000000 -FL02000000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_HYPER_256KB_SEC -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\MIMXRT105x_HYPER_256KB_SEC.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
|
|
@ -1,397 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>rtthread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>MIMXRT1052:M7</Device>
|
||||
<Vendor>NXP</Vendor>
|
||||
<PackID>NXP.iMXRT_DFP.1.0.3</PackID>
|
||||
<PackURL>http://mcuxpresso.nxp.com/cmsis_pack/repo/</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x00060000) IRAM2(0x00000000,0x00020000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0RT1050 -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\RT1050.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:MIMXRT1052$Device\Include\MIMXRT1052.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:MIMXRT1052$SVD\MIMXRT1052.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
|
||||
<OutputName>rtthread</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM7</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4099</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\CMSIS_AGDI.dll</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M7"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>0</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>1</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>0</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>0</RoSelD>
|
||||
<RwSelD>4</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>0</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x60000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x60000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>3</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls>--library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186</MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x10000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.1.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="RT-Thread IMXRT1052"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
if rtconfig.CROSS_TOOL == 'keil':
|
||||
LINKFLAGS = '--keep=*(.boot_hdr.ivt)'
|
||||
LINKFLAGS += '--keep=*(.boot_hdr.boot_data)'
|
||||
LINKFLAGS += '--keep=*(.boot_hdr.dcd_data)'
|
||||
LINKFLAGS += '--keep=*(.boot_hdr.conf)'
|
||||
else:
|
||||
LINKFLAGS = ''
|
||||
|
||||
group = DefineGroup('xip', src, depend = [''], CPPPATH = CPPPATH, LINKFLAGS = LINKFLAGS)
|
||||
Return('group')
|
||||
|
|
@ -1,51 +0,0 @@
|
|||
/*
|
||||
* Copyright 2017 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_flexspi_nor_boot.h"
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.xip_device"
|
||||
#endif
|
||||
|
||||
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
|
||||
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
|
||||
__attribute__((section(".boot_hdr.ivt")))
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma location=".boot_hdr.ivt"
|
||||
#endif
|
||||
/*************************************
|
||||
* IVT Data
|
||||
*************************************/
|
||||
const ivt image_vector_table = {
|
||||
IVT_HEADER, /* IVT Header */
|
||||
IMAGE_ENTRY_ADDRESS, /* Image Entry Function */
|
||||
IVT_RSVD, /* Reserved = 0 */
|
||||
(uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */
|
||||
(uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */
|
||||
(uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */
|
||||
(uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */
|
||||
IVT_RSVD /* Reserved = 0 */
|
||||
};
|
||||
|
||||
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
|
||||
__attribute__((section(".boot_hdr.boot_data")))
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma location=".boot_hdr.boot_data"
|
||||
#endif
|
||||
/*************************************
|
||||
* Boot Data
|
||||
*************************************/
|
||||
const BOOT_DATA_T boot_data = {
|
||||
FLASH_BASE, /* boot start location */
|
||||
FLASH_SIZE, /* size */
|
||||
PLUGIN_FLAG, /* Plugin flag*/
|
||||
0xFFFFFFFF /* empty - extra data word */
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -1,122 +0,0 @@
|
|||
/*
|
||||
* Copyright 2017 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef __FLEXSPI_NOR_BOOT_H__
|
||||
#define __FLEXSPI_NOR_BOOT_H__
|
||||
|
||||
#include <stdint.h>
|
||||
#include "board.h"
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief XIP_DEVICE driver version 2.0.0. */
|
||||
#define FSL_XIP_DEVICE_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
|
||||
/*@}*/
|
||||
|
||||
/*************************************
|
||||
* IVT Data
|
||||
*************************************/
|
||||
typedef struct _ivt_ {
|
||||
/** @ref hdr with tag #HAB_TAG_IVT, length and HAB version fields
|
||||
* (see @ref data)
|
||||
*/
|
||||
uint32_t hdr;
|
||||
/** Absolute address of the first instruction to execute from the
|
||||
* image
|
||||
*/
|
||||
uint32_t entry;
|
||||
/** Reserved in this version of HAB: should be NULL. */
|
||||
uint32_t reserved1;
|
||||
/** Absolute address of the image DCD: may be NULL. */
|
||||
uint32_t dcd;
|
||||
/** Absolute address of the Boot Data: may be NULL, but not interpreted
|
||||
* any further by HAB
|
||||
*/
|
||||
uint32_t boot_data;
|
||||
/** Absolute address of the IVT.*/
|
||||
uint32_t self;
|
||||
/** Absolute address of the image CSF.*/
|
||||
uint32_t csf;
|
||||
/** Reserved in this version of HAB: should be zero. */
|
||||
uint32_t reserved2;
|
||||
} ivt;
|
||||
|
||||
#define IVT_MAJOR_VERSION 0x4
|
||||
#define IVT_MAJOR_VERSION_SHIFT 0x4
|
||||
#define IVT_MAJOR_VERSION_MASK 0xF
|
||||
#define IVT_MINOR_VERSION 0x1
|
||||
#define IVT_MINOR_VERSION_SHIFT 0x0
|
||||
#define IVT_MINOR_VERSION_MASK 0xF
|
||||
|
||||
#define IVT_VERSION(major, minor) \
|
||||
((((major) & IVT_MAJOR_VERSION_MASK) << IVT_MAJOR_VERSION_SHIFT) | \
|
||||
(((minor) & IVT_MINOR_VERSION_MASK) << IVT_MINOR_VERSION_SHIFT))
|
||||
|
||||
/* IVT header */
|
||||
#define IVT_TAG_HEADER 0xD1 /**< Image Vector Table */
|
||||
#define IVT_SIZE 0x2000
|
||||
#define IVT_PAR IVT_VERSION(IVT_MAJOR_VERSION, IVT_MINOR_VERSION)
|
||||
#define IVT_HEADER (IVT_TAG_HEADER | (IVT_SIZE << 8) | (IVT_PAR << 24))
|
||||
|
||||
/* Set resume entry */
|
||||
#if defined(__CC_ARM) || defined(__ARMCC_VERSION)
|
||||
extern uint32_t __Vectors[];
|
||||
extern uint32_t Image$$RW_m_config_text$$Base[];
|
||||
#define IMAGE_ENTRY_ADDRESS ((uint32_t)__Vectors)
|
||||
#define FLASH_BASE ((uint32_t)Image$$RW_m_config_text$$Base)
|
||||
#elif defined(__MCUXPRESSO)
|
||||
extern uint32_t __Vectors[];
|
||||
extern uint32_t __boot_hdr_start__[];
|
||||
#define IMAGE_ENTRY_ADDRESS ((uint32_t)__Vectors)
|
||||
#define FLASH_BASE ((uint32_t)__boot_hdr_start__)
|
||||
#elif defined(__ICCARM__)
|
||||
extern uint32_t __VECTOR_TABLE[];
|
||||
extern uint32_t m_boot_hdr_conf_start[];
|
||||
#define IMAGE_ENTRY_ADDRESS ((uint32_t)__VECTOR_TABLE)
|
||||
#define FLASH_BASE ((uint32_t)m_boot_hdr_conf_start)
|
||||
#elif defined(__GNUC__)
|
||||
extern uint32_t __VECTOR_TABLE[];
|
||||
extern uint32_t __FLASH_BASE[];
|
||||
#define IMAGE_ENTRY_ADDRESS ((uint32_t)__VECTOR_TABLE)
|
||||
#define FLASH_BASE ((uint32_t)__FLASH_BASE)
|
||||
#endif
|
||||
|
||||
#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (1 == XIP_BOOT_HEADER_DCD_ENABLE)
|
||||
#define DCD_ADDRESS dcd_data
|
||||
#else
|
||||
#define DCD_ADDRESS 0
|
||||
#endif
|
||||
|
||||
#define BOOT_DATA_ADDRESS &boot_data
|
||||
#define CSF_ADDRESS 0
|
||||
#define IVT_RSVD (uint32_t)(0x00000000)
|
||||
|
||||
/*************************************
|
||||
* Boot Data
|
||||
*************************************/
|
||||
typedef struct _boot_data_ {
|
||||
uint32_t start; /* boot start location */
|
||||
uint32_t size; /* size */
|
||||
uint32_t plugin; /* plugin flag - 1 if downloaded application is plugin */
|
||||
uint32_t placeholder; /* placehoder to make even 0x10 size */
|
||||
}BOOT_DATA_T;
|
||||
|
||||
#if defined(BOARD_FLASH_SIZE)
|
||||
#define FLASH_SIZE BOARD_FLASH_SIZE
|
||||
#else
|
||||
#error "Please define macro BOARD_FLASH_SIZE"
|
||||
#endif
|
||||
#define PLUGIN_FLAG (uint32_t)0
|
||||
|
||||
/* External Variables */
|
||||
const BOOT_DATA_T boot_data;
|
||||
#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (1 == XIP_BOOT_HEADER_DCD_ENABLE)
|
||||
extern const uint8_t dcd_data[];
|
||||
#endif
|
||||
|
||||
#endif /* __FLEXSPI_NOR_BOOT_H__ */
|
||||
|
||||
|
|
@ -1,68 +0,0 @@
|
|||
/*
|
||||
* Copyright 2017 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_flexspi_nor_config.h"
|
||||
|
||||
/* Component ID definition, used by tools. */
|
||||
#ifndef FSL_COMPONENT_ID
|
||||
#define FSL_COMPONENT_ID "platform.drivers.xip_board"
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
|
||||
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
|
||||
__attribute__((section(".boot_hdr.conf")))
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma location = ".boot_hdr.conf"
|
||||
#endif
|
||||
|
||||
const flexspi_nor_config_t qspiflash_config = {
|
||||
.memConfig =
|
||||
{
|
||||
.tag = FLEXSPI_CFG_BLK_TAG,
|
||||
.version = FLEXSPI_CFG_BLK_VERSION,
|
||||
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackInternally,
|
||||
.csHoldTime = 3u,
|
||||
.csSetupTime = 3u,
|
||||
|
||||
.deviceModeCfgEnable = true,
|
||||
.deviceModeType = 1, //Quad enable command
|
||||
.deviceModeSeq.seqNum = 1,
|
||||
.deviceModeSeq.seqId = 4,
|
||||
.deviceModeArg = 0x000200, //Set QE
|
||||
.deviceType = kFlexSpiDeviceType_SerialNOR,//kFlexSpiDeviceType_SerialNOR,
|
||||
|
||||
.sflashPadType = kSerialFlash_4Pads,
|
||||
.serialClkFreq = kFlexSpiSerialClk_166MHz, // 80Mhz for winbond, 100Mhz for GD, 133Mhz for ISSI
|
||||
.sflashA1Size = 32u * 1024u * 1024u,
|
||||
.dataValidTime = {16u, 16u},
|
||||
|
||||
.lookupTable =
|
||||
{
|
||||
//Quad Input/Output read sequence
|
||||
[0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
|
||||
[1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
|
||||
[2] = FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0),
|
||||
|
||||
//Read Status
|
||||
[1*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
|
||||
|
||||
//Write Enable
|
||||
[3*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0),
|
||||
|
||||
//Write Status
|
||||
[4*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x04),
|
||||
},
|
||||
},
|
||||
.pageSize = 512u,
|
||||
.sectorSize = 256u * 1024u,
|
||||
.blockSize = 256u * 1024u,
|
||||
.isUniformBlockSize = true,
|
||||
};
|
||||
#endif /* XIP_BOOT_HEADER_ENABLE */
|
||||
|
|
@ -1,268 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2017 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef __FSL_FLEXSPI_NOR_CONFIG__
|
||||
#define __FSL_FLEXSPI_NOR_CONFIG__
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief XIP_BOARD driver version 2.0.0. */
|
||||
#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
|
||||
/*@}*/
|
||||
|
||||
/* FLEXSPI memory config block related defintions */
|
||||
#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) // ascii "FCFB" Big Endian
|
||||
#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0
|
||||
#define FLEXSPI_CFG_BLK_SIZE (512)
|
||||
|
||||
/* FLEXSPI Feature related definitions */
|
||||
#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
|
||||
|
||||
/* Lookup table related defintions */
|
||||
#define CMD_INDEX_READ 0
|
||||
#define CMD_INDEX_READSTATUS 1
|
||||
#define CMD_INDEX_WRITEENABLE 2
|
||||
#define CMD_INDEX_WRITE 4
|
||||
|
||||
#define CMD_LUT_SEQ_IDX_READ 0
|
||||
#define CMD_LUT_SEQ_IDX_READSTATUS 1
|
||||
#define CMD_LUT_SEQ_IDX_WRITEENABLE 3
|
||||
#define CMD_LUT_SEQ_IDX_WRITE 9
|
||||
|
||||
#define CMD_SDR 0x01
|
||||
#define CMD_DDR 0x21
|
||||
#define RADDR_SDR 0x02
|
||||
#define RADDR_DDR 0x22
|
||||
#define CADDR_SDR 0x03
|
||||
#define CADDR_DDR 0x23
|
||||
#define MODE1_SDR 0x04
|
||||
#define MODE1_DDR 0x24
|
||||
#define MODE2_SDR 0x05
|
||||
#define MODE2_DDR 0x25
|
||||
#define MODE4_SDR 0x06
|
||||
#define MODE4_DDR 0x26
|
||||
#define MODE8_SDR 0x07
|
||||
#define MODE8_DDR 0x27
|
||||
#define WRITE_SDR 0x08
|
||||
#define WRITE_DDR 0x28
|
||||
#define READ_SDR 0x09
|
||||
#define READ_DDR 0x29
|
||||
#define LEARN_SDR 0x0A
|
||||
#define LEARN_DDR 0x2A
|
||||
#define DATSZ_SDR 0x0B
|
||||
#define DATSZ_DDR 0x2B
|
||||
#define DUMMY_SDR 0x0C
|
||||
#define DUMMY_DDR 0x2C
|
||||
#define DUMMY_RWDS_SDR 0x0D
|
||||
#define DUMMY_RWDS_DDR 0x2D
|
||||
#define JMP_ON_CS 0x1F
|
||||
#define STOP 0
|
||||
|
||||
#define FLEXSPI_1PAD 0
|
||||
#define FLEXSPI_2PAD 1
|
||||
#define FLEXSPI_4PAD 2
|
||||
#define FLEXSPI_8PAD 3
|
||||
|
||||
#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \
|
||||
(FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
|
||||
FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
|
||||
|
||||
//!@brief Definitions for FlexSPI Serial Clock Frequency
|
||||
typedef enum _FlexSpiSerialClockFreq
|
||||
{
|
||||
kFlexSpiSerialClk_30MHz = 1,
|
||||
kFlexSpiSerialClk_50MHz = 2,
|
||||
kFlexSpiSerialClk_60MHz = 3,
|
||||
kFlexSpiSerialClk_75MHz = 4,
|
||||
kFlexSpiSerialClk_80MHz = 5,
|
||||
kFlexSpiSerialClk_100MHz = 6,
|
||||
kFlexSpiSerialClk_133MHz = 7,
|
||||
kFlexSpiSerialClk_166MHz = 8,
|
||||
} flexspi_serial_clk_freq_t;
|
||||
|
||||
//!@brief FlexSPI clock configuration type
|
||||
enum
|
||||
{
|
||||
kFlexSpiClk_SDR, //!< Clock configure for SDR mode
|
||||
kFlexSpiClk_DDR, //!< Clock configurat for DDR mode
|
||||
};
|
||||
|
||||
//!@brief FlexSPI Read Sample Clock Source definition
|
||||
typedef enum _FlashReadSampleClkSource
|
||||
{
|
||||
kFlexSPIReadSampleClk_LoopbackInternally = 0,
|
||||
kFlexSPIReadSampleClk_LoopbackFromDqsPad = 1,
|
||||
kFlexSPIReadSampleClk_LoopbackFromSckPad = 2,
|
||||
kFlexSPIReadSampleClk_ExternalInputFromDqsPad = 3,
|
||||
} flexspi_read_sample_clk_t;
|
||||
|
||||
//!@brief Misc feature bit definitions
|
||||
enum
|
||||
{
|
||||
kFlexSpiMiscOffset_DiffClkEnable = 0, //!< Bit for Differential clock enable
|
||||
kFlexSpiMiscOffset_Ck2Enable = 1, //!< Bit for CK2 enable
|
||||
kFlexSpiMiscOffset_ParallelEnable = 2, //!< Bit for Parallel mode enable
|
||||
kFlexSpiMiscOffset_WordAddressableEnable = 3, //!< Bit for Word Addressable enable
|
||||
kFlexSpiMiscOffset_SafeConfigFreqEnable = 4, //!< Bit for Safe Configuration Frequency enable
|
||||
kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, //!< Bit for Pad setting override enable
|
||||
kFlexSpiMiscOffset_DdrModeEnable = 6, //!< Bit for DDR clock confiuration indication.
|
||||
};
|
||||
|
||||
//!@brief Flash Type Definition
|
||||
enum
|
||||
{
|
||||
kFlexSpiDeviceType_SerialNOR = 1, //!< Flash devices are Serial NOR
|
||||
kFlexSpiDeviceType_SerialNAND = 2, //!< Flash devices are Serial NAND
|
||||
kFlexSpiDeviceType_SerialRAM = 3, //!< Flash devices are Serial RAM/HyperFLASH
|
||||
kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND
|
||||
kFlexSpiDeviceType_MCP_NOR_RAM = 0x13, //!< Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs
|
||||
};
|
||||
|
||||
//!@brief Flash Pad Definitions
|
||||
enum
|
||||
{
|
||||
kSerialFlash_1Pad = 1,
|
||||
kSerialFlash_2Pads = 2,
|
||||
kSerialFlash_4Pads = 4,
|
||||
kSerialFlash_8Pads = 8,
|
||||
};
|
||||
|
||||
//!@brief FlexSPI LUT Sequence structure
|
||||
typedef struct _lut_sequence
|
||||
{
|
||||
uint8_t seqNum; //!< Sequence Number, valid number: 1-16
|
||||
uint8_t seqId; //!< Sequence Index, valid number: 0-15
|
||||
uint16_t reserved;
|
||||
} flexspi_lut_seq_t;
|
||||
|
||||
//!@brief Flash Configuration Command Type
|
||||
enum
|
||||
{
|
||||
kDeviceConfigCmdType_Generic, //!< Generic command, for example: configure dummy cycles, drive strength, etc
|
||||
kDeviceConfigCmdType_QuadEnable, //!< Quad Enable command
|
||||
kDeviceConfigCmdType_Spi2Xpi, //!< Switch from SPI to DPI/QPI/OPI mode
|
||||
kDeviceConfigCmdType_Xpi2Spi, //!< Switch from DPI/QPI/OPI to SPI mode
|
||||
kDeviceConfigCmdType_Spi2NoCmd, //!< Switch to 0-4-4/0-8-8 mode
|
||||
kDeviceConfigCmdType_Reset, //!< Reset device command
|
||||
};
|
||||
|
||||
//!@brief FlexSPI Memory Configuration Block
|
||||
typedef struct _FlexSPIConfig
|
||||
{
|
||||
uint32_t tag; //!< [0x000-0x003] Tag, fixed value 0x42464346UL
|
||||
uint32_t version; //!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix
|
||||
uint32_t reserved0; //!< [0x008-0x00b] Reserved for future use
|
||||
uint8_t readSampleClkSrc; //!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
|
||||
uint8_t csHoldTime; //!< [0x00d-0x00d] CS hold time, default value: 3
|
||||
uint8_t csSetupTime; //!< [0x00e-0x00e] CS setup time, default value: 3
|
||||
uint8_t columnAddressWidth; //!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For
|
||||
//! Serial NAND, need to refer to datasheet
|
||||
uint8_t deviceModeCfgEnable; //!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable
|
||||
uint8_t deviceModeType; //!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch,
|
||||
//! Generic configuration, etc.
|
||||
uint16_t waitTimeCfgCommands; //!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for
|
||||
//! DPI/QPI/OPI switch or reset command
|
||||
flexspi_lut_seq_t deviceModeSeq; //!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt
|
||||
//! sequence number, [31:16] Reserved
|
||||
uint32_t deviceModeArg; //!< [0x018-0x01b] Argument/Parameter for device configuration
|
||||
uint8_t configCmdEnable; //!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
|
||||
uint8_t configModeType[3]; //!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
|
||||
flexspi_lut_seq_t
|
||||
configCmdSeqs[3]; //!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq
|
||||
uint32_t reserved1; //!< [0x02c-0x02f] Reserved for future use
|
||||
uint32_t configCmdArgs[3]; //!< [0x030-0x03b] Arguments/Parameters for device Configuration commands
|
||||
uint32_t reserved2; //!< [0x03c-0x03f] Reserved for future use
|
||||
uint32_t controllerMiscOption; //!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more
|
||||
//! details
|
||||
uint8_t deviceType; //!< [0x044-0x044] Device Type: See Flash Type Definition for more details
|
||||
uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal
|
||||
uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot
|
||||
//! Chapter for more details
|
||||
uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot
|
||||
//! be done using 1 LUT sequence, currently, only applicable to HyperFLASH
|
||||
uint32_t reserved3[2]; //!< [0x048-0x04f] Reserved for future use
|
||||
uint32_t sflashA1Size; //!< [0x050-0x053] Size of Flash connected to A1
|
||||
uint32_t sflashA2Size; //!< [0x054-0x057] Size of Flash connected to A2
|
||||
uint32_t sflashB1Size; //!< [0x058-0x05b] Size of Flash connected to B1
|
||||
uint32_t sflashB2Size; //!< [0x05c-0x05f] Size of Flash connected to B2
|
||||
uint32_t csPadSettingOverride; //!< [0x060-0x063] CS pad setting override value
|
||||
uint32_t sclkPadSettingOverride; //!< [0x064-0x067] SCK pad setting override value
|
||||
uint32_t dataPadSettingOverride; //!< [0x068-0x06b] data pad setting override value
|
||||
uint32_t dqsPadSettingOverride; //!< [0x06c-0x06f] DQS pad setting override value
|
||||
uint32_t timeoutInMs; //!< [0x070-0x073] Timeout threshold for read status command
|
||||
uint32_t commandInterval; //!< [0x074-0x077] CS deselect interval between two commands
|
||||
uint16_t dataValidTime[2]; //!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns
|
||||
uint16_t busyOffset; //!< [0x07c-0x07d] Busy offset, valid value: 0-31
|
||||
uint16_t busyBitPolarity; //!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -
|
||||
//! busy flag is 0 when flash device is busy
|
||||
uint32_t lookupTable[64]; //!< [0x080-0x17f] Lookup table holds Flash command sequences
|
||||
flexspi_lut_seq_t lutCustomSeq[12]; //!< [0x180-0x1af] Customizable LUT Sequences
|
||||
uint32_t reserved4[4]; //!< [0x1b0-0x1bf] Reserved for future use
|
||||
} flexspi_mem_config_t;
|
||||
|
||||
/* */
|
||||
#define NOR_CMD_INDEX_READ CMD_INDEX_READ //!< 0
|
||||
#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS //!< 1
|
||||
#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE //!< 2
|
||||
#define NOR_CMD_INDEX_ERASESECTOR 3 //!< 3
|
||||
#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE //!< 4
|
||||
#define NOR_CMD_INDEX_CHIPERASE 5 //!< 5
|
||||
#define NOR_CMD_INDEX_DUMMY 6 //!< 6
|
||||
#define NOR_CMD_INDEX_ERASEBLOCK 7 //!< 7
|
||||
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0 READ LUT sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \
|
||||
CMD_LUT_SEQ_IDX_READSTATUS //!< 1 Read Status LUT sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
|
||||
2 //!< 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \
|
||||
CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3 Write Enable sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
|
||||
4 //!< 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5 Erase Sector sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8 //!< 8 Erase Block sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \
|
||||
CMD_LUT_SEQ_IDX_WRITE //!< 9 Program sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
|
||||
14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block
|
||||
#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
|
||||
15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk
|
||||
|
||||
/*
|
||||
* Serial NOR configuration block
|
||||
*/
|
||||
typedef struct _flexspi_nor_config
|
||||
{
|
||||
flexspi_mem_config_t memConfig; //!< Common memory configuration info via FlexSPI
|
||||
uint32_t pageSize; //!< Page size of Serial NOR
|
||||
uint32_t sectorSize; //!< Sector size of Serial NOR
|
||||
uint8_t ipcmdSerialClkFreq; //!< Clock frequency for IP command
|
||||
uint8_t isUniformBlockSize; //!< Sector/Block size is the same
|
||||
uint8_t reserved0[2]; //!< Reserved for future use
|
||||
uint8_t serialNorType; //!< Serial NOR Flash type: 0/1/2/3
|
||||
uint8_t needExitNoCmdMode; //!< Need to exit NoCmd mode before other IP command
|
||||
uint8_t halfClkForNonReadCmd; //!< Half the Serial Clock for non-read command: true/false
|
||||
uint8_t needRestoreNoCmdMode; //!< Need to Restore NoCmd mode after IP commmand execution
|
||||
uint32_t blockSize; //!< Block size
|
||||
uint32_t reserve2[11]; //!< Reserved for future use
|
||||
} flexspi_nor_config_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* __FSL_FLEXSPI_NOR_CONFIG__ */
|
||||
|
|
@ -415,7 +415,6 @@ osa_status_t OSA_SemaphoreWait(osa_semaphore_handle_t semaphoreHandle, uint32_t
|
|||
osa_status_t OSA_SemaphorePost(osa_semaphore_handle_t semaphoreHandle)
|
||||
{
|
||||
assert(semaphoreHandle);
|
||||
osa_status_t status = KOSA_StatusError;
|
||||
rt_sem_t sem = (rt_sem_t)(void *)(uint32_t *)(*(uint32_t *)semaphoreHandle);
|
||||
rt_sem_release(sem);
|
||||
return KOSA_StatusSuccess;
|
||||
|
|
@ -547,7 +546,6 @@ osa_status_t OSA_EventCreate(osa_event_handle_t eventHandle, uint8_t autoClear)
|
|||
*END**************************************************************************/
|
||||
osa_status_t OSA_EventSet(osa_event_handle_t eventHandle, osa_event_flags_t flagsToSet)
|
||||
{
|
||||
rt_bool_t taskToWake = RT_FALSE;
|
||||
rt_err_t result;
|
||||
assert(eventHandle);
|
||||
osa_event_struct_t *pEventStruct = (osa_event_struct_t *)eventHandle;
|
||||
|
|
@ -643,7 +641,7 @@ osa_status_t OSA_EventWait(osa_event_handle_t eventHandle,
|
|||
osa_event_flags_t *pSetFlags)
|
||||
{
|
||||
assert(eventHandle);
|
||||
rt_uint8_t option;
|
||||
rt_uint8_t option = 0;
|
||||
rt_uint32_t timeoutTicks;
|
||||
rt_uint32_t flagsSave;
|
||||
osa_event_struct_t *pEventStruct = (osa_event_struct_t *)eventHandle;
|
||||
|
|
@ -669,7 +667,7 @@ osa_status_t OSA_EventWait(osa_event_handle_t eventHandle,
|
|||
{
|
||||
option |= RT_EVENT_FLAG_CLEAR;
|
||||
}
|
||||
option |= waitAll ? RT_EVENT_FLAG_AND : RT_EVENT_FLAG_AND;\
|
||||
option |= waitAll ? RT_EVENT_FLAG_AND : RT_EVENT_FLAG_OR;
|
||||
|
||||
rt_err_t status = rt_event_recv(pEventStruct->handle, (rt_uint32_t)flagsToWait, option, timeoutTicks, &flagsSave);
|
||||
|
||||
|
|
@ -681,11 +679,11 @@ osa_status_t OSA_EventWait(osa_event_handle_t eventHandle,
|
|||
|
||||
if (RT_EOK != status)
|
||||
{
|
||||
return KOSA_StatusSuccess;
|
||||
return KOSA_StatusTimeout;
|
||||
}
|
||||
else
|
||||
{
|
||||
return KOSA_StatusTimeout;
|
||||
return KOSA_StatusSuccess;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -749,7 +747,6 @@ osa_status_t OSA_MsgQCreate(osa_msgq_handle_t msgqHandle, uint32_t msgNo, uint32
|
|||
osa_status_t OSA_MsgQPut(osa_msgq_handle_t msgqHandle, osa_msg_handle_t pMessage)
|
||||
{
|
||||
assert(msgqHandle);
|
||||
rt_bool_t taskToWake = RT_FALSE;
|
||||
rt_mq_t handler = (rt_mq_t)(void *)(uint32_t *)(*(uint32_t *)msgqHandle);
|
||||
|
||||
if (RT_EOK == rt_mq_send(handler, pMessage, handler->msg_size))
|
||||
|
|
|
|||
|
|
@ -367,7 +367,6 @@ Reset_Handler:
|
|||
blt .LC4
|
||||
#endif /* __STARTUP_INITIALIZE_NONCACHEDATA */
|
||||
|
||||
#ifdef __STARTUP_CLEAR_BSS
|
||||
/* This part of work usually is done in C library startup code. Otherwise,
|
||||
* define this macro to enable it in this startup.
|
||||
*
|
||||
|
|
@ -385,7 +384,6 @@ Reset_Handler:
|
|||
itt lt
|
||||
strlt r0, [r1], #4
|
||||
blt .LC5
|
||||
#endif /* __STARTUP_CLEAR_BSS */
|
||||
|
||||
cpsie i /* Unmask interrupts */
|
||||
#ifndef __START
|
||||
|
|
|
|||
|
|
@ -52,9 +52,6 @@ if GetDepend(['BSP_USING_SDRAM']):
|
|||
if GetDepend(['BSP_USING_LCD']):
|
||||
src += ['MIMXRT1052/drivers/fsl_elcdif.c']
|
||||
|
||||
if GetDepend(['RT_USING_USB_HOST']) or GetDepend(['RT_USING_USB_DEVICE']):
|
||||
src += ['MIMXRT1052/drivers/fsl_usdhc.c']
|
||||
|
||||
if GetDepend(['BSP_USING_CAN']):
|
||||
src += ['MIMXRT1052/drivers/fsl_flexcan.c']
|
||||
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ if GetDepend('RT_USING_USB_DEVICE'):
|
|||
|
||||
if GetDepend('RT_USING_USB_DEVICE') or GetDepend('RT_USING_USB_HOST'):
|
||||
src += Glob('usb/phy/*.c')
|
||||
CPPDEFINES += ['ENDIANNESS']
|
||||
CPPDEFINES += ['ENDIANNESS','USE_RTOS']
|
||||
|
||||
if GetDepend('RT_USING_USB_HOST'):
|
||||
src += ['drv_usbh.c']
|
||||
|
|
|
|||
|
|
@ -11,13 +11,14 @@
|
|||
*/
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef BSP_USING_USB_HOST
|
||||
#if defined(BSP_USB0_HOST) || defined(BSP_USB1_HOST)
|
||||
#include "drv_usbh.h"
|
||||
#include <usb/include/usb_host_config.h>
|
||||
#include <usb/include/usb.h>
|
||||
#include <usb/phy/usb_phy.h>
|
||||
#include <usb/host/usb_host.h>
|
||||
#include <usb/host/usb_host_hci.h>
|
||||
#include <usb/host/usb_host_ehci.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
|
||||
|
|
@ -32,6 +33,8 @@
|
|||
#define BOARD_USB_PHY_TXCAL45DM (0x06U)
|
||||
#endif
|
||||
|
||||
#define USB_HOST_INTERRUPT_PRIORITY 3
|
||||
|
||||
enum
|
||||
{
|
||||
#ifdef BSP_USB0_HOST
|
||||
|
|
@ -47,7 +50,7 @@ struct imxrt_usb_host_pipe
|
|||
usb_host_pipe_handle pipe_handle;
|
||||
struct rt_completion urb_completion;
|
||||
usb_status_t transfer_status;
|
||||
}
|
||||
};
|
||||
|
||||
struct imxrt_usb_host
|
||||
{
|
||||
|
|
@ -79,7 +82,7 @@ static void _imxrt_usb_host_send_callback(void *param, usb_host_transfer_t *tran
|
|||
{
|
||||
struct imxrt_usb_host_pipe *pipe = (struct imxrt_usb_host_pipe *)param;
|
||||
pipe->transfer_status = status;
|
||||
rt_completion_done(pipe->urb_completion);
|
||||
rt_completion_done(&pipe->urb_completion);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -104,7 +107,7 @@ static void USB_HostClockInit(usb_controller_index_t controller_id)
|
|||
CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U);
|
||||
}
|
||||
|
||||
USB_EhciPhyInit(controller_id, notUsed, &phyConfig);
|
||||
USB_EhciPhyInit(controller_id, 24000000U, &phyConfig);
|
||||
}
|
||||
|
||||
/*!
|
||||
|
|
@ -139,11 +142,13 @@ void USB_OTG1_IRQHandler(void)
|
|||
|
||||
static rt_err_t _ehci0_reset_port(rt_uint8_t port)
|
||||
{
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("reset port\n"));
|
||||
USB_HostEhciControlBus((usb_host_ehci_instance_t *)((usb_host_instance_t *)imxrt_usb_host_obj[USBH0_INDEX].host_handle)->controllerHandle, kUSB_HostBusReset);
|
||||
// No reset port function available
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static uint8_t _ehci0_pipe_buf[64];
|
||||
static uint8_t _ehci0_pipe_idx;
|
||||
|
||||
static int _ehci0_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes, int timeouts)
|
||||
{
|
||||
int timeout = timeouts;
|
||||
|
|
@ -165,22 +170,64 @@ static int _ehci0_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nb
|
|||
}
|
||||
transfer->transferBuffer = buffer;
|
||||
transfer->transferLength = nbytes;
|
||||
transfer->transferSofar = 0;
|
||||
transfer->callbackFn = _imxrt_usb_host_send_callback;
|
||||
transfer->callbackParam = &(imxrt_usb_host_obj[USBH0_INDEX].pipes[pipe->pipe_index]);
|
||||
transfer->direction = (pipe->ep.bEndpointAddress & USB_DIR_IN) ? USB_IN : USB_OUT;
|
||||
if (pipe->ep.bmAttributes == USB_ENDPOINT_CONTROL)
|
||||
{
|
||||
if (token == USBH_PID_SETUP)
|
||||
{
|
||||
struct urequest *setup = (struct urequest *)buffer;
|
||||
transfer->setupStatus = 0;
|
||||
transfer->setupPacket->bmRequestType = setup->request_type;
|
||||
transfer->setupPacket->bRequest = setup->bRequest;
|
||||
transfer->setupPacket->wIndex = setup->wIndex;
|
||||
transfer->setupPacket->wLength = setup->wLength;
|
||||
transfer->setupPacket->wValue = setup->wValue;
|
||||
transfer->transferBuffer = RT_NULL;
|
||||
transfer->transferLength = 0;
|
||||
transfer->next = RT_NULL;
|
||||
if ((transfer->setupPacket->bmRequestType & USB_REQUEST_TYPE_DIR_MASK) == USB_REQUEST_TYPE_DIR_IN)
|
||||
{
|
||||
transfer->direction = USB_IN;
|
||||
transfer->transferBuffer = _ehci0_pipe_buf;
|
||||
transfer->transferLength = setup->wLength;
|
||||
_ehci0_pipe_idx = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
transfer->direction = USB_OUT;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_memcpy(buffer, _ehci0_pipe_buf + _ehci0_pipe_idx, nbytes);
|
||||
imxrt_usb_host_obj[USBH0_INDEX].pipes[pipe->pipe_index].transfer_status = kStatus_USB_Success;
|
||||
transfer->transferSofar = nbytes;
|
||||
_ehci0_pipe_idx += nbytes;
|
||||
if (_ehci0_pipe_idx >= 64)
|
||||
{
|
||||
_ehci0_pipe_idx = 0;
|
||||
}
|
||||
goto _ehci0_pipe_xfer_finish;
|
||||
}
|
||||
|
||||
}
|
||||
rt_completion_init(&(imxrt_usb_host_obj[USBH0_INDEX].pipes[pipe->pipe_index].urb_completion));
|
||||
if (USB_HostSend(imxrt_usb_host_obj[USBH0_INDEX].host_handle, imxrt_usb_host_obj[USBH0_INDEX].pipes[pipe->pipe_index].pipe_handle, transfer) != kStatus_USB_Success)
|
||||
if (USB_HostEhciWritePipe(((usb_host_instance_t *)imxrt_usb_host_obj[USBH0_INDEX].host_handle)->controllerHandle, imxrt_usb_host_obj[USBH0_INDEX].pipes[pipe->pipe_index].pipe_handle, transfer) != kStatus_USB_Success)
|
||||
{
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb host failed to send\n"));
|
||||
(void)USB_HostFreeTransfer(imxrt_usb_host_obj[USBH0_INDEX].host_handle, transfer);
|
||||
return -1;
|
||||
}
|
||||
if (-RT_ETIMEOUT == rt_completion_wait(&(imxrt_usb_host_obj[USBH0_INDEX].pipes[pipe->pipe_index].urb_completion), timeout))
|
||||
if (-RT_ETIMEOUT == rt_completion_wait(&(imxrt_usb_host_obj[USBH0_INDEX].pipes[pipe->pipe_index].urb_completion), RT_WAITING_FOREVER))
|
||||
{
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb transfer timeout\n"));
|
||||
(void)USB_HostFreeTransfer(imxrt_usb_host_obj[USBH0_INDEX].host_handle, transfer);
|
||||
return -1;
|
||||
}
|
||||
// rt_thread_mdelay(1);
|
||||
_ehci0_pipe_xfer_finish:
|
||||
switch (imxrt_usb_host_obj[USBH0_INDEX].pipes[pipe->pipe_index].transfer_status)
|
||||
{
|
||||
case kStatus_USB_Success:
|
||||
|
|
@ -191,7 +238,7 @@ static int _ehci0_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nb
|
|||
{
|
||||
pipe->callback(pipe);
|
||||
}
|
||||
size_t size = transfer.transferSofar;
|
||||
size_t size = transfer->transferSofar;
|
||||
(void)USB_HostFreeTransfer(imxrt_usb_host_obj[USBH0_INDEX].host_handle, transfer);
|
||||
if (pipe->ep.bEndpointAddress & 0x80)
|
||||
{
|
||||
|
|
@ -291,10 +338,9 @@ static struct uhcd_ops _ehci0_uhcd_ops =
|
|||
|
||||
static usb_status_t usb0_host_callback(usb_device_handle handle, usb_host_configuration_handle config_handle, rt_uint32_t event_code)
|
||||
{
|
||||
usb_status_t status0;
|
||||
usb_status_t status = kStatus_USB_Success;
|
||||
|
||||
switch (eventCode)
|
||||
switch (event_code)
|
||||
{
|
||||
case kUSB_HostEventAttach:
|
||||
if (!imxrt_usb_host_obj[USBH0_INDEX].connect_status)
|
||||
|
|
@ -302,13 +348,12 @@ static usb_status_t usb0_host_callback(usb_device_handle handle, usb_host_config
|
|||
imxrt_usb_host_obj[USBH0_INDEX].connect_status = RT_TRUE;
|
||||
imxrt_usb_host_obj[USBH0_INDEX].device_handle = handle;
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb connected\n"));
|
||||
rt_usbh_root_hub_connect_handler(imxrt_usb_host_obj[USBH0_INDEX].uhcd, OTG_PORT, RT_FALSE);
|
||||
rt_usbh_root_hub_connect_handler(&(imxrt_usb_host_obj[USBH0_INDEX].uhcd), OTG_PORT, RT_TRUE);
|
||||
}
|
||||
break;
|
||||
|
||||
case kUSB_HostEventNotSupported:
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb device not supported\n"));
|
||||
status = kStatus_USB_Error;
|
||||
break;
|
||||
|
||||
case kUSB_HostEventEnumerationDone:
|
||||
|
|
@ -321,7 +366,8 @@ static usb_status_t usb0_host_callback(usb_device_handle handle, usb_host_config
|
|||
imxrt_usb_host_obj[USBH0_INDEX].connect_status = RT_FALSE;
|
||||
imxrt_usb_host_obj[USBH0_INDEX].device_handle = handle;
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb disconnnect\n"));
|
||||
rt_usbh_root_hub_disconnect_handler(imxrt_usb_host_obj[USBH0_INDEX].uhcd, OTG_PORT);
|
||||
rt_usbh_root_hub_disconnect_handler(&(imxrt_usb_host_obj[USBH0_INDEX].uhcd), OTG_PORT);
|
||||
(void)USB_HostCloseDeviceInterface(handle, NULL);
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
@ -331,12 +377,24 @@ static usb_status_t usb0_host_callback(usb_device_handle handle, usb_host_config
|
|||
return status;
|
||||
}
|
||||
|
||||
rt_thread_t usbh0_thread;
|
||||
|
||||
static void _ehci0_usbh_thread(void* param)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
USB_HostEhciTaskFunction(imxrt_usb_host_obj[USBH0_INDEX].host_handle);
|
||||
}
|
||||
}
|
||||
|
||||
static rt_err_t _ehci0_usbh_init(rt_device_t device)
|
||||
{
|
||||
USB_HostClockInit(kUSB_ControllerEhci0);
|
||||
|
||||
if (kStatus_USB_Success == USB_HostInit(kUSB_ControllerEhci0, &imxrt_usb_host_obj[USBH0_INDEX].host_handle, usb0_host_callback))
|
||||
{
|
||||
usbh0_thread = rt_thread_create("ehci0", _ehci0_usbh_thread, RT_NULL, 500, 4, 9999999);
|
||||
rt_thread_startup(usbh0_thread);
|
||||
USB_HostIsrEnable(kUSB_ControllerEhci0);
|
||||
}
|
||||
else
|
||||
|
|
@ -361,11 +419,13 @@ void USB_OTG2_IRQHandler(void)
|
|||
|
||||
static rt_err_t _ehci1_reset_port(rt_uint8_t port)
|
||||
{
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("reset port\n"));
|
||||
USB_HostEhciControlBus((usb_host_ehci_instance_t *)((usb_host_instance_t *)imxrt_usb_host_obj[USBH1_INDEX].host_handle)->controllerHandle, kUSB_HostBusReset);
|
||||
// No reset port function available
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static uint8_t _ehci1_pipe_buf[64];
|
||||
static uint8_t _ehci1_pipe_idx;
|
||||
|
||||
static int _ehci1_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes, int timeouts)
|
||||
{
|
||||
int timeout = timeouts;
|
||||
|
|
@ -387,22 +447,65 @@ static int _ehci1_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nb
|
|||
}
|
||||
transfer->transferBuffer = buffer;
|
||||
transfer->transferLength = nbytes;
|
||||
transfer->transferSofar = 0;
|
||||
transfer->callbackFn = _imxrt_usb_host_send_callback;
|
||||
transfer->callbackParam = &(imxrt_usb_host_obj[USBH1_INDEX].pipes[pipe->pipe_index]);
|
||||
transfer->direction = (pipe->ep.bEndpointAddress & USB_DIR_IN) ? USB_IN : USB_OUT;
|
||||
if (pipe->ep.bmAttributes == USB_ENDPOINT_CONTROL)
|
||||
{
|
||||
if (token == USBH_PID_SETUP)
|
||||
{
|
||||
struct urequest *setup = (struct urequest *)buffer;
|
||||
transfer->setupStatus = 0;
|
||||
transfer->setupPacket->bmRequestType = setup->request_type;
|
||||
transfer->setupPacket->bRequest = setup->bRequest;
|
||||
transfer->setupPacket->wIndex = setup->wIndex;
|
||||
transfer->setupPacket->wLength = setup->wLength;
|
||||
transfer->setupPacket->wValue = setup->wValue;
|
||||
transfer->transferBuffer = RT_NULL;
|
||||
transfer->transferLength = 0;
|
||||
transfer->next = RT_NULL;
|
||||
if ((transfer->setupPacket->bmRequestType & USB_REQUEST_TYPE_DIR_MASK) == USB_REQUEST_TYPE_DIR_IN)
|
||||
{
|
||||
transfer->direction = USB_IN;
|
||||
transfer->transferBuffer = _ehci1_pipe_buf;
|
||||
transfer->transferLength = setup->wLength;
|
||||
_ehci1_pipe_idx = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
transfer->direction = USB_OUT;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_memcpy(buffer, _ehci1_pipe_buf + _ehci1_pipe_idx, nbytes);
|
||||
imxrt_usb_host_obj[USBH1_INDEX].pipes[pipe->pipe_index].transfer_status = kStatus_USB_Success;
|
||||
transfer->transferSofar = nbytes;
|
||||
_ehci1_pipe_idx += nbytes;
|
||||
if (_ehci1_pipe_idx >= 64)
|
||||
{
|
||||
_ehci1_pipe_idx = 0;
|
||||
}
|
||||
goto _ehci1_pipe_xfer_finish;
|
||||
}
|
||||
|
||||
}
|
||||
rt_completion_init(&(imxrt_usb_host_obj[USBH1_INDEX].pipes[pipe->pipe_index].urb_completion));
|
||||
if (USB_HostSend(imxrt_usb_host_obj[USBH1_INDEX].host_handle, imxrt_usb_host_obj[USBH1_INDEX].pipes[pipe->pipe_index].pipe_handle, transfer) != kStatus_USB_Success)
|
||||
if (USB_HostEhciWritePipe(((usb_host_instance_t *)imxrt_usb_host_obj[USBH1_INDEX].host_handle)->controllerHandle, imxrt_usb_host_obj[USBH1_INDEX].pipes[pipe->pipe_index].pipe_handle, transfer) != kStatus_USB_Success)
|
||||
{
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb host failed to send\n"));
|
||||
(void)USB_HostFreeTransfer(imxrt_usb_host_obj[USBH1_INDEX].host_handle, transfer);
|
||||
return -1;
|
||||
}
|
||||
if (-RT_ETIMEOUT == rt_completion_wait(&(imxrt_usb_host_obj[USBH1_INDEX].pipes[pipe->pipe_index].urb_completion), timeout))
|
||||
if (-RT_ETIMEOUT == rt_completion_wait(&(imxrt_usb_host_obj[USBH1_INDEX].pipes[pipe->pipe_index].urb_completion), RT_WAITING_FOREVER))
|
||||
{
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb transfer timeout\n"));
|
||||
(void)USB_HostFreeTransfer(imxrt_usb_host_obj[USBH1_INDEX].host_handle, transfer);
|
||||
return -1;
|
||||
}
|
||||
// rt_thread_mdelay(1);
|
||||
_ehci1_pipe_xfer_finish:
|
||||
switch (imxrt_usb_host_obj[USBH1_INDEX].pipes[pipe->pipe_index].transfer_status)
|
||||
{
|
||||
case kStatus_USB_Success:
|
||||
|
|
@ -413,7 +516,7 @@ static int _ehci1_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nb
|
|||
{
|
||||
pipe->callback(pipe);
|
||||
}
|
||||
size_t size = transfer.transferSofar;
|
||||
size_t size = transfer->transferSofar;
|
||||
(void)USB_HostFreeTransfer(imxrt_usb_host_obj[USBH1_INDEX].host_handle, transfer);
|
||||
if (pipe->ep.bEndpointAddress & 0x80)
|
||||
{
|
||||
|
|
@ -499,7 +602,7 @@ static rt_err_t _ehci1_open_pipe(upipe_t pipe)
|
|||
static rt_err_t _ehci1_close_pipe(upipe_t pipe)
|
||||
{
|
||||
(void)USB_HostClosePipe(imxrt_usb_host_obj[USBH1_INDEX].host_handle, imxrt_usb_host_obj[USBH1_INDEX].pipes[pipe->pipe_index].pipe_handle);
|
||||
_ehci0_free_pipe_index(pipe->pipe_index);
|
||||
_ehci1_free_pipe_index(pipe->pipe_index);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
|
|
@ -513,10 +616,9 @@ static struct uhcd_ops _ehci1_uhcd_ops =
|
|||
|
||||
static usb_status_t usb1_host_callback(usb_device_handle handle, usb_host_configuration_handle config_handle, rt_uint32_t event_code)
|
||||
{
|
||||
usb_status_t status0;
|
||||
usb_status_t status = kStatus_USB_Success;
|
||||
|
||||
switch (eventCode)
|
||||
switch (event_code)
|
||||
{
|
||||
case kUSB_HostEventAttach:
|
||||
if (!imxrt_usb_host_obj[USBH1_INDEX].connect_status)
|
||||
|
|
@ -524,13 +626,12 @@ static usb_status_t usb1_host_callback(usb_device_handle handle, usb_host_config
|
|||
imxrt_usb_host_obj[USBH1_INDEX].connect_status = RT_TRUE;
|
||||
imxrt_usb_host_obj[USBH1_INDEX].device_handle = handle;
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb connected\n"));
|
||||
rt_usbh_root_hub_connect_handler(imxrt_usb_host_obj[USBH1_INDEX].uhcd, OTG_PORT, RT_FALSE);
|
||||
rt_usbh_root_hub_connect_handler(&(imxrt_usb_host_obj[USBH1_INDEX].uhcd), OTG_PORT, RT_TRUE);
|
||||
}
|
||||
break;
|
||||
|
||||
case kUSB_HostEventNotSupported:
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb device not supported\n"));
|
||||
status = kStatus_USB_Error;
|
||||
break;
|
||||
|
||||
case kUSB_HostEventEnumerationDone:
|
||||
|
|
@ -543,7 +644,8 @@ static usb_status_t usb1_host_callback(usb_device_handle handle, usb_host_config
|
|||
imxrt_usb_host_obj[USBH1_INDEX].connect_status = RT_FALSE;
|
||||
imxrt_usb_host_obj[USBH1_INDEX].device_handle = handle;
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb disconnnect\n"));
|
||||
rt_usbh_root_hub_disconnect_handler(imxrt_usb_host_obj[USBH1_INDEX].uhcd, OTG_PORT);
|
||||
rt_usbh_root_hub_disconnect_handler(&(imxrt_usb_host_obj[USBH1_INDEX].uhcd), OTG_PORT);
|
||||
(void)USB_HostCloseDeviceInterface(handle, NULL);
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
@ -553,12 +655,24 @@ static usb_status_t usb1_host_callback(usb_device_handle handle, usb_host_config
|
|||
return status;
|
||||
}
|
||||
|
||||
rt_thread_t usbh1_thread;
|
||||
|
||||
static void _ehci1_usbh_thread(void* param)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
USB_HostEhciTaskFunction(imxrt_usb_host_obj[USBH1_INDEX].host_handle);
|
||||
}
|
||||
}
|
||||
|
||||
static rt_err_t _ehci1_usbh_init(rt_device_t device)
|
||||
{
|
||||
USB_HostClockInit(kUSB_ControllerEhci1);
|
||||
|
||||
if (kStatus_USB_Success == USB_HostInit(kUSB_ControllerEhci1, &imxrt_usb_host_obj[USBH1_INDEX].host_handle, usb1_host_callback))
|
||||
{
|
||||
usbh1_thread = rt_thread_create("ehci1", _ehci1_usbh_thread, RT_NULL, 500, 4, 9999999);
|
||||
rt_thread_startup(usbh1_thread);
|
||||
USB_HostIsrEnable(kUSB_ControllerEhci1);
|
||||
}
|
||||
else
|
||||
|
|
@ -577,12 +691,12 @@ int imxrt_usbh_register(void)
|
|||
|
||||
#ifdef BSP_USB0_HOST
|
||||
usb_host_obj = &(imxrt_usb_host_obj[USBH0_INDEX]);
|
||||
rt_memset((void *)(usb_host_obj->uhcd), 0, sizeof(struct uhcd));
|
||||
rt_memset((void *)(&(usb_host_obj->uhcd)), 0, sizeof(struct uhcd));
|
||||
usb_host_obj->uhcd.parent.type = RT_Device_Class_USBHost;
|
||||
usb_host_obj->uhcd.parent.init = _ehci0_usbh_init;
|
||||
usb_host_obj->uhcd.user_data = usb_host_obj;
|
||||
usb_host_obj->uhcd.parent.user_data = usb_host_obj;
|
||||
usb_host_obj->uhcd.ops = &_ehci0_uhcd_ops;
|
||||
usb_host_obj->uhcd.num_port = OTG_PORT;
|
||||
usb_host_obj->uhcd.num_ports = OTG_PORT;
|
||||
res = rt_device_register(&(usb_host_obj->uhcd.parent), usb_host_obj->name, RT_DEVICE_FLAG_DEACTIVATE);
|
||||
if (res != RT_EOK)
|
||||
{
|
||||
|
|
@ -594,12 +708,12 @@ int imxrt_usbh_register(void)
|
|||
#endif
|
||||
#ifdef BSP_USB1_HOST
|
||||
usb_host_obj = &(imxrt_usb_host_obj[USBH1_INDEX]);
|
||||
rt_memset((void *)(usb_host_obj->uhcd), 0, sizeof(struct uhcd));
|
||||
rt_memset((void *)(&(usb_host_obj->uhcd)), 0, sizeof(struct uhcd));
|
||||
usb_host_obj->uhcd.parent.type = RT_Device_Class_USBHost;
|
||||
usb_host_obj->uhcd.parent.init = _ehci1_usbh_init;
|
||||
usb_host_obj->uhcd.user_data = usb_host_obj;
|
||||
usb_host_obj->uhcd.parent.user_data = usb_host_obj;
|
||||
usb_host_obj->uhcd.ops = &_ehci1_uhcd_ops;
|
||||
usb_host_obj->uhcd.num_port = OTG_PORT;
|
||||
usb_host_obj->uhcd.num_ports = OTG_PORT;
|
||||
res = rt_device_register(&(usb_host_obj->uhcd.parent), usb_host_obj->name, RT_DEVICE_FLAG_DEACTIVATE);
|
||||
if (res != RT_EOK)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -12,7 +12,6 @@
|
|||
#include <usb/include/usb.h>
|
||||
#include <usb/include/usb_misc.h>
|
||||
#include <usb/include/usb_spec.h>
|
||||
#include <usb/include/usb_host_config.h>
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
|
|
|
|||
|
|
@ -5,8 +5,7 @@
|
|||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_os_abstraction.h"
|
||||
#include <usb/include/usb_device_config.h>
|
||||
#include <usb/include/usb_host_config.h>
|
||||
#include "usb_host.h"
|
||||
#include "usb_host_hci.h"
|
||||
#include "usb_host_devices.h"
|
||||
|
|
|
|||
|
|
@ -6,7 +6,6 @@
|
|||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fsl_os_abstraction.h"
|
||||
#include <usb/include/usb_host_config.h>
|
||||
#if ((defined USB_HOST_CONFIG_EHCI) && (USB_HOST_CONFIG_EHCI > 0U))
|
||||
#include "usb_host.h"
|
||||
|
|
@ -26,8 +25,6 @@
|
|||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
#define USB_OSA_WAIT_TIMEOUT RT_WAITING_FOREVER
|
||||
|
||||
#if defined(USB_STACK_USE_DEDICATED_RAM) && (USB_STACK_USE_DEDICATED_RAM > 0U)
|
||||
|
||||
#error The SOC does not suppoort dedicated RAM case.
|
||||
|
|
@ -159,13 +156,6 @@ static void USB_HostEhciZeroMem(uint32_t *buffer, uint32_t length);
|
|||
*/
|
||||
static void USB_HostEhciDelay(USBHS_Type *ehciIpBase, uint32_t ms);
|
||||
|
||||
/*!
|
||||
* @brief host ehci start async schedule.
|
||||
*
|
||||
* @param ehciInstance ehci instance pointer.
|
||||
*/
|
||||
static void USB_HostEhciStartAsync(usb_host_ehci_instance_t *ehciInstance);
|
||||
|
||||
/*!
|
||||
* @brief host ehci stop async schedule.
|
||||
*
|
||||
|
|
@ -173,13 +163,6 @@ static void USB_HostEhciStartAsync(usb_host_ehci_instance_t *ehciInstance);
|
|||
*/
|
||||
static void USB_HostEhciStopAsync(usb_host_ehci_instance_t *ehciInstance);
|
||||
|
||||
/*!
|
||||
* @brief host ehci start periodic schedule.
|
||||
*
|
||||
* @param ehciInstance ehci instance pointer.
|
||||
*/
|
||||
static void USB_HostEhciStartPeriodic(usb_host_ehci_instance_t *ehciInstance);
|
||||
|
||||
/*!
|
||||
* @brief host ehci stop periodic schedule.
|
||||
*
|
||||
|
|
@ -499,16 +482,6 @@ static usb_status_t USB_HostEhciCancelPipe(usb_host_ehci_instance_t *ehciInstanc
|
|||
usb_host_ehci_pipe_t *ehciPipePointer,
|
||||
usb_host_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief control ehci bus.
|
||||
*
|
||||
* @param ehciInstance ehci instance pointer.
|
||||
* @param bus_control control code.
|
||||
*
|
||||
* @return kStatus_USB_Success or error codes.
|
||||
*/
|
||||
static usb_status_t USB_HostEhciControlBus(usb_host_ehci_instance_t *ehciInstance, uint8_t busControl);
|
||||
|
||||
/*!
|
||||
* @brief ehci transaction done process function.
|
||||
*
|
||||
|
|
@ -516,20 +489,7 @@ static usb_status_t USB_HostEhciControlBus(usb_host_ehci_instance_t *ehciInstanc
|
|||
*/
|
||||
void USB_HostEhciTransactionDone(usb_host_ehci_instance_t *ehciInstance);
|
||||
|
||||
/*!
|
||||
* @brief ehci port change interrupt process function.
|
||||
*
|
||||
* @param ehciInstance ehci instance pointer.
|
||||
*/
|
||||
static void USB_HostEhciPortChange(usb_host_ehci_instance_t *ehciInstance);
|
||||
|
||||
/*!
|
||||
* @brief ehci timer0 interrupt process function.
|
||||
* cancel control/bulk transfer that time out.
|
||||
*
|
||||
* @param ehciInstance ehci instance pointer.
|
||||
*/
|
||||
static void USB_HostEhciTimer0(usb_host_ehci_instance_t *ehciInstance);
|
||||
|
||||
#if ((defined(USB_HOST_CONFIG_LOW_POWER_MODE)) && (USB_HOST_CONFIG_LOW_POWER_MODE > 0U))
|
||||
/*!
|
||||
|
|
@ -1830,7 +1790,7 @@ static void USB_HostEhciDelay(USBHS_Type *ehciIpBase, uint32_t ms)
|
|||
} while ((distance & EHCI_MAX_UFRAME_VALUE) < (ms * 8U)); /* compute the distance between sofStart and SofEnd */
|
||||
}
|
||||
|
||||
static void USB_HostEhciStartAsync(usb_host_ehci_instance_t *ehciInstance)
|
||||
void USB_HostEhciStartAsync(usb_host_ehci_instance_t *ehciInstance)
|
||||
{
|
||||
uint32_t stateSync;
|
||||
|
||||
|
|
@ -1868,7 +1828,7 @@ static void USB_HostEhciStopAsync(usb_host_ehci_instance_t *ehciInstance)
|
|||
}
|
||||
}
|
||||
|
||||
static void USB_HostEhciStartPeriodic(usb_host_ehci_instance_t *ehciInstance)
|
||||
void USB_HostEhciStartPeriodic(usb_host_ehci_instance_t *ehciInstance)
|
||||
{
|
||||
uint32_t stateSync;
|
||||
|
||||
|
|
@ -3515,7 +3475,7 @@ static usb_status_t USB_HostEhciCancelPipe(usb_host_ehci_instance_t *ehciInstanc
|
|||
return kStatus_USB_Success;
|
||||
}
|
||||
|
||||
static usb_status_t USB_HostEhciControlBus(usb_host_ehci_instance_t *ehciInstance, uint8_t busControl)
|
||||
usb_status_t USB_HostEhciControlBus(usb_host_ehci_instance_t *ehciInstance, uint8_t busControl)
|
||||
{
|
||||
usb_status_t status = kStatus_USB_Success;
|
||||
uint32_t portScRegister;
|
||||
|
|
@ -3863,7 +3823,7 @@ void USB_HostEhciTransactionDone(usb_host_ehci_instance_t *ehciInstance)
|
|||
}
|
||||
}
|
||||
|
||||
static void USB_HostEhciPortChange(usb_host_ehci_instance_t *ehciInstance)
|
||||
void USB_HostEhciPortChange(usb_host_ehci_instance_t *ehciInstance)
|
||||
{
|
||||
/* note: only has one port */
|
||||
uint32_t portScRegister = ehciInstance->ehciIpBase->PORTSC1;
|
||||
|
|
@ -3964,7 +3924,7 @@ static void USB_HostEhciPortChange(usb_host_ehci_instance_t *ehciInstance)
|
|||
}
|
||||
}
|
||||
|
||||
static void USB_HostEhciTimer0(usb_host_ehci_instance_t *ehciInstance)
|
||||
void USB_HostEhciTimer0(usb_host_ehci_instance_t *ehciInstance)
|
||||
{
|
||||
volatile usb_host_ehci_qh_t *vltQhPointer;
|
||||
usb_host_ehci_qtd_t *vltQtdPointer;
|
||||
|
|
|
|||
|
|
@ -474,6 +474,45 @@ extern usb_status_t USB_HostEhciIoctl(usb_host_controller_handle controllerHandl
|
|||
uint32_t ioctlEvent,
|
||||
void *ioctlParam);
|
||||
|
||||
/*!
|
||||
* @brief control ehci bus.
|
||||
*
|
||||
* @param ehciInstance ehci instance pointer.
|
||||
* @param bus_control control code.
|
||||
*
|
||||
* @return kStatus_USB_Success or error codes.
|
||||
*/
|
||||
extern usb_status_t USB_HostEhciControlBus(usb_host_ehci_instance_t *ehciInstance, uint8_t busControl);
|
||||
|
||||
/*!
|
||||
* @brief ehci port change interrupt process function.
|
||||
*
|
||||
* @param ehciInstance ehci instance pointer.
|
||||
*/
|
||||
extern void USB_HostEhciPortChange(usb_host_ehci_instance_t *ehciInstance);
|
||||
|
||||
/*!
|
||||
* @brief ehci timer0 interrupt process function.
|
||||
* cancel control/bulk transfer that time out.
|
||||
*
|
||||
* @param ehciInstance ehci instance pointer.
|
||||
*/
|
||||
extern void USB_HostEhciTimer0(usb_host_ehci_instance_t *ehciInstance);
|
||||
|
||||
/*!
|
||||
* @brief host ehci start async schedule.
|
||||
*
|
||||
* @param ehciInstance ehci instance pointer.
|
||||
*/
|
||||
extern void USB_HostEhciStartAsync(usb_host_ehci_instance_t *ehciInstance);
|
||||
|
||||
/*!
|
||||
* @brief host ehci start periodic schedule.
|
||||
*
|
||||
* @param ehciInstance ehci instance pointer.
|
||||
*/
|
||||
extern void USB_HostEhciStartPeriodic(usb_host_ehci_instance_t *ehciInstance);
|
||||
|
||||
/*! @}*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
|
|||
|
|
@ -7,7 +7,6 @@
|
|||
*/
|
||||
|
||||
#include <usb/include/usb_host_config.h>
|
||||
#include <fsl_os_abstraction.h>
|
||||
#include "usb_host.h"
|
||||
#include "usb_host_hci.h"
|
||||
#include "usb_host_devices.h"
|
||||
|
|
|
|||
|
|
@ -7,7 +7,6 @@
|
|||
*/
|
||||
|
||||
#include <usb/include/usb_host_config.h>
|
||||
#include <fsl_os_abstraction.h>
|
||||
#include "fsl_common.h"
|
||||
#include "usb_host.h"
|
||||
#include "usb_host_hci.h"
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@
|
|||
******************************************************************************/
|
||||
|
||||
/*! @brief USB host lock */
|
||||
#define USB_HostLock() OSA_MutexLock(hostInstance->hostMutex, RT_WAITING_FOREVER)
|
||||
#define USB_HostLock() OSA_MutexLock(hostInstance->hostMutex, USB_OSA_WAIT_TIMEOUT)
|
||||
/*! @brief USB host unlock */
|
||||
#define USB_HostUnlock() OSA_MutexUnlock(hostInstance->hostMutex)
|
||||
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@
|
|||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <fsl_common.h>
|
||||
#include <fsl_os_abstraction.h>
|
||||
#include "usb_misc.h"
|
||||
#include "usb_spec.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -1,63 +1,40 @@
|
|||
/*
|
||||
* Copyright 2015-2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2021 NXP
|
||||
* Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016 - 2019 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef __USB_HOST_CONFIG_H__
|
||||
#define __USB_HOST_CONFIG_H__
|
||||
#ifndef _USB_HOST_CONFIG_H_
|
||||
#define _USB_HOST_CONFIG_H_
|
||||
|
||||
/* Host Controller Enable */
|
||||
/*!
|
||||
* @brief host khci instance count, meantime it indicates khci enable or disabled.
|
||||
* - if 0, host khci driver is disabled.
|
||||
* - if greater than 0, host khci driver is enabled.
|
||||
* @brief host khci instance count, meantime it indicates khci enable or disable.
|
||||
* - if 0, host khci driver is disable.
|
||||
* - if greater than 0, host khci driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_KHCI (0U)
|
||||
|
||||
/*!
|
||||
* @brief host ehci instance count, meantime it indicates ehci enable or disabled.
|
||||
* - if 0, host ehci driver is disabled.
|
||||
* - if greater than 0, host ehci driver is enabled.
|
||||
* @brief host ehci instance count, meantime it indicates ehci enable or disable.
|
||||
* - if 0, host ehci driver is disable.
|
||||
* - if greater than 0, host ehci driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_EHCI (1U)
|
||||
#define USB_HOST_CONFIG_EHCI (2U)
|
||||
|
||||
/*!
|
||||
* @brief host ohci instance count, meantime it indicates ohci enable or disabled.
|
||||
* - if 0, host ohci driver is disabled.
|
||||
* - if greater than 0, host ohci driver is enabled.
|
||||
* @brief host ohci instance count, meantime it indicates ohci enable or disable.
|
||||
* - if 0, host ohci driver is disable.
|
||||
* - if greater than 0, host ohci driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_OHCI (0U)
|
||||
|
||||
/*!
|
||||
* @brief host ip3516hs instance count, meantime it indicates ohci enable or disabled.
|
||||
* - if 0, host ip3516hs driver is disabled.
|
||||
* - if greater than 0, host ip3516hs driver is enabled.
|
||||
* @brief host ip3516hs instance count, meantime it indicates ohci enable or disable.
|
||||
* - if 0, host ip3516hs driver is disable.
|
||||
* - if greater than 0, host ip3516hs driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_IP3516HS (0U)
|
||||
|
||||
|
|
@ -70,26 +47,17 @@
|
|||
#define USB_HOST_CONFIG_MAX_HOST \
|
||||
(USB_HOST_CONFIG_KHCI + USB_HOST_CONFIG_EHCI + USB_HOST_CONFIG_OHCI + USB_HOST_CONFIG_IP3516HS)
|
||||
|
||||
/*!
|
||||
* @brief hub pipe max count.
|
||||
* pipe is the host driver resource for device endpoint, one endpoint needs one pipe.
|
||||
* @remarks A HUB usually uses two pipes.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_HUB_MAX_PIPES (2U)
|
||||
|
||||
/*!
|
||||
* @brief host pipe max count.
|
||||
* pipe is the host driver resource for device endpoint, one endpoint needs one pipe.
|
||||
* @remarks Depends on the total number of device interfaces and HUB usage.
|
||||
* pipe is the host driver resource for device endpoint, one endpoint need one pipe.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_MAX_PIPES (USB_HOST_CONFIG_HUB_MAX_PIPES + 2U * USB_HOST_CONFIG_INTERFACE_MAX_EP)
|
||||
#define USB_HOST_CONFIG_MAX_PIPES (16U)
|
||||
|
||||
/*!
|
||||
* @brief host transfer max count.
|
||||
* transfer is the host driver resource for data transmission mission, one transmission mission needs one transfer.
|
||||
* @remarks Depends on the total number of device interfaces.
|
||||
* transfer is the host driver resource for data transmission mission, one transmission mission need one transfer.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_MAX_TRANSFERS (USB_HOST_CONFIG_MAX_PIPES)
|
||||
#define USB_HOST_CONFIG_MAX_TRANSFERS (16U)
|
||||
|
||||
/*!
|
||||
* @brief the max endpoint for one interface.
|
||||
|
|
@ -106,7 +74,6 @@
|
|||
/*!
|
||||
* @brief the max power for one device.
|
||||
* the max power the host can provide for one device.
|
||||
* Expressed in 2 mA units (i.e. 250 = 500 mA).
|
||||
*/
|
||||
#define USB_HOST_CONFIG_MAX_POWER (250U)
|
||||
|
||||
|
|
@ -135,7 +102,7 @@
|
|||
/*! @brief if 1, enable usb compliance test codes; if 0, disable usb compliance test codes. */
|
||||
#define USB_HOST_CONFIG_COMPLIANCE_TEST (0U)
|
||||
|
||||
/*! @brief if 1, class driver clear stall automatically; if 0, class driver doesn't clear stall. */
|
||||
/*! @brief if 1, class driver clear stall automatically; if 0, class driver don't clear stall. */
|
||||
#define USB_HOST_CONFIG_CLASS_AUTO_CLEAR_STALL (0U)
|
||||
|
||||
/* KHCI configuration */
|
||||
|
|
@ -159,25 +126,23 @@
|
|||
|
||||
/*!
|
||||
* @brief ehci QH max count.
|
||||
* @remarks Depends on the total number of device interfaces.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_EHCI_MAX_QH (USB_HOST_CONFIG_MAX_PIPES)
|
||||
#define USB_HOST_CONFIG_EHCI_MAX_QH (8U)
|
||||
|
||||
/*!
|
||||
* @brief ehci QTD max count.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_EHCI_MAX_QTD (USB_HOST_CONFIG_EHCI_MAX_QH)
|
||||
#define USB_HOST_CONFIG_EHCI_MAX_QTD (8U)
|
||||
|
||||
/*!
|
||||
* @brief ehci ITD max count.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_EHCI_MAX_ITD (USB_HOST_CONFIG_EHCI_MAX_SITD)
|
||||
#define USB_HOST_CONFIG_EHCI_MAX_ITD (0U)
|
||||
|
||||
/*!
|
||||
* @brief ehci SITD max count.
|
||||
* @remarks Depends on the total number of device interfaces that can have isochronous endpoints.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_EHCI_MAX_SITD (2U * USB_HOST_CONFIG_INTERFACE_MAX_EP)
|
||||
#define USB_HOST_CONFIG_EHCI_MAX_SITD (0U)
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -186,31 +151,25 @@
|
|||
|
||||
/*!
|
||||
* @brief ohci ED max count.
|
||||
* @remarks Depends on the total number of device interfaces.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_OHCI_MAX_ED (USB_HOST_CONFIG_MAX_PIPES)
|
||||
#define USB_HOST_CONFIG_OHCI_MAX_ED (8U)
|
||||
|
||||
/*!
|
||||
* @brief ohci GTD max count.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_OHCI_MAX_GTD (USB_HOST_CONFIG_OHCI_MAX_ED)
|
||||
#define USB_HOST_CONFIG_OHCI_MAX_GTD (8U)
|
||||
|
||||
/*!
|
||||
* @brief ohci ITD max count.
|
||||
* @remarks Depends on the total number of device interfaces that can have isochronous endpoints.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_OHCI_MAX_ITD (2U * USB_HOST_CONFIG_INTERFACE_MAX_EP)
|
||||
#define USB_HOST_CONFIG_OHCI_MAX_ITD (8U)
|
||||
|
||||
#endif
|
||||
|
||||
/* OHCI configuration */
|
||||
#if ((defined USB_HOST_CONFIG_IP3516HS) && (USB_HOST_CONFIG_IP3516HS))
|
||||
|
||||
/*!
|
||||
* @brief ohci PIPE max count.
|
||||
* @remarks Depends on the total number of device interfaces.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_IP3516HS_MAX_PIPE (USB_HOST_CONFIG_MAX_PIPES)
|
||||
#define USB_HOST_CONFIG_IP3516HS_MAX_PIPE (32U)
|
||||
|
||||
/*!
|
||||
* @brief ohci ED max count.
|
||||
|
|
@ -220,63 +179,69 @@
|
|||
/*!
|
||||
* @brief ohci GTD max count.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_IP3516HS_MAX_INT (USB_HOST_CONFIG_IP3516HS_MAX_ATL)
|
||||
#define USB_HOST_CONFIG_IP3516HS_MAX_INT (32U)
|
||||
|
||||
/*!
|
||||
* @brief ohci ITD max count.
|
||||
* @remarks Depends on the existence of device interfaces that can have isochronous endpoints.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_IP3516HS_MAX_ISO (USB_HOST_CONFIG_IP3516HS_MAX_ATL)
|
||||
#define USB_HOST_CONFIG_IP3516HS_MAX_ISO (0U)
|
||||
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief host HUB class instance count, meantime it indicates HUB class enable or disabled.
|
||||
* - if 0, host HUB class driver is disabled.
|
||||
* - if greater than 0, host HUB class driver is enabled.
|
||||
* @brief host HUB class instance count, meantime it indicates HUB class enable or disable.
|
||||
* - if 0, host HUB class driver is disable.
|
||||
* - if greater than 0, host HUB class driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_HUB (0U)
|
||||
|
||||
/*!
|
||||
* @brief host HID class instance count, meantime it indicates HID class enable or disabled.
|
||||
* - if 0, host HID class driver is disabled.
|
||||
* - if greater than 0, host HID class driver is enabled.
|
||||
* @brief host HID class instance count, meantime it indicates HID class enable or disable.
|
||||
* - if 0, host HID class driver is disable.
|
||||
* - if greater than 0, host HID class driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_HID (0U)
|
||||
|
||||
/*!
|
||||
* @brief host MSD class instance count, meantime it indicates MSD class enable or disabled.
|
||||
* - if 0, host MSD class driver is disabled.
|
||||
* - if greater than 0, host MSD class driver is enabled.
|
||||
* @brief host MSD class instance count, meantime it indicates MSD class enable or disable.
|
||||
* - if 0, host MSD class driver is disable.
|
||||
* - if greater than 0, host MSD class driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_MSD (0U)
|
||||
|
||||
/*!
|
||||
* @brief host CDC class instance count, meantime it indicates CDC class enable or disabled.
|
||||
* - if 0, host CDC class driver is disabled.
|
||||
* - if greater than 0, host CDC class driver is enabled.
|
||||
* @brief host CDC class instance count, meantime it indicates CDC class enable or disable.
|
||||
* - if 0, host CDC class driver is disable.
|
||||
* - if greater than 0, host CDC class driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_CDC (1U)
|
||||
#define USB_HOST_CONFIG_CDC (0U)
|
||||
|
||||
/*!
|
||||
* @brief host AUDIO class instance count, meantime it indicates AUDIO class enable or disabled.
|
||||
* - if 0, host AUDIO class driver is disabled.
|
||||
* - if greater than 0, host AUDIO class driver is enabled.
|
||||
* @brief host AUDIO class instance count, meantime it indicates AUDIO class enable or disable.
|
||||
* - if 0, host AUDIO class driver is disable.
|
||||
* - if greater than 0, host AUDIO class driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_AUDIO (0U)
|
||||
|
||||
/*!
|
||||
* @brief host PHDC class instance count, meantime it indicates PHDC class enable or disabled.
|
||||
* - if 0, host PHDC class driver is disabled.
|
||||
* - if greater than 0, host PHDC class driver is enabled.
|
||||
* @brief host PHDC class instance count, meantime it indicates PHDC class enable or disable.
|
||||
* - if 0, host PHDC class driver is disable.
|
||||
* - if greater than 0, host PHDC class driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_PHDC (0U)
|
||||
|
||||
/*!
|
||||
* @brief host printer class instance count, meantime it indicates printer class enable or disabled.
|
||||
* - if 0, host printer class driver is disabled.
|
||||
* - if greater than 0, host printer class driver is enabled.
|
||||
* @brief host printer class instance count, meantime it indicates printer class enable or disable.
|
||||
* - if 0, host printer class driver is disable.
|
||||
* - if greater than 0, host printer class driver is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_PRINTER (0U)
|
||||
|
||||
#endif /* __USB_HOST_CONFIG_H__ */
|
||||
/*!
|
||||
* @brief host charger detect enable or disable. It is only supported on RT600 currently.
|
||||
* - if 0, host charger detect is disable.
|
||||
* - if greater than 0, host charger detect is enable.
|
||||
*/
|
||||
#define USB_HOST_CONFIG_BATTERY_CHARGER (0U)
|
||||
|
||||
#endif /* _USB_HOST_CONFIG_H_ */
|
||||
|
|
|
|||
|
|
@ -1,46 +1,34 @@
|
|||
/*
|
||||
* Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016 NXP
|
||||
* Copyright 2016, 2019 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef __USB_MISC_H__
|
||||
#define __USB_MISC_H__
|
||||
|
||||
#ifndef ENDIANNESS
|
||||
|
||||
#error ENDIANNESS should be defined, and then rebulid the project.
|
||||
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @brief Define big endian */
|
||||
#define USB_BIG_ENDIAN (0U)
|
||||
/*! @brief Define little endian */
|
||||
#define USB_LITTLE_ENDIAN (1U)
|
||||
|
||||
/*! @brief Define current endian */
|
||||
#ifndef ENDIANNESS
|
||||
#define ENDIANNESS USB_LITTLE_ENDIAN
|
||||
#endif
|
||||
/*! @brief Define default timeout value */
|
||||
#if (defined(USE_RTOS) && (USE_RTOS > 0))
|
||||
#define USB_OSA_WAIT_TIMEOUT (osaWaitForever_c)
|
||||
#else
|
||||
#define USB_OSA_WAIT_TIMEOUT (0U)
|
||||
#endif /* (defined(USE_RTOS) && (USE_RTOS > 0)) */
|
||||
|
||||
/*! @brief Define USB printf */
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
|
|
@ -52,10 +40,14 @@ extern int DbgConsole_Printf(const char *fmt_s, ...);
|
|||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#ifndef __DSC__
|
||||
#if defined(SDK_DEBUGCONSOLE) && (SDK_DEBUGCONSOLE < 1)
|
||||
#define usb_echo printf
|
||||
#else
|
||||
#define usb_echo DbgConsole_Printf
|
||||
#define usb_echo rt_kprintf
|
||||
#endif
|
||||
#else
|
||||
#define usb_echo
|
||||
#endif
|
||||
|
||||
#if defined(__ICCARM__)
|
||||
|
|
@ -78,7 +70,7 @@ extern int DbgConsole_Printf(const char *fmt_s, ...);
|
|||
#define STRUCT_UNPACKED __attribute__((__packed__))
|
||||
#endif
|
||||
|
||||
#elif defined(__CC_ARM)
|
||||
#elif defined(__CC_ARM) || (defined(__ARMCC_VERSION))
|
||||
|
||||
#ifndef STRUCT_PACKED
|
||||
#define STRUCT_PACKED _Pragma("pack(1U)")
|
||||
|
|
@ -152,63 +144,64 @@ extern int DbgConsole_Printf(const char *fmt_s, ...);
|
|||
|
||||
#define USB_LONG_TO_LITTLE_ENDIAN_ADDRESS(n, m) \
|
||||
{ \
|
||||
m[3] = ((n >> 24U) & 0xFFU); \
|
||||
m[2] = ((n >> 16U) & 0xFFU); \
|
||||
m[1] = ((n >> 8U) & 0xFFU); \
|
||||
m[0] = (n & 0xFFU); \
|
||||
m[3] = (uint8_t)((((uint32_t)(n)) >> 24U) & 0xFFU); \
|
||||
m[2] = (uint8_t)((((uint32_t)(n)) >> 16U) & 0xFFU); \
|
||||
m[1] = (uint8_t)((((uint32_t)(n)) >> 8U) & 0xFFU); \
|
||||
m[0] = (uint8_t)(((uint32_t)(n)) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_LONG_FROM_LITTLE_ENDIAN_ADDRESS(n) \
|
||||
((uint32_t)((((uint8_t)n[3]) << 24U) | (((uint8_t)n[2]) << 16U) | (((uint8_t)n[1]) << 8U) | \
|
||||
(((uint8_t)n[0]) << 0U)))
|
||||
((uint32_t)((((uint32_t)n[3]) << 24U) | (((uint32_t)n[2]) << 16U) | (((uint32_t)n[1]) << 8U) | \
|
||||
(((uint32_t)n[0]) << 0U)))
|
||||
|
||||
#define USB_LONG_TO_BIG_ENDIAN_ADDRESS(n, m) \
|
||||
{ \
|
||||
m[0] = ((n >> 24U) & 0xFFU); \
|
||||
m[1] = ((n >> 16U) & 0xFFU); \
|
||||
m[2] = ((n >> 8U) & 0xFFU); \
|
||||
m[3] = (n & 0xFFU); \
|
||||
m[0] = ((((uint32_t)(n)) >> 24U) & 0xFFU); \
|
||||
m[1] = ((((uint32_t)(n)) >> 16U) & 0xFFU); \
|
||||
m[2] = ((((uint32_t)(n)) >> 8U) & 0xFFU); \
|
||||
m[3] = (((uint32_t)(n)) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_LONG_FROM_BIG_ENDIAN_ADDRESS(n) \
|
||||
((uint32_t)((((uint8_t)n[0]) << 24U) | (((uint8_t)n[1]) << 16U) | (((uint8_t)n[2]) << 8U) | \
|
||||
(((uint8_t)n[3]) << 0U)))
|
||||
((uint32_t)((((uint32_t)n[0]) << 24U) | (((uint32_t)n[1]) << 16U) | (((uint32_t)n[2]) << 8U) | \
|
||||
(((uint32_t)n[3]) << 0U)))
|
||||
|
||||
#define USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(n, m) \
|
||||
{ \
|
||||
m[1] = ((n >> 8U) & 0xFFU); \
|
||||
m[0] = (n & 0xFFU); \
|
||||
m[1] = ((((uint16_t)(n)) >> 8U) & 0xFFU); \
|
||||
m[0] = (((uint16_t)(n)) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_SHORT_FROM_LITTLE_ENDIAN_ADDRESS(n) ((uint32_t)((((uint8_t)n[1]) << 8U) | (((uint8_t)n[0]) << 0U)))
|
||||
#define USB_SHORT_FROM_LITTLE_ENDIAN_ADDRESS(n) ((uint16_t)((((uint16_t)n[1]) << 8U) | (((uint16_t)n[0]) << 0U)))
|
||||
|
||||
#define USB_SHORT_TO_BIG_ENDIAN_ADDRESS(n, m) \
|
||||
{ \
|
||||
m[0] = ((n >> 8U) & 0xFFU); \
|
||||
m[1] = (n & 0xFFU); \
|
||||
m[0] = ((((uint16_t)(n)) >> 8U) & 0xFFU); \
|
||||
m[1] = (((uint16_t)(n)) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_SHORT_FROM_BIG_ENDIAN_ADDRESS(n) ((uint32_t)((((uint8_t)n[0]) << 8U) | (((uint8_t)n[1]) << 0U)))
|
||||
#define USB_SHORT_FROM_BIG_ENDIAN_ADDRESS(n) ((uint16_t)((((uint16_t)n[0]) << 8U) | (((uint16_t)n[1]) << 0U)))
|
||||
|
||||
#define USB_LONG_TO_LITTLE_ENDIAN_DATA(n, m) \
|
||||
{ \
|
||||
*((uint8_t *)&(m) + 3) = ((n >> 24U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 2) = ((n >> 16U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 1) = ((n >> 8U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 0) = (n & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 3) = ((((uint32_t)(n)) >> 24U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 2) = ((((uint32_t)(n)) >> 16U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 1) = ((((uint32_t)(n)) >> 8U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 0) = (((uint32_t)(n)) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_LONG_FROM_LITTLE_ENDIAN_DATA(n) \
|
||||
((uint32_t)(((*((uint8_t *)&(n) + 3)) << 24U) | ((*((uint8_t *)&(n) + 2)) << 16U) | \
|
||||
((*((uint8_t *)&(n) + 1)) << 8U) | ((*((uint8_t *)&(n))) << 0U)))
|
||||
((uint32_t)(((uint32_t)(*((uint8_t *)&(n) + 3)) << 24U) | ((uint32_t)(*((uint8_t *)&(n) + 2)) << 16U) | \
|
||||
((uint32_t)(*((uint8_t *)&(n) + 1)) << 8U) | ((uint32_t)(*((uint8_t *)&(n))) << 0U)))
|
||||
|
||||
#define USB_SHORT_TO_LITTLE_ENDIAN_DATA(n, m) \
|
||||
{ \
|
||||
*((uint8_t *)&(m) + 1) = ((n >> 8U) & 0xFFU); \
|
||||
*((uint8_t *)&(m)) = ((n)&0xFFU); \
|
||||
*((uint8_t *)&(m) + 1) = ((((uint16_t)(n)) >> 8U) & 0xFFU); \
|
||||
*((uint8_t *)&(m)) = ((((uint16_t)(n))) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_SHORT_FROM_LITTLE_ENDIAN_DATA(n) ((uint32_t)(((*((uint8_t *)&(n) + 1)) << 8U) | ((*((uint8_t *)&(n))))))
|
||||
#define USB_SHORT_FROM_LITTLE_ENDIAN_DATA(n) \
|
||||
((uint16_t)((uint16_t)(*((uint8_t *)&(n) + 1)) << 8U) | ((uint16_t)(*((uint8_t *)&(n)))))
|
||||
|
||||
#else
|
||||
|
||||
|
|
@ -224,73 +217,74 @@ extern int DbgConsole_Printf(const char *fmt_s, ...);
|
|||
|
||||
#define USB_LONG_TO_LITTLE_ENDIAN_ADDRESS(n, m) \
|
||||
{ \
|
||||
m[3] = ((n >> 24U) & 0xFFU); \
|
||||
m[2] = ((n >> 16U) & 0xFFU); \
|
||||
m[1] = ((n >> 8U) & 0xFFU); \
|
||||
m[0] = (n & 0xFFU); \
|
||||
m[3] = (uint8_t)((((uint32_t)(n)) >> 24U) & 0xFFU); \
|
||||
m[2] = (uint8_t)((((uint32_t)(n)) >> 16U) & 0xFFU); \
|
||||
m[1] = (uint8_t)((((uint32_t)(n)) >> 8U) & 0xFFU); \
|
||||
m[0] = (uint8_t)(((uint32_t)(n)) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_LONG_FROM_LITTLE_ENDIAN_ADDRESS(n) \
|
||||
((uint32_t)((((uint8_t)n[3]) << 24U) | (((uint8_t)n[2]) << 16U) | (((uint8_t)n[1]) << 8U) | \
|
||||
(((uint8_t)n[0]) << 0U)))
|
||||
((uint32_t)((((uint32_t)n[3]) << 24U) | (((uint32_t)n[2]) << 16U) | (((uint32_t)n[1]) << 8U) | \
|
||||
(((uint32_t)n[0]) << 0U)))
|
||||
|
||||
#define USB_LONG_TO_BIG_ENDIAN_ADDRESS(n, m) \
|
||||
{ \
|
||||
m[0] = ((n >> 24U) & 0xFFU); \
|
||||
m[1] = ((n >> 16U) & 0xFFU); \
|
||||
m[2] = ((n >> 8U) & 0xFFU); \
|
||||
m[3] = (n & 0xFFU); \
|
||||
m[0] = ((((uint32_t)(n)) >> 24U) & 0xFFU); \
|
||||
m[1] = ((((uint32_t)(n)) >> 16U) & 0xFFU); \
|
||||
m[2] = ((((uint32_t)(n)) >> 8U) & 0xFFU); \
|
||||
m[3] = (((uint32_t)(n)) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_LONG_FROM_BIG_ENDIAN_ADDRESS(n) \
|
||||
((uint32_t)((((uint8_t)n[0]) << 24U) | (((uint8_t)n[1]) << 16U) | (((uint8_t)n[2]) << 8U) | \
|
||||
(((uint8_t)n[3]) << 0U)))
|
||||
((uint32_t)((((uint32_t)n[0]) << 24U) | (((uint32_t)n[1]) << 16U) | (((uint32_t)n[2]) << 8U) | \
|
||||
(((uint32_t)n[3]) << 0U)))
|
||||
|
||||
#define USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(n, m) \
|
||||
{ \
|
||||
m[1] = ((n >> 8U) & 0xFFU); \
|
||||
m[0] = (n & 0xFFU); \
|
||||
m[1] = ((((uint16_t)(n)) >> 8U) & 0xFFU); \
|
||||
m[0] = (((uint16_t)(n)) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_SHORT_FROM_LITTLE_ENDIAN_ADDRESS(n) ((uint32_t)((((uint8_t)n[1]) << 8U) | (((uint8_t)n[0]) << 0U)))
|
||||
#define USB_SHORT_FROM_LITTLE_ENDIAN_ADDRESS(n) ((uint16_t)((((uint16_t)n[1]) << 8U) | (((uint16_t)n[0]) << 0U)))
|
||||
|
||||
#define USB_SHORT_TO_BIG_ENDIAN_ADDRESS(n, m) \
|
||||
{ \
|
||||
m[0] = ((n >> 8U) & 0xFFU); \
|
||||
m[1] = (n & 0xFFU); \
|
||||
m[0] = ((((uint16_t)(n)) >> 8U) & 0xFFU); \
|
||||
m[1] = (((uint16_t)(n)) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_SHORT_FROM_BIG_ENDIAN_ADDRESS(n) ((uint32_t)((((uint8_t)n[0]) << 8U) | (((uint8_t)n[1]) << 0U)))
|
||||
#define USB_SHORT_FROM_BIG_ENDIAN_ADDRESS(n) ((uint16_t)((((uint16_t)n[0]) << 8U) | (((uint16_t)n[1]) << 0U)))
|
||||
|
||||
#define USB_LONG_TO_LITTLE_ENDIAN_DATA(n, m) \
|
||||
{ \
|
||||
*((uint8_t *)&(m) + 3) = ((n >> 24U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 2) = ((n >> 16U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 1) = ((n >> 8U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 0) = (n & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 3) = ((((uint32_t)(n)) >> 24U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 2) = ((((uint32_t)(n)) >> 16U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 1) = ((((uint32_t)(n)) >> 8U) & 0xFFU); \
|
||||
*((uint8_t *)&(m) + 0) = (((uint32_t)(n)) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_LONG_FROM_LITTLE_ENDIAN_DATA(n) \
|
||||
((uint32_t)(((*((uint8_t *)&(n) + 3)) << 24U) | ((*((uint8_t *)&(n) + 2)) << 16U) | \
|
||||
((*((uint8_t *)&(n) + 1)) << 8U) | ((*((uint8_t *)&(n))) << 0U)))
|
||||
((uint32_t)(((uint32_t)(*((uint8_t *)&(n) + 3)) << 24U) | ((uint32_t)(*((uint8_t *)&(n) + 2)) << 16U) | \
|
||||
((uint32_t)(*((uint8_t *)&(n) + 1)) << 8U) | ((uint32_t)(*((uint8_t *)&(n))) << 0U)))
|
||||
|
||||
#define USB_SHORT_TO_LITTLE_ENDIAN_DATA(n, m) \
|
||||
{ \
|
||||
*((uint8_t *)&(m) + 1) = ((n >> 8U) & 0xFFU); \
|
||||
*((uint8_t *)&(m)) = ((n)&0xFFU); \
|
||||
*((uint8_t *)&(m) + 1) = ((((uint16_t)(n)) >> 8U) & 0xFFU); \
|
||||
*((uint8_t *)&(m)) = ((((uint16_t)(n))) & 0xFFU); \
|
||||
}
|
||||
|
||||
#define USB_SHORT_FROM_LITTLE_ENDIAN_DATA(n) ((uint32_t)(((*((uint8_t *)&(n) + 1)) << 8U) | ((*((uint8_t *)&(n))))))
|
||||
#define USB_SHORT_FROM_LITTLE_ENDIAN_DATA(n) \
|
||||
((uint16_t)(((uint16_t)(*(((uint8_t *)&(n)) + 1)) << 8U) | ((uint16_t)(*((uint8_t *)&(n))))))
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The following MACROs (USB_GLOBAL, USB_BDT, USB_RAM_ADDRESS_ALIGNMENT, etc) are only used for USB device stack.
|
||||
* The USB device global variables are put into the section m_usb_global and m_usb_bdt or the section
|
||||
* .bss.m_usb_global and .bss.m_usb_bdt by using the MACRO USB_GLOBAL and USB_BDT. In this way, the USB device
|
||||
* The USB device global variables are put into the section m_usb_global and m_usb_bdt
|
||||
* by using the MACRO USB_GLOBAL and USB_BDT. In this way, the USB device
|
||||
* global variables can be linked into USB dedicated RAM by USB_STACK_USE_DEDICATED_RAM.
|
||||
* The MACRO USB_STACK_USE_DEDICATED_RAM is used to decide the USB stack uses dedicated RAM or not. The value of
|
||||
* the marco can be set as 0, USB_STACK_DEDICATED_RAM_TYPE_BDT_GLOBAL, or USB_STACK_DEDICATED_RAM_TYPE_BDT.
|
||||
* the macro can be set as 0, USB_STACK_DEDICATED_RAM_TYPE_BDT_GLOBAL, or USB_STACK_DEDICATED_RAM_TYPE_BDT.
|
||||
* The MACRO USB_STACK_DEDICATED_RAM_TYPE_BDT_GLOBAL means USB device global variables, including USB_BDT and
|
||||
* USB_GLOBAL, are put into the USB dedicated RAM. This feature can only be enabled when the USB dedicated RAM
|
||||
* is not less than 2K Bytes.
|
||||
|
|
@ -313,40 +307,63 @@ _Pragma("diag_suppress=Pm120")
|
|||
#define USB_RAM_ADDRESS_ALIGNMENT(n) USB_ALIGN_PRAGMA(data_alignment = n)
|
||||
_Pragma("diag_suppress=Pm120")
|
||||
#define USB_LINK_SECTION_PART(str) _Pragma(#str)
|
||||
#define USB_LINK_SECTION_SUB(sec) USB_LINK_SECTION_PART(location = #sec)
|
||||
#define USB_LINK_DMA_INIT_DATA(sec) USB_LINK_SECTION_PART(location = #sec)
|
||||
#define USB_LINK_USB_GLOBAL _Pragma("location = \"m_usb_global\"")
|
||||
#define USB_LINK_USB_BDT _Pragma("location = \"m_usb_bdt\"")
|
||||
#define USB_LINK_USB_GLOBAL_BSS _Pragma("location = \".bss.m_usb_global\"")
|
||||
#define USB_LINK_USB_BDT_BSS _Pragma("location = \".bss.m_usb_bdt\"")
|
||||
#define USB_LINK_USB_GLOBAL_BSS
|
||||
#define USB_LINK_USB_BDT_BSS
|
||||
_Pragma("diag_default=Pm120")
|
||||
#define USB_LINK_DMA_NONINIT_DATA _Pragma("location = \"m_usb_dma_noninit_data\"")
|
||||
#define USB_LINK_NONCACHE_NONINIT_DATA _Pragma("location = \"NonCacheable\"")
|
||||
#elif defined(__CC_ARM)
|
||||
#elif defined(__CC_ARM) || (defined(__ARMCC_VERSION))
|
||||
|
||||
#define USB_WEAK_VAR __attribute__((weak))
|
||||
#define USB_WEAK_FUN __weak
|
||||
#define USB_WEAK_FUN __attribute__((weak))
|
||||
#define USB_RAM_ADDRESS_ALIGNMENT(n) __attribute__((aligned(n)))
|
||||
#define USB_LINK_SECTION_SUB(sec) __attribute__((section(#sec)))
|
||||
#define USB_LINK_DMA_INIT_DATA(sec) __attribute__((section(#sec)))
|
||||
#if defined(__CC_ARM)
|
||||
#define USB_LINK_USB_GLOBAL __attribute__((section("m_usb_global"))) __attribute__((zero_init))
|
||||
#else
|
||||
#define USB_LINK_USB_GLOBAL __attribute__((section(".bss.m_usb_global")))
|
||||
#endif
|
||||
#if defined(__CC_ARM)
|
||||
#define USB_LINK_USB_BDT __attribute__((section("m_usb_bdt"))) __attribute__((zero_init))
|
||||
#define USB_LINK_USB_GLOBAL_BSS __attribute__((section(".bss.m_usb_global"))) __attribute__((zero_init))
|
||||
#define USB_LINK_USB_BDT_BSS __attribute__((section(".bss.m_usb_bdt"))) __attribute__((zero_init))
|
||||
#else
|
||||
#define USB_LINK_USB_BDT __attribute__((section(".bss.m_usb_bdt")))
|
||||
#endif
|
||||
#define USB_LINK_USB_GLOBAL_BSS
|
||||
#define USB_LINK_USB_BDT_BSS
|
||||
#if defined(__CC_ARM)
|
||||
#define USB_LINK_DMA_NONINIT_DATA __attribute__((section("m_usb_dma_noninit_data"))) __attribute__((zero_init))
|
||||
#else
|
||||
#define USB_LINK_DMA_NONINIT_DATA __attribute__((section(".bss.m_usb_dma_noninit_data")))
|
||||
#endif
|
||||
#if defined(__CC_ARM)
|
||||
#define USB_LINK_NONCACHE_NONINIT_DATA __attribute__((section("NonCacheable"))) __attribute__((zero_init))
|
||||
#else
|
||||
#define USB_LINK_NONCACHE_NONINIT_DATA __attribute__((section(".bss.NonCacheable")))
|
||||
#endif
|
||||
|
||||
#elif defined(__GNUC__)
|
||||
|
||||
#define USB_WEAK_VAR __attribute__((weak))
|
||||
#define USB_WEAK_FUN __attribute__((weak))
|
||||
#define USB_RAM_ADDRESS_ALIGNMENT(n) __attribute__((aligned(n)))
|
||||
#define USB_LINK_SECTION_SUB(sec) __attribute__((section(#sec)))
|
||||
#define USB_LINK_DMA_INIT_DATA(sec) __attribute__((section(#sec)))
|
||||
#define USB_LINK_USB_GLOBAL __attribute__((section("m_usb_global, \"aw\", %nobits @")))
|
||||
#define USB_LINK_USB_BDT __attribute__((section("m_usb_bdt, \"aw\", %nobits @")))
|
||||
#define USB_LINK_USB_GLOBAL_BSS __attribute__((section(".bss.m_usb_global, \"aw\", %nobits @")))
|
||||
#define USB_LINK_USB_BDT_BSS __attribute__((section(".bss.m_usb_bdt, \"aw\", %nobits @")))
|
||||
#define USB_LINK_USB_GLOBAL_BSS
|
||||
#define USB_LINK_USB_BDT_BSS
|
||||
#define USB_LINK_DMA_NONINIT_DATA __attribute__((section("m_usb_dma_noninit_data, \"aw\", %nobits @")))
|
||||
#define USB_LINK_NONCACHE_NONINIT_DATA __attribute__((section("NonCacheable, \"aw\", %nobits @")))
|
||||
|
||||
#elif (defined(__DSC__) && defined(__CW__))
|
||||
#define MAX(a, b) (((a) > (b)) ? (a) : (b))
|
||||
#define USB_WEAK_VAR __attribute__((weak))
|
||||
#define USB_WEAK_FUN __attribute__((weak))
|
||||
#define USB_RAM_ADDRESS_ALIGNMENT(n) __attribute__((aligned(n)))
|
||||
#define USB_LINK_USB_BDT_BSS
|
||||
#define USB_LINK_USB_GLOBAL_BSS
|
||||
#else
|
||||
#error The tool-chain is not supported.
|
||||
#endif
|
||||
|
|
@ -356,28 +373,32 @@ _Pragma("diag_suppress=Pm120")
|
|||
|
||||
#if ((defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)) && (defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)))
|
||||
#define USB_CACHE_LINESIZE MAX(FSL_FEATURE_L2CACHE_LINESIZE_BYTE, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
|
||||
#elif(defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE))
|
||||
#elif (defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE))
|
||||
#define USB_CACHE_LINESIZE MAX(FSL_FEATURE_L2CACHE_LINESIZE_BYTE, 0)
|
||||
#elif(defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE))
|
||||
#elif (defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE))
|
||||
#define USB_CACHE_LINESIZE MAX(0, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
|
||||
#else
|
||||
#define USB_CACHE_LINESIZE 4
|
||||
#define USB_CACHE_LINESIZE 4U
|
||||
#endif
|
||||
|
||||
#else
|
||||
#define USB_CACHE_LINESIZE 4
|
||||
#define USB_CACHE_LINESIZE 4U
|
||||
#endif
|
||||
|
||||
#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) || \
|
||||
((defined(USB_DEVICE_CONFIG_LPCIP3511HS)) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U)))
|
||||
#define USB_DATA_ALIGN 64
|
||||
#define USB_DATA_ALIGN 64U
|
||||
#else
|
||||
#define USB_DATA_ALIGN 4
|
||||
#define USB_DATA_ALIGN 4U
|
||||
#endif
|
||||
|
||||
#define USB_DATA_ALIGN_SIZE MAX(USB_CACHE_LINESIZE, USB_DATA_ALIGN)
|
||||
#if (USB_CACHE_LINESIZE > USB_DATA_ALIGN)
|
||||
#define USB_DATA_ALIGN_SIZE USB_CACHE_LINESIZE
|
||||
#else
|
||||
#define USB_DATA_ALIGN_SIZE USB_DATA_ALIGN
|
||||
#endif
|
||||
|
||||
#define USB_DATA_ALIGN_SIZE_MULTIPLE(n) ((n + USB_DATA_ALIGN_SIZE - 1) & (~(USB_DATA_ALIGN_SIZE - 1)))
|
||||
#define USB_DATA_ALIGN_SIZE_MULTIPLE(n) (((n) + USB_DATA_ALIGN_SIZE - 1U) & (~(USB_DATA_ALIGN_SIZE - 1U)))
|
||||
|
||||
#if defined(USB_STACK_USE_DEDICATED_RAM) && (USB_STACK_USE_DEDICATED_RAM == USB_STACK_DEDICATED_RAM_TYPE_BDT_GLOBAL)
|
||||
|
||||
|
|
@ -387,13 +408,19 @@ _Pragma("diag_suppress=Pm120")
|
|||
#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) || \
|
||||
(defined(USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE))
|
||||
#define USB_DMA_DATA_NONINIT_SUB USB_LINK_DMA_NONINIT_DATA
|
||||
#define USB_DMA_DATA_INIT_SUB USB_LINK_SECTION_SUB(m_usb_dma_init_data)
|
||||
#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(m_usb_dma_init_data)
|
||||
#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#else
|
||||
#if (defined(DATA_SECTION_IS_CACHEABLE) && (DATA_SECTION_IS_CACHEABLE))
|
||||
#define USB_DMA_DATA_NONINIT_SUB USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(NonCacheable.init)
|
||||
#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#else
|
||||
#define USB_DMA_DATA_NONINIT_SUB
|
||||
#define USB_DMA_DATA_INIT_SUB
|
||||
#define USB_CONTROLLER_DATA USB_LINK_USB_GLOBAL
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#elif defined(USB_STACK_USE_DEDICATED_RAM) && (USB_STACK_USE_DEDICATED_RAM == USB_STACK_DEDICATED_RAM_TYPE_BDT)
|
||||
|
||||
|
|
@ -403,7 +430,13 @@ _Pragma("diag_suppress=Pm120")
|
|||
(defined(USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE))
|
||||
#define USB_GLOBAL USB_LINK_DMA_NONINIT_DATA
|
||||
#define USB_DMA_DATA_NONINIT_SUB USB_LINK_DMA_NONINIT_DATA
|
||||
#define USB_DMA_DATA_INIT_SUB USB_LINK_SECTION_SUB(m_usb_dma_init_data)
|
||||
#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(m_usb_dma_init_data)
|
||||
#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#else
|
||||
#if (defined(DATA_SECTION_IS_CACHEABLE) && (DATA_SECTION_IS_CACHEABLE))
|
||||
#define USB_GLOBAL USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#define USB_DMA_DATA_NONINIT_SUB USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(NonCacheable.init)
|
||||
#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#else
|
||||
#define USB_GLOBAL USB_LINK_USB_GLOBAL_BSS
|
||||
|
|
@ -411,6 +444,7 @@ _Pragma("diag_suppress=Pm120")
|
|||
#define USB_DMA_DATA_INIT_SUB
|
||||
#define USB_CONTROLLER_DATA
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#else
|
||||
|
||||
|
|
@ -420,9 +454,17 @@ _Pragma("diag_suppress=Pm120")
|
|||
#define USB_GLOBAL USB_LINK_DMA_NONINIT_DATA
|
||||
#define USB_BDT USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#define USB_DMA_DATA_NONINIT_SUB USB_LINK_DMA_NONINIT_DATA
|
||||
#define USB_DMA_DATA_INIT_SUB USB_LINK_SECTION_SUB(m_usb_dma_init_data)
|
||||
#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(m_usb_dma_init_data)
|
||||
#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
|
||||
|
||||
#else
|
||||
|
||||
#if (defined(DATA_SECTION_IS_CACHEABLE) && (DATA_SECTION_IS_CACHEABLE))
|
||||
#define USB_GLOBAL USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#define USB_BDT USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#define USB_DMA_DATA_NONINIT_SUB USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(NonCacheable.init)
|
||||
#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
|
||||
#else
|
||||
#define USB_GLOBAL USB_LINK_USB_GLOBAL_BSS
|
||||
#define USB_BDT USB_LINK_USB_BDT_BSS
|
||||
|
|
@ -433,6 +475,8 @@ _Pragma("diag_suppress=Pm120")
|
|||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#define USB_DMA_NONINIT_DATA_ALIGN(n) USB_RAM_ADDRESS_ALIGNMENT(n) USB_DMA_DATA_NONINIT_SUB
|
||||
#define USB_DMA_INIT_DATA_ALIGN(n) USB_RAM_ADDRESS_ALIGNMENT(n) USB_DMA_DATA_INIT_SUB
|
||||
|
||||
|
|
|
|||
|
|
@ -840,7 +840,7 @@ int nu_usbh_register(void)
|
|||
RT_ASSERT(res == RT_EOK);
|
||||
|
||||
/*initialize the usb host function */
|
||||
res = rt_usb_host_init();
|
||||
res = rt_usb_host_init("usbh");
|
||||
RT_ASSERT(res == RT_EOK);
|
||||
|
||||
#if defined(RT_USING_PM)
|
||||
|
|
|
|||
|
|
@ -130,7 +130,7 @@ void rt_init_thread_entry(void* parameter)
|
|||
#endif
|
||||
|
||||
#ifdef RT_USING_USB_HOST
|
||||
rt_usb_host_init();
|
||||
rt_usb_host_init("usbh");
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
|
|
|
|||
|
|
@ -241,7 +241,7 @@ int stm_usbh_register(void)
|
|||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
rt_usb_host_init();
|
||||
rt_usb_host_init("usbh");
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -642,6 +642,14 @@ menu "Using USB"
|
|||
string "Udisk mount dir"
|
||||
default "/"
|
||||
endif
|
||||
config RT_USBH_HID
|
||||
bool "Enable HID Drivers"
|
||||
default n
|
||||
if RT_USBH_HID
|
||||
config RT_USBH_HID_MOUSE
|
||||
bool "Enable HID mouse protocol"
|
||||
default n
|
||||
endif
|
||||
endif
|
||||
config RT_USING_USB_DEVICE
|
||||
bool "Using USB device"
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ static rt_list_t _protocal_list;
|
|||
*
|
||||
* @return the error code, RT_EOK on successfully.
|
||||
*/
|
||||
rt_err_t rt_usbh_hid_set_idle(struct uintf* intf, int duration, int report_id)
|
||||
rt_err_t rt_usbh_hid_set_idle(struct uhintf* intf, int duration, int report_id)
|
||||
{
|
||||
struct urequest setup;
|
||||
struct uinstance* device;
|
||||
|
|
@ -40,14 +40,15 @@ rt_err_t rt_usbh_hid_set_idle(struct uintf* intf, int duration, int report_id)
|
|||
|
||||
setup.request_type = USB_REQ_TYPE_DIR_OUT | USB_REQ_TYPE_CLASS |
|
||||
USB_REQ_TYPE_INTERFACE;
|
||||
setup.request = USB_REQ_SET_IDLE;
|
||||
setup.index = 0;
|
||||
setup.length = 0;
|
||||
setup.value = (duration << 8 )| report_id;
|
||||
setup.bRequest = USB_REQ_SET_IDLE;
|
||||
setup.wIndex = 0;
|
||||
setup.wLength = 0;
|
||||
setup.wValue = (duration << 8 )| report_id;
|
||||
|
||||
if(rt_usb_hcd_control_xfer(device->hcd, device, &setup, RT_NULL, 0,
|
||||
timeout) == 0) return RT_EOK;
|
||||
else return -RT_FALSE;
|
||||
if (rt_usb_hcd_setup_xfer(device->hcd, device->pipe_ep0_out, &setup, timeout) == 8)
|
||||
return RT_EOK;
|
||||
else
|
||||
return -RT_FALSE;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -59,7 +60,7 @@ rt_err_t rt_usbh_hid_set_idle(struct uintf* intf, int duration, int report_id)
|
|||
*
|
||||
* @return the error code, RT_EOK on successfully.
|
||||
*/
|
||||
rt_err_t rt_usbh_hid_get_report(struct uintf* intf, rt_uint8_t type,
|
||||
rt_err_t rt_usbh_hid_get_report(struct uhintf* intf, rt_uint8_t type,
|
||||
rt_uint8_t id, rt_uint8_t *buffer, rt_size_t size)
|
||||
{
|
||||
struct urequest setup;
|
||||
|
|
@ -74,14 +75,24 @@ rt_err_t rt_usbh_hid_get_report(struct uintf* intf, rt_uint8_t type,
|
|||
|
||||
setup.request_type = USB_REQ_TYPE_DIR_IN | USB_REQ_TYPE_CLASS |
|
||||
USB_REQ_TYPE_INTERFACE;
|
||||
setup.request = USB_REQ_GET_REPORT;
|
||||
setup.index = intf->intf_desc->bInterfaceNumber;
|
||||
setup.length = size;
|
||||
setup.value = (type << 8 ) + id;
|
||||
setup.bRequest = USB_REQ_GET_REPORT;
|
||||
setup.wIndex = intf->intf_desc->bInterfaceNumber;
|
||||
setup.wLength = size;
|
||||
setup.wValue = (type << 8 ) + id;
|
||||
|
||||
if(rt_usb_hcd_control_xfer(device->hcd, device, &setup, buffer, size,
|
||||
timeout) == size) return RT_EOK;
|
||||
else return -RT_FALSE;
|
||||
if (rt_usb_hcd_setup_xfer(device->hcd, device->pipe_ep0_out, &setup, timeout) == 8)
|
||||
{
|
||||
if (rt_usb_hcd_pipe_xfer(device->hcd, device->pipe_ep0_in, buffer, size, timeout) == size)
|
||||
{
|
||||
if (rt_usb_hcd_pipe_xfer(device->hcd, device->pipe_ep0_out, RT_NULL, 0, timeout) == 0)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
return -RT_FALSE;
|
||||
return -RT_FALSE;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -93,7 +104,7 @@ rt_err_t rt_usbh_hid_get_report(struct uintf* intf, rt_uint8_t type,
|
|||
*
|
||||
* @return the error code, RT_EOK on successfully.
|
||||
*/
|
||||
rt_err_t rt_usbh_hid_set_report(struct uintf* intf, rt_uint8_t *buffer, rt_size_t size)
|
||||
rt_err_t rt_usbh_hid_set_report(struct uhintf* intf, rt_uint8_t *buffer, rt_size_t size)
|
||||
{
|
||||
struct urequest setup;
|
||||
struct uinstance* device;
|
||||
|
|
@ -107,14 +118,15 @@ rt_err_t rt_usbh_hid_set_report(struct uintf* intf, rt_uint8_t *buffer, rt_size_
|
|||
|
||||
setup.request_type = USB_REQ_TYPE_DIR_OUT | USB_REQ_TYPE_CLASS |
|
||||
USB_REQ_TYPE_INTERFACE;
|
||||
setup.request = USB_REQ_SET_REPORT;
|
||||
setup.index = intf->intf_desc->bInterfaceNumber;
|
||||
setup.length = size;
|
||||
setup.value = 0x02 << 8;
|
||||
setup.bRequest = USB_REQ_SET_REPORT;
|
||||
setup.wIndex = intf->intf_desc->bInterfaceNumber;
|
||||
setup.wLength = size;
|
||||
setup.wValue = 0x02 << 8;
|
||||
|
||||
if(rt_usb_hcd_control_xfer(device->hcd, device, &setup, buffer, size,
|
||||
timeout) == size) return RT_EOK;
|
||||
else return -RT_FALSE;
|
||||
if (rt_usb_hcd_setup_xfer(device->hcd, device->pipe_ep0_out, &setup, timeout) == 8)
|
||||
return RT_EOK;
|
||||
else
|
||||
return -RT_FALSE;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -125,7 +137,7 @@ rt_err_t rt_usbh_hid_set_report(struct uintf* intf, rt_uint8_t *buffer, rt_size_
|
|||
*
|
||||
* @return the error code, RT_EOK on successfully.
|
||||
*/
|
||||
rt_err_t rt_usbh_hid_set_protocal(struct uintf* intf, int protocol)
|
||||
rt_err_t rt_usbh_hid_set_protocal(struct uhintf* intf, int protocol)
|
||||
{
|
||||
struct urequest setup;
|
||||
struct uinstance* device;
|
||||
|
|
@ -139,14 +151,15 @@ rt_err_t rt_usbh_hid_set_protocal(struct uintf* intf, int protocol)
|
|||
|
||||
setup.request_type = USB_REQ_TYPE_DIR_OUT | USB_REQ_TYPE_CLASS |
|
||||
USB_REQ_TYPE_INTERFACE;
|
||||
setup.request = USB_REQ_SET_PROTOCOL;
|
||||
setup.index = 0;
|
||||
setup.length = 0;
|
||||
setup.value = protocol;
|
||||
setup.bRequest = USB_REQ_SET_PROTOCOL;
|
||||
setup.wIndex = 0;
|
||||
setup.wLength = 0;
|
||||
setup.wValue = protocol;
|
||||
|
||||
if(rt_usb_hcd_control_xfer(device->hcd, device, &setup, RT_NULL, 0,
|
||||
timeout) == 0) return RT_EOK;
|
||||
else return -RT_FALSE;
|
||||
if (rt_usb_hcd_setup_xfer(device->hcd, device->pipe_ep0_out, &setup, timeout) == 8)
|
||||
return RT_EOK;
|
||||
else
|
||||
return -RT_FALSE;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -159,7 +172,7 @@ rt_err_t rt_usbh_hid_set_protocal(struct uintf* intf, int protocol)
|
|||
*
|
||||
* @return the error code, RT_EOK on successfully.
|
||||
*/
|
||||
rt_err_t rt_usbh_hid_get_report_descriptor(struct uintf* intf,
|
||||
rt_err_t rt_usbh_hid_get_report_descriptor(struct uhintf* intf,
|
||||
rt_uint8_t *buffer, rt_size_t size)
|
||||
{
|
||||
struct urequest setup;
|
||||
|
|
@ -174,14 +187,24 @@ rt_err_t rt_usbh_hid_get_report_descriptor(struct uintf* intf,
|
|||
|
||||
setup.request_type = USB_REQ_TYPE_DIR_IN | USB_REQ_TYPE_STANDARD|
|
||||
USB_REQ_TYPE_INTERFACE;
|
||||
setup.request = USB_REQ_GET_DESCRIPTOR;
|
||||
setup.index = 0;
|
||||
setup.length = size;
|
||||
setup.value = USB_DESC_TYPE_REPORT << 8;
|
||||
setup.bRequest = USB_REQ_GET_DESCRIPTOR;
|
||||
setup.wIndex = 0;
|
||||
setup.wLength = size;
|
||||
setup.wValue = USB_DESC_TYPE_REPORT << 8;
|
||||
|
||||
if(rt_usb_hcd_control_xfer(device->hcd, device, &setup, buffer, size,
|
||||
timeout) == size) return RT_EOK;
|
||||
else return -RT_FALSE;
|
||||
if (rt_usb_hcd_setup_xfer(device->hcd, device->pipe_ep0_out, &setup, timeout) == 8)
|
||||
{
|
||||
if (rt_usb_hcd_pipe_xfer(device->hcd, device->pipe_ep0_in, buffer, size, timeout) == size)
|
||||
{
|
||||
if (rt_usb_hcd_pipe_xfer(device->hcd, device->pipe_ep0_out, RT_NULL, 0, timeout) == 0)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
return -RT_FALSE;
|
||||
return -RT_FALSE;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -220,16 +243,16 @@ static void rt_usbh_hid_callback(void* context)
|
|||
RT_ASSERT(context != RT_NULL);
|
||||
|
||||
pipe = (upipe_t)context;
|
||||
hid = (struct uhid*)pipe->intf->user_data;
|
||||
hid = (struct uhid*)((struct uhintf*)pipe->inst)->user_data;
|
||||
|
||||
/* invoke protocal callback function */
|
||||
hid->protocal->callback((void*)hid);
|
||||
|
||||
/* parameter check */
|
||||
RT_ASSERT(pipe->intf->device->hcd != RT_NULL);
|
||||
RT_ASSERT(((struct uhintf*)pipe->inst)->device->hcd != RT_NULL);
|
||||
|
||||
rt_usb_hcd_int_xfer(pipe->intf->device->hcd, pipe, hid->buffer,
|
||||
pipe->ep.wMaxPacketSize, timeout);
|
||||
rt_usb_hcd_pipe_xfer(((struct uhintf*)pipe->inst)->device->hcd, pipe,
|
||||
hid->buffer, pipe->ep.wMaxPacketSize, timeout);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -268,9 +291,7 @@ static rt_err_t rt_usbh_hid_enable(void* arg)
|
|||
int i = 0, pro_id;
|
||||
uprotocal_t protocal;
|
||||
struct uhid* hid;
|
||||
struct uintf* intf = (struct uintf*)arg;
|
||||
int timeout = USB_TIMEOUT_BASIC;
|
||||
upipe_t pipe;
|
||||
struct uhintf* intf = (struct uhintf*)arg;
|
||||
|
||||
/* parameter check */
|
||||
if(intf == RT_NULL)
|
||||
|
|
@ -319,19 +340,13 @@ static rt_err_t rt_usbh_hid_enable(void* arg)
|
|||
if(!(ep_desc->bEndpointAddress & USB_DIR_IN)) continue;
|
||||
|
||||
ret = rt_usb_hcd_alloc_pipe(intf->device->hcd, &hid->pipe_in,
|
||||
intf, ep_desc, rt_usbh_hid_callback);
|
||||
intf, ep_desc);
|
||||
if(ret != RT_EOK) return ret;
|
||||
}
|
||||
|
||||
/* initialize hid protocal */
|
||||
hid->protocal->init((void*)intf);
|
||||
pipe = hid->pipe_in;
|
||||
|
||||
/* parameter check */
|
||||
RT_ASSERT(pipe->intf->device->hcd != RT_NULL);
|
||||
|
||||
rt_usb_hcd_int_xfer(pipe->intf->device->hcd, hid->pipe_in,
|
||||
hid->buffer, hid->pipe_in->ep.wMaxPacketSize, timeout);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
|
|
@ -346,7 +361,7 @@ static rt_err_t rt_usbh_hid_enable(void* arg)
|
|||
static rt_err_t rt_usbh_hid_disable(void* arg)
|
||||
{
|
||||
struct uhid* hid;
|
||||
struct uintf* intf = (struct uintf*)arg;
|
||||
struct uhintf* intf = (struct uhintf*)arg;
|
||||
|
||||
RT_ASSERT(intf != RT_NULL);
|
||||
|
||||
|
|
@ -365,9 +380,6 @@ static rt_err_t rt_usbh_hid_disable(void* arg)
|
|||
rt_free(hid);
|
||||
}
|
||||
|
||||
/* free the instance */
|
||||
rt_free(intf);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -31,11 +31,11 @@ typedef struct uhid uhid_t;
|
|||
#define USB_HID_KEYBOARD 1
|
||||
#define USB_HID_MOUSE 2
|
||||
|
||||
rt_err_t rt_usbh_hid_set_idle(struct uintf* intf, int duration, int report_id);
|
||||
rt_err_t rt_usbh_hid_get_report(struct uintf* intf, rt_uint8_t type, rt_uint8_t id, rt_uint8_t *buffer, rt_size_t size);
|
||||
rt_err_t rt_usbh_hid_set_report(struct uintf* intf, rt_uint8_t *buffer, rt_size_t size);
|
||||
rt_err_t rt_usbh_hid_set_protocal(struct uintf* intf, int protocol);
|
||||
rt_err_t rt_usbh_hid_get_report_descriptor(struct uintf* intf, rt_uint8_t *buffer, rt_size_t size);
|
||||
rt_err_t rt_usbh_hid_set_idle(struct uhintf* intf, int duration, int report_id);
|
||||
rt_err_t rt_usbh_hid_get_report(struct uhintf* intf, rt_uint8_t type, rt_uint8_t id, rt_uint8_t *buffer, rt_size_t size);
|
||||
rt_err_t rt_usbh_hid_set_report(struct uhintf* intf, rt_uint8_t *buffer, rt_size_t size);
|
||||
rt_err_t rt_usbh_hid_set_protocal(struct uhintf* intf, int protocol);
|
||||
rt_err_t rt_usbh_hid_get_report_descriptor(struct uhintf* intf, rt_uint8_t *buffer, rt_size_t size);
|
||||
rt_err_t rt_usbh_hid_protocal_register(uprotocal_t protocal);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -126,15 +126,36 @@ static rt_err_t rt_usbh_hid_mouse_callback(void* arg)
|
|||
return RT_EOK;
|
||||
}
|
||||
|
||||
rt_thread_t mouse_thread;
|
||||
void mouse_task(void* param)
|
||||
{
|
||||
struct uhintf* intf = (struct uhintf*)param;
|
||||
while (1)
|
||||
{
|
||||
if (rt_usb_hcd_pipe_xfer(intf->device->hcd, ((struct uhid*)intf->user_data)->pipe_in,
|
||||
((struct uhid*)intf->user_data)->buffer, ((struct uhid*)intf->user_data)->pipe_in->ep.wMaxPacketSize,
|
||||
USB_TIMEOUT_BASIC) == 0)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
rt_usbh_hid_mouse_callback(intf->user_data);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static rt_err_t rt_usbh_hid_mouse_init(void* arg)
|
||||
{
|
||||
struct uintf* intf = (struct uintf*)arg;
|
||||
struct uhintf* intf = (struct uhintf*)arg;
|
||||
|
||||
RT_ASSERT(intf != RT_NULL);
|
||||
|
||||
rt_usbh_hid_set_protocal(intf, 0);
|
||||
|
||||
rt_usbh_hid_set_idle(intf, 10, 0);
|
||||
rt_usbh_hid_set_idle(intf, 0, 0);
|
||||
|
||||
mouse_thread = rt_thread_create("mouse0", mouse_task, intf, 500, 8, 100);
|
||||
rt_thread_startup(mouse_thread);
|
||||
|
||||
RT_DEBUG_LOG(RT_DEBUG_USB, ("start usb mouse\n"));
|
||||
#ifdef RT_USING_RTGUI
|
||||
|
|
|
|||
|
|
@ -701,6 +701,7 @@ void rt_usbh_hub_init(uhcd_t hcd)
|
|||
rt_thread_t thread;
|
||||
/* create root hub for hcd */
|
||||
hcd->roothub = rt_malloc(sizeof(struct uhub));
|
||||
rt_memset(hcd->roothub, 0, sizeof(struct uhub));
|
||||
hcd->roothub->is_roothub = RT_TRUE;
|
||||
hcd->roothub->hcd = hcd;
|
||||
hcd->roothub->num_ports = hcd->num_ports;
|
||||
|
|
|
|||
|
|
@ -44,6 +44,16 @@ rt_err_t rt_usb_host_init(const char *name)
|
|||
/* register mass storage class driver */
|
||||
drv = rt_usbh_class_driver_storage();
|
||||
rt_usbh_class_driver_register(drv);
|
||||
#endif
|
||||
#ifdef RT_USBH_HID
|
||||
/* register mass storage class driver */
|
||||
drv = rt_usbh_class_driver_hid();
|
||||
rt_usbh_class_driver_register(drv);
|
||||
#ifdef RT_USBH_HID_MOUSE
|
||||
uprotocal_t protocal;
|
||||
protocal = rt_usbh_hid_protocal_mouse();
|
||||
rt_usbh_hid_protocal_register(protocal);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* register hub class driver */
|
||||
|
|
|
|||
Loading…
Reference in New Issue