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[update] add stm32mp157a-st-ev1 bsp

This commit is contained in:
thread-liu 2020-08-13 12:00:14 +08:00
parent 6442bc6d26
commit b4c4d554c9
50 changed files with 21276 additions and 3 deletions
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6
bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/arm/startup_stm32mp15xx.s
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@ -14,8 +14,8 @@
;****************************************************************************** ;******************************************************************************
;* @attention ;* @attention
;* ;*
;* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. ;* &copy; Copyright (c) 2019 STMicroelectronics.
;* All rights reserved.</center></h2> ;* All rights reserved.
;* ;*
;* This software component is licensed by ST under BSD 3-Clause license, ;* This software component is licensed by ST under BSD 3-Clause license,
;* the "License"; You may not use this file except in compliance with the ;* the "License"; You may not use this file except in compliance with the
@ -30,7 +30,7 @@
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h> ; </h>
Stack_Size EQU 0x00000400 Stack_Size EQU 0x00000800
AREA STACK, NOINIT, READWRITE, ALIGN=3 AREA STACK, NOINIT, READWRITE, ALIGN=3
__stack_limit __stack_limit

450
bsp/stm32/stm32mp157a-st-ev1/.config Normal file
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@ -0,0 +1,450 @@
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_NOHEAP is not set
# CONFIG_RT_USING_SMALL_MEM is not set
# CONFIG_RT_USING_SLAB is not set
CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
CONFIG_RT_VER_NUM=0x40003
CONFIG_ARCH_ARM=y
CONFIG_RT_USING_CPU_FFS=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M4=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
# CONFIG_FINSH_USING_MSH_ONLY is not set
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_LWP is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
# CONFIG_PKG_USING_MAX7219 is not set
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_SERIES_STM32MP1=y
#
# Hardware Drivers Config
#
CONFIG_SOC_STM32MP157A=y
#
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_STLINK_TO_USART=y
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
# CONFIG_BSP_USING_WWDG is not set
CONFIG_BSP_USING_UART=y
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_UART3_RX_USING_DMA is not set
CONFIG_BSP_USING_UART4=y
# CONFIG_BSP_UART4_RX_USING_DMA is not set
# CONFIG_BSP_UART4_TX_USING_DMA is not set
# CONFIG_BSP_USING_TIM is not set
# CONFIG_BSP_USING_LPTIM is not set
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_DAC is not set
# CONFIG_BSP_USING_I2C1 is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_CRC is not set
# CONFIG_BSP_USING_RNG is not set
# CONFIG_BSP_USING_UDID is not set
#
# Board extended module Drivers
#

42
bsp/stm32/stm32mp157a-st-ev1/.gitignore vendored Normal file
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@ -0,0 +1,42 @@
*.pyc
*.map
*.dblite
*.elf
*.bin
*.hex
*.axf
*.exe
*.pdb
*.idb
*.ilk
*.old
build
Debug
documentation/html
packages/
*~
*.o
*.obj
*.out
*.bak
*.dep
*.lib
*.i
*.d
.DS_Stor*
.config 3
.config 4
.config 5
Midea-X1
*.uimg
GPATH
GRTAGS
GTAGS
.vscode
JLinkLog.txt
JLinkSettings.ini
DebugConfig/
RTE/
settings/
*.uvguix*
cconfig.h

11
bsp/stm32/stm32mp157a-st-ev1/.project Normal file
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@ -0,0 +1,11 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>STM32MP157</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
</buildSpec>
<natures>
</natures>
</projectDescription>

9
bsp/stm32/stm32mp157a-st-ev1/EventRecorderStub.scvd Normal file
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@ -0,0 +1,9 @@
<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

22
bsp/stm32/stm32mp157a-st-ev1/Kconfig Normal file
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@ -0,0 +1,22 @@
mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "../libraries/Kconfig"
source "board/Kconfig"

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bsp/stm32/stm32mp157a-st-ev1/README.md Normal file
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@ -0,0 +1,168 @@
# STM32MP157A-EV1 BSP (Board Support Package) Execution Instruction
[中文页](README_zh.md) |
# Introduction
This document records the execution instruction of the BSP (board support package) provided by the RT-Thread development team for the STM32MP157A-EV1 development board.
The document is covered in three parts:
- STM32MP157A-EV1 Board Resources Introduction
- Quickly Get Started
- Advanced Features
By reading the Quickly Get Started section developers can quickly get their hands on this BSP and run RT-Thread on the board. More advanced features will be introduced in the Advanced Features section to help developers take advantage of RT-Thread to drive more on-board resources.
## STM32MP157A-EV1 Board Resources Introduction
The STM32MP157A-EV1 is a development board based on a dual Cortex-A7 and Cortex-M4 core. The Cortex-A7 core operates at 650 MHZ and the Cortex-M4 operates at 209MHZ. There is no Flash inside the STM32MP157A.
​ ![board](figures/board.png)
The mainly-used **on-board resources** are shown as follows:
* MCU : STM32MP157AAAx
* Common peripherals:
- 4 LEDs: LD4(PD8), LD5(PD9), LD2(PA13), LD3(PA14)
- 4 Buttons: WAKE_UP, RESET (NRST), USER1(PA13), USER2 (PA14)
* Common-used interface: USB, SD card, Ethernet, MIPI, USB HOST, Audio, HDMI, Arduino.
* Debug interface: Standard JTAG/SWD.
For more details about this board, please refer to the ST official documentation:
[STM32MP157A-EV1 Development board introduction](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-eval-boards/stm32mp157a-ev1.html)
## Peripheral Condition
Each peripheral supporting condition for this BSP is as follows:
| On-board Peripheral | **Support** | **Remark** |
| :----------------------------- | :---------: | :--------------: |
| USB TO UART | YES | |
| PMIC | NO | |
| CAMERA | NO | OV5640 |
| MFX | NO | |
| FMC | NO | MT25F8G08A8ACAH4 |
| QSPI FLASH | NO | MX25L51245G |
| OpenAMP | NO | |
| POWER | NO | |
| SD Card (SDMMC1) | NO | |
| EMMC(SDMMC2) | NO | |
| ETH | NO | |
| AUDIO | NO | WM8994 |
| **On-chip Peripheral Drivers** | **Support** | **Remark** |
| GPIO | YES | |
| UART | YES | UART4 (ST-Link) |
| EXTI | YES | |
| SPI | YES | |
| TIM | YES | |
| LPTIM | YES | |
| I2C | YES | Software |
| ADC | YES | |
| DAC | YES | |
| WWDG | YES | |
| MDMA | NO | |
| SPDIFRX | NO | |
| DFSDM | NO | |
| PWM | NO | |
| FDCAN | NO | |
| CRC | NO | |
| RNG | NO | |
| HASH | NO | |
| CRYP | NO | |
## Execution Instruction
### Quickly Get Started
This BSP provides IAR projects for developers. Here's an example of the IAR development environment, to introduce how to run the system.
#### Hardware Connection
Use a USB cable to connect the development board to the PC and turn on the power switch.
#### Compile And Download
Double-click the project.eww file, to open the IAR project, compile and download the program to the board.
> By default, the project uses ST_LINK simulator to download the program, when the ST_LINK connects the board, clicking the download button can download the program to the board.
#### Running Results
After the program is successfully downloaded, the system runs automatically. Observe the running results of the LED on the development board, the orange LD4 will flash periodically.
Connect the serial port of the board to PC, communicate with it via a serial terminal tool (115200-8-1-N). Restart the board and the startup information of RT-Thread will be observed:
```bash
\ | /
- RT - Thread Operating System
/ | \ 3.1.1 build Nov 19 2018
2006 - 2018 Copyright by rt-thread team
msh >
```
#### Drivers
##### 1. DAC
* Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
* Enter the `menuconfig` command, enter the Hardware Drivers config and open DAC, save and exit;
* Enter the `scons --target=iar` command to regenerate project.
###### Finsh
Before you use a device, you need to find out if the device exists, and you can use the name of the DAC device that is enrolled with the command `dac probe` . As shown as follows.
```
msh />dac probe dac1
probe dac1 success
```
Enable the channel of the device can use the command `dac enable` followed by the channel number.
```shell
msh />dac probe dac1
probe dac1 success
```
Set up the data of the channel for a DAC device can use the command `dac write` followed by the channel number.
```
msh />dac write 1 1000
dac1 channel 1 write value is 1000
```
Disable the channel of the device can use the command `dac disable` followed by the channel number.
```c
msh />dac disable 1
dac1 channel 1 disable success
```
### Advanced Features
This BSP only enables GPIO and serial port 4 by default. If need more advanced features, you need to configure the BSP with RT-Thread Env tools, as follows:
* Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
* Enter the `menuconfig` command to configure the project, then save and exit;
* Enter the `pkgs --update` command to update the packages;
* Enter the `scons --target=iar `command to regenerate the project.
## Notes
* Before downloading the program, set the board to the mode of "Engineering Mode". The BOOT switch sets to BOOT0=0,BOOT1 = 0 and BOOT2=1, as shown below:
​ <img src="figures\boot.png" alt="boot_switch" style="zoom:50%;" />
* If need to reburn the program, please reset the development board.
## Contact Information
accendant:
- [liukang](https://github.com/thread-liu)

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# STM32MP157A-DK1 开发板 BSP 说明
## 简介
本文档为 RT-Thread 开发团队为 STM32MP157A-DK1 开发板提供的 BSP (板级支持包) 说明。
主要内容如下：
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
## 开发板介绍
STM32MP157A-DK1 是 ST 推出的一款基于双 Cortex-A7 + Cortex-M4 内核的开发板。Cortex-A7 核工作频率为 800 MHZ，Cortex-M4 工作频率为 209MHZ。STM32MP157A 内部没有 Flash。
开发板外观如下图所示：
​ ![board](figures/board.png)
该开发板常用 **板载资源** 如下：
- MCU：STM32MP157AACx
- 常用外设
- LED：4个 ，LD4 (PA14)， LD6 (PA13)，LD7 (PH7)，LD8 (PD11)
- 按键，4个，WAKE_UP，RESET (NRST)，USER1(PA14)，USER2 (PA13)
- 常用接口：USB 转串口、SD 卡接口、以太网接口、MIPI接口、USB HOST、Audio、HDMI、Arduino
- 调试接口，标准 JTAG/SWD
开发板更多详细信息请参考 ST 官方文档 [STM32MP157A-DK1 开发板介绍](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-discovery-kits/stm32mp157a-dk1.html)。
## 外设支持
本 BSP 目前对外设的支持情况如下：
| **板载外设** | **支持情况** | **备注** |
| :----------- | :----------: | :--------------: |
| USB 转串口 | 支持 | |
| SD卡 | 暂不支持 | |
| 以太网 | 暂不支持 | |
| 音频接口 | 暂不支持 | |
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | |
| UART | 支持 | UART4 (ST-Link) |
| EXTI | 支持 | |
| SPI | 支持 | |
| TIM | 支持 | |
| LPTIM | 支持 | |
| I2C | 支持 | 软件、硬件都支持 |
| ADC | 支持 | |
| DAC | 支持 | |
| WWDG | 支持 | |
| USB Device | 暂不支持 | |
| USB Host | 暂不支持 | |
## 使用说明
使用说明分为如下两个章节：
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
### 快速上手
本 BSP 为开发者提供 IAR 工程。下面以 IAR 开发环境为例，介绍如何将系统运行起来。
#### 硬件连接
使用数据线连接开发板到 PC，打开电源开关。
#### 编译下载
双击 project.eww 文件，打开 IAR 工程，编译并下载程序到开发板。
> 工程默认配置使用 ST-LINK 下载程序，在通过 ST-LINK连接开发板的基础上，点击下载按钮即可下载程序到开发板
#### 运行结果
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，蓝色 LD8 会周期性闪烁，终端会周期性输出 ”Hello RT-Thread!“
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），可以看到 RT-Thread 的输出信息:
> 注：正点原子开发板 在使用终端工具如：PuTTy、XShell 时，会出现系统不能启动的问题，推荐使用串口调试助手如：sscom
```bash
\ | /
- RT - Thread Operating System
/ | \ 3.1.1 build Nov 19 2018
2006 - 2018 Copyright by rt-thread team
msh >
Hello RT-Thread!
```
#### 驱动使用
##### 1. WWDG
1. 在 bsp 下打开 env 工具；
2. 输入 `menuconfig` 命令， 进入 Hardware Drivers config 打开 wwdg，保存并退出；
3. 输入 `scons --target=iar` 命令重新生成工程；
4. wwdg 设备会在喂狗前触发中断，LD5 会在中断中不停的闪烁；
5. 在终端输入 `wwdg_sample` ，获取 wwdg 设备 Finsh 命令；
6. `wwdg_sample run` 开启 wwdg 设备；
7. `wwdg_sample set` 设置 wwdg 设备分频率；
8. 通过调整 wwdg 设备分频率，开发板上 LD5 会有不同的闪烁频率。
##### 2. DAC
1. 在 bsp 下打开 env 工具；
2. 输入`menuconfig`命令， 进入 Hardware Drivers config 打开 dac，保存并退出；
3. 输入 `scons --target=iar` 命令重新生成工程；
###### Finsh
在使用设备前，需要先查找设备是否存在，可以使用命令 `dac probe` 后面跟注册的 DAC 设备的名称。如下所示：
```c
msh />dac probe dac1
probe dac1 success
```
使能设备的某个通道可以使用命令 `dac enable` 后面跟通道号。
```c
msh />dac enable 1
dac1 channel 1 enables success
```
设置 DAC 设备某个通道的数据可以使用命令 `dac write` 后面跟通道号。
```c
msh />dac write 1 1000
dac1 channel 1 write value is 1000
```
关闭设备的某个通道可以使用命令 `dac disable` 后面跟通道号。
```c
msh />dac disable 1
dac1 channel 1 disable success
```
#### 3. LPTIM
1. 在 bsp 下打开 env 工具；
2. 输入 `menuconfig` 命令， 进入 Hardware Drivers config 打开 lptim，保存并退出；
3. 输入 `scons --target=iar` 命令重新生成工程；
4. lptim 设备计时溢出时会触发中断，中断会打印字符串 `"hello rt-thread!"`；
5. 在终端输入 `lptim_sample` ，获取 lptim 设备 Finsh 命令；
6. `lptim_sample run` 开启 lptim 设备；
7. `lptim_sample set` 设置 lptim 设备分频率。
### 进阶使用
此 BSP 默认只开启了 GPIO 和 串口4 的功能，如果需更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
1. 在 bsp 下打开 env 工具。
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons --target=iar` 命令重新生成工程。
本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
## 注意事项
1. 下载程序前，将开发板设置为 "Engineering Mode" 模式。 在 DK1 开发板上，将底下的BOOT开关设成 BOOT0=0，BOOT2=1状态，就进入"Engineering Mode"，如下图所示：
​ <img src="figures\boot_switch.png" alt="boot_switch" style="zoom:50%;" />
2. 再次烧写程序时，需要复位开发板。
## 联系人信息
维护人:
- [liukang](https://github.com/thread-liu)

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# for module compiling
import os
Import('RTT_ROOT')
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')

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import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
Export('RTT_ROOT')
Export('rtconfig')
SDK_ROOT = os.path.abspath('./')
if os.path.exists(SDK_ROOT + '/libraries'):
libraries_path_prefix = SDK_ROOT + '/libraries'
else:
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
SDK_LIB = libraries_path_prefix
Export('SDK_LIB')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
stm32_library = 'STM32MPxx_HAL'
rtconfig.BSP_LIBRARY_TYPE = stm32_library
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)

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Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-05 thread-liu first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
/* defined the LD4 pin: PD8 */
#define LED4_PIN GET_PIN(D, 8)
int main(void)
{
int count = 1;
/* set LD8 pin mode to output */
rt_pin_mode(LED4_PIN, PIN_MODE_OUTPUT);
while (count++)
{
rt_pin_write(LED4_PIN, PIN_HIGH);
rt_thread_mdelay(500);
rt_pin_write(LED4_PIN, PIN_LOW);
rt_thread_mdelay(500);
}
return RT_EOK;
}

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32mp1xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define STLINK_RX_Pin GPIO_PIN_11
#define STLINK_RX_GPIO_Port GPIOG
#define STLINK_TX_Pin GPIO_PIN_2
#define STLINK_TX_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm32mp1xx_hal_conf.h
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32MP1xx_HAL_CONF_H
#define STM32MP1xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
/*#define HAL_CEC_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
#define HAL_DAC_MODULE_ENABLED
/*#define HAL_DCMI_MODULE_ENABLED */
/*#define HAL_DSI_MODULE_ENABLED */
/*#define HAL_DFSDM_MODULE_ENABLED */
/*#define HAL_DTS_MODULE_ENABLED */
/*#define HAL_ETH_MODULE_ENABLED */
/*#define HAL_FDCAN_MODULE_ENABLED */
/*#define HAL_HASH_MODULE_ENABLED */
/*#define HAL_HCD_MODULE_ENABLED */
#define HAL_HSEM_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
/*#define HAL_I2S_MODULE_ENABLED */
#define HAL_IPCC_MODULE_ENABLED
/*#define HAL_IWDG_MODULE_ENABLED */
#define HAL_LPTIM_MODULE_ENABLED
/*#define HAL_LTDC_MODULE_ENABLED */
/*#define HAL_NAND_MODULE_ENABLED */
/*#define HAL_NOR_MODULE_ENABLED */
/*#define HAL_PCD_MODULE_ENABLED */
/*#define HAL_QSPI_MODULE_ENABLED */
/*#define HAL_RNG_MODULE_ENABLED */
/*#define HAL_SAI_MODULE_ENABLED */
/*#define HAL_SD_MODULE_ENABLED */
/*#define HAL_MMC_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SMBUS_MODULE_ENABLED */
/*#define HAL_SPDIFRX_MODULE_ENABLED */
#define HAL_SPI_MODULE_ENABLED
/*#define HAL_SRAM_MODULE_ENABLED */
/*#define HAL_TAMP_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
#define HAL_WWDG_MODULE_ENABLED
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_MDMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
/* ########################## Register Callbacks selection ############################## */
/**
* @brief This is the list of modules where register callback can be used
*/
#define USE_HAL_ADC_REGISTER_CALLBACKS 0u
#define USE_HAL_CEC_REGISTER_CALLBACKS 0u
#define USE_HAL_DAC_REGISTER_CALLBACKS 0u
#define USE_HAL_I2C_REGISTER_CALLBACKS 0u
#define USE_HAL_RNG_REGISTER_CALLBACKS 0u
#define USE_HAL_SPI_REGISTER_CALLBACKS 0u
#define USE_HAL_UART_REGISTER_CALLBACKS 0u
#define USE_HAL_USART_REGISTER_CALLBACKS 0u
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0u
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE (24000000U) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT (100U) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE (64000000U) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup
* Timeout value
*/
#if !defined (HSI_STARTUP_TIMEOUT)
#define HSI_STARTUP_TIMEOUT 5000U /*!< Time out for HSI start up */
#endif /* HSI_STARTUP_TIMEOUT */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE 32000U
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature. */
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/**
* @brief Internal oscillator (CSI) default value.
* This value is the default CSI value after Reset.
*/
#if !defined (CSI_VALUE)
#define CSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/
#endif /* CSI_VALUE */
/**
* @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY 0U /*!< tick interrupt priority (lowest by default) */
/* Warning: Must be set to higher priority for HAL_Delay() */
/* and HAL_GetTick() usage under interrupt context */
#define USE_RTOS 0U
#define PREFETCH_ENABLE 0U
#define INSTRUCTION_CACHE_ENABLE 0U
#define DATA_CACHE_ENABLE 0U
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32mp1xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32mp1xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32mp1xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_HSEM_MODULE_ENABLED
#include "stm32mp1xx_hal_hsem.h"
#endif /* HAL_HSEM_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32mp1xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_MDMA_MODULE_ENABLED
#include "stm32mp1xx_hal_mdma.h"
#endif /* HAL_MDMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32mp1xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32mp1xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32mp1xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32mp1xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32mp1xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32mp1xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_DCMI_MODULE_ENABLED
#include "stm32mp1xx_hal_dcmi.h"
#endif /* HAL_DCMI_MODULE_ENABLED */
#ifdef HAL_DFSDM_MODULE_ENABLED
#include "stm32mp1xx_hal_dfsdm.h"
#endif /* HAL_DFSDM_MODULE_ENABLED */
#ifdef HAL_DSI_MODULE_ENABLED
#include "stm32mp1xx_hal_dsi.h"
#endif /* HAL_DSI_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32mp1xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_FDCAN_MODULE_ENABLED
#include "stm32mp1xx_hal_fdcan.h"
#endif /* HAL_FDCAN_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED
#include "stm32mp1xx_hal_hash.h"
#endif /* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32mp1xx_hal_hcd.h"
#endif /* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32mp1xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32mp1xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IPCC_MODULE_ENABLED
#include "stm32mp1xx_hal_ipcc.h"
#endif /* HAL_IPCC_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32mp1xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32mp1xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32mp1xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_LTDC_MODULE_ENABLED
#include "stm32mp1xx_hal_ltdc.h"
#endif /* HAL_LTDC_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32mp1xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32mp1xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32mp1xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32mp1xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32mp1xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32mp1xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32mp1xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32mp1xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32mp1xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32mp1xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_SPDIFRX_MODULE_ENABLED
#include "stm32mp1xx_hal_spdifrx.h"
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32mp1xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32mp1xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32mp1xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_TAMP_MODULE_ENABLED
#include "stm32mp1xx_hal_tamp.h"
#endif /* HAL_TAMP_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32mp1xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32mp1xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32mp1xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32mp1xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* STM32MP1xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32mp1xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32MP1xx_IT_H
#define __STM32MP1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void WWDG1_IRQHandler(void);
void LPTIM1_IRQHandler(void);
void IPCC_RX1_IRQHandler(void);
void IPCC_TX1_IRQHandler(void);
void LPTIM2_IRQHandler(void);
void LPTIM3_IRQHandler(void);
void LPTIM4_IRQHandler(void);
void LPTIM5_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32MP1xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
ADC_HandleTypeDef hadc2;
DAC_HandleTypeDef hdac1;
IPCC_HandleTypeDef hipcc;
LPTIM_HandleTypeDef hlptim1;
LPTIM_HandleTypeDef hlptim2;
LPTIM_HandleTypeDef hlptim3;
LPTIM_HandleTypeDef hlptim4;
LPTIM_HandleTypeDef hlptim5;
SPI_HandleTypeDef hspi5;
TIM_HandleTypeDef htim4;
TIM_HandleTypeDef htim14;
TIM_HandleTypeDef htim16;
TIM_HandleTypeDef htim17;
UART_HandleTypeDef huart4;
UART_HandleTypeDef huart3;
WWDG_HandleTypeDef hwwdg1;
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void PeriphCommonClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_IPCC_Init(void);
static void MX_SPI5_Init(void);
static void MX_TIM4_Init(void);
static void MX_TIM14_Init(void);
static void MX_TIM16_Init(void);
static void MX_TIM17_Init(void);
static void MX_UART4_Init(void);
static void MX_ADC2_Init(void);
static void MX_DAC1_Init(void);
static void MX_LPTIM1_Init(void);
static void MX_LPTIM2_Init(void);
static void MX_LPTIM3_Init(void);
static void MX_LPTIM4_Init(void);
static void MX_LPTIM5_Init(void);
static void MX_USART3_UART_Init(void);
static void MX_WWDG1_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
if(IS_ENGINEERING_BOOT_MODE())
{
/* Configure the system clock */
SystemClock_Config();
}
if(IS_ENGINEERING_BOOT_MODE())
{
/* Configure the peripherals common clocks */
PeriphCommonClock_Config();
}
/* IPCC initialisation */
MX_IPCC_Init();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_SPI5_Init();
MX_TIM4_Init();
MX_TIM14_Init();
MX_TIM16_Init();
MX_TIM17_Init();
MX_UART4_Init();
MX_ADC2_Init();
MX_DAC1_Init();
MX_LPTIM1_Init();
MX_LPTIM2_Init();
MX_LPTIM3_Init();
MX_LPTIM4_Init();
MX_LPTIM5_Init();
MX_USART3_UART_Init();
MX_WWDG1_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure LSE Drive Capability
*/
HAL_PWR_EnableBkUpAccess();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMHIGH);
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE
|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIG;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.HSIDivValue = RCC_HSI_DIV1;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
RCC_OscInitStruct.PLL2.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL2.PLLSource = RCC_PLL12SOURCE_HSE;
RCC_OscInitStruct.PLL2.PLLM = 3;
RCC_OscInitStruct.PLL2.PLLN = 66;
RCC_OscInitStruct.PLL2.PLLP = 2;
RCC_OscInitStruct.PLL2.PLLQ = 1;
RCC_OscInitStruct.PLL2.PLLR = 1;
RCC_OscInitStruct.PLL2.PLLFRACV = 0x1400;
RCC_OscInitStruct.PLL2.PLLMODE = RCC_PLL_FRACTIONAL;
RCC_OscInitStruct.PLL3.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL3.PLLSource = RCC_PLL3SOURCE_HSE;
RCC_OscInitStruct.PLL3.PLLM = 2;
RCC_OscInitStruct.PLL3.PLLN = 34;
RCC_OscInitStruct.PLL3.PLLP = 2;
RCC_OscInitStruct.PLL3.PLLQ = 17;
RCC_OscInitStruct.PLL3.PLLR = 37;
RCC_OscInitStruct.PLL3.PLLRGE = RCC_PLL3IFRANGE_1;
RCC_OscInitStruct.PLL3.PLLFRACV = 6660;
RCC_OscInitStruct.PLL3.PLLMODE = RCC_PLL_FRACTIONAL;
RCC_OscInitStruct.PLL4.PLLState = RCC_PLL_NONE;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** RCC Clock Config
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_ACLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|RCC_CLOCKTYPE_PCLK3|RCC_CLOCKTYPE_PCLK4
|RCC_CLOCKTYPE_PCLK5;
RCC_ClkInitStruct.AXISSInit.AXI_Clock = RCC_AXISSOURCE_PLL2;
RCC_ClkInitStruct.AXISSInit.AXI_Div = RCC_AXI_DIV1;
RCC_ClkInitStruct.MCUInit.MCU_Clock = RCC_MCUSSOURCE_PLL3;
RCC_ClkInitStruct.MCUInit.MCU_Div = RCC_MCU_DIV1;
RCC_ClkInitStruct.APB4_Div = RCC_APB4_DIV2;
RCC_ClkInitStruct.APB5_Div = RCC_APB5_DIV4;
RCC_ClkInitStruct.APB1_Div = RCC_APB1_DIV2;
RCC_ClkInitStruct.APB2_Div = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB3_Div = RCC_APB3_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Set the HSE division factor for RTC clock
*/
__HAL_RCC_RTC_HSEDIV(24);
}
/**
* @brief Peripherals Common Clock Configuration
* @retval None
*/
void PeriphCommonClock_Config(void)
{
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
/** Initializes the common periph clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_CKPER;
PeriphClkInit.CkperClockSelection = RCC_CKPERCLKSOURCE_HSE;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief ADC2 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC2_Init(void)
{
/* USER CODE BEGIN ADC2_Init 0 */
/* USER CODE END ADC2_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN ADC2_Init 1 */
/* USER CODE END ADC2_Init 1 */
/** Common config
*/
hadc2.Instance = ADC2;
hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2;
hadc2.Init.Resolution = ADC_RESOLUTION_16B;
hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE;
hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
hadc2.Init.LowPowerAutoWait = DISABLE;
hadc2.Init.ContinuousConvMode = DISABLE;
hadc2.Init.NbrOfConversion = 1;
hadc2.Init.DiscontinuousConvMode = DISABLE;
hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
hadc2.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED;
hadc2.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
hadc2.Init.OversamplingMode = DISABLE;
if (HAL_ADC_Init(&hadc2) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_6;
sConfig.Rank = ADC_REGULAR_RANK_1;
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
sConfig.SingleDiff = ADC_SINGLE_ENDED;
sConfig.OffsetNumber = ADC_OFFSET_NONE;
sConfig.Offset = 0;
if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC2_Init 2 */
/* USER CODE END ADC2_Init 2 */
}
/**
* @brief DAC1 Initialization Function
* @param None
* @retval None
*/
static void MX_DAC1_Init(void)
{
/* USER CODE BEGIN DAC1_Init 0 */
/* USER CODE END DAC1_Init 0 */
DAC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN DAC1_Init 1 */
/* USER CODE END DAC1_Init 1 */
/** DAC Initialization
*/
hdac1.Instance = DAC1;
if (HAL_DAC_Init(&hdac1) != HAL_OK)
{
Error_Handler();
}
/** DAC channel OUT1 config
*/
sConfig.DAC_HighFrequency = DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE;
sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_DISABLE;
sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN DAC1_Init 2 */
/* USER CODE END DAC1_Init 2 */
}
/**
* @brief IPCC Initialization Function
* @param None
* @retval None
*/
static void MX_IPCC_Init(void)
{
/* USER CODE BEGIN IPCC_Init 0 */
/* USER CODE END IPCC_Init 0 */
/* USER CODE BEGIN IPCC_Init 1 */
/* USER CODE END IPCC_Init 1 */
hipcc.Instance = IPCC;
if (HAL_IPCC_Init(&hipcc) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN IPCC_Init 2 */
/* USER CODE END IPCC_Init 2 */
}
/**
* @brief LPTIM1 Initialization Function
* @param None
* @retval None
*/
static void MX_LPTIM1_Init(void)
{
/* USER CODE BEGIN LPTIM1_Init 0 */
/* USER CODE END LPTIM1_Init 0 */
/* USER CODE BEGIN LPTIM1_Init 1 */
/* USER CODE END LPTIM1_Init 1 */
hlptim1.Instance = LPTIM1;
hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim1.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
hlptim1.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
hlptim1.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
if (HAL_LPTIM_Init(&hlptim1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM1_Init 2 */
/* USER CODE END LPTIM1_Init 2 */
}
/**
* @brief LPTIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_LPTIM2_Init(void)
{
/* USER CODE BEGIN LPTIM2_Init 0 */
/* USER CODE END LPTIM2_Init 0 */
/* USER CODE BEGIN LPTIM2_Init 1 */
/* USER CODE END LPTIM2_Init 1 */
hlptim2.Instance = LPTIM2;
hlptim2.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim2.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim2.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim2.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim2.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim2.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
hlptim2.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
hlptim2.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
if (HAL_LPTIM_Init(&hlptim2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM2_Init 2 */
/* USER CODE END LPTIM2_Init 2 */
}
/**
* @brief LPTIM3 Initialization Function
* @param None
* @retval None
*/
static void MX_LPTIM3_Init(void)
{
/* USER CODE BEGIN LPTIM3_Init 0 */
/* USER CODE END LPTIM3_Init 0 */
/* USER CODE BEGIN LPTIM3_Init 1 */
/* USER CODE END LPTIM3_Init 1 */
hlptim3.Instance = LPTIM3;
hlptim3.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim3.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim3.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim3.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim3.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim3.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
if (HAL_LPTIM_Init(&hlptim3) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM3_Init 2 */
/* USER CODE END LPTIM3_Init 2 */
}
/**
* @brief LPTIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_LPTIM4_Init(void)
{
/* USER CODE BEGIN LPTIM4_Init 0 */
/* USER CODE END LPTIM4_Init 0 */
/* USER CODE BEGIN LPTIM4_Init 1 */
/* USER CODE END LPTIM4_Init 1 */
hlptim4.Instance = LPTIM4;
hlptim4.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim4.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim4.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim4.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim4.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim4.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
if (HAL_LPTIM_Init(&hlptim4) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM4_Init 2 */
/* USER CODE END LPTIM4_Init 2 */
}
/**
* @brief LPTIM5 Initialization Function
* @param None
* @retval None
*/
static void MX_LPTIM5_Init(void)
{
/* USER CODE BEGIN LPTIM5_Init 0 */
/* USER CODE END LPTIM5_Init 0 */
/* USER CODE BEGIN LPTIM5_Init 1 */
/* USER CODE END LPTIM5_Init 1 */
hlptim5.Instance = LPTIM5;
hlptim5.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim5.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim5.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim5.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim5.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim5.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
if (HAL_LPTIM_Init(&hlptim5) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LPTIM5_Init 2 */
/* USER CODE END LPTIM5_Init 2 */
}
/**
* @brief SPI5 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI5_Init(void)
{
/* USER CODE BEGIN SPI5_Init 0 */
/* USER CODE END SPI5_Init 0 */
/* USER CODE BEGIN SPI5_Init 1 */
/* USER CODE END SPI5_Init 1 */
/* SPI5 parameter configuration*/
hspi5.Instance = SPI5;
hspi5.Init.Mode = SPI_MODE_MASTER;
hspi5.Init.Direction = SPI_DIRECTION_2LINES_TXONLY;
hspi5.Init.DataSize = SPI_DATASIZE_4BIT;
hspi5.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi5.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi5.Init.NSS = SPI_NSS_SOFT;
hspi5.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
hspi5.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi5.Init.TIMode = SPI_TIMODE_DISABLE;
hspi5.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi5.Init.CRCPolynomial = 0x0;
hspi5.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
hspi5.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
hspi5.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
hspi5.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
hspi5.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
hspi5.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
hspi5.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
hspi5.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
hspi5.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
hspi5.Init.IOSwap = SPI_IO_SWAP_DISABLE;
if (HAL_SPI_Init(&hspi5) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI5_Init 2 */
/* USER CODE END SPI5_Init 2 */
}
/**
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
htim4.Init.Prescaler = 0;
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
htim4.Init.Period = 0;
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
}
/**
* @brief TIM14 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM14_Init(void)
{
/* USER CODE BEGIN TIM14_Init 0 */
/* USER CODE END TIM14_Init 0 */
/* USER CODE BEGIN TIM14_Init 1 */
/* USER CODE END TIM14_Init 1 */
htim14.Instance = TIM14;
htim14.Init.Prescaler = 0;
htim14.Init.CounterMode = TIM_COUNTERMODE_UP;
htim14.Init.Period = 0;
htim14.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim14.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim14) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM14_Init 2 */
/* USER CODE END TIM14_Init 2 */
}
/**
* @brief TIM16 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM16_Init(void)
{
/* USER CODE BEGIN TIM16_Init 0 */
/* USER CODE END TIM16_Init 0 */
/* USER CODE BEGIN TIM16_Init 1 */
/* USER CODE END TIM16_Init 1 */
htim16.Instance = TIM16;
htim16.Init.Prescaler = 0;
htim16.Init.CounterMode = TIM_COUNTERMODE_UP;
htim16.Init.Period = 0;
htim16.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim16.Init.RepetitionCounter = 0;
htim16.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim16) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM16_Init 2 */
/* USER CODE END TIM16_Init 2 */
}
/**
* @brief TIM17 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM17_Init(void)
{
/* USER CODE BEGIN TIM17_Init 0 */
/* USER CODE END TIM17_Init 0 */
/* USER CODE BEGIN TIM17_Init 1 */
/* USER CODE END TIM17_Init 1 */
htim17.Instance = TIM17;
htim17.Init.Prescaler = 0;
htim17.Init.CounterMode = TIM_COUNTERMODE_UP;
htim17.Init.Period = 0;
htim17.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim17.Init.RepetitionCounter = 0;
htim17.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim17) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM17_Init 2 */
/* USER CODE END TIM17_Init 2 */
}
/**
* @brief UART4 Initialization Function
* @param None
* @retval None
*/
static void MX_UART4_Init(void)
{
/* USER CODE BEGIN UART4_Init 0 */
/* USER CODE END UART4_Init 0 */
/* USER CODE BEGIN UART4_Init 1 */
/* USER CODE END UART4_Init 1 */
huart4.Instance = UART4;
huart4.Init.BaudRate = 115200;
huart4.Init.WordLength = UART_WORDLENGTH_8B;
huart4.Init.StopBits = UART_STOPBITS_1;
huart4.Init.Parity = UART_PARITY_NONE;
huart4.Init.Mode = UART_MODE_TX_RX;
huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart4.Init.OverSampling = UART_OVERSAMPLING_16;
huart4.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart4.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart4.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart4) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart4, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart4, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart4) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN UART4_Init 2 */
/* USER CODE END UART4_Init 2 */
}
/**
* @brief USART3 Initialization Function
* @param None
* @retval None
*/
static void MX_USART3_UART_Init(void)
{
/* USER CODE BEGIN USART3_Init 0 */
/* USER CODE END USART3_Init 0 */
/* USER CODE BEGIN USART3_Init 1 */
/* USER CODE END USART3_Init 1 */
huart3.Instance = USART3;
huart3.Init.BaudRate = 115200;
huart3.Init.WordLength = UART_WORDLENGTH_8B;
huart3.Init.StopBits = UART_STOPBITS_1;
huart3.Init.Parity = UART_PARITY_NONE;
huart3.Init.Mode = UART_MODE_TX_RX;
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart3) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART3_Init 2 */
/* USER CODE END USART3_Init 2 */
}
/**
* @brief WWDG1 Initialization Function
* @param None
* @retval None
*/
static void MX_WWDG1_Init(void)
{
/* USER CODE BEGIN WWDG1_Init 0 */
/* USER CODE END WWDG1_Init 0 */
/* USER CODE BEGIN WWDG1_Init 1 */
/* USER CODE END WWDG1_Init 1 */
hwwdg1.Instance = WWDG1;
hwwdg1.Init.Prescaler = WWDG_PRESCALER_8;
hwwdg1.Init.Window = 64;
hwwdg1.Init.Counter = 64;
hwwdg1.Init.EWIMode = WWDG_EWI_DISABLE;
if (HAL_WWDG_Init(&hwwdg1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN WWDG1_Init 2 */
/* USER CODE END WWDG1_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c Normal file
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@ -0,0 +1,987 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* File Name : stm32mp1xx_hal_msp.c
* Description : This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
#include "stpmic.h"
#include "rtconfig.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_HSEM_CLK_ENABLE();
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
if(IS_ENGINEERING_BOOT_MODE())
{
#if defined(BSP_USING_ADC) || defined(BSP_USING_DAC)
/* Configure PMIC */
BSP_PMIC_Init();
BSP_PMIC_InitRegulators();
__HAL_RCC_VREF_CLK_ENABLE();
HAL_SYSCFG_VREFBUF_HighImpedanceConfig(SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE);
HAL_SYSCFG_EnableVREFBUF();
#endif
}
/* USER CODE END MspInit 1 */
}
/**
* @brief ADC MSP Initialization
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hadc->Instance==ADC2)
{
/* USER CODE BEGIN ADC2_MspInit 0 */
/* USER CODE END ADC2_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PER;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_ADC12_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
/**ADC2 GPIO Configuration
PF14 ------> ADC2_INP6
*/
GPIO_InitStruct.Pin = GPIO_PIN_14;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
/* USER CODE BEGIN ADC2_MspInit 1 */
/* USER CODE END ADC2_MspInit 1 */
}
}
/**
* @brief ADC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
{
if(hadc->Instance==ADC2)
{
/* USER CODE BEGIN ADC2_MspDeInit 0 */
/* USER CODE END ADC2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ADC12_CLK_DISABLE();
/**ADC2 GPIO Configuration
PF14 ------> ADC2_INP6
*/
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_14);
/* USER CODE BEGIN ADC2_MspDeInit 1 */
/* USER CODE END ADC2_MspDeInit 1 */
}
}
/**
* @brief DAC MSP Initialization
* This function configures the hardware resources used in this example
* @param hdac: DAC handle pointer
* @retval None
*/
void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hdac->Instance==DAC1)
{
/* USER CODE BEGIN DAC1_MspInit 0 */
/* USER CODE END DAC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_DAC12_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**DAC1 GPIO Configuration
PA4 ------> DAC1_OUT1
*/
GPIO_InitStruct.Pin = GPIO_PIN_4;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN DAC1_MspInit 1 */
/* USER CODE END DAC1_MspInit 1 */
}
}
/**
* @brief DAC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hdac: DAC handle pointer
* @retval None
*/
void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
{
if(hdac->Instance==DAC1)
{
/* USER CODE BEGIN DAC1_MspDeInit 0 */
/* USER CODE END DAC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_DAC12_CLK_DISABLE();
/**DAC1 GPIO Configuration
PA4 ------> DAC1_OUT1
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4);
/* USER CODE BEGIN DAC1_MspDeInit 1 */
/* USER CODE END DAC1_MspDeInit 1 */
}
}
/**
* @brief IPCC MSP Initialization
* This function configures the hardware resources used in this example
* @param hipcc: IPCC handle pointer
* @retval None
*/
void HAL_IPCC_MspInit(IPCC_HandleTypeDef* hipcc)
{
if(hipcc->Instance==IPCC)
{
/* USER CODE BEGIN IPCC_MspInit 0 */
/* USER CODE END IPCC_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_IPCC_CLK_ENABLE();
/* IPCC interrupt Init */
HAL_NVIC_SetPriority(IPCC_RX1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(IPCC_RX1_IRQn);
HAL_NVIC_SetPriority(IPCC_TX1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(IPCC_TX1_IRQn);
/* USER CODE BEGIN IPCC_MspInit 1 */
/* USER CODE END IPCC_MspInit 1 */
}
}
/**
* @brief IPCC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hipcc: IPCC handle pointer
* @retval None
*/
void HAL_IPCC_MspDeInit(IPCC_HandleTypeDef* hipcc)
{
if(hipcc->Instance==IPCC)
{
/* USER CODE BEGIN IPCC_MspDeInit 0 */
/* USER CODE END IPCC_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_IPCC_CLK_DISABLE();
/* IPCC interrupt DeInit */
HAL_NVIC_DisableIRQ(IPCC_RX1_IRQn);
HAL_NVIC_DisableIRQ(IPCC_TX1_IRQn);
/* USER CODE BEGIN IPCC_MspDeInit 1 */
/* USER CODE END IPCC_MspDeInit 1 */
}
}
/**
* @brief LPTIM MSP Initialization
* This function configures the hardware resources used in this example
* @param hlptim: LPTIM handle pointer
* @retval None
*/
void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef* hlptim)
{
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hlptim->Instance==LPTIM1)
{
/* USER CODE BEGIN LPTIM1_MspInit 0 */
/* USER CODE END LPTIM1_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
PeriphClkInit.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_LPTIM1_CLK_ENABLE();
/* LPTIM1 interrupt Init */
HAL_NVIC_SetPriority(LPTIM1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPTIM1_IRQn);
/* USER CODE BEGIN LPTIM1_MspInit 1 */
/* USER CODE END LPTIM1_MspInit 1 */
}
else if(hlptim->Instance==LPTIM2)
{
/* USER CODE BEGIN LPTIM2_MspInit 0 */
/* USER CODE END LPTIM2_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM23;
PeriphClkInit.Lptim23ClockSelection = RCC_LPTIM23CLKSOURCE_PCLK3;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_LPTIM2_CLK_ENABLE();
/* LPTIM2 interrupt Init */
HAL_NVIC_SetPriority(LPTIM2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPTIM2_IRQn);
/* USER CODE BEGIN LPTIM2_MspInit 1 */
/* USER CODE END LPTIM2_MspInit 1 */
}
else if(hlptim->Instance==LPTIM3)
{
/* USER CODE BEGIN LPTIM3_MspInit 0 */
/* USER CODE END LPTIM3_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM23;
PeriphClkInit.Lptim23ClockSelection = RCC_LPTIM23CLKSOURCE_PCLK3;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_LPTIM3_CLK_ENABLE();
/* LPTIM3 interrupt Init */
HAL_NVIC_SetPriority(LPTIM3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPTIM3_IRQn);
/* USER CODE BEGIN LPTIM3_MspInit 1 */
/* USER CODE END LPTIM3_MspInit 1 */
}
else if(hlptim->Instance==LPTIM4)
{
/* USER CODE BEGIN LPTIM4_MspInit 0 */
/* USER CODE END LPTIM4_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM45;
PeriphClkInit.Lptim45ClockSelection = RCC_LPTIM45CLKSOURCE_PCLK3;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_LPTIM4_CLK_ENABLE();
/* LPTIM4 interrupt Init */
HAL_NVIC_SetPriority(LPTIM4_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPTIM4_IRQn);
/* USER CODE BEGIN LPTIM4_MspInit 1 */
/* USER CODE END LPTIM4_MspInit 1 */
}
else if(hlptim->Instance==LPTIM5)
{
/* USER CODE BEGIN LPTIM5_MspInit 0 */
/* USER CODE END LPTIM5_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM45;
PeriphClkInit.Lptim45ClockSelection = RCC_LPTIM45CLKSOURCE_PCLK3;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_LPTIM5_CLK_ENABLE();
/* LPTIM5 interrupt Init */
HAL_NVIC_SetPriority(LPTIM5_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPTIM5_IRQn);
/* USER CODE BEGIN LPTIM5_MspInit 1 */
/* USER CODE END LPTIM5_MspInit 1 */
}
}
/**
* @brief LPTIM MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hlptim: LPTIM handle pointer
* @retval None
*/
void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef* hlptim)
{
if(hlptim->Instance==LPTIM1)
{
/* USER CODE BEGIN LPTIM1_MspDeInit 0 */
/* USER CODE END LPTIM1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM1_CLK_DISABLE();
/* LPTIM1 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPTIM1_IRQn);
/* USER CODE BEGIN LPTIM1_MspDeInit 1 */
/* USER CODE END LPTIM1_MspDeInit 1 */
}
else if(hlptim->Instance==LPTIM2)
{
/* USER CODE BEGIN LPTIM2_MspDeInit 0 */
/* USER CODE END LPTIM2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM2_CLK_DISABLE();
/* LPTIM2 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPTIM2_IRQn);
/* USER CODE BEGIN LPTIM2_MspDeInit 1 */
/* USER CODE END LPTIM2_MspDeInit 1 */
}
else if(hlptim->Instance==LPTIM3)
{
/* USER CODE BEGIN LPTIM3_MspDeInit 0 */
/* USER CODE END LPTIM3_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM3_CLK_DISABLE();
/* LPTIM3 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPTIM3_IRQn);
/* USER CODE BEGIN LPTIM3_MspDeInit 1 */
/* USER CODE END LPTIM3_MspDeInit 1 */
}
else if(hlptim->Instance==LPTIM4)
{
/* USER CODE BEGIN LPTIM4_MspDeInit 0 */
/* USER CODE END LPTIM4_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM4_CLK_DISABLE();
/* LPTIM4 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPTIM4_IRQn);
/* USER CODE BEGIN LPTIM4_MspDeInit 1 */
/* USER CODE END LPTIM4_MspDeInit 1 */
}
else if(hlptim->Instance==LPTIM5)
{
/* USER CODE BEGIN LPTIM5_MspDeInit 0 */
/* USER CODE END LPTIM5_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPTIM5_CLK_DISABLE();
/* LPTIM5 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPTIM5_IRQn);
/* USER CODE BEGIN LPTIM5_MspDeInit 1 */
/* USER CODE END LPTIM5_MspDeInit 1 */
}
}
/**
* @brief SPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hspi->Instance==SPI5)
{
/* USER CODE BEGIN SPI5_MspInit 0 */
/* USER CODE END SPI5_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SPI45;
PeriphClkInit.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PCLK2;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_SPI5_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
/**SPI5 GPIO Configuration
PF9 ------> SPI5_MOSI
PF7 ------> SPI5_SCK
*/
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
/* USER CODE BEGIN SPI5_MspInit 1 */
/* USER CODE END SPI5_MspInit 1 */
}
}
/**
* @brief SPI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
{
if(hspi->Instance==SPI5)
{
/* USER CODE BEGIN SPI5_MspDeInit 0 */
/* USER CODE END SPI5_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SPI5_CLK_DISABLE();
/**SPI5 GPIO Configuration
PF9 ------> SPI5_MOSI
PF7 ------> SPI5_SCK
*/
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_9|GPIO_PIN_7);
/* USER CODE BEGIN SPI5_MspDeInit 1 */
/* USER CODE END SPI5_MspDeInit 1 */
}
}
/**
* @brief TIM_Base MSP Initialization
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM4)
{
/* USER CODE BEGIN TIM4_MspInit 0 */
/* USER CODE END TIM4_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM4_CLK_ENABLE();
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
else if(htim_base->Instance==TIM14)
{
/* USER CODE BEGIN TIM14_MspInit 0 */
/* USER CODE END TIM14_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM14_CLK_ENABLE();
/* USER CODE BEGIN TIM14_MspInit 1 */
/* USER CODE END TIM14_MspInit 1 */
}
else if(htim_base->Instance==TIM16)
{
/* USER CODE BEGIN TIM16_MspInit 0 */
/* USER CODE END TIM16_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM16_CLK_ENABLE();
/* USER CODE BEGIN TIM16_MspInit 1 */
/* USER CODE END TIM16_MspInit 1 */
}
else if(htim_base->Instance==TIM17)
{
/* USER CODE BEGIN TIM17_MspInit 0 */
/* USER CODE END TIM17_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM17_CLK_ENABLE();
/* USER CODE BEGIN TIM17_MspInit 1 */
/* USER CODE END TIM17_MspInit 1 */
}
}
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(htim->Instance==TIM4)
{
/* USER CODE BEGIN TIM4_MspPostInit 0 */
/* USER CODE END TIM4_MspPostInit 0 */
__HAL_RCC_GPIOD_CLK_ENABLE();
/**TIM4 GPIO Configuration
PD13 ------> TIM4_CH2
*/
GPIO_InitStruct.Pin = GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
/**
* @brief TIM_Base MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM4)
{
/* USER CODE BEGIN TIM4_MspDeInit 0 */
/* USER CODE END TIM4_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM4_CLK_DISABLE();
/* USER CODE BEGIN TIM4_MspDeInit 1 */
/* USER CODE END TIM4_MspDeInit 1 */
}
else if(htim_base->Instance==TIM14)
{
/* USER CODE BEGIN TIM14_MspDeInit 0 */
/* USER CODE END TIM14_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM14_CLK_DISABLE();
/* USER CODE BEGIN TIM14_MspDeInit 1 */
/* USER CODE END TIM14_MspDeInit 1 */
}
else if(htim_base->Instance==TIM16)
{
/* USER CODE BEGIN TIM16_MspDeInit 0 */
/* USER CODE END TIM16_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM16_CLK_DISABLE();
/* USER CODE BEGIN TIM16_MspDeInit 1 */
/* USER CODE END TIM16_MspDeInit 1 */
}
else if(htim_base->Instance==TIM17)
{
/* USER CODE BEGIN TIM17_MspDeInit 0 */
/* USER CODE END TIM17_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM17_CLK_DISABLE();
/* USER CODE BEGIN TIM17_MspDeInit 1 */
/* USER CODE END TIM17_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(huart->Instance==UART4)
{
/* USER CODE BEGIN UART4_MspInit 0 */
/* USER CODE END UART4_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_UART24;
PeriphClkInit.Uart24ClockSelection = RCC_UART24CLKSOURCE_HSI;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_UART4_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**UART4 GPIO Configuration
PG11 ------> UART4_TX
PB2 ------> UART4_RX
*/
GPIO_InitStruct.Pin = STLINK_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF6_UART4;
HAL_GPIO_Init(STLINK_RX_GPIO_Port, &GPIO_InitStruct);
GPIO_InitStruct.Pin = STLINK_TX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = GPIO_AF8_UART4;
HAL_GPIO_Init(STLINK_TX_GPIO_Port, &GPIO_InitStruct);
/* USER CODE BEGIN UART4_MspInit 1 */
/* USER CODE END UART4_MspInit 1 */
}
else if(huart->Instance==USART3)
{
/* USER CODE BEGIN USART3_MspInit 0 */
/* USER CODE END USART3_MspInit 0 */
if(IS_ENGINEERING_BOOT_MODE())
{
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_UART35;
PeriphClkInit.Uart35ClockSelection = RCC_UART35CLKSOURCE_PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Peripheral clock enable */
__HAL_RCC_USART3_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**USART3 GPIO Configuration
PB10 ------> USART3_TX
PB12 ------> USART3_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = GPIO_AF8_USART3;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USER CODE BEGIN USART3_MspInit 1 */
/* USER CODE END USART3_MspInit 1 */
}
}
/**
* @brief UART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
{
if(huart->Instance==UART4)
{
/* USER CODE BEGIN UART4_MspDeInit 0 */
/* USER CODE END UART4_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_UART4_CLK_DISABLE();
/**UART4 GPIO Configuration
PG11 ------> UART4_TX
PB2 ------> UART4_RX
*/
HAL_GPIO_DeInit(STLINK_RX_GPIO_Port, STLINK_RX_Pin);
HAL_GPIO_DeInit(STLINK_TX_GPIO_Port, STLINK_TX_Pin);
/* USER CODE BEGIN UART4_MspDeInit 1 */
/* USER CODE END UART4_MspDeInit 1 */
}
else if(huart->Instance==USART3)
{
/* USER CODE BEGIN USART3_MspDeInit 0 */
/* USER CODE END USART3_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART3_CLK_DISABLE();
/**USART3 GPIO Configuration
PB10 ------> USART3_TX
PB12 ------> USART3_RX
*/
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_12);
/* USER CODE BEGIN USART3_MspDeInit 1 */
/* USER CODE END USART3_MspDeInit 1 */
}
}
/**
* @brief WWDG MSP Initialization
* This function configures the hardware resources used in this example
* @param hwwdg: WWDG handle pointer
* @retval None
*/
void HAL_WWDG_MspInit(WWDG_HandleTypeDef* hwwdg)
{
if(hwwdg->Instance==WWDG1)
{
/* USER CODE BEGIN WWDG1_MspInit 0 */
/* USER CODE END WWDG1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_WWDG1_CLK_ENABLE();
/* WWDG1 interrupt Init */
HAL_NVIC_SetPriority(WWDG1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(WWDG1_IRQn);
/* USER CODE BEGIN WWDG1_MspInit 1 */
/* USER CODE END WWDG1_MspInit 1 */
}
}
/* USER CODE BEGIN 1 */
/**
* @brief Initializes I2C MSP.
* @param hI2c : I2C handler
* @retval None
*/
void HAL_I2C_MspInit(I2C_HandleTypeDef *hI2c)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hI2c->Instance == I2C4)
{
if(IS_ENGINEERING_BOOT_MODE())
{
/*** Configure the I2C peripheral clock ***/
PeriphClkInit.I2c46ClockSelection = RCC_I2C46CLKSOURCE_HSI;
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C46;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* Enable GPIO clock */
__HAL_RCC_GPIOZ_CLK_ENABLE();
/* Configure I2C Tx/RX as alternate function */
GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF6_I2C4;
HAL_GPIO_Init(GPIOZ, &GPIO_InitStruct);
/* Enable I2C clock */
__HAL_RCC_I2C4_CLK_ENABLE();
/* Force the I2C peripheral clock reset */
__HAL_RCC_I2C4_FORCE_RESET();
/* Release the I2C peripheral clock reset */
__HAL_RCC_I2C4_RELEASE_RESET();
HAL_NVIC_SetPriority(I2C4_ER_IRQn, 0, 1);
HAL_NVIC_EnableIRQ(I2C4_ER_IRQn);
HAL_NVIC_SetPriority(I2C4_EV_IRQn, 0, 2);
HAL_NVIC_EnableIRQ(I2C4_EV_IRQn);
}
}
/**
* @brief DeInitializes I2C MSP.
* @param hI2c : I2C handler
* @retval None
*/
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hI2c)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hI2c->Instance == I2C4)
{
/* Configure I2C Tx, Rx as alternate function */
GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5;
HAL_GPIO_DeInit(GPIOZ, GPIO_InitStruct.Pin);
/* Disable I2C clock */
__HAL_RCC_I2C4_CLK_DISABLE();
/* Disable NVIC for I2C */
HAL_NVIC_DisableIRQ(I2C4_ER_IRQn);
HAL_NVIC_DisableIRQ(I2C4_EV_IRQn);
}
}
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
/* USER CODE END Error_Handler_Debug */
}
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Src/stm32mp1xx_it.c Normal file
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@ -0,0 +1,321 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32mp1xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32mp1xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern IPCC_HandleTypeDef hipcc;
extern LPTIM_HandleTypeDef hlptim1;
extern LPTIM_HandleTypeDef hlptim2;
extern LPTIM_HandleTypeDef hlptim3;
extern LPTIM_HandleTypeDef hlptim4;
extern LPTIM_HandleTypeDef hlptim5;
extern WWDG_HandleTypeDef hwwdg1;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32MP1xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32mp1xx.s). */
/******************************************************************************/
/**
* @brief This function handles Window watchdog interrupt.
*/
void WWDG1_IRQHandler(void)
{
/* USER CODE BEGIN WWDG1_IRQn 0 */
/* USER CODE END WWDG1_IRQn 0 */
HAL_WWDG_IRQHandler(&hwwdg1);
/* USER CODE BEGIN WWDG1_IRQn 1 */
/* USER CODE END WWDG1_IRQn 1 */
}
/**
* @brief This function handles LPTIM1 global interrupt.
*/
void LPTIM1_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM1_IRQn 0 */
/* USER CODE END LPTIM1_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim1);
/* USER CODE BEGIN LPTIM1_IRQn 1 */
/* USER CODE END LPTIM1_IRQn 1 */
}
/**
* @brief This function handles IPCC RX1 occupied interrupt.
*/
void IPCC_RX1_IRQHandler(void)
{
/* USER CODE BEGIN IPCC_RX1_IRQn 0 */
/* USER CODE END IPCC_RX1_IRQn 0 */
HAL_IPCC_RX_IRQHandler(&hipcc);
/* USER CODE BEGIN IPCC_RX1_IRQn 1 */
/* USER CODE END IPCC_RX1_IRQn 1 */
}
/**
* @brief This function handles IPCC TX1 free interrupt.
*/
void IPCC_TX1_IRQHandler(void)
{
/* USER CODE BEGIN IPCC_TX1_IRQn 0 */
/* USER CODE END IPCC_TX1_IRQn 0 */
HAL_IPCC_TX_IRQHandler(&hipcc);
/* USER CODE BEGIN IPCC_TX1_IRQn 1 */
/* USER CODE END IPCC_TX1_IRQn 1 */
}
/**
* @brief This function handles LPTIM2 global interrupt.
*/
void LPTIM2_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM2_IRQn 0 */
/* USER CODE END LPTIM2_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim2);
/* USER CODE BEGIN LPTIM2_IRQn 1 */
/* USER CODE END LPTIM2_IRQn 1 */
}
/**
* @brief This function handles LPTIM3 global interrupt.
*/
void LPTIM3_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM3_IRQn 0 */
/* USER CODE END LPTIM3_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim3);
/* USER CODE BEGIN LPTIM3_IRQn 1 */
/* USER CODE END LPTIM3_IRQn 1 */
}
/**
* @brief This function handles LPTIM4 global interrupt.
*/
void LPTIM4_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM4_IRQn 0 */
/* USER CODE END LPTIM4_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim4);
/* USER CODE BEGIN LPTIM4_IRQn 1 */
/* USER CODE END LPTIM4_IRQn 1 */
}
/**
* @brief This function handles LPTIM5 global interrupt.
*/
void LPTIM5_IRQHandler(void)
{
/* USER CODE BEGIN LPTIM5_IRQn 0 */
/* USER CODE END LPTIM5_IRQn 0 */
HAL_LPTIM_IRQHandler(&hlptim5);
/* USER CODE BEGIN LPTIM5_IRQn 1 */
/* USER CODE END LPTIM5_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file system_stm32mp1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32mp1xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock frequency, it can
* be used by the user application to setup
* the SysTick timer or configure other
* parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
*
******************************************************************************
*
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32mp1xx_system
* @{
*/
/** @addtogroup STM32MP1xx_System_Private_Includes
* @{
*/
#include "stm32mp1xx_hal.h"
/**
* @}
*/
/** @addtogroup STM32MP1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32MP1xx_System_Private_Defines
* @{
*/
/************************* Miscellaneous Configuration ************************/
/*!< Uncomment the following line if you need to use external SRAM mounted
on EVAL board as data memory */
/* #define DATA_IN_ExtSRAM */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
This value must be a multiple of 0x400. */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32MP1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32MP1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) each time HAL_RCC_ClockConfig() is called to configure the system clock
frequency
Note: If you use this function to configure the system clock;
then there is no need to call the first functions listed above,
since SystemCoreClock variable is updated automatically.
*/
uint32_t SystemCoreClock = HSI_VALUE;
/**
* @}
*/
/** @addtogroup STM32MP1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined (DATA_IN_ExtSRAM)
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
/**
* @}
*/
/** @addtogroup STM32MP1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the FPU setting, vector table location and External memory
* configuration.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* FPU settings ------------------------------------------------------------*/
#if defined (CORE_CM4)
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
#endif
/* Configure the Vector Table location add offset address ------------------*/
#if defined (VECT_TAB_SRAM)
SCB->VTOR = MCU_AHB_SRAM | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif
/* Disable all interrupts and events */
CLEAR_REG(EXTI_C2->IMR1);
CLEAR_REG(EXTI_C2->IMR2);
CLEAR_REG(EXTI_C2->IMR3);
CLEAR_REG(EXTI_C2->EMR1);
CLEAR_REG(EXTI_C2->EMR2);
CLEAR_REG(EXTI_C2->EMR3);
#else
#error Please #define CORE_CM4
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock frequency (Hz),
* it can be used by the user application to setup the SysTick timer or
* configure other parameters.
*
* @note Each time the core clock changes, this function must be called to
* update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the
* HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the
* HSE_VALUE(**)
*
* - If SYSCLK source is CSI, SystemCoreClock will contain the
* CSI_VALUE(***)
*
* - If SYSCLK source is PLL3_P, SystemCoreClock will contain the
* HSI_VALUE(*) or the HSE_VALUE(*) or the CSI_VALUE(***)
* multiplied/divided by the PLL3 factors.
*
* (*) HSI_VALUE is a constant defined in stm32mp1xx_hal_conf.h file
* (default value 64 MHz) but the real value may vary depending
* on the variations in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32mp1xx_hal_conf.h file
* (default value 24 MHz), user has to ensure that HSE_VALUE is
* same as the real frequency of the crystal used. Otherwise, this
* function may have wrong result.
*
* (***) CSI_VALUE is a constant defined in stm32mp1xx_hal_conf.h file
* (default value 4 MHz)but the real value may vary depending
* on the variations in voltage and temperature.
*
* - The result of this function could be not correct when using
* fractional value for HSE crystal.
*
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t pllsource, pll3m, pll3fracen;
float fracn1, pll3vco;
switch (RCC->MSSCKSELR & RCC_MSSCKSELR_MCUSSRC)
{
case 0x00: /* HSI used as system clock source */
SystemCoreClock = (HSI_VALUE >> (RCC->HSICFGR & RCC_HSICFGR_HSIDIV));
break;
case 0x01: /* HSE used as system clock source */
SystemCoreClock = HSE_VALUE;
break;
case 0x02: /* CSI used as system clock source */
SystemCoreClock = CSI_VALUE;
break;
case 0x03: /* PLL3_P used as system clock source */
pllsource = (RCC->RCK3SELR & RCC_RCK3SELR_PLL3SRC);
pll3m = ((RCC->PLL3CFGR1 & RCC_PLL3CFGR1_DIVM3) >> RCC_PLL3CFGR1_DIVM3_Pos) + 1U;
pll3fracen = (RCC->PLL3FRACR & RCC_PLL3FRACR_FRACLE) >> 16U;
fracn1 = (float)(pll3fracen * ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACV) >> 3U));
pll3vco = (float)((float)((RCC->PLL3CFGR1 & RCC_PLL3CFGR1_DIVN) + 1U) + (fracn1 / (float) 0x1FFF));
if (pll3m != 0U)
{
switch (pllsource)
{
case 0x00: /* HSI used as PLL clock source */
pll3vco *= (float)((HSI_VALUE >> (RCC->HSICFGR & RCC_HSICFGR_HSIDIV)) / pll3m);
break;
case 0x01: /* HSE used as PLL clock source */
pll3vco *= (float)(HSE_VALUE / pll3m);
break;
case 0x02: /* CSI used as PLL clock source */
pll3vco *= (float)(CSI_VALUE / pll3m);
break;
case 0x03: /* No clock source for PLL */
pll3vco = 0;
break;
}
SystemCoreClock = (uint32_t)(pll3vco/ ((float)((RCC->PLL3CFGR2 & RCC_PLL3CFGR2_DIVP) + 1U)));
}
else
{
SystemCoreClock = 0U;
}
break;
}
/* Compute mcu_ck */
SystemCoreClock = SystemCoreClock >> (RCC->MCUDIVR & RCC_MCUDIVR_MCUDIV);
}
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32mp15xx.s before jump to main.
* This function configures the external SRAM mounted on Eval boards
* This SRAM will be used as program data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
}
#endif /* DATA_IN_ExtSRAM */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/STM32MP157-DK1.ioc Normal file
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#MicroXplorer Configuration settings - do not modify
ADC2.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_6
ADC2.ClockPrescaler=ADC_CLOCK_ASYNC_DIV2
ADC2.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,NbrOfConversionFlag,Resolution,ClockPrescaler
ADC2.NbrOfConversionFlag=1
ADC2.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE
ADC2.Rank-2\#ChannelRegularConversion=1
ADC2.Resolution=ADC_RESOLUTION_16B
ADC2.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
BootLoader.IPs=RCC,DDR
BootROM.IPs=RCC
CortexA7NS.IPs=DDR\:I,RCC\:I,RTC\:I,BSEC,ETZPC,GIC,TAMP\:I,DMA\:I,PWR,SPI2\:I,I2S2\:I,IPCC\:I,TIM3\:I,VREFBUF\:I,SAI4\:I,HSEM\:I,RNG1,DMA1\:I,MDMA_A7NS\:I
CortexA7S.IPs=BSEC\:I,ETZPC\:I,GIC\:I,RCC,PWR\:I,RNG1\:I,RTC,DDR,HSEM,TAMP,MDMA_A7S\:I
CortexM4.IPs=IPCC,HSEM,RCC,NVIC\:I,ETZPC,FREERTOS\:I,DMA,PWR,SYS\:I,TIM4\:I,TIM14\:I,TIM16\:I,TIM17\:I,SPI5\:I,UART4\:I,UART5\:I,USART2\:I,ADC1\:I,ADC2\:I,USART3\:I,DAC1\:I,WWDG1\:I,LPTIM1\:I,LPTIM2\:I,LPTIM3\:I,LPTIM4\:I,LPTIM5\:I,DMA2\:I
DDR.ADDRMAP1=0x00070707
DDR.ADDRMAP3=0x1F000000
DDR.ADDRMAP5=0x06060606
DDR.ADDRMAP6=0x0F060606
DDR.DDR_Frequency=533.0
DDR.DFITMG0=0x02060105
DDR.IPParameters=DDR_Frequency,RL,addrmap_col_b9,addrmap_col_b10,addrmap_col_b11,addrmap_bank_b0,addrmap_bank_b1,addrmap_bank_b2,addrmap_row_b0,addrmap_row_b1,addrmap_row_b2_10,addrmap_row_b11,addrmap_row_b12,addrmap_row_b13,addrmap_row_b14,addrmap_row_b15,MSTR,DFITMG0,SCHED,ADDRMAP1,ADDRMAP3,ADDRMAP5,ADDRMAP6
DDR.MSTR=0x00041401
DDR.RL=8
DDR.SCHED=0x00000C01
DDR.addrmap_bank_b0=7
DDR.addrmap_bank_b1=7
DDR.addrmap_bank_b2=7
DDR.addrmap_col_b10=31
DDR.addrmap_col_b11=31
DDR.addrmap_col_b9=31
DDR.addrmap_row_b0=6
DDR.addrmap_row_b1=6
DDR.addrmap_row_b11=6
DDR.addrmap_row_b12=6
DDR.addrmap_row_b13=6
DDR.addrmap_row_b14=6
DDR.addrmap_row_b15=15
DDR.addrmap_row_b2_10=6
DDR_A0.GPIOParameters=GPIO_Label
DDR_A0.GPIO_Label=DDR_A0 [MT41K256M16TW_A0]
DDR_A0.Locked=true
DDR_A0.Mode=DDR3
DDR_A0.Signal=DDR_A0
DDR_A1.GPIOParameters=GPIO_Label
DDR_A1.GPIO_Label=DDR_A1 [MT41K256M16TW_A1]
DDR_A1.Locked=true
DDR_A1.Mode=DDR3
DDR_A1.Signal=DDR_A1
DDR_A10.GPIOParameters=GPIO_Label
DDR_A10.GPIO_Label=DDR_A10 [MT41K256M16TW_A10]
DDR_A10.Locked=true
DDR_A10.Mode=DDR3
DDR_A10.Signal=DDR_A10
DDR_A11.GPIOParameters=GPIO_Label
DDR_A11.GPIO_Label=DDR_A11 [MT41K256M16TW_A11]
DDR_A11.Locked=true
DDR_A11.Mode=DDR3
DDR_A11.Signal=DDR_A11
DDR_A12.GPIOParameters=GPIO_Label
DDR_A12.GPIO_Label=DDR_A12 [MT41K256M16TW_A12]
DDR_A12.Locked=true
DDR_A12.Mode=4Gb_16bits
DDR_A12.Signal=DDR_A12
DDR_A13.GPIOParameters=GPIO_Label
DDR_A13.GPIO_Label=DDR_A13 [MT41K256M16TW_A13]
DDR_A13.Locked=true
DDR_A13.Mode=4Gb_16bits
DDR_A13.Signal=DDR_A13
DDR_A14.GPIOParameters=GPIO_Label
DDR_A14.GPIO_Label=DDR_A14 [MT41K256M16TW_A14]
DDR_A14.Locked=true
DDR_A14.Mode=4Gb_16bits
DDR_A14.Signal=DDR_A14
DDR_A2.GPIOParameters=GPIO_Label
DDR_A2.GPIO_Label=DDR_A2 [MT41K256M16TW_A2]
DDR_A2.Locked=true
DDR_A2.Mode=DDR3
DDR_A2.Signal=DDR_A2
DDR_A3.GPIOParameters=GPIO_Label
DDR_A3.GPIO_Label=DDR_A3 [MT41K256M16TW_A3]
DDR_A3.Locked=true
DDR_A3.Mode=DDR3
DDR_A3.Signal=DDR_A3
DDR_A4.GPIOParameters=GPIO_Label
DDR_A4.GPIO_Label=DDR_A4 [MT41K256M16TW_A4]
DDR_A4.Locked=true
DDR_A4.Mode=DDR3
DDR_A4.Signal=DDR_A4
DDR_A5.GPIOParameters=GPIO_Label
DDR_A5.GPIO_Label=DDR_A5 [MT41K256M16TW_A5]
DDR_A5.Locked=true
DDR_A5.Mode=DDR3
DDR_A5.Signal=DDR_A5
DDR_A6.GPIOParameters=GPIO_Label
DDR_A6.GPIO_Label=DDR_A6 [MT41K256M16TW_A6]
DDR_A6.Locked=true
DDR_A6.Mode=DDR3
DDR_A6.Signal=DDR_A6
DDR_A7.GPIOParameters=GPIO_Label
DDR_A7.GPIO_Label=DDR_A7 [MT41K256M16TW_A7]
DDR_A7.Locked=true
DDR_A7.Mode=DDR3
DDR_A7.Signal=DDR_A7
DDR_A8.GPIOParameters=GPIO_Label
DDR_A8.GPIO_Label=DDR_A8 [MT41K256M16TW_A8]
DDR_A8.Locked=true
DDR_A8.Mode=DDR3
DDR_A8.Signal=DDR_A8
DDR_A9.GPIOParameters=GPIO_Label
DDR_A9.GPIO_Label=DDR_A9 [MT41K256M16TW_A9]
DDR_A9.Locked=true
DDR_A9.Mode=DDR3
DDR_A9.Signal=DDR_A9
DDR_ATO.GPIOParameters=GPIO_Label
DDR_ATO.GPIO_Label=DDR_ATO
DDR_ATO.Locked=true
DDR_ATO.Mode=DDR3
DDR_ATO.Signal=DDR_ATO
DDR_BA0.GPIOParameters=GPIO_Label
DDR_BA0.GPIO_Label=DDR_BA0 [MT41K256M16TW_BA0]
DDR_BA0.Locked=true
DDR_BA0.Mode=DDR3
DDR_BA0.Signal=DDR_BA0
DDR_BA1.GPIOParameters=GPIO_Label
DDR_BA1.GPIO_Label=DDR_BA1 [MT41K256M16TW_BA1]
DDR_BA1.Locked=true
DDR_BA1.Mode=DDR3
DDR_BA1.Signal=DDR_BA1
DDR_BA2.GPIOParameters=GPIO_Label
DDR_BA2.GPIO_Label=DDR_BA2 [MT41K256M16TW_BA2]
DDR_BA2.Locked=true
DDR_BA2.Mode=DDR3
DDR_BA2.Signal=DDR_BA2
DDR_CASN.GPIOParameters=GPIO_Label
DDR_CASN.GPIO_Label=DDR_CASN [MT41K256M16TW_CAS\#]
DDR_CASN.Locked=true
DDR_CASN.Mode=DDR3
DDR_CASN.Signal=DDR_CASN
DDR_CKE.GPIOParameters=GPIO_Label
DDR_CKE.GPIO_Label=DDR_CKE [MT41K256M16TW_CKE]
DDR_CKE.Locked=true
DDR_CKE.Mode=DDR3
DDR_CKE.Signal=DDR_CKE
DDR_CLKN.GPIOParameters=GPIO_Label
DDR_CLKN.GPIO_Label=DDR_CLK_N [MT41K256M16TW_CK\#]
DDR_CLKN.Locked=true
DDR_CLKN.Mode=DDR3
DDR_CLKN.Signal=DDR_CLKN
DDR_CLKP.GPIOParameters=GPIO_Label
DDR_CLKP.GPIO_Label=DDR_CLK_P [MT41K256M16TW_CK]
DDR_CLKP.Locked=true
DDR_CLKP.Mode=DDR3
DDR_CLKP.Signal=DDR_CLKP
DDR_CSN.GPIOParameters=GPIO_Label
DDR_CSN.GPIO_Label=DDR_CSN [MT41K256M16TW_CS\#]
DDR_CSN.Locked=true
DDR_CSN.Mode=DDR3
DDR_CSN.Signal=DDR_CSN
DDR_DQ0.GPIOParameters=GPIO_Label
DDR_DQ0.GPIO_Label=DDR_DQ0 [MT41K256M16TW_DQU5]
DDR_DQ0.Locked=true
DDR_DQ0.Mode=DDR3
DDR_DQ0.Signal=DDR_DQ0
DDR_DQ1.GPIOParameters=GPIO_Label
DDR_DQ1.GPIO_Label=DDR_DQ1 [MT41K256M16TW_DQU1]
DDR_DQ1.Locked=true
DDR_DQ1.Mode=DDR3
DDR_DQ1.Signal=DDR_DQ1
DDR_DQ10.GPIOParameters=GPIO_Label
DDR_DQ10.GPIO_Label=DDR_DQ10 [MT41K256M16TW_DQL6]
DDR_DQ10.Locked=true
DDR_DQ10.Mode=DDR3
DDR_DQ10.Signal=DDR_DQ10
DDR_DQ11.GPIOParameters=GPIO_Label
DDR_DQ11.GPIO_Label=DDR_DQ11 [MT41K256M16TW_DQL1]
DDR_DQ11.Locked=true
DDR_DQ11.Mode=DDR3
DDR_DQ11.Signal=DDR_DQ11
DDR_DQ12.GPIOParameters=GPIO_Label
DDR_DQ12.GPIO_Label=DDR_DQ12 [MT41K256M16TW_DQL5]
DDR_DQ12.Locked=true
DDR_DQ12.Mode=DDR3
DDR_DQ12.Signal=DDR_DQ12
DDR_DQ13.GPIOParameters=GPIO_Label
DDR_DQ13.GPIO_Label=DDR_DQ13 [MT41K256M16TW_DQL4]
DDR_DQ13.Locked=true
DDR_DQ13.Mode=DDR3
DDR_DQ13.Signal=DDR_DQ13
DDR_DQ14.GPIOParameters=GPIO_Label
DDR_DQ14.GPIO_Label=DDR_DQ14 [MT41K256M16TW_DQL7]
DDR_DQ14.Locked=true
DDR_DQ14.Mode=DDR3
DDR_DQ14.Signal=DDR_DQ14
DDR_DQ15.GPIOParameters=GPIO_Label
DDR_DQ15.GPIO_Label=DDR_DQ15 [MT41K256M16TW_DQL3]
DDR_DQ15.Locked=true
DDR_DQ15.Mode=DDR3
DDR_DQ15.Signal=DDR_DQ15
DDR_DQ2.GPIOParameters=GPIO_Label
DDR_DQ2.GPIO_Label=DDR_DQ2 [MT41K256M16TW_DQU4]
DDR_DQ2.Locked=true
DDR_DQ2.Mode=DDR3
DDR_DQ2.Signal=DDR_DQ2
DDR_DQ3.GPIOParameters=GPIO_Label
DDR_DQ3.GPIO_Label=DDR_DQ3 [MT41K256M16TW_DQU3]
DDR_DQ3.Locked=true
DDR_DQ3.Mode=DDR3
DDR_DQ3.Signal=DDR_DQ3
DDR_DQ4.GPIOParameters=GPIO_Label
DDR_DQ4.GPIO_Label=DDR_DQ4 [MT41K256M16TW_DQU6]
DDR_DQ4.Locked=true
DDR_DQ4.Mode=DDR3
DDR_DQ4.Signal=DDR_DQ4
DDR_DQ5.GPIOParameters=GPIO_Label
DDR_DQ5.GPIO_Label=DDR_DQ5 [MT41K256M16TW_DQU2]
DDR_DQ5.Locked=true
DDR_DQ5.Mode=DDR3
DDR_DQ5.Signal=DDR_DQ5
DDR_DQ6.GPIOParameters=GPIO_Label
DDR_DQ6.GPIO_Label=DDR_DQ6 [MT41K256M16TW_DQU0]
DDR_DQ6.Locked=true
DDR_DQ6.Mode=DDR3
DDR_DQ6.Signal=DDR_DQ6
DDR_DQ7.GPIOParameters=GPIO_Label
DDR_DQ7.GPIO_Label=DDR_DQ7 [MT41K256M16TW_DQU7]
DDR_DQ7.Locked=true
DDR_DQ7.Mode=DDR3
DDR_DQ7.Signal=DDR_DQ7
DDR_DQ8.GPIOParameters=GPIO_Label
DDR_DQ8.GPIO_Label=DDR_DQ8 [MT41K256M16TW_DQL2]
DDR_DQ8.Locked=true
DDR_DQ8.Mode=DDR3
DDR_DQ8.Signal=DDR_DQ8
DDR_DQ9.GPIOParameters=GPIO_Label
DDR_DQ9.GPIO_Label=DDR_DQ9 [MT41K256M16TW_DQL0]
DDR_DQ9.Locked=true
DDR_DQ9.Mode=DDR3
DDR_DQ9.Signal=DDR_DQ9
DDR_DQM0.GPIOParameters=GPIO_Label
DDR_DQM0.GPIO_Label=DDR_DQM0 [MT41K256M16TW_DMU]
DDR_DQM0.Locked=true
DDR_DQM0.Mode=DDR3
DDR_DQM0.Signal=DDR_DQM0
DDR_DQM1.GPIOParameters=GPIO_Label
DDR_DQM1.GPIO_Label=DDR_DQM1 [MT41K256M16TW_DML]
DDR_DQM1.Locked=true
DDR_DQM1.Mode=DDR3
DDR_DQM1.Signal=DDR_DQM1
DDR_DQS0N.GPIOParameters=GPIO_Label
DDR_DQS0N.GPIO_Label=DDR_DQS0_N [MT41K256M16TW_DQSU\#]
DDR_DQS0N.Locked=true
DDR_DQS0N.Mode=DDR3
DDR_DQS0N.Signal=DDR_DQS0N
DDR_DQS0P.GPIOParameters=GPIO_Label
DDR_DQS0P.GPIO_Label=DDR_DQS0_P [MT41K256M16TW_DQSU]
DDR_DQS0P.Locked=true
DDR_DQS0P.Mode=DDR3
DDR_DQS0P.Signal=DDR_DQS0P
DDR_DQS1N.GPIOParameters=GPIO_Label
DDR_DQS1N.GPIO_Label=DDR_DQS1_N [MT41K256M16TW_DQSL\#]
DDR_DQS1N.Locked=true
DDR_DQS1N.Mode=DDR3
DDR_DQS1N.Signal=DDR_DQS1N
DDR_DQS1P.GPIOParameters=GPIO_Label
DDR_DQS1P.GPIO_Label=DDR_DQS1_P [MT41K256M16TW_DQSL]
DDR_DQS1P.Locked=true
DDR_DQS1P.Mode=DDR3
DDR_DQS1P.Signal=DDR_DQS1P
DDR_DTO0.GPIOParameters=GPIO_Label
DDR_DTO0.GPIO_Label=DDR_DTO0
DDR_DTO0.Locked=true
DDR_DTO0.Mode=DDR3
DDR_DTO0.Signal=DDR_DTO0
DDR_DTO1.GPIOParameters=GPIO_Label
DDR_DTO1.GPIO_Label=DDR_DTO1
DDR_DTO1.Locked=true
DDR_DTO1.Mode=DDR3
DDR_DTO1.Signal=DDR_DTO1
DDR_ODT.GPIOParameters=GPIO_Label
DDR_ODT.GPIO_Label=DDR_ODT [MT41K256M16TW_ODT]
DDR_ODT.Locked=true
DDR_ODT.Mode=DDR3
DDR_ODT.Signal=DDR_ODT
DDR_RASN.GPIOParameters=GPIO_Label
DDR_RASN.GPIO_Label=DDR_RASN [MT41K256M16TW_RAS\#]
DDR_RASN.Locked=true
DDR_RASN.Mode=DDR3
DDR_RASN.Signal=DDR_RASN
DDR_RESETN.GPIOParameters=GPIO_Label
DDR_RESETN.GPIO_Label=DDR_RESETN [MT41K256M16TW_RESET\#]
DDR_RESETN.Locked=true
DDR_RESETN.Mode=DDR3
DDR_RESETN.Signal=DDR_RESETN
DDR_VREF.GPIOParameters=GPIO_Label
DDR_VREF.GPIO_Label=VREF_DDR
DDR_VREF.Locked=true
DDR_VREF.Mode=DDR3
DDR_VREF.Signal=DDR_VREF
DDR_WEN.GPIOParameters=GPIO_Label
DDR_WEN.GPIO_Label=DDR_WEN_P [MT41K256M16TW_WE\#]
DDR_WEN.Locked=true
DDR_WEN.Mode=DDR3
DDR_WEN.Signal=DDR_WEN
DDR_ZQ.GPIOParameters=GPIO_Label
DDR_ZQ.GPIO_Label=DDR_ZQ
DDR_ZQ.Locked=true
DDR_ZQ.Mode=DDR3
DDR_ZQ.Signal=DDR_ZQ
File.Version=6
GIC.IPCC_RX0_IRQn=true\:false\:High level
GIC.IPCC_TX0_IRQn=true\:false\:High level
GIC.PMUIRQ0_IRQn=true\:false\:High level
GIC.PMUIRQ1_IRQn=true\:false\:High level
GIC.RCC_IRQn=true\:false\:High level
GIC.RTC_WKUP_ALARM_IRQn=true\:false\:High level
GIC.WAKEUP_PIN_IRQn=true\:false\:High level
GPIO.groupedBy=Expand Peripherals
KeepUserPlacement=false
Mcu.Context0=BootROM
Mcu.Context1=BootLoader
Mcu.Context2=CortexA7S
Mcu.Context3=CortexA7NS
Mcu.Context4=CortexM4
Mcu.ContextNb=5
Mcu.Family=STM32MP1
Mcu.IP0=ADC2
Mcu.IP1=BSEC
Mcu.IP10=LPTIM4
Mcu.IP11=LPTIM5
Mcu.IP12=NVIC
Mcu.IP13=PWR
Mcu.IP14=RCC
Mcu.IP15=RTC
Mcu.IP16=SPI5
Mcu.IP17=SYS
Mcu.IP18=TAMP
Mcu.IP19=TIM4
Mcu.IP2=DAC1
Mcu.IP20=TIM14
Mcu.IP21=TIM16
Mcu.IP22=TIM17
Mcu.IP23=UART4
Mcu.IP24=USART3
Mcu.IP25=VREFBUF
Mcu.IP26=WWDG1
Mcu.IP3=DDR
Mcu.IP4=GIC
Mcu.IP5=HSEM
Mcu.IP6=IPCC
Mcu.IP7=LPTIM1
Mcu.IP8=LPTIM2
Mcu.IP9=LPTIM3
Mcu.IPNb=27
Mcu.Name=STM32MP157AACx
Mcu.Package=TFBGA361
Mcu.Pin0=PH5
Mcu.Pin1=PF2
Mcu.Pin10=DDR_DQ3
Mcu.Pin100=VP_TAMP_VS_TAMP_Activate
Mcu.Pin101=VP_TIM4_VS_ClockSourceINT
Mcu.Pin102=VP_TIM14_VS_ClockSourceINT
Mcu.Pin103=VP_TIM16_VS_ClockSourceINT
Mcu.Pin104=VP_TIM17_VS_ClockSourceINT
Mcu.Pin105=VP_VREFBUF_VS_VREFBUF
Mcu.Pin106=VP_WWDG1_VS_WWDG
Mcu.Pin107=VP_DMA_VS_DMA1_A7NS
Mcu.Pin108=VP_DMA_VS_DMA2_M4
Mcu.Pin109=VP_MDMA_VS_MDMA_A7NS_8
Mcu.Pin11=DDR_DQ0
Mcu.Pin12=DDR_A13
Mcu.Pin13=DDR_DQ1
Mcu.Pin14=DDR_A9
Mcu.Pin15=DDR_DQ7
Mcu.Pin16=DDR_DQS0P
Mcu.Pin17=DDR_DQS0N
Mcu.Pin18=PZ6
Mcu.Pin19=DDR_A5
Mcu.Pin2=PH4
Mcu.Pin20=DDR_DQ2
Mcu.Pin21=DDR_DQ6
Mcu.Pin22=DDR_DQM0
Mcu.Pin23=PZ7
Mcu.Pin24=DDR_A2
Mcu.Pin25=DDR_DQ4
Mcu.Pin26=DDR_DQ5
Mcu.Pin27=PC13
Mcu.Pin28=DDR_DTO0
Mcu.Pin29=DDR_A3
Mcu.Pin3=PD0
Mcu.Pin30=DDR_ZQ
Mcu.Pin31=PC15-OSC32_OUT
Mcu.Pin32=PC14-OSC32_IN
Mcu.Pin33=DDR_A0
Mcu.Pin34=DDR_DTO1
Mcu.Pin35=DDR_ODT
Mcu.Pin36=DDR_BA0
Mcu.Pin37=DDR_WEN
Mcu.Pin38=DDR_BA2
Mcu.Pin39=DDR_CSN
Mcu.Pin4=PC6
Mcu.Pin40=PA13
Mcu.Pin41=DDR_CASN
Mcu.Pin42=DDR_RASN
Mcu.Pin43=DDR_CLKP
Mcu.Pin44=DDR_CLKN
Mcu.Pin45=PH0-OSC_IN
Mcu.Pin46=PI11
Mcu.Pin47=DDR_A1
Mcu.Pin48=DDR_A12
Mcu.Pin49=DDR_A11
Mcu.Pin5=PA15
Mcu.Pin50=DDR_A14
Mcu.Pin51=DDR_A10
Mcu.Pin52=PA14
Mcu.Pin53=DDR_CKE
Mcu.Pin54=DDR_DQ8
Mcu.Pin55=DDR_DQ10
Mcu.Pin56=DDR_DQ13
Mcu.Pin57=DDR_BA1
Mcu.Pin58=DDR_DQ9
Mcu.Pin59=DDR_DQS1P
Mcu.Pin6=PB7
Mcu.Pin60=DDR_DQS1N
Mcu.Pin61=PA4
Mcu.Pin62=DDR_A4
Mcu.Pin63=DDR_DQM1
Mcu.Pin64=PG1
Mcu.Pin65=PH7
Mcu.Pin66=DDR_A6
Mcu.Pin67=DDR_DQ11
Mcu.Pin68=DDR_DQ14
Mcu.Pin69=DDR_DQ12
Mcu.Pin7=PE4
Mcu.Pin70=PB10
Mcu.Pin71=PG11
Mcu.Pin72=PG9
Mcu.Pin73=PB2
Mcu.Pin74=PA10
Mcu.Pin75=DDR_ATO
Mcu.Pin76=DDR_A8
Mcu.Pin77=DDR_DQ15
Mcu.Pin78=PF9
Mcu.Pin79=PD13
Mcu.Pin8=DDR_RESETN
Mcu.Pin80=PA0
Mcu.Pin81=PF7
Mcu.Pin82=PF14
Mcu.Pin83=PB12
Mcu.Pin84=PA6
Mcu.Pin85=PD11
Mcu.Pin86=DDR_VREF
Mcu.Pin87=VP_BSEC_VS_BSEC
Mcu.Pin88=VP_DDR_DDR3
Mcu.Pin89=VP_DDR_DDR_16_bits
Mcu.Pin9=DDR_A7
Mcu.Pin90=VP_DDR_DDR3_16_4Gb
Mcu.Pin91=VP_HSEM_VS_HSEM
Mcu.Pin92=VP_IPCC_VS_IPCC
Mcu.Pin93=VP_LPTIM1_VS_LPTIM_counterModeInternalClock
Mcu.Pin94=VP_LPTIM2_VS_LPTIM_counterModeInternalClock
Mcu.Pin95=VP_LPTIM3_VS_LPTIM_counterModeInternalClock
Mcu.Pin96=VP_LPTIM4_VS_LPTIM_counterModeInternalClock
Mcu.Pin97=VP_LPTIM5_VS_LPTIM_counterModeInternalClock
Mcu.Pin98=VP_RTC_VS_RTC_Activate
Mcu.Pin99=VP_SYS_VS_Systick
Mcu.PinsNb=110
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32MP157AACx
MxCube.Version=5.6.1
MxDb.Version=DB.5.0.60
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.IPCC_RX1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.IPCC_TX1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.LPTIM1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.LPTIM2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.LPTIM3_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.LPTIM4_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.LPTIM5_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.WWDG1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
PA0.Locked=true
PA0.Mode=WakeUp1
PA0.Signal=PWR_WKUP1
PA10.GPIOParameters=GPIO_Label
PA10.GPIO_Label=HDMI_NRST [SiI9022ACNU_RESET\#]
PA10.Locked=true
PA10.Signal=GPIO_Output
PA13.GPIOParameters=GPIO_Label
PA13.GPIO_Label=PA13 [LD6_RED]
PA13.Locked=true
PA13.Signal=GPIO_Output
PA14.GPIOParameters=GPIO_Label
PA14.GPIO_Label=PA14 [SW-PUSH-TS-02H-Blue]
PA14.Locked=true
PA14.Signal=GPIO_Input
PA15.GPIOParameters=GPIO_Label
PA15.GPIO_Label=BL_CTRL [STLD40DPUR_EN]
PA15.Locked=true
PA15.Signal=GPIO_Output
PA4.Signal=COMP_DAC11_group
PA6.GPIOParameters=GPIO_Label
PA6.GPIO_Label=ETH_MDINT [RTL8211F_INT]
PA6.Locked=true
PA6.Signal=GPIO_Input
PB10.Locked=true
PB10.Mode=Asynchronous
PB10.Signal=USART3_TX
PB12.Locked=true
PB12.Mode=Asynchronous
PB12.Signal=USART3_RX
PB2.GPIOParameters=GPIO_Label
PB2.GPIO_Label=STLINK_TX [STM32F103CBT6_PA2]
PB2.Locked=true
PB2.Mode=Asynchronous
PB2.Signal=UART4_RX
PB7.GPIOParameters=GPIO_Label
PB7.GPIO_Label=uSD_DETECT [PJS008-2003-1]
PB7.Locked=true
PB7.Signal=GPIO_Input
PC13.GPIOParameters=GPIO_Label
PC13.GPIO_Label=PMIC_WAKEUP [STPMU1A_WAKEUP]
PC13.Locked=true
PC13.Signal=GPIO_Output
PC14-OSC32_IN.Locked=true
PC14-OSC32_IN.Mode=LSE-External-Oscillator
PC14-OSC32_IN.Signal=RCC_OSC32_IN
PC15-OSC32_OUT.Locked=true
PC15-OSC32_OUT.Mode=LSE-External-Oscillator
PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
PC6.GPIOParameters=GPIO_Label
PC6.GPIO_Label=TE [FH26W-25S_TE]
PC6.Locked=true
PC6.Signal=GPIO_Output
PD0.GPIOParameters=GPIO_Label
PD0.GPIO_Label=WL_HOST_WAKE [LBEE5KL1DX_WL_HOST_WAKE]
PD0.Locked=true
PD0.Signal=GPIO_Input
PD11.GPIOParameters=GPIO_Label
PD11.GPIO_Label=LED_B [LD8_BLUE]
PD11.Locked=true
PD11.Signal=GPIO_Output
PD13.Signal=S_TIM4_CH2
PE4.GPIOParameters=GPIO_Label
PE4.GPIO_Label=RSTN [FH26W-25S_RSTN]
PE4.Locked=true
PE4.Signal=GPIO_Output
PF14.Locked=true
PF14.Mode=IN6-Single-Ended
PF14.Signal=ADC2_INP6
PF2.GPIOParameters=GPIO_Label
PF2.GPIO_Label=INT [FH26W-25S_INT]
PF2.Locked=true
PF2.Signal=GPIO_Input
PF7.Locked=true
PF7.Mode=TX_Only_Simplex_Unidirect_Master
PF7.Signal=SPI5_SCK
PF9.Mode=TX_Only_Simplex_Unidirect_Master
PF9.Signal=SPI5_MOSI
PG1.GPIOParameters=GPIO_Label
PG1.GPIO_Label=HDMI_INT [SiI9022ACNU_INT]
PG1.Locked=true
PG1.Signal=GPIO_Input
PG11.GPIOParameters=GPIO_Label
PG11.GPIO_Label=STLINK_RX [STM32F103CBT6_PA3]
PG11.Locked=true
PG11.Mode=Asynchronous
PG11.Signal=UART4_TX
PG9.GPIOParameters=GPIO_Label
PG9.GPIO_Label=AUDIO_RST [CS42L51-CNZ_RESET]
PG9.Locked=true
PG9.Signal=GPIO_Output
PH0-OSC_IN.Locked=true
PH0-OSC_IN.Mode=HSE-DIG-External-Clock-Source
PH0-OSC_IN.Signal=RCC_OSC_IN
PH4.GPIOParameters=GPIO_Label
PH4.GPIO_Label=WL_REG_ON [LBEE5KL1DX_WL_REG_ON]
PH4.Locked=true
PH4.Signal=GPIO_Output
PH5.GPIOParameters=GPIO_Label
PH5.GPIO_Label=BT_HOST_WAKE [LBEE5KL1DX_BT_HOST_WAKE]
PH5.Locked=true
PH5.Signal=GPIO_Input
PH7.GPIOParameters=GPIO_Label
PH7.GPIO_Label=LED_Y [LD7_ORANGE]
PH7.Locked=true
PH7.Signal=GPIO_Output
PI11.GPIOParameters=GPIO_Label
PI11.GPIO_Label=STUSB1600_IRQOUTn [STUSB1600_ALERT\#]
PI11.Locked=true
PI11.Signal=GPIO_Input
PZ6.GPIOParameters=GPIO_Label
PZ6.GPIO_Label=BT_REG_ON [LBEE5KL1DX_BT_REG_ON]
PZ6.Locked=true
PZ6.Signal=GPIO_Output
PZ7.GPIOParameters=GPIO_Label
PZ7.GPIO_Label=BT_DEV_WAKE [LBEE5KL1DX_BT_DEV_WAKE]
PZ7.Locked=true
PZ7.Signal=GPIO_Output
PinOutPanel.CurrentBGAView=Top
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerOptimize=6
ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=false
ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32MP157AACx
ProjectManager.DeviceTreeLocation=D\:\\3_work\\GitRepositories\\rt-thread\\bsp\\stm32\\stm32mp157a-st-discovery\\board\\CubeMX_Config\\STM32MP157-DK1\\CA7\\DeviceTree\\
ProjectManager.FirmwarePackage=STM32Cube FW_MP1 V1.2.0
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=0
ProjectManager.MainLocation=Src
ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=STM32MP157-DK1.ioc
ProjectManager.ProjectName=STM32MP157-DK1
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=EWARM V8.32
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_IPCC_Init-IPCC-false-HAL-true,4-MX_SPI5_Init-SPI5-false-HAL-true,5-MX_TIM4_Init-TIM4-false-HAL-true,6-MX_TIM14_Init-TIM14-false-HAL-true,7-MX_TIM16_Init-TIM16-false-HAL-true,8-MX_TIM17_Init-TIM17-false-HAL-true,9-MX_UART4_Init-UART4-false-HAL-true,10-MX_ADC2_Init-ADC2-false-HAL-true,11-MX_DAC1_Init-DAC1-false-HAL-true,12-MX_LPTIM1_Init-LPTIM1-false-HAL-true,13-MX_LPTIM2_Init-LPTIM2-false-HAL-true,14-MX_LPTIM3_Init-LPTIM3-false-HAL-true,15-MX_LPTIM4_Init-LPTIM4-false-HAL-true,16-MX_LPTIM5_Init-LPTIM5-false-HAL-true,17-MX_USART3_UART_Init-USART3-false-HAL-true,18-MX_WWDG1_Init-WWDG1-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
RCC.ADCCLockSelection=RCC_ADCCLKSOURCE_PER
RCC.ADCFreq_Value=24000000
RCC.AHB1234Freq_Value=208877929.6875
RCC.APB1DIV=RCC_APB1_DIV2
RCC.APB1Freq_Value=104438964.84375
RCC.APB2DIV=RCC_APB2_DIV2
RCC.APB2Freq_Value=104438964.84375
RCC.APB3DIV=RCC_APB3_DIV2
RCC.APB3Freq_Value=104438964.84375
RCC.APB4DIV=RCC_APB4_DIV2
RCC.APB4Freq_Value=133250000
RCC.APB5DIV=RCC_APB5_DIV4
RCC.APB5DIVClockFreq_Value=66625000
RCC.AXICLKFreq_VALUE=266500000
RCC.AXICLKSource=RCC_AXISSOURCE_PLL2
RCC.AXIDIVFreq_Value=266500000
RCC.CECFreq_Value=32768
RCC.CKPERCLKFreq_VALUE=24000000
RCC.CKPERCLKSource=RCC_CKPERCLKSOURCE_HSE
RCC.CSI_VALUE=4000000
RCC.CortexFreq_Value=208877929.6875
RCC.DACCLKFreq_VALUE=32000
RCC.DDRCFreq_Value=533000000
RCC.DDRPERFMFreq_Value=533000000
RCC.DDRPHYFreq_Value=533000000
RCC.DFSDFAFreq_Value=74250000
RCC.DFSDMFreq_Value=208877929.6875
RCC.DIVM1=3
RCC.DIVM2=3
RCC.DIVM3=2
RCC.DIVM4=4
RCC.DIVN1=81
RCC.DIVN2=66
RCC.DIVN3=34
RCC.DIVN4=99
RCC.DIVP1Freq_Value=650000000
RCC.DIVP2Freq_Value=266500000
RCC.DIVP3Freq_Value=208877929.6875
RCC.DIVP4=6
RCC.DIVP4Freq_Value=99000000
RCC.DIVQ1Freq_Value=325000000
RCC.DIVQ2=1
RCC.DIVQ2Freq_Value=533000000
RCC.DIVQ3=17
RCC.DIVQ3Freq_Value=24573874.08088235
RCC.DIVQ4=8
RCC.DIVQ4Freq_Value=74250000
RCC.DIVR1Freq_Value=325000000
RCC.DIVR2=1
RCC.DIVR2Freq_Value=533000000
RCC.DIVR3=37
RCC.DIVR3Freq_Value=11290698.902027028
RCC.DIVR4=8
RCC.DIVR4Freq_Value=74250000
RCC.DSIFreq_Value=60000000
RCC.DSIPixelFreq_Value=74250000
RCC.DSITXEscFreq_Value=15000000
RCC.DSI_VALUE=60000000
RCC.ETHFreq_Value=99000000
RCC.FCLKFreq_Value=196000000
RCC.FDCANFreq_Value=24000000
RCC.FMCCLockSelection=RCC_FMCCLKSOURCE_ACLK
RCC.FMCFreq_Value=266500000
RCC.FamilyName=M
RCC.HSE_VALUE=24000000
RCC.HSIDivClkFreq_Value=64000000
RCC.HSI_VALUE=64000000
RCC.Hclk5DIVFreq_Value=266500000
RCC.Hclk6DIVFreq_Value=266500000
RCC.I2C12CLockSelection=RCC_I2C12CLKSOURCE_HSI
RCC.I2C12Freq_Value=64000000
RCC.I2C35CLockSelection=RCC_I2C35CLKSOURCE_PCLK1
RCC.I2C35Freq_Value=104438964.84375
RCC.I2C46CLockSelection=RCC_I2C46CLKSOURCE_HSI
RCC.I2C46Freq_Value=64000000
RCC.IPParameters=ADCCLockSelection,ADCFreq_Value,AHB1234Freq_Value,APB1DIV,APB1Freq_Value,APB2DIV,APB2Freq_Value,APB3DIV,APB3Freq_Value,APB4DIV,APB4Freq_Value,APB5DIV,APB5DIVClockFreq_Value,AXICLKFreq_VALUE,AXICLKSource,AXIDIVFreq_Value,CECFreq_Value,CKPERCLKFreq_VALUE,CKPERCLKSource,CSI_VALUE,CortexFreq_Value,DACCLKFreq_VALUE,DDRCFreq_Value,DDRPERFMFreq_Value,DDRPHYFreq_Value,DFSDFAFreq_Value,DFSDMFreq_Value,DIVM1,DIVM2,DIVM3,DIVM4,DIVN1,DIVN2,DIVN3,DIVN4,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVP4,DIVP4Freq_Value,DIVQ1Freq_Value,DIVQ2,DIVQ2Freq_Value,DIVQ3,DIVQ3Freq_Value,DIVQ4,DIVQ4Freq_Value,DIVR1Freq_Value,DIVR2,DIVR2Freq_Value,DIVR3,DIVR3Freq_Value,DIVR4,DIVR4Freq_Value,DSIFreq_Value,DSIPixelFreq_Value,DSITXEscFreq_Value,DSI_VALUE,ETHFreq_Value,FCLKFreq_Value,FDCANFreq_Value,FMCCLockSelection,FMCFreq_Value,FamilyName,HSE_VALUE,HSIDivClkFreq_Value,HSI_VALUE,Hclk5DIVFreq_Value,Hclk6DIVFreq_Value,I2C12CLockSelection,I2C12Freq_Value,I2C35CLockSelection,I2C35Freq_Value,I2C46CLockSelection,I2C46Freq_Value,LPTIM1CLockSelection,LPTIM1Freq_Value,LPTIM23CLockSelection,LPTIM23Freq_Value,LPTIM45CLockSelection,LPTIM45Freq_Value,LSI_VALUE,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,MCUCLKFreq_VALUE,MCUCLKSource,MCUClockFreq_Value,MCUDIVCLKFreq_Value,MPUCLKFreq_VALUE,MPUCLKSource,PLL12Source,PLL1FRACV,PLL1UserDefinedConfig,PLL2FRACV,PLL3FRACV,PLL3Source,PLL4FRACV,PLL4PDSIFreq_Value,PLL4Source,PLLDSIFreq_Value,PLLDSIVCOFreq_Value,PUBLFreq_Value,QSPICLockSelection,QSPIFreq_Value,RCC_RTC_Clock_Source_FROM_HSE,RNG1CLockSelection,RNG1Freq_Value,RNG2Freq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2CLockSelection,SAI2Freq_Value,SAI3Freq_Value,SAI4Freq_Value,SDMMC12CLockSelection,SDMMC12Freq_Value,SDMMC3CLockSelection,SDMMC3Freq_Value,SPDIFRXFreq_Value,SPI1CLockSelection,SPI1Freq_Value,SPI23CLockSelection,SPI23Freq_Value,SPI45CLockSelection,SPI45Freq_Value,SPI6CLockSelection,SPI6Freq_Value,STGENCLockSelection,STGENFreq_Value,Tim1OutputFreq_Value,Tim2OutputFreq_Value,UART78CLockSelection,UART78Freq_Value,USART1CLockSelection,USART1Freq_Value,USART24CLockSelection,USART24Freq_Value,USART35CLockSelection,USART35Freq_Value,USART6CLockSelection,USART6Freq_Value,USBOCLKSource,USBOHSFreq_Value,USBPHYCLKSource,USBPHYFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCO4OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInput4Freq_Value
RCC.LPTIM1CLockSelection=RCC_LPTIM1CLKSOURCE_PCLK1
RCC.LPTIM1Freq_Value=104438964.84375
RCC.LPTIM23CLockSelection=RCC_LPTIM23CLKSOURCE_PCLK3
RCC.LPTIM23Freq_Value=104438964.84375
RCC.LPTIM45CLockSelection=RCC_LPTIM45CLKSOURCE_PCLK3
RCC.LPTIM45Freq_Value=104438964.84375
RCC.LSI_VALUE=32000
RCC.LTDCFreq_Value=74250000
RCC.MCO1PinFreq_Value=64000000
RCC.MCO2PinFreq_Value=650000000
RCC.MCUCLKFreq_VALUE=208877929.6875
RCC.MCUCLKSource=RCC_MCUSSOURCE_PLL3
RCC.MCUClockFreq_Value=208877929.6875
RCC.MCUDIVCLKFreq_Value=208877929.6875
RCC.MPUCLKFreq_VALUE=650000000
RCC.MPUCLKSource=RCC_MPUSOURCE_PLL1
RCC.PLL12Source=RCC_PLL12SOURCE_HSE
RCC.PLL1FRACV=0x800
RCC.PLL1UserDefinedConfig=false
RCC.PLL2FRACV=0x1400
RCC.PLL3FRACV=6660
RCC.PLL3Source=RCC_PLL3SOURCE_HSE
RCC.PLL4FRACV=0
RCC.PLL4PDSIFreq_Value=99000000
RCC.PLL4Source=RCC_PLL4SOURCE_HSE
RCC.PLLDSIFreq_Value=480000000
RCC.PLLDSIVCOFreq_Value=960000000
RCC.PUBLFreq_Value=533000000
RCC.QSPICLockSelection=RCC_QSPICLKSOURCE_ACLK
RCC.QSPIFreq_Value=266500000
RCC.RCC_RTC_Clock_Source_FROM_HSE=24
RCC.RNG1CLockSelection=RCC_RNG1CLKSOURCE_LSI
RCC.RNG1Freq_Value=32000
RCC.RNG2Freq_Value=4000000
RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
RCC.RTCFreq_Value=32768
RCC.SAI1Freq_Value=74250000
RCC.SAI2CLockSelection=RCC_SAI2CLKSOURCE_PLL3_Q
RCC.SAI2Freq_Value=24573874.08088235
RCC.SAI3Freq_Value=74250000
RCC.SAI4Freq_Value=74250000
RCC.SDMMC12CLockSelection=RCC_SDMMC12CLKSOURCE_PLL4
RCC.SDMMC12Freq_Value=99000000
RCC.SDMMC3CLockSelection=RCC_SDMMC3CLKSOURCE_HCLK2
RCC.SDMMC3Freq_Value=208877929.6875
RCC.SPDIFRXFreq_Value=99000000
RCC.SPI1CLockSelection=RCC_SPI1CLKSOURCE_PLL3_Q
RCC.SPI1Freq_Value=24573874.08088235
RCC.SPI23CLockSelection=RCC_SPI23CLKSOURCE_PLL3_Q
RCC.SPI23Freq_Value=24573874.08088235
RCC.SPI45CLockSelection=RCC_SPI45CLKSOURCE_PCLK2
RCC.SPI45Freq_Value=104438964.84375
RCC.SPI6CLockSelection=RCC_SPI6CLKSOURCE_PCLK5
RCC.SPI6Freq_Value=66625000
RCC.STGENCLockSelection=RCC_STGENCLKSOURCE_HSE
RCC.STGENFreq_Value=24000000
RCC.Tim1OutputFreq_Value=208877929.6875
RCC.Tim2OutputFreq_Value=208877929.6875
RCC.UART78CLockSelection=RCC_UART78CLKSOURCE_PCLK1
RCC.UART78Freq_Value=104438964.84375
RCC.USART1CLockSelection=RCC_USART1CLKSOURCE_PCLK5
RCC.USART1Freq_Value=66625000
RCC.USART24CLockSelection=RCC_UART24CLKSOURCE_HSI
RCC.USART24Freq_Value=64000000
RCC.USART35CLockSelection=RCC_UART35CLKSOURCE_PCLK1
RCC.USART35Freq_Value=104438964.84375
RCC.USART6CLockSelection=RCC_USART6CLKSOURCE_PCLK2
RCC.USART6Freq_Value=104438964.84375
RCC.USBOCLKSource=RCC_USBOCLKSOURCE_PHY
RCC.USBOHSFreq_Value=48000000
RCC.USBPHYCLKSource=RCC_USBPHYCLKSOURCE_HSE
RCC.USBPHYFreq_Value=24000000
RCC.VCO1OutputFreq_Value=1300000000
RCC.VCO2OutputFreq_Value=1066000000
RCC.VCO3OutputFreq_Value=417755859.375
RCC.VCO4OutputFreq_Value=594000000
RCC.VCOInput1Freq_Value=8000000
RCC.VCOInput2Freq_Value=8000000
RCC.VCOInput3Freq_Value=12000000
RCC.VCOInput4Freq_Value=6000000
SH.COMP_DAC11_group.0=DAC1_OUT1,DAC_OUT1
SH.COMP_DAC11_group.ConfNb=1
SH.S_TIM4_CH2.0=TIM4_CH2,PWM Generation2 CH2
SH.S_TIM4_CH2.ConfNb=1
SPI5.CalculateBaudRate=26.10974 MBits/s
SPI5.Direction=SPI_DIRECTION_2LINES_TXONLY
SPI5.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
SPI5.Mode=SPI_MODE_MASTER
SPI5.VirtualType=VM_MASTER
TIM4.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
TIM4.IPParameters=Channel-PWM Generation2 CH2
USART3.IPParameters=VirtualMode-Asynchronous
USART3.VirtualMode-Asynchronous=VM_ASYNC
VP_BSEC_VS_BSEC.Mode=BSEC_Activate
VP_BSEC_VS_BSEC.Signal=BSEC_VS_BSEC
VP_DDR_DDR3.Mode=DDR3
VP_DDR_DDR3.Signal=DDR_DDR3
VP_DDR_DDR3_16_4Gb.Mode=4Gb_16bits
VP_DDR_DDR3_16_4Gb.Signal=DDR_DDR3_16_4Gb
VP_DDR_DDR_16_bits.Mode=16bits
VP_DDR_DDR_16_bits.Signal=DDR_DDR_16_bits
VP_DMA_VS_DMA1_A7NS.Mode=CortexA7NS
VP_DMA_VS_DMA1_A7NS.Signal=DMA_VS_DMA1_A7NS
VP_DMA_VS_DMA2_M4.Mode=CortexM4
VP_DMA_VS_DMA2_M4.Signal=DMA_VS_DMA2_M4
VP_HSEM_VS_HSEM.Mode=HSEM_Activate
VP_HSEM_VS_HSEM.Signal=HSEM_VS_HSEM
VP_IPCC_VS_IPCC.Mode=IPCC_Activate
VP_IPCC_VS_IPCC.Signal=IPCC_VS_IPCC
VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Signal=LPTIM1_VS_LPTIM_counterModeInternalClock
VP_LPTIM2_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
VP_LPTIM2_VS_LPTIM_counterModeInternalClock.Signal=LPTIM2_VS_LPTIM_counterModeInternalClock
VP_LPTIM3_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
VP_LPTIM3_VS_LPTIM_counterModeInternalClock.Signal=LPTIM3_VS_LPTIM_counterModeInternalClock
VP_LPTIM4_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
VP_LPTIM4_VS_LPTIM_counterModeInternalClock.Signal=LPTIM4_VS_LPTIM_counterModeInternalClock
VP_LPTIM5_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
VP_LPTIM5_VS_LPTIM_counterModeInternalClock.Signal=LPTIM5_VS_LPTIM_counterModeInternalClock
VP_MDMA_VS_MDMA_A7NS_8.Mode=8\:8
VP_MDMA_VS_MDMA_A7NS_8.Signal=MDMA_VS_MDMA_A7NS_8
VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
VP_TAMP_VS_TAMP_Activate.Mode=TAMP_Enabled
VP_TAMP_VS_TAMP_Activate.Signal=TAMP_VS_TAMP_Activate
VP_TIM14_VS_ClockSourceINT.Mode=Enable_Timer
VP_TIM14_VS_ClockSourceINT.Signal=TIM14_VS_ClockSourceINT
VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer
VP_TIM16_VS_ClockSourceINT.Signal=TIM16_VS_ClockSourceINT
VP_TIM17_VS_ClockSourceINT.Mode=Enable_Timer
VP_TIM17_VS_ClockSourceINT.Signal=TIM17_VS_ClockSourceINT
VP_TIM4_VS_ClockSourceINT.Mode=Internal
VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT
VP_VREFBUF_VS_VREFBUF.Mode=VREFBUF_Activate
VP_VREFBUF_VS_VREFBUF.Signal=VREFBUF_VS_VREFBUF
VP_WWDG1_VS_WWDG.Mode=WWDG_Activate
VP_WWDG1_VS_WWDG.Signal=WWDG1_VS_WWDG
WWDG1.IPParameters=Prescaler
WWDG1.Prescaler=WWDG_PRESCALER_8
board=STM32MP157A-DK1
boardIOC=true

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menu "Hardware Drivers Config"
config SOC_STM32MP157A
bool
select SOC_SERIES_STM32MP1
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
default y
menu "Onboard Peripheral Drivers"
config BSP_USING_STLINK_TO_USART
bool "Enable STLINK TO USART (uart4)"
select BSP_USING_UART
select BSP_USING_UART4
default y
endmenu
menu "On-chip Peripheral Drivers"
config BSP_USING_GPIO
bool "Enable GPIO"
select RT_USING_PIN
default y
config BSP_USING_WWDG
bool "Enable WWDG"
select RT_USING_WWDG
default n
menuconfig BSP_USING_UART
bool "Enable UART"
select RT_USING_SERIAL
default y
if BSP_USING_UART
config BSP_USING_UART3
bool "Enable UART3"
default y
config BSP_UART3_RX_USING_DMA
bool "Enable UART3 RX DMA"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
config BSP_UART3_TX_USING_DMA
bool "Enable UART3 TX DMA"
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART4
bool "Enable UART4"
default y
config BSP_UART4_RX_USING_DMA
bool "Enable UART4 RX DMA"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
config BSP_UART4_TX_USING_DMA
bool "Enable UART4 TX DMA"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
endif
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
if BSP_USING_TIM
config BSP_USING_TIM14
bool "Enable TIM14"
default n
config BSP_USING_TIM16
bool "Enable TIM16"
default n
config BSP_USING_TIM17
bool "Enable TIM17"
default n
endif
menuconfig BSP_USING_LPTIM
bool "Enable lptimer"
default n
select RT_USING_LPTIMER
if BSP_USING_LPTIM
config BSP_USING_LPTIM1
bool "Enable LPTIM1"
default n
endif
menuconfig BSP_USING_PWM
bool "Enable pwm"
default n
select RT_USING_PWM
if BSP_USING_PWM
menuconfig BSP_USING_PWM4
bool "Enable timer4 output pwm"
default n
if BSP_USING_PWM4
config BSP_USING_PWM4_CH2
bool "Enable PWM4 channel2"
default n
endif
endif
menuconfig BSP_USING_ADC
bool "Enable ADC"
default n
select RT_USING_ADC
if BSP_USING_ADC
config BSP_USING_ADC2
bool "Enable ADC2"
default n
endif
menuconfig BSP_USING_DAC
bool "Enable DAC"
default n
select RT_USING_DAC
if BSP_USING_DAC
config BSP_USING_DAC1
bool "Enable DAC1"
default n
endif
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
default n
if BSP_USING_I2C1
comment "Notice: PD7 --> 55; PG15 --> 111"
config BSP_I2C1_SCL_PIN
int "I2C1 scl pin number"
range 1 176
default 55
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 1 176
default 111
endif
menuconfig BSP_USING_SPI
bool "Enable SPI BUS"
select RT_USING_SPI
default n
if BSP_USING_SPI
config BSP_USING_SPI5
bool "Enable SPI5 BUS"
default n
config BSP_SPI5_TX_USING_DMA
bool "Enable SPI5 TX DMA"
depends on BSP_USING_SPI5
default n
config BSP_SPI5_RX_USING_DMA
bool "Enable SPI5 RX DMA"
depends on BSP_USING_SPI5
select BSP_SPI5_TX_USING_DMA
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
endmenu
endmenu

47
bsp/stm32/stm32mp157a-st-ev1/board/SConscript Normal file
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import os
import rtconfig
from building import *
Import('SDK_LIB')
cwd = GetCurrentDir()
# add general drivers
src = Split('''
board.c
CubeMX_Config/Common/System/system_stm32mp1xx.c
CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
''')
if GetDepend(['BSP_USING_ADC']):
src += Glob('ports/drv_hard_i2c.c')
src += Glob('ports/stpmic.c')
if GetDepend(['BSP_USING_DAC']):
src += Glob('ports/drv_hard_i2c.c')
src += Glob('ports/stpmic.c')
if GetDepend(['BSP_USING_WWDG']):
src += Glob('ports/drv_wwdg.c')
if GetDepend(['BSP_USING_LPTIM']):
src += Glob('ports/drv_lptim.c')
path = [cwd]
path += [cwd + '/CubeMX_Config/CM4/Inc']
path += [cwd + '/ports']
startup_path_prefix = SDK_LIB
if rtconfig.CROSS_TOOL == 'gcc':
src += [startup_path_prefix + '/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/gcc/startup_stm32mp15xx.s']
elif rtconfig.CROSS_TOOL == 'keil':
src += [startup_path_prefix + '/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/arm/startup_stm32mp15xx.s']
elif rtconfig.CROSS_TOOL == 'iar':
src += [startup_path_prefix + '/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/iar/startup_stm32mp15xx.s']
CPPDEFINES = ['CORE_CM4', 'STM32MP157Axx', 'USE_HAL_DRIVER']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Return('group')

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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-06 SummerGift first version
* 2019-04-09 WillianChan add stm32f469-st-disco bsp
* 2020-06-20 thread-liu add stm32mp157-dk1 bsp
*/
#include "board.h"
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/**Configure LSE Drive Capability
*/
HAL_PWR_EnableBkUpAccess();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMHIGH);
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE
|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIG;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.HSIDivValue = RCC_HSI_DIV1;
/**PLL1 Config
*/
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL12SOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 3;
RCC_OscInitStruct.PLL.PLLN = 81;
RCC_OscInitStruct.PLL.PLLP = 1;
RCC_OscInitStruct.PLL.PLLQ = 1;
RCC_OscInitStruct.PLL.PLLR = 1;
RCC_OscInitStruct.PLL.PLLFRACV = 0x800;
RCC_OscInitStruct.PLL.PLLMODE = RCC_PLL_FRACTIONAL;
RCC_OscInitStruct.PLL.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED;
RCC_OscInitStruct.PLL.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED;
/**PLL2 Config
*/
RCC_OscInitStruct.PLL2.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL2.PLLSource = RCC_PLL12SOURCE_HSE;
RCC_OscInitStruct.PLL2.PLLM = 3;
RCC_OscInitStruct.PLL2.PLLN = 66;
RCC_OscInitStruct.PLL2.PLLP = 2;
RCC_OscInitStruct.PLL2.PLLQ = 1;
RCC_OscInitStruct.PLL2.PLLR = 1;
RCC_OscInitStruct.PLL2.PLLFRACV = 0x1400;
RCC_OscInitStruct.PLL2.PLLMODE = RCC_PLL_FRACTIONAL;
RCC_OscInitStruct.PLL2.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED;
RCC_OscInitStruct.PLL2.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED;
/**PLL3 Config
*/
RCC_OscInitStruct.PLL3.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL3.PLLSource = RCC_PLL3SOURCE_HSE;
RCC_OscInitStruct.PLL3.PLLM = 2;
RCC_OscInitStruct.PLL3.PLLN = 34;
RCC_OscInitStruct.PLL3.PLLP = 2;
RCC_OscInitStruct.PLL3.PLLQ = 17;
RCC_OscInitStruct.PLL3.PLLR = 37;
RCC_OscInitStruct.PLL3.PLLRGE = RCC_PLL3IFRANGE_1;
RCC_OscInitStruct.PLL3.PLLFRACV = 0x1A04;
RCC_OscInitStruct.PLL3.PLLMODE = RCC_PLL_FRACTIONAL;
RCC_OscInitStruct.PLL3.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED;
RCC_OscInitStruct.PLL3.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED;
/**PLL4 Config
*/
RCC_OscInitStruct.PLL4.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL4.PLLSource = RCC_PLL4SOURCE_HSE;
RCC_OscInitStruct.PLL4.PLLM = 4;
RCC_OscInitStruct.PLL4.PLLN = 99;
RCC_OscInitStruct.PLL4.PLLP = 6;
RCC_OscInitStruct.PLL4.PLLQ = 8;
RCC_OscInitStruct.PLL4.PLLR = 8;
RCC_OscInitStruct.PLL4.PLLRGE = RCC_PLL4IFRANGE_0;
RCC_OscInitStruct.PLL4.PLLFRACV = 0;
RCC_OscInitStruct.PLL4.PLLMODE = RCC_PLL_INTEGER;
RCC_OscInitStruct.PLL4.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED;
RCC_OscInitStruct.PLL4.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/**RCC Clock Config
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_ACLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|RCC_CLOCKTYPE_PCLK3|RCC_CLOCKTYPE_PCLK4
|RCC_CLOCKTYPE_PCLK5|RCC_CLOCKTYPE_MPU;
RCC_ClkInitStruct.MPUInit.MPU_Clock = RCC_MPUSOURCE_PLL1;
RCC_ClkInitStruct.MPUInit.MPU_Div = RCC_MPU_DIV2;
RCC_ClkInitStruct.AXISSInit.AXI_Clock = RCC_AXISSOURCE_PLL2;
RCC_ClkInitStruct.AXISSInit.AXI_Div = RCC_AXI_DIV1;
RCC_ClkInitStruct.MCUInit.MCU_Clock = RCC_MCUSSOURCE_PLL3;
RCC_ClkInitStruct.MCUInit.MCU_Div = RCC_MCU_DIV1;
RCC_ClkInitStruct.APB4_Div = RCC_APB4_DIV2;
RCC_ClkInitStruct.APB5_Div = RCC_APB5_DIV4;
RCC_ClkInitStruct.APB1_Div = RCC_APB1_DIV2;
RCC_ClkInitStruct.APB2_Div = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB3_Div = RCC_APB3_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/**Set the HSE division factor for RTC clock
*/
__HAL_RCC_RTC_HSEDIV(24);
}
/**
* @brief Peripherals Common Clock Configuration
* @retval None
*/
void PeriphCommonClock_Config(void) {
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
/** Initializes the common periph clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_CKPER;
PeriphClkInit.CkperClockSelection = RCC_CKPERCLKSOURCE_HSE;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
Error_Handler();
}
}
extern void rt_hw_systick_init(void);
extern int rt_hw_usart_init(void);
void rt_hw_board_init()
{
/* HAL_Init() function is called at the beginning of the program */
HAL_Init();
/* enable interrupt */
__set_PRIMASK(0);
/* Configure the system clock */
if (IS_ENGINEERING_BOOT_MODE()) {
/* Configure the system clock */
SystemClock_Config();
}
/* disable interrupt */
__set_PRIMASK(1);
rt_hw_systick_init();
/* Heap initialization */
#if defined(RT_USING_HEAP)
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
/* Pin driver initialization is open by default */
#ifdef RT_USING_PIN
rt_hw_pin_init();
#endif
/* USART driver initialization is open by default */
#ifdef RT_USING_SERIAL
rt_hw_usart_init();
#endif
/* Set the shell console output device */
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
/* Board underlying hardware initialization */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}

54
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-5 SummerGift first version
* 2019-04-09 WillianChan add stm32f469-st-disco bsp
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <rtthread.h>
#include "stm32mp1xx.h"
#include "stm32mp1xx_hal.h"
#include "drv_common.h"
#include "drv_gpio.h"
#ifdef __cplusplus
extern "C" {
#endif
#define STM32_FLASH_START_ADRESS ((uint32_t)0x10000000)
#define STM32_FLASH_SIZE (256 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END ((uint32_t)0x10040000 + (STM32_SRAM_SIZE * 1024))
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern int __bss_end__;
#define HEAP_BEGIN (0x10040000 + 64 * 1024)
#endif
#define HEAP_END STM32_SRAM_END
void SystemClock_Config(void);
extern void _Error_Handler(char *s, int num);
#ifdef __cplusplus
}
#endif
#endif

36
bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x10000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x1003FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x10050000;
define symbol __ICFEDIT_region_RAM_end__ = 0x1005FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x0400;
define symbol __ICFEDIT_size_heap__ = 0x0000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
/* Create region for OPENAMP */
/* !!! These 4 lines can be commented if OPENAMP is not used !!!*/
define symbol __OPENAMP_region_start__ = 0x10040000;
define symbol __OPENAMP_region_size__ = 0x8000;
export symbol __OPENAMP_region_start__;
export symbol __OPENAMP_region_size__;
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, last block CSTACK};

157
bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.lds Normal file
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/*
* linker script for STM32F4xx with GNU ld
* bernard.xiong 2009-10-14
*/
/* Program Entry, set to mark it as "used" and avoid gc */
MEMORY
{
ROM (rx) : ORIGIN = 0x10000000, LENGTH = 256k /* 256KB flash */
RAM (rw) : ORIGIN = 0x10040000, LENGTH = 128k /* 128K sram */
}
ENTRY(Reset_Handler)
_system_stack_size = 0x200;
SECTIONS
{
.text :
{
. = ALIGN(4);
_stext = .;
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
*(.text) /* remaining code */
*(.text.*) /* remaining code */
*(.rodata) /* read-only data (constants) */
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
PROVIDE(__ctors_start__ = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE(__ctors_end__ = .);
. = ALIGN(4);
_etext = .;
} > ROM = 0
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
/* This is used by the startup in order to initialize the .data secion */
_sidata = .;
} > ROM
__exidx_end = .;
/* .data section which is used for initialized data */
.data : AT (_sidata)
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_sdata = . ;
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >RAM
.stack :
{
. = ALIGN(4);
_sstack = .;
. = . + _system_stack_size;
. = ALIGN(4);
_estack = .;
} >RAM
__bss_start = .;
.bss :
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_ebss = . ;
*(.bss.init)
} > RAM
__bss_end = .;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
* of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}

27
bsp/stm32/stm32mp157a-st-ev1/board/linker_scripts/link.sct Normal file
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; *************************************************************
; *** Scatter-Loading Description ***
; *************************************************************
LR_VECTORS 0x00000000 0x00000400 { ; load region size_region
.isr_vector +0 {
startup*.o (RESET, +First)
}
}
LR_IROM1 0x10000000 0x00040000 { ; load region size_region
ER_IROM1 0x10000000 0x00040000 { ; load address = execution address
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x10050000 0x00010000 { ; RW data
.ANY (+RW +ZI)
}
;; ***** Create region for OPENAMP *****
;; *** These 4 lines can be commented if OPENAMP is not used *****
; .resource_table +0 ALIGN 4 { ; resource table
; *(.resource_table)
; } __OpenAMP_SHMEM__ 0x10040000 EMPTY 0x8000 {} ; Shared Memory area used by OpenAMP
}

124
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_hard_i2c.c Normal file
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#include <board.h>
#include "drv_hard_i2c.h"
//#define DRV_DEBUG
#define LOG_TAG "drv.hardi2c"
#include <drv_log.h>
I2C_HandleTypeDef hI2c4;
int32_t BSP_I2C4_Init(void)
{
int32_t status = RT_EOK;
if (HAL_I2C_GetState(&hI2c4) == HAL_I2C_STATE_RESET)
{
if (MX_I2C4_Init(&hI2c4) != HAL_OK)
{
status = -RT_EBUSY;
}
/* Init the I2C Msp */
if (HAL_I2C_Init(&hI2c4) != HAL_OK)
{
LOG_D("I2C4 Init Error!\n");
status = -RT_EBUSY;
}
}
return status;
}
int32_t BSP_I2C4_DeInit(void)
{
int32_t status = RT_EOK;
HAL_I2C_MspDeInit(&hI2c4);
/* Init the I2C */
if (HAL_I2C_DeInit(&hI2c4) != HAL_OK)
{
status = -RT_EEMPTY;
}
return status;
}
HAL_StatusTypeDef MX_I2C4_Init(I2C_HandleTypeDef *hI2c)
{
hI2c4.Instance = I2C4;
hI2c->Init.Timing = I2C4_TIMING;
hI2c->Init.OwnAddress1 = STPMU1_I2C_ADDRESS;
hI2c->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hI2c->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hI2c->Init.OwnAddress2 = 0;
hI2c->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hI2c->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hI2c->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
return HAL_I2C_Init(hI2c);
}
int32_t BSP_I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length);
}
int32_t BSP_I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length);
}
int32_t BSP_I2C4_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length);
}
int32_t BSP_I2C4_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length);
}
int32_t BSP_I2C4_IsReady(uint16_t DevAddr, uint32_t Trials)
{
int32_t status = RT_EOK;
if(HAL_I2C_IsDeviceReady(&hI2c4, DevAddr, Trials, 1000) != HAL_OK)
{
status = -RT_EBUSY;
}
return status;
}
static int32_t I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
{
int32_t status = -RT_EIO;
if(HAL_I2C_Mem_Write(&hI2c4, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
{
status = RT_EOK;
}
return status;
}
static int32_t I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
{
int32_t status = -RT_EIO;
if (HAL_I2C_Mem_Read(&hI2c4, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
{
status = RT_EOK;
}
return status;
}

48
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#ifndef __DRV_HARD_I2C_H__
#define __DRV_HARD_I2C_H__
/* Includes ------------------------------------------------------------------*/
#include "stm32mp1xx_hal.h"
#ifdef __cplusplus
extern "C" {
#endif
#define STPMU1_I2C_ADDRESS ((0x33 & 0x7F) << 1)
#ifndef I2C_SPEED
#define I2C_SPEED ((uint32_t)100000)
#endif /* I2C_SPEED */
#ifndef I2C4_TIMING
#define I2C4_TIMING ((uint32_t)0x10805E89)
#endif
static int32_t I2C4_WriteReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
static int32_t I2C4_ReadReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_Init(void);
int32_t BSP_I2C4_DeInit(void);
int32_t BSP_I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_IsReady(uint16_t DevAddr, uint32_t Trials);
HAL_StatusTypeDef MX_I2C4_Init(I2C_HandleTypeDef *hI2c);
#ifdef __cplusplus
}
#endif
#endif

128
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_lptim.c Normal file
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-19 thread-liu first version
*/
#include <board.h>
#ifdef BSP_USING_LPTIM
#include "drv_config.h"
#include <string.h>
#include <stdlib.h>
//#define DRV_DEBUG
#define LOG_TAG "drv.lptimer"
#include <drv_log.h>
LPTIM_HandleTypeDef hlptim1;
void LPTIM1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_LPTIM_IRQHandler(&hlptim1);
/* leave interrupt */
rt_interrupt_leave();
}
void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
{
if(hlptim->Instance == LPTIM1)
{
rt_kprintf("hello rt-thread!\n");
}
}
static int lptim_control(uint8_t pre_value)
{
if(pre_value > 7)
{
pre_value = 7;
}
hlptim1.Instance->CFGR &= ~(7 << 9); /* clear PRESC[2:0] */
hlptim1.Instance->CFGR |= pre_value << 9; /* set PRESC[2:0] */
return RT_EOK;
}
/**
* This function initialize the lptim
*/
static int lptim_init(void)
{
hlptim1.Instance = LPTIM1;
hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim1.Init.UltraLowPowerClock.Polarity = LPTIM_CLOCKPOLARITY_RISING;
hlptim1.Init.UltraLowPowerClock.SampleTime = LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION;
hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim1.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
hlptim1.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
hlptim1.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
if (HAL_LPTIM_Init(&hlptim1) != HAL_OK)
{
LOG_D("LPTIM Init Error!\n");
return -RT_ERROR;
}
/* ### Start counting in interrupt mode ############################# */
if (HAL_LPTIM_Counter_Start_IT(&hlptim1, 5000) != HAL_OK)
{
LOG_D("LPTIM Start Counting Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
static int lptim_deinit()
{
if (HAL_LPTIM_DeInit(&hlptim1) != HAL_OK)
{
LOG_D("LPTIM Deinit Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
static int lptim_sample(int argc, char *argv[])
{
if (argc > 1)
{
if (!strcmp(argv[1], "run"))
{
lptim_init();
}
else if (!strcmp(argv[1], "stop"))
{
lptim_deinit();
}
else if (!strcmp(argv[1], "set"))
{
if (argc > 2)
{
lptim_control(atoi(argv[2]));
}
}
}
else
{
rt_kprintf("Usage:\n");
rt_kprintf("lptim_sample run - open lptim, shell will printf 'hello rt-thread'\n");
rt_kprintf("lptim_sample set - set the lptim prescaler, lptim_sample set [0 - 7]\n");
}
return RT_EOK;
}
MSH_CMD_EXPORT(lptim_sample, low power timer sample);
#endif

103
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_wwdg.c Normal file
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#include <board.h>
#if defined(BSP_USING_WWDG)
#include "drv_config.h"
#include <string.h>
#include <stdlib.h>
//#define DRV_DEBUG
#define LOG_TAG "drv.wwg"
#include <drv_log.h>
#define LED5_PIN GET_PIN(A, 14)
WWDG_HandleTypeDef hwwdg1;
void WWDG1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_WWDG_IRQHandler(&hwwdg1);
/* leave interrupt */
rt_interrupt_leave();
}
void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg)
{
static unsigned char led_value = 0x00;
led_value = !led_value;
if(hwwdg->Instance==WWDG1)
{
HAL_WWDG_Refresh(&hwwdg1);
rt_pin_write(LED5_PIN, led_value);
}
}
static void wwdg_init()
{
rt_pin_mode(LED5_PIN, PIN_MODE_OUTPUT);
hwwdg1.Instance = WWDG1;
hwwdg1.Init.Prescaler = WWDG_PRESCALER_8;
hwwdg1.Init.Window = 0X5F;
hwwdg1.Init.Counter = 0x7F;
hwwdg1.Init.EWIMode = WWDG_EWI_ENABLE;
if (HAL_WWDG_Init(&hwwdg1) != HAL_OK)
{
Error_Handler();
}
}
static void wwdg_control(uint8_t pre_value)
{
if(pre_value > 7)
{
pre_value = 7;
}
hwwdg1.Instance->CFR &= ~(7 << 11); /* clear WDGTB[2:0] */
hwwdg1.Instance->CFR |= pre_value << 11; /* set WDGTB[2:0] */
}
static int wwdg_sample(int argc, char *argv[])
{
if (argc > 1)
{
if (!strcmp(argv[1], "run"))
{
wwdg_init();
}
else if (!strcmp(argv[1], "set"))
{
if (argc > 2)
{
wwdg_control(atoi(argv[2]));
}
}
}
else
{
rt_kprintf("Usage:\n");
rt_kprintf("wwdg_sample run - open wwdg, when feed wwdg in wwdg irq, the LD5 will blink\n");
rt_kprintf("wwdg_sample set - set the wwdg prescaler, wwdg_sample set [0 - 7]\n");
}
return RT_EOK;
}
MSH_CMD_EXPORT(wwdg_sample, window watch dog sample);
#endif

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bsp/stm32/stm32mp157a-st-ev1/board/ports/stpmic.c Normal file
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315
bsp/stm32/stm32mp157a-st-ev1/board/ports/stpmic.h Normal file
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/**
******************************************************************************
* @file stm32mp15xx__stpmic1.h
* @author MCD Application Team
* @brief stpmu driver functions used for ST internal validation
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
*
******************************************************************************
*/
#ifndef __STPMIC_H__
#define __STPMIC_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32mp1xx_hal.h"
/* Exported types ------------------------------------------------------------*/
typedef enum
{
STPMU1_BUCK1=1,
STPMU1_BUCK2,
STPMU1_BUCK3,
STPMU1_BUCK4,
STPMU1_LDO1,
STPMU1_LDO2,
STPMU1_LDO3,
STPMU1_LDO4,
STPMU1_LDO5,
STPMU1_LDO6,
STPMU1_VREFDDR,
}PMIC_RegulId_TypeDef;
/* IRQ definitions */
typedef enum {
/* Interrupt Register 1 (0x50 for latch) */
IT_SWOUT_R,
IT_SWOUT_F,
IT_VBUS_OTG_R,
IT_VBUS_OTG_F,
IT_WAKEUP_R,
IT_WAKEUP_F,
IT_PONKEY_R,
IT_PONKEY_F,
/* Interrupt Register 2 (0x51 for latch) */
IT_OVP_BOOST,
IT_OCP_BOOST,
IT_OCP_SWOUT,
IT_OCP_OTG,
IT_CURLIM_BUCK4,
IT_CURLIM_BUCK3,
IT_CURLIM_BUCK2,
IT_CURLIM_BUCK1,
/* Interrupt Register 3 (0x52 for latch) */
IT_SHORT_SWOUT,
IT_SHORT_SWOTG,
IT_CURLIM_LDO6,
IT_CURLIM_LDO5,
IT_CURLIM_LDO4,
IT_CURLIM_LDO3,
IT_CURLIM_LDO2,
IT_CURLIM_LDO1,
/* Interrupt Register 3 (0x52 for latch) */
IT_SWIN_R,
IT_SWIN_F,
IT_RESERVED_1,
IT_RESERVED_2,
IT_VINLOW_R,
IT_VINLOW_F,
IT_TWARN_R,
IT_TWARN_F,
IRQ_NR,
} PMIC_IRQn;
/**
* @}
*/
/** @defgroup STM32MP15XX_EVAL_STPMU_Exported_Constants Exported Constants
* @{
*/
/* Exported constants --------------------------------------------------------*/
#define BIT(_x) (1<<(_x))
#define STM32_PMIC_NUM_IRQ_REGS 4
#define TURN_ON_REG 0x1
#define TURN_OFF_REG 0x2
#define ICC_LDO_TURN_OFF_REG 0x3
#define ICC_BUCK_TURN_OFF_REG 0x4
#define RESET_STATUS_REG 0x5
#define VERSION_STATUS_REG 0x6
#define MAIN_CONTROL_REG 0x10
#define PADS_PULL_REG 0x11
#define BUCK_PULL_DOWN_REG 0x12
#define LDO14_PULL_DOWN_REG 0x13
#define LDO56_PULL_DOWN_REG 0x14
#define VIN_CONTROL_REG 0x15
#define PONKEY_TIMER_REG 0x16
#define MASK_RANK_BUCK_REG 0x17
#define MASK_RESET_BUCK_REG 0x18
#define MASK_RANK_LDO_REG 0x19
#define MASK_RESET_LDO_REG 0x1A
#define WATCHDOG_CONTROL_REG 0x1B
#define WATCHDOG_TIMER_REG 0x1C
#define BUCK_ICC_TURNOFF_REG 0x1D
#define LDO_ICC_TURNOFF_REG 0x1E
#define BUCK_APM_CONTROL_REG 0x1F
#define BUCK1_CONTROL_REG 0x20
#define BUCK2_CONTROL_REG 0x21
#define BUCK3_CONTROL_REG 0x22
#define BUCK4_CONTROL_REG 0x23
#define VREF_DDR_CONTROL_REG 0x24
#define LDO1_CONTROL_REG 0x25
#define LDO2_CONTROL_REG 0x26
#define LDO3_CONTROL_REG 0x27
#define LDO4_CONTROL_REG 0x28
#define LDO5_CONTROL_REG 0x29
#define LDO6_CONTROL_REG 0x2A
#define BUCK1_PWRCTRL_REG 0x30
#define BUCK2_PWRCTRL_REG 0x31
#define BUCK3_PWRCTRL_REG 0x32
#define BUCK4_PWRCTRL_REG 0x33
#define VREF_DDR_PWRCTRL_REG 0x34
#define LDO1_PWRCTRL_REG 0x35
#define LDO2_PWRCTRL_REG 0x36
#define LDO3_PWRCTRL_REG 0x37
#define LDO4_PWRCTRL_REG 0x38
#define LDO5_PWRCTRL_REG 0x39
#define LDO6_PWRCTRL_REG 0x3A
#define FREQUENCY_SPREADING_REG 0x3B
#define USB_CONTROL_REG 0x40
#define ITLATCH1_REG 0x50
#define ITLATCH2_REG 0x51
#define ITLATCH3_REG 0x52
#define ITLATCH4_REG 0x53
#define ITSETLATCH1_REG 0x60
#define ITSETLATCH2_REG 0x61
#define ITSETLATCH3_REG 0x62
#define ITSETLATCH4_REG 0x63
#define ITCLEARLATCH1_REG 0x70
#define ITCLEARLATCH2_REG 0x71
#define ITCLEARLATCH3_REG 0x72
#define ITCLEARLATCH4_REG 0x73
#define ITMASK1_REG 0x80
#define ITMASK2_REG 0x81
#define ITMASK3_REG 0x82
#define ITMASK4_REG 0x83
#define ITSETMASK1_REG 0x90
#define ITSETMASK2_REG 0x91
#define ITSETMASK3_REG 0x92
#define ITSETMASK4_REG 0x93
#define ITCLEARMASK1_REG 0xA0
#define ITCLEARMASK2_REG 0xA1
#define ITCLEARMASK3_REG 0xA2
#define ITCLEARMASK4_REG 0xA3
#define ITSOURCE1_REG 0xB0
#define ITSOURCE2_REG 0xB1
#define ITSOURCE3_REG 0xB2
#define ITSOURCE4_REG 0xB3
#define LDO_VOLTAGE_MASK 0x7C
#define BUCK_VOLTAGE_MASK 0xFC
#define LDO_BUCK_VOLTAGE_SHIFT 2
#define LDO_ENABLE_MASK 0x01
#define BUCK_ENABLE_MASK 0x01
#define BUCK_HPLP_ENABLE_MASK 0x02
#define LDO_HPLP_ENABLE_MASK 0x02
#define LDO_BUCK_HPLP_SHIFT 1
#define LDO_BUCK_RANK_MASK 0x01
#define LDO_BUCK_RESET_MASK 0x01
#define LDO_BUCK_PULL_DOWN_MASK 0x03
/* Main PMIC Control Register
* MAIN_CONTROL_REG
* Address : 0x10
* */
#define ICC_EVENT_ENABLED BIT(4)
#define PWRCTRL_POLARITY_HIGH BIT(3)
#define PWRCTRL_PIN_VALID BIT(2)
#define RESTART_REQUEST_ENABLED BIT(1)
#define SOFTWARE_SWITCH_OFF_ENABLED BIT(0)
/* Main PMIC PADS Control Register
* PADS_PULL_REG
* Address : 0x11
* */
#define WAKEUP_DETECTOR_DISABLED BIT(4)
#define PWRCTRL_PD_ACTIVE BIT(3)
#define PWRCTRL_PU_ACTIVE BIT(2)
#define WAKEUP_PD_ACTIVE BIT(1)
#define PONKEY_PU_ACTIVE BIT(0)
/* Main PMIC VINLOW Control Register
* VIN_CONTROL_REGC DMSC
* Address : 0x15
* */
#define SWIN_DETECTOR_ENABLED BIT(7)
#define SWOUT_DETECTOR_ENABLED BIT(6)
#define VINLOW_HYST_MASK 0x3
#define VINLOW_HYST_SHIFT 4
#define VINLOW_THRESHOLD_MASK 0x7
#define VINLOW_THRESHOLD_SHIFT 1
#define VINLOW_ENABLED 0x01
#define VINLOW_CTRL_REG_MASK 0xFF
/* USB Control Register
* Address : 0x40
* */
#define BOOST_OVP_DISABLED BIT(7)
#define VBUS_OTG_DETECTION_DISABLED BIT(6)
// Discharge not implemented
#define OCP_LIMIT_HIGH BIT(3)
#define SWIN_SWOUT_ENABLED BIT(2)
#define USBSW_OTG_SWITCH_ENABLED BIT(1)
/* IRQ masks */
/* Interrupt Mask for Register 1 (0x50 for latch) */
#define IT_SWOUT_R_MASK BIT(7)
#define IT_SWOUT_F_MASK BIT(6)
#define IT_VBUS_OTG_R_MASK BIT(5)
#define IT_VBUS_OTG_F_MASK BIT(4)
#define IT_WAKEUP_R_MASK BIT(3)
#define IT_WAKEUP_F_MASK BIT(2)
#define IT_PONKEY_R_MASK BIT(1)
#define IT_PONKEY_F_MASK BIT(0)
/* Interrupt Mask for Register 2 (0x51 for latch) */
#define IT_OVP_BOOST_MASK BIT(7)
#define IT_OCP_BOOST_MASK BIT(6)
#define IT_OCP_SWOUT_MASK BIT(5)
#define IT_OCP_OTG_MASK BIT(4)
#define IT_CURLIM_BUCK4_MASK BIT(3)
#define IT_CURLIM_BUCK3_MASK BIT(2)
#define IT_CURLIM_BUCK2_MASK BIT(1)
#define IT_CURLIM_BUCK1_MASK BIT(0)
/* Interrupt Mask for Register 3 (0x52 for latch) */
#define IT_SHORT_SWOUT_MASK BIT(7)
#define IT_SHORT_SWOTG_MASK BIT(6)
#define IT_CURLIM_LDO6_MASK BIT(5)
#define IT_CURLIM_LDO5_MASK BIT(4)
#define IT_CURLIM_LDO4_MASK BIT(3)
#define IT_CURLIM_LDO3_MASK BIT(2)
#define IT_CURLIM_LDO2_MASK BIT(1)
#define IT_CURLIM_LDO1_MASK BIT(0)
/* Interrupt Mask for Register 4 (0x53 for latch) */
#define IT_SWIN_R_MASK BIT(7)
#define IT_SWIN_F_MASK BIT(6)
/* Reserved 1 */
/* Reserved 2 */
#define IT_VINLOW_R_MASK BIT(3)
#define IT_VINLOW_F_MASK BIT(2)
#define IT_TWARN_R_MASK BIT(1)
#define IT_TWARN_F_MASK BIT(0)
#define PMIC_VERSION_ID 0x10
#define NVM_SECTOR3_REGISTER_7 0x33
//#define STPMU1_I2C_ADDRESS ((NVM_SECTOR3_REGISTER_7 & 0x7F) << 1 )
/**
* @}
*/
/** @defgroup STM32MP15XX_EVAL_STPMU_Exported_Functions Exported Functions
* @{
*/
/* Exported functions --------------------------------------------------------*/
uint8_t STPMU1_Register_Read(uint8_t register_id);
void STPMU1_Register_Write(uint8_t register_id, uint8_t value);
void STPMU1_Register_Update(uint8_t register_id, uint8_t value, uint8_t mask);
void STPMU1_Enable_Interrupt(PMIC_IRQn IRQn);
void STPMU1_Disable_Interrupt(PMIC_IRQn IRQn);
void STPMU1_Regulator_Enable(PMIC_RegulId_TypeDef id);
void STPMU1_Regulator_Disable(PMIC_RegulId_TypeDef id);
uint8_t STPMU1_Is_Regulator_Enabled(PMIC_RegulId_TypeDef id);
void STPMU1_Regulator_Voltage_Set(PMIC_RegulId_TypeDef id,uint16_t milivolts);
uint32_t BSP_PMIC_Init(void);
uint32_t BSP_PMIC_DeInit(void);
uint32_t BSP_PMIC_Is_Device_Ready(void);
uint32_t BSP_PMIC_InitRegulators (void);
__weak void BSP_PMIC_INTn_Callback(PMIC_IRQn IRQn);
#ifdef __cplusplus
}
#endif
#endif

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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\project.ewp</path>
</project>
<batchBuild/>
</workspace>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>25000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>1</RunSim>
<RunTarget>0</RunTarget>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\keil\List\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<tPdscDbg>0</tPdscDbg>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>11</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U -O207 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U30000299 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
</ProjectOpt>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32MP157AAAx:Cortex-M4</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32MP1xx_DFP.1.3.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x10020000,0x00020000) IRAM2(0x10040000,0x00020000) IROM(0x10000000,0x00020000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000)</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10020000 -FC1000)</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:STM32MP157AAAx$Drivers\CMSIS\Device\ST\STM32MP1xx\Include\stm32mp157axx_cm4.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32MP157AAAx$SVD\STM32MP157x.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
<OutputName>rt-thread</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\build\keil\List\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>4</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x10020000</StartAddress>
<Size>0x20000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x40000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
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<Type>0</Type>
<StartAddress>0x0</StartAddress>
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<Type>0</Type>
<StartAddress>0x0</StartAddress>
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</OCR_RVCT8>
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<Type>0</Type>
<StartAddress>0x10050000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>1</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>CORE_CM4, USE_HAL_DRIVER, STM32MP157Axx, RT_USING_ARM_LIBC</Define>
<Undefine></Undefine>
<IncludePath>applications;.;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\CubeMX_Config\CM4\Inc;board\ports;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Inc;..\libraries\STM32MPxx_HAL\CMSIS\Device\ST\STM32MP1xx\Include;..\libraries\STM32MPxx_HAL\CMSIS\Core\Include;..\libraries\STM32MPxx_HAL\CMSIS\Include</IncludePath>
</VariousControls>
</Cads>
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<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
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<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Applications</GroupName>
<Files>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>applications\main.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>cpu</GroupName>
<Files>
<File>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
<File>
<FileName>div0.c</FileName>
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<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
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<FileName>cpuport.c</FileName>
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<FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
</File>
<File>
<FileName>context_rvds.S</FileName>
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<FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
</File>
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<GroupName>DeviceDrivers</GroupName>
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<File>
<FileName>pin.c</FileName>
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<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
</File>
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<FileName>serial.c</FileName>
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<FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
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</File>
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</File>
<File>
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<FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath>
</File>
</Files>
</Group>
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<GroupName>Drivers</GroupName>
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<File>
<FileName>board.c</FileName>
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<FilePath>board\board.c</FilePath>
</File>
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<FileName>system_stm32mp1xx.c</FileName>
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<FilePath>board\CubeMX_Config\CM4\Src\stm32mp1xx_hal_msp.c</FilePath>
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</Group>
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<GroupName>finsh</GroupName>
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<File>
<FileName>shell.c</FileName>
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<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
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<FilePath>..\..\..\components\finsh\finsh_parser.c</FilePath>
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<FileName>finsh_vm.c</FileName>
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<FilePath>..\..\..\components\finsh\finsh_vm.c</FilePath>
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<FileName>finsh_token.c</FileName>
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<FilePath>..\..\..\components\finsh\finsh_token.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Kernel</GroupName>
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<File>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\clock.c</FilePath>
</File>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\components.c</FilePath>
</File>
<File>
<FileName>device.c</FileName>
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<FilePath>..\..\..\src\device.c</FilePath>
</File>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\idle.c</FilePath>
</File>
<File>
<FileName>ipc.c</FileName>
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<FilePath>..\..\..\src\ipc.c</FilePath>
</File>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\irq.c</FilePath>
</File>
<File>
<FileName>kservice.c</FileName>
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<FilePath>..\..\..\src\kservice.c</FilePath>
</File>
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<FileName>memheap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\memheap.c</FilePath>
</File>
<File>
<FileName>mempool.c</FileName>
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<FilePath>..\..\..\src\mempool.c</FilePath>
</File>
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<FileName>object.c</FileName>
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<FilePath>..\..\..\src\object.c</FilePath>
</File>
<File>
<FileName>scheduler.c</FileName>
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<FilePath>..\..\..\src\scheduler.c</FilePath>
</File>
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<FileName>signal.c</FileName>
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<FilePath>..\..\..\src\signal.c</FilePath>
</File>
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<FileName>thread.c</FileName>
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<FilePath>..\..\..\src\thread.c</FilePath>
</File>
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<FileName>timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\timer.c</FilePath>
</File>
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</Group>
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<GroupName>libc</GroupName>
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<File>
<FileName>libc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\libc.c</FilePath>
</File>
<File>
<FileName>mem_std.c</FileName>
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<FilePath>..\..\..\components\libc\compilers\armlibc\mem_std.c</FilePath>
</File>
<File>
<FileName>stubs.c</FileName>
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<FilePath>..\..\..\components\libc\compilers\armlibc\stubs.c</FilePath>
</File>
<File>
<FileName>time.c</FileName>
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<FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>STM32_HAL</GroupName>
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<File>
<FileName>stm32mp1xx_hal.c</FileName>
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</File>
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</Groups>
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</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>&lt;Project Info&gt;</LayName>
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<LayKeys></LayKeys>
<LayCat></LayCat>
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</Project>

175
bsp/stm32/stm32mp157a-st-ev1/rtconfig.h Normal file
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@ -0,0 +1,175 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 256
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_DEBUG
#define RT_DEBUG_COLOR
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_MEMHEAP
#define RT_USING_MEMHEAP_AS_HEAP
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart4"
#define RT_VER_NUM 0x40003
#define ARCH_ARM
#define RT_USING_CPU_FFS
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M4
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
#define FINSH_ARG_MAX 10
/* Device virtual file system */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* Using USB */
/* POSIX layer and C standard library */
#define RT_USING_LIBC
/* Network */
/* Socket abstraction layer */
/* Network interface device */
/* light weight TCP/IP stack */
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* tools packages */
/* system packages */
/* peripheral libraries and drivers */
/* miscellaneous packages */
/* samples: kernel and components samples */
#define SOC_FAMILY_STM32
#define SOC_SERIES_STM32MP1
/* Hardware Drivers Config */
#define SOC_STM32MP157A
/* Onboard Peripheral Drivers */
#define BSP_USING_STLINK_TO_USART
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_UART4
/* Board extended module Drivers */
#endif

150
bsp/stm32/stm32mp157a-st-ev1/rtconfig.py Normal file
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import os
# toolchains options
ARCH='arm'
CPU='cortex-m4'
CROSS_TOOL='gcc'
# bsp lib config
BSP_LIBRARY_TYPE = None
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
# cross_tool provides the cross compiler
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'C:\Users\XXYYZZ'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = r'C:/Keil_v5'
elif CROSS_TOOL == 'iar':
PLATFORM = 'iar'
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
CXX = PREFIX + 'g++'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -Dgcc'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2 -g'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O2'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
elif PLATFORM == 'armcc':
# toolchains
CC = 'armcc'
CXX = 'armcc'
AS = 'armasm'
AR = 'armar'
LINK = 'armlink'
TARGET_EXT = 'axf'
DEVICE = ' --cpu Cortex-M4.fp '
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
AFLAGS = DEVICE + ' --apcs=interwork '
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
CFLAGS += ' -D__MICROLIB '
AFLAGS += ' --pd "__MICROLIB SETA 1" '
LFLAGS += ' --library_type=microlib '
EXEC_PATH += '/ARM/ARMCC/bin/'
if BUILD == 'debug':
CFLAGS += ' -g -O0'
AFLAGS += ' -g'
else:
CFLAGS += ' -O2'
CXXFLAGS = CFLAGS
CFLAGS += ' -std=c99'
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
elif PLATFORM == 'iar':
# toolchains
CC = 'iccarm'
CXX = 'iccarm'
AS = 'iasmarm'
AR = 'iarchive'
LINK = 'ilinkarm'
TARGET_EXT = 'out'
DEVICE = '-Dewarm'
CFLAGS = DEVICE
CFLAGS += ' --diag_suppress Pa050'
CFLAGS += ' --no_cse'
CFLAGS += ' --no_unroll'
CFLAGS += ' --no_inline'
CFLAGS += ' --no_code_motion'
CFLAGS += ' --no_tbaa'
CFLAGS += ' --no_clustering'
CFLAGS += ' --no_scheduling'
CFLAGS += ' --endian=little'
CFLAGS += ' --cpu=Cortex-M4'
CFLAGS += ' -e'
CFLAGS += ' --fpu=VFPv4_sp'
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
CFLAGS += ' --silent'
AFLAGS = DEVICE
AFLAGS += ' -s+'
AFLAGS += ' -w+'
AFLAGS += ' -r'
AFLAGS += ' --cpu Cortex-M4'
AFLAGS += ' --fpu VFPv4_sp'
AFLAGS += ' -S'
if BUILD == 'debug':
CFLAGS += ' --debug'
CFLAGS += ' -On'
else:
CFLAGS += ' -Oh'
LFLAGS = ' --config "board/linker_scripts/link.icf"'
LFLAGS += ' --entry __iar_program_start'
CXXFLAGS = CFLAGS
EXEC_PATH = EXEC_PATH + '/arm/bin/'
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
def dist_handle(BSP_ROOT, dist_dir):
import sys
cwd_path = os.getcwd()
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
from sdk_dist import dist_do_building
dist_do_building(BSP_ROOT, dist_dir)

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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\template.ewp</path>
</project>
<batchBuild/>
</workspace>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>25000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>1</RunSim>
<RunTarget>0</RunTarget>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\keil\List\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<tPdscDbg>0</tPdscDbg>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>11</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U -O207 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U30000299 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
</ProjectOpt>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\keil\List\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>6</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 ) -FC1000 -FD10020000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U066BFF343339415043223048 -O206 -SF10000 -C0 -A2 -I0 -HNlocalhost -HP7184 -P1 -N00("") -D00(00000000) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10050000 -FC1000 -FN0</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>0</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
</DebugDescription>
</TargetOption>
</Target>
<Group>
<GroupName>Source Group 1</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
</Group>
</ProjectOpt>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32MP157AAAx:Cortex-M4</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32MP1xx_DFP.1.3.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x10020000,0x00020000) IRAM2(0x10040000,0x00020000) IROM(0x10000000,0x00020000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000)</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10020000 -FC1000)</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:STM32MP157AAAx$Drivers\CMSIS\Device\ST\STM32MP1xx\Include\stm32mp157axx_cm4.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32MP157AAAx$SVD\STM32MP157x.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
<OutputName>rt-thread</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\build\keil\List\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>4</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x10020000</StartAddress>
<Size>0x20000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x40000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x10050000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>1</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Source Group 1</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>&lt;Project Info&gt;</LayName>
<LayDesc></LayDesc>
<LayUrl></LayUrl>
<LayKeys></LayKeys>
<LayCat></LayCat>
<LayLic></LayLic>
<LayTarg>0</LayTarg>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>