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[kernel] Specification interrupt nested level variable declaration type (#9568)

This commit is contained in:
Yuqiang Wang 2024-10-24 05:08:29 +08:00 committed by GitHub
parent 40124ca12b
commit b3d59050b0
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GPG Key ID: B5690EEEBB952194
36 changed files with 36 additions and 36 deletions
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2
bsp/allwinner_tina/libcpu/interrupt.c
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@ -14,7 +14,7 @@
#include "interrupt.h"
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;

2
bsp/asm9260t/platform/interrupt.c
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@ -15,7 +15,7 @@
#define MAX_HANDLERS (64)
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc irq_desc[MAX_HANDLERS];

2
bsp/at91/at91sam9260/platform/interrupt.c
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@ -13,7 +13,7 @@
#include "interrupt.h"
#define MAX_HANDLERS (AIC_IRQS + PIN_IRQS)
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc irq_desc[MAX_HANDLERS];

2
bsp/at91/at91sam9g45/platform/interrupt.c
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@ -15,7 +15,7 @@
#define AIC_IRQS 32
#define MAX_HANDLERS (AIC_IRQS + PIN_IRQS)
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc irq_desc[MAX_HANDLERS];

2
bsp/bluetrum/ab32vg1-ab-prougen/board/board.c
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@ -27,7 +27,7 @@ typedef void (*spiflash_init_func)(uint8_t sf_read, uint8_t dummy);
static struct rt_mutex mutex_spiflash = {0};
static struct rt_mutex mutex_cache = {0};
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
extern uint32_t __heap_start, __heap_end;
#ifdef RT_USING_CONSOLE

2
bsp/cvitek/c906_little/board/interrupt.c
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@ -15,7 +15,7 @@
#include "encoding.h"
#include "mmio.h"
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
extern rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
extern rt_uint32_t rt_thread_switch_interrupt_flag;

2
bsp/dm365/platform/interrupt.c
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@ -15,7 +15,7 @@
#define MAX_HANDLERS 64
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
struct rt_irq_desc irq_desc[MAX_HANDLERS];

2
bsp/nuvoton/libraries/n9h30/rtt_port/drv_sys.c
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@ -21,7 +21,7 @@
#define INT_IRQ 0x00
#define INT_FIQ 0x01
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;

2
bsp/nuvoton/libraries/nuc980/rtt_port/drv_sys.c
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@ -21,7 +21,7 @@
#define INT_IRQ 0x00
#define INT_FIQ 0x01
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;

2
bsp/nxp/imx/imx6sx/cortex-a9/cpu/interrupt.c
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@ -20,7 +20,7 @@
#define MAX_HANDLERS IMX_INTERRUPT_COUNT
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc isr_table[MAX_HANDLERS];

2
bsp/raspberry-pi/raspi2/cpu/interrupt.c
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@ -16,7 +16,7 @@
#define MAX_HANDLERS 64
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc isr_table[MAX_HANDLERS];

2
bsp/raspberry-pi/raspi3-32/cpu/interrupt.c
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@ -22,7 +22,7 @@
#ifdef RT_USING_SMP
#define rt_interrupt_nest rt_cpu_self()->irq_nest
#else
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
#endif
const unsigned int VECTOR_BASE = 0x00;

2
bsp/ti/c28x/tms320f28379d/board/board.c
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@ -17,7 +17,7 @@
#include "F28x_Project.h"
#ifndef RT_USING_SMP
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
#endif
extern rt_uint32_t rt_thread_switch_interrupt_flag;

2
libcpu/arm/AT91SAM7S/interrupt.c
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@ -13,7 +13,7 @@
#define MAX_HANDLERS 32
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;

2
libcpu/arm/AT91SAM7X/interrupt.c
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@ -18,7 +18,7 @@
/* exception and interrupt handler table */
struct rt_irq_desc irq_desc[MAX_HANDLERS];
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;

2
libcpu/arm/am335x/interrupt.c
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@ -19,7 +19,7 @@
#define MAX_HANDLERS 128
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc isr_table[MAX_HANDLERS];

2
libcpu/arm/cortex-r4/interrupt.c
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@ -22,7 +22,7 @@
/* exception and interrupt handler table */
struct rt_irq_desc irq_desc[MAX_HANDLERS];
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;

2
libcpu/arm/lpc214x/cpuport.c
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@ -16,7 +16,7 @@
#define MAX_HANDLERS 32
#define SVCMODE 0x13
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc irq_desc[MAX_HANDLERS];

2
libcpu/arm/lpc24xx/interrupt.c
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@ -18,7 +18,7 @@
/* exception and interrupt handler table */
struct rt_irq_desc irq_desc[MAX_HANDLERS];
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;

2
libcpu/arm/realview-a8-vmm/interrupt.c
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@ -16,7 +16,7 @@
#define MAX_HANDLERS NR_IRQS_PBA8
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc isr_table[MAX_HANDLERS];

2
libcpu/arm/s3c24x0/interrupt.c
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@ -15,7 +15,7 @@
#define MAX_HANDLERS 32
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc isr_table[MAX_HANDLERS];

2
libcpu/arm/s3c44b0/interrupt.c
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@ -15,7 +15,7 @@
#define MAX_HANDLERS 26
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
rt_isr_handler_t isr_table[MAX_HANDLERS];

2
libcpu/arm/sep4020/interrupt.c
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@ -15,7 +15,7 @@
#define MAX_HANDLERS 32
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc isr_table[MAX_HANDLERS];

2
libcpu/arm/zynqmp-r5/interrupt.c
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@ -16,7 +16,7 @@
#define MAX_HANDLERS IRQ_ZynqMP_MAXNR
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc isr_table[MAX_HANDLERS];

2
libcpu/m16c/m16c62p/cpuport.c
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@ -11,7 +11,7 @@
#include <rtthread.h>
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* switch flag on interrupt and thread pointer to save switch record */
rt_uint32_t rt_interrupt_from_thread;

2
libcpu/ppc/ppc405/interrupt.c
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@ -13,7 +13,7 @@
#include <asm/processor.h>
/* interrupt nest */
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
#define MAX_HANDLERS 32

2
libcpu/risc-v/t-head/c906/interrupt.c
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@ -15,7 +15,7 @@
#include "riscv.h"
#include "plic.h"
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
extern rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
extern rt_uint32_t rt_thread_switch_interrupt_flag;

2
libcpu/risc-v/t-head/c908/interrupt.c
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@ -15,7 +15,7 @@
#include "riscv.h"
#include "plic.h"
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
extern rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
extern rt_uint32_t rt_thread_switch_interrupt_flag;

2
libcpu/rx/cpuport.c
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@ -19,7 +19,7 @@
#define ENTER_INTERRUPT() ICU.SWINTR.BIT.SWINT = 1;
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* switch flag on interrupt and thread pointer to save switch record */

2
libcpu/sparc-v8/bm3803/interrupt.c
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@ -16,7 +16,7 @@
#define MAX_HANDLERS 256
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
struct rt_irq_desc isr_table[MAX_HANDLERS];
rt_uint32_t rt_interrupt_from_thread;
rt_uint32_t rt_interrupt_to_thread;

2
libcpu/ti-dsp/c28x/cpuport.c
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@ -17,7 +17,7 @@
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
rt_uint32_t rt_interrupt_from_thread;

2
libcpu/ti-dsp/c6x/interrupt.c
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@ -14,7 +14,7 @@
#define MAX_HANDLERS 128
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
struct rt_irq_desc isr_table[MAX_HANDLERS];
rt_uint32_t rt_interrupt_from_thread;
rt_uint32_t rt_interrupt_to_thread;

2
libcpu/unicore32/sep6200/interrupt.c
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@ -78,7 +78,7 @@ do{ \
}while(0)
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc isr_table[MAX_HANDLERS];
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;

2
libcpu/v850/70f34/cpuport.c
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@ -11,7 +11,7 @@
#include <rtthread.h>
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
/* switch flag on interrupt and thread pointer to save switch record */
rt_uint32_t rt_interrupt_from_thread;

2
libcpu/xilinx/microblaze/trap.c
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@ -25,7 +25,7 @@
extern XIntc int_ctl; /* The instance of the Interrupt Controller */
extern rt_uint32_t rt_interrupt_nest;
extern rt_atomic_t rt_interrupt_nest;
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;

2
src/scheduler_up.c
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@ -46,7 +46,7 @@ rt_uint32_t rt_thread_ready_priority_group;
rt_uint8_t rt_thread_ready_table[32];
#endif /* RT_THREAD_PRIORITY_MAX > 32 */
extern volatile rt_uint8_t rt_interrupt_nest;
extern volatile rt_atomic_t rt_interrupt_nest;
static rt_int16_t rt_scheduler_lock_nest;
rt_uint8_t rt_current_priority;