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AT32UC3B: Rewire _intx for updated exceptions file from Microchip (#8182)

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Raman 2023-10-25 06:58:03 +05:30 committed by GitHub
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211
libcpu/avr32/uc3/exception_gcc.S
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@ -1,28 +1,19 @@
/* This file is part of the ATMEL AVR32-UC3-SoftwareFramework-1.6.0 Release */ /**
* \file
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
* *
* \brief Exception and interrupt vectors. * \brief Exception and interrupt vectors mapping for the INTC Software Driver.
* *
* This file maps all events supported by an AVR32. * Copyright (c) 2009-2018 Microchip Technology Inc. and its subsidiaries.
* *
* - Compiler: GNU GCC for AVR32 * \asf_license_start
* - Supported devices: All AVR32 devices with an INTC module can be used.
* - AppNote:
* *
* \author Atmel Corporation: http://www.atmel.com \n * \page License
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are met:
* *
* 1. Redistributions of source code must retain the above copyright notice, this * 1. Redistributions of source code must retain the above copyright notice,
* list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* *
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
@ -31,24 +22,27 @@
* 3. The name of Atmel may not be used to endorse or promote products derived * 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission. * from this software without specific prior written permission.
* *
* 4. This software may only be redistributed and used in connection with an Atmel * 4. This software may only be redistributed and used in connection with an
* AVR product. * Atmel microcontroller product.
* *
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
* *
*/ */
#if !__AVR32_UC__ && !__AVR32_AP__ #if !__AVR32_UC__ && !__AVR32_AP__
#error Implementation of the AVR32 architecture not supported by the INTC driver. #error Implementation for the AVR32 architecture only.
#endif #endif
@ -59,18 +53,20 @@
//! \verbatim //! \verbatim
.section .exception, "ax", @progbits .section .exception, "ax", @progbits
// Start of Exception Vector Table. // Start of Exception Vector Table.
// EVBA must be aligned with a power of two strictly greater than the EVBA- /*
// relative offset of the last vector. * EVBA must be aligned with a power of two strictly greater than the
.balign 0x200 * EVBA-relative offset of the last vector.
*/
.balign 0x200
// Export symbol. // Export symbol.
.global _evba .global _evba
.type _evba, @function .type _evba, @function
_evba: _evba:
.org 0x000 .org 0x000
@ -184,20 +180,39 @@ _handle_Supervisor_Call:
rjmp $ rjmp $
// Interrupt support. /*
// The interrupt controller must provide the offset address relative to EVBA. * Interrupt support.
// Important note: * The interrupt controller must provide the offset address relative to EVBA.
// All interrupts call a C function named _get_interrupt_handler. * Important note:
// This function will read group and interrupt line number to then return in * All interrupts call a C function named _get_interrupt_handler.
// R12 a pointer to a user-provided interrupt handler. * This function will read group and interrupt line number to then return in
*R12 a pointer to a user-provided interrupt handler.
*/
.balign 4 .balign 4
_int0: .irp priority, 0, 1, 2, 3
mov r12, 0 // Pass the int_level parameter to the _get_interrupt_handler function. .global _int\priority
.type _int\priority, @function
_int\priority:
#if __AVR32_UC__
/*
* R8-R12, LR, PC and SR are automatically pushed onto the system stack
* by the CPU upon interrupt entry. No other register is saved by
* hardware.
*/
#elif __AVR32_AP__
/*
* PC and SR are automatically saved in respectively RAR_INTx and
* RSR_INTx by the CPU upon interrupt entry. No other register is saved
* by hardware.
*/
pushm r8-r12, lr
#endif
mov r12, \priority // Pass the int_level parameter to the _get_interrupt_handler function.
call _get_interrupt_handler call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function. cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
breq _spint0 // If this was not a spurious interrupt (R12 != NULL), jump to the handler. breq _spint\priority // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
call rt_interrupt_enter call rt_interrupt_enter
icall r12 icall r12
call rt_interrupt_leave call rt_interrupt_leave
@ -205,81 +220,37 @@ _int0:
lda.w r12, rt_interrupt_nest /* Is nested interrupt? */ lda.w r12, rt_interrupt_nest /* Is nested interrupt? */
ld.w r11, r12[0] ld.w r11, r12[0]
cp.w r11, 0 cp.w r11, 0
brne _spint0 brne _spint\priority
lda.w r12, rt_thread_switch_interrupt_flag /* Is thread switch required? */ lda.w r12, rt_thread_switch_interrupt_flag /* Is thread switch required? */
ld.w r11, r12[0] ld.w r11, r12[0]
cp.w r11, 1 cp.w r11, 1
breq rt_hw_context_switch_interrupt_do breq rt_hw_context_switch_interrupt_do
_spint0: _spint\priority:
csrf AVR32_SR_GM_OFFSET /* Enable global interrupt */ csrf AVR32_SR_GM_OFFSET /* Enable global interrupt */
rete // If this was a spurious interrupt (R12 == NULL), return from event handler. #if __AVR32_UC__
/*
* If this was not a spurious interrupt (R12 != NULL), jump to the
_int1: * handler.
mov r12, 1 // Pass the int_level parameter to the _get_interrupt_handler function. */
call _get_interrupt_handler /* movne pc, r12 */
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function. #elif __AVR32_AP__
breq _spint1 // If this was not a spurious interrupt (R12 != NULL), jump to the handler. // If this was a spurious interrupt (R12 == NULL), branch.
call rt_interrupt_enter breq spint\priority
icall r12 /*
call rt_interrupt_leave * Push the pointer to the interrupt handler onto the system stack since
ssrf AVR32_SR_GM_OFFSET /* Disable global interrupt */ * no register may be altered.
lda.w r12, rt_interrupt_nest /* Is nested interrupt? */ */
ld.w r11, r12[0] st.w --sp, r12
cp.w r11, 0 popm r8-r12, lr, pc // Restore registers and jump to the handler.
brne _spint1 spint\priority:
lda.w r12, rt_thread_switch_interrupt_flag /* Is thread switch required? */ popm r8-r12, lr
ld.w r11, r12[0] #endif
cp.w r11, 1 /*
breq rt_hw_context_switch_interrupt_do * If this was a spurious interrupt (R12 == NULL), return from event
_spint1: * handler.
csrf AVR32_SR_GM_OFFSET /* Enable global interrupt */ */
rete // If this was a spurious interrupt (R12 == NULL), return from event handler. rete
.endr
_int2:
mov r12, 2 // Pass the int_level parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
breq _spint2 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
call rt_interrupt_enter
icall r12
call rt_interrupt_leave
ssrf AVR32_SR_GM_OFFSET /* Disable global interrupt */
lda.w r12, rt_interrupt_nest /* Is nested interrupt? */
ld.w r11, r12[0]
cp.w r11, 0
brne _spint2
lda.w r12, rt_thread_switch_interrupt_flag /* Is thread switch required? */
ld.w r11, r12[0]
cp.w r11, 1
breq rt_hw_context_switch_interrupt_do
_spint2:
csrf AVR32_SR_GM_OFFSET /* Enable global interrupt */
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
_int3:
mov r12, 3 // Pass the int_level parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
breq _spint3 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
call rt_interrupt_enter
icall r12
call rt_interrupt_leave
ssrf AVR32_SR_GM_OFFSET /* Disable global interrupt */
lda.w r12, rt_interrupt_nest /* Is nested interrupt? */
ld.w r11, r12[0]
cp.w r11, 0
brne _spint3
lda.w r12, rt_thread_switch_interrupt_flag /* Is thread switch required? */
ld.w r11, r12[0]
cp.w r11, 1
breq rt_hw_context_switch_interrupt_do
_spint3:
csrf AVR32_SR_GM_OFFSET /* Enable global interrupt */
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
rt_hw_context_switch_interrupt_do: rt_hw_context_switch_interrupt_do:
mov r11, 0 mov r11, 0
@ -294,22 +265,20 @@ rt_hw_context_switch_interrupt_do:
ldm sp++, r0-r7 /* Pop R0-R7 (new thread) */ ldm sp++, r0-r7 /* Pop R0-R7 (new thread) */
rete /* RETE pops R8-R12, LR, PC, SR automatically */ rete /* RETE pops R8-R12, LR, PC, SR automatically */
// Constant data area. // Constant data area.
.balign 4 .balign 4
// Values to store in the interrupt priority registers for the various interrupt priority levels. // Values to store in the interrupt priority registers for the various interrupt priority levels.
// The interrupt priority registers contain the interrupt priority level and // The interrupt priority registers contain the interrupt priority level and
// the EVBA-relative interrupt vector offset. // the EVBA-relative interrupt vector offset.
.global ipr_val .global ipr_val
.type ipr_val, @object .type ipr_val, @object
ipr_val: ipr_val:
.word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\ .word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\
(AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\ (AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\
(AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\ (AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\
(AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba) (AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba)
//! \endverbatim //! \endverbatim
//! @} //! @}