From ad309699d637c72f7956c117fec6eeb7d9e56c01 Mon Sep 17 00:00:00 2001 From: songw4232 <101108769+songw4232@users.noreply.github.com> Date: Fri, 14 Apr 2023 14:07:05 +0800 Subject: [PATCH] =?UTF-8?q?[add]=E6=B7=BB=E5=8A=A0bsp/stm32/stm32u575-st-n?= =?UTF-8?q?ucleo=E5=A4=96=E8=AE=BE=20(#7237)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * [add]添加bsp/stm32/stm32u575-st-nucleo外设 * [fix]修改源码格式使之符合RT-Thread代码规范 * [fix]修改相关报错问题 * [fix]修改README.md * [fix]删除无效代码及添加相关注释 --- .../HAL_Drivers/config/u5/adc_config.h | 6 +- bsp/stm32/libraries/HAL_Drivers/drv_adc.c | 5 + bsp/stm32/libraries/HAL_Drivers/drv_spi.c | 6 +- bsp/stm32/libraries/STM32U5xx_HAL/SConscript | 2 +- bsp/stm32/stm32u575-st-nucleo/.config | 42 +- .../applications/SConscript | 7 +- .../applications/arduino_main.cpp | 24 + .../applications/arduino_pinout/README.md | 51 + .../applications/arduino_pinout/SConscript | 9 + .../arduino_pinout/pins_arduino.c | 46 + .../arduino_pinout/pins_arduino.h | 46 + .../stm32u575-st-nucleo/applications/main.c | 2 +- .../board/CubeMX_Config/.mxproject | 22 +- .../board/CubeMX_Config/CubeMX_Config.ioc | 164 ++- .../board/CubeMX_Config/Inc/main.h | 6 +- .../CubeMX_Config/Inc/stm32u5xx_hal_conf.h | 4 +- .../board/CubeMX_Config/Inc/stm32u5xx_it.h | 2 +- .../board/CubeMX_Config/Src/main.c | 793 ++++++++++++ .../CubeMX_Config/Src/stm32u5xx_hal_msp.c | 342 ++++- .../board/CubeMX_Config/Src/stm32u5xx_it.c | 2 +- .../CubeMX_Config/Src/system_stm32u5xx.c | 362 ++++++ bsp/stm32/stm32u575-st-nucleo/board/Kconfig | 165 +++ .../stm32u575-st-nucleo/board/SConscript | 6 + bsp/stm32/stm32u575-st-nucleo/board/board.c | 2 +- bsp/stm32/stm32u575-st-nucleo/board/board.h | 2 +- .../stm32u575-st-nucleo/board/ports/drv_key.c | 276 ++++ .../board/ports/drv_spi_flash.c | 70 + bsp/stm32/stm32u575-st-nucleo/project.uvoptx | 1126 ++++++++++++++++- bsp/stm32/stm32u575-st-nucleo/project.uvprojx | 342 +++-- bsp/stm32/stm32u575-st-nucleo/rtconfig.h | 13 +- 30 files changed, 3660 insertions(+), 285 deletions(-) create mode 100644 bsp/stm32/stm32u575-st-nucleo/applications/arduino_main.cpp create mode 100644 bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/README.md create mode 100644 bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/SConscript create mode 100644 bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/pins_arduino.c create mode 100644 bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/pins_arduino.h create mode 100644 bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/main.c create mode 100644 bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/system_stm32u5xx.c create mode 100644 bsp/stm32/stm32u575-st-nucleo/board/ports/drv_key.c create mode 100644 bsp/stm32/stm32u575-st-nucleo/board/ports/drv_spi_flash.c diff --git a/bsp/stm32/libraries/HAL_Drivers/config/u5/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/u5/adc_config.h index 67d520aac2..73367b31ea 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/u5/adc_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/u5/adc_config.h @@ -22,7 +22,7 @@ extern "C" { #define ADC1_CONFIG \ { \ .Instance = ADC1, \ - .Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4, \ + .Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4, \ .Init.Resolution = ADC_RESOLUTION_12B, \ .Init.DataAlign = ADC_DATAALIGN_RIGHT, \ .Init.ScanConvMode = ADC_SCAN_DISABLE, \ @@ -44,7 +44,7 @@ extern "C" { #define ADC2_CONFIG \ { \ .Instance = ADC2, \ - .Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4, \ + .Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4, \ .Init.Resolution = ADC_RESOLUTION_12B, \ .Init.DataAlign = ADC_DATAALIGN_RIGHT, \ .Init.ScanConvMode = ADC_SCAN_DISABLE, \ @@ -66,7 +66,7 @@ extern "C" { #define ADC3_CONFIG \ { \ .Instance = ADC3, \ - .Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4, \ + .Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4, \ .Init.Resolution = ADC_RESOLUTION_12B, \ .Init.DataAlign = ADC_DATAALIGN_RIGHT, \ .Init.ScanConvMode = ADC_SCAN_DISABLE, \ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_adc.c b/bsp/stm32/libraries/HAL_Drivers/drv_adc.c index 68e8ded940..36d6a4433b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_adc.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_adc.c @@ -271,7 +271,12 @@ static rt_int16_t stm32_adc_get_vref (struct rt_adc_device *device) ret = rt_adc_disable(device, RT_ADC_INTERN_CH_VREF); if (ret != RT_EOK) return (rt_int16_t)ret; +#ifdef SOC_SERIES_STM32U5 + vref_mv = __LL_ADC_CALC_VREFANALOG_VOLTAGE(stm32_adc_handler->Instance, vref_value, stm32_adc_handler->Init.Resolution); +#else vref_mv = __LL_ADC_CALC_VREFANALOG_VOLTAGE(vref_value, stm32_adc_handler->Init.Resolution); +#endif + #else vref_mv = 3300; #endif /* __LL_ADC_CALC_VREFANALOG_VOLTAGE */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c index 088a21198a..593c2f6022 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c @@ -140,7 +140,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur spi_handle->Init.NSS = SPI_NSS_SOFT; - uint32_t SPI_CLOCK; + static uint32_t SPI_CLOCK; /* Some series may only have APBPERIPH_BASE, but don't have HAL_RCC_GetPCLK2Freq */ #if defined(APBPERIPH_BASE) @@ -482,6 +482,7 @@ static int rt_hw_spi_bus_init(void) #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7) spi_bus_obj[i].dma.handle_rx.Init.Request = spi_config[i].dma_rx->request; #endif +#ifndef SOC_SERIES_STM32U5 spi_bus_obj[i].dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; spi_bus_obj[i].dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE; spi_bus_obj[i].dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE; @@ -489,6 +490,7 @@ static int rt_hw_spi_bus_init(void) spi_bus_obj[i].dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; spi_bus_obj[i].dma.handle_rx.Init.Mode = DMA_NORMAL; spi_bus_obj[i].dma.handle_rx.Init.Priority = DMA_PRIORITY_HIGH; +#endif #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) spi_bus_obj[i].dma.handle_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; spi_bus_obj[i].dma.handle_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; @@ -524,6 +526,7 @@ static int rt_hw_spi_bus_init(void) #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7) spi_bus_obj[i].dma.handle_tx.Init.Request = spi_config[i].dma_tx->request; #endif +#ifndef SOC_SERIES_STM32U5 spi_bus_obj[i].dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; spi_bus_obj[i].dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE; spi_bus_obj[i].dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE; @@ -531,6 +534,7 @@ static int rt_hw_spi_bus_init(void) spi_bus_obj[i].dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; spi_bus_obj[i].dma.handle_tx.Init.Mode = DMA_NORMAL; spi_bus_obj[i].dma.handle_tx.Init.Priority = DMA_PRIORITY_LOW; +#endif #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) spi_bus_obj[i].dma.handle_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; spi_bus_obj[i].dma.handle_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; diff --git a/bsp/stm32/libraries/STM32U5xx_HAL/SConscript b/bsp/stm32/libraries/STM32U5xx_HAL/SConscript index f7b282d8fe..1376bc2003 100644 --- a/bsp/stm32/libraries/STM32U5xx_HAL/SConscript +++ b/bsp/stm32/libraries/STM32U5xx_HAL/SConscript @@ -40,7 +40,7 @@ if GetDepend(['RT_USING_I2C']): if GetDepend(['RT_USING_SPI']): src += ['STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_spi.c'] src += ['STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_spi_ex.c'] - src += ['STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_qspi.c'] + src += ['STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_ospi.c'] if GetDepend(['RT_USING_USB']): src += ['STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_hcd.c'] diff --git a/bsp/stm32/stm32u575-st-nucleo/.config b/bsp/stm32/stm32u575-st-nucleo/.config index 3a65bec6b1..ffcd1e31f8 100644 --- a/bsp/stm32/stm32u575-st-nucleo/.config +++ b/bsp/stm32/stm32u575-st-nucleo/.config @@ -22,7 +22,9 @@ CONFIG_RT_HOOK_USING_FUNC_PTR=y CONFIG_RT_USING_IDLE_HOOK=y CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 -# CONFIG_RT_USING_TIMER_SOFT is not set +CONFIG_RT_USING_TIMER_SOFT=y +CONFIG_RT_TIMER_THREAD_PRIO=4 +CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 # # kservice optimization @@ -81,7 +83,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x50000 +CONFIG_RT_VER_NUM=0x50001 # CONFIG_RT_USING_STDC_ATOMIC is not set # CONFIG_RT_USING_CACHE is not set CONFIG_RT_USING_HW_ATOMIC=y @@ -115,6 +117,10 @@ CONFIG_FINSH_USING_DESCRIPTION=y # CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set # CONFIG_FINSH_USING_AUTH is not set CONFIG_FINSH_ARG_MAX=10 + +# +# DFS: device virtual file system +# # CONFIG_RT_USING_DFS is not set # CONFIG_RT_USING_FAL is not set @@ -123,7 +129,9 @@ CONFIG_FINSH_ARG_MAX=10 # CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_UNAMED_PIPE_NUMBER=64 -# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SYSTEM_WORKQUEUE=y +CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 +CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 CONFIG_RT_USING_SERIAL=y CONFIG_RT_USING_SERIAL_V1=y # CONFIG_RT_USING_SERIAL_V2 is not set @@ -132,22 +140,31 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_CPUTIME is not set -# CONFIG_RT_USING_I2C is not set +CONFIG_RT_USING_I2C=y +# CONFIG_RT_I2C_DEBUG is not set +CONFIG_RT_USING_I2C_BITOPS=y +# CONFIG_RT_I2C_BITOPS_DEBUG is not set # CONFIG_RT_USING_PHY is not set CONFIG_RT_USING_PIN=y -# CONFIG_RT_USING_ADC is not set +CONFIG_RT_USING_ADC=y # CONFIG_RT_USING_DAC is not set # CONFIG_RT_USING_NULL is not set # CONFIG_RT_USING_ZERO is not set # CONFIG_RT_USING_RANDOM is not set -# CONFIG_RT_USING_PWM is not set +CONFIG_RT_USING_PWM=y # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_PM is not set # CONFIG_RT_USING_FDT is not set # CONFIG_RT_USING_RTC is not set # CONFIG_RT_USING_SDIO is not set -# CONFIG_RT_USING_SPI is not set +CONFIG_RT_USING_SPI=y +# CONFIG_RT_USING_SPI_BITOPS is not set +# CONFIG_RT_USING_QSPI is not set +# CONFIG_RT_USING_SPI_MSD is not set +# CONFIG_RT_USING_SFUD is not set +# CONFIG_RT_USING_ENC28J60 is not set +# CONFIG_RT_USING_SPI_WIFI is not set # CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_AUDIO is not set # CONFIG_RT_USING_SENSOR is not set @@ -603,7 +620,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_LKDGUI is not set # CONFIG_PKG_USING_NRF5X_SDK is not set # CONFIG_PKG_USING_NRFX is not set -# CONFIG_PKG_USING_WM_LIBRARIES is not set # # Kendryte SDK @@ -977,6 +993,10 @@ CONFIG_SOC_STM32U575ZI=y # # Onboard Peripheral Drivers # +# CONFIG_BSP_USING_ARDUINO is not set +# CONFIG_BSP_USING_KEY is not set +# CONFIG_BSP_USING_MPU6XXX is not set +# CONFIG_BSP_USING_SPI_FLASH is not set # # On-chip Peripheral Drivers @@ -984,6 +1004,12 @@ CONFIG_SOC_STM32U575ZI=y CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART1=y +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_LPUART1 is not set +# CONFIG_BSP_USING_ADC is not set +# CONFIG_BSP_USING_PWM is not set +# CONFIG_BSP_USING_SPI is not set +# CONFIG_BSP_USING_I2C is not set # CONFIG_BSP_USING_UDID is not set # diff --git a/bsp/stm32/stm32u575-st-nucleo/applications/SConscript b/bsp/stm32/stm32u575-st-nucleo/applications/SConscript index 9bb9abae89..e1c7fa5996 100644 --- a/bsp/stm32/stm32u575-st-nucleo/applications/SConscript +++ b/bsp/stm32/stm32u575-st-nucleo/applications/SConscript @@ -1,9 +1,12 @@ from building import * import os -cwd = GetCurrentDir() -src = Glob('*.c') +cwd = GetCurrentDir() CPPPATH = [cwd] +src = Glob('*.c') + +if GetDepend(['PKG_USING_RTDUINO']) and not GetDepend(['RTDUINO_NO_SETUP_LOOP']): + src += ['arduino_main.cpp'] group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) diff --git a/bsp/stm32/stm32u575-st-nucleo/applications/arduino_main.cpp b/bsp/stm32/stm32u575-st-nucleo/applications/arduino_main.cpp new file mode 100644 index 0000000000..5b49a16169 --- /dev/null +++ b/bsp/stm32/stm32u575-st-nucleo/applications/arduino_main.cpp @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2023-04-13 songw4232 first version + */ + +#include + +void setup(void) +{ + /* put your setup code here, to run once: */ + Serial.begin(); +} + +void loop(void) +{ + /* put your main code here, to run repeatedly: */ + Serial.println("Hello Arduino!"); + delay(800); +} diff --git a/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/README.md b/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/README.md new file mode 100644 index 0000000000..d9ce48cf0c --- /dev/null +++ b/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/README.md @@ -0,0 +1,51 @@ +# STM32U575-NUCLEO开发板的Arduino生态兼容说明 + +## 1 RTduino - RT-Thread的Arduino生态兼容层 + +STM32U575-NUCLEO开发板已经完整适配了[RTduino软件包](https://github.com/RTduino/RTduino),即RT-Thread的Arduino生态兼容层。用户可以按照Arduino的编程习惯来操作该BSP,并且可以使用大量Arduino社区丰富的库,是对RT-Thread生态的极大增强。更多信息,请参见[RTduino软件包说明文档](https://github.com/RTduino/RTduino)。 + +### 1.1 如何开启针对本BSP的Arduino生态兼容层 + +Env 工具下敲入 menuconfig 命令,或者 RT-Thread Studio IDE 下选择 RT-Thread Settings: + +```Kconfig +Hardware Drivers Config ---> + Onboard Peripheral Drivers ---> + [*] Compatible with Arduino Ecosystem (RTduino) +``` + +## 2 Arduino引脚排布 + +该BSP遵照Arduino UNO板的引脚排列方式,并扩展增加了STM32U575-NUCLEO自身的板载资源功能引脚。详见 `pins_arduino.c` + +更多引脚布局相关信息参见 [pins_arduino.c](pins_arduino.c) 和 [pins_arduino.h](pins_arduino.h)。 + +| Arduino引脚编号 | STM32引脚编号 | 5V容忍 | 备注 | +| --------------------- | --------- | ------- | -------------------------------------------- | +| 0 (D0) | PG8 | 是 | Serial-Rx,被RT-Thread的UART设备框架uart1接管 | +| 1 (D1) | PG7 | 是 | Serial-Tx,被RT-Thread的UART设备框架uart1接管 | +| 2 (D2) | PF15 | 是 | 普通IO | +| 3 (D3) | PE13 | 是 | PWM1-CH2,默认被RT-Thread的PWM设备框架pwm1接管 | +| 4 (D4) | PF14 | 是 | 普通IO | +| 5 (D5) | PE11 | 是 | PWM1-CH3,默认被RT-Thread的PWM设备框架pwm1接管 | +| 6 (D6) | PE9 | 是 | PWM1-CH1,默认被RT-Thread的PWM设备框架pwm1接管 | +| 7 (D7) | PF13 | 是 | 普通IO | +| 8 (D8) | PF12 | 是 | 普通IO | +| 9 (D9) | PD15 | 是 | PWM4-CH4,默认被RT-Thread的PWM设备框架pwm4接管 | +| 10 (D10) | PD14 | 是 | SPI1 片选 CS | +| 11 (D11) | PA7 | 是 | SPI1-MOSI,默认被RT-Thread的SPI设备框架spi1总线接管 | +| 12 (D12) | PA6 | 是 | SPI1-MISO,默认被RT-Thread的SPI设备框架spi1总线接管 | +| 13 (D13) | PA5 | 是 | SPI1-SCK,默认被RT-Thread的SPI设备框架spi1总线接管 | +| 14 (D14) | PB9 | 是 | I2C1-SDA,默认被RT-Thread的I2C设备框架i2c1总线接管 | +| 15 (D15) | PB8 | 是 | I2C1-SCL,默认被RT-Thread的I2C设备框架i2c1总线接管 | +| A0 | PA3 | 是(但不建议) | ADC1-CH8,默认被RT-Thread的ADC设备框架adc1接管 | +| A1 | PA2 | 是(但不建议) | ADC1-CH7,默认被RT-Thread的ADC设备框架adc1接管 | +| A2 | PC3 | 是(但不建议) | ADC1-CH4,默认被RT-Thread的ADC设备框架adc1接管 | +| A3 | PB0 | 是(但不建议) | ADC1-CH15,默认被RT-Thread的ADC设备框架adc1接管| +| A4 | PC1 | 是(但不建议) | ADC1-CH2,默认被RT-Thread的ADC设备框架adc1接管 | +| A5 | PC0 | 是(但不建议) | ADC1-CH1,默认被RT-Thread的ADC设备框架adc1接管 | + + +> 注意: +> +> 1. 暂无 diff --git a/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/SConscript b/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/SConscript new file mode 100644 index 0000000000..2539929027 --- /dev/null +++ b/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/SConscript @@ -0,0 +1,9 @@ +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +inc = [cwd] + +group = DefineGroup('RTduino', src, depend = ['PKG_USING_RTDUINO'], CPPPATH = inc) + +Return('group') diff --git a/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/pins_arduino.c b/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/pins_arduino.c new file mode 100644 index 0000000000..cdb3cc9abb --- /dev/null +++ b/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/pins_arduino.c @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2023-04-13 songw4232 first version + */ + +#include +#include +#include "pins_arduino.h" + +/* + * {Arduino Pin, RT-Thread Pin [, Device Name, Channel]} + * [] means optional + * Digital pins must NOT give the device name and channel. + * Analog pins MUST give the device name and channel(ADC, PWM or DAC). + * Arduino Pin must keep in sequence. + */ +const pin_map_t pin_map_table[]= +{ + {D0, GET_PIN(G,8), "uart1"}, /* Serial-RX */ + {D1, GET_PIN(G,7), "uart1"}, /* Serial-TX */ + {D2, GET_PIN(F,15)}, + {D3, GET_PIN(E,13), "pwm1", 3}, /* PWM */ + {D4, GET_PIN(F,14)}, + {D5, GET_PIN(E,11), "pwm1", 2}, /* PWM */ + {D6, GET_PIN(E,9), "pwm1", 1}, /* PWM */ + {D7, GET_PIN(F,13)}, + {D8, GET_PIN(F,12)}, + {D9, GET_PIN(D,15), "pwm4", 4}, /* PWM */ + {D10, GET_PIN(D,14)}, + {D11, GET_PIN(A,7), "spi1"}, /* SPI-MOSI */ + {D12, GET_PIN(A,6), "spi1"}, /* SPI-MISO */ + {D13, GET_PIN(A,5), "spi1"}, /* SPI-SCK */ + {D14, GET_PIN(B,9), "i2c1"}, /* I2C-SDA (Wire) */ + {D15, GET_PIN(B,8), "i2c1"}, /* I2C-SCL (Wire) */ + {A0, GET_PIN(A,3), "adc1", 8}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */ + {A1, GET_PIN(A,2), "adc1", 7}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */ + {A2, GET_PIN(C,3), "adc1", 4}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */ + {A3, GET_PIN(B,0), "adc1", 15}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */ + {A4, GET_PIN(C,1), "adc1", 2}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */ + {A5, GET_PIN(C,0), "adc1", 1}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */ +}; diff --git a/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/pins_arduino.h b/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/pins_arduino.h new file mode 100644 index 0000000000..3b91474eb8 --- /dev/null +++ b/bsp/stm32/stm32u575-st-nucleo/applications/arduino_pinout/pins_arduino.h @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2023-04-13 songw4232 first version + */ + +#ifndef Pins_Arduino_h +#define Pins_Arduino_h + +/* pins alias. Must keep in sequence */ +#define D0 (0) +#define D1 (1) +#define D2 (2) +#define D3 (3) +#define D4 (4) +#define D5 (5) +#define D6 (6) +#define D7 (7) +#define D8 (8) +#define D9 (9) +#define D10 (10) +#define D11 (11) +#define D12 (12) +#define D13 (13) +#define D14 (14) +#define D15 (15) +#define A0 (16) +#define A1 (17) +#define A2 (18) +#define A3 (19) +#define A4 (20) +#define A5 (21) + +#define F_CPU 160000000L /* CPU:160MHz */ + +/* i2c1 : PB9-SDA PB8-SCL */ +#define RTDUINO_DEFAULT_IIC_BUS_NAME "i2c1" + +/* spi1 : PA5-SCK PA6-MISO PA7-MOSI */ +#define RTDUINO_DEFAULT_SPI_BUS_NAME "spi1" + +#endif /* Pins_Arduino_h */ diff --git a/bsp/stm32/stm32u575-st-nucleo/applications/main.c b/bsp/stm32/stm32u575-st-nucleo/applications/main.c index 54a2644064..01a7146bfe 100644 --- a/bsp/stm32/stm32u575-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32u575-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2021, RT-Thread Development Team + * Copyright (c) 2006-2023, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/.mxproject index 7d0b436a61..2240c32d2e 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/.mxproject +++ b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/.mxproject @@ -1,26 +1,26 @@ [PreviousLibFiles] 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[PreviousUsedKeilFiles] -SourceFiles=..\Core\Src\main.c;..\Core\Src\stm32u5xx_it.c;..\Core\Src\stm32u5xx_hal_msp.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_utils.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_exti.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_adc.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_adc_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_dma.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_dma_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_i2c.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_i2c_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_rcc.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_rcc_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_cortex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_flash.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_flash_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_gpio.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_exti.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_pwr.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_pwr_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_gtzc.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_icache.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_tim.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_tim_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_ucpd.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_gpio.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_lpgpio.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_dma.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_uart.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_uart_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_pcd.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_pcd_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_usb.c;..\Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/system_stm32u5xx.c;..\Core\Src/system_stm32u5xx.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_utils.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_exti.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_adc.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_adc_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_dma.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_dma_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_i2c.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_i2c_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_rcc.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_rcc_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_cortex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_flash.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_flash_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_gpio.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_exti.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_pwr.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_pwr_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_gtzc.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_icache.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_tim.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_tim_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_ucpd.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_gpio.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_lpgpio.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_dma.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_uart.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_uart_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_pcd.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_pcd_ex.c;..\Drivers/STM32U5xx_HAL_Driver/Src/stm32u5xx_ll_usb.c;..\Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/system_stm32u5xx.c;..\Core\Src/system_stm32u5xx.c;;; +SourceFiles=..\Core\Src\main.c;..\Core\Src\stm32u5xx_it.c;..\Core\Src\stm32u5xx_hal_msp.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_utils.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_exti.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_adc.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_adc_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_dma.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_dma_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_i2c.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_i2c_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_rcc.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_rcc_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_cortex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_flash.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_flash_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_gpio.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_exti.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pwr.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pwr_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_gtzc.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_icache.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_uart.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_uart_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_spi.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_spi_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_tim.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_tim_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_ucpd.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_gpio.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_lpgpio.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_dma.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pcd.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pcd_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_usb.c;..\Drivers\CMSIS\Device\ST\STM32U5xx\Source\Templates\system_stm32u5xx.c;..\Core\Src\system_stm32u5xx.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_utils.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_exti.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_adc.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_adc_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_dma.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_dma_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_i2c.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_i2c_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_rcc.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_rcc_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_cortex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_flash.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_flash_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_gpio.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_exti.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pwr.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pwr_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_gtzc.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_icache.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_uart.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_uart_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_spi.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_spi_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_tim.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_tim_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_ucpd.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_gpio.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_lpgpio.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_dma.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pcd.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pcd_ex.c;..\Drivers\STM32U5xx_HAL_Driver\Src\stm32u5xx_ll_usb.c;..\Drivers\CMSIS\Device\ST\STM32U5xx\Source\Templates\system_stm32u5xx.c;..\Core\Src\system_stm32u5xx.c;;; HeaderPath=..\Drivers\STM32U5xx_HAL_Driver\Inc;..\Drivers\STM32U5xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32U5xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc; CDefines=USE_FULL_LL_DRIVER;USE_HAL_DRIVER;STM32U575xx;USE_FULL_LL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER; [PreviousGenFiles] AdvancedFolderStructure=true HeaderFileListSize=4 -HeaderFiles#0=D:/repo/github/rt-thread/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Core/Inc/stm32u5xx_it.h -HeaderFiles#1=D:/repo/github/rt-thread/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Core/Inc/stm32_assert.h -HeaderFiles#2=D:/repo/github/rt-thread/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Core/Inc/stm32u5xx_hal_conf.h -HeaderFiles#3=D:/repo/github/rt-thread/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Core/Inc/main.h +HeaderFiles#0=..\Core\Inc\stm32u5xx_it.h +HeaderFiles#1=..\Core\Inc\stm32_assert.h +HeaderFiles#2=..\Core\Inc\stm32u5xx_hal_conf.h +HeaderFiles#3=..\Core\Inc\main.h HeaderFolderListSize=1 -HeaderPath#0=D:/repo/github/rt-thread/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Core/Inc +HeaderPath#0=..\Core\Inc HeaderFiles=; SourceFileListSize=3 -SourceFiles#0=D:/repo/github/rt-thread/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Core/Src/stm32u5xx_it.c -SourceFiles#1=D:/repo/github/rt-thread/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Core/Src/stm32u5xx_hal_msp.c -SourceFiles#2=D:/repo/github/rt-thread/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Core/Src/main.c +SourceFiles#0=..\Core\Src\stm32u5xx_it.c +SourceFiles#1=..\Core\Src\stm32u5xx_hal_msp.c +SourceFiles#2=..\Core\Src\main.c SourceFolderListSize=1 -SourcePath#0=D:/repo/github/rt-thread/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Core/Src +SourcePath#0=..\Core\Src SourceFiles=; diff --git a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc index a6d14258e5..0d7e8d24fa 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc +++ b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc @@ -1,69 +1,95 @@ #MicroXplorer Configuration settings - do not modify ADC1.CommonPathInternal=null|null|null|null -ADC1.IPParameters=master,NbrOfConversion,Resolution,CommonPathInternal +ADC1.IPParameters=NbrOfConversion,Resolution,master,CommonPathInternal ADC1.NbrOfConversion=1 ADC1.Resolution=ADC_RESOLUTION_14B ADC1.master=1 +CAD.formats= +CAD.pinconfig= +CAD.provider= CORTEX_M33_NS.userName=CORTEX_M33 File.Version=6 GPIO.groupedBy=Group By Peripherals KeepUserPlacement=false +Mcu.CPN=STM32U575ZIT6Q Mcu.ContextProject=TrustZoneDisabled Mcu.Family=STM32U5 Mcu.IP0=ADC1 Mcu.IP1=CORTEX_M33_NS -Mcu.IP10=USB_OTG_FS +Mcu.IP10=TIM1 +Mcu.IP11=TIM4 +Mcu.IP12=UCPD1 +Mcu.IP13=USART1 +Mcu.IP14=USART2 +Mcu.IP15=USB_OTG_FS Mcu.IP2=DEBUG Mcu.IP3=ICACHE -Mcu.IP4=NVIC -Mcu.IP5=PWR -Mcu.IP6=RCC -Mcu.IP7=SYS -Mcu.IP8=UCPD1 -Mcu.IP9=USART1 -Mcu.IPNb=11 +Mcu.IP4=LPUART1 +Mcu.IP5=NVIC +Mcu.IP6=PWR +Mcu.IP7=RCC +Mcu.IP8=SPI1 +Mcu.IP9=SYS +Mcu.IPNb=16 Mcu.Name=STM32U575ZITxQ Mcu.Package=LQFP144 Mcu.Pin0=PC13 Mcu.Pin1=PC14-OSC32_IN (PC14) -Mcu.Pin10=PA11 -Mcu.Pin11=PA12 -Mcu.Pin12=PA13 (JTMS/SWDIO) -Mcu.Pin13=PA14 (JTCK/SWCLK) -Mcu.Pin14=PA15 (JTDI) -Mcu.Pin15=PB3 (JTDO/TRACESWO) -Mcu.Pin16=PB5 -Mcu.Pin17=PB7 -Mcu.Pin18=VP_ICACHE_VS_ICACHE -Mcu.Pin19=VP_PWR_VS_DBSignals +Mcu.Pin10=PA6 +Mcu.Pin11=PA7 +Mcu.Pin12=PB0 +Mcu.Pin13=PE9 +Mcu.Pin14=PE11 +Mcu.Pin15=PE13 +Mcu.Pin16=PB14 +Mcu.Pin17=PB15 +Mcu.Pin18=PD15 +Mcu.Pin19=PG2 Mcu.Pin2=PC15-OSC32_OUT (PC15) -Mcu.Pin20=VP_PWR_VS_SECSignals -Mcu.Pin21=VP_SYS_VS_Systick -Mcu.Pin3=PC2 -Mcu.Pin4=PB14 -Mcu.Pin5=PB15 -Mcu.Pin6=PG2 -Mcu.Pin7=PC7 -Mcu.Pin8=PA9 -Mcu.Pin9=PA10 -Mcu.PinsNb=22 +Mcu.Pin20=PG7 +Mcu.Pin21=PG8 +Mcu.Pin22=PC7 +Mcu.Pin23=PA9 +Mcu.Pin24=PA10 +Mcu.Pin25=PA11 +Mcu.Pin26=PA12 +Mcu.Pin27=PA13 (JTMS/SWDIO) +Mcu.Pin28=PA14 (JTCK/SWCLK) +Mcu.Pin29=PA15 (JTDI) +Mcu.Pin3=PC0 +Mcu.Pin30=PB3 (JTDO/TRACESWO) +Mcu.Pin31=PB5 +Mcu.Pin32=PB7 +Mcu.Pin33=VP_ICACHE_VS_ICACHE +Mcu.Pin34=VP_PWR_VS_DBSignals +Mcu.Pin35=VP_PWR_VS_SECSignals +Mcu.Pin36=VP_SYS_VS_Systick +Mcu.Pin37=VP_TIM1_VS_ClockSourceINT +Mcu.Pin38=VP_TIM4_VS_ClockSourceINT +Mcu.Pin4=PC1 +Mcu.Pin5=PC2 +Mcu.Pin6=PC3 +Mcu.Pin7=PA2 +Mcu.Pin8=PA3 +Mcu.Pin9=PA5 +Mcu.PinsNb=39 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32U575ZITxQ MxCube.Version=6.3.0 MxDb.Version=DB.6.0.30 -NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.ForceEnableDMAVector=true -NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true -NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.PriorityGroup=NVIC_PRIORITYGROUP_3 -NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true -NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false PA10.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label PA10.GPIO_Label=USART1_RX PA10.GPIO_PuPd=GPIO_PULLDOWN @@ -94,6 +120,17 @@ PA15\ (JTDI).GPIO_Label=UCPD1_CC1 PA15\ (JTDI).Locked=true PA15\ (JTDI).Mode=Sink_AllSignals PA15\ (JTDI).Signal=UCPD1_CC1 +PA2.Mode=Asynchronous +PA2.Signal=USART2_TX +PA3.Mode=Asynchronous +PA3.Signal=USART2_RX +PA5.Locked=true +PA5.Mode=Full_Duplex_Master +PA5.Signal=SPI1_SCK +PA6.Mode=Full_Duplex_Master +PA6.Signal=SPI1_MISO +PA7.Mode=Full_Duplex_Master +PA7.Signal=SPI1_MOSI PA9.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label PA9.GPIO_Label=USART1_TX PA9.GPIO_PuPd=GPIO_PULLDOWN @@ -101,6 +138,8 @@ PA9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH PA9.Locked=true PA9.Mode=Asynchronous PA9.Signal=USART1_TX +PB0.Mode=IN15-Single-Ended +PB0.Signal=ADC1_IN15 PB14.GPIOParameters=GPIO_Label PB14.GPIO_Label=UCPD_FLT PB14.Locked=true @@ -124,6 +163,10 @@ PB7.GPIO_PuPd=GPIO_PULLUP PB7.GPIO_Speed=GPIO_SPEED_FREQ_HIGH PB7.Locked=true PB7.Signal=GPIO_Output +PC0.Mode=IN1-Single-Ended +PC0.Signal=ADC1_IN1 +PC1.Mode=IN2-Single-Ended +PC1.Signal=ADC1_IN2 PC13.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI PC13.GPIO_Label=USER_BUTTON PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING @@ -140,19 +183,26 @@ PC2.GPIO_Label=VBUS_SENSE PC2.Locked=true PC2.Mode=IN3-Single-Ended PC2.Signal=ADC1_IN3 +PC3.Mode=IN4-Single-Ended +PC3.Signal=ADC1_IN4 PC7.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label PC7.GPIO_Label=LED_GREEN PC7.GPIO_PuPd=GPIO_PULLUP PC7.GPIO_Speed=GPIO_SPEED_FREQ_HIGH PC7.Locked=true PC7.Signal=GPIO_Output -PG2.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PG2.GPIO_Label=LED_RED -PG2.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP -PG2.GPIO_PuPd=GPIO_PULLUP -PG2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH +PD15.Signal=S_TIM4_CH4 +PE11.Signal=S_TIM1_CH2 +PE13.Signal=S_TIM1_CH3 +PE9.Signal=S_TIM1_CH1 PG2.Locked=true PG2.Signal=GPIO_Output +PG7.Locked=true +PG7.Mode=Asynchronous +PG7.Signal=LPUART1_TX +PG8.Locked=true +PG8.Mode=Asynchronous +PG8.Signal=LPUART1_RX PinOutPanel.RotationAngle=0 ProjectManager.AskForMigrate=true ProjectManager.BackupPrevious=false @@ -176,6 +226,7 @@ ProjectManager.PreviousToolchain= ProjectManager.ProjectBuild=false ProjectManager.ProjectFileName=CubeMX_Config.ioc ProjectManager.ProjectName=CubeMX_Config +ProjectManager.ProjectStructure= ProjectManager.RegisterCallBack= ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=MDK-ARM V5.32 @@ -256,8 +307,29 @@ RCC.VCOPLL2OutputFreq_Value=6192000000 RCC.VCOPLL3OutputFreq_Value=6192000000 SH.GPXTI13.0=GPIO_EXTI13 SH.GPXTI13.ConfNb=1 +SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1 +SH.S_TIM1_CH1.ConfNb=1 +SH.S_TIM1_CH2.0=TIM1_CH2,PWM Generation2 CH2 +SH.S_TIM1_CH2.ConfNb=1 +SH.S_TIM1_CH3.0=TIM1_CH3,PWM Generation3 CH3 +SH.S_TIM1_CH3.ConfNb=1 +SH.S_TIM4_CH4.0=TIM4_CH4,PWM Generation4 CH4 +SH.S_TIM4_CH4.ConfNb=1 +SPI1.CalculateBaudRate=80.0 MBits/s +SPI1.Direction=SPI_DIRECTION_2LINES +SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate +SPI1.Mode=SPI_MODE_MASTER +SPI1.VirtualType=VM_MASTER +TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 +TIM1.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2 +TIM1.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 +TIM1.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Channel-PWM Generation3 CH3 +TIM4.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 +TIM4.IPParameters=Channel-PWM Generation4 CH4 USART1.IPParameters=VirtualMode-Asynchronous USART1.VirtualMode-Asynchronous=VM_ASYNC +USART2.IPParameters=VirtualMode-Asynchronous +USART2.VirtualMode-Asynchronous=VM_ASYNC USB_OTG_FS.IPParameters=VirtualMode USB_OTG_FS.VirtualMode=Device_Only VP_ICACHE_VS_ICACHE.Mode=DirectMappedCache @@ -268,5 +340,9 @@ VP_PWR_VS_SECSignals.Mode=Security/Privilege VP_PWR_VS_SECSignals.Signal=PWR_VS_SECSignals VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_TIM1_VS_ClockSourceINT.Mode=Internal +VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT +VP_TIM4_VS_ClockSourceINT.Mode=Internal +VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT board=NUCLEO-U575ZI-Q boardIOC=true diff --git a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/main.h b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/main.h index ee47476e5c..90f649667d 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/main.h +++ b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/main.h @@ -7,7 +7,7 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2021 STMicroelectronics. + *

© Copyright (c) 2023 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, @@ -61,6 +61,8 @@ extern "C" { /* USER CODE END EM */ +void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + /* Exported functions prototypes ---------------------------------------------*/ void Error_Handler(void); @@ -77,8 +79,6 @@ void Error_Handler(void); #define UCPD_FLT_GPIO_Port GPIOB #define UCPD1_CC2_Pin GPIO_PIN_15 #define UCPD1_CC2_GPIO_Port GPIOB -#define LED_RED_Pin GPIO_PIN_2 -#define LED_RED_GPIO_Port GPIOG #define LED_GREEN_Pin GPIO_PIN_7 #define LED_GREEN_GPIO_Port GPIOC #define USART1_TX_Pin GPIO_PIN_9 diff --git a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/stm32u5xx_hal_conf.h b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/stm32u5xx_hal_conf.h index b3b7f2c96c..a78955c1ec 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/stm32u5xx_hal_conf.h +++ b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/stm32u5xx_hal_conf.h @@ -68,9 +68,9 @@ /*#define HAL_MMC_MODULE_ENABLED */ /*#define HAL_SMARTCARD_MODULE_ENABLED */ /*#define HAL_SMBUS_MODULE_ENABLED */ -/*#define HAL_SPI_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED /*#define HAL_SRAM_MODULE_ENABLED */ -/*#define HAL_TIM_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED /*#define HAL_TSC_MODULE_ENABLED */ /*#define HAL_RAMCFG_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED diff --git a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/stm32u5xx_it.h b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/stm32u5xx_it.h index 69af26a4a6..9389a38970 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/stm32u5xx_it.h +++ b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Inc/stm32u5xx_it.h @@ -6,7 +6,7 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2021 STMicroelectronics. + *

© Copyright (c) 2023 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, diff --git a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/main.c new file mode 100644 index 0000000000..68bdbcd3d0 --- /dev/null +++ b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/main.c @@ -0,0 +1,793 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2023 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +ADC_HandleTypeDef hadc1; + +UART_HandleTypeDef hlpuart1; +UART_HandleTypeDef huart1; +UART_HandleTypeDef huart2; + +SPI_HandleTypeDef hspi1; + +TIM_HandleTypeDef htim1; +TIM_HandleTypeDef htim4; + +PCD_HandleTypeDef hpcd_USB_OTG_FS; + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_ADC1_Init(void); +static void MX_UCPD1_Init(void); +static void MX_USART1_UART_Init(void); +static void MX_USB_OTG_FS_PCD_Init(void); +static void MX_ICACHE_Init(void); +static void MX_LPUART1_UART_Init(void); +static void MX_USART2_UART_Init(void); +static void MX_SPI1_Init(void); +static void MX_TIM1_Init(void); +static void MX_TIM4_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + HAL_PWREx_EnableVddIO2(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_ADC1_Init(); + MX_UCPD1_Init(); + MX_USART1_UART_Init(); + MX_USB_OTG_FS_PCD_Init(); + MX_ICACHE_Init(); + MX_LPUART1_UART_Init(); + MX_USART2_UART_Init(); + MX_SPI1_Init(); + MX_TIM1_Init(); + MX_TIM4_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 10; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 1; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 + |RCC_CLOCKTYPE_PCLK3; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { + Error_Handler(); + } + __HAL_RCC_PWR_CLK_DISABLE(); +} + +/** + * @brief ADC1 Initialization Function + * @param None + * @retval None + */ +static void MX_ADC1_Init(void) +{ + + /* USER CODE BEGIN ADC1_Init 0 */ + + /* USER CODE END ADC1_Init 0 */ + + /* USER CODE BEGIN ADC1_Init 1 */ + + /* USER CODE END ADC1_Init 1 */ + /** Common config + */ + hadc1.Instance = ADC1; + hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + hadc1.Init.Resolution = ADC_RESOLUTION_14B; + hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + hadc1.Init.LowPowerAutoWait = DISABLE; + hadc1.Init.ContinuousConvMode = DISABLE; + hadc1.Init.NbrOfConversion = 1; + hadc1.Init.DiscontinuousConvMode = DISABLE; + hadc1.Init.DMAContinuousRequests = DISABLE; + hadc1.Init.TriggerFrequencyMode = ADC_TRIGGER_FREQ_HIGH; + hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED; + hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE; + hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR; + hadc1.Init.OversamplingMode = DISABLE; + if (HAL_ADC_Init(&hadc1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ADC1_Init 2 */ + + /* USER CODE END ADC1_Init 2 */ + +} + +/** + * @brief ICACHE Initialization Function + * @param None + * @retval None + */ +static void MX_ICACHE_Init(void) +{ + + /* USER CODE BEGIN ICACHE_Init 0 */ + + /* USER CODE END ICACHE_Init 0 */ + + /* USER CODE BEGIN ICACHE_Init 1 */ + + /* USER CODE END ICACHE_Init 1 */ + /** Enable instruction cache in 1-way (direct mapped cache) + */ + if (HAL_ICACHE_ConfigAssociativityMode(ICACHE_1WAY) != HAL_OK) + { + Error_Handler(); + } + if (HAL_ICACHE_Enable() != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ICACHE_Init 2 */ + + /* USER CODE END ICACHE_Init 2 */ + +} + +/** + * @brief LPUART1 Initialization Function + * @param None + * @retval None + */ +static void MX_LPUART1_UART_Init(void) +{ + + /* USER CODE BEGIN LPUART1_Init 0 */ + + /* USER CODE END LPUART1_Init 0 */ + + /* USER CODE BEGIN LPUART1_Init 1 */ + + /* USER CODE END LPUART1_Init 1 */ + hlpuart1.Instance = LPUART1; + hlpuart1.Init.BaudRate = 209700; + hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; + hlpuart1.Init.StopBits = UART_STOPBITS_1; + hlpuart1.Init.Parity = UART_PARITY_NONE; + hlpuart1.Init.Mode = UART_MODE_TX_RX; + hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + hlpuart1.FifoMode = UART_FIFOMODE_DISABLE; + if (HAL_UART_Init(&hlpuart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&hlpuart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&hlpuart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN LPUART1_Init 2 */ + + /* USER CODE END LPUART1_Init 2 */ + +} + +/** + * @brief USART1 Initialization Function + * @param None + * @retval None + */ +static void MX_USART1_UART_Init(void) +{ + + /* USER CODE BEGIN USART1_Init 0 */ + + /* USER CODE END USART1_Init 0 */ + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; + huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ + +} + +/** + * @brief USART2 Initialization Function + * @param None + * @retval None + */ +static void MX_USART2_UART_Init(void) +{ + + /* USER CODE BEGIN USART2_Init 0 */ + + /* USER CODE END USART2_Init 0 */ + + /* USER CODE BEGIN USART2_Init 1 */ + + /* USER CODE END USART2_Init 1 */ + huart2.Instance = USART2; + huart2.Init.BaudRate = 115200; + huart2.Init.WordLength = UART_WORDLENGTH_8B; + huart2.Init.StopBits = UART_STOPBITS_1; + huart2.Init.Parity = UART_PARITY_NONE; + huart2.Init.Mode = UART_MODE_TX_RX; + huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart2.Init.OverSampling = UART_OVERSAMPLING_16; + huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1; + huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart2) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART2_Init 2 */ + + /* USER CODE END USART2_Init 2 */ + +} + +/** + * @brief SPI1 Initialization Function + * @param None + * @retval None + */ +static void MX_SPI1_Init(void) +{ + + /* USER CODE BEGIN SPI1_Init 0 */ + + /* USER CODE END SPI1_Init 0 */ + + SPI_AutonomousModeConfTypeDef HAL_SPI_AutonomousMode_Cfg_Struct = {0}; + + /* USER CODE BEGIN SPI1_Init 1 */ + + /* USER CODE END SPI1_Init 1 */ + /* SPI1 parameter configuration*/ + hspi1.Instance = SPI1; + hspi1.Init.Mode = SPI_MODE_MASTER; + hspi1.Init.Direction = SPI_DIRECTION_2LINES; + hspi1.Init.DataSize = SPI_DATASIZE_4BIT; + hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; + hspi1.Init.NSS = SPI_NSS_SOFT; + hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi1.Init.TIMode = SPI_TIMODE_DISABLE; + hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi1.Init.CRCPolynomial = 0x7; + hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + hspi1.Init.NSSPolarity = SPI_NSS_POLARITY_LOW; + hspi1.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA; + hspi1.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; + hspi1.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; + hspi1.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE; + hspi1.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE; + hspi1.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE; + hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE; + hspi1.Init.IOSwap = SPI_IO_SWAP_DISABLE; + hspi1.Init.ReadyMasterManagement = SPI_RDY_MASTER_MANAGEMENT_INTERNALLY; + hspi1.Init.ReadyPolarity = SPI_RDY_POLARITY_HIGH; + if (HAL_SPI_Init(&hspi1) != HAL_OK) + { + Error_Handler(); + } + HAL_SPI_AutonomousMode_Cfg_Struct.TriggerState = SPI_AUTO_MODE_DISABLE; + HAL_SPI_AutonomousMode_Cfg_Struct.TriggerSelection = SPI_GRP1_GPDMA_CH0_TCF_TRG; + HAL_SPI_AutonomousMode_Cfg_Struct.TriggerPolarity = SPI_TRIG_POLARITY_RISING; + if (HAL_SPIEx_SetConfigAutonomousMode(&hspi1, &HAL_SPI_AutonomousMode_Cfg_Struct) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SPI1_Init 2 */ + + /* USER CODE END SPI1_Init 2 */ + +} + +/** + * @brief TIM1 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM1_Init(void) +{ + + /* USER CODE BEGIN TIM1_Init 0 */ + + /* USER CODE END TIM1_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + + /* USER CODE BEGIN TIM1_Init 1 */ + + /* USER CODE END TIM1_Init 1 */ + htim1.Instance = TIM1; + htim1.Init.Prescaler = 0; + htim1.Init.CounterMode = TIM_COUNTERMODE_UP; + htim1.Init.Period = 65535; + htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim1.Init.RepetitionCounter = 0; + htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim1) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 0; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; + sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; + if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + { + Error_Handler(); + } + sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; + sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + sBreakDeadTimeConfig.DeadTime = 0; + sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + sBreakDeadTimeConfig.BreakFilter = 0; + sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT; + sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; + sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + sBreakDeadTimeConfig.Break2Filter = 0; + sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT; + sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM1_Init 2 */ + + /* USER CODE END TIM1_Init 2 */ + HAL_TIM_MspPostInit(&htim1); + +} + +/** + * @brief TIM4 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM4_Init(void) +{ + + /* USER CODE BEGIN TIM4_Init 0 */ + + /* USER CODE END TIM4_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + + /* USER CODE BEGIN TIM4_Init 1 */ + + /* USER CODE END TIM4_Init 1 */ + htim4.Instance = TIM4; + htim4.Init.Prescaler = 0; + htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + htim4.Init.Period = 4.294967295E9; + htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 0; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM4_Init 2 */ + + /* USER CODE END TIM4_Init 2 */ + HAL_TIM_MspPostInit(&htim4); + +} + +/** + * @brief UCPD1 Initialization Function + * @param None + * @retval None + */ +static void MX_UCPD1_Init(void) +{ + + /* USER CODE BEGIN UCPD1_Init 0 */ + + /* USER CODE END UCPD1_Init 0 */ + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* Peripheral clock enable */ + LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_UCPD1); + + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); + /**UCPD1 GPIO Configuration + PB15 ------> UCPD1_CC2 + PA15 (JTDI) ------> UCPD1_CC1 + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_15; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_15; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN UCPD1_Init 1 */ + + /* USER CODE END UCPD1_Init 1 */ + /* USER CODE BEGIN UCPD1_Init 2 */ + + /* USER CODE END UCPD1_Init 2 */ + +} + +/** + * @brief USB_OTG_FS Initialization Function + * @param None + * @retval None + */ +static void MX_USB_OTG_FS_PCD_Init(void) +{ + + /* USER CODE BEGIN USB_OTG_FS_Init 0 */ + + /* USER CODE END USB_OTG_FS_Init 0 */ + + /* USER CODE BEGIN USB_OTG_FS_Init 1 */ + + /* USER CODE END USB_OTG_FS_Init 1 */ + hpcd_USB_OTG_FS.Instance = USB_OTG_FS; + hpcd_USB_OTG_FS.Init.dev_endpoints = 6; + hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE; + hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; + hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; + hpcd_USB_OTG_FS.Init.battery_charging_enable = DISABLE; + hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; + hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE; + if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USB_OTG_FS_Init 2 */ + + /* USER CODE END USB_OTG_FS_Init 2 */ + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_2, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(LED_GREEN_GPIO_Port, LED_GREEN_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOB, UCPD_DBn_Pin|LED_BLUE_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin : USER_BUTTON_Pin */ + GPIO_InitStruct.Pin = USER_BUTTON_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(USER_BUTTON_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : UCPD_FLT_Pin */ + GPIO_InitStruct.Pin = UCPD_FLT_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(UCPD_FLT_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : PG2 */ + GPIO_InitStruct.Pin = GPIO_PIN_2; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + /*Configure GPIO pin : LED_GREEN_Pin */ + GPIO_InitStruct.Pin = LED_GREEN_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_GREEN_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : UCPD_DBn_Pin */ + GPIO_InitStruct.Pin = UCPD_DBn_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(UCPD_DBn_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : LED_BLUE_Pin */ + GPIO_InitStruct.Pin = LED_BLUE_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_BLUE_GPIO_Port, &GPIO_InitStruct); + +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + __disable_irq(); + while (1) + { + } + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/stm32u5xx_hal_msp.c b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/stm32u5xx_hal_msp.c index 36f54f03fa..90ab86c1c7 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/stm32u5xx_hal_msp.c +++ b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/stm32u5xx_hal_msp.c @@ -7,7 +7,7 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2021 STMicroelectronics. + *

© Copyright (c) 2023 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, @@ -22,7 +22,7 @@ /* Includes ------------------------------------------------------------------*/ #include "main.h" /* USER CODE BEGIN Includes */ - +#include /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ @@ -58,7 +58,9 @@ /* USER CODE BEGIN 0 */ /* USER CODE END 0 */ -/** + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + /** * Initializes the Global MSP. */ void HAL_MspInit(void) @@ -72,13 +74,9 @@ void HAL_MspInit(void) HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_3); /* System interrupt init*/ - HAL_PWREx_EnableVddIO2(); - /* USER CODE BEGIN MspInit 1 */ - /* Configure ICACHE associativity mode */ - HAL_ICACHE_ConfigAssociativityMode(ICACHE_1WAY); - /* Enable ICACHE */ - HAL_ICACHE_Enable(); + /* USER CODE BEGIN MspInit 1 */ + /* USER CODE END MspInit 1 */ } @@ -110,13 +108,23 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) __HAL_RCC_ADC1_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); /**ADC1 GPIO Configuration + PC0 ------> ADC1_IN1 + PC1 ------> ADC1_IN2 PC2 ------> ADC1_IN3 + PC3 ------> ADC1_IN4 + PB0 ------> ADC1_IN15 */ - GPIO_InitStruct.Pin = VBUS_SENSE_Pin; + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|VBUS_SENSE_Pin|GPIO_PIN_3; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(VBUS_SENSE_GPIO_Port, &GPIO_InitStruct); + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_0; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); /* USER CODE BEGIN ADC1_MspInit 1 */ @@ -142,9 +150,15 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) __HAL_RCC_ADC1_CLK_DISABLE(); /**ADC1 GPIO Configuration + PC0 ------> ADC1_IN1 + PC1 ------> ADC1_IN2 PC2 ------> ADC1_IN3 + PC3 ------> ADC1_IN4 + PB0 ------> ADC1_IN15 */ - HAL_GPIO_DeInit(VBUS_SENSE_GPIO_Port, VBUS_SENSE_Pin); + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_1|VBUS_SENSE_Pin|GPIO_PIN_3); + + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0); /* USER CODE BEGIN ADC1_MspDeInit 1 */ @@ -163,11 +177,45 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { GPIO_InitTypeDef GPIO_InitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - if(huart->Instance==USART1) + if(huart->Instance==LPUART1) + { + /* USER CODE BEGIN LPUART1_MspInit 0 */ + + /* USER CODE END LPUART1_MspInit 0 */ + /** Initializes the peripherals clock + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK3; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + + /* Peripheral clock enable */ + __HAL_RCC_LPUART1_CLK_ENABLE(); + + __HAL_RCC_GPIOG_CLK_ENABLE(); + /**LPUART1 GPIO Configuration + PG7 ------> LPUART1_TX + PG8 ------> LPUART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + /* USER CODE BEGIN LPUART1_MspInit 1 */ + + /* USER CODE END LPUART1_MspInit 1 */ + } + else if(huart->Instance==USART1) { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ + /** Initializes the peripherals clock */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; @@ -196,6 +244,40 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) /* USER CODE END USART1_MspInit 1 */ } + else if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspInit 0 */ + + /* USER CODE END USART2_MspInit 0 */ + + /** Initializes the peripherals clock + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + + /* Peripheral clock enable */ + __HAL_RCC_USART2_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF7_USART2; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART2_MspInit 1 */ + + /* USER CODE END USART2_MspInit 1 */ + } } @@ -207,7 +289,25 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) */ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) { - if(huart->Instance==USART1) + if(huart->Instance==LPUART1) + { + /* USER CODE BEGIN LPUART1_MspDeInit 0 */ + + /* USER CODE END LPUART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_LPUART1_CLK_DISABLE(); + + /**LPUART1 GPIO Configuration + PG7 ------> LPUART1_TX + PG8 ------> LPUART1_RX + */ + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_7|GPIO_PIN_8); + + /* USER CODE BEGIN LPUART1_MspDeInit 1 */ + + /* USER CODE END LPUART1_MspDeInit 1 */ + } + else if(huart->Instance==USART1) { /* USER CODE BEGIN USART1_MspDeInit 0 */ @@ -225,6 +325,215 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) /* USER CODE END USART1_MspDeInit 1 */ } + else if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspDeInit 0 */ + + /* USER CODE END USART2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART2_CLK_DISABLE(); + + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3); + + /* USER CODE BEGIN USART2_MspDeInit 1 */ + + /* USER CODE END USART2_MspDeInit 1 */ + } + +} + +/** +* @brief SPI MSP Initialization +* This function configures the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspInit 0 */ + + /* USER CODE END SPI1_MspInit 0 */ + /** Initializes the peripherals clock + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SPI1; + PeriphClkInit.Spi1ClockSelection = RCC_SPI1CLKSOURCE_SYSCLK; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + + /* Peripheral clock enable */ + __HAL_RCC_SPI1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI1_MspInit 1 */ + + /* USER CODE END SPI1_MspInit 1 */ + } + +} + +/** +* @brief SPI MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) +{ + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspDeInit 0 */ + + /* USER CODE END SPI1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI1_CLK_DISABLE(); + + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); + + /* USER CODE BEGIN SPI1_MspDeInit 1 */ + + /* USER CODE END SPI1_MspDeInit 1 */ + } + +} + +/** +* @brief TIM_Base MSP Initialization +* This function configures the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) +{ + if(htim_base->Instance==TIM1) + { + /* USER CODE BEGIN TIM1_MspInit 0 */ + + /* USER CODE END TIM1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM1_CLK_ENABLE(); + /* USER CODE BEGIN TIM1_MspInit 1 */ + + /* USER CODE END TIM1_MspInit 1 */ + } + else if(htim_base->Instance==TIM4) + { + /* USER CODE BEGIN TIM4_MspInit 0 */ + + /* USER CODE END TIM4_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM4_CLK_ENABLE(); + /* USER CODE BEGIN TIM4_MspInit 1 */ + + /* USER CODE END TIM4_MspInit 1 */ + } + +} + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(htim->Instance==TIM1) + { + /* USER CODE BEGIN TIM1_MspPostInit 0 */ + + /* USER CODE END TIM1_MspPostInit 0 */ + __HAL_RCC_GPIOE_CLK_ENABLE(); + /**TIM1 GPIO Configuration + PE9 ------> TIM1_CH1 + PE11 ------> TIM1_CH2 + PE13 ------> TIM1_CH3 + */ + GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_11|GPIO_PIN_13; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF1_TIM1; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /* USER CODE BEGIN TIM1_MspPostInit 1 */ + + /* USER CODE END TIM1_MspPostInit 1 */ + } + else if(htim->Instance==TIM4) + { + /* USER CODE BEGIN TIM4_MspPostInit 0 */ + + /* USER CODE END TIM4_MspPostInit 0 */ + + __HAL_RCC_GPIOD_CLK_ENABLE(); + /**TIM4 GPIO Configuration + PD15 ------> TIM4_CH4 + */ + GPIO_InitStruct.Pin = GPIO_PIN_15; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF2_TIM4; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /* USER CODE BEGIN TIM4_MspPostInit 1 */ + + /* USER CODE END TIM4_MspPostInit 1 */ + } + +} +/** +* @brief TIM_Base MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) +{ + if(htim_base->Instance==TIM1) + { + /* USER CODE BEGIN TIM1_MspDeInit 0 */ + + /* USER CODE END TIM1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM1_CLK_DISABLE(); + /* USER CODE BEGIN TIM1_MspDeInit 1 */ + + /* USER CODE END TIM1_MspDeInit 1 */ + } + else if(htim_base->Instance==TIM4) + { + /* USER CODE BEGIN TIM4_MspDeInit 0 */ + + /* USER CODE END TIM4_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM4_CLK_DISABLE(); + /* USER CODE BEGIN TIM4_MspDeInit 1 */ + + /* USER CODE END TIM4_MspDeInit 1 */ + } } @@ -320,10 +629,7 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd) } /* USER CODE BEGIN 1 */ -void Error_Handler() -{ - while(1); -} + /* USER CODE END 1 */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/stm32u5xx_it.c b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/stm32u5xx_it.c index 9a6a445334..a63c336ae0 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/stm32u5xx_it.c +++ b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/stm32u5xx_it.c @@ -6,7 +6,7 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2021 STMicroelectronics. + *

© Copyright (c) 2023 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, diff --git a/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/system_stm32u5xx.c b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/system_stm32u5xx.c new file mode 100644 index 0000000000..89269e0415 --- /dev/null +++ b/bsp/stm32/stm32u575-st-nucleo/board/CubeMX_Config/Src/system_stm32u5xx.c @@ -0,0 +1,362 @@ +/** + ****************************************************************************** + * @file system_stm32u5xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M33 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32u5xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32u5xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB3 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL1_SRC | No clock + *----------------------------------------------------------------------------- + * PLL1_M | 1 + *----------------------------------------------------------------------------- + * PLL1_N | 8 + *----------------------------------------------------------------------------- + * PLL1_P | 7 + *----------------------------------------------------------------------------- + * PLL1_Q | 2 + *----------------------------------------------------------------------------- + * PLL1_R | 2 + *----------------------------------------------------------------------------- + * PLL2_SRC | NA + *----------------------------------------------------------------------------- + * PLL2_M | NA + *----------------------------------------------------------------------------- + * PLL2_N | NA + *----------------------------------------------------------------------------- + * PLL2_P | NA + *----------------------------------------------------------------------------- + * PLL2_Q | NA + *----------------------------------------------------------------------------- + * PLL2_R | NA + *----------------------------------------------------------------------------- + * PLL3_SRC | NA + *----------------------------------------------------------------------------- + * PLL3_M | NA + *----------------------------------------------------------------------------- + * PLL3_N | NA + *----------------------------------------------------------------------------- + * PLL3_P | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup STM32U5xx_system + * @{ + */ + +/** @addtogroup STM32U5xx_System_Private_Includes + * @{ + */ + +#include "stm32u5xx.h" +#include + +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_Defines + * @{ + */ + +#if !defined (HSE_VALUE) + #define HSE_VALUE 16000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00000000UL /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ + +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 4000000U; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint32_t MSIRangeTable[16] = {48000000U,24000000U,16000000U,12000000U, 4000000U, 2000000U, 1500000U,\ + 1000000U, 3072000U, 1536000U,1024000U, 768000U, 400000U, 200000U, 150000U, 100000U}; +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 20U)|(3UL << 22U)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set MSION bit */ + RCC->CR = RCC_CR_MSISON; + + /* Reset CFGR register */ + RCC->CFGR1 = 0U; + RCC->CFGR2 = 0U; + RCC->CFGR3 = 0U; + + /* Reset HSEON, CSSON , HSION, PLLxON bits */ + RCC->CR &= ~(RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLL1ON | RCC_CR_PLL2ON | RCC_CR_PLL3ON); + + /* Reset PLLCFGR register */ + RCC->PLL1CFGR = 0U; + + /* Reset HSEBYP bit */ + RCC->CR &= ~(RCC_CR_HSEBYP); + + /* Disable all interrupts */ + RCC->CIER = 0U; + + /* Configure the Vector Table location add offset address ------------------*/ + #ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ + #else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ + #endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) MSI_VALUE is a constant defined in stm32u5xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32u5xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32u5xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t pllr, pllsource, pllm , tmp, pllfracen, msirange; + float_t fracn1, pllvco; + + /* Get MSI Range frequency--------------------------------------------------*/ + if(READ_BIT(RCC->ICSCR1, RCC_ICSCR1_MSIRGSEL) == 0U) + { + /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISSRANGE) >> RCC_CSR_MSISSRANGE_Pos; + } + else + { + /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->ICSCR1 & RCC_ICSCR1_MSISRANGE) >> RCC_ICSCR1_MSISRANGE_Pos; + } + + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR1 & RCC_CFGR1_SWS) + { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1SRC); + pllm = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1M)>> RCC_PLL1CFGR_PLL1M_Pos) + 1U; + pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN)>>RCC_PLL1CFGR_PLL1FRACEN_Pos); + fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_PLL1FRACN)>> RCC_PLL1FRACR_PLL1FRACN_Pos)); + + switch (pllsource) + { + case 0x00: /* No clock sent to PLL*/ + pllvco = (float_t)0U; + break; + + case 0x02: /* HSI used as PLL clock source */ + pllvco = ((float_t)HSI_VALUE / (float_t)pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = ((float_t)HSE_VALUE / (float_t)pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = ((float_t)msirange / (float_t)pllm); + break; + } + + pllvco = pllvco * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + (fracn1/(float_t)0x2000) + (float_t)1U); + pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U ); + SystemCoreClock = (uint32_t)((uint32_t)pllvco/pllr); + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + diff --git a/bsp/stm32/stm32u575-st-nucleo/board/Kconfig b/bsp/stm32/stm32u575-st-nucleo/board/Kconfig index 585d119685..425eadc823 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32u575-st-nucleo/board/Kconfig @@ -9,6 +9,50 @@ config SOC_STM32U575ZI menu "Onboard Peripheral Drivers" + config BSP_USING_ARDUINO + bool "Compatible with Arduino Ecosystem (RTduino)" + select PKG_USING_RTDUINO + select BSP_USING_GPIO + select BSP_USING_ADC + select BSP_USING_ADC1 + select BSP_USING_PWM + select BSP_USING_PWM1 + select BSP_USING_PWM1_CH1 + select BSP_USING_PWM1_CH2 + select BSP_USING_PWM1_CH3 + select BSP_USING_PWM4 + select BSP_USING_PWM4_CH4 + select BSP_USING_I2C + select BSP_USING_I2C1 + select BSP_USING_SPI + select BSP_USING_SPI1 + imply RTDUINO_USING_SERVO + imply RTDUINO_USING_WIRE + imply RTDUINO_USING_SPI + default n + + config BSP_USING_KEY + bool "Enable onboard keys" + select RT_USING_PIN + select RT_USING_TIMER_SOFT + select PKG_USING_FLEXIBLE_BUTTON + default n + + config BSP_USING_MPU6XXX + bool "Enable mpu6xxx (i2c2)" + select BSP_USING_I2C + select BSP_USING_I2C2 + select PKG_USING_SENSORS_DRIVERS + select PKG_USING_MPU6XXX + select PKG_USING_MPU6XXX_LATEST_VERSION + default n + + config BSP_USING_SPI_FLASH + bool "Enable SPI FLASH" + select BSP_USING_SPI + select RT_USING_SFUD + default n + endmenu menu "On-chip Peripheral Drivers" @@ -31,6 +75,127 @@ menu "On-chip Peripheral Drivers" bool "Enable UART1 RX DMA" depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA default n + + config BSP_USING_UART2 + bool "Enable UART2" + default y + + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + + config BSP_USING_LPUART1 + bool "Enable LPUART1" + default y + + config BSP_LPUART1_RX_USING_DMA + bool "Enable LPUART1 RX DMA" + depends on BSP_USING_LPUART1 && RT_SERIAL_USING_DMA + default n + endif + + menuconfig BSP_USING_ADC + bool "Enable ADC" + default n + select RT_USING_ADC + if BSP_USING_ADC + config BSP_USING_ADC1 + bool "Enable ADC1" + default n + endif + + menuconfig BSP_USING_PWM + bool "Enable PWM" + default n + select RT_USING_PWM + if BSP_USING_PWM + + menuconfig BSP_USING_PWM1 + bool "Enable timer1 output PWM" + default n + if BSP_USING_PWM1 + config BSP_USING_PWM1_CH1 + bool "Enable PWM1 channel1" + default n + + config BSP_USING_PWM1_CH2 + bool "Enable PWM1 channel2" + default n + + config BSP_USING_PWM1_CH3 + bool "Enable PWM1 channel3" + default n + + config BSP_USING_PWM1_CH4 + bool "Enable PWM1 channel4" + default n + endif + + menuconfig BSP_USING_PWM4 + bool "Enable timer4 output PWM" + default n + if BSP_USING_PWM4 + config BSP_USING_PWM4_CH1 + bool "Enable PWM4 channel1" + default n + + config BSP_USING_PWM4_CH2 + bool "Enable PWM4 channel2" + default n + + config BSP_USING_PWM4_CH3 + bool "Enable PWM4 channel3" + default n + + config BSP_USING_PWM4_CH4 + bool "Enable PWM4 channel4" + default n + endif + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + endif + + menuconfig BSP_USING_I2C + bool "Enable I2C BUS" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default y + if BSP_USING_I2C1 + comment "Notice: PB8 --> 24; PB9 --> 25" + config BSP_I2C1_SCL_PIN + int "i2c1 scl pin number" + range 1 176 + default 24 + config BSP_I2C1_SDA_PIN + int "I2C1 sda pin number" + range 1 176 + default 25 + endif endif source "../libraries/HAL_Drivers/Kconfig" diff --git a/bsp/stm32/stm32u575-st-nucleo/board/SConscript b/bsp/stm32/stm32u575-st-nucleo/board/SConscript index 347210856e..6c2752dfe6 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/SConscript +++ b/bsp/stm32/stm32u575-st-nucleo/board/SConscript @@ -12,6 +12,12 @@ board.c CubeMX_Config/Src/stm32u5xx_hal_msp.c ''') +if GetDepend(['BSP_USING_KEY']): + src += Glob('ports/drv_key.c') + +if GetDepend(['BSP_USING_SPI_FLASH']): + src += Glob('ports/drv_spi_flash.c') + path = [cwd] path += [cwd + '/CubeMX_Config/Inc'] diff --git a/bsp/stm32/stm32u575-st-nucleo/board/board.c b/bsp/stm32/stm32u575-st-nucleo/board/board.c index 069f9ed3a1..0ec6996618 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/board.c +++ b/bsp/stm32/stm32u575-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2021, RT-Thread Development Team + * Copyright (c) 2006-2023, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32u575-st-nucleo/board/board.h b/bsp/stm32/stm32u575-st-nucleo/board/board.h index 4902fbe8fb..f1d911972c 100644 --- a/bsp/stm32/stm32u575-st-nucleo/board/board.h +++ b/bsp/stm32/stm32u575-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2021, RT-Thread Development Team + * Copyright (c) 2006-2023, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32u575-st-nucleo/board/ports/drv_key.c b/bsp/stm32/stm32u575-st-nucleo/board/ports/drv_key.c new file mode 100644 index 0000000000..dcb1404a4b --- /dev/null +++ b/bsp/stm32/stm32u575-st-nucleo/board/ports/drv_key.c @@ -0,0 +1,276 @@ +/** + * @File: flexible_button_demo.c + * @Author: MurphyZhao + * @Date: 2018-09-29 + * + * Copyright (c) 2018-2019 MurphyZhao + * https://github.com/murphyzhao + * All rights reserved. + * License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Change logs: + * Date Author Notes + * 2018-09-29 MurphyZhao First add + * 2019-08-02 MurphyZhao 迁移代码到 murphyzhao 仓库 +*/ + +#include +#include "flexible_button.h" +#include +#include +#include + +/*The button PIN_KEY0,PIN_KEY1,PIN_KEY2 are an expansion button,which users can add according to their needs*/ +#define PIN_KEY0 GET_PIN(D,10) +#define PIN_KEY1 GET_PIN(D,9) +#define PIN_KEY2 GET_PIN(D,8) +#define PIN_WK_UP GET_PIN(C,13) + +typedef enum +{ + USER_BUTTON_0 = 0, + USER_BUTTON_1, + USER_BUTTON_2, + USER_BUTTON_3, + USER_BUTTON_MAX +} user_button_t; + +static flex_button_t user_button[USER_BUTTON_MAX]; + +static void btn_0_cb(flex_button_t *btn) +{ + rt_kprintf("btn_0_cb\n"); + switch (btn->event) + { + case FLEX_BTN_PRESS_DOWN: + rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_DOWN]\n"); + break; + case FLEX_BTN_PRESS_CLICK: + rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_CLICK]\n"); + break; + case FLEX_BTN_PRESS_DOUBLE_CLICK: + rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_DOUBLE_CLICK]\n"); + break; + case FLEX_BTN_PRESS_SHORT_START: + rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_SHORT_START]\n"); + break; + case FLEX_BTN_PRESS_SHORT_UP: + rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_SHORT_UP]\n"); + break; + case FLEX_BTN_PRESS_LONG_START: + rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_LONG_START]\n"); + break; + case FLEX_BTN_PRESS_LONG_UP: + rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_LONG_UP]\n"); + break; + case FLEX_BTN_PRESS_LONG_HOLD: + rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_LONG_HOLD]\n"); + break; + case FLEX_BTN_PRESS_LONG_HOLD_UP: + rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_LONG_HOLD_UP]\n"); + break; + } +} + +static void btn_1_cb(flex_button_t *btn) +{ + rt_kprintf("btn_1_cb\n"); + switch (btn->event) + { + case FLEX_BTN_PRESS_DOWN: + rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_DOWN]\n"); + break; + case FLEX_BTN_PRESS_CLICK: + rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_CLICK]\n"); + break; + case FLEX_BTN_PRESS_DOUBLE_CLICK: + rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_DOUBLE_CLICK]\n"); + break; + case FLEX_BTN_PRESS_SHORT_START: + rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_SHORT_START]\n"); + break; + case FLEX_BTN_PRESS_SHORT_UP: + rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_SHORT_UP]\n"); + break; + case FLEX_BTN_PRESS_LONG_START: + rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_LONG_START]\n"); + break; + case FLEX_BTN_PRESS_LONG_UP: + rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_LONG_UP]\n"); + break; + case FLEX_BTN_PRESS_LONG_HOLD: + rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_LONG_HOLD]\n"); + break; + case FLEX_BTN_PRESS_LONG_HOLD_UP: + rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_LONG_HOLD_UP]\n"); + break; + } +} + +static void btn_2_cb(flex_button_t *btn) +{ + rt_kprintf("btn_2_cb\n"); + switch (btn->event) + { + case FLEX_BTN_PRESS_DOWN: + rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_DOWN]\n"); + break; + case FLEX_BTN_PRESS_CLICK: + rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_CLICK]\n"); + break; + case FLEX_BTN_PRESS_DOUBLE_CLICK: + rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_DOUBLE_CLICK]\n"); + break; + case FLEX_BTN_PRESS_SHORT_START: + rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_SHORT_START]\n"); + break; + case FLEX_BTN_PRESS_SHORT_UP: + rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_SHORT_UP]\n"); + break; + case FLEX_BTN_PRESS_LONG_START: + rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_LONG_START]\n"); + break; + case FLEX_BTN_PRESS_LONG_UP: + rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_LONG_UP]\n"); + break; + case FLEX_BTN_PRESS_LONG_HOLD: + rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_LONG_HOLD]\n"); + break; + case FLEX_BTN_PRESS_LONG_HOLD_UP: + rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_LONG_HOLD_UP]\n"); + break; + } +} + + +static void btn_3_cb(flex_button_t *btn) +{ + rt_kprintf("btn_3_cb\n"); + switch (btn->event) + { + case FLEX_BTN_PRESS_DOWN: + rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_DOWN]\n"); + break; + case FLEX_BTN_PRESS_CLICK: + rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_CLICK]\n"); + break; + case FLEX_BTN_PRESS_DOUBLE_CLICK: + rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_DOUBLE_CLICK]\n"); + break; + case FLEX_BTN_PRESS_SHORT_START: + rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_SHORT_START]\n"); + break; + case FLEX_BTN_PRESS_SHORT_UP: + rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_SHORT_UP]\n"); + break; + case FLEX_BTN_PRESS_LONG_START: + rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_LONG_START]\n"); + break; + case FLEX_BTN_PRESS_LONG_UP: + rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_LONG_UP]\n"); + break; + case FLEX_BTN_PRESS_LONG_HOLD: + rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_LONG_HOLD]\n"); + break; + case FLEX_BTN_PRESS_LONG_HOLD_UP: + rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_LONG_HOLD_UP]\n"); + break; + } +} + + + +static uint8_t button_key0_read(void) +{ + return rt_pin_read(PIN_KEY0); +} + +static uint8_t button_key1_read(void) +{ + return rt_pin_read(PIN_KEY1); +} + +static uint8_t button_key2_read(void) +{ + return rt_pin_read(PIN_KEY2); +} + +static uint8_t button_keywkup_read(void) +{ + return rt_pin_read(PIN_WK_UP); +} + +static void button_scan(void *arg) +{ + while(1) + { + flex_button_scan(); + rt_thread_mdelay(20); + } +} + +static void user_button_init(void) +{ + int i; + + rt_memset(&user_button[0], 0x0, sizeof(user_button)); + + user_button[USER_BUTTON_0].usr_button_read = button_key0_read; + user_button[USER_BUTTON_1].usr_button_read = button_key1_read; + user_button[USER_BUTTON_2].usr_button_read = button_key2_read; + + user_button[USER_BUTTON_3].usr_button_read = button_keywkup_read; + user_button[USER_BUTTON_3].cb = (flex_button_response_callback)btn_3_cb; + + rt_pin_mode(PIN_KEY0, PIN_MODE_INPUT); /* set KEY pin mode to input */ + rt_pin_mode(PIN_KEY1, PIN_MODE_INPUT); /* set KEY pin mode to input */ + rt_pin_mode(PIN_KEY2, PIN_MODE_INPUT); /* set KEY pin mode to input */ + rt_pin_mode(PIN_WK_UP, PIN_MODE_INPUT); /* set KEY pin mode to input */ + + for (i = 0; i < USER_BUTTON_MAX; i ++) + { + user_button[i].pressed_logic_level = 0; + user_button[i].click_start_tick = 20; + user_button[i].short_press_start_tick = 100; + user_button[i].long_press_start_tick = 200; + user_button[i].long_hold_start_tick = 300; + + if (i == USER_BUTTON_3) + { + user_button[USER_BUTTON_3].pressed_logic_level = 1; + } + + flex_button_register(&user_button[i]); + } +} + +int flex_button_main(void) +{ + rt_thread_t tid = RT_NULL; + + user_button_init(); + + /* Create background ticks thread */ + tid = rt_thread_create("flex_btn", button_scan, RT_NULL, 1024, 10, 10); + if(tid != RT_NULL) + { + rt_thread_startup(tid); + } + + return 0; +} +#ifdef FINSH_USING_MSH +INIT_APP_EXPORT(flex_button_main); +#endif diff --git a/bsp/stm32/stm32u575-st-nucleo/board/ports/drv_spi_flash.c b/bsp/stm32/stm32u575-st-nucleo/board/ports/drv_spi_flash.c new file mode 100644 index 0000000000..d2566f7d82 --- /dev/null +++ b/bsp/stm32/stm32u575-st-nucleo/board/ports/drv_spi_flash.c @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-27 zylx first version + */ + +#include +#include +#include +#include +#include +#include + +#ifdef BSP_USING_SPI_FLASH + +#include "spi_flash.h" +#include "spi_flash_sfud.h" + +static int rt_hw_spi_flash_init(void) +{ + + rt_hw_spi_device_attach("spi1", "spi10", 24); // CS:PB8 + + if (RT_NULL == rt_sfud_flash_probe("W25Q128", "spi10")) + { + return -RT_ERROR; + }; + + return RT_EOK; +} +INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init); + +#if defined(RT_USING_DFS_ELMFAT) && !defined(BSP_USING_SDCARD) +#include + +#define BLK_DEV_NAME "W25Q128" + +int mnt_init(void) +{ + rt_thread_delay(RT_TICK_PER_SECOND); + + if (dfs_mount(BLK_DEV_NAME, "/", "elm", 0, 0) == 0) + { + rt_kprintf("file system initialization done!\n"); + } + else + { + if(dfs_mkfs("elm", BLK_DEV_NAME) == 0) + { + if (dfs_mount(BLK_DEV_NAME, "/", "elm", 0, 0) == 0) + { + rt_kprintf("file system initialization done!\n"); + } + else + { + rt_kprintf("file system initialization failed!\n"); + } + } + } + + return 0; +} +INIT_ENV_EXPORT(mnt_init); + +#endif /* defined(RT_USING_DFS_ELMFAT) && !defined(BSP_USING_SDCARD) */ +#endif /* BSP_USING_SPI_FLASH */ diff --git a/bsp/stm32/stm32u575-st-nucleo/project.uvoptx b/bsp/stm32/stm32u575-st-nucleo/project.uvoptx index 87711a8dfb..5c1ff1426b 100644 --- a/bsp/stm32/stm32u575-st-nucleo/project.uvoptx +++ b/bsp/stm32/stm32u575-st-nucleo/project.uvoptx @@ -182,11 +182,1135 @@ - Source Group 1 + Applications + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + applications\main.c + main.c + 0 + 0 + + + + + Compiler 0 0 0 0 + + 2 + 2 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\armlibc\syscall_mem.c + syscall_mem.c + 0 + 0 + + + 2 + 3 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\armlibc\syscalls.c + syscalls.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\cctype.c + cctype.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + 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+ 7 + 46 + 1 + 0 + 0 + 0 + ..\..\..\src\components.c + components.c + 0 + 0 + + + 7 + 47 + 1 + 0 + 0 + 0 + ..\..\..\src\device.c + device.c + 0 + 0 + + + 7 + 48 + 1 + 0 + 0 + 0 + ..\..\..\src\idle.c + idle.c + 0 + 0 + + + 7 + 49 + 1 + 0 + 0 + 0 + ..\..\..\src\ipc.c + ipc.c + 0 + 0 + + + 7 + 50 + 1 + 0 + 0 + 0 + ..\..\..\src\irq.c + irq.c + 0 + 0 + + + 7 + 51 + 1 + 0 + 0 + 0 + ..\..\..\src\kservice.c + kservice.c + 0 + 0 + + + 7 + 52 + 1 + 0 + 0 + 0 + ..\..\..\src\mem.c + mem.c + 0 + 0 + + + 7 + 53 + 1 + 0 + 0 + 0 + ..\..\..\src\mempool.c + mempool.c + 0 + 0 + + + 7 + 54 + 1 + 0 + 0 + 0 + ..\..\..\src\object.c + object.c + 0 + 0 + + + 7 + 55 + 1 + 0 + 0 + 0 + ..\..\..\src\scheduler_up.c + scheduler_up.c + 0 + 0 + + + 7 + 56 + 1 + 0 + 0 + 0 + ..\..\..\src\thread.c + thread.c + 0 + 0 + + + 7 + 57 + 1 + 0 + 0 + 0 + ..\..\..\src\timer.c + timer.c + 0 + 0 + + + + + Libraries + 0 + 0 + 0 + 0 + + 8 + 58 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_uart.c + stm32u5xx_hal_uart.c + 0 + 0 + + + 8 + 59 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal.c + stm32u5xx_hal.c + 0 + 0 + + + 8 + 60 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_spi.c + stm32u5xx_hal_spi.c + 0 + 0 + + + 8 + 61 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_crc.c + stm32u5xx_hal_crc.c + 0 + 0 + + + 8 + 62 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_spi_ex.c + stm32u5xx_hal_spi_ex.c + 0 + 0 + + + 8 + 63 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_icache.c + stm32u5xx_hal_icache.c + 0 + 0 + + + 8 + 64 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_uart_ex.c + stm32u5xx_hal_uart_ex.c + 0 + 0 + + + 8 + 65 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_dma.c + stm32u5xx_hal_dma.c + 0 + 0 + + + 8 + 66 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_usart.c + stm32u5xx_hal_usart.c + 0 + 0 + + + 8 + 67 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pwr.c + stm32u5xx_hal_pwr.c + 0 + 0 + + + 8 + 68 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_rcc.c + stm32u5xx_hal_rcc.c + 0 + 0 + + + 8 + 69 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_gpio.c + stm32u5xx_hal_gpio.c + 0 + 0 + + + 8 + 70 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_rng.c + stm32u5xx_hal_rng.c + 0 + 0 + + + 8 + 71 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_tim.c + stm32u5xx_hal_tim.c + 0 + 0 + + + 8 + 72 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_cortex.c + stm32u5xx_hal_cortex.c + 0 + 0 + + + 8 + 73 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_ospi.c + stm32u5xx_hal_ospi.c + 0 + 0 + + + 8 + 74 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_cryp.c + stm32u5xx_hal_cryp.c + 0 + 0 + + + 8 + 75 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_crc_ex.c + stm32u5xx_hal_crc_ex.c + 0 + 0 + + + 8 + 76 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_lptim.c + stm32u5xx_hal_lptim.c + 0 + 0 + + + 8 + 77 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_rcc_ex.c + stm32u5xx_hal_rcc_ex.c + 0 + 0 + + + 8 + 78 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_i2c.c + stm32u5xx_hal_i2c.c + 0 + 0 + + + 8 + 79 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_usart_ex.c + stm32u5xx_hal_usart_ex.c + 0 + 0 + + + 8 + 80 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_cryp_ex.c + stm32u5xx_hal_cryp_ex.c + 0 + 0 + + + 8 + 81 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\CMSIS\Device\ST\STM32U5xx\Source\Templates\system_stm32u5xx.c + system_stm32u5xx.c + 0 + 0 + + + 8 + 82 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pwr_ex.c + stm32u5xx_hal_pwr_ex.c + 0 + 0 + + + 8 + 83 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_comp.c + stm32u5xx_hal_comp.c + 0 + 0 + + + 8 + 84 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_i2c_ex.c + stm32u5xx_hal_i2c_ex.c + 0 + 0 + + + 8 + 85 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_adc_ex.c + stm32u5xx_hal_adc_ex.c + 0 + 0 + + + 8 + 86 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_tim_ex.c + stm32u5xx_hal_tim_ex.c + 0 + 0 + + + 8 + 87 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_dma_ex.c + stm32u5xx_hal_dma_ex.c + 0 + 0 + + + 8 + 88 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_adc.c + stm32u5xx_hal_adc.c + 0 + 0 + + + 8 + 89 + 1 + 0 + 0 + 0 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_exti.c + stm32u5xx_hal_exti.c + 0 + 0 + diff --git a/bsp/stm32/stm32u575-st-nucleo/project.uvprojx b/bsp/stm32/stm32u575-st-nucleo/project.uvprojx index ecfb0ed556..29334b4a15 100644 --- a/bsp/stm32/stm32u575-st-nucleo/project.uvprojx +++ b/bsp/stm32/stm32u575-st-nucleo/project.uvprojx @@ -1,43 +1,46 @@ + 2.1 +
### uVision Project, (C) Keil Software
+ rtthread 0x4 ARM-ADS - 6140000::V6.14::ARMCLANG + 6160000::V6.16::ARMCLANG 1 STM32U575ZITx STMicroelectronics - Keil.STM32U5xx_DFP.1.1.0 - http://www.keil.com/pack/ + Keil.STM32U5xx_DFP.2.1.0 + https://www.keil.com/pack/ IROM(0x08000000-0x81FFFFF) IRAM(0x20000000-0x200BFFFF) CLOCK(8000000) FPU3(SFPU) CPUTYPE("Cortex-M33") ELITTLE TZ - - - + + + 0 - - - - - - - - - - + + + + + + + + + + $$Device:STM32U575ZITx$CMSIS\SVD\STM32U5xx.svd 0 0 - - - - - + + + + + 0 0 @@ -52,15 +55,15 @@ 0 1 0 - + 1 0 0 0 0 - - + + 0 0 0 @@ -69,8 +72,8 @@ 0 0 - - + + 0 0 0 @@ -80,14 +83,14 @@ 1 0 fromelf --bin !L --output rtthread.bin - + 0 0 0 0 1 - + 0 @@ -101,15 +104,15 @@ 0 0 3 - - + + 0 - - - - + + + + SARMV8M.DLL -MPU TCM.DLL @@ -136,10 +139,10 @@ 1 BIN\UL2V8M.DLL "" () - - - - + + + + 0 @@ -172,7 +175,7 @@ 0 0 "Cortex-M33" - + 0 0 0 @@ -306,7 +309,7 @@ 0x0 - + 1 @@ -333,10 +336,10 @@ 0 0 - + __STDC_LIMIT_MACROS, STM32U575xx, USE_HAL_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, RT_USING_ARMLIBC - - ..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\include;..\..\..\components\finsh;..\..\..\components\drivers\include;..\libraries\STM32U5xx_HAL\CMSIS\Device\ST\STM32U5xx\Include;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\posix\io\stdio;board;..\..\..\libcpu\arm\cortex-m33;..\libraries\HAL_Drivers\CMSIS\Include;.;..\libraries\HAL_Drivers;applications;..\..\..\components\drivers\include;..\..\..\libcpu\arm\common;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers\config;..\..\..\components\libc\posix\ipc;..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\compilers\common\include + + .;..\..\..\components\drivers\include;..\..\..\libcpu\arm\common;..\..\..\components\libc\compilers\common\include;..\libraries\STM32U5xx_HAL\CMSIS\Device\ST\STM32U5xx\Include;..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Inc;..\..\..\components\drivers\include;..\libraries\HAL_Drivers\config;..\..\..\components\libc\posix\ipc;..\libraries\HAL_Drivers;..\..\..\include;..\..\..\components\drivers\spi;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\poll;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\drivers\include;..\..\..\libcpu\arm\cortex-m33;..\libraries\HAL_Drivers\CMSIS\Include;..\..\..\components\libc\compilers\common\extension;applications;board\CubeMX_Config\Inc;board;..\..\..\components\libc\posix\io\stdio @@ -351,10 +354,10 @@ 0 4 - - - - + + + + @@ -366,13 +369,13 @@ 0 0x08000000 0x20000000 - + .\board\linker_scripts\link.sct - - - - - + + + + + @@ -395,50 +398,36 @@ 1 ..\..\..\components\libc\compilers\armlibc\syscall_mem.c - - syscalls.c 1 ..\..\..\components\libc\compilers\armlibc\syscalls.c - - cctype.c 1 ..\..\..\components\libc\compilers\common\cctype.c - - cstdio.c 1 ..\..\..\components\libc\compilers\common\cstdio.c - - cstdlib.c 1 ..\..\..\components\libc\compilers\common\cstdlib.c - - cstring.c 1 ..\..\..\components\libc\compilers\common\cstring.c - - ctime.c 1 ..\..\..\components\libc\compilers\common\ctime.c - - cwchar.c 1 @@ -454,43 +443,31 @@ 1 ..\..\..\libcpu\arm\common\atomic_arm.c - - div0.c 1 ..\..\..\libcpu\arm\common\div0.c - - showmem.c 1 ..\..\..\libcpu\arm\common\showmem.c - - context_rvds.S 2 ..\..\..\libcpu\arm\cortex-m33\context_rvds.S - - cpuport.c 1 ..\..\..\libcpu\arm\cortex-m33\cpuport.c - - syscall_rvds.S 2 ..\..\..\libcpu\arm\cortex-m33\syscall_rvds.S - - trustzone.c 1 @@ -501,67 +478,86 @@ DeviceDrivers + + i2c-bit-ops.c + 1 + ..\..\..\components\drivers\i2c\i2c-bit-ops.c + + + i2c_core.c + 1 + ..\..\..\components\drivers\i2c\i2c_core.c + + + i2c_dev.c + 1 + ..\..\..\components\drivers\i2c\i2c_dev.c + completion.c 1 ..\..\..\components\drivers\ipc\completion.c - - dataqueue.c 1 ..\..\..\components\drivers\ipc\dataqueue.c - - pipe.c 1 ..\..\..\components\drivers\ipc\pipe.c - - ringblk_buf.c 1 ..\..\..\components\drivers\ipc\ringblk_buf.c - - ringbuffer.c 1 ..\..\..\components\drivers\ipc\ringbuffer.c - - waitqueue.c 1 ..\..\..\components\drivers\ipc\waitqueue.c - - workqueue.c 1 ..\..\..\components\drivers\ipc\workqueue.c - - + + adc.c + 1 + ..\..\..\components\drivers\misc\adc.c + pin.c 1 ..\..\..\components\drivers\misc\pin.c - - + + rt_drv_pwm.c + 1 + ..\..\..\components\drivers\misc\rt_drv_pwm.c + serial.c 1 ..\..\..\components\drivers\serial\serial.c + + spi_core.c + 1 + ..\..\..\components\drivers\spi\spi_core.c + + + spi_dev.c + 1 + ..\..\..\components\drivers\spi\spi_dev.c + @@ -572,36 +568,36 @@ 2 ..\libraries\STM32U5xx_HAL\CMSIS\Device\ST\STM32U5xx\Source\Templates\arm\startup_stm32u575xx.s - - stm32u5xx_hal_msp.c 1 board\CubeMX_Config\Src\stm32u5xx_hal_msp.c - - board.c 1 board\board.c - - + + drv_adc.c + 1 + ..\libraries\HAL_Drivers\drv_adc.c + drv_common.c 1 ..\libraries\HAL_Drivers\drv_common.c - - drv_gpio.c 1 ..\libraries\HAL_Drivers\drv_gpio.c - - + + drv_spi.c + 1 + ..\libraries\HAL_Drivers\drv_spi.c + drv_usart.c 1 @@ -617,22 +613,16 @@ 1 ..\..\..\components\finsh\shell.c - - msh.c 1 ..\..\..\components\finsh\msh.c - - msh_parse.c 1 ..\..\..\components\finsh\msh_parse.c - - cmd.c 1 @@ -648,85 +638,61 @@ 1 ..\..\..\src\clock.c - - components.c 1 ..\..\..\src\components.c - - device.c 1 ..\..\..\src\device.c - - idle.c 1 ..\..\..\src\idle.c - - ipc.c 1 ..\..\..\src\ipc.c - - irq.c 1 ..\..\..\src\irq.c - - kservice.c 1 ..\..\..\src\kservice.c - - mem.c 1 ..\..\..\src\mem.c - - mempool.c 1 ..\..\..\src\mempool.c - - object.c 1 ..\..\..\src\object.c - - scheduler_up.c 1 ..\..\..\src\scheduler_up.c - - thread.c 1 ..\..\..\src\thread.c - - timer.c 1 @@ -742,148 +708,156 @@ 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_uart.c - - stm32u5xx_hal.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal.c - - + + stm32u5xx_hal_spi.c + 1 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_spi.c + stm32u5xx_hal_crc.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_crc.c - - + + stm32u5xx_hal_spi_ex.c + 1 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_spi_ex.c + stm32u5xx_hal_icache.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_icache.c - - stm32u5xx_hal_uart_ex.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_uart_ex.c - - stm32u5xx_hal_dma.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_dma.c - - stm32u5xx_hal_usart.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_usart.c - - stm32u5xx_hal_pwr.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pwr.c - - stm32u5xx_hal_rcc.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_rcc.c - - stm32u5xx_hal_gpio.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_gpio.c - - stm32u5xx_hal_rng.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_rng.c - - + + stm32u5xx_hal_tim.c + 1 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_tim.c + stm32u5xx_hal_cortex.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_cortex.c - - + + stm32u5xx_hal_ospi.c + 1 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_ospi.c + stm32u5xx_hal_cryp.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_cryp.c - - stm32u5xx_hal_crc_ex.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_crc_ex.c - - + + stm32u5xx_hal_lptim.c + 1 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_lptim.c + stm32u5xx_hal_rcc_ex.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_rcc_ex.c - - + + stm32u5xx_hal_i2c.c + 1 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_i2c.c + stm32u5xx_hal_usart_ex.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_usart_ex.c - - stm32u5xx_hal_cryp_ex.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_cryp_ex.c - - system_stm32u5xx.c 1 ..\libraries\STM32U5xx_HAL\CMSIS\Device\ST\STM32U5xx\Source\Templates\system_stm32u5xx.c - - stm32u5xx_hal_pwr_ex.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_pwr_ex.c - - stm32u5xx_hal_comp.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_comp.c - - + + stm32u5xx_hal_i2c_ex.c + 1 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_i2c_ex.c + + + stm32u5xx_hal_adc_ex.c + 1 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_adc_ex.c + + + stm32u5xx_hal_tim_ex.c + 1 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_tim_ex.c + stm32u5xx_hal_dma_ex.c 1 ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_dma_ex.c - - + + stm32u5xx_hal_adc.c + 1 + ..\libraries\STM32U5xx_HAL\STM32U5xx_HAL_Driver\Src\stm32u5xx_hal_adc.c + stm32u5xx_hal_exti.c 1 @@ -894,23 +868,21 @@ + - - - + + + + <Project Info> - - - - - 0 1 +
diff --git a/bsp/stm32/stm32u575-st-nucleo/rtconfig.h b/bsp/stm32/stm32u575-st-nucleo/rtconfig.h index 495741858a..a5c568b626 100644 --- a/bsp/stm32/stm32u575-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32u575-st-nucleo/rtconfig.h @@ -17,6 +17,9 @@ #define RT_USING_IDLE_HOOK #define RT_IDLE_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 +#define RT_USING_TIMER_SOFT +#define RT_TIMER_THREAD_PRIO 4 +#define RT_TIMER_THREAD_STACK_SIZE 512 /* kservice optimization */ @@ -45,7 +48,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 256 #define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x50000 +#define RT_VER_NUM 0x50001 #define RT_USING_HW_ATOMIC #define RT_USING_CPU_FFS #define ARCH_ARM @@ -72,15 +75,22 @@ #define FINSH_USING_DESCRIPTION #define FINSH_ARG_MAX 10 +/* DFS: device virtual file system */ + + /* Device Drivers */ #define RT_USING_DEVICE_IPC #define RT_UNAMED_PIPE_NUMBER 64 +#define RT_USING_SYSTEM_WORKQUEUE +#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 +#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 #define RT_USING_SERIAL #define RT_USING_SERIAL_V1 #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN + /* Using USB */ @@ -228,6 +238,7 @@ /* Onboard Peripheral Drivers */ + /* On-chip Peripheral Drivers */ #define BSP_USING_GPIO