Update GCC porting of LPC178x
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@ -9,6 +9,16 @@
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//*** <<< Use Configuration Wizard in Context Menu >>> ***
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*/
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.syntax unified
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.cpu cortex-m3
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.fpu softvfp
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.thumb
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.word _sidata
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.word _sdata
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.word _edata
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.word _sbss
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.word _ebss
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/*
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// <h> Stack Configuration
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@ -16,7 +26,7 @@
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// </h>
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*/
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.equ Stack_Size, 0x00000100
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.equ Stack_Size, 0x00000200
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.section ".stack", "w"
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.align 3
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.globl __cs3_stack_mem
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@ -28,26 +38,6 @@ __cs3_stack_mem:
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.size __cs3_stack_mem, . - __cs3_stack_mem
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.set __cs3_stack_size, . - __cs3_stack_mem
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/*
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// <h> Heap Configuration
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// <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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// </h>
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*/
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.equ Heap_Size, 0x00001000
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.section ".heap", "w"
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.align 3
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.globl __cs3_heap_start
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.globl __cs3_heap_end
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__cs3_heap_start:
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.if Heap_Size
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.space Heap_Size
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.endif
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__cs3_heap_end:
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/* Vector Table */
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.section ".cs3.interrupt_vector"
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@ -56,7 +46,7 @@ __cs3_heap_end:
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__cs3_interrupt_vector_cortex_m:
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.long __cs3_stack /* Top of Stack */
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.long __cs3_reset /* Reset Handler */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long MemManage_Handler /* MPU Fault Handler */
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@ -118,45 +108,49 @@ __cs3_interrupt_vector_cortex_m:
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.size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m
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.thumb
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/* Reset Handler */
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.section .cs3.reset,"x",%progbits
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.thumb_func
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.globl __cs3_reset_cortex_m
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.type __cs3_reset_cortex_m, %function
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__cs3_reset_cortex_m:
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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.fnstart
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#if (RAM_MODE)
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/* Clear .bss section (Zero init) */
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MOV R0, #0
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LDR R1, =__bss_start__
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LDR R2, =__bss_end__
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CMP R1,R2
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BEQ BSSIsEmpty
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LoopZI:
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CMP R1, R2
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BHS BSSIsEmpty
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STR R0, [R1]
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ADD R1, #4
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BLO LoopZI
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BSSIsEmpty:
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LDR R0, =SystemInit
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BLX R0
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LDR R0,=main
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BX R0
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#else
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LDR R0, =SystemInit
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BLX R0
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LDR R0,=_start
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BX R0
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#endif
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/* Copy the data segment initializers from flash to SRAM */
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movs r1, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r3, =_sidata
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ldr r3, [r3, r1]
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str r3, [r0, r1]
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add r1, r1, #4
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LoopCopyDataInit:
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ldr r0, =_sdata
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ldr r3, =_edata
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add r2, r0, r1
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cmp r2, r3
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bcc CopyDataInit
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ldr r2, =_sbss
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b LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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movs r3, #0
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str r3, [r2], #4
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LoopFillZerobss:
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ldr r3, = _ebss
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cmp r2, r3
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bcc FillZerobss
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/* Call the clock system intitialization function.*/
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bl SystemInit
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/* Call the application's entry point.*/
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bl main
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bx lr
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.pool
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.cantunwind
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.fnend
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.size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m
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.size Reset_Handler,.-Reset_Handler
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.section ".text"
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@ -1,133 +0,0 @@
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/*
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* linker script for LPC1788 (512kB Flash, 48kB + 48kB SRAM ) with GNU ld
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* yiyue.fang 2012-04-14
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*/
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/* Program Entry, set to mark it as "used" and avoid gc */
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MEMORY
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{
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CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
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DATA (rw) : ORIGIN = 0x10000000, LENGTH = 0x00010000
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}
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ENTRY(Reset_Handler)
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_system_stack_size = 0x200;
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SECTIONS
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{
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.text :
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{
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. = ALIGN(4);
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KEEP(*(.interrupt_vector)) /* Startup code */
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. = ALIGN(4);
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*(.text) /* remaining code */
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*(.text.*) /* remaining code */
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*(.rodata) /* read-only data (constants) */
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*(.rodata*)
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*(.glue_7)
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*(.glue_7t)
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*(.gnu.linkonce.t*)
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/* section information for finsh shell */
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. = ALIGN(4);
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__fsymtab_start = .;
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KEEP(*(FSymTab))
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__fsymtab_end = .;
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. = ALIGN(4);
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__vsymtab_start = .;
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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. = ALIGN(4);
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. = ALIGN(4);
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_etext = .;
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} > CODE = 0
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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/* This is used by the startup in order to initialize the .data secion */
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_sidata = .;
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} > CODE
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__exidx_end = .;
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/* .data section which is used for initialized data */
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.data : AT (_sidata)
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{
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .data secion */
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_sdata = . ;
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d*)
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .data secion */
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_edata = . ;
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} >DATA
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.stack :
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{
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. = . + _system_stack_size;
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. = ALIGN(4);
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_estack = .;
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} >DATA
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__bss_start = .;
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.bss :
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{
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .;
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*(.bss)
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*(.bss.*)
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*(COMMON)
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .bss secion */
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_ebss = . ;
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*(.bss.init)
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} > DATA
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__bss_end = .;
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_end = .;
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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* Symbols in the DWARF debugging sections are relative to the beginning
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* of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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}
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@ -1,15 +0,0 @@
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; *************************************************************
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; *** Scatter-Loading Description File generated by uVision ***
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; *************************************************************
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LR_IROM1 0x00000000 0x00080000 { ; load region size_region
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ER_IROM1 0x00000000 0x00080000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_IRAM1 0x10000000 0x00010000 { ; RW data
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.ANY (+RW +ZI)
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}
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}
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