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[libcpu/aarch64]修改atomic实现

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zhangyan 2024-09-04 06:14:06 +08:00 committed by GitHub
parent 635e16a8d5
commit a4882e1d40
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1 changed files with 8 additions and 4 deletions
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12
libcpu/aarch64/common/atomic_aarch64.c
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@ -90,7 +90,6 @@ rt_atomic_t rt_hw_atomic_flag_test_and_set(volatile rt_atomic_t *ptr)
rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_atomic_t *old, rt_atomic_t new) rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_atomic_t *old, rt_atomic_t new)
{ {
rt_atomic_t tmp, oldval; rt_atomic_t tmp, oldval;
__asm__ volatile ( __asm__ volatile (
" prfm pstl1strm, %2\n" " prfm pstl1strm, %2\n"
"1: ldxr %0, %2\n" "1: ldxr %0, %2\n"
@ -99,10 +98,15 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_a
" stlxr %w1, %4, %2\n" " stlxr %w1, %4, %2\n"
" cbnz %w1, 1b\n" " cbnz %w1, 1b\n"
" dmb ish\n" " dmb ish\n"
"2:" " mov %w1, #1\n"
" b 3f\n"
"2: str %0, [%5]\n"
" mov %w1, #0\n"
"3:"
: "=&r" (oldval), "=&r" (tmp), "+Q" (*ptr) : "=&r" (oldval), "=&r" (tmp), "+Q" (*ptr)
: "Kr" (*old), "r" (new) : "Kr" (*old), "r" (new), "r" (old)
: "memory"); : "memory");
return oldval == *old; return tmp;
} }