[N9H30/NUC980] Update SDH driver
1. Fix SDH_Set_clock function. 2. Correct EMMC, SDH0 and SDH1 options for N9H30.
This commit is contained in:
Wayne Lin
parent
541426a72a
commit
a45417b868
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@ -724,7 +724,7 @@ extern SDH_INFO_T SD0, SD1;
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* 0: Card removed.
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* \hideinitializer
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*/
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#define SDH_IS_CARD_PRESENT(sdh) (((sdh) == SDH0)? SD0.IsCardInsert : SD1.IsCardInsert)
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//#define SDH_IS_CARD_PRESENT(sdh) (((sdh) == SDH0)? SD0.IsCardInsert : SD1.IsCardInsert)
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/**
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* @brief Get SD Card capacity.
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@ -734,17 +734,17 @@ extern SDH_INFO_T SD0, SD1;
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* @return SD Card capacity. (unit: KByte)
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* \hideinitializer
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*/
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#define SDH_GET_CARD_CAPACITY(sdh) (((sdh) == SDH0)? SD0.diskSize : SD1.diskSize)
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//#define SDH_GET_CARD_CAPACITY(sdh) (((sdh) == SDH0)? SD0.diskSize : SD1.diskSize)
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void SDH_Open(SDH_T *sdh, uint32_t u32CardDetSrc);
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uint32_t SDH_Probe(SDH_T *sdh);
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uint32_t SDH_Read(SDH_T *sdh, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount);
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uint32_t SDH_Write(SDH_T *sdh, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount);
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void SDH_Open(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t u32CardDetSrc);
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uint32_t SDH_Probe(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t card_num);
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uint32_t SDH_Read(SDH_T *sdh, SDH_INFO_T *pSD, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount);
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uint32_t SDH_Write(SDH_T *sdh, SDH_INFO_T *pSD, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount);
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uint32_t SDH_CardDetection(SDH_T *sdh);
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void SDH_Open_Disk(SDH_T *sdh, uint32_t u32CardDetSrc);
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void SDH_Close_Disk(SDH_T *sdh);
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uint32_t SDH_CardDetection(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t card_num);
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void SDH_Open_Disk(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t u32CardDetSrc);
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void SDH_Close_Disk(SDH_T *sdh, SDH_INFO_T *pSD);
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/*@}*/ /* end of group N9H30_SDH_EXPORTED_FUNCTIONS */
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@ -43,8 +43,6 @@
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static uint8_t _SDH1_ucSDHCBuffer[512] __attribute__((aligned(32)));
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#endif
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SDH_INFO_T SD0, SD1;
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void SDH_CheckRB(SDH_T *sdh)
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{
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while (1)
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@ -61,19 +59,9 @@ void SDH_CheckRB(SDH_T *sdh)
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}
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uint32_t SDH_SDCommand(SDH_T *sdh, uint32_t ucCmd, uint32_t uArg)
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uint32_t SDH_SDCommand(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t ucCmd, uint32_t uArg)
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{
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volatile uint32_t buf, val = 0ul;
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SDH_INFO_T *pSD;
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if (sdh == SDH0)
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{
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pSD = &SD0;
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}
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else
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{
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pSD = &SD1;
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}
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sdh->CMDARG = uArg;
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buf = (sdh->CTL & (~SDH_CTL_CMDCODE_Msk)) | (ucCmd << 8ul) | (SDH_CTL_COEN_Msk);
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@ -90,19 +78,9 @@ uint32_t SDH_SDCommand(SDH_T *sdh, uint32_t ucCmd, uint32_t uArg)
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}
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uint32_t SDH_SDCmdAndRsp(SDH_T *sdh, uint32_t ucCmd, uint32_t uArg, uint32_t ntickCount)
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uint32_t SDH_SDCmdAndRsp(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t ucCmd, uint32_t uArg, uint32_t ntickCount)
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{
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volatile uint32_t buf;
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SDH_INFO_T *pSD;
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if (sdh == SDH0)
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{
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pSD = &SD0;
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}
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else
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{
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pSD = &SD1;
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}
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sdh->CMDARG = uArg;
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buf = (sdh->CTL & (~SDH_CTL_CMDCODE_Msk)) | (ucCmd << 8ul) | (SDH_CTL_COEN_Msk | SDH_CTL_RIEN_Msk);
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@ -180,20 +158,10 @@ uint32_t SDH_Swap32(uint32_t val)
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}
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/* Get 16 bytes CID or CSD */
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uint32_t SDH_SDCmdAndRsp2(SDH_T *sdh, uint32_t ucCmd, uint32_t uArg, uint32_t puR2ptr[])
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uint32_t SDH_SDCmdAndRsp2(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t ucCmd, uint32_t uArg, uint32_t puR2ptr[])
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{
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uint32_t i, buf;
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uint32_t tmpBuf[5];
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SDH_INFO_T *pSD;
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if (sdh == SDH0)
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{
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pSD = &SD0;
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}
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else
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{
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pSD = &SD1;
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}
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sdh->CMDARG = uArg;
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buf = (sdh->CTL & (~SDH_CTL_CMDCODE_Msk)) | (ucCmd << 8) | (SDH_CTL_COEN_Msk | SDH_CTL_R2EN_Msk);
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@ -226,19 +194,9 @@ uint32_t SDH_SDCmdAndRsp2(SDH_T *sdh, uint32_t ucCmd, uint32_t uArg, uint32_t pu
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}
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uint32_t SDH_SDCmdAndRspDataIn(SDH_T *sdh, uint32_t ucCmd, uint32_t uArg)
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uint32_t SDH_SDCmdAndRspDataIn(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t ucCmd, uint32_t uArg)
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{
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volatile uint32_t buf;
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SDH_INFO_T *pSD;
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if (sdh == SDH0)
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{
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pSD = &SD0;
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}
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else
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{
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pSD = &SD1;
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}
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sdh->CMDARG = uArg;
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buf = (sdh->CTL & (~SDH_CTL_CMDCODE_Msk)) | (ucCmd << 8ul) |
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@ -279,62 +237,54 @@ uint32_t SDH_SDCmdAndRspDataIn(SDH_T *sdh, uint32_t ucCmd, uint32_t uArg)
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/* there are 8 bits for divider0, maximum is 256 */
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#define SDH_CLK_DIV0_MAX 256ul
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void SDH_Set_clock(SDH_T *sdh, uint32_t sd_clock_khz)
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{
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UINT32 div;
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UINT32 reg;
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uint32_t SDH_ReferenceClock;
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if (sd_clock_khz <= 2000)
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{
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SDH_ReferenceClock = 12000;
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if (sdh == SDH0)
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{
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outpw(REG_CLK_DIVCTL9, (inpw(REG_CLK_DIVCTL9) & ~0x18) | (0x0 << 3)); // SD clock from XIN [4:3]
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}
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else
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{
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//fixme outpw(REG_CLK_DIVCTL9, (inpw(REG_CLK_DIVCTL9) & ~0x18) | (0x0 << 3)); // SD clock from XIN [4:3]
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}
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}
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if (sdh == SDH0)
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reg = REG_CLK_DIVCTL3;
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else
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{
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SDH_ReferenceClock = 300000;
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if (sdh == SDH0)
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{
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outpw(REG_CLK_DIVCTL9, (inpw(REG_CLK_DIVCTL9) & ~0x18) | (0x3 << 3)); // SD clock from UPLL [4:3]
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}
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else
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{
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//fixme outpw(REG_CLK_DIVCTL9, (inpw(REG_CLK_DIVCTL9) & ~0x18) | (0x3 << 3)); // SD clock from UPLL [4:3]
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}
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}
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div = (SDH_ReferenceClock / sd_clock_khz) - 1;
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reg = REG_CLK_DIVCTL9;
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if (div >= SDH_CLK_DIV0_MAX)
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if(sd_clock_khz<=2000)
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{
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div = 0xff;
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SDH_ReferenceClock=12000;
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outpw(reg, (inpw(reg) & ~0x18) | (0x0 << 3)); // SD clock from XIN [4:3]
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}else{
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SDH_ReferenceClock = 300000;
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outpw(reg, (inpw(reg) & ~0x18) | (0x3 << 3)); // SD clock from UPLL [4:3]
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}
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outpw(REG_CLK_DIVCTL9, (inpw(REG_CLK_DIVCTL9) & ~0xff00) | ((div) << 8)); // SD clock divided by CLKDIV3[SD_N] [15:8]
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div=(SDH_ReferenceClock/sd_clock_khz)-1;
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if(div>=SDH_CLK_DIV0_MAX) div=0xff;
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outpw(reg, (inpw(reg) & ~0xff00) | ((div) << 8)); // SD clock divided by CLKDIV3[SD_N] [15:8]
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}
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uint32_t SDH_CardDetection(SDH_T *sdh)
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uint32_t SDH_CardDetection(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t card_num)
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{
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uint32_t i, val = TRUE;
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SDH_INFO_T *pSD;
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uint32_t u32INTEN_CDSRC_Msk;
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uint32_t u32INTSTS_CDSTS_Msk;
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uint32_t u32CTL_CLKKEEP_Msk;
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if (sdh == SDH0)
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if ( card_num == SD_PORT1 )
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{
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pSD = &SD0;
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u32INTEN_CDSRC_Msk = SDH_INTEN_CDSRC1_Msk;
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u32INTSTS_CDSTS_Msk = SDH_INTSTS_CDSTS1_Msk;
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u32CTL_CLKKEEP_Msk = SDH_CTL_CLKKEEP1_Msk;
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}
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else
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{
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pSD = &SD1;
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u32INTEN_CDSRC_Msk = SDH_INTEN_CDSRC_Msk;
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u32INTSTS_CDSTS_Msk = SDH_INTSTS_CDSTS_Msk;
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u32CTL_CLKKEEP_Msk = SDH_CTL_CLKKEEP_Msk;
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}
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if ((sdh->INTEN & SDH_INTEN_CDSRC_Msk) == SDH_INTEN_CDSRC_Msk) /* Card detect pin from GPIO */
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if ((sdh->INTEN & u32INTEN_CDSRC_Msk) == u32INTEN_CDSRC_Msk) /* Card detect pin from GPIO */
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{
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if ((sdh->INTSTS & SDH_INTSTS_CDSTS_Msk) == SDH_INTSTS_CDSTS_Msk) /* Card remove */
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if ((sdh->INTSTS & u32INTSTS_CDSTS_Msk) == u32INTSTS_CDSTS_Msk) /* Card remove */
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{
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pSD->IsCardInsert = (uint8_t)FALSE;
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val = FALSE;
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@ -343,15 +293,16 @@ uint32_t SDH_CardDetection(SDH_T *sdh)
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{
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pSD->IsCardInsert = (uint8_t)TRUE;
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}
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}
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else if ((sdh->INTEN & SDH_INTEN_CDSRC_Msk) != SDH_INTEN_CDSRC_Msk)
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else if ((sdh->INTEN & u32INTEN_CDSRC_Msk) != u32INTEN_CDSRC_Msk)
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{
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sdh->CTL |= SDH_CTL_CLKKEEP_Msk;
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sdh->CTL |= u32CTL_CLKKEEP_Msk;
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for (i = 0ul; i < 5000ul; i++)
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{
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}
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if ((sdh->INTSTS & SDH_INTSTS_CDSTS_Msk) == SDH_INTSTS_CDSTS_Msk) /* Card insert */
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if ((sdh->INTSTS & u32INTSTS_CDSTS_Msk) == u32INTSTS_CDSTS_Msk) /* Card insert */
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{
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pSD->IsCardInsert = (uint8_t)TRUE;
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}
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@ -361,28 +312,18 @@ uint32_t SDH_CardDetection(SDH_T *sdh)
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val = FALSE;
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}
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sdh->CTL &= ~SDH_CTL_CLKKEEP_Msk;
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sdh->CTL &= ~u32CTL_CLKKEEP_Msk;
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}
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return val;
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}
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uint32_t SDH_Init(SDH_T *sdh)
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uint32_t SDH_Init(SDH_T *sdh, SDH_INFO_T *pSD)
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{
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uint32_t volatile i, status;
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uint32_t resp;
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uint32_t CIDBuffer[4];
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uint32_t volatile u32CmdTimeOut;
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SDH_INFO_T *pSD;
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if (sdh == SDH0)
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{
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pSD = &SD0;
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}
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else
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{
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pSD = &SD1;
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}
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/* set the clock to 300KHz */
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SDH_Set_clock(sdh, 300ul);
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@ -398,7 +339,7 @@ uint32_t SDH_Init(SDH_T *sdh)
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}
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}
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SDH_SDCommand(sdh, 0ul, 0ul); /* reset all cards */
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SDH_SDCommand(sdh, pSD, 0ul, 0ul); /* reset all cards */
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for (i = 0x1000ul; i > 0ul; i--)
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{
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}
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@ -407,20 +348,20 @@ uint32_t SDH_Init(SDH_T *sdh)
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pSD->R7Flag = 1ul;
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u32CmdTimeOut = 0xFFFFFul;
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i = SDH_SDCmdAndRsp(sdh, 8ul, 0x00000155ul, u32CmdTimeOut);
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i = SDH_SDCmdAndRsp(sdh, pSD, 8ul, 0x00000155ul, u32CmdTimeOut);
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if (i == Successful)
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{
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/* SD 2.0 */
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SDH_SDCmdAndRsp(sdh, 55ul, 0x00ul, u32CmdTimeOut);
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SDH_SDCmdAndRsp(sdh, pSD, 55ul, 0x00ul, u32CmdTimeOut);
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pSD->R3Flag = 1ul;
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SDH_SDCmdAndRsp(sdh, 41ul, 0x40ff8000ul, u32CmdTimeOut); /* 2.7v-3.6v */
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SDH_SDCmdAndRsp(sdh, pSD, 41ul, 0x40ff8000ul, u32CmdTimeOut); /* 2.7v-3.6v */
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resp = sdh->RESP0;
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while ((resp & 0x00800000ul) != 0x00800000ul) /* check if card is ready */
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{
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SDH_SDCmdAndRsp(sdh, 55ul, 0x00ul, u32CmdTimeOut);
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SDH_SDCmdAndRsp(sdh, pSD, 55ul, 0x00ul, u32CmdTimeOut);
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pSD->R3Flag = 1ul;
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SDH_SDCmdAndRsp(sdh, 41ul, 0x40ff8000ul, u32CmdTimeOut); /* 3.0v-3.4v */
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SDH_SDCmdAndRsp(sdh, pSD, 41ul, 0x40ff8000ul, u32CmdTimeOut); /* 3.0v-3.4v */
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resp = sdh->RESP0;
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}
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if ((resp & 0x00400000ul) == 0x00400000ul)
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@ -435,23 +376,23 @@ uint32_t SDH_Init(SDH_T *sdh)
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else
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{
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/* SD 1.1 */
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SDH_SDCommand(sdh, 0ul, 0ul); /* reset all cards */
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SDH_SDCommand(sdh, pSD, 0ul, 0ul); /* reset all cards */
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for (i = 0x100ul; i > 0ul; i--)
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{
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}
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i = SDH_SDCmdAndRsp(sdh, 55ul, 0x00ul, u32CmdTimeOut);
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i = SDH_SDCmdAndRsp(sdh, pSD, 55ul, 0x00ul, u32CmdTimeOut);
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if (i == 2ul) /* MMC memory */
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{
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SDH_SDCommand(sdh, 0ul, 0ul); /* reset */
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SDH_SDCommand(sdh, pSD, 0ul, 0ul); /* reset */
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for (i = 0x100ul; i > 0ul; i--)
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{
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}
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pSD->R3Flag = 1ul;
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if (SDH_SDCmdAndRsp(sdh, 1ul, 0x40ff8000ul, u32CmdTimeOut) != 2ul) /* eMMC memory */
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if (SDH_SDCmdAndRsp(sdh, pSD, 1ul, 0x40ff8000ul, u32CmdTimeOut) != 2ul) /* eMMC memory */
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{
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resp = sdh->RESP0;
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while ((resp & 0x00800000ul) != 0x00800000ul)
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@ -459,7 +400,7 @@ uint32_t SDH_Init(SDH_T *sdh)
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/* check if card is ready */
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pSD->R3Flag = 1ul;
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SDH_SDCmdAndRsp(sdh, 1ul, 0x40ff8000ul, u32CmdTimeOut); /* high voltage */
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SDH_SDCmdAndRsp(sdh, pSD, 1ul, 0x40ff8000ul, u32CmdTimeOut); /* high voltage */
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resp = sdh->RESP0;
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}
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@ -481,13 +422,13 @@ uint32_t SDH_Init(SDH_T *sdh)
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else if (i == 0ul) /* SD Memory */
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{
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pSD->R3Flag = 1ul;
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SDH_SDCmdAndRsp(sdh, 41ul, 0x00ff8000ul, u32CmdTimeOut); /* 3.0v-3.4v */
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SDH_SDCmdAndRsp(sdh, pSD, 41ul, 0x00ff8000ul, u32CmdTimeOut); /* 3.0v-3.4v */
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resp = sdh->RESP0;
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while ((resp & 0x00800000ul) != 0x00800000ul) /* check if card is ready */
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{
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SDH_SDCmdAndRsp(sdh, 55ul, 0x00ul, u32CmdTimeOut);
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SDH_SDCmdAndRsp(sdh, pSD, 55ul, 0x00ul, u32CmdTimeOut);
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pSD->R3Flag = 1ul;
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SDH_SDCmdAndRsp(sdh, 41ul, 0x00ff8000ul, u32CmdTimeOut); /* 3.0v-3.4v */
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SDH_SDCmdAndRsp(sdh, pSD, 41ul, 0x00ff8000ul, u32CmdTimeOut); /* 3.0v-3.4v */
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resp = sdh->RESP0;
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}
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pSD->CardType = SDH_TYPE_SD_LOW;
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@ -501,10 +442,10 @@ uint32_t SDH_Init(SDH_T *sdh)
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if (pSD->CardType != SDH_TYPE_UNKNOWN)
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{
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SDH_SDCmdAndRsp2(sdh, 2ul, 0x00ul, CIDBuffer);
|
||||
SDH_SDCmdAndRsp2(sdh, pSD, 2ul, 0x00ul, CIDBuffer);
|
||||
if ((pSD->CardType == SDH_TYPE_MMC) || (pSD->CardType == SDH_TYPE_EMMC))
|
||||
{
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 3ul, 0x10000ul, 0ul)) != Successful) /* set RCA */
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 3ul, 0x10000ul, 0ul)) != Successful) /* set RCA */
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
|
@ -512,7 +453,7 @@ uint32_t SDH_Init(SDH_T *sdh)
|
|||
}
|
||||
else
|
||||
{
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 3ul, 0x00ul, 0ul)) != Successful) /* get RCA */
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 3ul, 0x00ul, 0ul)) != Successful) /* get RCA */
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
|
@ -534,7 +475,7 @@ uint32_t SDH_SwitchToHighSpeed(SDH_T *sdh, SDH_INFO_T *pSD)
|
|||
sdh->DMASA = (uint32_t)pSD->dmabuf;
|
||||
sdh->BLEN = 63ul;
|
||||
|
||||
if ((status = SDH_SDCmdAndRspDataIn(sdh, 6ul, 0x00ffff01ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRspDataIn(sdh, pSD, 6ul, 0x00ffff01ul)) != Successful)
|
||||
{
|
||||
return Fail;
|
||||
}
|
||||
|
|
@ -554,7 +495,7 @@ uint32_t SDH_SwitchToHighSpeed(SDH_T *sdh, SDH_INFO_T *pSD)
|
|||
sdh->DMASA = (uint32_t)pSD->dmabuf;
|
||||
sdh->BLEN = 63ul; /* 512 bit */
|
||||
|
||||
if ((status = SDH_SDCmdAndRspDataIn(sdh, 6ul, 0x80ffff01ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRspDataIn(sdh, pSD, 6ul, 0x80ffff01ul)) != Successful)
|
||||
{
|
||||
return Fail;
|
||||
}
|
||||
|
|
@ -581,22 +522,12 @@ uint32_t SDH_SwitchToHighSpeed(SDH_T *sdh, SDH_INFO_T *pSD)
|
|||
}
|
||||
|
||||
|
||||
uint32_t SDH_SelectCardType(SDH_T *sdh)
|
||||
uint32_t SDH_SelectCardType(SDH_T *sdh, SDH_INFO_T *pSD)
|
||||
{
|
||||
uint32_t volatile status = 0ul;
|
||||
uint32_t param;
|
||||
SDH_INFO_T *pSD;
|
||||
|
||||
if (sdh == SDH0)
|
||||
{
|
||||
pSD = &SD0;
|
||||
}
|
||||
else
|
||||
{
|
||||
pSD = &SD1;
|
||||
}
|
||||
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 7ul, pSD->RCA, 0ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 7ul, pSD->RCA, 0ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
|
@ -611,11 +542,11 @@ uint32_t SDH_SelectCardType(SDH_T *sdh)
|
|||
sdh->DMACTL |= SDH_DMACTL_DMARST_Msk;
|
||||
while ((sdh->DMACTL & SDH_DMACTL_DMARST_Msk) == 0x2);
|
||||
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 55ul, pSD->RCA, 0ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 55ul, pSD->RCA, 0ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
if ((status = SDH_SDCmdAndRspDataIn(sdh, 51ul, 0x00ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRspDataIn(sdh, pSD, 51ul, 0x00ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
|
@ -630,11 +561,11 @@ uint32_t SDH_SelectCardType(SDH_T *sdh)
|
|||
}
|
||||
}
|
||||
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 55ul, pSD->RCA, 0ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 55ul, pSD->RCA, 0ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 6ul, 0x02ul, 0ul)) != Successful) /* set bus width */
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 6ul, 0x02ul, 0ul)) != Successful) /* set bus width */
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
|
@ -646,22 +577,22 @@ uint32_t SDH_SelectCardType(SDH_T *sdh)
|
|||
sdh->DMASA = (uint32_t)pSD->dmabuf;;
|
||||
sdh->BLEN = 0x07ul;
|
||||
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 55ul, pSD->RCA, 0ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 55ul, pSD->RCA, 0ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
if ((status = SDH_SDCmdAndRspDataIn(sdh, 51ul, 0x00ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRspDataIn(sdh, pSD, 51ul, 0x00ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
/* set data bus width. ACMD6 for SD card, SDCR_DBW for host. */
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 55ul, pSD->RCA, 0ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 55ul, pSD->RCA, 0ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 6ul, 0x02ul, 0ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 6ul, 0x02ul, 0ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
|
@ -679,7 +610,7 @@ uint32_t SDH_SelectCardType(SDH_T *sdh)
|
|||
/*--- sent CMD6 to MMC card to set bus width to 4 bits mode */
|
||||
/* set CMD6 argument Access field to 3, Index to 183, Value to 1 (4-bit mode) */
|
||||
param = (3ul << 24) | (183ul << 16) | (1ul << 8);
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 6ul, param, 0ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 6ul, param, 0ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
|
@ -689,13 +620,13 @@ uint32_t SDH_SelectCardType(SDH_T *sdh)
|
|||
|
||||
}
|
||||
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 16ul, SDH_BLOCK_SIZE, 0ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 16ul, SDH_BLOCK_SIZE, 0ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
sdh->BLEN = SDH_BLOCK_SIZE - 1ul;
|
||||
|
||||
SDH_SDCommand(sdh, 7ul, 0ul);
|
||||
SDH_SDCommand(sdh, pSD, 7ul, 0ul);
|
||||
sdh->CTL |= SDH_CTL_CLK8OEN_Msk;
|
||||
while ((sdh->CTL & SDH_CTL_CLK8OEN_Msk) == SDH_CTL_CLK8OEN_Msk)
|
||||
{
|
||||
|
|
@ -706,23 +637,13 @@ uint32_t SDH_SelectCardType(SDH_T *sdh)
|
|||
return Successful;
|
||||
}
|
||||
|
||||
void SDH_Get_SD_info(SDH_T *sdh)
|
||||
void SDH_Get_SD_info(SDH_T *sdh, SDH_INFO_T *pSD)
|
||||
{
|
||||
unsigned int R_LEN, C_Size, MULT, size;
|
||||
uint32_t Buffer[4];
|
||||
//unsigned char *ptr;
|
||||
SDH_INFO_T *pSD;
|
||||
|
||||
if (sdh == SDH0)
|
||||
{
|
||||
pSD = &SD0;
|
||||
}
|
||||
else
|
||||
{
|
||||
pSD = &SD1;
|
||||
}
|
||||
|
||||
SDH_SDCmdAndRsp2(sdh, 9ul, pSD->RCA, Buffer);
|
||||
SDH_SDCmdAndRsp2(sdh, pSD, 9ul, pSD->RCA, Buffer);
|
||||
|
||||
if ((pSD->CardType == SDH_TYPE_MMC) || (pSD->CardType == SDH_TYPE_EMMC))
|
||||
{
|
||||
|
|
@ -731,15 +652,15 @@ void SDH_Get_SD_info(SDH_T *sdh)
|
|||
{
|
||||
/* CSD_STRUCTURE [127:126] is 3 */
|
||||
/* CSD version depend on EXT_CSD register in eMMC v4.4 for card size > 2GB */
|
||||
SDH_SDCmdAndRsp(sdh, 7ul, pSD->RCA, 0ul);
|
||||
SDH_SDCmdAndRsp(sdh, pSD, 7ul, pSD->RCA, 0ul);
|
||||
|
||||
//ptr = (uint8_t *)((uint32_t)_SDH_ucSDHCBuffer );
|
||||
sdh->DMASA = (uint32_t)pSD->dmabuf;;
|
||||
sdh->BLEN = 511ul; /* read 512 bytes for EXT_CSD */
|
||||
|
||||
if (SDH_SDCmdAndRspDataIn(sdh, 8ul, 0x00ul) == Successful)
|
||||
if (SDH_SDCmdAndRspDataIn(sdh, pSD, 8ul, 0x00ul) == Successful)
|
||||
{
|
||||
SDH_SDCommand(sdh, 7ul, 0ul);
|
||||
SDH_SDCommand(sdh, pSD, 7ul, 0ul);
|
||||
sdh->CTL |= SDH_CTL_CLK8OEN_Msk;
|
||||
while ((sdh->CTL & SDH_CTL_CLK8OEN_Msk) == SDH_CTL_CLK8OEN_Msk)
|
||||
{
|
||||
|
|
@ -800,48 +721,70 @@ void SDH_Get_SD_info(SDH_T *sdh)
|
|||
*
|
||||
* @return None
|
||||
*/
|
||||
void SDH_Open(SDH_T *sdh, uint32_t u32CardDetSrc)
|
||||
void SDH_Open(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t u32CardDetSrc)
|
||||
{
|
||||
volatile int i;
|
||||
|
||||
uint32_t u32INTEN_CDSRC_Msk=0;
|
||||
uint32_t u32INTSTS_CDIF_Msk=0;
|
||||
uint32_t u32INTEN_CDIEN_Msk=0;
|
||||
|
||||
if ( u32CardDetSrc & SD_PORT0 )
|
||||
{
|
||||
u32INTEN_CDSRC_Msk = SDH_INTEN_CDSRC_Msk;
|
||||
u32INTSTS_CDIF_Msk = SDH_INTSTS_CDIF_Msk;
|
||||
u32INTEN_CDIEN_Msk = SDH_INTEN_CDIEN_Msk;
|
||||
}
|
||||
else if ( u32CardDetSrc & SD_PORT1 )
|
||||
{
|
||||
u32INTEN_CDSRC_Msk = SDH_INTEN_CDSRC1_Msk;
|
||||
u32INTSTS_CDIF_Msk = SDH_INTSTS_CDIF1_Msk;
|
||||
u32INTEN_CDIEN_Msk = SDH_INTEN_CDIEN1_Msk;
|
||||
}
|
||||
|
||||
// enable DMAC
|
||||
sdh->DMACTL = SDH_DMACTL_DMARST_Msk;
|
||||
while ((sdh->DMACTL & SDH_DMACTL_DMARST_Msk) == SDH_DMACTL_DMARST_Msk)
|
||||
{
|
||||
}
|
||||
|
||||
sdh->DMACTL = SDH_DMACTL_DMAEN_Msk;
|
||||
|
||||
//Reset Global
|
||||
sdh->GCTL = SDH_GCTL_GCTLRST_Msk | SDH_GCTL_SDEN_Msk;
|
||||
while ((sdh->GCTL & SDH_GCTL_GCTLRST_Msk) == SDH_GCTL_GCTLRST_Msk)
|
||||
{
|
||||
}
|
||||
|
||||
memset(pSD, 0, sizeof(SDH_INFO_T));
|
||||
if (sdh == SDH0)
|
||||
{
|
||||
memset(&SD0, 0, sizeof(SDH_INFO_T));
|
||||
SD0.dmabuf = (unsigned char *)((uint32_t)_SDH0_ucSDHCBuffer | 0x80000000);
|
||||
pSD->dmabuf = (unsigned char *)((uint32_t)_SDH0_ucSDHCBuffer | 0x80000000);
|
||||
pSD->IsCardInsert = 1;
|
||||
}
|
||||
else if (sdh == SDH1)
|
||||
{
|
||||
memset(&SD1, 0, sizeof(SDH_INFO_T));
|
||||
SD1.dmabuf = (unsigned char *)((uint32_t)_SDH1_ucSDHCBuffer | 0x80000000);
|
||||
pSD->dmabuf = (unsigned char *)((uint32_t)_SDH1_ucSDHCBuffer | 0x80000000);
|
||||
}
|
||||
else
|
||||
{
|
||||
}
|
||||
|
||||
// enable SD
|
||||
sdh->GCTL = SDH_GCTL_SDEN_Msk;
|
||||
|
||||
if ((u32CardDetSrc & CardDetect_From_DAT3) == CardDetect_From_DAT3)
|
||||
{
|
||||
sdh->INTEN &= ~SDH_INTEN_CDSRC_Msk;
|
||||
sdh->INTEN &= ~u32INTEN_CDSRC_Msk;
|
||||
}
|
||||
else
|
||||
{
|
||||
sdh->INTEN |= SDH_INTEN_CDSRC_Msk;
|
||||
sdh->INTEN |= u32INTEN_CDSRC_Msk;
|
||||
}
|
||||
|
||||
for (i = 0; i < 0x100; i++);
|
||||
sdh->INTSTS = SDH_INTSTS_CDIF_Msk;
|
||||
sdh->INTEN |= SDH_INTEN_CDIEN_Msk;
|
||||
|
||||
sdh->INTSTS = u32INTSTS_CDIF_Msk;
|
||||
sdh->INTEN |= u32INTEN_CDIEN_Msk;
|
||||
|
||||
sdh->CTL |= SDH_CTL_CTLRST_Msk;
|
||||
while ((sdh->CTL & SDH_CTL_CTLRST_Msk) == SDH_CTL_CTLRST_Msk)
|
||||
|
|
@ -860,29 +803,34 @@ void SDH_Open(SDH_T *sdh, uint32_t u32CardDetSrc)
|
|||
* SD initial state needs 400KHz clock output, driver will use HIRC for SD initial clock source.
|
||||
* And then switch back to the user's setting.
|
||||
*/
|
||||
uint32_t SDH_Probe(SDH_T *sdh)
|
||||
uint32_t SDH_Probe(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t card_num)
|
||||
{
|
||||
uint32_t val;
|
||||
|
||||
// Disable SD host interrupt
|
||||
sdh->GINTEN = 0ul;
|
||||
|
||||
sdh->CTL &= ~SDH_CTL_SDNWR_Msk;
|
||||
sdh->CTL |= 0x09ul << SDH_CTL_SDNWR_Pos; /* set SDNWR = 9 */
|
||||
sdh->CTL &= ~SDH_CTL_BLKCNT_Msk;
|
||||
sdh->CTL |= 0x01ul << SDH_CTL_BLKCNT_Pos; /* set BLKCNT = 1 */
|
||||
sdh->CTL &= ~SDH_CTL_DBW_Msk; /* SD 1-bit data bus */
|
||||
|
||||
if (!(SDH_CardDetection(sdh)))
|
||||
{
|
||||
return SDH_NO_SD_CARD;
|
||||
}
|
||||
if ( sdh != SDH0 ) //EMMC
|
||||
{
|
||||
if (!(SDH_CardDetection(sdh, pSD, card_num)))
|
||||
{
|
||||
return SDH_NO_SD_CARD;
|
||||
}
|
||||
}
|
||||
|
||||
if ((val = SDH_Init(sdh)) != 0ul)
|
||||
if ((val = SDH_Init(sdh, pSD)) != 0ul)
|
||||
{
|
||||
return val;
|
||||
}
|
||||
|
||||
/* divider */
|
||||
if ((SD0.CardType == SDH_TYPE_MMC) || (SD1.CardType == SDH_TYPE_MMC))
|
||||
if ( pSD->CardType == SDH_TYPE_MMC )
|
||||
{
|
||||
SDH_Set_clock(sdh, MMC_FREQ);
|
||||
}
|
||||
|
|
@ -890,9 +838,9 @@ uint32_t SDH_Probe(SDH_T *sdh)
|
|||
{
|
||||
SDH_Set_clock(sdh, SD_FREQ);
|
||||
}
|
||||
SDH_Get_SD_info(sdh);
|
||||
SDH_Get_SD_info(sdh, pSD);
|
||||
|
||||
if ((val = SDH_SelectCardType(sdh)) != 0ul)
|
||||
if ((val = SDH_SelectCardType(sdh, pSD)) != 0ul)
|
||||
{
|
||||
return val;
|
||||
}
|
||||
|
|
@ -910,29 +858,19 @@ uint32_t SDH_Probe(SDH_T *sdh)
|
|||
*
|
||||
* @return None
|
||||
*/
|
||||
uint32_t SDH_Read(SDH_T *sdh, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount)
|
||||
uint32_t SDH_Read(SDH_T *sdh, SDH_INFO_T *pSD, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount)
|
||||
{
|
||||
uint32_t volatile bIsSendCmd = FALSE, buf;
|
||||
uint32_t volatile reg;
|
||||
uint32_t volatile i, loop, status;
|
||||
uint32_t blksize = SDH_BLOCK_SIZE;
|
||||
|
||||
SDH_INFO_T *pSD;
|
||||
if (sdh == SDH0)
|
||||
{
|
||||
pSD = &SD0;
|
||||
}
|
||||
else
|
||||
{
|
||||
pSD = &SD1;
|
||||
}
|
||||
|
||||
if (u32SecCount == 0ul)
|
||||
{
|
||||
return SDH_SELECT_ERROR;
|
||||
}
|
||||
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 7ul, pSD->RCA, 0ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 7ul, pSD->RCA, 0ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
|
@ -1027,13 +965,13 @@ uint32_t SDH_Read(SDH_T *sdh, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_
|
|||
}
|
||||
}
|
||||
|
||||
if (SDH_SDCmdAndRsp(sdh, 12ul, 0ul, 0ul)) /* stop command */
|
||||
if (SDH_SDCmdAndRsp(sdh, pSD, 12ul, 0ul, 0ul)) /* stop command */
|
||||
{
|
||||
return SDH_CRC7_ERROR;
|
||||
}
|
||||
SDH_CheckRB(sdh);
|
||||
|
||||
SDH_SDCommand(sdh, 7ul, 0ul);
|
||||
SDH_SDCommand(sdh, pSD, 7ul, 0ul);
|
||||
sdh->CTL |= SDH_CTL_CLK8OEN_Msk;
|
||||
while ((sdh->CTL & SDH_CTL_CLK8OEN_Msk) == SDH_CTL_CLK8OEN_Msk)
|
||||
{
|
||||
|
|
@ -1057,29 +995,18 @@ uint32_t SDH_Read(SDH_T *sdh, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_
|
|||
* \ref SDH_CRC7_ERROR : CRC7 error happen. \n
|
||||
* \ref Successful : Write data to SD card success.
|
||||
*/
|
||||
uint32_t SDH_Write(SDH_T *sdh, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount)
|
||||
uint32_t SDH_Write(SDH_T *sdh, SDH_INFO_T *pSD, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount)
|
||||
{
|
||||
uint32_t volatile bIsSendCmd = FALSE;
|
||||
uint32_t volatile reg;
|
||||
uint32_t volatile i, loop, status;
|
||||
|
||||
SDH_INFO_T *pSD;
|
||||
|
||||
if (sdh == SDH0)
|
||||
{
|
||||
pSD = &SD0;
|
||||
}
|
||||
else
|
||||
{
|
||||
pSD = &SD1;
|
||||
}
|
||||
|
||||
if (u32SecCount == 0ul)
|
||||
{
|
||||
return SDH_SELECT_ERROR;
|
||||
}
|
||||
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, 7ul, pSD->RCA, 0ul)) != Successful)
|
||||
if ((status = SDH_SDCmdAndRsp(sdh, pSD, 7ul, pSD->RCA, 0ul)) != Successful)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
|
@ -1161,13 +1088,13 @@ uint32_t SDH_Write(SDH_T *sdh, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32
|
|||
}
|
||||
sdh->INTSTS = SDH_INTSTS_CRCIF_Msk;
|
||||
|
||||
if (SDH_SDCmdAndRsp(sdh, 12ul, 0ul, 0ul)) /* stop command */
|
||||
if (SDH_SDCmdAndRsp(sdh, pSD, 12ul, 0ul, 0ul)) /* stop command */
|
||||
{
|
||||
return SDH_CRC7_ERROR;
|
||||
}
|
||||
SDH_CheckRB(sdh);
|
||||
|
||||
SDH_SDCommand(sdh, 7ul, 0ul);
|
||||
SDH_SDCommand(sdh, pSD, 7ul, 0ul);
|
||||
sdh->CTL |= SDH_CTL_CLK8OEN_Msk;
|
||||
while ((sdh->CTL & SDH_CTL_CLK8OEN_Msk) == SDH_CTL_CLK8OEN_Msk)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -275,11 +275,23 @@ config SOC_SERIES_N9H30
|
|||
select RT_USING_DFS
|
||||
|
||||
if BSP_USING_SDH
|
||||
config BSP_USING_SDH0
|
||||
bool "Enable SDH0"
|
||||
|
||||
config BSP_USING_SDH1
|
||||
bool "Enable SDH1"
|
||||
config BSP_USING_EMMC
|
||||
bool "Enable FMI_EMMC"
|
||||
|
||||
choice
|
||||
prompt "Select SDH Port number"
|
||||
|
||||
config BSP_USING_SDH_NONE
|
||||
bool "Disable SDH Function"
|
||||
|
||||
config BSP_USING_SDH0
|
||||
bool "Enable SDH_PORT0"
|
||||
|
||||
config BSP_USING_SDH1
|
||||
bool "Enable SDH_PORT1"
|
||||
|
||||
endchoice
|
||||
|
||||
config NU_SDH_HOTPLUG
|
||||
bool "Using HOTPLUG"
|
||||
|
|
|
|||
|
|
@ -28,8 +28,12 @@
|
|||
|
||||
#if defined(NU_SDH_MOUNT_ON_ROOT)
|
||||
|
||||
#if !defined(NU_SDH_MOUNTPOINT_EMMC)
|
||||
#define NU_SDH_MOUNTPOINT_EMMC "/"
|
||||
#endif
|
||||
|
||||
#if !defined(NU_SDH_MOUNTPOINT_SDH0)
|
||||
#define NU_SDH_MOUNTPOINT_SDH0 "/"
|
||||
#define NU_SDH_MOUNTPOINT_SDH0 NU_SDH_MOUNTPOINT_SDH0"/sd0"
|
||||
#endif
|
||||
|
||||
#if !defined(NU_SDH_MOUNTPOINT_SDH1)
|
||||
|
|
@ -44,6 +48,10 @@
|
|||
|
||||
#endif
|
||||
|
||||
#if !defined(NU_SDH_MOUNTPOINT_EMMC)
|
||||
#define NU_SDH_MOUNTPOINT_EMMC NU_SDH_MOUNTPOINT_ROOT"/emmc"
|
||||
#endif
|
||||
|
||||
#if !defined(NU_SDH_MOUNTPOINT_SDH0)
|
||||
#define NU_SDH_MOUNTPOINT_SDH0 NU_SDH_MOUNTPOINT_ROOT"/sd0"
|
||||
#endif
|
||||
|
|
@ -55,6 +63,9 @@
|
|||
enum
|
||||
{
|
||||
SDH_START = -1,
|
||||
#if defined(BSP_USING_EMMC)
|
||||
EMMC_IDX,
|
||||
#endif
|
||||
#if defined(BSP_USING_SDH0)
|
||||
SDH0_IDX,
|
||||
#endif
|
||||
|
|
@ -71,12 +82,13 @@ enum
|
|||
#endif
|
||||
|
||||
#if defined(NU_SDH_HOTPLUG)
|
||||
enum
|
||||
typedef enum
|
||||
{
|
||||
NU_SDH_CARD_DETECTED_SD0 = (1 << 0),
|
||||
NU_SDH_CARD_DETECTED_SD1 = (1 << 1),
|
||||
NU_SDH_CARD_EVENT_ALL = (NU_SDH_CARD_DETECTED_SD0 | NU_SDH_CARD_DETECTED_SD1)
|
||||
};
|
||||
NU_SDH_CARD_DETECTED_EMMC = (1 << 0),
|
||||
NU_SDH_CARD_DETECTED_SD0 = (1 << 1),
|
||||
NU_SDH_CARD_DETECTED_SD1 = (1 << 2),
|
||||
NU_SDH_CARD_EVENT_ALL = (NU_SDH_CARD_DETECTED_EMMC | NU_SDH_CARD_DETECTED_SD0 | NU_SDH_CARD_DETECTED_SD1)
|
||||
} E_CARD_EVENT;
|
||||
#endif
|
||||
|
||||
/* Private typedef --------------------------------------------------------------*/
|
||||
|
|
@ -92,6 +104,11 @@ struct nu_sdh
|
|||
E_SYS_IPRST rstidx;
|
||||
E_SYS_IPCLK clkidx;
|
||||
|
||||
#if defined(NU_SDH_HOTPLUG)
|
||||
E_CARD_EVENT card_detected_event;
|
||||
#endif
|
||||
uint32_t card_num;
|
||||
|
||||
uint32_t is_card_inserted;
|
||||
SDH_INFO_T *info;
|
||||
struct rt_semaphore lock;
|
||||
|
|
@ -123,21 +140,42 @@ static int rt_hw_sdh_init(void);
|
|||
|
||||
|
||||
/* Private variables ------------------------------------------------------------*/
|
||||
static SDH_INFO_T EMMC, SD0, SD1;
|
||||
|
||||
static struct nu_sdh nu_sdh_arr [] =
|
||||
{
|
||||
#if defined(BSP_USING_EMMC)
|
||||
{
|
||||
.name = "emmc",
|
||||
#if defined(NU_SDH_HOTPLUG)
|
||||
.mounted_point = NU_SDH_MOUNTPOINT_EMMC,
|
||||
#endif
|
||||
.irqn = IRQ_FMI,
|
||||
.base = SDH0,
|
||||
.card_num = SD_PORT0,
|
||||
.rstidx = FMIRST,
|
||||
.clkidx = EMMCCKEN,
|
||||
.info = &EMMC,
|
||||
.card_detected_event = NU_SDH_CARD_DETECTED_EMMC,
|
||||
},
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_SDH0)
|
||||
{
|
||||
.name = "sdh0",
|
||||
#if defined(NU_SDH_HOTPLUG)
|
||||
.mounted_point = NU_SDH_MOUNTPOINT_SDH0,
|
||||
#endif
|
||||
.irqn = IRQ_FMI,
|
||||
.base = SDH0,
|
||||
.rstidx = FMIRST,
|
||||
.clkidx = EMMCCKEN,
|
||||
.irqn = IRQ_SDH,
|
||||
.base = SDH1,
|
||||
.card_num = SD_PORT0,
|
||||
.rstidx = SDIORST,
|
||||
.clkidx = SDHCKEN,
|
||||
.info = &SD0,
|
||||
.card_detected_event = NU_SDH_CARD_DETECTED_SD0,
|
||||
},
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_SDH1)
|
||||
{
|
||||
.name = "sdh1",
|
||||
|
|
@ -146,9 +184,11 @@ static struct nu_sdh nu_sdh_arr [] =
|
|||
#endif
|
||||
.irqn = IRQ_SDH,
|
||||
.base = SDH1,
|
||||
.card_num = SD_PORT1,
|
||||
.rstidx = SDIORST,
|
||||
.clkidx = SDHCKEN,
|
||||
.info = &SD1,
|
||||
.card_detected_event = NU_SDH_CARD_DETECTED_SD1,
|
||||
},
|
||||
#endif
|
||||
}; /* struct nu_sdh nu_sdh_arr [] */
|
||||
|
|
@ -177,16 +217,22 @@ static void SDH_IRQHandler(int vector, void *param)
|
|||
SDH_CLR_INT_FLAG(sdh_base, SDH_INTSTS_BLKDIF_Msk);
|
||||
}
|
||||
|
||||
if (isr & SDH_INTSTS_CDIF_Msk) // card detect
|
||||
if (isr & SDH_INTSTS_CDIF_Msk) // card number=0 detect
|
||||
{
|
||||
#if defined(NU_SDH_HOTPLUG)
|
||||
if (sdh->base == SDH0)
|
||||
rt_event_send(&sdh_event, NU_SDH_CARD_DETECTED_SD0);
|
||||
else if (sdh->base == SDH1)
|
||||
rt_event_send(&sdh_event, NU_SDH_CARD_DETECTED_SD1);
|
||||
#endif
|
||||
#if defined(NU_SDH_HOTPLUG)
|
||||
rt_event_send(&sdh_event, sdh->card_detected_event);
|
||||
#endif
|
||||
/* Clear CDIF interrupt flag */
|
||||
SDH_CLR_INT_FLAG(sdh_base, SDH_INTSTS_CDIF_Msk);
|
||||
}
|
||||
else if (isr & SDH_INTSTS_CDIF1_Msk) // card number=1 detect
|
||||
{
|
||||
#if defined(NU_SDH_HOTPLUG)
|
||||
rt_event_send(&sdh_event, sdh->card_detected_event);
|
||||
#endif
|
||||
|
||||
/* Clear CDIF1 interrupt flag */
|
||||
SDH_CLR_INT_FLAG(sdh_base, SDH_INTSTS_CDIF1_Msk);
|
||||
}
|
||||
|
||||
// CRC error interrupt
|
||||
|
|
@ -234,7 +280,7 @@ static rt_err_t nu_sdh_open(rt_device_t dev, rt_uint16_t oflag)
|
|||
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return (SDH_Probe(sdh->base) == 0) ? RT_EOK : -(RT_ERROR);
|
||||
return (SDH_Probe(sdh->base, sdh->info, sdh->card_num) == 0) ? RT_EOK : -(RT_ERROR);
|
||||
}
|
||||
|
||||
static rt_err_t nu_sdh_close(rt_device_t dev)
|
||||
|
|
@ -268,7 +314,7 @@ static rt_size_t nu_sdh_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_siz
|
|||
for (i = 0; i < blk_nb; i++)
|
||||
{
|
||||
/* Read to temp buffer from specified sector. */
|
||||
ret = SDH_Read(sdh->base, (uint8_t *)((uint32_t)&sdh->pbuf[0] | NONCACHEABLE), pos, 1);
|
||||
ret = SDH_Read(sdh->base, sdh->info, (uint8_t *)((uint32_t)&sdh->pbuf[0] | NONCACHEABLE), pos, 1);
|
||||
if (ret != Successful)
|
||||
goto exit_nu_sdh_read;
|
||||
|
||||
|
|
@ -286,7 +332,7 @@ static rt_size_t nu_sdh_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_siz
|
|||
#endif
|
||||
|
||||
/* Read to user's buffer from specified sector. */
|
||||
ret = SDH_Read(sdh->base, (uint8_t *)((uint32_t)buffer | NONCACHEABLE), pos, blk_nb);
|
||||
ret = SDH_Read(sdh->base, sdh->info, (uint8_t *)((uint32_t)buffer | NONCACHEABLE), pos, blk_nb);
|
||||
}
|
||||
|
||||
exit_nu_sdh_read:
|
||||
|
|
@ -339,7 +385,7 @@ static rt_size_t nu_sdh_write(rt_device_t dev, rt_off_t pos, const void *buffer,
|
|||
|
||||
memcpy((void *)&sdh->pbuf[0], copy_buffer, SDH_BLOCK_SIZE);
|
||||
|
||||
ret = SDH_Write(sdh->base, (uint8_t *)((uint32_t)&sdh->pbuf[0] | NONCACHEABLE), pos, 1);
|
||||
ret = SDH_Write(sdh->base, sdh->info, (uint8_t *)((uint32_t)&sdh->pbuf[0] | NONCACHEABLE), pos, 1);
|
||||
if (ret != Successful)
|
||||
goto exit_nu_sdh_write;
|
||||
|
||||
|
|
@ -354,7 +400,7 @@ static rt_size_t nu_sdh_write(rt_device_t dev, rt_off_t pos, const void *buffer,
|
|||
#endif
|
||||
|
||||
/* Write to device directly. */
|
||||
ret = SDH_Write(sdh->base, (uint8_t *)((uint32_t)buffer | NONCACHEABLE), pos, blk_nb);
|
||||
ret = SDH_Write(sdh->base, sdh->info, (uint8_t *)((uint32_t)buffer | NONCACHEABLE), pos, blk_nb);
|
||||
}
|
||||
|
||||
exit_nu_sdh_write:
|
||||
|
|
@ -408,6 +454,11 @@ static int rt_hw_sdh_init(void)
|
|||
ret = rt_event_init(&sdh_event, "sdh_event", RT_IPC_FLAG_FIFO);
|
||||
RT_ASSERT(ret == RT_EOK);
|
||||
|
||||
#if defined(BSP_USING_EMMC)
|
||||
nu_sys_ipclk_enable(FMICKEN);
|
||||
nu_sys_ipclk_enable(NANDCKEN);
|
||||
#endif
|
||||
|
||||
for (i = (SDH_START + 1); i < SDH_CNT; i++)
|
||||
{
|
||||
/* Register sdcard device */
|
||||
|
|
@ -559,8 +610,10 @@ exit_nu_sdh_hotplug_unmount:
|
|||
static void nu_card_detector(nu_sdh_t sdh)
|
||||
{
|
||||
SDH_T *sdh_base = sdh->base;
|
||||
uint32_t u32INTSTS_CDSTS_Msk = (sdh->card_num==SD_PORT0)?SDH_INTSTS_CDSTS_Msk:SDH_INTSTS_CDSTS1_Msk;
|
||||
unsigned int volatile isr = sdh_base->INTSTS;
|
||||
if (isr & SDH_INTSTS_CDSTS_Msk)
|
||||
|
||||
if (isr & u32INTSTS_CDSTS_Msk)
|
||||
{
|
||||
/* Card removed */
|
||||
sdh->info->IsCardInsert = FALSE; // SDISR_CD_Card = 1 means card remove for GPIO mode
|
||||
|
|
@ -569,8 +622,8 @@ static void nu_card_detector(nu_sdh_t sdh)
|
|||
}
|
||||
else
|
||||
{
|
||||
SDH_Open(sdh_base, CardDetect_From_GPIO);
|
||||
if (!SDH_Probe(sdh_base))
|
||||
SDH_Open(sdh_base, sdh->info, CardDetect_From_GPIO|sdh->card_num );
|
||||
if (!SDH_Probe(sdh_base, sdh->info, sdh->card_num))
|
||||
{
|
||||
/* Card inserted */
|
||||
nu_sdh_hotplug_mount(sdh);
|
||||
|
|
@ -586,9 +639,9 @@ static void sdh_hotplugger(void *param)
|
|||
for (i = (SDH_START + 1); i < SDH_CNT; i++)
|
||||
{
|
||||
/* Try to detect SD card on selected port. */
|
||||
SDH_Open(nu_sdh_arr[i].base, CardDetect_From_GPIO);
|
||||
if (!SDH_Probe(nu_sdh_arr[i].base) &&
|
||||
SDH_IS_CARD_PRESENT(nu_sdh_arr[i].base))
|
||||
SDH_Open(nu_sdh_arr[i].base, nu_sdh_arr[i].info, CardDetect_From_GPIO|nu_sdh_arr[i].card_num);
|
||||
if (!SDH_Probe(nu_sdh_arr[i].base, nu_sdh_arr[i].info, nu_sdh_arr[i].card_num) &&
|
||||
nu_sdh_arr[i].info->IsCardInsert)
|
||||
{
|
||||
nu_sdh_hotplug_mount(&nu_sdh_arr[i]);
|
||||
}
|
||||
|
|
@ -604,6 +657,11 @@ static void sdh_hotplugger(void *param)
|
|||
rt_thread_mdelay(200);
|
||||
switch (e)
|
||||
{
|
||||
#if defined(BSP_USING_EMMC)
|
||||
case NU_SDH_CARD_DETECTED_EMMC:
|
||||
nu_card_detector(&nu_sdh_arr[EMMC_IDX]);
|
||||
break;
|
||||
#endif
|
||||
#if defined(BSP_USING_SDH0)
|
||||
case NU_SDH_CARD_DETECTED_SD0:
|
||||
nu_card_detector(&nu_sdh_arr[SDH0_IDX]);
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ CONFIG_RT_USING_INTERRUPT_INFO=y
|
|||
CONFIG_RT_USING_CONSOLE=y
|
||||
CONFIG_RT_CONSOLEBUF_SIZE=256
|
||||
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
|
||||
CONFIG_RT_VER_NUM=0x40003
|
||||
CONFIG_RT_VER_NUM=0x40004
|
||||
CONFIG_ARCH_ARM=y
|
||||
# CONFIG_RT_USING_CPU_FFS is not set
|
||||
CONFIG_ARCH_ARM_ARM9=y
|
||||
|
|
@ -349,8 +349,14 @@ CONFIG_RT_LWIP_USING_PING=y
|
|||
CONFIG_RT_USING_UTEST=y
|
||||
CONFIG_UTEST_THR_STACK_SIZE=4096
|
||||
CONFIG_UTEST_THR_PRIORITY=20
|
||||
# CONFIG_RT_USING_RT_LINK is not set
|
||||
# CONFIG_RT_USING_LWP is not set
|
||||
|
||||
#
|
||||
# RT-Thread Utestcases
|
||||
#
|
||||
# CONFIG_RT_USING_UTESTCASES is not set
|
||||
|
||||
#
|
||||
# RT-Thread online packages
|
||||
#
|
||||
|
|
@ -484,6 +490,7 @@ CONFIG_PKG_USING_NUEMWIN_GUIDEMO=y
|
|||
CONFIG_PKG_USING_NUEMWIN_LATEST_VERSION=y
|
||||
CONFIG_PKG_NUEMWIN_VER="latest"
|
||||
CONFIG_PKG_NUEMWIN_VER_NUM=0x99999
|
||||
# CONFIG_PKG_USING_MP3PLAYER is not set
|
||||
|
||||
#
|
||||
# tools packages
|
||||
|
|
@ -492,6 +499,7 @@ CONFIG_PKG_NUEMWIN_VER_NUM=0x99999
|
|||
# CONFIG_PKG_USING_EASYFLASH is not set
|
||||
# CONFIG_PKG_USING_EASYLOGGER is not set
|
||||
# CONFIG_PKG_USING_SYSTEMVIEW is not set
|
||||
# CONFIG_PKG_USING_SEGGER_RTT is not set
|
||||
# CONFIG_PKG_USING_RDB is not set
|
||||
# CONFIG_PKG_USING_QRCODE is not set
|
||||
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
|
||||
|
|
@ -532,6 +540,24 @@ CONFIG_PKG_MEM_SANDBOX_VER="latest"
|
|||
#
|
||||
# system packages
|
||||
#
|
||||
|
||||
#
|
||||
# acceleration: Assembly language or algorithmic acceleration packages
|
||||
#
|
||||
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
|
||||
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
|
||||
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
|
||||
# CONFIG_PKG_USING_QFPLIB_M3 is not set
|
||||
|
||||
#
|
||||
# Micrium: Micrium software products porting for RT-Thread
|
||||
#
|
||||
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
|
||||
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
|
||||
# CONFIG_PKG_USING_UC_CRC is not set
|
||||
# CONFIG_PKG_USING_UC_CLK is not set
|
||||
# CONFIG_PKG_USING_UC_COMMON is not set
|
||||
# CONFIG_PKG_USING_UC_MODBUS is not set
|
||||
# CONFIG_PKG_USING_GUIENGINE is not set
|
||||
# CONFIG_PKG_USING_PERSIMMON is not set
|
||||
# CONFIG_PKG_USING_CAIRO is not set
|
||||
|
|
@ -599,23 +625,9 @@ CONFIG_PKG_USING_RAMDISK_LATEST_VERSION=y
|
|||
CONFIG_PKG_RAMDISK_VER="latest"
|
||||
# CONFIG_PKG_USING_MININI is not set
|
||||
# CONFIG_PKG_USING_QBOOT is not set
|
||||
|
||||
#
|
||||
# Micrium: Micrium software products porting for RT-Thread
|
||||
#
|
||||
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
|
||||
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
|
||||
# CONFIG_PKG_USING_UC_CRC is not set
|
||||
# CONFIG_PKG_USING_UC_CLK is not set
|
||||
# CONFIG_PKG_USING_UC_COMMON is not set
|
||||
# CONFIG_PKG_USING_UC_MODBUS is not set
|
||||
# CONFIG_PKG_USING_PPOOL is not set
|
||||
# CONFIG_PKG_USING_OPENAMP is not set
|
||||
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
|
||||
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
|
||||
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
|
||||
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
|
||||
# CONFIG_PKG_USING_QFPLIB_M3 is not set
|
||||
# CONFIG_PKG_USING_LPM is not set
|
||||
# CONFIG_PKG_USING_TLSF is not set
|
||||
# CONFIG_PKG_USING_EVENT_RECORDER is not set
|
||||
|
|
@ -643,7 +655,6 @@ CONFIG_PKG_RAMDISK_VER="latest"
|
|||
# CONFIG_PKG_USING_WM_LIBRARIES is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
|
||||
# CONFIG_PKG_USING_INFRARED is not set
|
||||
# CONFIG_PKG_USING_ROSSERIAL is not set
|
||||
# CONFIG_PKG_USING_AGILE_BUTTON is not set
|
||||
# CONFIG_PKG_USING_AGILE_LED is not set
|
||||
# CONFIG_PKG_USING_AT24CXX is not set
|
||||
|
|
@ -687,6 +698,9 @@ CONFIG_PKG_RAMDISK_VER="latest"
|
|||
# CONFIG_PKG_USING_MFOC is not set
|
||||
# CONFIG_PKG_USING_TMC51XX is not set
|
||||
# CONFIG_PKG_USING_TCA9534 is not set
|
||||
# CONFIG_PKG_USING_KOBUKI is not set
|
||||
# CONFIG_PKG_USING_ROSSERIAL is not set
|
||||
# CONFIG_PKG_USING_MICRO_ROS is not set
|
||||
|
||||
#
|
||||
# AI packages
|
||||
|
|
@ -718,6 +732,7 @@ CONFIG_PKG_OPTPARSE_VER="latest"
|
|||
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
|
||||
# CONFIG_PKG_USING_CANFESTIVAL is not set
|
||||
# CONFIG_PKG_USING_ZLIB is not set
|
||||
# CONFIG_PKG_USING_MINIZIP is not set
|
||||
# CONFIG_PKG_USING_DSTR is not set
|
||||
# CONFIG_PKG_USING_TINYFRAME is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
|
||||
|
|
@ -843,8 +858,10 @@ CONFIG_BSP_USING_I2C=y
|
|||
CONFIG_BSP_USING_I2C0=y
|
||||
# CONFIG_BSP_USING_I2C1 is not set
|
||||
CONFIG_BSP_USING_SDH=y
|
||||
# CONFIG_BSP_USING_SDH0 is not set
|
||||
CONFIG_BSP_USING_SDH1=y
|
||||
# CONFIG_BSP_USING_EMMC is not set
|
||||
# CONFIG_BSP_USING_SDHN is not set
|
||||
CONFIG_BSP_USING_SDH0=y
|
||||
# CONFIG_BSP_USING_SDH1 is not set
|
||||
CONFIG_NU_SDH_HOTPLUG=y
|
||||
# CONFIG_NU_SDH_MOUNT_ON_ROOT is not set
|
||||
CONFIG_BSP_USING_CAN=y
|
||||
|
|
@ -890,5 +907,3 @@ CONFIG_BOARD_USING_USB1_HOST=y
|
|||
#
|
||||
# Board extended module drivers
|
||||
#
|
||||
CONFIG_BOARD_USE_UTEST=y
|
||||
CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.nk-n9h30.test.utest."
|
||||
|
|
|
|||
Loading…
Reference in New Issue