lpc43xx: refactor uart drivers
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c3515abf93
commit
a447b5f3cf
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@ -96,10 +96,10 @@ __Vectors DCD __initial_sp ; 0 Top of Stack
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DCD ADC1_IRQHandler ; 37 ADC1
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DCD ADC1_IRQHandler ; 37 ADC1
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DCD SSP0_OR_SSP1_IRQHandler ; 38 SSP0 or SSP1
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DCD SSP0_OR_SSP1_IRQHandler ; 38 SSP0 or SSP1
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DCD EVENTROUTER_IRQHandler ; 39 Event router
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DCD EVENTROUTER_IRQHandler ; 39 Event router
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DCD USART0_IRQHandler ; 40 USART0
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DCD UART0_IRQHandler ; 40 USART0
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DCD UART1_IRQHandler ; 41 UART1/Modem
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DCD UART1_IRQHandler ; 41 UART1/Modem
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DCD USART2_OR_C_CAN1_IRQHandler ; 42 USART2 or C CAN1
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DCD UART2_OR_C_CAN1_IRQHandler ; 42 USART2 or C CAN1
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DCD USART3_IRQHandler ; 43 USART3
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DCD UART3_IRQHandler ; 43 USART3
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DCD I2S0_OR_I2S1_OR_QEI_IRQHandler ; 44 I2S0 or I2S1 or QEI
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DCD I2S0_OR_I2S1_OR_QEI_IRQHandler ; 44 I2S0 or I2S1 or QEI
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DCD C_CAN0_IRQHandler ; 45 C CAN0
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DCD C_CAN0_IRQHandler ; 45 C CAN0
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DCD 0 ; 46 Reserved
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DCD 0 ; 46 Reserved
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@ -175,10 +175,10 @@ Default_Handler PROC
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EXPORT ADC1_IRQHandler [WEAK]
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EXPORT ADC1_IRQHandler [WEAK]
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EXPORT SSP0_OR_SSP1_IRQHandler [WEAK]
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EXPORT SSP0_OR_SSP1_IRQHandler [WEAK]
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EXPORT EVENTROUTER_IRQHandler [WEAK]
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EXPORT EVENTROUTER_IRQHandler [WEAK]
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EXPORT USART0_IRQHandler [WEAK]
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EXPORT UART0_IRQHandler [WEAK]
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EXPORT UART1_IRQHandler [WEAK]
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EXPORT UART1_IRQHandler [WEAK]
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EXPORT USART2_OR_C_CAN1_IRQHandler [WEAK]
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EXPORT UART2_OR_C_CAN1_IRQHandler [WEAK]
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EXPORT USART3_IRQHandler [WEAK]
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EXPORT UART3_IRQHandler [WEAK]
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EXPORT I2S0_OR_I2S1_OR_QEI_IRQHandler [WEAK]
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EXPORT I2S0_OR_I2S1_OR_QEI_IRQHandler [WEAK]
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EXPORT C_CAN0_IRQHandler [WEAK]
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EXPORT C_CAN0_IRQHandler [WEAK]
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@ -206,10 +206,10 @@ SPI_OR_DAC_IRQHandler
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ADC1_IRQHandler
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ADC1_IRQHandler
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SSP0_OR_SSP1_IRQHandler
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SSP0_OR_SSP1_IRQHandler
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EVENTROUTER_IRQHandler
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EVENTROUTER_IRQHandler
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USART0_IRQHandler
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UART0_IRQHandler
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UART1_IRQHandler
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UART1_IRQHandler
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USART2_OR_C_CAN1_IRQHandler
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UART2_OR_C_CAN1_IRQHandler
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USART3_IRQHandler
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UART3_IRQHandler
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I2S0_OR_I2S1_OR_QEI_IRQHandler
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I2S0_OR_I2S1_OR_QEI_IRQHandler
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C_CAN0_IRQHandler
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C_CAN0_IRQHandler
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@ -26,19 +26,7 @@ struct lpc_uart
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static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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{
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// struct lpc_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(serial != RT_NULL);
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// uart = (struct lpc_uart *)serial->parent.user_data;
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// Initialize FIFO for UART0 peripheral
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// UART_FIFOConfig(uart->USART, &UARTFIFOConfigStruct);
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// UART_TxCmd(uart->USART, ENABLE);
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return RT_EOK;
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return RT_EOK;
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}
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}
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@ -95,6 +83,44 @@ static const struct rt_uart_ops lpc_uart_ops =
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lpc_getc,
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lpc_getc,
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};
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};
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static void _do_uart_isr(struct rt_serial_device *sdev)
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{
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struct lpc_uart *uart;
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volatile uint32_t intsrc, temp;
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uart = sdev->parent.user_data;
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/* Determine the interrupt source */
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intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
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switch (intsrc)
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{
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case UART_IIR_INTID_RLS:
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/* Receive Line Status interrupt */
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/* read the line status */
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intsrc = uart->USART->LSR;
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/* Receive an error data */
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if (intsrc & UART_LSR_PE)
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{
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temp = uart->USART->RBR;
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}
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break;
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case UART_IIR_INTID_RDA:
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/* Receive data */
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case UART_IIR_INTID_CTI:
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/* Receive data timeout */
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/* read the data to buffer */
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while (uart->USART->LSR & UART_LSR_RDR)
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{
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rt_hw_serial_isr(sdev, RT_SERIAL_EVENT_RX_IND);
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}
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break;
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default:
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break;
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}
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}
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#if defined(RT_USING_UART0)
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#if defined(RT_USING_UART0)
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/* UART0 device driver structure */
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/* UART0 device driver structure */
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struct lpc_uart uart0 =
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struct lpc_uart uart0 =
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@ -106,49 +132,13 @@ struct rt_serial_device serial0;
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void UART0_IRQHandler(void)
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void UART0_IRQHandler(void)
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{
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{
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struct lpc_uart *uart;
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volatile uint32_t intsrc, temp;
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uart = &uart0;
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/* enter interrupt */
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rt_interrupt_enter();
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rt_interrupt_enter();
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_do_uart_isr(&serial0);
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/* Determine the interrupt source */
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intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
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switch (intsrc)
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{
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case UART_IIR_INTID_RLS: /* Receive Line Status interrupt*/
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/* read the line status */
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intsrc = uart->USART->LSR;
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/* Receive an error data */
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if (intsrc & UART_LSR_PE)
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{
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temp = LPC_USART0->RBR;
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}
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break;
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case UART_IIR_INTID_RDA: /* Receive data */
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case UART_IIR_INTID_CTI: /* Receive data timeout */
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/* read the data to buffer */
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while (uart->USART->LSR & UART_LSR_RDR)
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{
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rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
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}
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break;
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default:
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break;
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}
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/* leave interrupt */
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rt_interrupt_leave();
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rt_interrupt_leave();
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}
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}
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#endif
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#endif
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#if defined(RT_USING_UART2)
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#if defined(RT_USING_UART2)
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/* UART2 device driver structure */
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struct lpc_uart uart2 =
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struct lpc_uart uart2 =
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{
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{
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LPC_USART2,
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LPC_USART2,
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@ -158,47 +148,12 @@ struct rt_serial_device serial2;
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void UART2_IRQHandler(void)
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void UART2_IRQHandler(void)
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{
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{
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struct lpc_uart *uart;
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uint32_t intsrc, temp;
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uart = &uart2;
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/* enter interrupt */
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rt_interrupt_enter();
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rt_interrupt_enter();
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_do_uart_isr(&serial2);
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/* Determine the interrupt source */
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intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
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switch (intsrc)
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{
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case UART_IIR_INTID_RLS: /* Receive Line Status interrupt*/
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/* read the line status */
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intsrc = uart->USART->LSR;
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/* Receive an error data */
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if (intsrc & UART_LSR_PE)
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{
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temp = LPC_USART0->RBR;
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}
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break;
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case UART_IIR_INTID_RDA: /* Receive data */
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case UART_IIR_INTID_CTI: /* Receive data timeout */
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/* read the data to buffer */
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while (uart->USART->LSR & UART_LSR_RDR)
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{
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rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
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}
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break;
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default:
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break;
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}
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/* leave interrupt */
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rt_interrupt_leave();
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rt_interrupt_leave();
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}
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}
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#endif
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#endif
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void rt_hw_uart_init(void)
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void rt_hw_uart_init(void)
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{
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{
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struct lpc_uart *uart;
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struct lpc_uart *uart;
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@ -212,7 +167,7 @@ void rt_hw_uart_init(void)
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config.parity = PARITY_NONE;
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config.parity = PARITY_NONE;
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config.stop_bits = STOP_BITS_1;
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config.stop_bits = STOP_BITS_1;
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config.invert = NRZ_NORMAL;
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config.invert = NRZ_NORMAL;
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config.bufsz = RT_SERIAL_RB_BUFSZ;
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config.bufsz = RT_SERIAL_RB_BUFSZ;
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serial0.ops = &lpc_uart_ops;
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serial0.ops = &lpc_uart_ops;
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serial0.config = config;
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serial0.config = config;
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@ -221,22 +176,22 @@ void rt_hw_uart_init(void)
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LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
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LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
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while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
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while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
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/* Enable USART1 peripheral clock */
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/* Enable USART0 peripheral clock */
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LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
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LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
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while (!(LPC_CCU2->CLK_APB0_USART0_STAT & 0x01));
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while (!(LPC_CCU2->CLK_APB0_USART0_STAT & 0x01));
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/* Enable USART1 register interface clock */
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/* Enable USART0 register interface clock */
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LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
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LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
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while (!(LPC_CCU1->CLK_M4_USART0_STAT & 0x01));
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while (!(LPC_CCU1->CLK_M4_USART0_STAT & 0x01));
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/* Init GPIO pins */
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/* Init GPIO pins */
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LPC_SCU->SFSP2_0 = (1 << 6) | /* Input buffer enabled */
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LPC_SCU->SFSP2_0 = (1 << 6) | /* Input buffer enabled */
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(1 << 4) | /* Pull-up disabled */
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(1 << 4) | /* Pull-up disabled */
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(1 << 0) ; /* Pin P2_0 used as U0_TXD */
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(1 << 0) ; /* Pin P2_0 used as U0_TXD */
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LPC_SCU->SFSP2_1 = (1 << 6) | /* Input buffer enabled */
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LPC_SCU->SFSP2_1 = (1 << 6) | /* Input buffer enabled */
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(1 << 4) | /* Pull-up disabled */
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(1 << 4) | /* Pull-up disabled */
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(1 << 0) ; /* Pin P2_1 used as U0_RXD */
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(1 << 0) ; /* Pin P2_1 used as U0_RXD */
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/* Init USART0 */
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/* Init USART0 */
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LPC_USART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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LPC_USART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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@ -250,7 +205,7 @@ void rt_hw_uart_init(void)
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/* Enable Interrupt for UART channel */
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/* Enable Interrupt for UART channel */
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NVIC_EnableIRQ(uart->USART_IRQn);
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NVIC_EnableIRQ(uart->USART_IRQn);
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/* register UART1 device */
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/* register UART0 device */
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rt_hw_serial_register(&serial0, "uart0",
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rt_hw_serial_register(&serial0, "uart0",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart);
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uart);
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@ -263,7 +218,7 @@ void rt_hw_uart_init(void)
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config.parity = PARITY_NONE;
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config.parity = PARITY_NONE;
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config.stop_bits = STOP_BITS_1;
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config.stop_bits = STOP_BITS_1;
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config.invert = NRZ_NORMAL;
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config.invert = NRZ_NORMAL;
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config.bufsz = RT_SERIAL_RB_BUFSZ;
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config.bufsz = RT_SERIAL_RB_BUFSZ;
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serial2.ops = &lpc_uart_ops;
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serial2.ops = &lpc_uart_ops;
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serial2.config = config;
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serial2.config = config;
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@ -272,22 +227,22 @@ void rt_hw_uart_init(void)
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LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
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LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
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while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
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while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
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/* Enable USART1 peripheral clock */
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/* Enable USART2 peripheral clock */
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LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
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LPC_CCU2->CLK_APB0_USART2_CFG |= 0x01;
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while (!(LPC_CCU2->CLK_APB2_USART2_STAT & 0x01));
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while (!(LPC_CCU2->CLK_APB2_USART2_STAT & 0x01));
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/* Enable USART2 register interface clock */
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/* Enable USART2 register interface clock */
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LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
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LPC_CCU1->CLK_M4_USART2_CFG |= 0x01;
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while (!(LPC_CCU1->CLK_M4_USART2_STAT & 0x01));
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while (!(LPC_CCU1->CLK_M4_USART2_STAT & 0x01));
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/* Init GPIO pins */
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/* Init GPIO pins */
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LPC_SCU->SFSP1_15 = (1 << 6) | /* Input buffer enabled */
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LPC_SCU->SFSP1_15 = (1 << 6) | /* Input buffer enabled */
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(1 << 4) | /* Pull-up disabled */
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(1 << 4) | /* Pull-up disabled */
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(1 << 0) ; /* Pin P1_15 used as U2_TXD */
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(1 << 0) ; /* Pin P1_15 used as U2_TXD */
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LPC_SCU->SFSP1_16 = (1 << 6) | /* Input buffer enabled */
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LPC_SCU->SFSP1_16 = (1 << 6) | /* Input buffer enabled */
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(1 << 4) | /* Pull-up disabled */
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(1 << 4) | /* Pull-up disabled */
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(1 << 0) ; /* Pin P1_16 used as U2_RXD */
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(1 << 0) ; /* Pin P1_16 used as U2_RXD */
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/* Init USART2 */
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/* Init USART2 */
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LPC_USART2->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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LPC_USART2->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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/* Enable Interrupt for UART channel */
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/* Enable Interrupt for UART channel */
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NVIC_EnableIRQ(uart->USART_IRQn);
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NVIC_EnableIRQ(uart->USART_IRQn);
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/* register UART1 device */
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/* register UART2 device */
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rt_hw_serial_register(&serial2, "uart2",
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rt_hw_serial_register(&serial2, "uart2",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart);
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uart);
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