[stm32][tim/pwm] 抽出公共代码,防止日后演进出现分歧 (#6575)
* [stm32][tim/pwm] 抽出公共代码,防止日后演进出现分歧 * Update drv_tim.c
This commit is contained in:
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79e298147b
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a24f527990
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@ -16,11 +16,11 @@ if GetDepend(['RT_USING_SERIAL']):
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else:
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else:
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src += ['drv_usart.c']
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src += ['drv_usart.c']
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if GetDepend(['RT_USING_HWTIMER']):
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if GetDepend(['BSP_USING_TIM']):
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src += ['drv_hwtimer.c']
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src += ['drv_tim.c']
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if GetDepend(['RT_USING_PWM']):
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if GetDepend(['BSP_USING_PWM']):
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src += ['drv_pwm.c']
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src += ['drv_pwm.c', 'drv_tim.c']
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if GetDepend(['RT_USING_SPI']):
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if GetDepend(['RT_USING_SPI']):
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src += ['drv_spi.c']
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src += ['drv_spi.c']
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@ -13,6 +13,7 @@
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#ifdef BSP_USING_PWM
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#ifdef BSP_USING_PWM
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#include "drv_config.h"
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#include "drv_config.h"
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#include "drv_tim.h"
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#include <drivers/rt_drv_pwm.h>
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#include <drivers/rt_drv_pwm.h>
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//#define DRV_DEBUG
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//#define DRV_DEBUG
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@ -159,58 +160,23 @@ static struct stm32_pwm stm32_pwm_obj[] =
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#endif
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#endif
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};
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};
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/* APBx timer clocks frequency doubler state related to APB1CLKDivider value */
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static void pclkx_doubler_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_doubler)
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{
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uint32_t flatency = 0;
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RT_ASSERT(pclk1_doubler != RT_NULL);
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RT_ASSERT(pclk1_doubler != RT_NULL);
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HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &flatency);
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*pclk1_doubler = 1;
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*pclk2_doubler = 1;
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#if defined(SOC_SERIES_STM32MP1)
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if (RCC_ClkInitStruct.APB1_Div != RCC_APB1_DIV1)
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{
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*pclk1_doubler = 2;
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}
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if (RCC_ClkInitStruct.APB2_Div != RCC_APB2_DIV1)
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{
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*pclk2_doubler = 2;
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}
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#else
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if (RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
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{
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*pclk1_doubler = 2;
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}
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#if !(defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0))
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if (RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
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{
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*pclk2_doubler = 2;
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}
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#endif
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#endif
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}
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static rt_uint64_t tim_clock_get(TIM_HandleTypeDef *htim)
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static rt_uint64_t tim_clock_get(TIM_HandleTypeDef *htim)
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{
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{
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rt_uint32_t pclk1_doubler, pclk2_doubler;
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rt_uint32_t pclk1_doubler, pclk2_doubler;
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rt_uint64_t tim_clock;
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rt_uint64_t tim_clock;
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pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
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stm32_tim_pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11)
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if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11)
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#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32H7)|| defined(SOC_SERIES_STM32F3)
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#elif defined(SOC_SERIES_STM32F3) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32H7)
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if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17)
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if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17)
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#elif defined(SOC_SERIES_STM32MP1)
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#elif defined(SOC_SERIES_STM32MP1)
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if (htim->Instance == TIM4)
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if (htim->Instance == TIM4)
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#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
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#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
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if (0)
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if (0)
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#else
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#error "This driver has not supported this series yet!"
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#endif
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#endif
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{
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{
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#if !(defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)) /* don't have HAL_RCC_GetPCLK2Freq */
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#if !(defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)) /* don't have HAL_RCC_GetPCLK2Freq */
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@ -13,15 +13,51 @@
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*/
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*/
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#include <rtdevice.h>
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#include <rtdevice.h>
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#ifdef BSP_USING_TIM
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#include "drv_config.h"
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#include "drv_config.h"
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//#define DRV_DEBUG
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//#define DRV_DEBUG
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#define LOG_TAG "drv.hwtimer"
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#define LOG_TAG "drv.tim"
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#include <drv_log.h>
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#include <drv_log.h>
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#ifdef RT_USING_HWTIMER
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/* APBx timer clocks frequency doubler state related to APB1CLKDivider value */
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void stm32_tim_pclkx_doubler_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_doubler)
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{
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rt_uint32_t flatency = 0;
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RT_ASSERT(pclk1_doubler != RT_NULL);
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RT_ASSERT(pclk1_doubler != RT_NULL);
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HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &flatency);
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*pclk1_doubler = 1;
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*pclk2_doubler = 1;
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#if defined(SOC_SERIES_STM32MP1)
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if (RCC_ClkInitStruct.APB1_Div != RCC_APB1_DIV1)
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{
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*pclk1_doubler = 2;
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}
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if (RCC_ClkInitStruct.APB2_Div != RCC_APB2_DIV1)
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{
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*pclk2_doubler = 2;
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}
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#else
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if (RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
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{
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*pclk1_doubler = 2;
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}
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#if !(defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0))
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if (RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
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{
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*pclk2_doubler = 2;
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}
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#endif
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#endif
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}
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#ifdef BSP_USING_TIM
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enum
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enum
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{
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{
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#ifdef BSP_USING_TIM1
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#ifdef BSP_USING_TIM1
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@ -156,43 +192,6 @@ static struct stm32_hwtimer stm32_hwtimer_obj[] =
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#endif
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#endif
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};
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};
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/* APBx timer clocks frequency doubler state related to APB1CLKDivider value */
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static void pclkx_doubler_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_doubler)
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{
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rt_uint32_t flatency = 0;
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RT_ASSERT(pclk1_doubler != RT_NULL);
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RT_ASSERT(pclk1_doubler != RT_NULL);
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HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &flatency);
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*pclk1_doubler = 1;
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*pclk2_doubler = 1;
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#if defined(SOC_SERIES_STM32MP1)
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if (RCC_ClkInitStruct.APB1_Div != RCC_APB1_DIV1)
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{
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*pclk1_doubler = 2;
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}
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if (RCC_ClkInitStruct.APB2_Div != RCC_APB2_DIV1)
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{
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*pclk2_doubler = 2;
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}
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#else
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if (RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
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{
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*pclk1_doubler = 2;
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}
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#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
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if (RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
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{
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*pclk2_doubler = 2;
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}
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#endif
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#endif
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}
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static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
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static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
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{
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{
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uint32_t prescaler_value = 0;
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uint32_t prescaler_value = 0;
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@ -206,7 +205,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
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tim = (TIM_HandleTypeDef *)timer->parent.user_data;
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tim = (TIM_HandleTypeDef *)timer->parent.user_data;
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tim_device = (struct stm32_hwtimer *)timer;
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tim_device = (struct stm32_hwtimer *)timer;
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pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
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stm32_tim_pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
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/* time init */
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/* time init */
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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@ -223,7 +222,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
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#error "This driver has not supported this series yet!"
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#error "This driver has not supported this series yet!"
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#endif
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#endif
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{
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{
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#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
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#if !(defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0))
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prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * pclk2_doubler / 10000) - 1;
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prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * pclk2_doubler / 10000) - 1;
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#endif
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#endif
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}
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}
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@ -339,7 +338,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
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/* set timer frequence */
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/* set timer frequence */
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freq = *((rt_uint32_t *)arg);
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freq = *((rt_uint32_t *)arg);
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pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
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stm32_tim_pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
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if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
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if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
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if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
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#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
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#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
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if (0)
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if (0)
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#else
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#error "This driver has not supported this series yet!"
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#endif
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#endif
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{
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{
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#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
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#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
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}
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}
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INIT_BOARD_EXPORT(stm32_hwtimer_init);
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INIT_BOARD_EXPORT(stm32_hwtimer_init);
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#endif /* RT_USING_HWTIMER */
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#endif /* BSP_USING_TIM */
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#endif /* BSP_USING_TIM */
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@ -0,0 +1,18 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-11-01 Meco Man First version
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*/
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#ifndef __DRV_TIM_H__
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#define __DRV_TIM_H__
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#include <rtdef.h>
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void stm32_tim_pclkx_doubler_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_doubler);
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#endif /* __DRV_TIM_H__ */
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@ -5,8 +5,8 @@
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*
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*
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* Change Logs:
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* Change Logs:
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* Date Author Notes
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* Date Author Notes
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* 2018.10.30 SummerGift first version
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* 2018-10-30 SummerGift first version
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* 2019.03.05 whj4674672 add stm32h7
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* 2019-03-05 whj4674672 add stm32h7
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* 2020-10-14 Dozingfiretruck Porting for stm32wbxx
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* 2020-10-14 Dozingfiretruck Porting for stm32wbxx
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*/
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*/
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