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update stm32f10x gcc ld script 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1585 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wuyangyong 2011-07-03 13:21:32 +00:00
parent 518bdc44b2
commit a2470120e4
5 changed files with 133 additions and 95 deletions
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1
bsp/lpc2148/lpc2148_rom.ld
View File

@ -132,7 +132,6 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */ /* This is used by the startup in order to initialize the .bss secion */
_ebss = . ; _ebss = . ;
_estack = .;
} > DATA } > DATA
__bss_end = .; __bss_end = .;

4
bsp/stm32f10x/application.c
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@ -38,8 +38,8 @@
#include "led.h" #include "led.h"
ALIGN(RT_ALIGN_SIZE) ALIGN(RT_ALIGN_SIZE)
static rt_uint8_t led_stack[ 512 ];
static struct rt_thread led_thread; static struct rt_thread led_thread;
static rt_uint32_t led_stack[512/4];
static void led_thread_entry(void* parameter) static void led_thread_entry(void* parameter)
{ {
unsigned int count=0; unsigned int count=0;
@ -58,7 +58,7 @@ static void led_thread_entry(void* parameter)
/* led1 off */ /* led1 off */
#ifndef RT_USING_FINSH #ifndef RT_USING_FINSH
rt_kprintf("led2 off\r\n"); rt_kprintf("led off\r\n");
#endif #endif
rt_hw_led_off(0); rt_hw_led_off(0);
rt_thread_delay( RT_TICK_PER_SECOND/2 ); rt_thread_delay( RT_TICK_PER_SECOND/2 );

93
bsp/stm32f10x/board.c
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@ -43,76 +43,80 @@ void NVIC_Configuration(void)
#endif #endif
} }
/*******************************************************************************
* Function Name : SysTick_Configuration
* Description : Configures the SysTick for OS tick.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SysTick_Configuration(void)
{
RCC_ClocksTypeDef rcc_clocks;
rt_uint32_t cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
}
#if STM32_EXT_SRAM #if STM32_EXT_SRAM
void EXT_SRAM_Configuration(void) void EXT_SRAM_Configuration(void)
{ {
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p; FSMC_NORSRAMTimingInitTypeDef p;
GPIO_InitTypeDef GPIO_InitStructure;
/* FSMC GPIO configure */
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF
| RCC_APB2Periph_GPIOG, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
RCC_APB2Periph_GPIOF, ENABLE);
/*-- GPIO Configuration ------------------------------------------------------*/
/* SRAM Data lines configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
/*
FSMC_D0 ~ FSMC_D3
PD14 FSMC_D0 PD15 FSMC_D1 PD0 FSMC_D2 PD1 FSMC_D3
*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOD,&GPIO_InitStructure); GPIO_Init(GPIOD,&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | /*
GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | FSMC_D4 ~ FSMC_D12
GPIO_Pin_15; PE7 ~ PE15 FSMC_D4 ~ FSMC_D12
*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10
| GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOE,&GPIO_InitStructure); GPIO_Init(GPIOE,&GPIO_InitStructure);
/* SRAM Address lines configuration */ /* FSMC_D13 ~ FSMC_D15 PD8 ~ PD10 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Init(GPIOD,&GPIO_InitStructure);
GPIO_Pin_14 | GPIO_Pin_15;
/*
FSMC_A0 ~ FSMC_A5 FSMC_A6 ~ FSMC_A9
PF0 ~ PF5 PF12 ~ PF15
*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3
| GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF,&GPIO_InitStructure); GPIO_Init(GPIOF,&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | /* FSMC_A10 ~ FSMC_A15 PG0 ~ PG5 */
GPIO_Pin_4 | GPIO_Pin_5; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOG,&GPIO_InitStructure); GPIO_Init(GPIOG,&GPIO_InitStructure);
/* FSMC_A16 ~ FSMC_A18 PD11 ~ PD13 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
GPIO_Init(GPIOD,&GPIO_InitStructure); GPIO_Init(GPIOD,&GPIO_InitStructure);
/* NOE and NWE configuration */ /* RD-PD4 WR-PD5 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOD,&GPIO_InitStructure); GPIO_Init(GPIOD,&GPIO_InitStructure);
/* NE3 NE4 configuration */ /* NBL0-PE0 NBL1-PE1 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_12;
GPIO_Init(GPIOG, &GPIO_InitStructure);
/* NBL0, NBL1 configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
GPIO_Init(GPIOE,&GPIO_InitStructure); GPIO_Init(GPIOE,&GPIO_InitStructure);
/* NE1/NCE2 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
GPIO_Init(GPIOD,&GPIO_InitStructure);
/* NE2 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_Init(GPIOG,&GPIO_InitStructure);
/* NE3 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_Init(GPIOG,&GPIO_InitStructure);
/* NE4 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
GPIO_Init(GPIOG,&GPIO_InitStructure);
}
/* FSMC GPIO configure */
/*-- FSMC Configuration ------------------------------------------------------*/ /*-- FSMC Configuration ------------------------------------------------------*/
p.FSMC_AddressSetupTime = 0; p.FSMC_AddressSetupTime = 0;
p.FSMC_AddressHoldTime = 0; p.FSMC_AddressHoldTime = 0;
@ -127,6 +131,7 @@ void EXT_SRAM_Configuration(void)
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
@ -168,7 +173,7 @@ void rt_hw_board_init()
NVIC_Configuration(); NVIC_Configuration();
/* Configure the SysTick */ /* Configure the SysTick */
SysTick_Configuration(); SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
#if STM32_EXT_SRAM #if STM32_EXT_SRAM
EXT_SRAM_Configuration(); EXT_SRAM_Configuration();

71
bsp/stm32f10x/dm9000a.c
View File

@ -631,49 +631,75 @@ static void FSMC_Configuration()
{ {
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p; FSMC_NORSRAMTimingInitTypeDef p;
/* FSMC GPIO configure */
{
GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF
| RCC_APB2Periph_GPIOG, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
RCC_APB2Periph_GPIOF, ENABLE);
/*-- GPIO Configuration ------------------------------------------------------*/
/* SRAM Data lines configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
/*
FSMC_D0 ~ FSMC_D3
PD14 FSMC_D0 PD15 FSMC_D1 PD0 FSMC_D2 PD1 FSMC_D3
*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOD,&GPIO_InitStructure); GPIO_Init(GPIOD,&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | /*
GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | FSMC_D4 ~ FSMC_D12
GPIO_Pin_15; PE7 ~ PE15 FSMC_D4 ~ FSMC_D12
*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10
| GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOE,&GPIO_InitStructure); GPIO_Init(GPIOE,&GPIO_InitStructure);
/* SRAM Address lines configuration */ /* FSMC_D13 ~ FSMC_D15 PD8 ~ PD10 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Init(GPIOD,&GPIO_InitStructure);
GPIO_Pin_14 | GPIO_Pin_15;
/*
FSMC_A0 ~ FSMC_A5 FSMC_A6 ~ FSMC_A9
PF0 ~ PF5 PF12 ~ PF15
*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3
| GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF,&GPIO_InitStructure); GPIO_Init(GPIOF,&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | /* FSMC_A10 ~ FSMC_A15 PG0 ~ PG5 */
GPIO_Pin_4 | GPIO_Pin_5; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOG,&GPIO_InitStructure); GPIO_Init(GPIOG,&GPIO_InitStructure);
/* FSMC_A16 ~ FSMC_A18 PD11 ~ PD13 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
GPIO_Init(GPIOD,&GPIO_InitStructure); GPIO_Init(GPIOD,&GPIO_InitStructure);
/* NOE and NWE configuration */ /* RD-PD4 WR-PD5 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOD,&GPIO_InitStructure); GPIO_Init(GPIOD,&GPIO_InitStructure);
/* NE3 NE4 configuration */ /* NBL0-PE0 NBL1-PE1 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_12;
GPIO_Init(GPIOG, &GPIO_InitStructure);
/* NBL0, NBL1 configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
GPIO_Init(GPIOE,&GPIO_InitStructure); GPIO_Init(GPIOE,&GPIO_InitStructure);
/* NE1/NCE2 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
GPIO_Init(GPIOD,&GPIO_InitStructure);
/* NE2 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_Init(GPIOG,&GPIO_InitStructure);
/* NE3 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_Init(GPIOG,&GPIO_InitStructure);
/* NE4 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
GPIO_Init(GPIOG,&GPIO_InitStructure);
}
/* FSMC GPIO configure */
/*-- FSMC Configuration ------------------------------------------------------*/ /*-- FSMC Configuration ------------------------------------------------------*/
p.FSMC_AddressSetupTime = 0; p.FSMC_AddressSetupTime = 0;
p.FSMC_AddressHoldTime = 0; p.FSMC_AddressHoldTime = 0;
@ -688,6 +714,7 @@ static void FSMC_Configuration()
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;

13
bsp/stm32f10x/stm32_rom.ld
View File

@ -6,10 +6,11 @@
/* Program Entry, set to mark it as "used" and avoid gc */ /* Program Entry, set to mark it as "used" and avoid gc */
MEMORY MEMORY
{ {
CODE (rx) : ORIGIN = 0x08000000, LENGTH = 0x00080000 CODE (rx) : ORIGIN = 0x08000000, LENGTH = 512k /* 512KB flash */
DATA (rw) : ORIGIN = 0x20000000, LENGTH = 0x00010000 DATA (rw) : ORIGIN = 0x20000000, LENGTH = 64k /* 64K sram */
} }
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
_system_tack_size = 0x100;
SECTIONS SECTIONS
{ {
@ -69,6 +70,13 @@ SECTIONS
_edata = . ; _edata = . ;
} >DATA } >DATA
.stack :
{
. = . + _system_tack_size;
. = ALIGN(4);
_estack = .;
} >DATA
__bss_start = .; __bss_start = .;
.bss : .bss :
{ {
@ -83,7 +91,6 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */ /* This is used by the startup in order to initialize the .bss secion */
_ebss = . ; _ebss = . ;
_estack = .;
*(.bss.init) *(.bss.init)
} > DATA } > DATA