libs/rt-thread
libs/rt-thread
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fix the RAM size

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This commit is contained in:
supperthomas 2021-08-10 20:15:33 +08:00
parent 5b28191510
commit a2320f78b6
1 changed files with 16 additions and 7 deletions
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23
bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h
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@ -5,8 +5,7 @@
* *
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2018-11-5 SummerGift first version * 2021-08-09 supperthomas first version
* 2019-04-09 jhb
*/ */
#ifndef __BOARD_H__ #ifndef __BOARD_H__
@ -25,12 +24,22 @@ extern "C" {
#define STM32_FLASH_SIZE (2048 * 1024) #define STM32_FLASH_SIZE (2048 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#define STM32_SRAM3_SIZE (384) #define STM32_SRAM1_SIZE (640)
#define STM32_SRAM3_START (0x20040000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM3_END (STM32_SRAM3_START + STM32_SRAM3_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#define HEAP_BEGIN STM32_SRAM3_START #if defined(__CC_ARM) || defined(__CLANG_ARM)
#define HEAP_END STM32_SRAM3_END extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END STM32_SRAM1_END
void SystemClock_Config(void); void SystemClock_Config(void);