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Merge pull request #4532 from xupenghu/master 

[BSP][STM32WB55] change some file to support ble stack.
This commit is contained in:
Bernard Xiong 2021-03-31 14:04:39 +08:00 committed by GitHub
parent eb8a02365c b1c041a3a7
commit a15040d3a9
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 9 additions and 21 deletions
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1
bsp/stm32/libraries/STM32WBxx_HAL/SConscript
View File

@ -24,6 +24,7 @@ STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc_ex.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rng.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_hsem.c
''')
if GetDepend(['RT_USING_SERIAL']):

29
bsp/stm32/stm32wb55-st-nucleo/board/board.c
View File

@ -1,11 +1,12 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-06 SummerGift first version
* 2021-03-27 xph open rtc clk to support ble stack
*/
#include "board.h"
@ -26,9 +27,7 @@ void SystemClock_Config(void)
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI1
|RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE
|RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSI1 | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
@ -50,9 +49,7 @@ void SystemClock_Config(void)
}
/** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2
|RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
@ -64,22 +61,12 @@ void SystemClock_Config(void)
{
Error_Handler();
}
/** Initializes the peripherals clocks
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RTC
|RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_LPUART1
|RCC_PERIPHCLK_USB|RCC_PERIPHCLK_ADC;
PeriphClkInitStruct.PLLSAI1.PLLN = 24;
PeriphClkInitStruct.PLLSAI1.PLLP = RCC_PLLP_DIV2;
PeriphClkInitStruct.PLLSAI1.PLLQ = RCC_PLLQ_DIV2;
PeriphClkInitStruct.PLLSAI1.PLLR = RCC_PLLR_DIV2;
PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_USBCLK|RCC_PLLSAI1_ADCCLK;
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_LPUART1;
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSI;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{