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[bsp/stm32f40x] code style change 

TAB to 4 space
This commit is contained in:
wzyy2 2014-04-25 18:37:06 +08:00
parent 5a7e80bd6b
commit 9d07b6708f
4 changed files with 481 additions and 481 deletions
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68
bsp/stm32f40x/applications/startup.c
View File

@ -53,11 +53,11 @@ extern int __bss_end;
*******************************************************************************/ *******************************************************************************/
void assert_failed(u8* file, u32 line) void assert_failed(u8* file, u32 line)
{ {
rt_kprintf("\n\r Wrong parameter value detected on\r\n"); rt_kprintf("\n\r Wrong parameter value detected on\r\n");
rt_kprintf(" file %s\r\n", file); rt_kprintf(" file %s\r\n", file);
rt_kprintf(" line %d\r\n", line); rt_kprintf(" line %d\r\n", line);
while (1) ; while (1) ;
} }
/** /**
@ -65,60 +65,60 @@ void assert_failed(u8* file, u32 line)
*/ */
void rtthread_startup(void) void rtthread_startup(void)
{ {
/* init board */ /* init board */
rt_hw_board_init(); rt_hw_board_init();
/* show version */ /* show version */
rt_show_version(); rt_show_version();
/* init tick */ /* init tick */
rt_system_tick_init(); rt_system_tick_init();
/* init kernel object */ /* init kernel object */
rt_system_object_init(); rt_system_object_init();
/* init timer system */ /* init timer system */
rt_system_timer_init(); rt_system_timer_init();
rt_system_heap_init((void*)STM32_SRAM_BEGIN, (void*)STM32_SRAM_END); rt_system_heap_init((void*)STM32_SRAM_BEGIN, (void*)STM32_SRAM_END);
/* init scheduler system */ /* init scheduler system */
rt_system_scheduler_init(); rt_system_scheduler_init();
/* init all device */ /* init all device */
rt_device_init_all(); rt_device_init_all();
/* init application */ /* init application */
rt_application_init(); rt_application_init();
#ifdef RT_USING_FINSH #ifdef RT_USING_FINSH
/* init finsh */ /* init finsh */
finsh_system_init(); finsh_system_init();
finsh_set_device( FINSH_DEVICE_NAME ); finsh_set_device( FINSH_DEVICE_NAME );
#endif #endif
/* init timer thread */ /* init timer thread */
rt_system_timer_thread_init(); rt_system_timer_thread_init();
/* init idle thread */ /* init idle thread */
rt_thread_idle_init(); rt_thread_idle_init();
/* start scheduler */ /* start scheduler */
rt_system_scheduler_start(); rt_system_scheduler_start();
/* never reach here */ /* never reach here */
return ; return ;
} }
int main(void) int main(void)
{ {
/* disable interrupt first */ /* disable interrupt first */
rt_hw_interrupt_disable(); rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */ /* startup RT-Thread RTOS */
rtthread_startup(); rtthread_startup();
return 0; return 0;
} }
/*@}*/ /*@}*/

44
bsp/stm32f40x/drivers/board.c
View File

@ -34,11 +34,11 @@
void NVIC_Configuration(void) void NVIC_Configuration(void)
{ {
#ifdef VECT_TAB_RAM #ifdef VECT_TAB_RAM
/* Set the Vector Table base location at 0x20000000 */ /* Set the Vector Table base location at 0x20000000 */
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else /* VECT_TAB_FLASH */ #else /* VECT_TAB_FLASH */
/* Set the Vector Table base location at 0x08000000 */ /* Set the Vector Table base location at 0x08000000 */
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif #endif
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
@ -53,16 +53,16 @@ void NVIC_Configuration(void)
*******************************************************************************/ *******************************************************************************/
void SysTick_Configuration(void) void SysTick_Configuration(void)
{ {
RCC_ClocksTypeDef rcc_clocks; RCC_ClocksTypeDef rcc_clocks;
rt_uint32_t cnts; rt_uint32_t cnts;
RCC_GetClocksFreq(&rcc_clocks); RCC_GetClocksFreq(&rcc_clocks);
cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND; cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
cnts = cnts / 8; cnts = cnts / 8;
SysTick_Config(cnts); SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8); SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
} }
/** /**
@ -71,13 +71,13 @@ void SysTick_Configuration(void)
*/ */
void SysTick_Handler(void) void SysTick_Handler(void)
{ {
/* enter interrupt */ /* enter interrupt */
rt_interrupt_enter(); rt_interrupt_enter();
rt_tick_increase(); rt_tick_increase();
/* leave interrupt */ /* leave interrupt */
rt_interrupt_leave(); rt_interrupt_leave();
} }
/** /**
@ -85,15 +85,15 @@ void SysTick_Handler(void)
*/ */
void rt_hw_board_init() void rt_hw_board_init()
{ {
/* NVIC Configuration */ /* NVIC Configuration */
NVIC_Configuration(); NVIC_Configuration();
/* Configure the SysTick */ /* Configure the SysTick */
SysTick_Configuration(); SysTick_Configuration();
rt_hw_usart_init(); rt_hw_usart_init();
#ifdef RT_USING_CONSOLE #ifdef RT_USING_CONSOLE
rt_console_set_device(CONSOLE_DEVICE); rt_console_set_device(CONSOLE_DEVICE);
#endif #endif
} }

564
bsp/stm32f40x/drivers/serial.c
View File

@ -20,7 +20,7 @@
#include <stm32f4xx_usart.h> #include <stm32f4xx_usart.h>
static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel,
rt_uint32_t address, rt_uint32_t size); rt_uint32_t address, rt_uint32_t size);
/** /**
* @addtogroup STM32 * @addtogroup STM32
@ -30,252 +30,252 @@ static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel,
/* RT-Thread Device Interface */ /* RT-Thread Device Interface */
static rt_err_t rt_serial_init (rt_device_t dev) static rt_err_t rt_serial_init (rt_device_t dev)
{ {
struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data; struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data;
if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
{ {
if (dev->flag & RT_DEVICE_FLAG_INT_RX) if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{ {
rt_memset(uart->int_rx->rx_buffer, 0, rt_memset(uart->int_rx->rx_buffer, 0,
sizeof(uart->int_rx->rx_buffer)); sizeof(uart->int_rx->rx_buffer));
uart->int_rx->read_index = 0; uart->int_rx->read_index = 0;
uart->int_rx->save_index = 0; uart->int_rx->save_index = 0;
} }
if (dev->flag & RT_DEVICE_FLAG_DMA_TX) if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
{ {
RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL); RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL);
uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL; uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL;
/* init data node memory pool */ /* init data node memory pool */
rt_mp_init(&(uart->dma_tx->data_node_mp), "dn", rt_mp_init(&(uart->dma_tx->data_node_mp), "dn",
uart->dma_tx->data_node_mem_pool, uart->dma_tx->data_node_mem_pool,
sizeof(uart->dma_tx->data_node_mem_pool), sizeof(uart->dma_tx->data_node_mem_pool),
sizeof(struct stm32_serial_data_node)); sizeof(struct stm32_serial_data_node));
} }
/* Enable USART */ /* Enable USART */
USART_Cmd(uart->uart_device, ENABLE); USART_Cmd(uart->uart_device, ENABLE);
dev->flag |= RT_DEVICE_FLAG_ACTIVATED; dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
} }
return RT_EOK; return RT_EOK;
} }
static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
{ {
return RT_EOK; return RT_EOK;
} }
static rt_err_t rt_serial_close(rt_device_t dev) static rt_err_t rt_serial_close(rt_device_t dev)
{ {
return RT_EOK; return RT_EOK;
} }
static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{ {
rt_uint8_t* ptr; rt_uint8_t* ptr;
rt_err_t err_code; rt_err_t err_code;
struct stm32_serial_device* uart; struct stm32_serial_device* uart;
ptr = buffer; ptr = buffer;
err_code = RT_EOK; err_code = RT_EOK;
uart = (struct stm32_serial_device*)dev->user_data; uart = (struct stm32_serial_device*)dev->user_data;
if (dev->flag & RT_DEVICE_FLAG_INT_RX) if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{ {
/* interrupt mode Rx */ /* interrupt mode Rx */
while (size) while (size)
{ {
rt_base_t level; rt_base_t level;
/* disable interrupt */ /* disable interrupt */
level = rt_hw_interrupt_disable(); level = rt_hw_interrupt_disable();
if (uart->int_rx->read_index != uart->int_rx->save_index) if (uart->int_rx->read_index != uart->int_rx->save_index)
{ {
/* read a character */ /* read a character */
*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index]; *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
size--; size--;
/* move to next position */ /* move to next position */
uart->int_rx->read_index ++; uart->int_rx->read_index ++;
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->read_index = 0; uart->int_rx->read_index = 0;
} }
else else
{ {
/* set error code */ /* set error code */
err_code = -RT_EEMPTY; err_code = -RT_EEMPTY;
/* enable interrupt */ /* enable interrupt */
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
break; break;
} }
/* enable interrupt */ /* enable interrupt */
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
} }
} }
else else
{ {
/* polling mode */ /* polling mode */
while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
{ {
while (uart->uart_device->SR & USART_FLAG_RXNE) while (uart->uart_device->SR & USART_FLAG_RXNE)
{ {
*ptr = uart->uart_device->DR & 0xff; *ptr = uart->uart_device->DR & 0xff;
ptr ++; ptr ++;
} }
} }
} }
/* set error code */ /* set error code */
rt_set_errno(err_code); rt_set_errno(err_code);
return (rt_uint32_t)ptr - (rt_uint32_t)buffer; return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
} }
static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel,
rt_uint32_t address, rt_uint32_t size) rt_uint32_t address, rt_uint32_t size)
{ {
RT_ASSERT(dma_channel != RT_NULL); RT_ASSERT(dma_channel != RT_NULL);
/* disable DMA */ /* disable DMA */
DMA_Cmd(dma_channel, DISABLE); DMA_Cmd(dma_channel, DISABLE);
/* set buffer address */ /* set buffer address */
dma_channel->M0AR = address; dma_channel->M0AR = address;
/* set size */ /* set size */
dma_channel->NDTR = size; dma_channel->NDTR = size;
/* enable DMA */ /* enable DMA */
DMA_Cmd(dma_channel, ENABLE); DMA_Cmd(dma_channel, ENABLE);
} }
static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{ {
rt_uint8_t* ptr; rt_uint8_t* ptr;
rt_err_t err_code; rt_err_t err_code;
struct stm32_serial_device* uart; struct stm32_serial_device* uart;
err_code = RT_EOK; err_code = RT_EOK;
ptr = (rt_uint8_t*)buffer; ptr = (rt_uint8_t*)buffer;
uart = (struct stm32_serial_device*)dev->user_data; uart = (struct stm32_serial_device*)dev->user_data;
if (dev->flag & RT_DEVICE_FLAG_INT_TX) if (dev->flag & RT_DEVICE_FLAG_INT_TX)
{ {
/* interrupt mode Tx, does not support */ /* interrupt mode Tx, does not support */
RT_ASSERT(0); RT_ASSERT(0);
} }
else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
{ {
/* DMA mode Tx */ /* DMA mode Tx */
/* allocate a data node */ /* allocate a data node */
struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*) struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*)
rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER); rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER);
if (data_node == RT_NULL) if (data_node == RT_NULL)
{ {
/* set error code */ /* set error code */
err_code = -RT_ENOMEM; err_code = -RT_ENOMEM;
} }
else else
{ {
rt_uint32_t level; rt_uint32_t level;
/* fill data node */ /* fill data node */
data_node->data_ptr = ptr; data_node->data_ptr = ptr;
data_node->data_size = size; data_node->data_size = size;
/* insert to data link */ /* insert to data link */
data_node->next = RT_NULL; data_node->next = RT_NULL;
/* disable interrupt */ /* disable interrupt */
level = rt_hw_interrupt_disable(); level = rt_hw_interrupt_disable();
data_node->prev = uart->dma_tx->list_tail; data_node->prev = uart->dma_tx->list_tail;
if (uart->dma_tx->list_tail != RT_NULL) if (uart->dma_tx->list_tail != RT_NULL)
uart->dma_tx->list_tail->next = data_node; uart->dma_tx->list_tail->next = data_node;
uart->dma_tx->list_tail = data_node; uart->dma_tx->list_tail = data_node;
if (uart->dma_tx->list_head == RT_NULL) if (uart->dma_tx->list_head == RT_NULL)
{ {
/* start DMA to transmit data */ /* start DMA to transmit data */
uart->dma_tx->list_head = data_node; uart->dma_tx->list_head = data_node;
/* Enable DMA Channel */ /* Enable DMA Channel */
rt_serial_enable_dma(uart->dma_tx->dma_channel, rt_serial_enable_dma(uart->dma_tx->dma_channel,
(rt_uint32_t)uart->dma_tx->list_head->data_ptr, (rt_uint32_t)uart->dma_tx->list_head->data_ptr,
uart->dma_tx->list_head->data_size); uart->dma_tx->list_head->data_size);
} }
/* enable interrupt */ /* enable interrupt */
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
} }
} }
else else
{ {
/* polling mode */ /* polling mode */
if (dev->flag & RT_DEVICE_FLAG_STREAM) if (dev->flag & RT_DEVICE_FLAG_STREAM)
{ {
/* stream mode */ /* stream mode */
while (size) while (size)
{ {
if (*ptr == '\n') if (*ptr == '\n')
{ {
while (!(uart->uart_device->SR & USART_FLAG_TXE)); while (!(uart->uart_device->SR & USART_FLAG_TXE));
uart->uart_device->DR = '\r'; uart->uart_device->DR = '\r';
} }
while (!(uart->uart_device->SR & USART_FLAG_TXE)); while (!(uart->uart_device->SR & USART_FLAG_TXE));
uart->uart_device->DR = (*ptr & 0x1FF); uart->uart_device->DR = (*ptr & 0x1FF);
++ptr; --size; ++ptr; --size;
} }
} }
else else
{ {
/* write data directly */ /* write data directly */
while (size) while (size)
{ {
while (!(uart->uart_device->SR & USART_FLAG_TXE)); while (!(uart->uart_device->SR & USART_FLAG_TXE));
uart->uart_device->DR = (*ptr & 0x1FF); uart->uart_device->DR = (*ptr & 0x1FF);
++ptr; --size; ++ptr; --size;
} }
} }
} }
/* set error code */ /* set error code */
rt_set_errno(err_code); rt_set_errno(err_code);
return (rt_uint32_t)ptr - (rt_uint32_t)buffer; return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
} }
static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args) static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
{ {
struct stm32_serial_device* uart; struct stm32_serial_device* uart;
RT_ASSERT(dev != RT_NULL); RT_ASSERT(dev != RT_NULL);
uart = (struct stm32_serial_device*)dev->user_data; uart = (struct stm32_serial_device*)dev->user_data;
switch (cmd) switch (cmd)
{ {
case RT_DEVICE_CTRL_SUSPEND: case RT_DEVICE_CTRL_SUSPEND:
/* suspend device */ /* suspend device */
dev->flag |= RT_DEVICE_FLAG_SUSPENDED; dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
USART_Cmd(uart->uart_device, DISABLE); USART_Cmd(uart->uart_device, DISABLE);
break; break;
case RT_DEVICE_CTRL_RESUME: case RT_DEVICE_CTRL_RESUME:
/* resume device */ /* resume device */
dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
USART_Cmd(uart->uart_device, ENABLE); USART_Cmd(uart->uart_device, ENABLE);
break; break;
} }
return RT_EOK; return RT_EOK;
} }
/* /*
@ -284,87 +284,87 @@ static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
*/ */
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial) rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial)
{ {
RT_ASSERT(device != RT_NULL); RT_ASSERT(device != RT_NULL);
if ((flag & RT_DEVICE_FLAG_DMA_RX) || if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
(flag & RT_DEVICE_FLAG_INT_TX)) (flag & RT_DEVICE_FLAG_INT_TX))
{ {
RT_ASSERT(0); RT_ASSERT(0);
} }
device->type = RT_Device_Class_Char; device->type = RT_Device_Class_Char;
device->rx_indicate = RT_NULL; device->rx_indicate = RT_NULL;
device->tx_complete = RT_NULL; device->tx_complete = RT_NULL;
device->init = rt_serial_init; device->init = rt_serial_init;
device->open = rt_serial_open; device->open = rt_serial_open;
device->close = rt_serial_close; device->close = rt_serial_close;
device->read = rt_serial_read; device->read = rt_serial_read;
device->write = rt_serial_write; device->write = rt_serial_write;
device->control = rt_serial_control; device->control = rt_serial_control;
device->user_data = serial; device->user_data = serial;
/* register a character device */ /* register a character device */
return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
} }
/* ISR for serial interrupt */ /* ISR for serial interrupt */
void rt_hw_serial_isr(rt_device_t device) void rt_hw_serial_isr(rt_device_t device)
{ {
struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
{ {
/* interrupt mode receive */ /* interrupt mode receive */
RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX); RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
/* save on rx buffer */ /* save on rx buffer */
while (uart->uart_device->SR & USART_FLAG_RXNE) while (uart->uart_device->SR & USART_FLAG_RXNE)
{ {
rt_base_t level; rt_base_t level;
/* disable interrupt */ /* disable interrupt */
level = rt_hw_interrupt_disable(); level = rt_hw_interrupt_disable();
/* save character */ /* save character */
uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff; uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff;
uart->int_rx->save_index ++; uart->int_rx->save_index ++;
if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE) if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->save_index = 0; uart->int_rx->save_index = 0;
/* if the next position is read index, discard this 'read char' */ /* if the next position is read index, discard this 'read char' */
if (uart->int_rx->save_index == uart->int_rx->read_index) if (uart->int_rx->save_index == uart->int_rx->read_index)
{ {
uart->int_rx->read_index ++; uart->int_rx->read_index ++;
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->read_index = 0; uart->int_rx->read_index = 0;
} }
/* enable interrupt */ /* enable interrupt */
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
} }
/* clear interrupt */ /* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
/* invoke callback */ /* invoke callback */
if (device->rx_indicate != RT_NULL) if (device->rx_indicate != RT_NULL)
{ {
rt_size_t rx_length; rt_size_t rx_length;
/* get rx length */ /* get rx length */
rx_length = uart->int_rx->read_index > uart->int_rx->save_index ? rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index : UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
uart->int_rx->save_index - uart->int_rx->read_index; uart->int_rx->save_index - uart->int_rx->read_index;
device->rx_indicate(device, rx_length); device->rx_indicate(device, rx_length);
} }
} }
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
{ {
/* clear interrupt */ /* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
} }
} }
/* /*
@ -372,47 +372,47 @@ void rt_hw_serial_isr(rt_device_t device)
*/ */
void rt_hw_serial_dma_tx_isr(rt_device_t device) void rt_hw_serial_dma_tx_isr(rt_device_t device)
{ {
rt_uint32_t level; rt_uint32_t level;
struct stm32_serial_data_node* data_node; struct stm32_serial_data_node* data_node;
struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
/* DMA mode receive */ /* DMA mode receive */
RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX); RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX);
/* get the first data node */ /* get the first data node */
data_node = uart->dma_tx->list_head; data_node = uart->dma_tx->list_head;
RT_ASSERT(data_node != RT_NULL); RT_ASSERT(data_node != RT_NULL);
/* invoke call to notify tx complete */ /* invoke call to notify tx complete */
if (device->tx_complete != RT_NULL) if (device->tx_complete != RT_NULL)
device->tx_complete(device, data_node->data_ptr); device->tx_complete(device, data_node->data_ptr);
/* disable interrupt */ /* disable interrupt */
level = rt_hw_interrupt_disable(); level = rt_hw_interrupt_disable();
/* remove list head */ /* remove list head */
uart->dma_tx->list_head = data_node->next; uart->dma_tx->list_head = data_node->next;
if (uart->dma_tx->list_head == RT_NULL) /* data link empty */ if (uart->dma_tx->list_head == RT_NULL) /* data link empty */
uart->dma_tx->list_tail = RT_NULL; uart->dma_tx->list_tail = RT_NULL;
/* enable interrupt */ /* enable interrupt */
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
/* release data node memory */ /* release data node memory */
rt_mp_free(data_node); rt_mp_free(data_node);
if (uart->dma_tx->list_head != RT_NULL) if (uart->dma_tx->list_head != RT_NULL)
{ {
/* transmit next data node */ /* transmit next data node */
rt_serial_enable_dma(uart->dma_tx->dma_channel, rt_serial_enable_dma(uart->dma_tx->dma_channel,
(rt_uint32_t)uart->dma_tx->list_head->data_ptr, (rt_uint32_t)uart->dma_tx->list_head->data_ptr,
uart->dma_tx->list_head->data_size); uart->dma_tx->list_head->data_size);
} }
else else
{ {
/* no data to be transmitted, disable DMA */ /* no data to be transmitted, disable DMA */
DMA_Cmd(uart->dma_tx->dma_channel, DISABLE); DMA_Cmd(uart->dma_tx->dma_channel, DISABLE);
} }
} }
/*@}*/ /*@}*/

286
bsp/stm32f40x/drivers/usart.c
View File

@ -39,9 +39,9 @@
struct stm32_serial_int_rx uart1_int_rx; struct stm32_serial_int_rx uart1_int_rx;
struct stm32_serial_device uart1 = struct stm32_serial_device uart1 =
{ {
USART1, USART1,
&uart1_int_rx, &uart1_int_rx,
RT_NULL RT_NULL
}; };
struct rt_device uart1_device; struct rt_device uart1_device;
#endif #endif
@ -50,9 +50,9 @@ struct rt_device uart1_device;
struct stm32_serial_int_rx uart2_int_rx; struct stm32_serial_int_rx uart2_int_rx;
struct stm32_serial_device uart2 = struct stm32_serial_device uart2 =
{ {
USART2, USART2,
&uart2_int_rx, &uart2_int_rx,
RT_NULL RT_NULL
}; };
struct rt_device uart2_device; struct rt_device uart2_device;
#endif #endif
@ -62,9 +62,9 @@ struct stm32_serial_int_rx uart3_int_rx;
struct stm32_serial_dma_tx uart3_dma_tx; struct stm32_serial_dma_tx uart3_dma_tx;
struct stm32_serial_device uart3 = struct stm32_serial_device uart3 =
{ {
USART3, USART3,
&uart3_int_rx, &uart3_int_rx,
&uart3_dma_tx &uart3_dma_tx
}; };
struct rt_device uart3_device; struct rt_device uart3_device;
#endif #endif
@ -74,75 +74,75 @@ struct rt_device uart3_device;
//#define USART3_DR_Base 0x40004804 //#define USART3_DR_Base 0x40004804
/* USART1_REMAP = 0 */ /* USART1_REMAP = 0 */
#define UART1_GPIO_TX GPIO_Pin_9 #define UART1_GPIO_TX GPIO_Pin_9
#define UART1_TX_PIN_SOURCE GPIO_PinSource9 #define UART1_TX_PIN_SOURCE GPIO_PinSource9
#define UART1_GPIO_RX GPIO_Pin_10 #define UART1_GPIO_RX GPIO_Pin_10
#define UART1_RX_PIN_SOURCE GPIO_PinSource10 #define UART1_RX_PIN_SOURCE GPIO_PinSource10
#define UART1_GPIO GPIOA #define UART1_GPIO GPIOA
#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOA #define UART1_GPIO_RCC RCC_AHB1Periph_GPIOA
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 #define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
#define UART1_TX_DMA DMA1_Channel4 #define UART1_TX_DMA DMA1_Channel4
#define UART1_RX_DMA DMA1_Channel5 #define UART1_RX_DMA DMA1_Channel5
#define UART2_GPIO_TX GPIO_Pin_2 #define UART2_GPIO_TX GPIO_Pin_2
#define UART2_TX_PIN_SOURCE GPIO_PinSource2 #define UART2_TX_PIN_SOURCE GPIO_PinSource2
#define UART2_GPIO_RX GPIO_Pin_3 #define UART2_GPIO_RX GPIO_Pin_3
#define UART2_RX_PIN_SOURCE GPIO_PinSource3 #define UART2_RX_PIN_SOURCE GPIO_PinSource3
#define UART2_GPIO GPIOA #define UART2_GPIO GPIOA
#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA #define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 #define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
/* USART3_REMAP[1:0] = 00 */ /* USART3_REMAP[1:0] = 00 */
#define UART3_GPIO_TX GPIO_Pin_10 #define UART3_GPIO_TX GPIO_Pin_10
#define UART3_TX_PIN_SOURCE GPIO_PinSource10 #define UART3_TX_PIN_SOURCE GPIO_PinSource10
#define UART3_GPIO_RX GPIO_Pin_11 #define UART3_GPIO_RX GPIO_Pin_11
#define UART3_RX_PIN_SOURCE GPIO_PinSource11 #define UART3_RX_PIN_SOURCE GPIO_PinSource11
#define UART3_GPIO GPIOB #define UART3_GPIO GPIOB
#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOB #define UART3_GPIO_RCC RCC_AHB1Periph_GPIOB
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 #define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
#define UART3_TX_DMA DMA1_Stream1 #define UART3_TX_DMA DMA1_Stream1
#define UART3_RX_DMA DMA1_Stream3 #define UART3_RX_DMA DMA1_Stream3
static void RCC_Configuration(void) static void RCC_Configuration(void)
{ {
#ifdef RT_USING_UART1 #ifdef RT_USING_UART1
/* Enable USART2 GPIO clocks */ /* Enable USART2 GPIO clocks */
RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE); RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE);
/* Enable USART2 clock */ /* Enable USART2 clock */
RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE); RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE);
#endif #endif
#ifdef RT_USING_UART2 #ifdef RT_USING_UART2
/* Enable USART2 GPIO clocks */ /* Enable USART2 GPIO clocks */
RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE); RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE);
/* Enable USART2 clock */ /* Enable USART2 clock */
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE); RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE);
#endif #endif
#ifdef RT_USING_UART3 #ifdef RT_USING_UART3
/* Enable USART3 GPIO clocks */ /* Enable USART3 GPIO clocks */
RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE); RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE);
/* Enable USART3 clock */ /* Enable USART3 clock */
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE); RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
/* DMA clock enable */ /* DMA clock enable */
RCC_APB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); RCC_APB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
#endif #endif
} }
static void GPIO_Configuration(void) static void GPIO_Configuration(void)
{ {
GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
#ifdef RT_USING_UART1 #ifdef RT_USING_UART1
/* Configure USART1 Rx/tx PIN */ /* Configure USART1 Rx/tx PIN */
GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX; GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX;
GPIO_Init(UART1_GPIO, &GPIO_InitStructure); GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
/* Connect alternate function */ /* Connect alternate function */
GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1); GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1);
@ -150,9 +150,9 @@ static void GPIO_Configuration(void)
#endif #endif
#ifdef RT_USING_UART2 #ifdef RT_USING_UART2
/* Configure USART2 Rx/tx PIN */ /* Configure USART2 Rx/tx PIN */
GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX | UART2_GPIO_RX; GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX | UART2_GPIO_RX;
GPIO_Init(UART2_GPIO, &GPIO_InitStructure); GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
/* Connect alternate function */ /* Connect alternate function */
GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2); GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2);
@ -160,9 +160,9 @@ static void GPIO_Configuration(void)
#endif #endif
#ifdef RT_USING_UART3 #ifdef RT_USING_UART3
/* Configure USART3 Rx/tx PIN */ /* Configure USART3 Rx/tx PIN */
GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX | UART3_GPIO_RX; GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX | UART3_GPIO_RX;
GPIO_Init(UART3_GPIO, &GPIO_InitStructure); GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
/* Connect alternate function */ /* Connect alternate function */
GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3); GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
@ -172,44 +172,44 @@ static void GPIO_Configuration(void)
static void NVIC_Configuration(void) static void NVIC_Configuration(void)
{ {
NVIC_InitTypeDef NVIC_InitStructure; NVIC_InitTypeDef NVIC_InitStructure;
#ifdef RT_USING_UART1 #ifdef RT_USING_UART1
/* Enable the USART1 Interrupt */ /* Enable the USART1 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure); NVIC_Init(&NVIC_InitStructure);
#endif #endif
#ifdef RT_USING_UART2 #ifdef RT_USING_UART2
/* Enable the USART2 Interrupt */ /* Enable the USART2 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure); NVIC_Init(&NVIC_InitStructure);
#endif #endif
#ifdef RT_USING_UART3 #ifdef RT_USING_UART3
/* Enable the USART3 Interrupt */ /* Enable the USART3 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure); NVIC_Init(&NVIC_InitStructure);
/* Enable the DMA1 Channel2 Interrupt */ /* Enable the DMA1 Channel2 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream1_IRQn; NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure); NVIC_Init(&NVIC_InitStructure);
#endif #endif
} }
static void DMA_Configuration(void) static void DMA_Configuration(void)
{ {
#if defined (RT_USING_UART3) #if defined (RT_USING_UART3)
DMA_InitTypeDef DMA_InitStructure; DMA_InitTypeDef DMA_InitStructure;
// /* Configure DMA Stream */ // /* Configure DMA Stream */
// DMA_InitStructure.DMA_Channel = DMA_CHANNEL; // DMA_InitStructure.DMA_Channel = DMA_CHANNEL;
@ -249,24 +249,24 @@ static void DMA_Configuration(void)
DMA_DeInit(UART3_TX_DMA); DMA_DeInit(UART3_TX_DMA);
DMA_Init(UART3_TX_DMA, &DMA_InitStructure); DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
// /* fill init structure */ // /* fill init structure */
// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; // DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; // DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; // DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; // DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; // DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
// DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; // DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; // DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
// //
// /* DMA1 Channel5 (triggered by USART3 Tx event) Config */ // /* DMA1 Channel5 (triggered by USART3 Tx event) Config */
// DMA_DeInit(UART3_TX_DMA); // DMA_DeInit(UART3_TX_DMA);
// DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base; // DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; // DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
// DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0; // DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
// DMA_InitStructure.DMA_BufferSize = 0; // DMA_InitStructure.DMA_BufferSize = 0;
// DMA_Init(UART3_TX_DMA, &DMA_InitStructure); // DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE); DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
// DMA_ClearFlag(DMA1_FLAG_TC5); // DMA_ClearFlag(DMA1_FLAG_TC5);
#endif #endif
} }
@ -277,73 +277,73 @@ volatile USART_TypeDef * uart2_debug = USART2;
*/ */
void rt_hw_usart_init() void rt_hw_usart_init()
{ {
USART_InitTypeDef USART_InitStructure; USART_InitTypeDef USART_InitStructure;
RCC_Configuration(); RCC_Configuration();
GPIO_Configuration(); GPIO_Configuration();
NVIC_Configuration(); NVIC_Configuration();
DMA_Configuration(); DMA_Configuration();
/* uart init */ /* uart init */
#ifdef RT_USING_UART1 #ifdef RT_USING_UART1
USART_InitStructure.USART_BaudRate = 115200; USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART1, &USART_InitStructure); USART_Init(USART1, &USART_InitStructure);
/* register uart1 */ /* register uart1 */
rt_hw_serial_register(&uart1_device, "uart1", rt_hw_serial_register(&uart1_device, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
&uart1); &uart1);
/* enable interrupt */ /* enable interrupt */
USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
#endif #endif
#ifdef RT_USING_UART2 #ifdef RT_USING_UART2
USART_InitStructure.USART_BaudRate = 115200; USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART2, &USART_InitStructure); USART_Init(USART2, &USART_InitStructure);
/* register uart2 */ /* register uart2 */
rt_hw_serial_register(&uart2_device, "uart2", rt_hw_serial_register(&uart2_device, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
&uart2); &uart2);
/* Enable USART2 DMA Rx request */ /* Enable USART2 DMA Rx request */
USART_ITConfig(USART2, USART_IT_RXNE, ENABLE); USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
#endif #endif
#ifdef RT_USING_UART3 #ifdef RT_USING_UART3
USART_InitStructure.USART_BaudRate = 115200; USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART3, &USART_InitStructure); USART_Init(USART3, &USART_InitStructure);
// uart3_dma_tx.dma_channel= UART3_TX_DMA; // uart3_dma_tx.dma_channel= UART3_TX_DMA;
/* register uart3 */ /* register uart3 */
rt_hw_serial_register(&uart3_device, "uart3", rt_hw_serial_register(&uart3_device, "uart3",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX,
&uart3); &uart3);
/* Enable USART3 DMA Tx request */ /* Enable USART3 DMA Tx request */
USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE); USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE);
/* enable interrupt */ /* enable interrupt */
USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
#endif #endif
} }