Merge pull request #3624 from ShermanShao/master
[BSP]Add nrf5x SPI BSP
This commit is contained in:
Bernard Xiong
GitHub
commit
997c652784
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@ -17,6 +17,9 @@ if GetDepend(['BSP_USING_ON_CHIP_FLASH']):
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if GetDepend(['BSP_USING_QSPI_FLASH']):
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src += ['drv_qspi_flash.c']
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if GetDepend(['BSP_USING_SPI']):
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src += ['drv_spi.c']
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path = [cwd]
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
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@ -0,0 +1,281 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-05-22 Sherman first version
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*/
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#include <stdint.h>
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#include <string.h>
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#include "board.h"
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#include "drv_spi.h"
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#define DBG_LEVEL DBG_LOG
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#include <rtdbg.h>
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#define LOG_TAG "drv.spi"
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#ifdef BSP_USING_SPI
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static struct nrfx_drv_spi_config spi_config[] =
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{
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#ifdef BSP_USING_SPI0
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NRFX_SPI0_CONFIG,
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#endif
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#ifdef BSP_USING_SPI1
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NRFX_SPI1_CONFIG,
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#endif
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#ifdef BSP_USING_SPI2
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NRFX_SPI2_CONFIG,
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#endif
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};
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static struct nrfx_drv_spi spi_bus_obj[sizeof(spi_config) / sizeof(spi_config[0])];
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//Configure SPI bus pins using the menuconfig
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static struct nrfx_drv_spi_pin_config bsp_spi_pin[] =
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{
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#ifdef BSP_USING_SPI0
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{
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.sck_pin = BSP_SPI0_SCK_PIN,
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.mosi_pin = BSP_SPI0_MOSI_PIN,
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.miso_pin = BSP_SPI0_MISO_PIN,
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.ss_pin = BSP_SPI0_SS_PIN
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},
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#endif
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#ifdef BSP_USING_SPI1
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{
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.sck_pin = BSP_SPI1_SCK_PIN,
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.mosi_pin = BSP_SPI1_MOSI_PIN,
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.miso_pin = BSP_SPI1_MISO_PIN,
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.ss_pin = BSP_SPI1_SS_PIN
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},
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#endif
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#ifdef BSP_USING_SPI2
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{
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.sck_pin = BSP_SPI2_SCK_PIN,
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.mosi_pin = BSP_SPI2_MOSI_PIN,
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.miso_pin = BSP_SPI2_MISO_PIN,
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.ss_pin = BSP_SPI2_SS_PIN
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},
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#endif
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};
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static rt_uint8_t spi_index_find(struct rt_spi_bus *spi_bus)
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{
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for (int i = 0; i < sizeof(spi_config) / sizeof(spi_config[0]); i++)
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{
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if(spi_bus == &spi_bus_obj[i].spi_bus)
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return i;
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}
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return 0xFF;
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}
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/**
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* spi event handler function
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*/
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static void spi0_handler(const nrfx_spi_evt_t *p_event, void *p_context)
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{
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LOG_I("\nspi0_handler");
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}
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static void spi1_handler(const nrfx_spi_evt_t *p_event, void *p_context)
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{
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LOG_I("\nspi1_handler");
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}
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static void spi2_handler(const nrfx_spi_evt_t *p_event, void *p_context)
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{
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LOG_I("\nspi2_handler");
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}
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nrfx_spi_evt_handler_t spi_handler[] = {spi0_handler, spi1_handler, spi2_handler};
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/**
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* @brief This function config spi bus
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* @param device
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* @param configuration
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* @retval RT_EOK / RT_ERROR
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*/
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static rt_err_t spi_configure(struct rt_spi_device *device,
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struct rt_spi_configuration *configuration)
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{
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->bus->parent.user_data != RT_NULL);
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RT_ASSERT(configuration != RT_NULL);
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rt_uint8_t index = spi_index_find(device->bus);
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RT_ASSERT(index != 0xFF);
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nrfx_spi_t spi = spi_bus_obj[index].spi;
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nrfx_spi_config_t config = NRFX_SPI_DEFAULT_CONFIG(bsp_spi_pin[index].sck_pin,
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bsp_spi_pin[index].mosi_pin, bsp_spi_pin[index].miso_pin, bsp_spi_pin[index].ss_pin);
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/* spi config ss pin */
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if(device->user_data != RT_NULL)
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{
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config.ss_pin = (rt_uint8_t)device->user_data;
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}
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/* spi config bit order */
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if(configuration->mode & RT_SPI_MSB)
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{
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config.bit_order = NRF_SPI_BIT_ORDER_MSB_FIRST;
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}
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else
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{
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config.bit_order = NRF_SPI_BIT_ORDER_LSB_FIRST;
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}
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/* spi mode config */
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switch (configuration->mode & RT_SPI_MODE_3 )
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{
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case RT_SPI_MODE_0/* RT_SPI_CPOL:0 , RT_SPI_CPHA:0 */:
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config.mode = NRF_SPI_MODE_0;
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break;
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case RT_SPI_MODE_1/* RT_SPI_CPOL:0 , RT_SPI_CPHA:1 */:
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config.mode = NRF_SPI_MODE_1;
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break;
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case RT_SPI_MODE_2/* RT_SPI_CPOL:1 , RT_SPI_CPHA:0 */:
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config.mode = NRF_SPI_MODE_2;
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break;
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case RT_SPI_MODE_3/* RT_SPI_CPOL:1 , RT_SPI_CPHA:1 */:
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config.mode = NRF_SPI_MODE_3;
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break;
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default:
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LOG_E("spi_configure mode error %x\n",configuration->mode);
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return RT_ERROR;
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}
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/* spi frequency config */
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switch (configuration->max_hz / 1000)
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{
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case 125:
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config.frequency = NRF_SPI_FREQ_125K;
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break;
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case 250:
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config.frequency = NRF_SPI_FREQ_250K;
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break;
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case 500:
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config.frequency = NRF_SPI_FREQ_500K;
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break;
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case 1000:
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config.frequency = NRF_SPI_FREQ_1M;
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break;
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case 2000:
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config.frequency = NRF_SPI_FREQ_2M;
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break;
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case 4000:
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config.frequency = NRF_SPI_FREQ_4M;
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break;
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case 8000:
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config.frequency = NRF_SPI_FREQ_8M;
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break;
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default:
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LOG_E("spi_configure rate error %d\n",configuration->max_hz);
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break;
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}
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rt_memcpy((void*)&spi_bus_obj[index].spi_config, (void*)&config, sizeof(nrfx_spi_config_t));
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nrfx_spi_evt_handler_t handler = RT_NULL; //spi send callback handler ,default NULL
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void * context = RT_NULL;
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nrfx_err_t nrf_ret = nrfx_spi_init(&spi, &config, handler, context);
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if(NRFX_SUCCESS == nrf_ret)
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return RT_EOK;
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return RT_ERROR;
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}
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static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->bus->parent.user_data != RT_NULL);
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rt_uint8_t index = spi_index_find(device->bus);
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RT_ASSERT(index != 0xFF);
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nrfx_spi_t * p_instance = &spi_bus_obj[index].spi;
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nrfx_spi_xfer_desc_t p_xfer_desc;
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if(message->send_buf == RT_NULL)
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{
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p_xfer_desc.p_rx_buffer = message->recv_buf;
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p_xfer_desc.rx_length = message->length;
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p_xfer_desc.p_tx_buffer = RT_NULL;
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p_xfer_desc.tx_length = 0;
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}
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else
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{
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p_xfer_desc.p_tx_buffer = message->send_buf;
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p_xfer_desc.tx_length = message->length ;
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p_xfer_desc.p_rx_buffer = RT_NULL;
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p_xfer_desc.rx_length = 0;
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}
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nrfx_err_t nrf_ret = nrfx_spi_xfer(p_instance, &p_xfer_desc, 0);
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if( NRFX_SUCCESS == nrf_ret)
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return message->length;
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else
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return 0;
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}
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/* spi bus callback function */
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static const struct rt_spi_ops nrfx_spi_ops =
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{
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.configure = spi_configure,
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.xfer = spixfer,
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};
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/*spi bus init*/
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static int rt_hw_spi_bus_init(void)
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{
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rt_err_t result = RT_ERROR;
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for (int i = 0; i < sizeof(spi_config) / sizeof(spi_config[0]); i++)
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{
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spi_bus_obj[i].spi = spi_config[i].spi;
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spi_bus_obj[i].spi_bus.parent.user_data = &spi_config[i]; //SPI INSTANCE
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result = rt_spi_bus_register(&spi_bus_obj[i].spi_bus, spi_config[i].bus_name, &nrfx_spi_ops);
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RT_ASSERT(result == RT_EOK);
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}
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return result;
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}
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int rt_hw_spi_init(void)
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{
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return rt_hw_spi_bus_init();
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}
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INIT_BOARD_EXPORT(rt_hw_spi_init);
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/**
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* Attach the spi device to SPI bus, this function must be used after initialization.
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*/
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t ss_pin)
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{
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RT_ASSERT(bus_name != RT_NULL);
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RT_ASSERT(device_name != RT_NULL);
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rt_err_t result;
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struct rt_spi_device *spi_device;
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/* attach the device to spi bus*/
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spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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RT_ASSERT(spi_device != RT_NULL);
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/* initialize the cs pin */
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spi_device->user_data = (void*)ss_pin;
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result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, RT_NULL);
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if (result != RT_EOK)
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{
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LOG_E("%s attach to %s faild, %d", device_name, bus_name, result);
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result = RT_ERROR;
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}
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RT_ASSERT(result == RT_EOK);
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return result;
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}
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#endif /*BSP_USING_SPI*/
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@ -0,0 +1,77 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-05-19 Sherman first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <rthw.h>
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#ifndef __DRV_SPI_H_
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#define __DRV_SPI_H_
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#ifdef BSP_USING_SPI
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#include "nrfx_spi.h"
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/**
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* @brief Attach the spi device to SPI bus, this function must be used after initialization.
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* @param bus_name spi bus name "spi0"/"spi1"/"spi2"
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* @param device_name spi device name "spi0x"/"spi1x"/"spi2x"
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* @param ss_pin spi ss pin number
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* @retval RT_ERROR / RT_EOK
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*/
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t ss_pin);
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//SPI bus config
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#ifdef BSP_USING_SPI0
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#define NRFX_SPI0_CONFIG \
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{ \
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.bus_name = "spi0", \
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.spi = NRFX_SPI_INSTANCE(0) \
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}
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#endif
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#ifdef BSP_USING_SPI1
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#define NRFX_SPI1_CONFIG \
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{ \
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.bus_name = "spi1", \
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.spi = NRFX_SPI_INSTANCE(1) \
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}
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#endif
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#ifdef BSP_USING_SPI2
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#define NRFX_SPI2_CONFIG \
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{ \
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.bus_name = "spi2", \
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.spi = NRFX_SPI_INSTANCE(2) \
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}
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#endif
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struct nrfx_drv_spi_config
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{
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char *bus_name;
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nrfx_spi_t spi;
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};
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struct nrfx_drv_spi
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{
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nrfx_spi_t spi; /* nrfx spi driver instance. */
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nrfx_spi_config_t spi_config; /* nrfx spi config Configuration */
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struct rt_spi_configuration *cfg;
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struct rt_spi_bus spi_bus;
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};
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struct nrfx_drv_spi_pin_config
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{
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rt_uint8_t sck_pin;
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rt_uint8_t mosi_pin;
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rt_uint8_t miso_pin;
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rt_uint8_t ss_pin;
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};
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#endif /* BSP_USING_SPI */
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#endif /*__DRV_SPI_H_*/
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@ -80,6 +80,79 @@ menu "On-chip Peripheral Drivers"
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default n
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endif
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config BSP_USING_SPI
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bool "Enable SPI"
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select RT_USING_PIN
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default y
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if BSP_USING_SPI
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config BSP_USING_SPI0
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bool "Enable SPI0 bus"
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default y
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if BSP_USING_SPI0
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config BSP_SPI0_SCK_PIN
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int "SPI0 sck pin number set"
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range 0 47
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default 28
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config BSP_SPI0_MOSI_PIN
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int "SPI0 mosi pin number set"
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range 0 47
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default 29
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config BSP_SPI0_MISO_PIN
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int "SPI0 miso pin number set"
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range 0 47
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default 30
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config BSP_SPI0_SS_PIN
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int "SPI0 ss pin number set"
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range 0 47
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default 31
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endif
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config BSP_USING_SPI1
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bool "Enable SPI1 bus"
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default n
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if BSP_USING_SPI1
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config BSP_SPI1_SCK_PIN
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int "SPI0 sck pin number set"
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range 0 47
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default 28
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config BSP_SPI1_MOSI_PIN
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int "SPI0 mosi pin number set"
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range 0 47
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default 29
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config BSP_SPI1_MISO_PIN
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int "SPI0 miso pin number set"
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range 0 47
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default 30
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config BSP_SPI1_SS_PIN
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int "SPI0 ss pin number set"
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range 0 47
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default 31
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endif
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config BSP_USING_SPI2
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bool "Enable SPI2 bus"
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default n
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if BSP_USING_SPI2
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config BSP_SPI2_SCK_PIN
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int "SPI0 sck pin number set"
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range 0 47
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default 28
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config BSP_SPI2_MOSI_PIN
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int "SPI0 mosi pin number set"
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range 0 47
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default 29
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config BSP_SPI2_MISO_PIN
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int "SPI0 miso pin number set"
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range 0 47
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default 30
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config BSP_SPI2_SS_PIN
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int "SPI0 ss pin number set"
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range 0 47
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default 31
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endif
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endif
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config BSP_USING_ON_CHIP_FLASH
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select PKG_USING_FAL
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bool "Enable on-chip FLASH"
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@ -87,7 +160,6 @@ menu "On-chip Peripheral Drivers"
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menu "On-chip flash config"
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config MCU_FLASH_START_ADDRESS
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hex "MCU FLASH START ADDRESS"
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default 0x00000000
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@ -3556,27 +3556,27 @@
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// <e> NRFX_SPI_ENABLED - nrfx_spi - SPI peripheral driver
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//==========================================================
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#ifndef NRFX_SPI_ENABLED
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#define NRFX_SPI_ENABLED 0
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#define NRFX_SPI_ENABLED 1
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#endif
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// <q> NRFX_SPI0_ENABLED - Enable SPI0 instance
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#ifndef NRFX_SPI0_ENABLED
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#define NRFX_SPI0_ENABLED 0
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#define NRFX_SPI0_ENABLED 1
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#endif
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// <q> NRFX_SPI1_ENABLED - Enable SPI1 instance
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#ifndef NRFX_SPI1_ENABLED
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#define NRFX_SPI1_ENABLED 0
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#define NRFX_SPI1_ENABLED 1
|
||||
#endif
|
||||
|
||||
// <q> NRFX_SPI2_ENABLED - Enable SPI2 instance
|
||||
|
||||
|
||||
#ifndef NRFX_SPI2_ENABLED
|
||||
#define NRFX_SPI2_ENABLED 0
|
||||
#define NRFX_SPI2_ENABLED 1
|
||||
#endif
|
||||
|
||||
// <o> NRFX_SPI_MISO_PULL_CFG - MISO pin pull configuration.
|
||||
|
|
@ -11694,9 +11694,11 @@
|
|||
#endif
|
||||
// </e>
|
||||
|
||||
// </h>
|
||||
// </h>
|
||||
//==========================================================
|
||||
|
||||
#ifndef NRFX_SYSTICK_ENABLED
|
||||
#define NRFX_SYSTICK_ENABLED 1
|
||||
#endif
|
||||
// <<< end of configuration section >>>
|
||||
#endif //SDK_CONFIG_H
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue