[bsp][c28x] add support to not disable global interrupt in context-switch to enable zero-latency isr for critical interrupts.

This commit is contained in:
Yunjie Gu 2022-10-20 04:41:13 +01:00 committed by GitHub
parent 65baa8b697
commit 8fa9fde43a
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
13 changed files with 516 additions and 672 deletions

View File

@ -71,12 +71,21 @@
;// $
;//###########################################################################
.def _F28x_usDelay
.cdecls LIST ;;Used to populate __TI_COMPILER_VERSION__ macro
%{
#ifdef __TI_EABI__
#define __EABI__ 1
#else
#define __EABI__ 0
#endif
%}
.if __EABI__
.def F28x_usDelay
.else
.def _F28x_usDelay
.endif
.if __TI_COMPILER_VERSION__
.if __TI_COMPILER_VERSION__ >= 15009000
.sect ".TI.ramfunc" ;;Used with compiler v15.9.0 and newer
@ -86,9 +95,20 @@
.endif
.global __F28x_usDelay
.if __EABI__
F28x_usDelay:
.else
_F28x_usDelay:
.endif
SUB ACC,#1
.if __EABI__
BF F28x_usDelay,GEQ ;; Loop if ACC >= 0
.else
BF _F28x_usDelay,GEQ ;; Loop if ACC >= 0
.endif
LRETR
;There is a 9/10 cycle overhead and each loop

View File

@ -17,8 +17,7 @@ CONFIG_RT_THREAD_PRIORITY_8=y
CONFIG_RT_THREAD_PRIORITY_MAX=8
CONFIG_RT_TICK_PER_SECOND=100
# CONFIG_RT_USING_OVERFLOW_CHECK is not set
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOK is not set
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=1024
@ -209,19 +208,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LWIP is not set
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_MQTTCLIENT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
@ -241,12 +240,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
# CONFIG_PKG_USING_ZB_COORDINATOR is not set
#
# IoT Cloud
@ -255,14 +252,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# CONFIG_PKG_USING_EZ_IOT_OS is not set
# CONFIG_PKG_USING_IOTSHARP_SDK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
@ -270,110 +263,40 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
# CONFIG_PKG_USING_MAVLINK is not set
# CONFIG_PKG_USING_BSAL is not set
# CONFIG_PKG_USING_AGILE_MODBUS is not set
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
# CONFIG_PKG_USING_RT_LINK_HW is not set
# CONFIG_PKG_USING_LORA_PKT_FWD is not set
# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
# CONFIG_PKG_USING_HM is not set
# CONFIG_PKG_USING_SMALL_MODBUS is not set
# CONFIG_PKG_USING_NET_SERVER is not set
# CONFIG_PKG_USING_ZFTP is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_LIBSODIUM is not set
# CONFIG_PKG_USING_LIBHYDROGEN is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
#
#
# JSON: JavaScript Object Notation, a lightweight data-interchange format
#
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set
#
# XML: Extensible Markup Language
#
# CONFIG_PKG_USING_SIMPLE_XML is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_LUATOS_SOC is not set
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
# CONFIG_PKG_USING_PIKASCRIPT is not set
# CONFIG_PKG_USING_RTT_RUST is not set
#
# multimedia packages
#
#
# LVGL: powerful and easy-to-use embedded GUI library
#
# CONFIG_PKG_USING_LVGL is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
#
# u8g2: a monochrome graphic library
#
# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_PDFGEN is not set
# CONFIG_PKG_USING_HELIX is not set
# CONFIG_PKG_USING_AZUREGUIX is not set
# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
# CONFIG_PKG_USING_NUEMWIN is not set
# CONFIG_PKG_USING_MP3PLAYER is not set
# CONFIG_PKG_USING_TINYJPEG is not set
# CONFIG_PKG_USING_UGUI is not set
#
# PainterEngine: A cross-platform graphics application framework written in C language
#
# CONFIG_PKG_USING_PAINTERENGINE is not set
# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_TERMBOX is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_GUIENGINE is not set
#
# tools packages
@ -382,115 +305,36 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_SEGGER_RTT is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ULOG_FILE is not set
# CONFIG_PKG_USING_LOGMGR is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_MEMORYPERF is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
# CONFIG_PKG_USING_LWLOG is not set
# CONFIG_PKG_USING_ANV_TRACE is not set
# CONFIG_PKG_USING_ANV_MEMLEAK is not set
# CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set
# CONFIG_PKG_USING_DEVMEM is not set
# CONFIG_PKG_USING_REGEX is not set
# CONFIG_PKG_USING_MEM_SANDBOX is not set
# CONFIG_PKG_USING_SOLAR_TERMS is not set
# CONFIG_PKG_USING_GAN_ZHI is not set
# CONFIG_PKG_USING_FDT is not set
# CONFIG_PKG_USING_CBOX is not set
# CONFIG_PKG_USING_SNOWFLAKE is not set
# CONFIG_PKG_USING_HASH_MATCH is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
#
# system packages
#
#
# enhanced kernel services
#
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
#
# acceleration: Assembly language or algorithmic acceleration packages
#
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
#
# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
#
# CONFIG_PKG_USING_CMSIS_5 is not set
# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
#
# Micrium: Micrium software products porting for RT-Thread
#
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
# CONFIG_PKG_USING_UC_CRC is not set
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_RTDUINO is not set
# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_PERF_COUNTER is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_DFS_JFFS2 is not set
# CONFIG_PKG_USING_DFS_UFFS is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
# CONFIG_PKG_USING_ARM_2D is not set
# CONFIG_PKG_USING_MCUBOOT is not set
# CONFIG_PKG_USING_TINYUSB is not set
# CONFIG_PKG_USING_CHERRYUSB is not set
# CONFIG_PKG_USING_KMULTI_RTIMER is not set
# CONFIG_PKG_USING_TFDB is not set
# CONFIG_PKG_USING_QPC is not set
#
# peripheral libraries and drivers
@ -499,29 +343,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_ADT74XX is not set
# CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_RTT_ESP_IDF is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
#
# Kendryte SDK
#
# CONFIG_PKG_USING_K210_SDK is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_MULTI_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
@ -535,72 +369,26 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
# CONFIG_PKG_USING_MAX7219 is not set
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
# CONFIG_PKG_USING_LY68L6400 is not set
# CONFIG_PKG_USING_DM9051 is not set
# CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_RS232 is not set
# CONFIG_PKG_USING_NES is not set
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
# CONFIG_PKG_USING_SGM706 is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_RDA58XX is not set
# CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
# CONFIG_PKG_USING_TCA9534 is not set
# CONFIG_PKG_USING_KOBUKI is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_MICRO_ROS is not set
# CONFIG_PKG_USING_MCP23008 is not set
# CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# CONFIG_PKG_USING_CW2015 is not set
# CONFIG_PKG_USING_RFM300 is not set
# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
#
# AI packages
#
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
#
# miscellaneous packages
#
#
# project laboratory
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
#
# samples: kernel and components samples
@ -609,52 +397,15 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
#
# entertainment: terminal games and other interesting software packages
#
# CONFIG_PKG_USING_CMATRIX is not set
# CONFIG_PKG_USING_SL is not set
# CONFIG_PKG_USING_CAL is not set
# CONFIG_PKG_USING_ACLOCK is not set
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# CONFIG_PKG_USING_COWSAY is not set
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_LZMA is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_MINIZIP is not set
# CONFIG_PKG_USING_HEATSHRINK is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_DESIGN_PATTERN is not set
# CONFIG_PKG_USING_CONTROLLER is not set
# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
# CONFIG_PKG_USING_MFBD is not set
# CONFIG_PKG_USING_SLCAN2RTT is not set
# CONFIG_PKG_USING_SOEM is not set
#
# Hardware Drivers Config

View File

@ -15,31 +15,31 @@
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@ -154,48 +154,48 @@
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View File

@ -1,4 +1,4 @@
___heap_end = 0x010000;
__heap_end = 0x010000;
MEMORY
{
PAGE 0 : /* Program Memory */
@ -40,37 +40,37 @@ SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHF PAGE = 0, ALIGN(4)
.pinit : > FLASHF, PAGE = 0, ALIGN(4)
.text : >> FLASHE PAGE = 0, ALIGN(4)
.init_array : > FLASHF, PAGE = 0, ALIGN(4)
.text : > FLASHE PAGE = 0, ALIGN(4)
codestart : > BEGIN PAGE = 0, ALIGN(4)
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} LOAD = FLASHF,
RUN = RAMGS8_15,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#else
ramfuncs : LOAD = FLASHF,
RUN = RAMGS8_15,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#endif
#endif
FSymTab : > RAMM1, PAGE = 1, ALIGN(4)
LOAD_START(___fsymtab_start)
LOAD_END(___fsymtab_end)
FSymTab : > RAMM1, PAGE = 1
LOAD_START(__fsymtab_start)
LOAD_END(__fsymtab_end)
.rti_fn.0.end : > RAMM1, PAGE = 1
.rti_fn.0 : > RAMM1, PAGE = 1
.rti_fn.1 : > RAMM1, PAGE = 1
@ -81,18 +81,18 @@ SECTIONS
.rti_fn.1.end : > RAMM1, PAGE = 1
.rti_fn.6.end : > RAMM1, PAGE = 1
.rti_fn.6 : > RAMM1, PAGE = 1
/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : > EBSS,
LOAD_START(___ebss_start),
LOAD_END(___ebss_end),
.sysmem : > RAMM1 PAGE = 1
.bss : > EBSS, PAGE = 1
.data : > EBSS,
LOAD_END(__ebss_end),
PAGE = 1
.esysmem : >> RAMM1 PAGE = 1
/* Initalized sections go in Flash */
.econst : >> FLASHF PAGE = 0, ALIGN(4)
.const : > FLASHF PAGE = 0, ALIGN(4)
.switch : > FLASHF PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
/* The following section definitions are required when using the IPC API Drivers */

View File

@ -1,4 +1,4 @@
___heap_end = 0x00F000;
__heap_end = 0x00F000;
MEMORY
{
@ -32,7 +32,7 @@ SECTIONS
#endif
.text : > RAMGS8_15, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.init_array : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.rti_fn.0.end : > RAMM1, PAGE = 1
@ -46,19 +46,17 @@ SECTIONS
.rti_fn.6.end : > RAMM1, PAGE = 1
.rti_fn.6 : > RAMM1, PAGE = 1
.stack : > RAMM1, PAGE = 1
.esysmem : > RAMM1, PAGE = 1
.ebss : > EBSS,
LOAD_START(___ebss_start),
LOAD_END(___ebss_end),
.sysmem : > RAMM1, PAGE = 1
.bss : > EBSS, PAGE = 1
.data : > EBSS,
LOAD_END(__ebss_end),
PAGE = 1
.econst : > ECONST, PAGE = 1
.const : > ECONST, PAGE = 1
/* finsh symbol table */
FSymTab : > RAMM1, PAGE = 1, ALIGN(4)
LOAD_START(___fsymtab_start)
LOAD_END(___fsymtab_end)
FSymTab : > RAMM1, PAGE = 1
LOAD_START(__fsymtab_start)
LOAD_END(__fsymtab_end)
/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1

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@ -22,25 +22,7 @@ extern volatile rt_uint8_t rt_interrupt_nest;
extern rt_uint32_t rt_thread_switch_interrupt_flag;
extern interrupt void RTOSINT_Handler();
void trap_rtosint()
{
if(rt_thread_switch_interrupt_flag)
{
/* only do pendsv at the end of the last level of interrupt nesting,
* so that threads do not preempt any isrs. */
if(rt_interrupt_nest == 1)
{
/* rt_interrupt_leave_hook is called before rt_interrupt_nest --
* in rt_interrupt_leave. We need to do this manually here to indicate
* that all isrs have been cleared before we switch to thread. */
rt_interrupt_nest --;
asm(" trap #16");
/* increment rt_interrupt_nest to compensate for the previous decrement. */
rt_interrupt_nest ++;
}
}
}
extern interrupt void rtosint_handler();
/**
* This is the timer interrupt service routine.
@ -50,13 +32,10 @@ interrupt void cpu_timer2_isr(void)
{
CpuTimer2Regs.TCR.all = 0xC000;
ALLOW_ISR_PREEMPT();
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
@ -84,7 +63,7 @@ void rt_hw_board_init()
#endif
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.TIMER2_INT = &cpu_timer2_isr;
PieVectTable.RTOS_INT = &RTOSINT_Handler;
PieVectTable.RTOS_INT = &rtosint_handler;
#ifdef BSP_USING_XINT1
PieVectTable.XINT1_INT = &XINT1_Handler;
@ -127,8 +106,6 @@ void rt_hw_board_init()
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
rt_interrupt_leave_sethook((void (*)(void))trap_rtosint);
}
int _args_main()

View File

@ -13,8 +13,6 @@
#define RT_THREAD_PRIORITY_8
#define RT_THREAD_PRIORITY_MAX 8
#define RT_TICK_PER_SECOND 100
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 1024
@ -126,59 +124,25 @@
/* language packages */
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
/* XML: Extensible Markup Language */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* Kendryte SDK */
/* AI packages */
/* miscellaneous packages */
/* project laboratory */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Hardware Drivers Config */
/* Onboard Peripheral Drivers */

View File

@ -24,4 +24,7 @@ typedef unsigned char uint8_t; /**< 8bit unsigned integer type */
* this macro at the start of preemptible interrupt service routines*/
#define ALLOW_ISR_PREEMPT() __asm(" CLRC INTM")
#define RT_USING_ZERO_LATENCY
#define ZERO_LATENCY_INT_MASK 0x0000
#endif

View File

@ -36,17 +36,21 @@ typedef long (*syscall_func)(void);
#pragma comment(linker, "/merge:FSymTab=mytext")
#elif defined(__TI_COMPILER_VERSION__)
#ifdef __TMS320C28XX__
#define RT_NOBLOCKED __attribute__((noblocked))
#else
#define RT_NOBLOCKED
#endif
#define MSH_FUNCTION_EXPORT_CMD(name, cmd, desc) \
__TI_FINSH_EXPORT_FUNCTION(__fsym_##cmd); \
const char __fsym_##cmd##_name[] = #cmd; \
const char __fsym_##cmd##_desc[] = #desc; \
const struct finsh_syscall __fsym_##cmd = \
RT_USED RT_NOBLOCKED const struct finsh_syscall __fsym_##cmd = \
{ \
__fsym_##cmd##_name, \
__fsym_##cmd##_desc, \
(syscall_func)&name \
};
#else
#define MSH_FUNCTION_EXPORT_CMD(name, cmd, desc) \
const char __fsym_##cmd##_name[] RT_SECTION(".rodata.name") = #cmd; \

View File

@ -210,10 +210,18 @@ typedef __gnuc_va_list va_list;
* GCC and MDK) compilers. See ARM Optimizing C/C++ Compiler 5.9.3 for more
* details. */
#define RT_SECTION(x) __attribute__((section(x)))
#ifdef __TI_EABI__
#define RT_USED __attribute__((retain)) __attribute__((used))
#else
#define RT_USED __attribute__((used))
#endif
#define PRAGMA(x) _Pragma(#x)
#define ALIGN(n) __attribute__((aligned(n)))
#ifdef __TI_EABI__
#define RT_WEAK __attribute__((weak))
#else
#define RT_WEAK
#endif
#define rt_inline static inline
#define RTT_API
#elif defined (__TASKING__)

View File

@ -11,37 +11,208 @@
; 2019-12-05 xiaolifan add support for hardware fpu32
; 2022-06-21 guyunjie trim pendsv (RTOSINT_Handler)
; 2022-08-24 guyunjie fix bugs in context switching
; 2022-10-15 guyunjie add zero-latency interrupt
.ref _rt_interrupt_to_thread
.ref _rt_interrupt_from_thread
.ref _rt_thread_switch_interrupt_flag
.ref rt_interrupt_to_thread
.ref rt_interrupt_from_thread
.ref rt_thread_switch_interrupt_flag
.def _RTOSINT_Handler
.def _rt_hw_get_st0
.def _rt_hw_get_st1
.def _rt_hw_calc_csb
.def _rt_hw_context_switch_interrupt
.def _rt_hw_context_switch
.def _rt_hw_context_switch_to
.def _rt_hw_interrupt_thread_switch
.def _rt_hw_interrupt_disable
.def _rt_hw_interrupt_enable
.def rtosint_handler
.def rt_hw_get_st0
.def rt_hw_get_st1
.def rt_hw_calc_csb
.def rt_hw_context_switch_interrupt
.def rt_hw_context_switch
.def rt_hw_context_switch_to
.def rt_hw_interrupt_thread_switch
.def rt_hw_interrupt_disable
.def rt_hw_interrupt_enable
;workaround for importing fpu settings from the compiler
;importing settings from compiler and config
.cdecls C,NOLIST
%{
#include <rtconfig.h>
#ifdef __TMS320C28XX_FPU32__
#define __FPU32__ 1
#else
#define __FPU32__ 0
#endif
#ifdef __TMS320C28XX_FPU64__
#define __FPU64__ 1
#else
#define __FPU64__ 0
#endif
#ifdef __TMS320C28XX_VCRC__
#define __VCRC__ 1
#else
#define __VCRC__ 0
#endif
#ifdef RT_USING_ZERO_LATENCY
#define ZERO_LATENCY 1
#ifndef ZERO_LATENCY_INT_MASK
#error ZERO_LATENCY_INT_MASK must be defined for zero latency interrupt
#elif ZERO_LATENCY_INT_MASK & 0x8000
#error RTOS bit (0x8000) must not be set in ZERO_LATENCY_INT_MASK
#endif
#else
#define ZERO_LATENCY 0
#endif
%}
RT_CTX_SAVE .macro
.text
.newblock
;
; rt_base_t rt_hw_interrupt_disable();
;
.asmfunc
rt_hw_interrupt_disable:
.if ZERO_LATENCY
MOV AL, IER
AND IER, #ZERO_LATENCY_INT_MASK
.else
PUSH ST1
SETC INTM
POP AL
.endif
MOV AH, #0
LRETR
.endasmfunc
;
; void rt_hw_interrupt_enable(rt_base_t level);
;
.asmfunc
rt_hw_interrupt_enable:
.if ZERO_LATENCY
MOV IER, AL
.else
PUSH AL
POP ST1
.endif
LRETR
.endasmfunc
;
; void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; ACC --> from
; SP[4] --> to
;
.asmfunc
rt_hw_context_switch_interrupt:
; ACC, XAR4-7 are "save on call" following TI C28x C/C++ compiler convention
; and therefore can be used in a function without being saved on stack first
; (the compiler has already saved it before the call).
; Reference: TMS320C28x Optimizing CC++ Compiler
; note this convention is only applicable to normal functions not to isrs
MOVL XAR6, ACC
MOVL XAR4, *-SP[4]
; set rt_thread_switch_interrupt_flag to 1
MOVL XAR5, #rt_thread_switch_interrupt_flag
MOVL ACC, *XAR5
BF reswitch2, NEQ ; ACC!=0
MOVB ACC, #1
MOVL *XAR5, ACC
MOVL XAR5, #rt_interrupt_from_thread ; set rt_interrupt_from_thread
MOVL *XAR5, XAR6
reswitch2:
MOVL XAR5, #rt_interrupt_to_thread ; set rt_interrupt_to_thread
MOVL *XAR5, XAR4
LRETR
.endasmfunc
;
; void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; ACC --> from
; SP[4] --> to
;
.asmfunc
rt_hw_context_switch:
MOVL XAR6, ACC
MOVL XAR4, *-SP[4]
; set rt_thread_switch_interrupt_flag to 1
MOVL XAR5, #rt_thread_switch_interrupt_flag
MOVL ACC, *XAR5
BF reswitch1, NEQ ; ACC!=0
MOVB ACC, #1
MOVL *XAR5, ACC
MOVL XAR5, #rt_interrupt_from_thread ; set rt_interrupt_from_thread
MOVL *XAR5, XAR6
reswitch1:
MOVL XAR5, #rt_interrupt_to_thread ; set rt_interrupt_to_thread
MOVL *XAR5, XAR4
OR IFR, #0x8000
LRETR
.endasmfunc
;
; * void rt_hw_context_switch_to(rt_uint32 to);
; * ACC --> to
;
.asmfunc
rt_hw_context_switch_to:
; get to thread
MOVL XAR5, #rt_interrupt_to_thread
MOVL *XAR5, ACC
; set from thread to 0
MOVL XAR5, #rt_interrupt_from_thread
MOVL XAR4, #0
MOVL *XAR5, XAR4
; set interrupt flag to 1
MOVL XAR5, #rt_thread_switch_interrupt_flag
MOVL XAR4, #1
MOVL *XAR5, XAR4
; trigger rtos interrupt
OR IFR, #0x8000
OR IER, #0x8000
CLRC INTM
; never reach here!
.endasmfunc
.asmfunc
rtosint_handler:
.if ZERO_LATENCY
; mask out non-critical interrupts and enable global interrupt
; so rtosint_handler won't block critical interrupts
AND IER, #ZERO_LATENCY_INT_MASK
CLRC INTM
.endif
MOVL ACC, *-SP[4]
MOV AR0, AL ; save original IER
PUSH AR1H:AR0H
PUSH XAR2
; get rt_thread_switch_interrupt_flag
MOVL XAR1, #rt_thread_switch_interrupt_flag
MOVL ACC, *XAR1
BF rtosint_exit, EQ ; rtos_int already handled
; clear rt_thread_switch_interrupt_flag to 0
MOVL XAR2, #0
MOVL *XAR1, XAR2
MOVL XAR1, #rt_interrupt_from_thread
MOVL ACC, *XAR1
BF switch_to_thread, EQ ; skip register save at the first time
PUSH XAR3
PUSH XAR4
PUSH XAR5
@ -63,20 +234,63 @@ RT_CTX_SAVE .macro
MOV32 *SP++, R7H
.endif
.endm
.if __FPU64__
MOV32 *SP++, R0L
MOV32 *SP++, R1L
MOV32 *SP++, R2L
MOV32 *SP++, R3L
MOV32 *SP++, R4L
MOV32 *SP++, R5L
MOV32 *SP++, R6L
MOV32 *SP++, R7L
.endif
.if __VCRC__
VMOV32 *SP++, VCRC
VMOV32 *SP++, VSTATUS
VMOV32 *SP++, VCRCPOLY
VMOV32 *SP++, VCRCSIZE
.endif
RT_CTX_RESTORE .macro
MOVL ACC, *XAR1
MOVL XAR1, ACC
MOVZ AR2, @SP ; get from thread stack pointer
MOVL *XAR1, XAR2 ; update from thread stack pointer
switch_to_thread:
MOVL XAR1, #rt_interrupt_to_thread
MOVL ACC, *XAR1
MOVL XAR1, ACC
MOVL ACC, *XAR1
MOV @SP, AL ; load thread stack pointer
.if __VCRC__
VMOV32 VCRCSIZE, *--SP
VMOV32 VCRCPOLY, *--SP
VMOV32 VSTATUS, *--SP
VMOV32 VCRC, *--SP
.endif
.if __FPU64__
MOV32 R7L, *--SP
MOV32 R6L, *--SP
MOV32 R5L, *--SP
MOV32 R4L, *--SP
MOV32 R3L, *--SP
MOV32 R2L, *--SP
MOV32 R1L, *--SP
MOV32 R0L, *--SP
.endif
.if __FPU32__
MOV32 R7H, *--SP, UNCF
MOV32 R6H, *--SP, UNCF
MOV32 R5H, *--SP, UNCF
MOV32 R4H, *--SP, UNCF
MOV32 R3H, *--SP, UNCF
MOV32 R2H, *--SP, UNCF
MOV32 R1H, *--SP, UNCF
MOV32 R0H, *--SP, UNCF
MOV32 R7H, *--SP
MOV32 R6H, *--SP
MOV32 R5H, *--SP
MOV32 R4H, *--SP
MOV32 R3H, *--SP
MOV32 R2H, *--SP
MOV32 R1H, *--SP
MOV32 R0H, *--SP
MOV32 STF, *--SP
POP RB
.endif
@ -88,172 +302,30 @@ RT_CTX_RESTORE .macro
POP XAR5
POP XAR4
POP XAR3
POP XAR2
MOVZ AR0 , @SP
SUBB XAR0, #6
MOVL ACC , *XAR0
AND ACC, #0xFFFF << 16
MOV AL, IER
MOVL *XAR0, ACC
POP AR1H:AR0H
.endm
.text
.newblock
;
; rt_base_t rt_hw_interrupt_disable();
;
.asmfunc
_rt_hw_interrupt_disable:
PUSH ST1
SETC INTM,DBGM
MOV AL, *--SP
LRETR
.endasmfunc
;
; void rt_hw_interrupt_enable(rt_base_t level);
;
.asmfunc
_rt_hw_interrupt_enable:
MOV *SP++, AL
POP ST1
LRETR
.endasmfunc
;
; void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; ACC --> from
; SP[4] --> to
;
.asmfunc
_rt_hw_context_switch_interrupt:
MOVL XAR0, ACC
MOVL XAR4, *-SP[4]
; set rt_thread_switch_interrupt_flag to 1
MOVL XAR5, #_rt_thread_switch_interrupt_flag
MOVL ACC, *XAR5
BF _reswitch, NEQ ; ACC!=0
MOVB ACC, #1
MOVL *XAR5, ACC
MOVL XAR5, #_rt_interrupt_from_thread ; set rt_interrupt_from_thread
MOVL *XAR5, XAR0
_reswitch:
MOVL XAR5, #_rt_interrupt_to_thread ; set rt_interrupt_to_thread
MOVL *XAR5, XAR4
LRETR
.endasmfunc
;
; void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; ACC --> from
; SP[4] --> to
;
.asmfunc
_rt_hw_context_switch:
MOVL XAR0, ACC
MOVL XAR4, *-SP[4]
; set rt_thread_switch_interrupt_flag to 1
MOVL XAR5, #_rt_thread_switch_interrupt_flag
MOVL ACC, *XAR5
BF _reswitch2, NEQ ; ACC!=0
MOVB ACC, #1
MOVL *XAR5, ACC
MOVL XAR5, #_rt_interrupt_from_thread ; set rt_interrupt_from_thread
MOVL *XAR5, XAR0
_reswitch2:
MOVL XAR5, #_rt_interrupt_to_thread ; set rt_interrupt_to_thread
MOVL *XAR5, XAR4
TRAP #16
LRETR
.endasmfunc
;
; * void rt_hw_context_switch_to(rt_uint32 to);
; * ACC --> to
;
.asmfunc
_rt_hw_context_switch_to:
; get to thread
MOVL XAR1, #_rt_interrupt_to_thread
MOVL *XAR1, ACC
; set from thread to 0
MOVL XAR1, #_rt_interrupt_from_thread
MOVL XAR0, #0
MOVL *XAR1, XAR0
; set interrupt flag to 1
MOVL XAR1, #_rt_thread_switch_interrupt_flag
MOVL XAR0, #1
MOVL *XAR1, XAR0
TRAP #16
; never reach here!
.endasmfunc
.asmfunc
_RTOSINT_Handler:
; disable interrupt to protect context switch
; DINT ;this is done by hardware so not needed
; get rt_thread_switch_interrupt_flag
MOVL XAR0, #_rt_thread_switch_interrupt_flag
MOVL ACC, *XAR0
BF rtosint_exit, EQ ; pendsv already handled
; clear rt_thread_switch_interrupt_flag to 0
MOVL XAR1, #0
MOVL *XAR0, XAR1
MOVL XAR0, #_rt_interrupt_from_thread
MOVL ACC, *XAR0
BF switch_to_thread, EQ ; skip register save at the first time
RT_CTX_SAVE ; push cpu registers
MOVL ACC, *XAR0
MOVL XAR0, ACC
MOVZ AR1, @SP ; get from thread stack pointer
MOVL *XAR0, XAR1 ; update from thread stack pointer
switch_to_thread:
MOVL XAR1, #_rt_interrupt_to_thread
MOVL ACC, *XAR1
MOVL XAR1, ACC
MOVL ACC, *XAR1
MOV @SP, AL ; load thread stack pointer
RT_CTX_RESTORE ; pop cpu registers
rtosint_exit:
; do not restore interrupt here: to be restored according to the
; switched-to context during IRET (automaticlly by hardware)
POP XAR2
POP AR1H:AR0H
MOVL ACC , *-SP[4]
MOV AL, AR0
MOVL *-SP[4], ACC
IRET
.endasmfunc
.asmfunc
_rt_hw_get_st0:
rt_hw_get_st0:
PUSH ST0
POP AL
LRETR
.endasmfunc
.asmfunc
_rt_hw_get_st1:
rt_hw_get_st1:
PUSH ST1
POP AL
LRETR
@ -269,18 +341,18 @@ _rt_hw_get_st1:
; 0x000001FF 22 8
; 0x000001F0 22 8
.asmfunc
_rt_hw_calc_csb:
rt_hw_calc_csb:
MOV AH, #0
CSB ACC ; T = no. of sign bits - 1
MOVU ACC, T ; ACC = no. of sign bits - 1
SUBB ACC, #30 ; ACC = ACC - 30
ABS ACC ; ACC = |ACC|
lretr
LRETR
.endasmfunc
; compatible with old version
.asmfunc
_rt_hw_interrupt_thread_switch:
rt_hw_interrupt_thread_switch:
LRETR
NOP
.endasmfunc

View File

@ -8,9 +8,12 @@
* 2018-09-01 xuzhuoyi the first version.
* 2019-07-03 zhaoxiaowei add support for __rt_ffs.
* 2019-12-05 xiaolifan add support for hardware fpu32
* 2022-10-17 guyunjie add support for hardware fpu64 and vcrc
*/
#include <rtthread.h>
#include <rthw.h>
extern volatile rt_uint8_t rt_interrupt_nest;
/* exception and interrupt handler table */
rt_uint32_t rt_interrupt_from_thread;
@ -64,6 +67,24 @@ struct stack_frame
rt_uint32_t r7h;
#endif
#ifdef __TMS320C28XX_FPU64__
rt_uint32_t r0l;
rt_uint32_t r1l;
rt_uint32_t r2l;
rt_uint32_t r3l;
rt_uint32_t r4l;
rt_uint32_t r5l;
rt_uint32_t r6l;
rt_uint32_t r7l;
#endif
#ifdef __TMS320C28XX_VCRC__
rt_uint32_t vcrc;
rt_uint32_t vstatus;
rt_uint32_t vcrcpoly;
rt_uint32_t vcrcsize;
#endif
};
rt_uint8_t *rt_hw_stack_init(void *tentry,
@ -81,20 +102,17 @@ rt_uint8_t *rt_hw_stack_init(void *tentry,
stack_frame = (struct stack_frame *)stk;
/* init all register */
/* zero all registers */
for (i = 0; i < sizeof(struct stack_frame) / sizeof(rt_uint32_t); i ++)
{
((rt_uint32_t *)stack_frame)[i] = 0xdeadbeef;
((rt_uint32_t *)stack_frame)[i] = 0;
}
stack_frame->exception_stack_frame.t_st0 = 0x11110000 | rt_hw_get_st0();
stack_frame->exception_stack_frame.acc = 0x33332222;
stack_frame->exception_stack_frame.ar1_ar0 = 0x00001111 & (unsigned long)parameter; /* ar0 : argument */
stack_frame->exception_stack_frame.p = 0x55554444; /* p */
stack_frame->exception_stack_frame.dp_st1 = (0x00000000) | rt_hw_get_st1() & 0xFFFFFFFE; /* dp_st1 */
stack_frame->exception_stack_frame.dbgstat_ier = 0; /* dbgstat_ier */
stack_frame->exception_stack_frame.return_address = (unsigned long)tentry; /* return_address */
stack_frame->rpc = (unsigned long)texit;
/* configure special registers*/
stack_frame->exception_stack_frame.dp_st1 = 0x00000A08;
stack_frame->xar4 = (rt_uint32_t)parameter;
stack_frame->exception_stack_frame.return_address = (rt_uint32_t)tentry;
stack_frame->rpc = (rt_uint32_t)texit;
#ifdef __TMS320C28XX_FPU32__
stack_frame->stf = 0x00000200;
@ -145,3 +163,32 @@ RT_WEAK void rt_hw_cpu_shutdown(void)
RT_ASSERT(0);
}
void rt_interrupt_enter(void)
{
rt_base_t level;
__asm(" EINT");
level = rt_hw_interrupt_disable();
rt_interrupt_nest ++;
RT_OBJECT_HOOK_CALL(rt_interrupt_enter_hook,());
rt_hw_interrupt_enable(level);
RT_DEBUG_LOG(RT_DEBUG_IRQ, ("irq has come..., irq current nest:%d\n",
(rt_int32_t)rt_interrupt_nest));
}
void rt_interrupt_leave(void)
{
RT_DEBUG_LOG(RT_DEBUG_IRQ, ("irq is going to leave, irq current nest:%d\n",
(rt_int32_t)rt_interrupt_nest));
rt_hw_interrupt_disable();
RT_OBJECT_HOOK_CALL(rt_interrupt_leave_hook,());
rt_interrupt_nest --;
if(rt_thread_switch_interrupt_flag && !rt_interrupt_nest)
{
__asm(" OR IFR, #0x8000"); /* trigger rtos int */
}
/* rt_hw_interrupt_enable auto done by hardware on IRET */
}

View File

@ -78,7 +78,7 @@ volatile rt_uint8_t rt_interrupt_nest = 0;
*
* @see rt_interrupt_leave
*/
void rt_interrupt_enter(void)
RT_WEAK void rt_interrupt_enter(void)
{
rt_base_t level;
@ -100,7 +100,7 @@ RTM_EXPORT(rt_interrupt_enter);
*
* @see rt_interrupt_enter
*/
void rt_interrupt_leave(void)
RT_WEAK void rt_interrupt_leave(void)
{
rt_base_t level;